./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.eq_sdp_v3.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 5e519f3a Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.eq_sdp_v3.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 9d5a40d30bdb637dd2c987738fb0d731ff79366f937c446bccf8e9f932481a19 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-5e519f3 [2022-11-03 03:31:45,387 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-03 03:31:45,390 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-03 03:31:45,444 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-03 03:31:45,444 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-03 03:31:45,445 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-03 03:31:45,447 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-03 03:31:45,449 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-03 03:31:45,452 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-03 03:31:45,460 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-03 03:31:45,461 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-03 03:31:45,467 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-03 03:31:45,468 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-03 03:31:45,470 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-03 03:31:45,471 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-03 03:31:45,472 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-03 03:31:45,473 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-03 03:31:45,473 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-03 03:31:45,475 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-03 03:31:45,477 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-03 03:31:45,482 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-03 03:31:45,484 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-03 03:31:45,490 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-03 03:31:45,491 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-03 03:31:45,502 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-03 03:31:45,502 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-03 03:31:45,503 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-03 03:31:45,504 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-03 03:31:45,504 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-03 03:31:45,505 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-03 03:31:45,505 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-03 03:31:45,506 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-03 03:31:45,507 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-03 03:31:45,508 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-03 03:31:45,509 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-03 03:31:45,509 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-03 03:31:45,510 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-03 03:31:45,510 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-03 03:31:45,515 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-03 03:31:45,516 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-03 03:31:45,518 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-03 03:31:45,519 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Default.epf [2022-11-03 03:31:45,567 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-03 03:31:45,567 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-03 03:31:45,568 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-03 03:31:45,568 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-03 03:31:45,569 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-03 03:31:45,569 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-03 03:31:45,570 INFO L138 SettingsManager]: * User list type=DISABLED [2022-11-03 03:31:45,570 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-11-03 03:31:45,570 INFO L138 SettingsManager]: * Explicit value domain=true [2022-11-03 03:31:45,570 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2022-11-03 03:31:45,571 INFO L138 SettingsManager]: * Octagon Domain=false [2022-11-03 03:31:45,572 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-11-03 03:31:45,572 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2022-11-03 03:31:45,572 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2022-11-03 03:31:45,572 INFO L138 SettingsManager]: * Interval Domain=false [2022-11-03 03:31:45,573 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2022-11-03 03:31:45,573 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2022-11-03 03:31:45,573 INFO L138 SettingsManager]: * Simplification Technique=POLY_PAC [2022-11-03 03:31:45,574 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-03 03:31:45,574 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-03 03:31:45,574 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-03 03:31:45,574 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-03 03:31:45,574 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-03 03:31:45,577 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-03 03:31:45,577 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-03 03:31:45,578 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-03 03:31:45,578 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-03 03:31:45,578 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-03 03:31:45,578 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-03 03:31:45,579 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 03:31:45,579 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-03 03:31:45,579 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2022-11-03 03:31:45,579 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-03 03:31:45,580 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-03 03:31:45,580 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2022-11-03 03:31:45,580 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-11-03 03:31:45,580 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-03 03:31:45,581 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-11-03 03:31:45,581 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 9d5a40d30bdb637dd2c987738fb0d731ff79366f937c446bccf8e9f932481a19 [2022-11-03 03:31:45,885 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-03 03:31:45,929 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-03 03:31:45,931 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-03 03:31:45,933 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-03 03:31:45,934 INFO L275 PluginConnector]: CDTParser initialized [2022-11-03 03:31:45,935 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.eq_sdp_v3.c [2022-11-03 03:31:46,013 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/data/92ea8a254/864076419e734e0f8677664dc0113b8c/FLAGcfeb7ba25 [2022-11-03 03:31:46,563 INFO L306 CDTParser]: Found 1 translation units. [2022-11-03 03:31:46,563 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.eq_sdp_v3.c [2022-11-03 03:31:46,578 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/data/92ea8a254/864076419e734e0f8677664dc0113b8c/FLAGcfeb7ba25 [2022-11-03 03:31:46,851 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/data/92ea8a254/864076419e734e0f8677664dc0113b8c [2022-11-03 03:31:46,854 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-03 03:31:46,855 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-03 03:31:46,857 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-03 03:31:46,858 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-03 03:31:46,862 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-03 03:31:46,863 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 03:31:46" (1/1) ... [2022-11-03 03:31:46,864 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5c6ffcb7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:46, skipping insertion in model container [2022-11-03 03:31:46,864 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 03:31:46" (1/1) ... [2022-11-03 03:31:46,873 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-03 03:31:46,898 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-03 03:31:47,052 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.eq_sdp_v3.c[1107,1120] [2022-11-03 03:31:47,178 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 03:31:47,185 INFO L203 MainTranslator]: Completed pre-run [2022-11-03 03:31:47,205 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.eq_sdp_v3.c[1107,1120] [2022-11-03 03:31:47,278 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 03:31:47,296 INFO L208 MainTranslator]: Completed translation [2022-11-03 03:31:47,297 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:47 WrapperNode [2022-11-03 03:31:47,297 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-03 03:31:47,298 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-03 03:31:47,299 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-03 03:31:47,299 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-03 03:31:47,307 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:47" (1/1) ... [2022-11-03 03:31:47,328 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:47" (1/1) ... [2022-11-03 03:31:47,390 INFO L138 Inliner]: procedures = 11, calls = 3, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 291 [2022-11-03 03:31:47,390 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-03 03:31:47,391 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-03 03:31:47,391 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-03 03:31:47,391 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-03 03:31:47,411 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:47" (1/1) ... [2022-11-03 03:31:47,411 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:47" (1/1) ... [2022-11-03 03:31:47,416 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:47" (1/1) ... [2022-11-03 03:31:47,416 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:47" (1/1) ... [2022-11-03 03:31:47,427 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:47" (1/1) ... [2022-11-03 03:31:47,431 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:47" (1/1) ... [2022-11-03 03:31:47,434 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:47" (1/1) ... [2022-11-03 03:31:47,436 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:47" (1/1) ... [2022-11-03 03:31:47,441 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-03 03:31:47,442 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-03 03:31:47,442 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-03 03:31:47,442 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-03 03:31:47,443 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:47" (1/1) ... [2022-11-03 03:31:47,472 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 03:31:47,491 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:31:47,512 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-03 03:31:47,520 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-03 03:31:47,559 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-03 03:31:47,559 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-03 03:31:47,691 INFO L235 CfgBuilder]: Building ICFG [2022-11-03 03:31:47,716 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-03 03:31:48,184 INFO L276 CfgBuilder]: Performing block encoding [2022-11-03 03:31:48,491 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-03 03:31:48,491 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-03 03:31:48,494 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 03:31:48 BoogieIcfgContainer [2022-11-03 03:31:48,494 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-03 03:31:48,496 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-03 03:31:48,496 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-03 03:31:48,500 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-03 03:31:48,500 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 03.11 03:31:46" (1/3) ... [2022-11-03 03:31:48,501 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@193d2ea5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 03:31:48, skipping insertion in model container [2022-11-03 03:31:48,501 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:47" (2/3) ... [2022-11-03 03:31:48,502 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@193d2ea5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 03:31:48, skipping insertion in model container [2022-11-03 03:31:48,502 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 03:31:48" (3/3) ... [2022-11-03 03:31:48,503 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.eq_sdp_v3.c [2022-11-03 03:31:48,525 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-03 03:31:48,525 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-03 03:31:48,599 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-03 03:31:48,619 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@79a7fb24, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-03 03:31:48,620 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-03 03:31:48,631 INFO L276 IsEmpty]: Start isEmpty. Operand has 7 states, 5 states have (on average 1.6) internal successors, (8), 6 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:31:48,644 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2022-11-03 03:31:48,644 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:31:48,645 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1] [2022-11-03 03:31:48,646 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:31:48,652 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:31:48,652 INFO L85 PathProgramCache]: Analyzing trace with hash 5134080, now seen corresponding path program 1 times [2022-11-03 03:31:48,668 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-03 03:31:48,669 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [388656761] [2022-11-03 03:31:48,669 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:31:48,670 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-03 03:31:48,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-03 03:31:48,856 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-03 03:31:48,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-03 03:31:48,965 INFO L130 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2022-11-03 03:31:48,967 INFO L359 BasicCegarLoop]: Counterexample is feasible [2022-11-03 03:31:48,969 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-11-03 03:31:48,971 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-11-03 03:31:48,976 INFO L444 BasicCegarLoop]: Path program histogram: [1] [2022-11-03 03:31:48,981 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-03 03:31:48,999 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:31:49,006 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 03.11 03:31:49 BoogieIcfgContainer [2022-11-03 03:31:49,006 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-03 03:31:49,007 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-03 03:31:49,007 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-03 03:31:49,007 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-03 03:31:49,008 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 03:31:48" (3/4) ... [2022-11-03 03:31:49,012 INFO L140 WitnessPrinter]: No result that supports witness generation found [2022-11-03 03:31:49,012 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-03 03:31:49,013 INFO L158 Benchmark]: Toolchain (without parser) took 2157.36ms. Allocated memory was 104.9MB in the beginning and 127.9MB in the end (delta: 23.1MB). Free memory was 67.1MB in the beginning and 82.0MB in the end (delta: -14.9MB). Peak memory consumption was 8.9MB. Max. memory is 16.1GB. [2022-11-03 03:31:49,014 INFO L158 Benchmark]: CDTParser took 0.30ms. Allocated memory is still 104.9MB. Free memory is still 83.8MB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-03 03:31:49,014 INFO L158 Benchmark]: CACSL2BoogieTranslator took 440.40ms. Allocated memory is still 104.9MB. Free memory was 66.8MB in the beginning and 74.9MB in the end (delta: -8.1MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2022-11-03 03:31:49,015 INFO L158 Benchmark]: Boogie Procedure Inliner took 91.82ms. Allocated memory is still 104.9MB. Free memory was 74.9MB in the beginning and 71.2MB in the end (delta: 3.7MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-11-03 03:31:49,016 INFO L158 Benchmark]: Boogie Preprocessor took 50.51ms. Allocated memory is still 104.9MB. Free memory was 71.2MB in the beginning and 68.6MB in the end (delta: 2.6MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. [2022-11-03 03:31:49,017 INFO L158 Benchmark]: RCFGBuilder took 1052.29ms. Allocated memory was 104.9MB in the beginning and 127.9MB in the end (delta: 23.1MB). Free memory was 68.6MB in the beginning and 61.1MB in the end (delta: 7.5MB). Peak memory consumption was 39.4MB. Max. memory is 16.1GB. [2022-11-03 03:31:49,017 INFO L158 Benchmark]: TraceAbstraction took 510.40ms. Allocated memory is still 127.9MB. Free memory was 60.4MB in the beginning and 83.1MB in the end (delta: -22.8MB). There was no memory consumed. Max. memory is 16.1GB. [2022-11-03 03:31:49,018 INFO L158 Benchmark]: Witness Printer took 4.95ms. Allocated memory is still 127.9MB. Free memory was 82.9MB in the beginning and 82.0MB in the end (delta: 938.4kB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-11-03 03:31:49,021 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.30ms. Allocated memory is still 104.9MB. Free memory is still 83.8MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 440.40ms. Allocated memory is still 104.9MB. Free memory was 66.8MB in the beginning and 74.9MB in the end (delta: -8.1MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 91.82ms. Allocated memory is still 104.9MB. Free memory was 74.9MB in the beginning and 71.2MB in the end (delta: 3.7MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * Boogie Preprocessor took 50.51ms. Allocated memory is still 104.9MB. Free memory was 71.2MB in the beginning and 68.6MB in the end (delta: 2.6MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. * RCFGBuilder took 1052.29ms. Allocated memory was 104.9MB in the beginning and 127.9MB in the end (delta: 23.1MB). Free memory was 68.6MB in the beginning and 61.1MB in the end (delta: 7.5MB). Peak memory consumption was 39.4MB. Max. memory is 16.1GB. * TraceAbstraction took 510.40ms. Allocated memory is still 127.9MB. Free memory was 60.4MB in the beginning and 83.1MB in the end (delta: -22.8MB). There was no memory consumed. Max. memory is 16.1GB. * Witness Printer took 4.95ms. Allocated memory is still 127.9MB. Free memory was 82.9MB in the beginning and 82.0MB in the end (delta: 938.4kB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 20]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: overapproximation of bitwiseComplement at line 98, overapproximation of bitwiseAnd at line 87. Possible FailurePath: [L25] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 8); [L26] const SORT_1 msb_SORT_1 = (SORT_1)1 << (8 - 1); [L28] const SORT_5 mask_SORT_5 = (SORT_5)-1 >> (sizeof(SORT_5) * 8 - 1); [L29] const SORT_5 msb_SORT_5 = (SORT_5)1 << (1 - 1); [L31] const SORT_1 var_10 = 0; [L32] const SORT_5 var_18 = 1; [L33] const SORT_5 var_28 = 0; [L35] SORT_1 input_2; [L36] SORT_1 input_3; [L37] SORT_1 input_4; [L38] SORT_5 input_6; [L39] SORT_5 input_7; [L40] SORT_5 input_8; [L41] SORT_5 input_9; [L43] SORT_1 state_11 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L44] SORT_1 state_13 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L45] SORT_1 state_22 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L46] SORT_1 state_24 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L47] SORT_1 state_26 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L48] SORT_5 state_29 = __VERIFIER_nondet_uchar() & mask_SORT_5; [L49] SORT_5 state_31 = __VERIFIER_nondet_uchar() & mask_SORT_5; [L50] SORT_1 state_33 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L51] SORT_5 state_35 = __VERIFIER_nondet_uchar() & mask_SORT_5; [L52] SORT_1 state_37 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L53] SORT_1 state_40 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L54] SORT_1 state_42 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L56] SORT_1 init_12_arg_1 = var_10; [L57] state_11 = init_12_arg_1 [L58] SORT_1 init_14_arg_1 = var_10; [L59] state_13 = init_14_arg_1 [L60] SORT_1 init_23_arg_1 = var_10; [L61] state_22 = init_23_arg_1 [L62] SORT_1 init_25_arg_1 = var_10; [L63] state_24 = init_25_arg_1 [L64] SORT_1 init_27_arg_1 = var_10; [L65] state_26 = init_27_arg_1 [L66] SORT_5 init_30_arg_1 = var_28; [L67] state_29 = init_30_arg_1 [L68] SORT_5 init_32_arg_1 = var_28; [L69] state_31 = init_32_arg_1 [L70] SORT_1 init_34_arg_1 = var_10; [L71] state_33 = init_34_arg_1 [L72] SORT_5 init_36_arg_1 = var_28; [L73] state_35 = init_36_arg_1 [L74] SORT_1 init_38_arg_1 = var_10; [L75] state_37 = init_38_arg_1 [L76] SORT_1 init_41_arg_1 = var_10; [L77] state_40 = init_41_arg_1 [L78] SORT_1 init_43_arg_1 = var_10; [L79] state_42 = init_43_arg_1 VAL [init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=0, state_31=0, state_33=0, state_35=0, state_37=0, state_40=0, state_42=0, var_10=0, var_18=1, var_28=0] [L82] input_2 = __VERIFIER_nondet_uchar() [L83] input_3 = __VERIFIER_nondet_uchar() [L84] input_4 = __VERIFIER_nondet_uchar() [L85] input_6 = __VERIFIER_nondet_uchar() [L86] input_7 = __VERIFIER_nondet_uchar() [L87] input_7 = input_7 & mask_SORT_5 [L88] input_8 = __VERIFIER_nondet_uchar() [L89] input_8 = input_8 & mask_SORT_5 [L90] input_9 = __VERIFIER_nondet_uchar() [L91] input_9 = input_9 & mask_SORT_5 [L94] SORT_1 var_15_arg_0 = state_11; [L95] SORT_1 var_15_arg_1 = state_13; [L96] SORT_5 var_15 = var_15_arg_0 == var_15_arg_1; [L97] SORT_5 var_19_arg_0 = var_15; [L98] SORT_5 var_19 = ~var_19_arg_0; [L99] SORT_5 var_20_arg_0 = var_18; [L100] SORT_5 var_20_arg_1 = var_19; [L101] SORT_5 var_20 = var_20_arg_0 & var_20_arg_1; [L102] var_20 = var_20 & mask_SORT_5 [L103] SORT_5 bad_21_arg_0 = var_20; [L104] CALL __VERIFIER_assert(!(bad_21_arg_0)) [L20] COND TRUE !(cond) VAL [\old(cond)=0, cond=0] [L20] reach_error() VAL [\old(cond)=0, cond=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 7 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 0.4s, OverallIterations: 1, TraceHistogramMax: 1, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: , PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=7occurred in iteration=0, InterpolantAutomatonStates: 0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.1s SatisfiabilityAnalysisTime, 0.0s InterpolantComputationTime, 4 NumberOfCodeBlocks, 4 NumberOfCodeBlocksAsserted, 1 NumberOfCheckSat, 0 ConstructedInterpolants, 0 QuantifiedInterpolants, 0 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 0 InterpolantComputations, 0 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2022-11-03 03:31:49,081 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.eq_sdp_v3.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 9d5a40d30bdb637dd2c987738fb0d731ff79366f937c446bccf8e9f932481a19 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-5e519f3 [2022-11-03 03:31:51,532 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-03 03:31:51,536 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-03 03:31:51,591 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-03 03:31:51,592 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-03 03:31:51,597 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-03 03:31:51,600 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-03 03:31:51,605 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-03 03:31:51,612 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-03 03:31:51,616 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-03 03:31:51,617 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-03 03:31:51,620 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-03 03:31:51,620 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-03 03:31:51,628 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-03 03:31:51,630 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-03 03:31:51,631 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-03 03:31:51,633 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-03 03:31:51,634 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-03 03:31:51,639 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-03 03:31:51,650 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-03 03:31:51,652 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-03 03:31:51,660 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-03 03:31:51,661 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-03 03:31:51,662 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-03 03:31:51,668 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-03 03:31:51,671 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-03 03:31:51,671 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-03 03:31:51,674 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-03 03:31:51,674 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-03 03:31:51,676 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-03 03:31:51,676 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-03 03:31:51,677 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-03 03:31:51,680 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-03 03:31:51,680 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-03 03:31:51,681 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-03 03:31:51,682 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-03 03:31:51,683 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-03 03:31:51,683 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-03 03:31:51,683 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-03 03:31:51,686 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-03 03:31:51,686 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-03 03:31:51,688 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Bitvector.epf [2022-11-03 03:31:51,739 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-03 03:31:51,739 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-03 03:31:51,741 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-03 03:31:51,741 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-03 03:31:51,742 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-03 03:31:51,742 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-03 03:31:51,742 INFO L138 SettingsManager]: * User list type=DISABLED [2022-11-03 03:31:51,743 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-11-03 03:31:51,743 INFO L138 SettingsManager]: * Explicit value domain=true [2022-11-03 03:31:51,743 INFO L138 SettingsManager]: * Octagon Domain=false [2022-11-03 03:31:51,744 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-11-03 03:31:51,745 INFO L138 SettingsManager]: * Interval Domain=false [2022-11-03 03:31:51,746 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-03 03:31:51,746 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-03 03:31:51,747 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-03 03:31:51,747 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-03 03:31:51,747 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-03 03:31:51,747 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-11-03 03:31:51,748 INFO L138 SettingsManager]: * Use bitvectors instead of ints=true [2022-11-03 03:31:51,748 INFO L138 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2022-11-03 03:31:51,748 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-03 03:31:51,748 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-03 03:31:51,748 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-03 03:31:51,749 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-03 03:31:51,749 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-03 03:31:51,749 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-03 03:31:51,749 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 03:31:51,750 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-03 03:31:51,750 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-03 03:31:51,750 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-03 03:31:51,750 INFO L138 SettingsManager]: * Trace refinement strategy=WALRUS [2022-11-03 03:31:51,750 INFO L138 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2022-11-03 03:31:51,751 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-03 03:31:51,751 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-11-03 03:31:51,751 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-11-03 03:31:51,752 INFO L138 SettingsManager]: * Logic for external solver=AUFBV WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 9d5a40d30bdb637dd2c987738fb0d731ff79366f937c446bccf8e9f932481a19 [2022-11-03 03:31:52,121 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-03 03:31:52,150 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-03 03:31:52,156 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-03 03:31:52,157 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-03 03:31:52,157 INFO L275 PluginConnector]: CDTParser initialized [2022-11-03 03:31:52,159 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.eq_sdp_v3.c [2022-11-03 03:31:52,231 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/data/a724c8e86/0bcc6f7b9b834ba59173b339467eef98/FLAGa12310cee [2022-11-03 03:31:52,803 INFO L306 CDTParser]: Found 1 translation units. [2022-11-03 03:31:52,804 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.eq_sdp_v3.c [2022-11-03 03:31:52,814 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/data/a724c8e86/0bcc6f7b9b834ba59173b339467eef98/FLAGa12310cee [2022-11-03 03:31:53,136 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/data/a724c8e86/0bcc6f7b9b834ba59173b339467eef98 [2022-11-03 03:31:53,140 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-03 03:31:53,143 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-03 03:31:53,144 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-03 03:31:53,145 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-03 03:31:53,150 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-03 03:31:53,151 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 03:31:53" (1/1) ... [2022-11-03 03:31:53,153 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6972f2ac and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:53, skipping insertion in model container [2022-11-03 03:31:53,154 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 03:31:53" (1/1) ... [2022-11-03 03:31:53,164 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-03 03:31:53,217 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-03 03:31:53,353 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.eq_sdp_v3.c[1107,1120] [2022-11-03 03:31:53,486 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 03:31:53,490 INFO L203 MainTranslator]: Completed pre-run [2022-11-03 03:31:53,500 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.eq_sdp_v3.c[1107,1120] [2022-11-03 03:31:53,542 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 03:31:53,559 INFO L208 MainTranslator]: Completed translation [2022-11-03 03:31:53,560 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:53 WrapperNode [2022-11-03 03:31:53,560 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-03 03:31:53,561 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-03 03:31:53,561 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-03 03:31:53,562 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-03 03:31:53,580 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:53" (1/1) ... [2022-11-03 03:31:53,590 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:53" (1/1) ... [2022-11-03 03:31:53,632 INFO L138 Inliner]: procedures = 11, calls = 3, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 291 [2022-11-03 03:31:53,633 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-03 03:31:53,633 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-03 03:31:53,634 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-03 03:31:53,634 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-03 03:31:53,645 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:53" (1/1) ... [2022-11-03 03:31:53,645 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:53" (1/1) ... [2022-11-03 03:31:53,650 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:53" (1/1) ... [2022-11-03 03:31:53,650 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:53" (1/1) ... [2022-11-03 03:31:53,658 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:53" (1/1) ... [2022-11-03 03:31:53,664 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:53" (1/1) ... [2022-11-03 03:31:53,666 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:53" (1/1) ... [2022-11-03 03:31:53,668 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:53" (1/1) ... [2022-11-03 03:31:53,672 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-03 03:31:53,681 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-03 03:31:53,682 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-03 03:31:53,682 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-03 03:31:53,683 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:53" (1/1) ... [2022-11-03 03:31:53,691 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 03:31:53,711 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:31:53,725 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-03 03:31:53,754 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-03 03:31:53,779 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-03 03:31:53,779 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-03 03:31:53,908 INFO L235 CfgBuilder]: Building ICFG [2022-11-03 03:31:53,924 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-03 03:31:54,517 INFO L276 CfgBuilder]: Performing block encoding [2022-11-03 03:31:54,525 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-03 03:31:54,528 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-03 03:31:54,530 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 03:31:54 BoogieIcfgContainer [2022-11-03 03:31:54,531 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-03 03:31:54,533 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-03 03:31:54,534 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-03 03:31:54,538 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-03 03:31:54,538 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 03.11 03:31:53" (1/3) ... [2022-11-03 03:31:54,539 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@22a30a03 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 03:31:54, skipping insertion in model container [2022-11-03 03:31:54,539 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:53" (2/3) ... [2022-11-03 03:31:54,540 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@22a30a03 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 03:31:54, skipping insertion in model container [2022-11-03 03:31:54,540 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 03:31:54" (3/3) ... [2022-11-03 03:31:54,541 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.eq_sdp_v3.c [2022-11-03 03:31:54,565 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-03 03:31:54,566 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-03 03:31:54,650 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-03 03:31:54,671 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@439a20dd, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-03 03:31:54,671 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-03 03:31:54,679 INFO L276 IsEmpty]: Start isEmpty. Operand has 43 states, 41 states have (on average 1.4878048780487805) internal successors, (61), 42 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:31:54,696 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2022-11-03 03:31:54,697 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:31:54,698 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2022-11-03 03:31:54,699 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:31:54,706 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:31:54,706 INFO L85 PathProgramCache]: Analyzing trace with hash 28698761, now seen corresponding path program 1 times [2022-11-03 03:31:54,721 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:31:54,721 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [2019780268] [2022-11-03 03:31:54,722 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:31:54,722 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:31:54,723 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:31:54,730 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:31:54,760 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (2)] Waiting until timeout for monitored process [2022-11-03 03:31:54,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:31:54,905 INFO L263 TraceCheckSpWp]: Trace formula consists of 54 conjuncts, 17 conjunts are in the unsatisfiable core [2022-11-03 03:31:54,914 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:31:55,151 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:31:55,151 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:31:55,152 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:31:55,153 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [2019780268] [2022-11-03 03:31:55,153 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [2019780268] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:31:55,154 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:31:55,154 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-03 03:31:55,156 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2028075988] [2022-11-03 03:31:55,157 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:31:55,164 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 03:31:55,164 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:31:55,202 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 03:31:55,203 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 03:31:55,206 INFO L87 Difference]: Start difference. First operand has 43 states, 41 states have (on average 1.4878048780487805) internal successors, (61), 42 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:31:55,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:31:55,316 INFO L93 Difference]: Finished difference Result 116 states and 174 transitions. [2022-11-03 03:31:55,318 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-03 03:31:55,319 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 5 [2022-11-03 03:31:55,320 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:31:55,335 INFO L225 Difference]: With dead ends: 116 [2022-11-03 03:31:55,335 INFO L226 Difference]: Without dead ends: 75 [2022-11-03 03:31:55,338 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-03 03:31:55,350 INFO L413 NwaCegarLoop]: 53 mSDtfsCounter, 100 mSDsluCounter, 103 mSDsCounter, 0 mSdLazyCounter, 9 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 100 SdHoareTripleChecker+Valid, 156 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 9 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 03:31:55,352 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [100 Valid, 156 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 9 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-03 03:31:55,376 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75 states. [2022-11-03 03:31:55,402 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75 to 41. [2022-11-03 03:31:55,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 40 states have (on average 1.425) internal successors, (57), 40 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:31:55,407 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 57 transitions. [2022-11-03 03:31:55,409 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 57 transitions. Word has length 5 [2022-11-03 03:31:55,409 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:31:55,409 INFO L495 AbstractCegarLoop]: Abstraction has 41 states and 57 transitions. [2022-11-03 03:31:55,410 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:31:55,410 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 57 transitions. [2022-11-03 03:31:55,411 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2022-11-03 03:31:55,412 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:31:55,412 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:31:55,442 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (2)] Forceful destruction successful, exit code 0 [2022-11-03 03:31:55,636 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:31:55,637 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:31:55,637 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:31:55,637 INFO L85 PathProgramCache]: Analyzing trace with hash 547600807, now seen corresponding path program 1 times [2022-11-03 03:31:55,640 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:31:55,641 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [53927343] [2022-11-03 03:31:55,641 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:31:55,641 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:31:55,641 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:31:55,644 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:31:55,646 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (3)] Waiting until timeout for monitored process [2022-11-03 03:31:55,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:31:55,798 INFO L263 TraceCheckSpWp]: Trace formula consists of 225 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:31:55,803 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:31:56,118 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:31:56,119 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:31:56,119 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:31:56,120 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [53927343] [2022-11-03 03:31:56,120 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [53927343] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:31:56,121 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:31:56,121 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-11-03 03:31:56,124 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [329994645] [2022-11-03 03:31:56,125 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:31:56,127 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-03 03:31:56,128 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:31:56,129 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-03 03:31:56,129 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-11-03 03:31:56,130 INFO L87 Difference]: Start difference. First operand 41 states and 57 transitions. Second operand has 8 states, 8 states have (on average 5.0) internal successors, (40), 8 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:31:56,324 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:31:56,324 INFO L93 Difference]: Finished difference Result 132 states and 188 transitions. [2022-11-03 03:31:56,325 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-03 03:31:56,325 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 5.0) internal successors, (40), 8 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 40 [2022-11-03 03:31:56,327 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:31:56,329 INFO L225 Difference]: With dead ends: 132 [2022-11-03 03:31:56,329 INFO L226 Difference]: Without dead ends: 95 [2022-11-03 03:31:56,331 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 33 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2022-11-03 03:31:56,333 INFO L413 NwaCegarLoop]: 66 mSDtfsCounter, 179 mSDsluCounter, 267 mSDsCounter, 0 mSdLazyCounter, 62 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 179 SdHoareTripleChecker+Valid, 333 SdHoareTripleChecker+Invalid, 85 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 62 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 21 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:31:56,336 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [179 Valid, 333 Invalid, 85 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 62 Invalid, 0 Unknown, 21 Unchecked, 0.1s Time] [2022-11-03 03:31:56,340 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states. [2022-11-03 03:31:56,347 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 59. [2022-11-03 03:31:56,347 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 59 states, 58 states have (on average 1.4310344827586208) internal successors, (83), 58 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:31:56,348 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 83 transitions. [2022-11-03 03:31:56,348 INFO L78 Accepts]: Start accepts. Automaton has 59 states and 83 transitions. Word has length 40 [2022-11-03 03:31:56,349 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:31:56,349 INFO L495 AbstractCegarLoop]: Abstraction has 59 states and 83 transitions. [2022-11-03 03:31:56,349 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 5.0) internal successors, (40), 8 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:31:56,350 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 83 transitions. [2022-11-03 03:31:56,350 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2022-11-03 03:31:56,351 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:31:56,351 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:31:56,362 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (3)] Forceful destruction successful, exit code 0 [2022-11-03 03:31:56,556 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:31:56,557 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:31:56,557 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:31:56,557 INFO L85 PathProgramCache]: Analyzing trace with hash -2058422747, now seen corresponding path program 1 times [2022-11-03 03:31:56,558 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:31:56,558 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1879109436] [2022-11-03 03:31:56,558 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:31:56,558 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:31:56,559 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:31:56,560 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:31:56,594 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (4)] Waiting until timeout for monitored process [2022-11-03 03:31:56,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:31:56,709 INFO L263 TraceCheckSpWp]: Trace formula consists of 225 conjuncts, 23 conjunts are in the unsatisfiable core [2022-11-03 03:31:56,713 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:31:57,169 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:31:57,169 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:31:58,241 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:31:58,241 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:31:58,242 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1879109436] [2022-11-03 03:31:58,242 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1879109436] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:31:58,242 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [568449643] [2022-11-03 03:31:58,242 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:31:58,243 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 03:31:58,243 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 03:31:58,252 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 03:31:58,278 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (5)] Waiting until timeout for monitored process [2022-11-03 03:31:58,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:31:58,494 INFO L263 TraceCheckSpWp]: Trace formula consists of 225 conjuncts, 23 conjunts are in the unsatisfiable core [2022-11-03 03:31:58,497 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:31:58,826 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:31:58,827 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:31:59,247 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:31:59,247 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [568449643] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:31:59,247 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [488541114] [2022-11-03 03:31:59,248 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:31:59,248 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:31:59,248 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:31:59,254 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:31:59,274 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-11-03 03:31:59,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:31:59,393 INFO L263 TraceCheckSpWp]: Trace formula consists of 225 conjuncts, 26 conjunts are in the unsatisfiable core [2022-11-03 03:31:59,405 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:31:59,717 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:31:59,717 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:32:00,209 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:00,210 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [488541114] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:32:00,210 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 03:32:00,210 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 12, 12] total 22 [2022-11-03 03:32:00,211 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1556205487] [2022-11-03 03:32:00,211 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 03:32:00,212 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-11-03 03:32:00,212 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:32:00,213 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-11-03 03:32:00,213 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=86, Invalid=376, Unknown=0, NotChecked=0, Total=462 [2022-11-03 03:32:00,213 INFO L87 Difference]: Start difference. First operand 59 states and 83 transitions. Second operand has 22 states, 22 states have (on average 3.727272727272727) internal successors, (82), 22 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:01,895 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:32:01,895 INFO L93 Difference]: Finished difference Result 295 states and 428 transitions. [2022-11-03 03:32:01,896 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2022-11-03 03:32:01,896 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 3.727272727272727) internal successors, (82), 22 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 40 [2022-11-03 03:32:01,896 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:32:01,898 INFO L225 Difference]: With dead ends: 295 [2022-11-03 03:32:01,898 INFO L226 Difference]: Without dead ends: 293 [2022-11-03 03:32:01,899 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 260 GetRequests, 216 SyntacticMatches, 2 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 393 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=360, Invalid=1532, Unknown=0, NotChecked=0, Total=1892 [2022-11-03 03:32:01,900 INFO L413 NwaCegarLoop]: 45 mSDtfsCounter, 1076 mSDsluCounter, 1862 mSDsCounter, 0 mSdLazyCounter, 114 mSolverCounterSat, 17 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1076 SdHoareTripleChecker+Valid, 1907 SdHoareTripleChecker+Invalid, 713 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 17 IncrementalHoareTripleChecker+Valid, 114 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 582 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-03 03:32:01,900 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1076 Valid, 1907 Invalid, 713 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [17 Valid, 114 Invalid, 0 Unknown, 582 Unchecked, 0.2s Time] [2022-11-03 03:32:01,901 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 293 states. [2022-11-03 03:32:01,912 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 293 to 106. [2022-11-03 03:32:01,912 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 106 states, 105 states have (on average 1.438095238095238) internal successors, (151), 105 states have internal predecessors, (151), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:01,913 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 151 transitions. [2022-11-03 03:32:01,913 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 151 transitions. Word has length 40 [2022-11-03 03:32:01,914 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:32:01,914 INFO L495 AbstractCegarLoop]: Abstraction has 106 states and 151 transitions. [2022-11-03 03:32:01,914 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 3.727272727272727) internal successors, (82), 22 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:01,914 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 151 transitions. [2022-11-03 03:32:01,915 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2022-11-03 03:32:01,916 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:32:01,916 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:32:01,934 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (4)] Forceful destruction successful, exit code 0 [2022-11-03 03:32:02,131 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (5)] Ended with exit code 0 [2022-11-03 03:32:02,351 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-11-03 03:32:02,529 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:32:02,529 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:32:02,530 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:32:02,530 INFO L85 PathProgramCache]: Analyzing trace with hash -1356822873, now seen corresponding path program 1 times [2022-11-03 03:32:02,531 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:32:02,531 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [2083166996] [2022-11-03 03:32:02,531 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:02,531 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:32:02,531 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:32:02,532 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:32:02,546 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (7)] Waiting until timeout for monitored process [2022-11-03 03:32:02,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:02,680 INFO L263 TraceCheckSpWp]: Trace formula consists of 225 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:32:02,682 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:02,823 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:02,823 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:32:02,824 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:32:02,824 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [2083166996] [2022-11-03 03:32:02,824 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [2083166996] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:32:02,824 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:32:02,825 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-11-03 03:32:02,825 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [422796147] [2022-11-03 03:32:02,825 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:32:02,825 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-03 03:32:02,826 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:32:02,826 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-03 03:32:02,826 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-11-03 03:32:02,827 INFO L87 Difference]: Start difference. First operand 106 states and 151 transitions. Second operand has 8 states, 8 states have (on average 5.0) internal successors, (40), 8 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:02,960 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:32:02,960 INFO L93 Difference]: Finished difference Result 168 states and 239 transitions. [2022-11-03 03:32:02,961 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-03 03:32:02,961 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 5.0) internal successors, (40), 8 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 40 [2022-11-03 03:32:02,962 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:32:02,964 INFO L225 Difference]: With dead ends: 168 [2022-11-03 03:32:02,964 INFO L226 Difference]: Without dead ends: 119 [2022-11-03 03:32:02,964 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 33 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2022-11-03 03:32:02,965 INFO L413 NwaCegarLoop]: 48 mSDtfsCounter, 183 mSDsluCounter, 222 mSDsCounter, 0 mSdLazyCounter, 50 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 183 SdHoareTripleChecker+Valid, 270 SdHoareTripleChecker+Invalid, 73 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 50 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 21 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:32:02,966 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [183 Valid, 270 Invalid, 73 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 50 Invalid, 0 Unknown, 21 Unchecked, 0.1s Time] [2022-11-03 03:32:02,967 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states. [2022-11-03 03:32:02,974 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 94. [2022-11-03 03:32:02,975 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 94 states, 93 states have (on average 1.4301075268817205) internal successors, (133), 93 states have internal predecessors, (133), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:02,976 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 133 transitions. [2022-11-03 03:32:02,977 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 133 transitions. Word has length 40 [2022-11-03 03:32:02,977 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:32:02,977 INFO L495 AbstractCegarLoop]: Abstraction has 94 states and 133 transitions. [2022-11-03 03:32:02,977 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 5.0) internal successors, (40), 8 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:02,978 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 133 transitions. [2022-11-03 03:32:02,979 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2022-11-03 03:32:02,979 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:32:02,979 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:32:03,002 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (7)] Forceful destruction successful, exit code 0 [2022-11-03 03:32:03,199 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:32:03,200 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:32:03,200 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:32:03,200 INFO L85 PathProgramCache]: Analyzing trace with hash -296404695, now seen corresponding path program 1 times [2022-11-03 03:32:03,201 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:32:03,201 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1396107800] [2022-11-03 03:32:03,201 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:03,201 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:32:03,201 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:32:03,203 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:32:03,206 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (8)] Waiting until timeout for monitored process [2022-11-03 03:32:03,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:03,347 INFO L263 TraceCheckSpWp]: Trace formula consists of 225 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:32:03,349 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:03,493 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:03,493 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:32:03,494 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:32:03,494 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1396107800] [2022-11-03 03:32:03,494 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1396107800] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:32:03,494 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:32:03,495 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-11-03 03:32:03,495 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2054323731] [2022-11-03 03:32:03,495 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:32:03,495 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-03 03:32:03,496 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:32:03,496 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-03 03:32:03,497 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-11-03 03:32:03,497 INFO L87 Difference]: Start difference. First operand 94 states and 133 transitions. Second operand has 8 states, 8 states have (on average 5.0) internal successors, (40), 8 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:03,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:32:03,597 INFO L93 Difference]: Finished difference Result 199 states and 282 transitions. [2022-11-03 03:32:03,598 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-03 03:32:03,598 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 5.0) internal successors, (40), 8 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 40 [2022-11-03 03:32:03,598 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:32:03,599 INFO L225 Difference]: With dead ends: 199 [2022-11-03 03:32:03,599 INFO L226 Difference]: Without dead ends: 162 [2022-11-03 03:32:03,600 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 33 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2022-11-03 03:32:03,600 INFO L413 NwaCegarLoop]: 85 mSDtfsCounter, 138 mSDsluCounter, 384 mSDsCounter, 0 mSdLazyCounter, 50 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 138 SdHoareTripleChecker+Valid, 469 SdHoareTripleChecker+Invalid, 71 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 50 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 20 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:32:03,601 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [138 Valid, 469 Invalid, 71 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 50 Invalid, 0 Unknown, 20 Unchecked, 0.1s Time] [2022-11-03 03:32:03,601 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162 states. [2022-11-03 03:32:03,611 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162 to 98. [2022-11-03 03:32:03,611 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 98 states, 97 states have (on average 1.422680412371134) internal successors, (138), 97 states have internal predecessors, (138), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:03,612 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 138 transitions. [2022-11-03 03:32:03,613 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 138 transitions. Word has length 40 [2022-11-03 03:32:03,613 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:32:03,613 INFO L495 AbstractCegarLoop]: Abstraction has 98 states and 138 transitions. [2022-11-03 03:32:03,613 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 5.0) internal successors, (40), 8 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:03,614 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 138 transitions. [2022-11-03 03:32:03,614 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2022-11-03 03:32:03,615 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:32:03,615 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:32:03,639 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (8)] Forceful destruction successful, exit code 0 [2022-11-03 03:32:03,828 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:32:03,828 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:32:03,829 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:32:03,829 INFO L85 PathProgramCache]: Analyzing trace with hash 405195179, now seen corresponding path program 1 times [2022-11-03 03:32:03,829 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:32:03,829 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1848242741] [2022-11-03 03:32:03,829 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:03,830 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:32:03,830 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:32:03,832 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:32:03,834 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (9)] Waiting until timeout for monitored process [2022-11-03 03:32:03,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:03,990 INFO L263 TraceCheckSpWp]: Trace formula consists of 225 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:32:03,992 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:04,125 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:04,126 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:32:04,126 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:32:04,126 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1848242741] [2022-11-03 03:32:04,135 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1848242741] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:32:04,135 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:32:04,135 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-11-03 03:32:04,136 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1353724708] [2022-11-03 03:32:04,136 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:32:04,136 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-03 03:32:04,136 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:32:04,137 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-03 03:32:04,137 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-11-03 03:32:04,137 INFO L87 Difference]: Start difference. First operand 98 states and 138 transitions. Second operand has 8 states, 8 states have (on average 5.0) internal successors, (40), 8 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:04,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:32:04,243 INFO L93 Difference]: Finished difference Result 235 states and 332 transitions. [2022-11-03 03:32:04,244 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-03 03:32:04,244 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 5.0) internal successors, (40), 8 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 40 [2022-11-03 03:32:04,244 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:32:04,245 INFO L225 Difference]: With dead ends: 235 [2022-11-03 03:32:04,245 INFO L226 Difference]: Without dead ends: 198 [2022-11-03 03:32:04,246 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 33 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2022-11-03 03:32:04,247 INFO L413 NwaCegarLoop]: 122 mSDtfsCounter, 90 mSDsluCounter, 475 mSDsCounter, 0 mSdLazyCounter, 52 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 90 SdHoareTripleChecker+Valid, 597 SdHoareTripleChecker+Invalid, 80 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 52 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 27 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:32:04,247 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [90 Valid, 597 Invalid, 80 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 52 Invalid, 0 Unknown, 27 Unchecked, 0.1s Time] [2022-11-03 03:32:04,248 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 198 states. [2022-11-03 03:32:04,254 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 198 to 100. [2022-11-03 03:32:04,255 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 100 states, 99 states have (on average 1.4141414141414141) internal successors, (140), 99 states have internal predecessors, (140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:04,256 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 140 transitions. [2022-11-03 03:32:04,256 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 140 transitions. Word has length 40 [2022-11-03 03:32:04,256 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:32:04,256 INFO L495 AbstractCegarLoop]: Abstraction has 100 states and 140 transitions. [2022-11-03 03:32:04,257 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 5.0) internal successors, (40), 8 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:04,257 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 140 transitions. [2022-11-03 03:32:04,258 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2022-11-03 03:32:04,258 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:32:04,258 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:32:04,278 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (9)] Forceful destruction successful, exit code 0 [2022-11-03 03:32:04,471 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:32:04,472 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:32:04,472 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:32:04,472 INFO L85 PathProgramCache]: Analyzing trace with hash 1791398573, now seen corresponding path program 1 times [2022-11-03 03:32:04,472 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:32:04,473 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1048842745] [2022-11-03 03:32:04,473 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:04,473 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:32:04,473 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:32:04,474 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:32:04,502 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (10)] Waiting until timeout for monitored process [2022-11-03 03:32:04,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:04,611 INFO L263 TraceCheckSpWp]: Trace formula consists of 225 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:32:04,613 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:04,754 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:04,754 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:32:04,754 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:32:04,755 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1048842745] [2022-11-03 03:32:04,755 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1048842745] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:32:04,755 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:32:04,755 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-11-03 03:32:04,755 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [776419406] [2022-11-03 03:32:04,756 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:32:04,756 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-03 03:32:04,756 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:32:04,757 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-03 03:32:04,757 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-11-03 03:32:04,757 INFO L87 Difference]: Start difference. First operand 100 states and 140 transitions. Second operand has 8 states, 8 states have (on average 5.0) internal successors, (40), 8 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:04,865 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:32:04,865 INFO L93 Difference]: Finished difference Result 229 states and 322 transitions. [2022-11-03 03:32:04,866 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-03 03:32:04,866 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 5.0) internal successors, (40), 8 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 40 [2022-11-03 03:32:04,866 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:32:04,867 INFO L225 Difference]: With dead ends: 229 [2022-11-03 03:32:04,867 INFO L226 Difference]: Without dead ends: 192 [2022-11-03 03:32:04,868 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 33 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2022-11-03 03:32:04,868 INFO L413 NwaCegarLoop]: 118 mSDtfsCounter, 84 mSDsluCounter, 349 mSDsCounter, 0 mSdLazyCounter, 52 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 84 SdHoareTripleChecker+Valid, 467 SdHoareTripleChecker+Invalid, 72 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 52 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 19 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:32:04,869 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [84 Valid, 467 Invalid, 72 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 52 Invalid, 0 Unknown, 19 Unchecked, 0.1s Time] [2022-11-03 03:32:04,869 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 192 states. [2022-11-03 03:32:04,875 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 192 to 102. [2022-11-03 03:32:04,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 102 states, 101 states have (on average 1.4059405940594059) internal successors, (142), 101 states have internal predecessors, (142), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:04,876 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 142 transitions. [2022-11-03 03:32:04,876 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 142 transitions. Word has length 40 [2022-11-03 03:32:04,877 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:32:04,877 INFO L495 AbstractCegarLoop]: Abstraction has 102 states and 142 transitions. [2022-11-03 03:32:04,877 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 5.0) internal successors, (40), 8 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:04,877 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 142 transitions. [2022-11-03 03:32:04,878 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2022-11-03 03:32:04,878 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:32:04,878 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:32:04,896 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (10)] Forceful destruction successful, exit code 0 [2022-11-03 03:32:05,091 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:32:05,091 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:32:05,092 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:32:05,092 INFO L85 PathProgramCache]: Analyzing trace with hash -580340689, now seen corresponding path program 1 times [2022-11-03 03:32:05,092 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:32:05,093 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [179468681] [2022-11-03 03:32:05,093 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:05,093 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:32:05,093 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:32:05,094 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:32:05,105 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (11)] Waiting until timeout for monitored process [2022-11-03 03:32:05,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:05,234 INFO L263 TraceCheckSpWp]: Trace formula consists of 225 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:32:05,236 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:05,383 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:05,384 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:32:05,384 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:32:05,384 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [179468681] [2022-11-03 03:32:05,384 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [179468681] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:32:05,384 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:32:05,385 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-11-03 03:32:05,385 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1857106514] [2022-11-03 03:32:05,385 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:32:05,386 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-03 03:32:05,386 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:32:05,386 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-03 03:32:05,387 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-11-03 03:32:05,387 INFO L87 Difference]: Start difference. First operand 102 states and 142 transitions. Second operand has 8 states, 8 states have (on average 5.0) internal successors, (40), 8 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:05,490 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:32:05,490 INFO L93 Difference]: Finished difference Result 223 states and 312 transitions. [2022-11-03 03:32:05,491 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-03 03:32:05,491 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 5.0) internal successors, (40), 8 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 40 [2022-11-03 03:32:05,491 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:32:05,492 INFO L225 Difference]: With dead ends: 223 [2022-11-03 03:32:05,492 INFO L226 Difference]: Without dead ends: 186 [2022-11-03 03:32:05,496 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 33 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2022-11-03 03:32:05,497 INFO L413 NwaCegarLoop]: 114 mSDtfsCounter, 78 mSDsluCounter, 340 mSDsCounter, 0 mSdLazyCounter, 52 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 78 SdHoareTripleChecker+Valid, 454 SdHoareTripleChecker+Invalid, 74 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 52 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 21 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:32:05,497 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [78 Valid, 454 Invalid, 74 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 52 Invalid, 0 Unknown, 21 Unchecked, 0.1s Time] [2022-11-03 03:32:05,498 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states. [2022-11-03 03:32:05,511 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 104. [2022-11-03 03:32:05,512 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 104 states, 103 states have (on average 1.3980582524271845) internal successors, (144), 103 states have internal predecessors, (144), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:05,514 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 144 transitions. [2022-11-03 03:32:05,515 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 144 transitions. Word has length 40 [2022-11-03 03:32:05,515 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:32:05,515 INFO L495 AbstractCegarLoop]: Abstraction has 104 states and 144 transitions. [2022-11-03 03:32:05,515 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 5.0) internal successors, (40), 8 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:05,516 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 144 transitions. [2022-11-03 03:32:05,520 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2022-11-03 03:32:05,521 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:32:05,521 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:32:05,541 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (11)] Forceful destruction successful, exit code 0 [2022-11-03 03:32:05,734 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:32:05,734 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:32:05,735 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:32:05,735 INFO L85 PathProgramCache]: Analyzing trace with hash -439792079, now seen corresponding path program 1 times [2022-11-03 03:32:05,735 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:32:05,735 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1809311199] [2022-11-03 03:32:05,735 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:05,735 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:32:05,736 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:32:05,736 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:32:05,739 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (12)] Waiting until timeout for monitored process [2022-11-03 03:32:05,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:05,856 INFO L263 TraceCheckSpWp]: Trace formula consists of 225 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:32:05,858 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:06,039 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:06,040 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:32:06,040 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:32:06,040 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1809311199] [2022-11-03 03:32:06,040 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1809311199] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:32:06,041 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:32:06,041 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-11-03 03:32:06,041 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1013079435] [2022-11-03 03:32:06,043 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:32:06,044 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-03 03:32:06,044 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:32:06,045 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-03 03:32:06,045 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-11-03 03:32:06,046 INFO L87 Difference]: Start difference. First operand 104 states and 144 transitions. Second operand has 8 states, 8 states have (on average 5.0) internal successors, (40), 8 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:06,181 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:32:06,181 INFO L93 Difference]: Finished difference Result 217 states and 302 transitions. [2022-11-03 03:32:06,182 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-03 03:32:06,182 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 5.0) internal successors, (40), 8 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 40 [2022-11-03 03:32:06,182 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:32:06,183 INFO L225 Difference]: With dead ends: 217 [2022-11-03 03:32:06,183 INFO L226 Difference]: Without dead ends: 180 [2022-11-03 03:32:06,184 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 33 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=28, Invalid=82, Unknown=0, NotChecked=0, Total=110 [2022-11-03 03:32:06,185 INFO L413 NwaCegarLoop]: 110 mSDtfsCounter, 75 mSDsluCounter, 537 mSDsCounter, 0 mSdLazyCounter, 49 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 75 SdHoareTripleChecker+Valid, 647 SdHoareTripleChecker+Invalid, 98 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 49 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 48 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:32:06,185 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [75 Valid, 647 Invalid, 98 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 49 Invalid, 0 Unknown, 48 Unchecked, 0.1s Time] [2022-11-03 03:32:06,186 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2022-11-03 03:32:06,191 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 106. [2022-11-03 03:32:06,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 106 states, 105 states have (on average 1.3904761904761904) internal successors, (146), 105 states have internal predecessors, (146), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:06,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 146 transitions. [2022-11-03 03:32:06,193 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 146 transitions. Word has length 40 [2022-11-03 03:32:06,193 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:32:06,193 INFO L495 AbstractCegarLoop]: Abstraction has 106 states and 146 transitions. [2022-11-03 03:32:06,194 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 5.0) internal successors, (40), 8 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:06,194 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 146 transitions. [2022-11-03 03:32:06,194 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2022-11-03 03:32:06,195 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:32:06,195 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:32:06,213 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (12)] Forceful destruction successful, exit code 0 [2022-11-03 03:32:06,408 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:32:06,408 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:32:06,408 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:32:06,408 INFO L85 PathProgramCache]: Analyzing trace with hash 2049736883, now seen corresponding path program 1 times [2022-11-03 03:32:06,409 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:32:06,409 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [216414105] [2022-11-03 03:32:06,409 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:06,409 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:32:06,409 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:32:06,410 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:32:06,411 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (13)] Waiting until timeout for monitored process [2022-11-03 03:32:06,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:06,558 INFO L263 TraceCheckSpWp]: Trace formula consists of 225 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:32:06,561 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:06,714 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:06,714 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:32:06,714 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:32:06,714 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [216414105] [2022-11-03 03:32:06,714 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [216414105] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:32:06,714 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:32:06,715 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-11-03 03:32:06,715 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1307455319] [2022-11-03 03:32:06,715 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:32:06,715 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-03 03:32:06,715 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:32:06,716 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-03 03:32:06,716 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-11-03 03:32:06,716 INFO L87 Difference]: Start difference. First operand 106 states and 146 transitions. Second operand has 8 states, 8 states have (on average 5.0) internal successors, (40), 8 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:06,823 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:32:06,824 INFO L93 Difference]: Finished difference Result 211 states and 292 transitions. [2022-11-03 03:32:06,824 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-03 03:32:06,825 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 5.0) internal successors, (40), 8 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 40 [2022-11-03 03:32:06,825 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:32:06,825 INFO L225 Difference]: With dead ends: 211 [2022-11-03 03:32:06,826 INFO L226 Difference]: Without dead ends: 174 [2022-11-03 03:32:06,826 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 33 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=28, Invalid=82, Unknown=0, NotChecked=0, Total=110 [2022-11-03 03:32:06,827 INFO L413 NwaCegarLoop]: 106 mSDtfsCounter, 69 mSDsluCounter, 520 mSDsCounter, 0 mSdLazyCounter, 49 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 69 SdHoareTripleChecker+Valid, 626 SdHoareTripleChecker+Invalid, 94 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 49 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 44 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:32:06,827 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [69 Valid, 626 Invalid, 94 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 49 Invalid, 0 Unknown, 44 Unchecked, 0.1s Time] [2022-11-03 03:32:06,827 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 174 states. [2022-11-03 03:32:06,834 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 174 to 108. [2022-11-03 03:32:06,835 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 108 states, 107 states have (on average 1.3831775700934579) internal successors, (148), 107 states have internal predecessors, (148), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:06,835 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 148 transitions. [2022-11-03 03:32:06,836 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 148 transitions. Word has length 40 [2022-11-03 03:32:06,836 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:32:06,836 INFO L495 AbstractCegarLoop]: Abstraction has 108 states and 148 transitions. [2022-11-03 03:32:06,836 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 5.0) internal successors, (40), 8 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:06,837 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 148 transitions. [2022-11-03 03:32:06,838 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2022-11-03 03:32:06,839 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:32:06,839 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:32:06,858 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (13)] Forceful destruction successful, exit code 0 [2022-11-03 03:32:07,039 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:32:07,040 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:32:07,040 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:32:07,040 INFO L85 PathProgramCache]: Analyzing trace with hash -1822528587, now seen corresponding path program 1 times [2022-11-03 03:32:07,040 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:32:07,040 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [530467857] [2022-11-03 03:32:07,041 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:07,041 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:32:07,041 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:32:07,042 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:32:07,043 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (14)] Waiting until timeout for monitored process [2022-11-03 03:32:07,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:07,168 INFO L263 TraceCheckSpWp]: Trace formula consists of 225 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:32:07,171 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:07,327 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:07,327 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:32:07,328 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:32:07,328 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [530467857] [2022-11-03 03:32:07,328 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [530467857] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:32:07,328 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:32:07,328 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-11-03 03:32:07,328 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1830821569] [2022-11-03 03:32:07,329 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:32:07,329 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-03 03:32:07,329 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:32:07,330 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-03 03:32:07,330 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-11-03 03:32:07,331 INFO L87 Difference]: Start difference. First operand 108 states and 148 transitions. Second operand has 8 states, 8 states have (on average 5.0) internal successors, (40), 8 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:07,424 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:32:07,425 INFO L93 Difference]: Finished difference Result 183 states and 253 transitions. [2022-11-03 03:32:07,425 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-03 03:32:07,425 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 5.0) internal successors, (40), 8 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 40 [2022-11-03 03:32:07,426 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:32:07,426 INFO L225 Difference]: With dead ends: 183 [2022-11-03 03:32:07,426 INFO L226 Difference]: Without dead ends: 146 [2022-11-03 03:32:07,427 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 33 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=79, Unknown=0, NotChecked=0, Total=110 [2022-11-03 03:32:07,427 INFO L413 NwaCegarLoop]: 80 mSDtfsCounter, 47 mSDsluCounter, 339 mSDsCounter, 0 mSdLazyCounter, 23 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 47 SdHoareTripleChecker+Valid, 419 SdHoareTripleChecker+Invalid, 71 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 23 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 47 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 03:32:07,428 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [47 Valid, 419 Invalid, 71 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 23 Invalid, 0 Unknown, 47 Unchecked, 0.0s Time] [2022-11-03 03:32:07,428 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2022-11-03 03:32:07,431 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 112. [2022-11-03 03:32:07,432 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 112 states, 111 states have (on average 1.3783783783783783) internal successors, (153), 111 states have internal predecessors, (153), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:07,432 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 153 transitions. [2022-11-03 03:32:07,432 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 153 transitions. Word has length 40 [2022-11-03 03:32:07,432 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:32:07,432 INFO L495 AbstractCegarLoop]: Abstraction has 112 states and 153 transitions. [2022-11-03 03:32:07,433 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 5.0) internal successors, (40), 8 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:07,433 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 153 transitions. [2022-11-03 03:32:07,433 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2022-11-03 03:32:07,433 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:32:07,433 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:32:07,450 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (14)] Forceful destruction successful, exit code 0 [2022-11-03 03:32:07,644 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:32:07,644 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:32:07,645 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:32:07,645 INFO L85 PathProgramCache]: Analyzing trace with hash 884090807, now seen corresponding path program 1 times [2022-11-03 03:32:07,645 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:32:07,645 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1280104678] [2022-11-03 03:32:07,645 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:07,645 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:32:07,646 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:32:07,647 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:32:07,656 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (15)] Waiting until timeout for monitored process [2022-11-03 03:32:07,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:07,777 INFO L263 TraceCheckSpWp]: Trace formula consists of 225 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:32:07,779 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:07,955 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:07,955 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:32:07,955 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:32:07,955 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1280104678] [2022-11-03 03:32:07,955 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1280104678] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:32:07,955 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:32:07,955 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-11-03 03:32:07,956 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1218235428] [2022-11-03 03:32:07,956 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:32:07,956 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-03 03:32:07,956 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:32:07,956 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-03 03:32:07,957 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-11-03 03:32:07,957 INFO L87 Difference]: Start difference. First operand 112 states and 153 transitions. Second operand has 8 states, 8 states have (on average 5.0) internal successors, (40), 8 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:08,048 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:32:08,048 INFO L93 Difference]: Finished difference Result 193 states and 264 transitions. [2022-11-03 03:32:08,049 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-03 03:32:08,049 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 5.0) internal successors, (40), 8 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 40 [2022-11-03 03:32:08,049 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:32:08,050 INFO L225 Difference]: With dead ends: 193 [2022-11-03 03:32:08,050 INFO L226 Difference]: Without dead ends: 156 [2022-11-03 03:32:08,050 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 33 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2022-11-03 03:32:08,051 INFO L413 NwaCegarLoop]: 93 mSDtfsCounter, 43 mSDsluCounter, 294 mSDsCounter, 0 mSdLazyCounter, 51 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 43 SdHoareTripleChecker+Valid, 387 SdHoareTripleChecker+Invalid, 72 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 51 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 20 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:32:08,051 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [43 Valid, 387 Invalid, 72 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 51 Invalid, 0 Unknown, 20 Unchecked, 0.1s Time] [2022-11-03 03:32:08,052 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2022-11-03 03:32:08,056 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 116. [2022-11-03 03:32:08,057 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 116 states, 115 states have (on average 1.373913043478261) internal successors, (158), 115 states have internal predecessors, (158), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:08,058 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 158 transitions. [2022-11-03 03:32:08,058 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 158 transitions. Word has length 40 [2022-11-03 03:32:08,058 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:32:08,058 INFO L495 AbstractCegarLoop]: Abstraction has 116 states and 158 transitions. [2022-11-03 03:32:08,059 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 5.0) internal successors, (40), 8 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:08,059 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 158 transitions. [2022-11-03 03:32:08,059 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2022-11-03 03:32:08,059 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:32:08,060 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:32:08,078 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (15)] Forceful destruction successful, exit code 0 [2022-11-03 03:32:08,273 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 15 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:32:08,273 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:32:08,273 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:32:08,273 INFO L85 PathProgramCache]: Analyzing trace with hash 297284793, now seen corresponding path program 1 times [2022-11-03 03:32:08,273 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:32:08,274 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1527536164] [2022-11-03 03:32:08,274 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:08,274 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:32:08,274 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:32:08,275 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:32:08,277 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (16)] Waiting until timeout for monitored process [2022-11-03 03:32:08,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:08,388 INFO L263 TraceCheckSpWp]: Trace formula consists of 225 conjuncts, 4 conjunts are in the unsatisfiable core [2022-11-03 03:32:08,390 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:08,461 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:08,461 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:32:08,461 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:32:08,461 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1527536164] [2022-11-03 03:32:08,462 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1527536164] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:32:08,462 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:32:08,462 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-03 03:32:08,462 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [416095260] [2022-11-03 03:32:08,462 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:32:08,463 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-03 03:32:08,463 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:32:08,463 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-03 03:32:08,463 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-03 03:32:08,464 INFO L87 Difference]: Start difference. First operand 116 states and 158 transitions. Second operand has 5 states, 5 states have (on average 8.0) internal successors, (40), 5 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:08,534 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:32:08,534 INFO L93 Difference]: Finished difference Result 286 states and 402 transitions. [2022-11-03 03:32:08,535 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-03 03:32:08,535 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 8.0) internal successors, (40), 5 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 40 [2022-11-03 03:32:08,536 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:32:08,537 INFO L225 Difference]: With dead ends: 286 [2022-11-03 03:32:08,538 INFO L226 Difference]: Without dead ends: 249 [2022-11-03 03:32:08,538 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 38 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2022-11-03 03:32:08,539 INFO L413 NwaCegarLoop]: 181 mSDtfsCounter, 131 mSDsluCounter, 188 mSDsCounter, 0 mSdLazyCounter, 31 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 131 SdHoareTripleChecker+Valid, 369 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 31 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 03:32:08,539 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [131 Valid, 369 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 31 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-03 03:32:08,542 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 249 states. [2022-11-03 03:32:08,547 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 249 to 144. [2022-11-03 03:32:08,548 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 144 states, 143 states have (on average 1.3916083916083917) internal successors, (199), 143 states have internal predecessors, (199), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:08,548 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 199 transitions. [2022-11-03 03:32:08,549 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 199 transitions. Word has length 40 [2022-11-03 03:32:08,549 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:32:08,549 INFO L495 AbstractCegarLoop]: Abstraction has 144 states and 199 transitions. [2022-11-03 03:32:08,549 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 8.0) internal successors, (40), 5 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:08,549 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 199 transitions. [2022-11-03 03:32:08,550 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2022-11-03 03:32:08,550 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:32:08,550 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:32:08,572 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (16)] Ended with exit code 0 [2022-11-03 03:32:08,772 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:32:08,772 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:32:08,772 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:32:08,772 INFO L85 PathProgramCache]: Analyzing trace with hash 2072292155, now seen corresponding path program 1 times [2022-11-03 03:32:08,772 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:32:08,773 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1395309258] [2022-11-03 03:32:08,773 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:08,773 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:32:08,773 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:32:08,774 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:32:08,787 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (17)] Waiting until timeout for monitored process [2022-11-03 03:32:08,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:08,898 INFO L263 TraceCheckSpWp]: Trace formula consists of 225 conjuncts, 4 conjunts are in the unsatisfiable core [2022-11-03 03:32:08,899 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:08,980 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:08,980 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:32:08,980 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:32:08,981 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1395309258] [2022-11-03 03:32:08,981 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1395309258] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:32:08,981 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:32:08,981 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-03 03:32:08,981 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2020382276] [2022-11-03 03:32:08,981 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:32:08,982 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-03 03:32:08,983 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:32:08,983 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-03 03:32:08,983 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-03 03:32:08,984 INFO L87 Difference]: Start difference. First operand 144 states and 199 transitions. Second operand has 5 states, 5 states have (on average 8.0) internal successors, (40), 5 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:09,045 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:32:09,045 INFO L93 Difference]: Finished difference Result 316 states and 444 transitions. [2022-11-03 03:32:09,045 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-03 03:32:09,045 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 8.0) internal successors, (40), 5 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 40 [2022-11-03 03:32:09,046 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:32:09,047 INFO L225 Difference]: With dead ends: 316 [2022-11-03 03:32:09,047 INFO L226 Difference]: Without dead ends: 251 [2022-11-03 03:32:09,047 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 38 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2022-11-03 03:32:09,048 INFO L413 NwaCegarLoop]: 181 mSDtfsCounter, 128 mSDsluCounter, 189 mSDsCounter, 0 mSdLazyCounter, 33 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 128 SdHoareTripleChecker+Valid, 370 SdHoareTripleChecker+Invalid, 34 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 33 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 03:32:09,048 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [128 Valid, 370 Invalid, 34 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 33 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-03 03:32:09,051 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 251 states. [2022-11-03 03:32:09,056 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 251 to 146. [2022-11-03 03:32:09,056 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 146 states, 145 states have (on average 1.3862068965517242) internal successors, (201), 145 states have internal predecessors, (201), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:09,057 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 201 transitions. [2022-11-03 03:32:09,057 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 201 transitions. Word has length 40 [2022-11-03 03:32:09,058 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:32:09,059 INFO L495 AbstractCegarLoop]: Abstraction has 146 states and 201 transitions. [2022-11-03 03:32:09,059 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 8.0) internal successors, (40), 5 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:09,059 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 201 transitions. [2022-11-03 03:32:09,059 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2022-11-03 03:32:09,060 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:32:09,060 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:32:09,073 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (17)] Forceful destruction successful, exit code 0 [2022-11-03 03:32:09,273 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:32:09,273 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:32:09,273 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:32:09,273 INFO L85 PathProgramCache]: Analyzing trace with hash 2074139197, now seen corresponding path program 1 times [2022-11-03 03:32:09,274 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:32:09,274 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [593474214] [2022-11-03 03:32:09,274 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:09,274 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:32:09,275 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:32:09,276 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:32:09,277 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (18)] Waiting until timeout for monitored process [2022-11-03 03:32:09,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:09,376 INFO L263 TraceCheckSpWp]: Trace formula consists of 225 conjuncts, 35 conjunts are in the unsatisfiable core [2022-11-03 03:32:09,378 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:09,864 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:09,864 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:32:11,071 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:11,071 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:32:11,072 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [593474214] [2022-11-03 03:32:11,072 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [593474214] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:32:11,072 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [209279247] [2022-11-03 03:32:11,072 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:11,072 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 03:32:11,073 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 03:32:11,074 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 03:32:11,102 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (19)] Waiting until timeout for monitored process [2022-11-03 03:32:11,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:11,291 INFO L263 TraceCheckSpWp]: Trace formula consists of 225 conjuncts, 35 conjunts are in the unsatisfiable core [2022-11-03 03:32:11,293 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:11,614 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:11,615 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:32:12,038 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:12,039 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [209279247] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:32:12,039 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2142184730] [2022-11-03 03:32:12,039 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:12,039 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:32:12,039 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:32:12,040 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:32:12,048 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2022-11-03 03:32:12,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:12,161 INFO L263 TraceCheckSpWp]: Trace formula consists of 225 conjuncts, 38 conjunts are in the unsatisfiable core [2022-11-03 03:32:12,164 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:12,508 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:12,509 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:32:13,066 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:13,066 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2142184730] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:32:13,066 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 03:32:13,067 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 13, 13] total 24 [2022-11-03 03:32:13,070 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1247356979] [2022-11-03 03:32:13,070 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 03:32:13,072 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2022-11-03 03:32:13,072 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:32:13,072 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-11-03 03:32:13,073 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=492, Unknown=0, NotChecked=0, Total=552 [2022-11-03 03:32:13,073 INFO L87 Difference]: Start difference. First operand 146 states and 201 transitions. Second operand has 24 states, 24 states have (on average 3.4166666666666665) internal successors, (82), 24 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:14,026 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:32:14,026 INFO L93 Difference]: Finished difference Result 276 states and 374 transitions. [2022-11-03 03:32:14,027 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-11-03 03:32:14,027 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 3.4166666666666665) internal successors, (82), 24 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 40 [2022-11-03 03:32:14,027 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:32:14,029 INFO L225 Difference]: With dead ends: 276 [2022-11-03 03:32:14,029 INFO L226 Difference]: Without dead ends: 274 [2022-11-03 03:32:14,030 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 247 GetRequests, 210 SyntacticMatches, 2 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 157 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=259, Invalid=1073, Unknown=0, NotChecked=0, Total=1332 [2022-11-03 03:32:14,030 INFO L413 NwaCegarLoop]: 81 mSDtfsCounter, 436 mSDsluCounter, 1419 mSDsCounter, 0 mSdLazyCounter, 165 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 436 SdHoareTripleChecker+Valid, 1500 SdHoareTripleChecker+Invalid, 371 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 165 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 195 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-03 03:32:14,031 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [436 Valid, 1500 Invalid, 371 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 165 Invalid, 0 Unknown, 195 Unchecked, 0.2s Time] [2022-11-03 03:32:14,032 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 274 states. [2022-11-03 03:32:14,038 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 274 to 177. [2022-11-03 03:32:14,039 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 177 states, 176 states have (on average 1.3409090909090908) internal successors, (236), 176 states have internal predecessors, (236), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:14,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 236 transitions. [2022-11-03 03:32:14,040 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 236 transitions. Word has length 40 [2022-11-03 03:32:14,040 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:32:14,040 INFO L495 AbstractCegarLoop]: Abstraction has 177 states and 236 transitions. [2022-11-03 03:32:14,040 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 3.4166666666666665) internal successors, (82), 24 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:14,041 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 236 transitions. [2022-11-03 03:32:14,041 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2022-11-03 03:32:14,041 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:32:14,042 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:32:14,063 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (18)] Forceful destruction successful, exit code 0 [2022-11-03 03:32:14,259 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (19)] Ended with exit code 0 [2022-11-03 03:32:14,479 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Forceful destruction successful, exit code 0 [2022-11-03 03:32:14,657 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 18 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,19 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,20 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:32:14,657 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:32:14,657 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:32:14,658 INFO L85 PathProgramCache]: Analyzing trace with hash 2146525755, now seen corresponding path program 1 times [2022-11-03 03:32:14,658 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:32:14,658 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [494809587] [2022-11-03 03:32:14,658 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:14,658 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:32:14,658 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:32:14,659 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:32:14,664 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (21)] Waiting until timeout for monitored process [2022-11-03 03:32:14,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:14,775 INFO L263 TraceCheckSpWp]: Trace formula consists of 225 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-03 03:32:14,776 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:14,795 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:14,795 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:32:14,796 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:32:14,796 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [494809587] [2022-11-03 03:32:14,796 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [494809587] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:32:14,796 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:32:14,796 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-03 03:32:14,797 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1254687570] [2022-11-03 03:32:14,797 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:32:14,797 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 03:32:14,797 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:32:14,798 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 03:32:14,798 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 03:32:14,798 INFO L87 Difference]: Start difference. First operand 177 states and 236 transitions. Second operand has 4 states, 4 states have (on average 10.0) internal successors, (40), 4 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:14,830 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:32:14,830 INFO L93 Difference]: Finished difference Result 407 states and 565 transitions. [2022-11-03 03:32:14,831 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-03 03:32:14,831 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 10.0) internal successors, (40), 4 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 40 [2022-11-03 03:32:14,831 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:32:14,832 INFO L225 Difference]: With dead ends: 407 [2022-11-03 03:32:14,833 INFO L226 Difference]: Without dead ends: 271 [2022-11-03 03:32:14,833 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-03 03:32:14,834 INFO L413 NwaCegarLoop]: 59 mSDtfsCounter, 139 mSDsluCounter, 103 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 139 SdHoareTripleChecker+Valid, 162 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 03:32:14,834 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [139 Valid, 162 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-03 03:32:14,835 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 271 states. [2022-11-03 03:32:14,841 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 271 to 157. [2022-11-03 03:32:14,842 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 157 states, 156 states have (on average 1.358974358974359) internal successors, (212), 156 states have internal predecessors, (212), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:14,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 212 transitions. [2022-11-03 03:32:14,843 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 212 transitions. Word has length 40 [2022-11-03 03:32:14,843 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:32:14,843 INFO L495 AbstractCegarLoop]: Abstraction has 157 states and 212 transitions. [2022-11-03 03:32:14,844 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 10.0) internal successors, (40), 4 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:14,844 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 212 transitions. [2022-11-03 03:32:14,844 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2022-11-03 03:32:14,845 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:32:14,845 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:32:14,864 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (21)] Forceful destruction successful, exit code 0 [2022-11-03 03:32:15,060 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 21 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:32:15,060 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:32:15,061 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:32:15,061 INFO L85 PathProgramCache]: Analyzing trace with hash -1533053171, now seen corresponding path program 1 times [2022-11-03 03:32:15,061 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:32:15,061 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [463797339] [2022-11-03 03:32:15,062 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:15,062 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:32:15,062 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:32:15,063 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:32:15,065 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (22)] Waiting until timeout for monitored process [2022-11-03 03:32:15,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:15,256 INFO L263 TraceCheckSpWp]: Trace formula consists of 396 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:32:15,259 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:15,521 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 31 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 03:32:15,521 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:32:15,593 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 36 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 03:32:15,594 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:32:15,594 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [463797339] [2022-11-03 03:32:15,594 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [463797339] provided 1 perfect and 1 imperfect interpolant sequences [2022-11-03 03:32:15,595 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-03 03:32:15,595 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [8] total 12 [2022-11-03 03:32:15,595 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1664235189] [2022-11-03 03:32:15,595 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:32:15,596 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-03 03:32:15,596 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:32:15,597 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-03 03:32:15,597 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2022-11-03 03:32:15,597 INFO L87 Difference]: Start difference. First operand 157 states and 212 transitions. Second operand has 6 states, 6 states have (on average 12.166666666666666) internal successors, (73), 6 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:15,798 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:32:15,798 INFO L93 Difference]: Finished difference Result 272 states and 371 transitions. [2022-11-03 03:32:15,799 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-03 03:32:15,799 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.166666666666666) internal successors, (73), 6 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 75 [2022-11-03 03:32:15,799 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:32:15,800 INFO L225 Difference]: With dead ends: 272 [2022-11-03 03:32:15,800 INFO L226 Difference]: Without dead ends: 205 [2022-11-03 03:32:15,801 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 159 GetRequests, 143 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=66, Invalid=240, Unknown=0, NotChecked=0, Total=306 [2022-11-03 03:32:15,802 INFO L413 NwaCegarLoop]: 48 mSDtfsCounter, 290 mSDsluCounter, 195 mSDsCounter, 0 mSdLazyCounter, 62 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 290 SdHoareTripleChecker+Valid, 243 SdHoareTripleChecker+Invalid, 68 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 62 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:32:15,802 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [290 Valid, 243 Invalid, 68 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 62 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 03:32:15,803 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 205 states. [2022-11-03 03:32:15,808 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 205 to 157. [2022-11-03 03:32:15,809 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 157 states, 156 states have (on average 1.3461538461538463) internal successors, (210), 156 states have internal predecessors, (210), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:15,810 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 210 transitions. [2022-11-03 03:32:15,810 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 210 transitions. Word has length 75 [2022-11-03 03:32:15,810 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:32:15,810 INFO L495 AbstractCegarLoop]: Abstraction has 157 states and 210 transitions. [2022-11-03 03:32:15,811 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.166666666666666) internal successors, (73), 6 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:15,811 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 210 transitions. [2022-11-03 03:32:15,811 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2022-11-03 03:32:15,812 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:32:15,812 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:32:15,835 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (22)] Forceful destruction successful, exit code 0 [2022-11-03 03:32:16,026 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 22 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:32:16,026 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:32:16,027 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:32:16,027 INFO L85 PathProgramCache]: Analyzing trace with hash -1301804143, now seen corresponding path program 1 times [2022-11-03 03:32:16,028 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:32:16,028 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [820337443] [2022-11-03 03:32:16,028 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:16,028 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:32:16,028 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:32:16,030 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:32:16,042 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (23)] Waiting until timeout for monitored process [2022-11-03 03:32:16,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:16,231 INFO L263 TraceCheckSpWp]: Trace formula consists of 396 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:32:16,234 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:16,549 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 31 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 03:32:16,549 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:32:16,596 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 36 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 03:32:16,597 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:32:16,597 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [820337443] [2022-11-03 03:32:16,597 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [820337443] provided 1 perfect and 1 imperfect interpolant sequences [2022-11-03 03:32:16,597 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-03 03:32:16,597 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [8] total 10 [2022-11-03 03:32:16,597 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [780690775] [2022-11-03 03:32:16,598 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:32:16,598 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-03 03:32:16,598 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:32:16,598 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-03 03:32:16,599 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2022-11-03 03:32:16,599 INFO L87 Difference]: Start difference. First operand 157 states and 210 transitions. Second operand has 6 states, 6 states have (on average 12.166666666666666) internal successors, (73), 6 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:16,753 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:32:16,754 INFO L93 Difference]: Finished difference Result 237 states and 321 transitions. [2022-11-03 03:32:16,757 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-03 03:32:16,757 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.166666666666666) internal successors, (73), 6 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 75 [2022-11-03 03:32:16,757 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:32:16,758 INFO L225 Difference]: With dead ends: 237 [2022-11-03 03:32:16,758 INFO L226 Difference]: Without dead ends: 170 [2022-11-03 03:32:16,758 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 157 GetRequests, 144 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=53, Invalid=157, Unknown=0, NotChecked=0, Total=210 [2022-11-03 03:32:16,759 INFO L413 NwaCegarLoop]: 89 mSDtfsCounter, 186 mSDsluCounter, 145 mSDsCounter, 0 mSdLazyCounter, 56 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 186 SdHoareTripleChecker+Valid, 234 SdHoareTripleChecker+Invalid, 59 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 56 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:32:16,759 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [186 Valid, 234 Invalid, 59 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 56 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 03:32:16,760 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 170 states. [2022-11-03 03:32:16,766 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 170 to 157. [2022-11-03 03:32:16,767 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 157 states, 156 states have (on average 1.3397435897435896) internal successors, (209), 156 states have internal predecessors, (209), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:16,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 209 transitions. [2022-11-03 03:32:16,768 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 209 transitions. Word has length 75 [2022-11-03 03:32:16,768 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:32:16,768 INFO L495 AbstractCegarLoop]: Abstraction has 157 states and 209 transitions. [2022-11-03 03:32:16,769 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.166666666666666) internal successors, (73), 6 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:16,769 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 209 transitions. [2022-11-03 03:32:16,769 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2022-11-03 03:32:16,770 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:32:16,770 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:32:16,785 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (23)] Ended with exit code 0 [2022-11-03 03:32:16,982 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 23 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:32:16,983 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:32:16,983 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:32:16,983 INFO L85 PathProgramCache]: Analyzing trace with hash -600204269, now seen corresponding path program 1 times [2022-11-03 03:32:16,984 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:32:16,984 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [419570281] [2022-11-03 03:32:16,984 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:16,984 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:32:16,985 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:32:16,986 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:32:16,987 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (24)] Waiting until timeout for monitored process [2022-11-03 03:32:17,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:17,173 INFO L263 TraceCheckSpWp]: Trace formula consists of 396 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:32:17,176 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:17,500 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 29 proven. 9 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 03:32:17,500 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:32:17,549 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 36 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 03:32:17,549 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:32:17,550 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [419570281] [2022-11-03 03:32:17,550 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [419570281] provided 1 perfect and 1 imperfect interpolant sequences [2022-11-03 03:32:17,550 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-03 03:32:17,550 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [8] total 10 [2022-11-03 03:32:17,551 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1154912480] [2022-11-03 03:32:17,551 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:32:17,551 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-03 03:32:17,551 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:32:17,552 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-03 03:32:17,552 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2022-11-03 03:32:17,553 INFO L87 Difference]: Start difference. First operand 157 states and 209 transitions. Second operand has 6 states, 6 states have (on average 12.166666666666666) internal successors, (73), 6 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:17,759 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:32:17,759 INFO L93 Difference]: Finished difference Result 318 states and 431 transitions. [2022-11-03 03:32:17,759 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-03 03:32:17,760 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.166666666666666) internal successors, (73), 6 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 75 [2022-11-03 03:32:17,760 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:32:17,761 INFO L225 Difference]: With dead ends: 318 [2022-11-03 03:32:17,761 INFO L226 Difference]: Without dead ends: 251 [2022-11-03 03:32:17,761 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 158 GetRequests, 144 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=60, Invalid=180, Unknown=0, NotChecked=0, Total=240 [2022-11-03 03:32:17,762 INFO L413 NwaCegarLoop]: 129 mSDtfsCounter, 187 mSDsluCounter, 220 mSDsCounter, 0 mSdLazyCounter, 79 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 187 SdHoareTripleChecker+Valid, 349 SdHoareTripleChecker+Invalid, 82 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 79 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:32:17,762 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [187 Valid, 349 Invalid, 82 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 79 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 03:32:17,763 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 251 states. [2022-11-03 03:32:17,768 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 251 to 157. [2022-11-03 03:32:17,769 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 157 states, 156 states have (on average 1.3333333333333333) internal successors, (208), 156 states have internal predecessors, (208), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:17,769 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 208 transitions. [2022-11-03 03:32:17,770 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 208 transitions. Word has length 75 [2022-11-03 03:32:17,770 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:32:17,770 INFO L495 AbstractCegarLoop]: Abstraction has 157 states and 208 transitions. [2022-11-03 03:32:17,770 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.166666666666666) internal successors, (73), 6 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:17,771 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 208 transitions. [2022-11-03 03:32:17,771 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2022-11-03 03:32:17,771 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:32:17,771 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:32:17,784 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (24)] Ended with exit code 0 [2022-11-03 03:32:17,984 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 24 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:32:17,984 INFO L420 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:32:17,984 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:32:17,984 INFO L85 PathProgramCache]: Analyzing trace with hash 785999125, now seen corresponding path program 1 times [2022-11-03 03:32:17,985 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:32:17,985 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1380298500] [2022-11-03 03:32:17,985 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:17,985 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:32:17,986 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:32:17,987 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:32:18,029 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (25)] Waiting until timeout for monitored process [2022-11-03 03:32:18,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:18,162 INFO L263 TraceCheckSpWp]: Trace formula consists of 396 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:32:18,164 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:18,448 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 27 proven. 11 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 03:32:18,448 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:32:18,507 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 36 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 03:32:18,507 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:32:18,507 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1380298500] [2022-11-03 03:32:18,508 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1380298500] provided 1 perfect and 1 imperfect interpolant sequences [2022-11-03 03:32:18,508 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-03 03:32:18,508 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [8] total 10 [2022-11-03 03:32:18,508 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1755899223] [2022-11-03 03:32:18,508 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:32:18,509 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-03 03:32:18,509 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:32:18,510 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-03 03:32:18,510 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2022-11-03 03:32:18,510 INFO L87 Difference]: Start difference. First operand 157 states and 208 transitions. Second operand has 6 states, 6 states have (on average 12.166666666666666) internal successors, (73), 6 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:18,701 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:32:18,701 INFO L93 Difference]: Finished difference Result 318 states and 428 transitions. [2022-11-03 03:32:18,702 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-03 03:32:18,702 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.166666666666666) internal successors, (73), 6 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 75 [2022-11-03 03:32:18,702 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:32:18,703 INFO L225 Difference]: With dead ends: 318 [2022-11-03 03:32:18,703 INFO L226 Difference]: Without dead ends: 251 [2022-11-03 03:32:18,703 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 158 GetRequests, 144 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=60, Invalid=180, Unknown=0, NotChecked=0, Total=240 [2022-11-03 03:32:18,704 INFO L413 NwaCegarLoop]: 129 mSDtfsCounter, 183 mSDsluCounter, 221 mSDsCounter, 0 mSdLazyCounter, 81 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 183 SdHoareTripleChecker+Valid, 350 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 81 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:32:18,704 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [183 Valid, 350 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 81 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 03:32:18,705 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 251 states. [2022-11-03 03:32:18,711 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 251 to 157. [2022-11-03 03:32:18,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 157 states, 156 states have (on average 1.3269230769230769) internal successors, (207), 156 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:18,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 207 transitions. [2022-11-03 03:32:18,713 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 207 transitions. Word has length 75 [2022-11-03 03:32:18,713 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:32:18,713 INFO L495 AbstractCegarLoop]: Abstraction has 157 states and 207 transitions. [2022-11-03 03:32:18,713 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.166666666666666) internal successors, (73), 6 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:18,713 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 207 transitions. [2022-11-03 03:32:18,714 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2022-11-03 03:32:18,714 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:32:18,715 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:32:18,728 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (25)] Forceful destruction successful, exit code 0 [2022-11-03 03:32:18,928 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 25 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:32:18,928 INFO L420 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:32:18,928 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:32:18,928 INFO L85 PathProgramCache]: Analyzing trace with hash -1585740137, now seen corresponding path program 1 times [2022-11-03 03:32:18,929 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:32:18,929 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1921016351] [2022-11-03 03:32:18,929 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:18,929 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:32:18,930 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:32:18,931 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:32:18,946 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (26)] Waiting until timeout for monitored process [2022-11-03 03:32:19,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:19,091 INFO L263 TraceCheckSpWp]: Trace formula consists of 396 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:32:19,093 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:19,378 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 25 proven. 13 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 03:32:19,378 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:32:19,431 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 36 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 03:32:19,431 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:32:19,431 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1921016351] [2022-11-03 03:32:19,431 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1921016351] provided 1 perfect and 1 imperfect interpolant sequences [2022-11-03 03:32:19,431 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-03 03:32:19,432 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [8] total 10 [2022-11-03 03:32:19,432 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1015834384] [2022-11-03 03:32:19,432 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:32:19,432 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-03 03:32:19,433 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:32:19,433 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-03 03:32:19,433 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2022-11-03 03:32:19,434 INFO L87 Difference]: Start difference. First operand 157 states and 207 transitions. Second operand has 6 states, 6 states have (on average 12.166666666666666) internal successors, (73), 6 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:19,634 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:32:19,635 INFO L93 Difference]: Finished difference Result 318 states and 425 transitions. [2022-11-03 03:32:19,635 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-03 03:32:19,635 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.166666666666666) internal successors, (73), 6 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 75 [2022-11-03 03:32:19,636 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:32:19,637 INFO L225 Difference]: With dead ends: 318 [2022-11-03 03:32:19,637 INFO L226 Difference]: Without dead ends: 251 [2022-11-03 03:32:19,637 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 158 GetRequests, 144 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=60, Invalid=180, Unknown=0, NotChecked=0, Total=240 [2022-11-03 03:32:19,638 INFO L413 NwaCegarLoop]: 129 mSDtfsCounter, 179 mSDsluCounter, 222 mSDsCounter, 0 mSdLazyCounter, 83 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 179 SdHoareTripleChecker+Valid, 351 SdHoareTripleChecker+Invalid, 86 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 83 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:32:19,638 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [179 Valid, 351 Invalid, 86 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 83 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 03:32:19,639 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 251 states. [2022-11-03 03:32:19,656 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 251 to 157. [2022-11-03 03:32:19,657 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 157 states, 156 states have (on average 1.3205128205128205) internal successors, (206), 156 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:19,657 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 206 transitions. [2022-11-03 03:32:19,658 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 206 transitions. Word has length 75 [2022-11-03 03:32:19,658 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:32:19,658 INFO L495 AbstractCegarLoop]: Abstraction has 157 states and 206 transitions. [2022-11-03 03:32:19,658 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.166666666666666) internal successors, (73), 6 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:19,658 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 206 transitions. [2022-11-03 03:32:19,659 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2022-11-03 03:32:19,659 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:32:19,659 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:32:19,679 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (26)] Forceful destruction successful, exit code 0 [2022-11-03 03:32:19,873 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 26 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:32:19,874 INFO L420 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:32:19,874 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:32:19,874 INFO L85 PathProgramCache]: Analyzing trace with hash -1445191527, now seen corresponding path program 1 times [2022-11-03 03:32:19,874 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:32:19,875 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1309626374] [2022-11-03 03:32:19,875 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:19,875 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:32:19,875 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:32:19,876 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:32:19,877 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (27)] Waiting until timeout for monitored process [2022-11-03 03:32:20,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:20,033 INFO L263 TraceCheckSpWp]: Trace formula consists of 396 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:32:20,036 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:20,309 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 23 proven. 15 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 03:32:20,309 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:32:20,370 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 36 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 03:32:20,371 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:32:20,371 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1309626374] [2022-11-03 03:32:20,371 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1309626374] provided 1 perfect and 1 imperfect interpolant sequences [2022-11-03 03:32:20,371 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-03 03:32:20,371 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [8] total 10 [2022-11-03 03:32:20,372 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [445653652] [2022-11-03 03:32:20,372 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:32:20,372 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-03 03:32:20,373 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:32:20,373 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-03 03:32:20,373 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2022-11-03 03:32:20,374 INFO L87 Difference]: Start difference. First operand 157 states and 206 transitions. Second operand has 6 states, 6 states have (on average 12.166666666666666) internal successors, (73), 6 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:20,573 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:32:20,573 INFO L93 Difference]: Finished difference Result 318 states and 422 transitions. [2022-11-03 03:32:20,576 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-03 03:32:20,576 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.166666666666666) internal successors, (73), 6 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 75 [2022-11-03 03:32:20,576 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:32:20,577 INFO L225 Difference]: With dead ends: 318 [2022-11-03 03:32:20,578 INFO L226 Difference]: Without dead ends: 251 [2022-11-03 03:32:20,578 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 158 GetRequests, 144 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=60, Invalid=180, Unknown=0, NotChecked=0, Total=240 [2022-11-03 03:32:20,579 INFO L413 NwaCegarLoop]: 129 mSDtfsCounter, 175 mSDsluCounter, 223 mSDsCounter, 0 mSdLazyCounter, 85 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 175 SdHoareTripleChecker+Valid, 352 SdHoareTripleChecker+Invalid, 88 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 85 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:32:20,579 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [175 Valid, 352 Invalid, 88 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 85 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 03:32:20,580 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 251 states. [2022-11-03 03:32:20,586 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 251 to 157. [2022-11-03 03:32:20,586 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 157 states, 156 states have (on average 1.314102564102564) internal successors, (205), 156 states have internal predecessors, (205), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:20,587 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 205 transitions. [2022-11-03 03:32:20,587 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 205 transitions. Word has length 75 [2022-11-03 03:32:20,587 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:32:20,587 INFO L495 AbstractCegarLoop]: Abstraction has 157 states and 205 transitions. [2022-11-03 03:32:20,588 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.166666666666666) internal successors, (73), 6 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:20,588 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 205 transitions. [2022-11-03 03:32:20,588 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2022-11-03 03:32:20,589 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:32:20,589 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:32:20,608 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (27)] Forceful destruction successful, exit code 0 [2022-11-03 03:32:20,803 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 27 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:32:20,803 INFO L420 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:32:20,803 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:32:20,803 INFO L85 PathProgramCache]: Analyzing trace with hash 1044337435, now seen corresponding path program 1 times [2022-11-03 03:32:20,804 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:32:20,804 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [23834350] [2022-11-03 03:32:20,804 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:20,804 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:32:20,804 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:32:20,805 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:32:20,806 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (28)] Waiting until timeout for monitored process [2022-11-03 03:32:20,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:20,959 INFO L263 TraceCheckSpWp]: Trace formula consists of 396 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:32:20,961 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:21,267 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 21 proven. 17 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 03:32:21,267 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:32:21,326 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 36 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 03:32:21,327 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:32:21,327 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [23834350] [2022-11-03 03:32:21,327 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [23834350] provided 1 perfect and 1 imperfect interpolant sequences [2022-11-03 03:32:21,327 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-03 03:32:21,327 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [8] total 10 [2022-11-03 03:32:21,327 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1393233009] [2022-11-03 03:32:21,327 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:32:21,328 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-03 03:32:21,328 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:32:21,328 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-03 03:32:21,328 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2022-11-03 03:32:21,329 INFO L87 Difference]: Start difference. First operand 157 states and 205 transitions. Second operand has 6 states, 6 states have (on average 12.166666666666666) internal successors, (73), 6 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:21,543 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:32:21,543 INFO L93 Difference]: Finished difference Result 318 states and 419 transitions. [2022-11-03 03:32:21,544 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-03 03:32:21,544 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.166666666666666) internal successors, (73), 6 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 75 [2022-11-03 03:32:21,544 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:32:21,545 INFO L225 Difference]: With dead ends: 318 [2022-11-03 03:32:21,545 INFO L226 Difference]: Without dead ends: 251 [2022-11-03 03:32:21,546 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 158 GetRequests, 144 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=60, Invalid=180, Unknown=0, NotChecked=0, Total=240 [2022-11-03 03:32:21,547 INFO L413 NwaCegarLoop]: 129 mSDtfsCounter, 171 mSDsluCounter, 224 mSDsCounter, 0 mSdLazyCounter, 87 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 171 SdHoareTripleChecker+Valid, 353 SdHoareTripleChecker+Invalid, 90 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 87 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:32:21,547 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [171 Valid, 353 Invalid, 90 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 87 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 03:32:21,548 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 251 states. [2022-11-03 03:32:21,555 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 251 to 157. [2022-11-03 03:32:21,556 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 157 states, 156 states have (on average 1.3076923076923077) internal successors, (204), 156 states have internal predecessors, (204), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:21,557 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 204 transitions. [2022-11-03 03:32:21,557 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 204 transitions. Word has length 75 [2022-11-03 03:32:21,557 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:32:21,558 INFO L495 AbstractCegarLoop]: Abstraction has 157 states and 204 transitions. [2022-11-03 03:32:21,558 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.166666666666666) internal successors, (73), 6 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:21,558 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 204 transitions. [2022-11-03 03:32:21,559 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2022-11-03 03:32:21,559 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:32:21,559 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:32:21,579 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (28)] Forceful destruction successful, exit code 0 [2022-11-03 03:32:21,774 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 28 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:32:21,775 INFO L420 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:32:21,775 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:32:21,775 INFO L85 PathProgramCache]: Analyzing trace with hash 1467039261, now seen corresponding path program 1 times [2022-11-03 03:32:21,775 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:32:21,776 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1525807101] [2022-11-03 03:32:21,776 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:21,776 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:32:21,776 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:32:21,777 INFO L229 MonitoredProcess]: Starting monitored process 29 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:32:21,778 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (29)] Waiting until timeout for monitored process [2022-11-03 03:32:21,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:21,941 INFO L263 TraceCheckSpWp]: Trace formula consists of 396 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:32:21,943 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:22,239 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 17 proven. 21 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 03:32:22,240 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:32:22,295 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 36 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 03:32:22,295 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:32:22,295 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1525807101] [2022-11-03 03:32:22,296 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1525807101] provided 1 perfect and 1 imperfect interpolant sequences [2022-11-03 03:32:22,296 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-03 03:32:22,296 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [8] total 10 [2022-11-03 03:32:22,296 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [591241396] [2022-11-03 03:32:22,296 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:32:22,296 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-03 03:32:22,296 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:32:22,297 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-03 03:32:22,297 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2022-11-03 03:32:22,297 INFO L87 Difference]: Start difference. First operand 157 states and 204 transitions. Second operand has 6 states, 6 states have (on average 12.166666666666666) internal successors, (73), 6 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:22,489 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:32:22,490 INFO L93 Difference]: Finished difference Result 320 states and 420 transitions. [2022-11-03 03:32:22,490 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-03 03:32:22,490 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.166666666666666) internal successors, (73), 6 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 75 [2022-11-03 03:32:22,491 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:32:22,491 INFO L225 Difference]: With dead ends: 320 [2022-11-03 03:32:22,492 INFO L226 Difference]: Without dead ends: 253 [2022-11-03 03:32:22,492 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 158 GetRequests, 144 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=60, Invalid=180, Unknown=0, NotChecked=0, Total=240 [2022-11-03 03:32:22,492 INFO L413 NwaCegarLoop]: 132 mSDtfsCounter, 164 mSDsluCounter, 226 mSDsCounter, 0 mSdLazyCounter, 91 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 164 SdHoareTripleChecker+Valid, 358 SdHoareTripleChecker+Invalid, 94 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 91 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:32:22,493 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [164 Valid, 358 Invalid, 94 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 91 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 03:32:22,494 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 253 states. [2022-11-03 03:32:22,501 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 253 to 157. [2022-11-03 03:32:22,501 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 157 states, 156 states have (on average 1.3012820512820513) internal successors, (203), 156 states have internal predecessors, (203), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:22,502 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 203 transitions. [2022-11-03 03:32:22,502 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 203 transitions. Word has length 75 [2022-11-03 03:32:22,503 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:32:22,503 INFO L495 AbstractCegarLoop]: Abstraction has 157 states and 203 transitions. [2022-11-03 03:32:22,503 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.166666666666666) internal successors, (73), 6 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:22,503 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 203 transitions. [2022-11-03 03:32:22,504 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2022-11-03 03:32:22,504 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:32:22,505 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:32:22,517 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (29)] Ended with exit code 0 [2022-11-03 03:32:22,710 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 29 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:32:22,711 INFO L420 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:32:22,711 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:32:22,711 INFO L85 PathProgramCache]: Analyzing trace with hash -121308641, now seen corresponding path program 1 times [2022-11-03 03:32:22,712 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:32:22,712 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1089344216] [2022-11-03 03:32:22,712 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:22,712 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:32:22,712 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:32:22,714 INFO L229 MonitoredProcess]: Starting monitored process 30 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:32:22,751 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (30)] Waiting until timeout for monitored process [2022-11-03 03:32:22,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:22,909 INFO L263 TraceCheckSpWp]: Trace formula consists of 396 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:32:22,911 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:23,213 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 13 proven. 25 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 03:32:23,213 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:32:23,291 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 36 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 03:32:23,291 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:32:23,291 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1089344216] [2022-11-03 03:32:23,292 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1089344216] provided 1 perfect and 1 imperfect interpolant sequences [2022-11-03 03:32:23,292 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-03 03:32:23,292 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [8] total 10 [2022-11-03 03:32:23,292 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [271420701] [2022-11-03 03:32:23,292 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:32:23,292 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-03 03:32:23,293 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:32:23,293 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-03 03:32:23,293 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2022-11-03 03:32:23,294 INFO L87 Difference]: Start difference. First operand 157 states and 203 transitions. Second operand has 6 states, 6 states have (on average 12.166666666666666) internal successors, (73), 6 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:23,508 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:32:23,508 INFO L93 Difference]: Finished difference Result 324 states and 423 transitions. [2022-11-03 03:32:23,510 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-03 03:32:23,511 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.166666666666666) internal successors, (73), 6 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 75 [2022-11-03 03:32:23,511 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:32:23,512 INFO L225 Difference]: With dead ends: 324 [2022-11-03 03:32:23,513 INFO L226 Difference]: Without dead ends: 257 [2022-11-03 03:32:23,513 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 158 GetRequests, 144 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=60, Invalid=180, Unknown=0, NotChecked=0, Total=240 [2022-11-03 03:32:23,514 INFO L413 NwaCegarLoop]: 135 mSDtfsCounter, 156 mSDsluCounter, 236 mSDsCounter, 0 mSdLazyCounter, 98 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 156 SdHoareTripleChecker+Valid, 371 SdHoareTripleChecker+Invalid, 101 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 98 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:32:23,515 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [156 Valid, 371 Invalid, 101 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 98 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 03:32:23,515 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 257 states. [2022-11-03 03:32:23,523 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 257 to 157. [2022-11-03 03:32:23,524 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 157 states, 156 states have (on average 1.294871794871795) internal successors, (202), 156 states have internal predecessors, (202), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:23,524 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 202 transitions. [2022-11-03 03:32:23,525 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 202 transitions. Word has length 75 [2022-11-03 03:32:23,525 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:32:23,525 INFO L495 AbstractCegarLoop]: Abstraction has 157 states and 202 transitions. [2022-11-03 03:32:23,525 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.166666666666666) internal successors, (73), 6 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:23,526 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 202 transitions. [2022-11-03 03:32:23,526 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2022-11-03 03:32:23,527 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:32:23,527 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:32:23,543 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (30)] Ended with exit code 0 [2022-11-03 03:32:23,742 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 30 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:32:23,743 INFO L420 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:32:23,743 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:32:23,743 INFO L85 PathProgramCache]: Analyzing trace with hash -708114655, now seen corresponding path program 1 times [2022-11-03 03:32:23,743 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:32:23,744 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [977615783] [2022-11-03 03:32:23,744 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:23,744 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:32:23,744 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:32:23,745 INFO L229 MonitoredProcess]: Starting monitored process 31 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:32:23,746 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (31)] Waiting until timeout for monitored process [2022-11-03 03:32:23,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:23,891 INFO L263 TraceCheckSpWp]: Trace formula consists of 396 conjuncts, 44 conjunts are in the unsatisfiable core [2022-11-03 03:32:23,894 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:24,681 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:24,681 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:32:27,840 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:27,840 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:32:27,841 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [977615783] [2022-11-03 03:32:27,841 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [977615783] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:32:27,841 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [277623972] [2022-11-03 03:32:27,841 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:27,841 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 03:32:27,841 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 03:32:27,843 INFO L229 MonitoredProcess]: Starting monitored process 32 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 03:32:27,866 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (32)] Waiting until timeout for monitored process [2022-11-03 03:32:28,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:28,180 INFO L263 TraceCheckSpWp]: Trace formula consists of 396 conjuncts, 44 conjunts are in the unsatisfiable core [2022-11-03 03:32:28,182 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:28,646 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:28,647 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:32:29,457 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:29,457 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [277623972] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:32:29,458 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [425859481] [2022-11-03 03:32:29,458 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:29,458 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:32:29,458 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:32:29,459 INFO L229 MonitoredProcess]: Starting monitored process 33 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:32:29,469 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (33)] Waiting until timeout for monitored process [2022-11-03 03:32:29,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:29,599 INFO L263 TraceCheckSpWp]: Trace formula consists of 396 conjuncts, 47 conjunts are in the unsatisfiable core [2022-11-03 03:32:29,602 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:30,110 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:30,110 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:32:31,016 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:31,017 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [425859481] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:32:31,017 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 03:32:31,017 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 22, 22] total 42 [2022-11-03 03:32:31,017 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [891896843] [2022-11-03 03:32:31,017 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 03:32:31,018 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 42 states [2022-11-03 03:32:31,018 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:32:31,019 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2022-11-03 03:32:31,020 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=131, Invalid=1591, Unknown=0, NotChecked=0, Total=1722 [2022-11-03 03:32:31,020 INFO L87 Difference]: Start difference. First operand 157 states and 202 transitions. Second operand has 42 states, 42 states have (on average 3.619047619047619) internal successors, (152), 42 states have internal predecessors, (152), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:37,301 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:32:37,301 INFO L93 Difference]: Finished difference Result 907 states and 1188 transitions. [2022-11-03 03:32:37,301 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 64 states. [2022-11-03 03:32:37,301 INFO L78 Accepts]: Start accepts. Automaton has has 42 states, 42 states have (on average 3.619047619047619) internal successors, (152), 42 states have internal predecessors, (152), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 75 [2022-11-03 03:32:37,302 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:32:37,304 INFO L225 Difference]: With dead ends: 907 [2022-11-03 03:32:37,305 INFO L226 Difference]: Without dead ends: 905 [2022-11-03 03:32:37,309 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 507 GetRequests, 403 SyntacticMatches, 2 SemanticMatches, 102 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2457 ImplicationChecksByTransitivity, 8.1s TimeCoverageRelationStatistics Valid=1891, Invalid=8821, Unknown=0, NotChecked=0, Total=10712 [2022-11-03 03:32:37,310 INFO L413 NwaCegarLoop]: 176 mSDtfsCounter, 1716 mSDsluCounter, 3564 mSDsCounter, 0 mSdLazyCounter, 1002 mSolverCounterSat, 121 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1716 SdHoareTripleChecker+Valid, 3740 SdHoareTripleChecker+Invalid, 2961 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 121 IncrementalHoareTripleChecker+Valid, 1002 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 1838 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2022-11-03 03:32:37,310 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1716 Valid, 3740 Invalid, 2961 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [121 Valid, 1002 Invalid, 0 Unknown, 1838 Unchecked, 1.0s Time] [2022-11-03 03:32:37,311 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 905 states. [2022-11-03 03:32:37,327 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 905 to 197. [2022-11-03 03:32:37,328 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 197 states, 196 states have (on average 1.3265306122448979) internal successors, (260), 196 states have internal predecessors, (260), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:37,329 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 197 states to 197 states and 260 transitions. [2022-11-03 03:32:37,329 INFO L78 Accepts]: Start accepts. Automaton has 197 states and 260 transitions. Word has length 75 [2022-11-03 03:32:37,329 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:32:37,329 INFO L495 AbstractCegarLoop]: Abstraction has 197 states and 260 transitions. [2022-11-03 03:32:37,330 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 42 states, 42 states have (on average 3.619047619047619) internal successors, (152), 42 states have internal predecessors, (152), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:37,330 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 260 transitions. [2022-11-03 03:32:37,331 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2022-11-03 03:32:37,331 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:32:37,331 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:32:37,347 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (31)] Forceful destruction successful, exit code 0 [2022-11-03 03:32:37,571 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (33)] Forceful destruction successful, exit code 0 [2022-11-03 03:32:37,748 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (32)] Ended with exit code 0 [2022-11-03 03:32:37,945 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 31 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,33 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,32 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt [2022-11-03 03:32:37,946 INFO L420 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:32:37,946 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:32:37,946 INFO L85 PathProgramCache]: Analyzing trace with hash -635728097, now seen corresponding path program 1 times [2022-11-03 03:32:37,947 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:32:37,947 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [2007291984] [2022-11-03 03:32:37,947 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:37,947 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:32:37,947 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:32:37,949 INFO L229 MonitoredProcess]: Starting monitored process 34 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:32:37,950 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (34)] Waiting until timeout for monitored process [2022-11-03 03:32:38,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:38,119 INFO L263 TraceCheckSpWp]: Trace formula consists of 396 conjuncts, 9 conjunts are in the unsatisfiable core [2022-11-03 03:32:38,121 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:38,291 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 33 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:38,292 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:32:38,436 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 33 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:38,436 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:32:38,437 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [2007291984] [2022-11-03 03:32:38,437 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [2007291984] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:32:38,437 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [69397456] [2022-11-03 03:32:38,437 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:38,437 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 03:32:38,438 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 03:32:38,439 INFO L229 MonitoredProcess]: Starting monitored process 35 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 03:32:38,466 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (35)] Waiting until timeout for monitored process [2022-11-03 03:32:38,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:38,761 INFO L263 TraceCheckSpWp]: Trace formula consists of 396 conjuncts, 9 conjunts are in the unsatisfiable core [2022-11-03 03:32:38,763 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:38,881 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 33 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:38,881 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:32:38,965 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 33 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:38,965 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [69397456] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:32:38,966 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1453219476] [2022-11-03 03:32:38,966 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:38,966 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:32:38,966 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:32:38,967 INFO L229 MonitoredProcess]: Starting monitored process 36 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:32:38,994 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (36)] Waiting until timeout for monitored process [2022-11-03 03:32:39,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:39,146 INFO L263 TraceCheckSpWp]: Trace formula consists of 396 conjuncts, 9 conjunts are in the unsatisfiable core [2022-11-03 03:32:39,149 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:39,256 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 33 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:39,256 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:32:39,338 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 33 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:39,339 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1453219476] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:32:39,339 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 03:32:39,339 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8, 8] total 11 [2022-11-03 03:32:39,339 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1109627631] [2022-11-03 03:32:39,340 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 03:32:39,340 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-11-03 03:32:39,340 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:32:39,341 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-11-03 03:32:39,341 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2022-11-03 03:32:39,341 INFO L87 Difference]: Start difference. First operand 197 states and 260 transitions. Second operand has 11 states, 11 states have (on average 9.0) internal successors, (99), 11 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:39,704 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:32:39,704 INFO L93 Difference]: Finished difference Result 878 states and 1183 transitions. [2022-11-03 03:32:39,706 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-11-03 03:32:39,706 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 9.0) internal successors, (99), 11 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 75 [2022-11-03 03:32:39,706 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:32:39,708 INFO L225 Difference]: With dead ends: 878 [2022-11-03 03:32:39,708 INFO L226 Difference]: Without dead ends: 705 [2022-11-03 03:32:39,709 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 457 GetRequests, 435 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=168, Invalid=384, Unknown=0, NotChecked=0, Total=552 [2022-11-03 03:32:39,710 INFO L413 NwaCegarLoop]: 72 mSDtfsCounter, 968 mSDsluCounter, 329 mSDsCounter, 0 mSdLazyCounter, 93 mSolverCounterSat, 32 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 968 SdHoareTripleChecker+Valid, 401 SdHoareTripleChecker+Invalid, 125 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 32 IncrementalHoareTripleChecker+Valid, 93 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:32:39,710 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [968 Valid, 401 Invalid, 125 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [32 Valid, 93 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 03:32:39,711 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 705 states. [2022-11-03 03:32:39,734 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 705 to 271. [2022-11-03 03:32:39,735 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 271 states, 270 states have (on average 1.348148148148148) internal successors, (364), 270 states have internal predecessors, (364), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:39,736 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 271 states to 271 states and 364 transitions. [2022-11-03 03:32:39,737 INFO L78 Accepts]: Start accepts. Automaton has 271 states and 364 transitions. Word has length 75 [2022-11-03 03:32:39,737 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:32:39,737 INFO L495 AbstractCegarLoop]: Abstraction has 271 states and 364 transitions. [2022-11-03 03:32:39,737 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 9.0) internal successors, (99), 11 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:39,737 INFO L276 IsEmpty]: Start isEmpty. Operand 271 states and 364 transitions. [2022-11-03 03:32:39,738 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2022-11-03 03:32:39,738 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:32:39,739 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:32:39,764 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (36)] Forceful destruction successful, exit code 0 [2022-11-03 03:32:39,955 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (34)] Ended with exit code 0 [2022-11-03 03:32:40,149 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (35)] Ended with exit code 0 [2022-11-03 03:32:40,347 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 36 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,34 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,35 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt [2022-11-03 03:32:40,347 INFO L420 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:32:40,347 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:32:40,348 INFO L85 PathProgramCache]: Analyzing trace with hash -2079921953, now seen corresponding path program 1 times [2022-11-03 03:32:40,348 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:32:40,348 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1223853694] [2022-11-03 03:32:40,348 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:40,348 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:32:40,348 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:32:40,349 INFO L229 MonitoredProcess]: Starting monitored process 37 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:32:40,351 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (37)] Waiting until timeout for monitored process [2022-11-03 03:32:40,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:40,487 INFO L263 TraceCheckSpWp]: Trace formula consists of 396 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-03 03:32:40,488 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:40,553 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 36 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 03:32:40,553 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:32:40,553 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:32:40,553 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1223853694] [2022-11-03 03:32:40,553 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1223853694] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:32:40,553 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:32:40,554 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-03 03:32:40,554 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1364463079] [2022-11-03 03:32:40,554 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:32:40,556 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-03 03:32:40,556 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:32:40,556 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-03 03:32:40,557 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-03 03:32:40,557 INFO L87 Difference]: Start difference. First operand 271 states and 364 transitions. Second operand has 5 states, 5 states have (on average 14.6) internal successors, (73), 5 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:40,658 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:32:40,658 INFO L93 Difference]: Finished difference Result 687 states and 923 transitions. [2022-11-03 03:32:40,659 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-03 03:32:40,659 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 14.6) internal successors, (73), 5 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 75 [2022-11-03 03:32:40,659 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:32:40,661 INFO L225 Difference]: With dead ends: 687 [2022-11-03 03:32:40,661 INFO L226 Difference]: Without dead ends: 438 [2022-11-03 03:32:40,662 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 72 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2022-11-03 03:32:40,662 INFO L413 NwaCegarLoop]: 95 mSDtfsCounter, 194 mSDsluCounter, 127 mSDsCounter, 0 mSdLazyCounter, 26 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 194 SdHoareTripleChecker+Valid, 222 SdHoareTripleChecker+Invalid, 26 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 26 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 03:32:40,663 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [194 Valid, 222 Invalid, 26 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 26 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-03 03:32:40,664 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 438 states. [2022-11-03 03:32:40,683 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 438 to 271. [2022-11-03 03:32:40,684 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 271 states, 270 states have (on average 1.3185185185185184) internal successors, (356), 270 states have internal predecessors, (356), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:40,685 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 271 states to 271 states and 356 transitions. [2022-11-03 03:32:40,685 INFO L78 Accepts]: Start accepts. Automaton has 271 states and 356 transitions. Word has length 75 [2022-11-03 03:32:40,685 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:32:40,685 INFO L495 AbstractCegarLoop]: Abstraction has 271 states and 356 transitions. [2022-11-03 03:32:40,686 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 14.6) internal successors, (73), 5 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:40,686 INFO L276 IsEmpty]: Start isEmpty. Operand 271 states and 356 transitions. [2022-11-03 03:32:40,692 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2022-11-03 03:32:40,692 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:32:40,693 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:32:40,715 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (37)] Forceful destruction successful, exit code 0 [2022-11-03 03:32:40,906 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 37 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:32:40,906 INFO L420 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:32:40,907 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:32:40,907 INFO L85 PathProgramCache]: Analyzing trace with hash 1231047391, now seen corresponding path program 1 times [2022-11-03 03:32:40,907 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:32:40,907 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [57613470] [2022-11-03 03:32:40,908 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:40,908 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:32:40,908 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:32:40,909 INFO L229 MonitoredProcess]: Starting monitored process 38 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:32:40,951 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (38)] Waiting until timeout for monitored process [2022-11-03 03:32:41,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:41,098 INFO L263 TraceCheckSpWp]: Trace formula consists of 396 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:32:41,101 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:41,248 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 28 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2022-11-03 03:32:41,248 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:32:41,249 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:32:41,249 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [57613470] [2022-11-03 03:32:41,249 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [57613470] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:32:41,249 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:32:41,249 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-11-03 03:32:41,249 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1073712419] [2022-11-03 03:32:41,249 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:32:41,250 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-03 03:32:41,250 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:32:41,250 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-03 03:32:41,250 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-11-03 03:32:41,250 INFO L87 Difference]: Start difference. First operand 271 states and 356 transitions. Second operand has 8 states, 8 states have (on average 8.375) internal successors, (67), 8 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:41,406 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:32:41,406 INFO L93 Difference]: Finished difference Result 632 states and 827 transitions. [2022-11-03 03:32:41,407 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-03 03:32:41,407 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 8.375) internal successors, (67), 8 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 75 [2022-11-03 03:32:41,407 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:32:41,409 INFO L225 Difference]: With dead ends: 632 [2022-11-03 03:32:41,409 INFO L226 Difference]: Without dead ends: 383 [2022-11-03 03:32:41,410 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 68 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2022-11-03 03:32:41,417 INFO L413 NwaCegarLoop]: 74 mSDtfsCounter, 115 mSDsluCounter, 391 mSDsCounter, 0 mSdLazyCounter, 72 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 115 SdHoareTripleChecker+Valid, 465 SdHoareTripleChecker+Invalid, 105 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 72 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 31 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:32:41,419 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [115 Valid, 465 Invalid, 105 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 72 Invalid, 0 Unknown, 31 Unchecked, 0.1s Time] [2022-11-03 03:32:41,420 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 383 states. [2022-11-03 03:32:41,450 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 383 to 281. [2022-11-03 03:32:41,451 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 281 states, 280 states have (on average 1.3178571428571428) internal successors, (369), 280 states have internal predecessors, (369), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:41,452 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 281 states to 281 states and 369 transitions. [2022-11-03 03:32:41,452 INFO L78 Accepts]: Start accepts. Automaton has 281 states and 369 transitions. Word has length 75 [2022-11-03 03:32:41,452 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:32:41,453 INFO L495 AbstractCegarLoop]: Abstraction has 281 states and 369 transitions. [2022-11-03 03:32:41,453 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 8.375) internal successors, (67), 8 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:41,453 INFO L276 IsEmpty]: Start isEmpty. Operand 281 states and 369 transitions. [2022-11-03 03:32:41,454 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2022-11-03 03:32:41,454 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:32:41,454 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:32:41,464 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (38)] Ended with exit code 0 [2022-11-03 03:32:41,658 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 38 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:32:41,659 INFO L420 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:32:41,659 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:32:41,659 INFO L85 PathProgramCache]: Analyzing trace with hash 902611933, now seen corresponding path program 1 times [2022-11-03 03:32:41,659 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:32:41,660 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1769940874] [2022-11-03 03:32:41,660 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:41,660 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:32:41,660 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:32:41,661 INFO L229 MonitoredProcess]: Starting monitored process 39 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:32:41,662 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (39)] Waiting until timeout for monitored process [2022-11-03 03:32:41,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:41,842 INFO L263 TraceCheckSpWp]: Trace formula consists of 396 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:32:41,845 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:41,996 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 24 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-11-03 03:32:41,997 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:32:41,997 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:32:41,997 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1769940874] [2022-11-03 03:32:41,997 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1769940874] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:32:41,998 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:32:41,998 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-11-03 03:32:41,998 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1050043647] [2022-11-03 03:32:41,998 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:32:41,998 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-03 03:32:41,999 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:32:41,999 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-03 03:32:41,999 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-11-03 03:32:42,000 INFO L87 Difference]: Start difference. First operand 281 states and 369 transitions. Second operand has 8 states, 8 states have (on average 8.0) internal successors, (64), 8 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:42,143 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:32:42,143 INFO L93 Difference]: Finished difference Result 578 states and 756 transitions. [2022-11-03 03:32:42,144 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-03 03:32:42,144 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 8.0) internal successors, (64), 8 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 75 [2022-11-03 03:32:42,144 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:32:42,146 INFO L225 Difference]: With dead ends: 578 [2022-11-03 03:32:42,146 INFO L226 Difference]: Without dead ends: 325 [2022-11-03 03:32:42,147 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 68 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2022-11-03 03:32:42,147 INFO L413 NwaCegarLoop]: 68 mSDtfsCounter, 115 mSDsluCounter, 324 mSDsCounter, 0 mSdLazyCounter, 69 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 115 SdHoareTripleChecker+Valid, 392 SdHoareTripleChecker+Invalid, 91 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 69 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 20 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:32:42,148 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [115 Valid, 392 Invalid, 91 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 69 Invalid, 0 Unknown, 20 Unchecked, 0.1s Time] [2022-11-03 03:32:42,148 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 325 states. [2022-11-03 03:32:42,170 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 325 to 277. [2022-11-03 03:32:42,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 277 states, 276 states have (on average 1.315217391304348) internal successors, (363), 276 states have internal predecessors, (363), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:42,172 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 277 states to 277 states and 363 transitions. [2022-11-03 03:32:42,172 INFO L78 Accepts]: Start accepts. Automaton has 277 states and 363 transitions. Word has length 75 [2022-11-03 03:32:42,172 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:32:42,172 INFO L495 AbstractCegarLoop]: Abstraction has 277 states and 363 transitions. [2022-11-03 03:32:42,173 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 8.0) internal successors, (64), 8 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:42,173 INFO L276 IsEmpty]: Start isEmpty. Operand 277 states and 363 transitions. [2022-11-03 03:32:42,174 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2022-11-03 03:32:42,174 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:32:42,174 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:32:42,191 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (39)] Forceful destruction successful, exit code 0 [2022-11-03 03:32:42,388 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 39 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:32:42,388 INFO L420 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:32:42,388 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:32:42,388 INFO L85 PathProgramCache]: Analyzing trace with hash -822162573, now seen corresponding path program 1 times [2022-11-03 03:32:42,389 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:32:42,389 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1390181175] [2022-11-03 03:32:42,389 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:42,389 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:32:42,389 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:32:42,390 INFO L229 MonitoredProcess]: Starting monitored process 40 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:32:42,391 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (40)] Waiting until timeout for monitored process [2022-11-03 03:32:42,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:42,536 INFO L263 TraceCheckSpWp]: Trace formula consists of 396 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:32:42,539 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:42,778 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 19 proven. 19 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 03:32:42,778 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:32:42,862 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 36 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 03:32:42,863 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:32:42,863 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1390181175] [2022-11-03 03:32:42,863 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1390181175] provided 1 perfect and 1 imperfect interpolant sequences [2022-11-03 03:32:42,863 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-03 03:32:42,863 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [8] total 12 [2022-11-03 03:32:42,863 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2125375262] [2022-11-03 03:32:42,863 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:32:42,864 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-03 03:32:42,864 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:32:42,864 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-03 03:32:42,864 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2022-11-03 03:32:42,865 INFO L87 Difference]: Start difference. First operand 277 states and 363 transitions. Second operand has 6 states, 6 states have (on average 12.166666666666666) internal successors, (73), 6 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:43,072 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:32:43,073 INFO L93 Difference]: Finished difference Result 598 states and 768 transitions. [2022-11-03 03:32:43,073 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-03 03:32:43,073 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.166666666666666) internal successors, (73), 6 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 75 [2022-11-03 03:32:43,074 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:32:43,075 INFO L225 Difference]: With dead ends: 598 [2022-11-03 03:32:43,075 INFO L226 Difference]: Without dead ends: 349 [2022-11-03 03:32:43,076 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 158 GetRequests, 142 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 40 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=66, Invalid=240, Unknown=0, NotChecked=0, Total=306 [2022-11-03 03:32:43,076 INFO L413 NwaCegarLoop]: 63 mSDtfsCounter, 201 mSDsluCounter, 176 mSDsCounter, 0 mSdLazyCounter, 77 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 201 SdHoareTripleChecker+Valid, 239 SdHoareTripleChecker+Invalid, 83 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 77 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:32:43,077 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [201 Valid, 239 Invalid, 83 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 77 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 03:32:43,077 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 349 states. [2022-11-03 03:32:43,096 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 349 to 257. [2022-11-03 03:32:43,096 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 257 states, 256 states have (on average 1.29296875) internal successors, (331), 256 states have internal predecessors, (331), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:43,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 257 states to 257 states and 331 transitions. [2022-11-03 03:32:43,097 INFO L78 Accepts]: Start accepts. Automaton has 257 states and 331 transitions. Word has length 75 [2022-11-03 03:32:43,098 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:32:43,098 INFO L495 AbstractCegarLoop]: Abstraction has 257 states and 331 transitions. [2022-11-03 03:32:43,098 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.166666666666666) internal successors, (73), 6 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:43,098 INFO L276 IsEmpty]: Start isEmpty. Operand 257 states and 331 transitions. [2022-11-03 03:32:43,099 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2022-11-03 03:32:43,099 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:32:43,099 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:32:43,119 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (40)] Forceful destruction successful, exit code 0 [2022-11-03 03:32:43,312 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 40 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:32:43,312 INFO L420 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:32:43,313 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:32:43,313 INFO L85 PathProgramCache]: Analyzing trace with hash 866781169, now seen corresponding path program 2 times [2022-11-03 03:32:43,313 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:32:43,313 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1908906646] [2022-11-03 03:32:43,314 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-03 03:32:43,314 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:32:43,314 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:32:43,315 INFO L229 MonitoredProcess]: Starting monitored process 41 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:32:43,319 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (41)] Waiting until timeout for monitored process [2022-11-03 03:32:43,445 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-03 03:32:43,445 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 03:32:43,452 INFO L263 TraceCheckSpWp]: Trace formula consists of 396 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:32:43,455 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:43,975 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 16 proven. 23 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:43,975 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:32:44,342 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 15 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:44,342 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:32:44,342 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1908906646] [2022-11-03 03:32:44,343 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1908906646] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:32:44,343 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [43654443] [2022-11-03 03:32:44,343 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-03 03:32:44,343 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 03:32:44,343 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 03:32:44,344 INFO L229 MonitoredProcess]: Starting monitored process 42 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 03:32:44,346 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (42)] Waiting until timeout for monitored process [2022-11-03 03:32:44,630 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-03 03:32:44,630 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 03:32:44,635 INFO L263 TraceCheckSpWp]: Trace formula consists of 396 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:32:44,637 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:45,033 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 16 proven. 23 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:45,034 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:32:45,249 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 15 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:45,249 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [43654443] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:32:45,249 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1118066839] [2022-11-03 03:32:45,250 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-03 03:32:45,250 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:32:45,250 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:32:45,255 INFO L229 MonitoredProcess]: Starting monitored process 43 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:32:45,272 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (43)] Waiting until timeout for monitored process [2022-11-03 03:32:45,389 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-03 03:32:45,390 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 03:32:45,393 INFO L263 TraceCheckSpWp]: Trace formula consists of 396 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:32:45,395 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:45,788 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 16 proven. 23 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:45,788 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:32:45,959 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 15 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:45,959 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1118066839] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:32:45,960 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 03:32:45,960 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11, 11] total 20 [2022-11-03 03:32:45,960 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1004367020] [2022-11-03 03:32:45,960 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 03:32:45,961 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2022-11-03 03:32:45,961 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:32:45,961 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-11-03 03:32:45,962 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=71, Invalid=309, Unknown=0, NotChecked=0, Total=380 [2022-11-03 03:32:45,962 INFO L87 Difference]: Start difference. First operand 257 states and 331 transitions. Second operand has 20 states, 20 states have (on average 6.8) internal successors, (136), 20 states have internal predecessors, (136), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:46,365 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:32:46,365 INFO L93 Difference]: Finished difference Result 1234 states and 1587 transitions. [2022-11-03 03:32:46,366 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-11-03 03:32:46,366 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 6.8) internal successors, (136), 20 states have internal predecessors, (136), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 75 [2022-11-03 03:32:46,366 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:32:46,369 INFO L225 Difference]: With dead ends: 1234 [2022-11-03 03:32:46,369 INFO L226 Difference]: Without dead ends: 1005 [2022-11-03 03:32:46,372 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 452 GetRequests, 425 SyntacticMatches, 2 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 1 DeprecatedPredicates, 170 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=132, Invalid=570, Unknown=0, NotChecked=0, Total=702 [2022-11-03 03:32:46,376 INFO L413 NwaCegarLoop]: 128 mSDtfsCounter, 273 mSDsluCounter, 1104 mSDsCounter, 0 mSdLazyCounter, 46 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 273 SdHoareTripleChecker+Valid, 1232 SdHoareTripleChecker+Invalid, 124 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 46 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 75 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:32:46,376 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [273 Valid, 1232 Invalid, 124 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 46 Invalid, 0 Unknown, 75 Unchecked, 0.1s Time] [2022-11-03 03:32:46,379 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1005 states. [2022-11-03 03:32:46,443 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1005 to 674. [2022-11-03 03:32:46,446 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 674 states, 673 states have (on average 1.3075780089153046) internal successors, (880), 673 states have internal predecessors, (880), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:46,449 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 674 states to 674 states and 880 transitions. [2022-11-03 03:32:46,451 INFO L78 Accepts]: Start accepts. Automaton has 674 states and 880 transitions. Word has length 75 [2022-11-03 03:32:46,451 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:32:46,451 INFO L495 AbstractCegarLoop]: Abstraction has 674 states and 880 transitions. [2022-11-03 03:32:46,451 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 20 states have (on average 6.8) internal successors, (136), 20 states have internal predecessors, (136), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:46,452 INFO L276 IsEmpty]: Start isEmpty. Operand 674 states and 880 transitions. [2022-11-03 03:32:46,453 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2022-11-03 03:32:46,453 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:32:46,453 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:32:46,466 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (41)] Ended with exit code 0 [2022-11-03 03:32:46,669 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (42)] Forceful destruction successful, exit code 0 [2022-11-03 03:32:46,888 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (43)] Ended with exit code 0 [2022-11-03 03:32:47,066 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 41 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,42 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,43 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:32:47,066 INFO L420 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:32:47,067 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:32:47,067 INFO L85 PathProgramCache]: Analyzing trace with hash -413082509, now seen corresponding path program 1 times [2022-11-03 03:32:47,067 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:32:47,067 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [497784879] [2022-11-03 03:32:47,068 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:47,068 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:32:47,068 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:32:47,069 INFO L229 MonitoredProcess]: Starting monitored process 44 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:32:47,073 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (44)] Waiting until timeout for monitored process [2022-11-03 03:32:47,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:47,217 INFO L263 TraceCheckSpWp]: Trace formula consists of 396 conjuncts, 23 conjunts are in the unsatisfiable core [2022-11-03 03:32:47,219 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:47,617 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 4 proven. 32 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 03:32:47,617 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:32:48,438 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 34 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 03:32:48,439 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:32:48,439 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [497784879] [2022-11-03 03:32:48,439 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [497784879] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:32:48,439 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1147500627] [2022-11-03 03:32:48,439 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:48,440 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 03:32:48,440 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 03:32:48,443 INFO L229 MonitoredProcess]: Starting monitored process 45 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 03:32:48,470 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (45)] Waiting until timeout for monitored process [2022-11-03 03:32:48,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:48,713 INFO L263 TraceCheckSpWp]: Trace formula consists of 396 conjuncts, 23 conjunts are in the unsatisfiable core [2022-11-03 03:32:48,715 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:49,043 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 4 proven. 32 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 03:32:49,043 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:32:49,457 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 34 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 03:32:49,457 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1147500627] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:32:49,458 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1268752121] [2022-11-03 03:32:49,458 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:49,458 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:32:49,458 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:32:49,459 INFO L229 MonitoredProcess]: Starting monitored process 46 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:32:49,460 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (46)] Waiting until timeout for monitored process [2022-11-03 03:32:49,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:49,590 INFO L263 TraceCheckSpWp]: Trace formula consists of 396 conjuncts, 26 conjunts are in the unsatisfiable core [2022-11-03 03:32:49,592 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:49,958 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 4 proven. 33 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-03 03:32:49,958 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:32:50,426 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 35 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-03 03:32:50,426 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1268752121] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:32:50,427 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 03:32:50,427 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 12, 12] total 22 [2022-11-03 03:32:50,427 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [130434664] [2022-11-03 03:32:50,427 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 03:32:50,428 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-11-03 03:32:50,428 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:32:50,428 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-11-03 03:32:50,429 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=86, Invalid=376, Unknown=0, NotChecked=0, Total=462 [2022-11-03 03:32:50,429 INFO L87 Difference]: Start difference. First operand 674 states and 880 transitions. Second operand has 22 states, 22 states have (on average 6.7272727272727275) internal successors, (148), 22 states have internal predecessors, (148), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:51,341 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:32:51,341 INFO L93 Difference]: Finished difference Result 923 states and 1204 transitions. [2022-11-03 03:32:51,342 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-11-03 03:32:51,342 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 6.7272727272727275) internal successors, (148), 22 states have internal predecessors, (148), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 75 [2022-11-03 03:32:51,342 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:32:51,345 INFO L225 Difference]: With dead ends: 923 [2022-11-03 03:32:51,345 INFO L226 Difference]: Without dead ends: 921 [2022-11-03 03:32:51,346 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 461 GetRequests, 422 SyntacticMatches, 2 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 228 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=410, Invalid=1072, Unknown=0, NotChecked=0, Total=1482 [2022-11-03 03:32:51,347 INFO L413 NwaCegarLoop]: 43 mSDtfsCounter, 893 mSDsluCounter, 328 mSDsCounter, 0 mSdLazyCounter, 115 mSolverCounterSat, 46 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 893 SdHoareTripleChecker+Valid, 371 SdHoareTripleChecker+Invalid, 358 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 46 IncrementalHoareTripleChecker+Valid, 115 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 197 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-03 03:32:51,347 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [893 Valid, 371 Invalid, 358 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [46 Valid, 115 Invalid, 0 Unknown, 197 Unchecked, 0.2s Time] [2022-11-03 03:32:51,349 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 921 states. [2022-11-03 03:32:51,404 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 921 to 424. [2022-11-03 03:32:51,405 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 424 states, 423 states have (on average 1.2695035460992907) internal successors, (537), 423 states have internal predecessors, (537), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:51,406 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 424 states to 424 states and 537 transitions. [2022-11-03 03:32:51,406 INFO L78 Accepts]: Start accepts. Automaton has 424 states and 537 transitions. Word has length 75 [2022-11-03 03:32:51,407 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:32:51,407 INFO L495 AbstractCegarLoop]: Abstraction has 424 states and 537 transitions. [2022-11-03 03:32:51,407 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 6.7272727272727275) internal successors, (148), 22 states have internal predecessors, (148), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:51,407 INFO L276 IsEmpty]: Start isEmpty. Operand 424 states and 537 transitions. [2022-11-03 03:32:51,408 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2022-11-03 03:32:51,408 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:32:51,409 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1] [2022-11-03 03:32:51,454 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (46)] Forceful destruction successful, exit code 0 [2022-11-03 03:32:51,644 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (44)] Forceful destruction successful, exit code 0 [2022-11-03 03:32:51,825 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (45)] Ended with exit code 0 [2022-11-03 03:32:52,023 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 46 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,44 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,45 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt [2022-11-03 03:32:52,023 INFO L420 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:32:52,023 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:32:52,023 INFO L85 PathProgramCache]: Analyzing trace with hash 704375817, now seen corresponding path program 2 times [2022-11-03 03:32:52,024 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:32:52,024 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [166711992] [2022-11-03 03:32:52,024 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-03 03:32:52,024 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:32:52,024 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:32:52,026 INFO L229 MonitoredProcess]: Starting monitored process 47 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:32:52,028 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (47)] Waiting until timeout for monitored process [2022-11-03 03:32:52,159 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-03 03:32:52,160 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 03:32:52,166 INFO L263 TraceCheckSpWp]: Trace formula consists of 396 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:32:52,168 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:52,659 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 16 proven. 23 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:52,659 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:32:53,019 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 15 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:53,019 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:32:53,019 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [166711992] [2022-11-03 03:32:53,019 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [166711992] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:32:53,020 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [163185146] [2022-11-03 03:32:53,020 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-03 03:32:53,020 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 03:32:53,020 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 03:32:53,021 INFO L229 MonitoredProcess]: Starting monitored process 48 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 03:32:53,023 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (48)] Waiting until timeout for monitored process [2022-11-03 03:32:53,285 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-03 03:32:53,285 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 03:32:53,290 INFO L263 TraceCheckSpWp]: Trace formula consists of 396 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:32:53,291 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:53,658 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 16 proven. 23 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:53,658 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:32:53,836 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 15 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:53,836 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [163185146] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:32:53,837 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1421380065] [2022-11-03 03:32:53,837 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-03 03:32:53,837 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:32:53,837 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:32:53,838 INFO L229 MonitoredProcess]: Starting monitored process 49 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:32:53,839 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (49)] Waiting until timeout for monitored process [2022-11-03 03:32:53,965 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-03 03:32:53,965 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 03:32:53,968 INFO L263 TraceCheckSpWp]: Trace formula consists of 396 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:32:53,970 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:54,408 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 16 proven. 23 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:54,408 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:32:54,639 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 15 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:54,639 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1421380065] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:32:54,639 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 03:32:54,640 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11, 11] total 20 [2022-11-03 03:32:54,640 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [289470922] [2022-11-03 03:32:54,640 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 03:32:54,641 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2022-11-03 03:32:54,641 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:32:54,641 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-11-03 03:32:54,642 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=71, Invalid=309, Unknown=0, NotChecked=0, Total=380 [2022-11-03 03:32:54,642 INFO L87 Difference]: Start difference. First operand 424 states and 537 transitions. Second operand has 20 states, 20 states have (on average 6.8) internal successors, (136), 20 states have internal predecessors, (136), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:55,370 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:32:55,370 INFO L93 Difference]: Finished difference Result 2243 states and 2789 transitions. [2022-11-03 03:32:55,370 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2022-11-03 03:32:55,370 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 6.8) internal successors, (136), 20 states have internal predecessors, (136), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 75 [2022-11-03 03:32:55,371 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:32:55,377 INFO L225 Difference]: With dead ends: 2243 [2022-11-03 03:32:55,377 INFO L226 Difference]: Without dead ends: 1857 [2022-11-03 03:32:55,378 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 466 GetRequests, 431 SyntacticMatches, 3 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 1 DeprecatedPredicates, 252 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=225, Invalid=897, Unknown=0, NotChecked=0, Total=1122 [2022-11-03 03:32:55,379 INFO L413 NwaCegarLoop]: 239 mSDtfsCounter, 294 mSDsluCounter, 2340 mSDsCounter, 0 mSdLazyCounter, 56 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 294 SdHoareTripleChecker+Valid, 2579 SdHoareTripleChecker+Invalid, 162 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 56 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 104 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:32:55,379 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [294 Valid, 2579 Invalid, 162 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 56 Invalid, 0 Unknown, 104 Unchecked, 0.1s Time] [2022-11-03 03:32:55,381 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1857 states. [2022-11-03 03:32:55,479 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1857 to 875. [2022-11-03 03:32:55,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 875 states, 874 states have (on average 1.2471395881006866) internal successors, (1090), 874 states have internal predecessors, (1090), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:55,491 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 875 states to 875 states and 1090 transitions. [2022-11-03 03:32:55,491 INFO L78 Accepts]: Start accepts. Automaton has 875 states and 1090 transitions. Word has length 75 [2022-11-03 03:32:55,491 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:32:55,491 INFO L495 AbstractCegarLoop]: Abstraction has 875 states and 1090 transitions. [2022-11-03 03:32:55,492 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 20 states have (on average 6.8) internal successors, (136), 20 states have internal predecessors, (136), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:32:55,492 INFO L276 IsEmpty]: Start isEmpty. Operand 875 states and 1090 transitions. [2022-11-03 03:32:55,493 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2022-11-03 03:32:55,493 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:32:55,493 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2022-11-03 03:32:55,497 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (48)] Forceful destruction successful, exit code 0 [2022-11-03 03:32:55,738 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (49)] Forceful destruction successful, exit code 0 [2022-11-03 03:32:55,905 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (47)] Ended with exit code 0 [2022-11-03 03:32:56,097 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 48 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,49 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,47 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:32:56,097 INFO L420 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:32:56,097 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:32:56,098 INFO L85 PathProgramCache]: Analyzing trace with hash -575487861, now seen corresponding path program 1 times [2022-11-03 03:32:56,098 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:32:56,098 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1880504197] [2022-11-03 03:32:56,098 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:56,098 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:32:56,099 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:32:56,099 INFO L229 MonitoredProcess]: Starting monitored process 50 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:32:56,101 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (50)] Waiting until timeout for monitored process [2022-11-03 03:32:56,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:56,241 INFO L263 TraceCheckSpWp]: Trace formula consists of 396 conjuncts, 58 conjunts are in the unsatisfiable core [2022-11-03 03:32:56,244 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:57,238 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:32:57,238 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:33:00,765 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:33:00,766 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:33:00,766 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1880504197] [2022-11-03 03:33:00,766 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1880504197] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:33:00,766 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [219811919] [2022-11-03 03:33:00,766 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:33:00,766 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 03:33:00,766 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 03:33:00,767 INFO L229 MonitoredProcess]: Starting monitored process 51 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 03:33:00,772 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (51)] Waiting until timeout for monitored process [2022-11-03 03:33:01,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:33:01,032 INFO L263 TraceCheckSpWp]: Trace formula consists of 396 conjuncts, 58 conjunts are in the unsatisfiable core [2022-11-03 03:33:01,034 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:33:01,546 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:33:01,546 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:33:02,282 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:33:02,282 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [219811919] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:33:02,282 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [28496244] [2022-11-03 03:33:02,282 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:33:02,282 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:33:02,283 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:33:02,284 INFO L229 MonitoredProcess]: Starting monitored process 52 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:33:02,285 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (52)] Waiting until timeout for monitored process [2022-11-03 03:33:02,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:33:02,426 INFO L263 TraceCheckSpWp]: Trace formula consists of 396 conjuncts, 61 conjunts are in the unsatisfiable core [2022-11-03 03:33:02,431 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:33:03,092 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:33:03,092 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:33:04,088 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:33:04,088 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [28496244] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:33:04,088 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 03:33:04,089 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 24, 24] total 46 [2022-11-03 03:33:04,089 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1547176950] [2022-11-03 03:33:04,089 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 03:33:04,090 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 46 states [2022-11-03 03:33:04,090 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:33:04,090 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2022-11-03 03:33:04,091 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=115, Invalid=1955, Unknown=0, NotChecked=0, Total=2070 [2022-11-03 03:33:04,091 INFO L87 Difference]: Start difference. First operand 875 states and 1090 transitions. Second operand has 46 states, 46 states have (on average 3.3043478260869565) internal successors, (152), 46 states have internal predecessors, (152), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:07,797 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:33:07,797 INFO L93 Difference]: Finished difference Result 1749 states and 2197 transitions. [2022-11-03 03:33:07,799 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2022-11-03 03:33:07,799 INFO L78 Accepts]: Start accepts. Automaton has has 46 states, 46 states have (on average 3.3043478260869565) internal successors, (152), 46 states have internal predecessors, (152), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 75 [2022-11-03 03:33:07,800 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:33:07,803 INFO L225 Difference]: With dead ends: 1749 [2022-11-03 03:33:07,804 INFO L226 Difference]: Without dead ends: 1747 [2022-11-03 03:33:07,805 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 477 GetRequests, 399 SyntacticMatches, 2 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 759 ImplicationChecksByTransitivity, 6.9s TimeCoverageRelationStatistics Valid=896, Invalid=5110, Unknown=0, NotChecked=0, Total=6006 [2022-11-03 03:33:07,806 INFO L413 NwaCegarLoop]: 101 mSDtfsCounter, 956 mSDsluCounter, 2779 mSDsCounter, 0 mSdLazyCounter, 358 mSolverCounterSat, 30 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 956 SdHoareTripleChecker+Valid, 2880 SdHoareTripleChecker+Invalid, 1181 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 30 IncrementalHoareTripleChecker+Valid, 358 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 793 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-11-03 03:33:07,806 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [956 Valid, 2880 Invalid, 1181 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [30 Valid, 358 Invalid, 0 Unknown, 793 Unchecked, 0.4s Time] [2022-11-03 03:33:07,807 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1747 states. [2022-11-03 03:33:07,918 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1747 to 895. [2022-11-03 03:33:07,920 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 895 states, 894 states have (on average 1.2460850111856823) internal successors, (1114), 894 states have internal predecessors, (1114), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:07,921 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 895 states to 895 states and 1114 transitions. [2022-11-03 03:33:07,922 INFO L78 Accepts]: Start accepts. Automaton has 895 states and 1114 transitions. Word has length 75 [2022-11-03 03:33:07,922 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:33:07,922 INFO L495 AbstractCegarLoop]: Abstraction has 895 states and 1114 transitions. [2022-11-03 03:33:07,922 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 46 states, 46 states have (on average 3.3043478260869565) internal successors, (152), 46 states have internal predecessors, (152), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:07,923 INFO L276 IsEmpty]: Start isEmpty. Operand 895 states and 1114 transitions. [2022-11-03 03:33:07,924 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2022-11-03 03:33:07,924 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:33:07,924 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:33:07,962 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (52)] Ended with exit code 0 [2022-11-03 03:33:08,151 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (50)] Forceful destruction successful, exit code 0 [2022-11-03 03:33:08,342 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (51)] Ended with exit code 0 [2022-11-03 03:33:08,539 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 52 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,50 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,51 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt [2022-11-03 03:33:08,539 INFO L420 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:33:08,539 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:33:08,539 INFO L85 PathProgramCache]: Analyzing trace with hash -503101303, now seen corresponding path program 1 times [2022-11-03 03:33:08,540 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:33:08,540 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1649104969] [2022-11-03 03:33:08,540 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:33:08,540 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:33:08,540 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:33:08,541 INFO L229 MonitoredProcess]: Starting monitored process 53 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:33:08,547 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (53)] Waiting until timeout for monitored process [2022-11-03 03:33:08,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:33:08,678 INFO L263 TraceCheckSpWp]: Trace formula consists of 396 conjuncts, 11 conjunts are in the unsatisfiable core [2022-11-03 03:33:08,680 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:33:08,838 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 33 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:33:08,838 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:33:08,951 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 33 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:33:08,951 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:33:08,951 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1649104969] [2022-11-03 03:33:08,952 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1649104969] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:33:08,952 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [242215380] [2022-11-03 03:33:08,952 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:33:08,952 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 03:33:08,952 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 03:33:08,955 INFO L229 MonitoredProcess]: Starting monitored process 54 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 03:33:08,957 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (54)] Waiting until timeout for monitored process [2022-11-03 03:33:09,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:33:09,209 INFO L263 TraceCheckSpWp]: Trace formula consists of 396 conjuncts, 11 conjunts are in the unsatisfiable core [2022-11-03 03:33:09,211 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:33:09,306 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 33 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:33:09,306 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:33:09,373 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 33 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:33:09,373 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [242215380] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:33:09,374 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1214080509] [2022-11-03 03:33:09,374 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:33:09,374 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:33:09,374 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:33:09,375 INFO L229 MonitoredProcess]: Starting monitored process 55 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:33:09,376 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (55)] Waiting until timeout for monitored process [2022-11-03 03:33:09,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:33:09,524 INFO L263 TraceCheckSpWp]: Trace formula consists of 396 conjuncts, 11 conjunts are in the unsatisfiable core [2022-11-03 03:33:09,527 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:33:09,636 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 33 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:33:09,636 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:33:09,716 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 33 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:33:09,716 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1214080509] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:33:09,716 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 03:33:09,717 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8, 8] total 11 [2022-11-03 03:33:09,717 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1791527116] [2022-11-03 03:33:09,717 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 03:33:09,718 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-11-03 03:33:09,718 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:33:09,718 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-11-03 03:33:09,718 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2022-11-03 03:33:09,718 INFO L87 Difference]: Start difference. First operand 895 states and 1114 transitions. Second operand has 11 states, 11 states have (on average 9.0) internal successors, (99), 11 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:10,081 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:33:10,081 INFO L93 Difference]: Finished difference Result 2938 states and 3677 transitions. [2022-11-03 03:33:10,082 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-11-03 03:33:10,082 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 9.0) internal successors, (99), 11 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 75 [2022-11-03 03:33:10,082 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:33:10,088 INFO L225 Difference]: With dead ends: 2938 [2022-11-03 03:33:10,088 INFO L226 Difference]: Without dead ends: 2121 [2022-11-03 03:33:10,089 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 453 GetRequests, 435 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 34 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=103, Invalid=277, Unknown=0, NotChecked=0, Total=380 [2022-11-03 03:33:10,090 INFO L413 NwaCegarLoop]: 118 mSDtfsCounter, 370 mSDsluCounter, 664 mSDsCounter, 0 mSdLazyCounter, 94 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 370 SdHoareTripleChecker+Valid, 782 SdHoareTripleChecker+Invalid, 100 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 94 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:33:10,090 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [370 Valid, 782 Invalid, 100 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 94 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 03:33:10,111 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2121 states. [2022-11-03 03:33:10,211 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2121 to 911. [2022-11-03 03:33:10,212 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 911 states, 910 states have (on average 1.245054945054945) internal successors, (1133), 910 states have internal predecessors, (1133), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:10,214 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 911 states to 911 states and 1133 transitions. [2022-11-03 03:33:10,214 INFO L78 Accepts]: Start accepts. Automaton has 911 states and 1133 transitions. Word has length 75 [2022-11-03 03:33:10,215 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:33:10,215 INFO L495 AbstractCegarLoop]: Abstraction has 911 states and 1133 transitions. [2022-11-03 03:33:10,215 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 9.0) internal successors, (99), 11 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:10,215 INFO L276 IsEmpty]: Start isEmpty. Operand 911 states and 1133 transitions. [2022-11-03 03:33:10,216 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2022-11-03 03:33:10,217 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:33:10,217 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1] [2022-11-03 03:33:10,255 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (55)] Forceful destruction successful, exit code 0 [2022-11-03 03:33:10,439 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (53)] Forceful destruction successful, exit code 0 [2022-11-03 03:33:10,634 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (54)] Ended with exit code 0 [2022-11-03 03:33:10,831 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 55 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,53 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,54 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt [2022-11-03 03:33:10,831 INFO L420 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:33:10,831 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:33:10,831 INFO L85 PathProgramCache]: Analyzing trace with hash -1056568119, now seen corresponding path program 1 times [2022-11-03 03:33:10,832 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:33:10,832 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [253183129] [2022-11-03 03:33:10,832 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:33:10,832 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:33:10,832 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:33:10,833 INFO L229 MonitoredProcess]: Starting monitored process 56 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:33:10,834 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (56)] Waiting until timeout for monitored process [2022-11-03 03:33:10,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:33:10,969 INFO L263 TraceCheckSpWp]: Trace formula consists of 396 conjuncts, 8 conjunts are in the unsatisfiable core [2022-11-03 03:33:10,971 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:33:11,085 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2022-11-03 03:33:11,086 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:33:11,086 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:33:11,086 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [253183129] [2022-11-03 03:33:11,086 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [253183129] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:33:11,087 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:33:11,087 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-03 03:33:11,087 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1394627514] [2022-11-03 03:33:11,087 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:33:11,087 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 03:33:11,088 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:33:11,088 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 03:33:11,088 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 03:33:11,089 INFO L87 Difference]: Start difference. First operand 911 states and 1133 transitions. Second operand has 4 states, 4 states have (on average 15.75) internal successors, (63), 4 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:11,224 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:33:11,224 INFO L93 Difference]: Finished difference Result 1974 states and 2445 transitions. [2022-11-03 03:33:11,225 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-03 03:33:11,225 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 15.75) internal successors, (63), 4 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 75 [2022-11-03 03:33:11,225 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:33:11,228 INFO L225 Difference]: With dead ends: 1974 [2022-11-03 03:33:11,229 INFO L226 Difference]: Without dead ends: 1137 [2022-11-03 03:33:11,230 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 72 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-03 03:33:11,236 INFO L413 NwaCegarLoop]: 84 mSDtfsCounter, 74 mSDsluCounter, 101 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 74 SdHoareTripleChecker+Valid, 185 SdHoareTripleChecker+Invalid, 11 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 03:33:11,237 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [74 Valid, 185 Invalid, 11 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-03 03:33:11,238 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1137 states. [2022-11-03 03:33:11,349 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1137 to 911. [2022-11-03 03:33:11,350 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 911 states, 910 states have (on average 1.2406593406593407) internal successors, (1129), 910 states have internal predecessors, (1129), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:11,352 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 911 states to 911 states and 1129 transitions. [2022-11-03 03:33:11,352 INFO L78 Accepts]: Start accepts. Automaton has 911 states and 1129 transitions. Word has length 75 [2022-11-03 03:33:11,352 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:33:11,353 INFO L495 AbstractCegarLoop]: Abstraction has 911 states and 1129 transitions. [2022-11-03 03:33:11,353 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 15.75) internal successors, (63), 4 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:11,353 INFO L276 IsEmpty]: Start isEmpty. Operand 911 states and 1129 transitions. [2022-11-03 03:33:11,354 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2022-11-03 03:33:11,355 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:33:11,355 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:33:11,372 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (56)] Forceful destruction successful, exit code 0 [2022-11-03 03:33:11,567 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 56 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:33:11,567 INFO L420 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:33:11,568 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:33:11,568 INFO L85 PathProgramCache]: Analyzing trace with hash -1451506867, now seen corresponding path program 1 times [2022-11-03 03:33:11,568 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:33:11,568 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1684925369] [2022-11-03 03:33:11,568 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:33:11,568 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:33:11,569 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:33:11,569 INFO L229 MonitoredProcess]: Starting monitored process 57 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:33:11,570 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (57)] Waiting until timeout for monitored process [2022-11-03 03:33:11,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:33:11,700 INFO L263 TraceCheckSpWp]: Trace formula consists of 396 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:33:11,702 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:33:11,841 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2022-11-03 03:33:11,841 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:33:11,842 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:33:11,842 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1684925369] [2022-11-03 03:33:11,842 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1684925369] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:33:11,842 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:33:11,842 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-11-03 03:33:11,842 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [419706947] [2022-11-03 03:33:11,842 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:33:11,842 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-03 03:33:11,843 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:33:11,843 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-03 03:33:11,843 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-11-03 03:33:11,843 INFO L87 Difference]: Start difference. First operand 911 states and 1129 transitions. Second operand has 8 states, 8 states have (on average 7.5) internal successors, (60), 8 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:11,992 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:33:11,992 INFO L93 Difference]: Finished difference Result 1905 states and 2355 transitions. [2022-11-03 03:33:11,992 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-03 03:33:11,992 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 7.5) internal successors, (60), 8 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 75 [2022-11-03 03:33:11,993 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:33:11,995 INFO L225 Difference]: With dead ends: 1905 [2022-11-03 03:33:11,996 INFO L226 Difference]: Without dead ends: 1068 [2022-11-03 03:33:12,011 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 68 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2022-11-03 03:33:12,011 INFO L413 NwaCegarLoop]: 71 mSDtfsCounter, 65 mSDsluCounter, 319 mSDsCounter, 0 mSdLazyCounter, 50 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 65 SdHoareTripleChecker+Valid, 390 SdHoareTripleChecker+Invalid, 74 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 50 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 23 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:33:12,012 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [65 Valid, 390 Invalid, 74 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 50 Invalid, 0 Unknown, 23 Unchecked, 0.1s Time] [2022-11-03 03:33:12,013 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1068 states. [2022-11-03 03:33:12,114 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1068 to 891. [2022-11-03 03:33:12,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 891 states, 890 states have (on average 1.2415730337078652) internal successors, (1105), 890 states have internal predecessors, (1105), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:12,117 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 891 states to 891 states and 1105 transitions. [2022-11-03 03:33:12,118 INFO L78 Accepts]: Start accepts. Automaton has 891 states and 1105 transitions. Word has length 75 [2022-11-03 03:33:12,118 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:33:12,118 INFO L495 AbstractCegarLoop]: Abstraction has 891 states and 1105 transitions. [2022-11-03 03:33:12,118 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 7.5) internal successors, (60), 8 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:12,118 INFO L276 IsEmpty]: Start isEmpty. Operand 891 states and 1105 transitions. [2022-11-03 03:33:12,121 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2022-11-03 03:33:12,121 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:33:12,121 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:33:12,140 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (57)] Forceful destruction successful, exit code 0 [2022-11-03 03:33:12,335 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 57 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:33:12,335 INFO L420 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:33:12,335 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:33:12,336 INFO L85 PathProgramCache]: Analyzing trace with hash 1425331067, now seen corresponding path program 3 times [2022-11-03 03:33:12,336 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:33:12,336 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1300938353] [2022-11-03 03:33:12,336 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-03 03:33:12,336 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:33:12,336 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:33:12,337 INFO L229 MonitoredProcess]: Starting monitored process 58 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:33:12,339 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (58)] Waiting until timeout for monitored process [2022-11-03 03:33:12,482 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-11-03 03:33:12,482 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 03:33:12,488 INFO L263 TraceCheckSpWp]: Trace formula consists of 396 conjuncts, 11 conjunts are in the unsatisfiable core [2022-11-03 03:33:12,491 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:33:12,796 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 76 proven. 27 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2022-11-03 03:33:12,796 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:33:12,912 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 103 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2022-11-03 03:33:12,912 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:33:12,912 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1300938353] [2022-11-03 03:33:12,912 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1300938353] provided 1 perfect and 1 imperfect interpolant sequences [2022-11-03 03:33:12,913 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-03 03:33:12,913 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [8] total 11 [2022-11-03 03:33:12,913 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1380862787] [2022-11-03 03:33:12,913 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:33:12,914 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-03 03:33:12,914 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:33:12,914 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-03 03:33:12,914 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=84, Unknown=0, NotChecked=0, Total=110 [2022-11-03 03:33:12,914 INFO L87 Difference]: Start difference. First operand 891 states and 1105 transitions. Second operand has 7 states, 7 states have (on average 15.0) internal successors, (105), 7 states have internal predecessors, (105), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:13,229 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:33:13,229 INFO L93 Difference]: Finished difference Result 2358 states and 2935 transitions. [2022-11-03 03:33:13,230 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-11-03 03:33:13,230 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 15.0) internal successors, (105), 7 states have internal predecessors, (105), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 110 [2022-11-03 03:33:13,230 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:33:13,232 INFO L225 Difference]: With dead ends: 2358 [2022-11-03 03:33:13,232 INFO L226 Difference]: Without dead ends: 1541 [2022-11-03 03:33:13,233 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 232 GetRequests, 215 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 40 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=87, Invalid=255, Unknown=0, NotChecked=0, Total=342 [2022-11-03 03:33:13,234 INFO L413 NwaCegarLoop]: 93 mSDtfsCounter, 159 mSDsluCounter, 121 mSDsCounter, 0 mSdLazyCounter, 92 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 159 SdHoareTripleChecker+Valid, 214 SdHoareTripleChecker+Invalid, 96 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 92 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:33:13,234 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [159 Valid, 214 Invalid, 96 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 92 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 03:33:13,235 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1541 states. [2022-11-03 03:33:13,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1541 to 891. [2022-11-03 03:33:13,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 891 states, 890 states have (on average 1.2280898876404494) internal successors, (1093), 890 states have internal predecessors, (1093), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:13,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 891 states to 891 states and 1093 transitions. [2022-11-03 03:33:13,338 INFO L78 Accepts]: Start accepts. Automaton has 891 states and 1093 transitions. Word has length 110 [2022-11-03 03:33:13,339 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:33:13,339 INFO L495 AbstractCegarLoop]: Abstraction has 891 states and 1093 transitions. [2022-11-03 03:33:13,339 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 15.0) internal successors, (105), 7 states have internal predecessors, (105), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:13,339 INFO L276 IsEmpty]: Start isEmpty. Operand 891 states and 1093 transitions. [2022-11-03 03:33:13,341 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2022-11-03 03:33:13,342 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:33:13,342 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:33:13,356 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (58)] Forceful destruction successful, exit code 0 [2022-11-03 03:33:13,555 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 58 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:33:13,556 INFO L420 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:33:13,556 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:33:13,556 INFO L85 PathProgramCache]: Analyzing trace with hash 1673477561, now seen corresponding path program 4 times [2022-11-03 03:33:13,556 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:33:13,556 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [92143771] [2022-11-03 03:33:13,557 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-03 03:33:13,557 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:33:13,557 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:33:13,558 INFO L229 MonitoredProcess]: Starting monitored process 59 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:33:13,559 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (59)] Waiting until timeout for monitored process [2022-11-03 03:33:13,728 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-03 03:33:13,728 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 03:33:13,736 INFO L263 TraceCheckSpWp]: Trace formula consists of 567 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:33:13,738 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:33:13,983 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 74 proven. 25 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-11-03 03:33:13,983 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:33:14,071 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 97 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2022-11-03 03:33:14,072 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:33:14,072 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [92143771] [2022-11-03 03:33:14,072 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [92143771] provided 1 perfect and 1 imperfect interpolant sequences [2022-11-03 03:33:14,072 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-03 03:33:14,072 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [8] total 12 [2022-11-03 03:33:14,072 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [234371495] [2022-11-03 03:33:14,072 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:33:14,073 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-03 03:33:14,073 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:33:14,073 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-03 03:33:14,073 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2022-11-03 03:33:14,073 INFO L87 Difference]: Start difference. First operand 891 states and 1093 transitions. Second operand has 6 states, 6 states have (on average 16.5) internal successors, (99), 6 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:14,287 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:33:14,287 INFO L93 Difference]: Finished difference Result 1861 states and 2284 transitions. [2022-11-03 03:33:14,287 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-03 03:33:14,287 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 16.5) internal successors, (99), 6 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 110 [2022-11-03 03:33:14,288 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:33:14,289 INFO L225 Difference]: With dead ends: 1861 [2022-11-03 03:33:14,290 INFO L226 Difference]: Without dead ends: 1044 [2022-11-03 03:33:14,294 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 227 GetRequests, 212 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=59, Invalid=213, Unknown=0, NotChecked=0, Total=272 [2022-11-03 03:33:14,295 INFO L413 NwaCegarLoop]: 63 mSDtfsCounter, 224 mSDsluCounter, 142 mSDsCounter, 0 mSdLazyCounter, 75 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 224 SdHoareTripleChecker+Valid, 205 SdHoareTripleChecker+Invalid, 79 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 75 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:33:14,295 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [224 Valid, 205 Invalid, 79 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 75 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 03:33:14,296 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1044 states. [2022-11-03 03:33:14,371 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1044 to 750. [2022-11-03 03:33:14,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 750 states, 749 states have (on average 1.218958611481976) internal successors, (913), 749 states have internal predecessors, (913), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:14,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 750 states to 750 states and 913 transitions. [2022-11-03 03:33:14,372 INFO L78 Accepts]: Start accepts. Automaton has 750 states and 913 transitions. Word has length 110 [2022-11-03 03:33:14,373 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:33:14,373 INFO L495 AbstractCegarLoop]: Abstraction has 750 states and 913 transitions. [2022-11-03 03:33:14,373 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 16.5) internal successors, (99), 6 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:14,373 INFO L276 IsEmpty]: Start isEmpty. Operand 750 states and 913 transitions. [2022-11-03 03:33:14,375 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2022-11-03 03:33:14,375 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:33:14,375 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:33:14,395 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (59)] Forceful destruction successful, exit code 0 [2022-11-03 03:33:14,582 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 59 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:33:14,583 INFO L420 AbstractCegarLoop]: === Iteration 41 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:33:14,583 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:33:14,583 INFO L85 PathProgramCache]: Analyzing trace with hash 1096895609, now seen corresponding path program 2 times [2022-11-03 03:33:14,583 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:33:14,584 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1924072541] [2022-11-03 03:33:14,584 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-03 03:33:14,584 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:33:14,584 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:33:14,585 INFO L229 MonitoredProcess]: Starting monitored process 60 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:33:14,586 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (60)] Waiting until timeout for monitored process [2022-11-03 03:33:14,764 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-03 03:33:14,764 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 03:33:14,772 INFO L263 TraceCheckSpWp]: Trace formula consists of 567 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:33:14,774 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:33:15,006 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 74 proven. 21 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-11-03 03:33:15,006 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:33:15,079 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 93 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2022-11-03 03:33:15,079 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:33:15,079 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1924072541] [2022-11-03 03:33:15,079 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1924072541] provided 1 perfect and 1 imperfect interpolant sequences [2022-11-03 03:33:15,079 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-03 03:33:15,079 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [8] total 12 [2022-11-03 03:33:15,079 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2048204709] [2022-11-03 03:33:15,080 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:33:15,080 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-03 03:33:15,080 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:33:15,080 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-03 03:33:15,080 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2022-11-03 03:33:15,081 INFO L87 Difference]: Start difference. First operand 750 states and 913 transitions. Second operand has 6 states, 6 states have (on average 16.166666666666668) internal successors, (97), 6 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:15,264 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:33:15,264 INFO L93 Difference]: Finished difference Result 1449 states and 1763 transitions. [2022-11-03 03:33:15,265 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-03 03:33:15,265 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 16.166666666666668) internal successors, (97), 6 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 110 [2022-11-03 03:33:15,265 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:33:15,267 INFO L225 Difference]: With dead ends: 1449 [2022-11-03 03:33:15,267 INFO L226 Difference]: Without dead ends: 769 [2022-11-03 03:33:15,268 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 227 GetRequests, 212 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=213, Unknown=0, NotChecked=0, Total=272 [2022-11-03 03:33:15,268 INFO L413 NwaCegarLoop]: 59 mSDtfsCounter, 208 mSDsluCounter, 134 mSDsCounter, 0 mSdLazyCounter, 72 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 208 SdHoareTripleChecker+Valid, 193 SdHoareTripleChecker+Invalid, 76 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 72 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:33:15,269 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [208 Valid, 193 Invalid, 76 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 72 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 03:33:15,269 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 769 states. [2022-11-03 03:33:15,307 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 769 to 636. [2022-11-03 03:33:15,308 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 636 states, 635 states have (on average 1.1937007874015748) internal successors, (758), 635 states have internal predecessors, (758), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:15,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 636 states to 636 states and 758 transitions. [2022-11-03 03:33:15,309 INFO L78 Accepts]: Start accepts. Automaton has 636 states and 758 transitions. Word has length 110 [2022-11-03 03:33:15,310 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:33:15,310 INFO L495 AbstractCegarLoop]: Abstraction has 636 states and 758 transitions. [2022-11-03 03:33:15,310 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 16.166666666666668) internal successors, (97), 6 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:15,310 INFO L276 IsEmpty]: Start isEmpty. Operand 636 states and 758 transitions. [2022-11-03 03:33:15,312 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2022-11-03 03:33:15,312 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:33:15,313 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:33:15,328 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (60)] Ended with exit code 0 [2022-11-03 03:33:15,527 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 60 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:33:15,528 INFO L420 AbstractCegarLoop]: === Iteration 42 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:33:15,528 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:33:15,528 INFO L85 PathProgramCache]: Analyzing trace with hash 898659493, now seen corresponding path program 5 times [2022-11-03 03:33:15,528 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:33:15,528 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [826955969] [2022-11-03 03:33:15,528 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-03 03:33:15,529 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:33:15,529 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:33:15,529 INFO L229 MonitoredProcess]: Starting monitored process 61 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:33:15,531 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (61)] Waiting until timeout for monitored process [2022-11-03 03:33:15,721 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2022-11-03 03:33:15,721 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 03:33:15,730 INFO L263 TraceCheckSpWp]: Trace formula consists of 567 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:33:15,732 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:33:16,253 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 86 proven. 24 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 03:33:16,253 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:33:16,838 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 28 proven. 82 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 03:33:16,839 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:33:16,839 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [826955969] [2022-11-03 03:33:16,839 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [826955969] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:33:16,839 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [230953659] [2022-11-03 03:33:16,839 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-03 03:33:16,839 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 03:33:16,840 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 03:33:16,841 INFO L229 MonitoredProcess]: Starting monitored process 62 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 03:33:16,857 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (62)] Waiting until timeout for monitored process [2022-11-03 03:33:17,235 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2022-11-03 03:33:17,235 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 03:33:17,258 INFO L263 TraceCheckSpWp]: Trace formula consists of 567 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:33:17,260 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:33:17,645 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 86 proven. 24 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 03:33:17,645 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:33:18,066 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 28 proven. 82 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 03:33:18,066 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [230953659] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:33:18,066 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [97885670] [2022-11-03 03:33:18,066 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-03 03:33:18,066 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:33:18,067 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:33:18,071 INFO L229 MonitoredProcess]: Starting monitored process 63 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:33:18,073 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (63)] Waiting until timeout for monitored process [2022-11-03 03:33:18,258 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2022-11-03 03:33:18,258 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 03:33:18,262 INFO L263 TraceCheckSpWp]: Trace formula consists of 567 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:33:18,264 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:33:18,634 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 86 proven. 24 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 03:33:18,634 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:33:18,998 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 28 proven. 82 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 03:33:18,999 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [97885670] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:33:18,999 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 03:33:18,999 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11, 11] total 20 [2022-11-03 03:33:18,999 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1485165939] [2022-11-03 03:33:18,999 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 03:33:19,000 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2022-11-03 03:33:19,000 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:33:19,001 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-11-03 03:33:19,001 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=71, Invalid=309, Unknown=0, NotChecked=0, Total=380 [2022-11-03 03:33:19,001 INFO L87 Difference]: Start difference. First operand 636 states and 758 transitions. Second operand has 20 states, 20 states have (on average 10.3) internal successors, (206), 20 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:19,339 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:33:19,340 INFO L93 Difference]: Finished difference Result 1100 states and 1315 transitions. [2022-11-03 03:33:19,340 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-11-03 03:33:19,340 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 10.3) internal successors, (206), 20 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 110 [2022-11-03 03:33:19,341 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:33:19,342 INFO L225 Difference]: With dead ends: 1100 [2022-11-03 03:33:19,342 INFO L226 Difference]: Without dead ends: 845 [2022-11-03 03:33:19,342 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 666 GetRequests, 636 SyntacticMatches, 2 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 1 DeprecatedPredicates, 193 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=171, Invalid=699, Unknown=0, NotChecked=0, Total=870 [2022-11-03 03:33:19,343 INFO L413 NwaCegarLoop]: 129 mSDtfsCounter, 206 mSDsluCounter, 854 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 206 SdHoareTripleChecker+Valid, 983 SdHoareTripleChecker+Invalid, 107 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 67 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 03:33:19,343 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [206 Valid, 983 Invalid, 107 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 39 Invalid, 0 Unknown, 67 Unchecked, 0.0s Time] [2022-11-03 03:33:19,344 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 845 states. [2022-11-03 03:33:19,359 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 845 to 290. [2022-11-03 03:33:19,360 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 290 states, 289 states have (on average 1.179930795847751) internal successors, (341), 289 states have internal predecessors, (341), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:19,360 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 290 states to 290 states and 341 transitions. [2022-11-03 03:33:19,360 INFO L78 Accepts]: Start accepts. Automaton has 290 states and 341 transitions. Word has length 110 [2022-11-03 03:33:19,360 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:33:19,360 INFO L495 AbstractCegarLoop]: Abstraction has 290 states and 341 transitions. [2022-11-03 03:33:19,360 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 20 states have (on average 10.3) internal successors, (206), 20 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:19,361 INFO L276 IsEmpty]: Start isEmpty. Operand 290 states and 341 transitions. [2022-11-03 03:33:19,361 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2022-11-03 03:33:19,361 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:33:19,362 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:33:19,373 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (61)] Ended with exit code 0 [2022-11-03 03:33:19,584 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (63)] Ended with exit code 0 [2022-11-03 03:33:19,765 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (62)] Ended with exit code 0 [2022-11-03 03:33:19,962 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 61 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,63 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,62 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt [2022-11-03 03:33:19,963 INFO L420 AbstractCegarLoop]: === Iteration 43 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:33:19,963 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:33:19,963 INFO L85 PathProgramCache]: Analyzing trace with hash -381204185, now seen corresponding path program 2 times [2022-11-03 03:33:19,963 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:33:19,963 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [206705762] [2022-11-03 03:33:19,964 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-03 03:33:19,964 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:33:19,964 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:33:19,965 INFO L229 MonitoredProcess]: Starting monitored process 64 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:33:19,966 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (64)] Waiting until timeout for monitored process [2022-11-03 03:33:20,132 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-03 03:33:20,132 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 03:33:20,141 INFO L263 TraceCheckSpWp]: Trace formula consists of 567 conjuncts, 70 conjunts are in the unsatisfiable core [2022-11-03 03:33:20,144 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:33:21,745 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 0 proven. 111 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:33:21,745 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:33:29,139 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 19 proven. 92 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:33:29,139 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:33:29,139 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [206705762] [2022-11-03 03:33:29,140 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [206705762] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:33:29,140 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [87402159] [2022-11-03 03:33:29,140 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-03 03:33:29,140 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 03:33:29,140 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 03:33:29,142 INFO L229 MonitoredProcess]: Starting monitored process 65 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 03:33:29,143 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (65)] Waiting until timeout for monitored process [2022-11-03 03:33:29,492 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-03 03:33:29,492 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 03:33:29,501 INFO L263 TraceCheckSpWp]: Trace formula consists of 567 conjuncts, 70 conjunts are in the unsatisfiable core [2022-11-03 03:33:29,505 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:33:30,357 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 0 proven. 111 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:33:30,358 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:33:31,439 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 19 proven. 92 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:33:31,439 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [87402159] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:33:31,439 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [695629050] [2022-11-03 03:33:31,439 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-03 03:33:31,440 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:33:31,440 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:33:31,441 INFO L229 MonitoredProcess]: Starting monitored process 66 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:33:31,442 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (66)] Waiting until timeout for monitored process [2022-11-03 03:33:31,604 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-03 03:33:31,604 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 03:33:31,609 INFO L263 TraceCheckSpWp]: Trace formula consists of 567 conjuncts, 73 conjunts are in the unsatisfiable core [2022-11-03 03:33:31,612 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:33:32,549 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 0 proven. 111 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:33:32,549 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:33:33,743 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 19 proven. 92 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:33:33,743 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [695629050] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:33:33,743 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 03:33:33,744 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34, 34, 34, 35, 35] total 68 [2022-11-03 03:33:33,744 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1260839175] [2022-11-03 03:33:33,744 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 03:33:33,745 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 68 states [2022-11-03 03:33:33,745 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:33:33,745 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 68 interpolants. [2022-11-03 03:33:33,747 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=297, Invalid=4259, Unknown=0, NotChecked=0, Total=4556 [2022-11-03 03:33:33,747 INFO L87 Difference]: Start difference. First operand 290 states and 341 transitions. Second operand has 68 states, 68 states have (on average 3.264705882352941) internal successors, (222), 68 states have internal predecessors, (222), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:46,907 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:33:46,907 INFO L93 Difference]: Finished difference Result 1105 states and 1325 transitions. [2022-11-03 03:33:46,907 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 84 states. [2022-11-03 03:33:46,908 INFO L78 Accepts]: Start accepts. Automaton has has 68 states, 68 states have (on average 3.264705882352941) internal successors, (222), 68 states have internal predecessors, (222), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 110 [2022-11-03 03:33:46,908 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:33:46,909 INFO L225 Difference]: With dead ends: 1105 [2022-11-03 03:33:46,909 INFO L226 Difference]: Without dead ends: 1103 [2022-11-03 03:33:46,912 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 728 GetRequests, 592 SyntacticMatches, 7 SemanticMatches, 129 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3403 ImplicationChecksByTransitivity, 19.9s TimeCoverageRelationStatistics Valid=997, Invalid=16033, Unknown=0, NotChecked=0, Total=17030 [2022-11-03 03:33:46,912 INFO L413 NwaCegarLoop]: 160 mSDtfsCounter, 787 mSDsluCounter, 6184 mSDsCounter, 0 mSdLazyCounter, 925 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 787 SdHoareTripleChecker+Valid, 6344 SdHoareTripleChecker+Invalid, 3371 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 925 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 2433 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-11-03 03:33:46,913 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [787 Valid, 6344 Invalid, 3371 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 925 Invalid, 0 Unknown, 2433 Unchecked, 0.8s Time] [2022-11-03 03:33:46,914 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1103 states. [2022-11-03 03:33:46,953 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1103 to 514. [2022-11-03 03:33:46,953 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 514 states, 513 states have (on average 1.1910331384015596) internal successors, (611), 513 states have internal predecessors, (611), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:46,954 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 514 states to 514 states and 611 transitions. [2022-11-03 03:33:46,954 INFO L78 Accepts]: Start accepts. Automaton has 514 states and 611 transitions. Word has length 110 [2022-11-03 03:33:46,954 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:33:46,954 INFO L495 AbstractCegarLoop]: Abstraction has 514 states and 611 transitions. [2022-11-03 03:33:46,955 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 68 states, 68 states have (on average 3.264705882352941) internal successors, (222), 68 states have internal predecessors, (222), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:46,955 INFO L276 IsEmpty]: Start isEmpty. Operand 514 states and 611 transitions. [2022-11-03 03:33:46,956 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2022-11-03 03:33:46,956 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:33:46,956 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:33:46,972 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (64)] Ended with exit code 0 [2022-11-03 03:33:47,160 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (65)] Forceful destruction successful, exit code 0 [2022-11-03 03:33:47,379 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (66)] Ended with exit code 0 [2022-11-03 03:33:47,557 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 64 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,65 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,66 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:33:47,557 INFO L420 AbstractCegarLoop]: === Iteration 44 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:33:47,558 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:33:47,558 INFO L85 PathProgramCache]: Analyzing trace with hash -308817627, now seen corresponding path program 1 times [2022-11-03 03:33:47,558 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:33:47,559 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1398331499] [2022-11-03 03:33:47,559 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:33:47,559 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:33:47,559 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:33:47,560 INFO L229 MonitoredProcess]: Starting monitored process 67 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:33:47,562 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (67)] Waiting until timeout for monitored process [2022-11-03 03:33:47,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:33:47,739 INFO L263 TraceCheckSpWp]: Trace formula consists of 567 conjuncts, 14 conjunts are in the unsatisfiable core [2022-11-03 03:33:47,741 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:33:48,031 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 64 proven. 47 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:33:48,031 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:33:48,295 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 64 proven. 47 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:33:48,295 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:33:48,295 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1398331499] [2022-11-03 03:33:48,295 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1398331499] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:33:48,295 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1466361166] [2022-11-03 03:33:48,295 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:33:48,295 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 03:33:48,295 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 03:33:48,296 INFO L229 MonitoredProcess]: Starting monitored process 68 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 03:33:48,298 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (68)] Waiting until timeout for monitored process [2022-11-03 03:33:48,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:33:48,642 INFO L263 TraceCheckSpWp]: Trace formula consists of 567 conjuncts, 14 conjunts are in the unsatisfiable core [2022-11-03 03:33:48,643 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:33:48,861 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 64 proven. 47 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:33:48,861 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:33:49,006 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 64 proven. 47 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:33:49,006 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1466361166] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:33:49,006 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [522596225] [2022-11-03 03:33:49,006 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:33:49,006 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:33:49,007 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:33:49,007 INFO L229 MonitoredProcess]: Starting monitored process 69 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:33:49,008 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (69)] Waiting until timeout for monitored process [2022-11-03 03:33:49,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:33:49,178 INFO L263 TraceCheckSpWp]: Trace formula consists of 567 conjuncts, 14 conjunts are in the unsatisfiable core [2022-11-03 03:33:49,180 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:33:49,378 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 64 proven. 47 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:33:49,378 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:33:49,509 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 64 proven. 47 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:33:49,509 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [522596225] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:33:49,510 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 03:33:49,510 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12, 12] total 19 [2022-11-03 03:33:49,510 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1863410202] [2022-11-03 03:33:49,510 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 03:33:49,511 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-11-03 03:33:49,511 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:33:49,511 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-11-03 03:33:49,512 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=300, Unknown=0, NotChecked=0, Total=342 [2022-11-03 03:33:49,512 INFO L87 Difference]: Start difference. First operand 514 states and 611 transitions. Second operand has 19 states, 19 states have (on average 8.894736842105264) internal successors, (169), 19 states have internal predecessors, (169), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:50,700 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:33:50,701 INFO L93 Difference]: Finished difference Result 2664 states and 3177 transitions. [2022-11-03 03:33:50,701 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2022-11-03 03:33:50,701 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 8.894736842105264) internal successors, (169), 19 states have internal predecessors, (169), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 110 [2022-11-03 03:33:50,702 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:33:50,705 INFO L225 Difference]: With dead ends: 2664 [2022-11-03 03:33:50,705 INFO L226 Difference]: Without dead ends: 2242 [2022-11-03 03:33:50,707 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 690 GetRequests, 637 SyntacticMatches, 0 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 680 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=647, Invalid=2323, Unknown=0, NotChecked=0, Total=2970 [2022-11-03 03:33:50,707 INFO L413 NwaCegarLoop]: 103 mSDtfsCounter, 1568 mSDsluCounter, 878 mSDsCounter, 0 mSdLazyCounter, 270 mSolverCounterSat, 90 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1568 SdHoareTripleChecker+Valid, 981 SdHoareTripleChecker+Invalid, 360 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 90 IncrementalHoareTripleChecker+Valid, 270 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-03 03:33:50,708 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1568 Valid, 981 Invalid, 360 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [90 Valid, 270 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-11-03 03:33:50,710 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2242 states. [2022-11-03 03:33:50,783 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2242 to 766. [2022-11-03 03:33:50,784 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 766 states, 765 states have (on average 1.1738562091503268) internal successors, (898), 765 states have internal predecessors, (898), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:50,785 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 766 states to 766 states and 898 transitions. [2022-11-03 03:33:50,785 INFO L78 Accepts]: Start accepts. Automaton has 766 states and 898 transitions. Word has length 110 [2022-11-03 03:33:50,785 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:33:50,785 INFO L495 AbstractCegarLoop]: Abstraction has 766 states and 898 transitions. [2022-11-03 03:33:50,785 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 8.894736842105264) internal successors, (169), 19 states have internal predecessors, (169), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:50,785 INFO L276 IsEmpty]: Start isEmpty. Operand 766 states and 898 transitions. [2022-11-03 03:33:50,787 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2022-11-03 03:33:50,788 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:33:50,788 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:33:50,817 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (69)] Ended with exit code 0 [2022-11-03 03:33:50,991 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (68)] Ended with exit code 0 [2022-11-03 03:33:51,197 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (67)] Ended with exit code 0 [2022-11-03 03:33:51,388 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 69 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,68 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,67 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:33:51,389 INFO L420 AbstractCegarLoop]: === Iteration 45 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:33:51,389 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:33:51,389 INFO L85 PathProgramCache]: Analyzing trace with hash -862284443, now seen corresponding path program 3 times [2022-11-03 03:33:51,390 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:33:51,390 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [4389048] [2022-11-03 03:33:51,390 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-03 03:33:51,390 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:33:51,390 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:33:51,391 INFO L229 MonitoredProcess]: Starting monitored process 70 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:33:51,392 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (70)] Waiting until timeout for monitored process [2022-11-03 03:33:51,568 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2022-11-03 03:33:51,569 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 03:33:51,577 INFO L263 TraceCheckSpWp]: Trace formula consists of 567 conjuncts, 11 conjunts are in the unsatisfiable core [2022-11-03 03:33:51,578 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:33:51,789 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 74 proven. 24 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2022-11-03 03:33:51,789 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:33:51,965 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 74 proven. 24 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2022-11-03 03:33:51,965 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:33:51,966 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [4389048] [2022-11-03 03:33:51,966 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [4389048] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:33:51,966 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1347790015] [2022-11-03 03:33:51,966 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-03 03:33:51,966 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 03:33:51,966 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 03:33:51,968 INFO L229 MonitoredProcess]: Starting monitored process 71 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 03:33:51,970 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (71)] Waiting until timeout for monitored process [2022-11-03 03:33:52,324 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2022-11-03 03:33:52,325 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 03:33:52,346 INFO L263 TraceCheckSpWp]: Trace formula consists of 567 conjuncts, 11 conjunts are in the unsatisfiable core [2022-11-03 03:33:52,348 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:33:52,520 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 74 proven. 24 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2022-11-03 03:33:52,521 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:33:52,629 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 74 proven. 24 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2022-11-03 03:33:52,629 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1347790015] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:33:52,629 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1941762707] [2022-11-03 03:33:52,629 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-03 03:33:52,629 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:33:52,629 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:33:52,630 INFO L229 MonitoredProcess]: Starting monitored process 72 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:33:52,631 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (72)] Waiting until timeout for monitored process [2022-11-03 03:33:52,799 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2022-11-03 03:33:52,799 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 03:33:52,803 INFO L263 TraceCheckSpWp]: Trace formula consists of 567 conjuncts, 11 conjunts are in the unsatisfiable core [2022-11-03 03:33:52,805 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:33:52,986 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 74 proven. 24 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2022-11-03 03:33:52,987 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:33:53,095 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 74 proven. 24 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2022-11-03 03:33:53,095 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1941762707] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:33:53,096 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 03:33:53,096 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8, 8] total 14 [2022-11-03 03:33:53,096 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [545461321] [2022-11-03 03:33:53,096 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 03:33:53,097 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-11-03 03:33:53,097 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:33:53,097 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-11-03 03:33:53,097 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2022-11-03 03:33:53,097 INFO L87 Difference]: Start difference. First operand 766 states and 898 transitions. Second operand has 14 states, 14 states have (on average 11.285714285714286) internal successors, (158), 14 states have internal predecessors, (158), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:53,691 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:33:53,691 INFO L93 Difference]: Finished difference Result 3108 states and 3636 transitions. [2022-11-03 03:33:53,692 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2022-11-03 03:33:53,692 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 11.285714285714286) internal successors, (158), 14 states have internal predecessors, (158), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 110 [2022-11-03 03:33:53,692 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:33:53,698 INFO L225 Difference]: With dead ends: 3108 [2022-11-03 03:33:53,698 INFO L226 Difference]: Without dead ends: 2458 [2022-11-03 03:33:53,699 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 674 GetRequests, 642 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 183 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=321, Invalid=801, Unknown=0, NotChecked=0, Total=1122 [2022-11-03 03:33:53,700 INFO L413 NwaCegarLoop]: 75 mSDtfsCounter, 984 mSDsluCounter, 357 mSDsCounter, 0 mSdLazyCounter, 75 mSolverCounterSat, 49 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 984 SdHoareTripleChecker+Valid, 432 SdHoareTripleChecker+Invalid, 124 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 49 IncrementalHoareTripleChecker+Valid, 75 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:33:53,700 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [984 Valid, 432 Invalid, 124 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [49 Valid, 75 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 03:33:53,702 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2458 states. [2022-11-03 03:33:53,776 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2458 to 896. [2022-11-03 03:33:53,777 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 896 states, 895 states have (on average 1.1675977653631284) internal successors, (1045), 895 states have internal predecessors, (1045), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:53,778 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 896 states to 896 states and 1045 transitions. [2022-11-03 03:33:53,778 INFO L78 Accepts]: Start accepts. Automaton has 896 states and 1045 transitions. Word has length 110 [2022-11-03 03:33:53,778 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:33:53,778 INFO L495 AbstractCegarLoop]: Abstraction has 896 states and 1045 transitions. [2022-11-03 03:33:53,779 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 11.285714285714286) internal successors, (158), 14 states have internal predecessors, (158), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:53,779 INFO L276 IsEmpty]: Start isEmpty. Operand 896 states and 1045 transitions. [2022-11-03 03:33:53,780 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2022-11-03 03:33:53,780 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:33:53,780 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:33:53,784 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (71)] Forceful destruction successful, exit code 0 [2022-11-03 03:33:53,993 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (70)] Ended with exit code 0 [2022-11-03 03:33:54,215 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (72)] Ended with exit code 0 [2022-11-03 03:33:54,384 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 71 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,70 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,72 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:33:54,385 INFO L420 AbstractCegarLoop]: === Iteration 46 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:33:54,385 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:33:54,385 INFO L85 PathProgramCache]: Analyzing trace with hash -1257223191, now seen corresponding path program 4 times [2022-11-03 03:33:54,385 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:33:54,386 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [2066634285] [2022-11-03 03:33:54,386 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-03 03:33:54,386 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:33:54,386 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:33:54,387 INFO L229 MonitoredProcess]: Starting monitored process 73 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:33:54,388 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (73)] Waiting until timeout for monitored process [2022-11-03 03:33:54,552 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-03 03:33:54,552 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 03:33:54,560 INFO L263 TraceCheckSpWp]: Trace formula consists of 567 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:33:54,562 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:33:54,772 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 74 proven. 19 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2022-11-03 03:33:54,772 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:33:54,821 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 91 proven. 0 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2022-11-03 03:33:54,821 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:33:54,821 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [2066634285] [2022-11-03 03:33:54,821 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [2066634285] provided 1 perfect and 1 imperfect interpolant sequences [2022-11-03 03:33:54,821 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-03 03:33:54,822 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [8] total 10 [2022-11-03 03:33:54,822 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [548407200] [2022-11-03 03:33:54,822 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:33:54,822 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-03 03:33:54,822 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:33:54,822 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-03 03:33:54,823 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2022-11-03 03:33:54,823 INFO L87 Difference]: Start difference. First operand 896 states and 1045 transitions. Second operand has 6 states, 6 states have (on average 15.5) internal successors, (93), 6 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:55,041 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:33:55,041 INFO L93 Difference]: Finished difference Result 1870 states and 2190 transitions. [2022-11-03 03:33:55,041 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-03 03:33:55,042 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 15.5) internal successors, (93), 6 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 110 [2022-11-03 03:33:55,042 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:33:55,044 INFO L225 Difference]: With dead ends: 1870 [2022-11-03 03:33:55,044 INFO L226 Difference]: Without dead ends: 1016 [2022-11-03 03:33:55,045 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 227 GetRequests, 214 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=53, Invalid=157, Unknown=0, NotChecked=0, Total=210 [2022-11-03 03:33:55,046 INFO L413 NwaCegarLoop]: 99 mSDtfsCounter, 150 mSDsluCounter, 164 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 150 SdHoareTripleChecker+Valid, 263 SdHoareTripleChecker+Invalid, 81 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:33:55,046 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [150 Valid, 263 Invalid, 81 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 03:33:55,047 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1016 states. [2022-11-03 03:33:55,148 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1016 to 896. [2022-11-03 03:33:55,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 896 states, 895 states have (on average 1.15195530726257) internal successors, (1031), 895 states have internal predecessors, (1031), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:55,149 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 896 states to 896 states and 1031 transitions. [2022-11-03 03:33:55,149 INFO L78 Accepts]: Start accepts. Automaton has 896 states and 1031 transitions. Word has length 110 [2022-11-03 03:33:55,150 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:33:55,150 INFO L495 AbstractCegarLoop]: Abstraction has 896 states and 1031 transitions. [2022-11-03 03:33:55,150 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 15.5) internal successors, (93), 6 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:55,150 INFO L276 IsEmpty]: Start isEmpty. Operand 896 states and 1031 transitions. [2022-11-03 03:33:55,151 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2022-11-03 03:33:55,151 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:33:55,152 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:33:55,170 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (73)] Forceful destruction successful, exit code 0 [2022-11-03 03:33:55,365 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 73 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:33:55,366 INFO L420 AbstractCegarLoop]: === Iteration 47 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:33:55,366 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:33:55,366 INFO L85 PathProgramCache]: Analyzing trace with hash -354138583, now seen corresponding path program 1 times [2022-11-03 03:33:55,366 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:33:55,367 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1770225636] [2022-11-03 03:33:55,367 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:33:55,367 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:33:55,367 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:33:55,368 INFO L229 MonitoredProcess]: Starting monitored process 74 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:33:55,369 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (74)] Waiting until timeout for monitored process [2022-11-03 03:33:55,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:33:55,547 INFO L263 TraceCheckSpWp]: Trace formula consists of 567 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-03 03:33:55,550 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:33:55,607 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 66 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2022-11-03 03:33:55,607 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:33:55,607 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:33:55,607 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1770225636] [2022-11-03 03:33:55,607 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1770225636] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:33:55,607 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:33:55,607 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-03 03:33:55,607 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1255319952] [2022-11-03 03:33:55,607 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:33:55,608 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-03 03:33:55,608 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:33:55,608 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-03 03:33:55,608 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-03 03:33:55,608 INFO L87 Difference]: Start difference. First operand 896 states and 1031 transitions. Second operand has 5 states, 5 states have (on average 14.6) internal successors, (73), 5 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:55,742 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:33:55,742 INFO L93 Difference]: Finished difference Result 1704 states and 1973 transitions. [2022-11-03 03:33:55,742 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-03 03:33:55,742 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 14.6) internal successors, (73), 5 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 110 [2022-11-03 03:33:55,743 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:33:55,744 INFO L225 Difference]: With dead ends: 1704 [2022-11-03 03:33:55,744 INFO L226 Difference]: Without dead ends: 1258 [2022-11-03 03:33:55,745 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 107 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2022-11-03 03:33:55,745 INFO L413 NwaCegarLoop]: 90 mSDtfsCounter, 174 mSDsluCounter, 121 mSDsCounter, 0 mSdLazyCounter, 24 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 174 SdHoareTripleChecker+Valid, 211 SdHoareTripleChecker+Invalid, 24 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 24 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 03:33:55,745 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [174 Valid, 211 Invalid, 24 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 24 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-03 03:33:55,746 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1258 states. [2022-11-03 03:33:55,818 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1258 to 896. [2022-11-03 03:33:55,819 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 896 states, 895 states have (on average 1.1385474860335196) internal successors, (1019), 895 states have internal predecessors, (1019), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:55,820 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 896 states to 896 states and 1019 transitions. [2022-11-03 03:33:55,820 INFO L78 Accepts]: Start accepts. Automaton has 896 states and 1019 transitions. Word has length 110 [2022-11-03 03:33:55,820 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:33:55,821 INFO L495 AbstractCegarLoop]: Abstraction has 896 states and 1019 transitions. [2022-11-03 03:33:55,821 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 14.6) internal successors, (73), 5 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:55,821 INFO L276 IsEmpty]: Start isEmpty. Operand 896 states and 1019 transitions. [2022-11-03 03:33:55,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2022-11-03 03:33:55,823 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:33:55,823 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:33:55,836 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (74)] Forceful destruction successful, exit code 0 [2022-11-03 03:33:56,036 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 74 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:33:56,036 INFO L420 AbstractCegarLoop]: === Iteration 48 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:33:56,036 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:33:56,037 INFO L85 PathProgramCache]: Analyzing trace with hash 2045567655, now seen corresponding path program 1 times [2022-11-03 03:33:56,037 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:33:56,037 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1528107507] [2022-11-03 03:33:56,037 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:33:56,037 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:33:56,037 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:33:56,038 INFO L229 MonitoredProcess]: Starting monitored process 75 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:33:56,039 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (75)] Waiting until timeout for monitored process [2022-11-03 03:33:56,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:33:56,227 INFO L263 TraceCheckSpWp]: Trace formula consists of 567 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:33:56,229 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:33:56,337 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 38 proven. 0 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2022-11-03 03:33:56,337 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:33:56,338 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:33:56,338 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1528107507] [2022-11-03 03:33:56,338 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1528107507] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:33:56,338 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:33:56,338 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-11-03 03:33:56,338 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [664091706] [2022-11-03 03:33:56,338 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:33:56,338 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-03 03:33:56,339 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:33:56,339 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-03 03:33:56,339 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-11-03 03:33:56,339 INFO L87 Difference]: Start difference. First operand 896 states and 1019 transitions. Second operand has 8 states, 8 states have (on average 8.0) internal successors, (64), 8 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:56,536 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:33:56,536 INFO L93 Difference]: Finished difference Result 2031 states and 2324 transitions. [2022-11-03 03:33:56,537 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-03 03:33:56,537 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 8.0) internal successors, (64), 8 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 110 [2022-11-03 03:33:56,537 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:33:56,538 INFO L225 Difference]: With dead ends: 2031 [2022-11-03 03:33:56,538 INFO L226 Difference]: Without dead ends: 1177 [2022-11-03 03:33:56,539 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 103 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2022-11-03 03:33:56,539 INFO L413 NwaCegarLoop]: 62 mSDtfsCounter, 109 mSDsluCounter, 300 mSDsCounter, 0 mSdLazyCounter, 65 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 109 SdHoareTripleChecker+Valid, 362 SdHoareTripleChecker+Invalid, 88 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 65 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 21 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:33:56,540 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [109 Valid, 362 Invalid, 88 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 65 Invalid, 0 Unknown, 21 Unchecked, 0.1s Time] [2022-11-03 03:33:56,541 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1177 states. [2022-11-03 03:33:56,614 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1177 to 922. [2022-11-03 03:33:56,615 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 922 states, 921 states have (on average 1.1422366992399566) internal successors, (1052), 921 states have internal predecessors, (1052), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:56,616 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 922 states to 922 states and 1052 transitions. [2022-11-03 03:33:56,616 INFO L78 Accepts]: Start accepts. Automaton has 922 states and 1052 transitions. Word has length 110 [2022-11-03 03:33:56,616 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:33:56,617 INFO L495 AbstractCegarLoop]: Abstraction has 922 states and 1052 transitions. [2022-11-03 03:33:56,617 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 8.0) internal successors, (64), 8 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:56,617 INFO L276 IsEmpty]: Start isEmpty. Operand 922 states and 1052 transitions. [2022-11-03 03:33:56,618 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2022-11-03 03:33:56,619 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:33:56,619 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:33:56,633 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (75)] Forceful destruction successful, exit code 0 [2022-11-03 03:33:56,832 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 75 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:33:56,832 INFO L420 AbstractCegarLoop]: === Iteration 49 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:33:56,833 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:33:56,833 INFO L85 PathProgramCache]: Analyzing trace with hash -1745793433, now seen corresponding path program 1 times [2022-11-03 03:33:56,833 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:33:56,833 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [262138117] [2022-11-03 03:33:56,833 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:33:56,833 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:33:56,834 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:33:56,834 INFO L229 MonitoredProcess]: Starting monitored process 76 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:33:56,835 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (76)] Waiting until timeout for monitored process [2022-11-03 03:33:57,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:33:57,022 INFO L263 TraceCheckSpWp]: Trace formula consists of 567 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:33:57,024 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:33:57,136 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 34 proven. 0 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2022-11-03 03:33:57,136 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:33:57,136 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:33:57,137 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [262138117] [2022-11-03 03:33:57,137 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [262138117] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:33:57,137 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:33:57,137 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-11-03 03:33:57,137 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1990878396] [2022-11-03 03:33:57,137 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:33:57,137 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-03 03:33:57,138 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:33:57,138 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-03 03:33:57,138 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-11-03 03:33:57,138 INFO L87 Difference]: Start difference. First operand 922 states and 1052 transitions. Second operand has 8 states, 8 states have (on average 7.75) internal successors, (62), 8 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:57,317 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:33:57,317 INFO L93 Difference]: Finished difference Result 1862 states and 2123 transitions. [2022-11-03 03:33:57,317 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-03 03:33:57,318 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 7.75) internal successors, (62), 8 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 110 [2022-11-03 03:33:57,318 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:33:57,319 INFO L225 Difference]: With dead ends: 1862 [2022-11-03 03:33:57,319 INFO L226 Difference]: Without dead ends: 1004 [2022-11-03 03:33:57,319 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 103 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2022-11-03 03:33:57,320 INFO L413 NwaCegarLoop]: 59 mSDtfsCounter, 144 mSDsluCounter, 231 mSDsCounter, 0 mSdLazyCounter, 59 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 144 SdHoareTripleChecker+Valid, 290 SdHoareTripleChecker+Invalid, 83 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 59 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 22 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:33:57,320 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [144 Valid, 290 Invalid, 83 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 59 Invalid, 0 Unknown, 22 Unchecked, 0.1s Time] [2022-11-03 03:33:57,321 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1004 states. [2022-11-03 03:33:57,413 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1004 to 918. [2022-11-03 03:33:57,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 918 states, 917 states have (on average 1.1406761177753544) internal successors, (1046), 917 states have internal predecessors, (1046), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:57,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 918 states to 918 states and 1046 transitions. [2022-11-03 03:33:57,415 INFO L78 Accepts]: Start accepts. Automaton has 918 states and 1046 transitions. Word has length 110 [2022-11-03 03:33:57,415 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:33:57,415 INFO L495 AbstractCegarLoop]: Abstraction has 918 states and 1046 transitions. [2022-11-03 03:33:57,415 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 7.75) internal successors, (62), 8 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:57,415 INFO L276 IsEmpty]: Start isEmpty. Operand 918 states and 1046 transitions. [2022-11-03 03:33:57,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2022-11-03 03:33:57,416 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:33:57,417 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:33:57,428 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (76)] Ended with exit code 0 [2022-11-03 03:33:57,626 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 76 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:33:57,627 INFO L420 AbstractCegarLoop]: === Iteration 50 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:33:57,627 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:33:57,627 INFO L85 PathProgramCache]: Analyzing trace with hash 970181033, now seen corresponding path program 1 times [2022-11-03 03:33:57,628 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:33:57,628 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [2012511434] [2022-11-03 03:33:57,628 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:33:57,628 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:33:57,628 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:33:57,629 INFO L229 MonitoredProcess]: Starting monitored process 77 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:33:57,630 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (77)] Waiting until timeout for monitored process [2022-11-03 03:33:57,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:33:57,801 INFO L263 TraceCheckSpWp]: Trace formula consists of 567 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:33:57,803 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:33:57,920 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 30 proven. 0 refuted. 0 times theorem prover too weak. 81 trivial. 0 not checked. [2022-11-03 03:33:57,921 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:33:57,921 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:33:57,921 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [2012511434] [2022-11-03 03:33:57,921 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [2012511434] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:33:57,921 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:33:57,922 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-11-03 03:33:57,922 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [893754163] [2022-11-03 03:33:57,922 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:33:57,922 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-03 03:33:57,923 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:33:57,923 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-03 03:33:57,923 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-11-03 03:33:57,923 INFO L87 Difference]: Start difference. First operand 918 states and 1046 transitions. Second operand has 8 states, 8 states have (on average 7.625) internal successors, (61), 8 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:58,164 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:33:58,164 INFO L93 Difference]: Finished difference Result 1446 states and 1643 transitions. [2022-11-03 03:33:58,164 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-03 03:33:58,165 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 7.625) internal successors, (61), 8 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 110 [2022-11-03 03:33:58,165 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:33:58,166 INFO L225 Difference]: With dead ends: 1446 [2022-11-03 03:33:58,167 INFO L226 Difference]: Without dead ends: 996 [2022-11-03 03:33:58,167 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 103 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2022-11-03 03:33:58,168 INFO L413 NwaCegarLoop]: 56 mSDtfsCounter, 107 mSDsluCounter, 318 mSDsCounter, 0 mSdLazyCounter, 61 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 107 SdHoareTripleChecker+Valid, 374 SdHoareTripleChecker+Invalid, 90 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 61 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 27 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:33:58,168 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [107 Valid, 374 Invalid, 90 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 61 Invalid, 0 Unknown, 27 Unchecked, 0.1s Time] [2022-11-03 03:33:58,171 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 996 states. [2022-11-03 03:33:58,284 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 996 to 918. [2022-11-03 03:33:58,285 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 918 states, 917 states have (on average 1.138495092693566) internal successors, (1044), 917 states have internal predecessors, (1044), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:58,286 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 918 states to 918 states and 1044 transitions. [2022-11-03 03:33:58,286 INFO L78 Accepts]: Start accepts. Automaton has 918 states and 1044 transitions. Word has length 110 [2022-11-03 03:33:58,286 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:33:58,286 INFO L495 AbstractCegarLoop]: Abstraction has 918 states and 1044 transitions. [2022-11-03 03:33:58,286 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 7.625) internal successors, (61), 8 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:58,286 INFO L276 IsEmpty]: Start isEmpty. Operand 918 states and 1044 transitions. [2022-11-03 03:33:58,287 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2022-11-03 03:33:58,287 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:33:58,287 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:33:58,298 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (77)] Ended with exit code 0 [2022-11-03 03:33:58,488 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 77 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:33:58,488 INFO L420 AbstractCegarLoop]: === Iteration 51 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:33:58,488 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:33:58,488 INFO L85 PathProgramCache]: Analyzing trace with hash 1219866921, now seen corresponding path program 1 times [2022-11-03 03:33:58,489 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:33:58,489 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [414043021] [2022-11-03 03:33:58,489 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:33:58,489 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:33:58,489 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:33:58,490 INFO L229 MonitoredProcess]: Starting monitored process 78 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:33:58,491 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (78)] Waiting until timeout for monitored process [2022-11-03 03:33:58,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:33:58,663 INFO L263 TraceCheckSpWp]: Trace formula consists of 567 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:33:58,665 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:33:58,767 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 85 trivial. 0 not checked. [2022-11-03 03:33:58,767 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:33:58,767 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:33:58,767 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [414043021] [2022-11-03 03:33:58,767 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [414043021] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:33:58,767 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:33:58,767 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-11-03 03:33:58,768 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [16718160] [2022-11-03 03:33:58,768 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:33:58,768 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-03 03:33:58,768 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:33:58,768 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-03 03:33:58,769 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-11-03 03:33:58,769 INFO L87 Difference]: Start difference. First operand 918 states and 1044 transitions. Second operand has 8 states, 8 states have (on average 7.5) internal successors, (60), 8 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:58,951 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:33:58,951 INFO L93 Difference]: Finished difference Result 1440 states and 1633 transitions. [2022-11-03 03:33:58,951 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-03 03:33:58,952 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 7.5) internal successors, (60), 8 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 110 [2022-11-03 03:33:58,953 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:33:58,954 INFO L225 Difference]: With dead ends: 1440 [2022-11-03 03:33:58,954 INFO L226 Difference]: Without dead ends: 988 [2022-11-03 03:33:58,955 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 103 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2022-11-03 03:33:58,955 INFO L413 NwaCegarLoop]: 53 mSDtfsCounter, 140 mSDsluCounter, 217 mSDsCounter, 0 mSdLazyCounter, 55 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 140 SdHoareTripleChecker+Valid, 270 SdHoareTripleChecker+Invalid, 77 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 55 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 20 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:33:58,955 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [140 Valid, 270 Invalid, 77 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 55 Invalid, 0 Unknown, 20 Unchecked, 0.1s Time] [2022-11-03 03:33:58,956 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 988 states. [2022-11-03 03:33:59,024 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 988 to 918. [2022-11-03 03:33:59,025 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 918 states, 917 states have (on average 1.1363140676117776) internal successors, (1042), 917 states have internal predecessors, (1042), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:59,025 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 918 states to 918 states and 1042 transitions. [2022-11-03 03:33:59,026 INFO L78 Accepts]: Start accepts. Automaton has 918 states and 1042 transitions. Word has length 110 [2022-11-03 03:33:59,026 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:33:59,026 INFO L495 AbstractCegarLoop]: Abstraction has 918 states and 1042 transitions. [2022-11-03 03:33:59,026 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 7.5) internal successors, (60), 8 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:59,026 INFO L276 IsEmpty]: Start isEmpty. Operand 918 states and 1042 transitions. [2022-11-03 03:33:59,028 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2022-11-03 03:33:59,028 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:33:59,028 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:33:59,042 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (78)] Forceful destruction successful, exit code 0 [2022-11-03 03:33:59,228 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 78 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:33:59,229 INFO L420 AbstractCegarLoop]: === Iteration 52 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:33:59,229 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:33:59,229 INFO L85 PathProgramCache]: Analyzing trace with hash 649836713, now seen corresponding path program 1 times [2022-11-03 03:33:59,229 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:33:59,229 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [581245759] [2022-11-03 03:33:59,229 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:33:59,230 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:33:59,230 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:33:59,230 INFO L229 MonitoredProcess]: Starting monitored process 79 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:33:59,233 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (79)] Waiting until timeout for monitored process [2022-11-03 03:33:59,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:33:59,403 INFO L263 TraceCheckSpWp]: Trace formula consists of 567 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:33:59,406 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:33:59,506 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 89 trivial. 0 not checked. [2022-11-03 03:33:59,507 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:33:59,507 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:33:59,507 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [581245759] [2022-11-03 03:33:59,507 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [581245759] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:33:59,507 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:33:59,507 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-11-03 03:33:59,507 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [168756544] [2022-11-03 03:33:59,507 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:33:59,508 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-03 03:33:59,508 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:33:59,508 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-03 03:33:59,508 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-11-03 03:33:59,508 INFO L87 Difference]: Start difference. First operand 918 states and 1042 transitions. Second operand has 8 states, 8 states have (on average 7.375) internal successors, (59), 8 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:59,702 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:33:59,703 INFO L93 Difference]: Finished difference Result 1395 states and 1581 transitions. [2022-11-03 03:33:59,703 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-03 03:33:59,703 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 7.375) internal successors, (59), 8 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 110 [2022-11-03 03:33:59,703 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:33:59,705 INFO L225 Difference]: With dead ends: 1395 [2022-11-03 03:33:59,705 INFO L226 Difference]: Without dead ends: 941 [2022-11-03 03:33:59,705 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 103 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2022-11-03 03:33:59,706 INFO L413 NwaCegarLoop]: 50 mSDtfsCounter, 105 mSDsluCounter, 304 mSDsCounter, 0 mSdLazyCounter, 57 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 105 SdHoareTripleChecker+Valid, 354 SdHoareTripleChecker+Invalid, 90 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 57 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 31 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:33:59,706 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [105 Valid, 354 Invalid, 90 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 57 Invalid, 0 Unknown, 31 Unchecked, 0.1s Time] [2022-11-03 03:33:59,707 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 941 states. [2022-11-03 03:33:59,776 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 941 to 910. [2022-11-03 03:33:59,776 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 910 states, 909 states have (on average 1.1364136413641364) internal successors, (1033), 909 states have internal predecessors, (1033), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:59,777 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 910 states to 910 states and 1033 transitions. [2022-11-03 03:33:59,777 INFO L78 Accepts]: Start accepts. Automaton has 910 states and 1033 transitions. Word has length 110 [2022-11-03 03:33:59,778 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:33:59,778 INFO L495 AbstractCegarLoop]: Abstraction has 910 states and 1033 transitions. [2022-11-03 03:33:59,778 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 7.375) internal successors, (59), 8 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:59,778 INFO L276 IsEmpty]: Start isEmpty. Operand 910 states and 1033 transitions. [2022-11-03 03:33:59,780 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2022-11-03 03:33:59,780 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:33:59,780 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1] [2022-11-03 03:33:59,790 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (79)] Forceful destruction successful, exit code 0 [2022-11-03 03:33:59,980 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 79 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:33:59,980 INFO L420 AbstractCegarLoop]: === Iteration 53 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:33:59,981 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:33:59,981 INFO L85 PathProgramCache]: Analyzing trace with hash 837437309, now seen corresponding path program 2 times [2022-11-03 03:33:59,981 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:33:59,981 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1110389293] [2022-11-03 03:33:59,982 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-03 03:33:59,982 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:33:59,982 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:33:59,983 INFO L229 MonitoredProcess]: Starting monitored process 80 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:33:59,984 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (80)] Waiting until timeout for monitored process [2022-11-03 03:34:00,156 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-03 03:34:00,156 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 03:34:00,165 INFO L263 TraceCheckSpWp]: Trace formula consists of 567 conjuncts, 16 conjunts are in the unsatisfiable core [2022-11-03 03:34:00,167 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:34:00,803 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 65 proven. 46 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:34:00,803 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:34:01,266 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 66 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:34:01,266 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:34:01,266 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1110389293] [2022-11-03 03:34:01,266 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1110389293] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:34:01,266 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [542672301] [2022-11-03 03:34:01,266 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-03 03:34:01,266 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 03:34:01,266 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 03:34:01,267 INFO L229 MonitoredProcess]: Starting monitored process 81 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 03:34:01,269 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (81)] Waiting until timeout for monitored process [2022-11-03 03:34:01,601 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-03 03:34:01,601 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 03:34:01,608 INFO L263 TraceCheckSpWp]: Trace formula consists of 567 conjuncts, 16 conjunts are in the unsatisfiable core [2022-11-03 03:34:01,610 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:34:02,034 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 65 proven. 46 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:34:02,034 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:34:02,221 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 66 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:34:02,222 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [542672301] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:34:02,222 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1832787837] [2022-11-03 03:34:02,222 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-03 03:34:02,222 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:34:02,222 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:34:02,223 INFO L229 MonitoredProcess]: Starting monitored process 82 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:34:02,224 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (82)] Waiting until timeout for monitored process [2022-11-03 03:34:02,379 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-03 03:34:02,379 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 03:34:02,383 INFO L263 TraceCheckSpWp]: Trace formula consists of 567 conjuncts, 16 conjunts are in the unsatisfiable core [2022-11-03 03:34:02,384 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:34:02,817 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 65 proven. 46 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:34:02,817 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:34:03,031 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 66 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:34:03,031 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1832787837] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:34:03,031 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 03:34:03,032 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 14, 15, 14, 15, 14] total 27 [2022-11-03 03:34:03,032 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [216971793] [2022-11-03 03:34:03,032 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 03:34:03,033 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2022-11-03 03:34:03,033 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:34:03,038 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2022-11-03 03:34:03,039 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=82, Invalid=620, Unknown=0, NotChecked=0, Total=702 [2022-11-03 03:34:03,039 INFO L87 Difference]: Start difference. First operand 910 states and 1033 transitions. Second operand has 27 states, 27 states have (on average 6.925925925925926) internal successors, (187), 27 states have internal predecessors, (187), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:34:04,531 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:34:04,531 INFO L93 Difference]: Finished difference Result 3390 states and 3862 transitions. [2022-11-03 03:34:04,531 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2022-11-03 03:34:04,531 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 27 states have (on average 6.925925925925926) internal successors, (187), 27 states have internal predecessors, (187), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 110 [2022-11-03 03:34:04,532 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:34:04,534 INFO L225 Difference]: With dead ends: 3390 [2022-11-03 03:34:04,534 INFO L226 Difference]: Without dead ends: 2536 [2022-11-03 03:34:04,535 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 692 GetRequests, 631 SyntacticMatches, 2 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 936 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=435, Invalid=3225, Unknown=0, NotChecked=0, Total=3660 [2022-11-03 03:34:04,535 INFO L413 NwaCegarLoop]: 141 mSDtfsCounter, 260 mSDsluCounter, 2258 mSDsCounter, 0 mSdLazyCounter, 113 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 260 SdHoareTripleChecker+Valid, 2399 SdHoareTripleChecker+Invalid, 303 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 113 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 189 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:34:04,535 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [260 Valid, 2399 Invalid, 303 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 113 Invalid, 0 Unknown, 189 Unchecked, 0.1s Time] [2022-11-03 03:34:04,537 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2536 states. [2022-11-03 03:34:04,694 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2536 to 1719. [2022-11-03 03:34:04,696 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1719 states, 1718 states have (on average 1.139115250291036) internal successors, (1957), 1718 states have internal predecessors, (1957), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:34:04,698 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1719 states to 1719 states and 1957 transitions. [2022-11-03 03:34:04,698 INFO L78 Accepts]: Start accepts. Automaton has 1719 states and 1957 transitions. Word has length 110 [2022-11-03 03:34:04,699 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:34:04,699 INFO L495 AbstractCegarLoop]: Abstraction has 1719 states and 1957 transitions. [2022-11-03 03:34:04,699 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 27 states have (on average 6.925925925925926) internal successors, (187), 27 states have internal predecessors, (187), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:34:04,699 INFO L276 IsEmpty]: Start isEmpty. Operand 1719 states and 1957 transitions. [2022-11-03 03:34:04,701 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2022-11-03 03:34:04,702 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:34:04,702 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1] [2022-11-03 03:34:04,716 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (80)] Forceful destruction successful, exit code 0 [2022-11-03 03:34:04,959 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (82)] Forceful destruction successful, exit code 0 [2022-11-03 03:34:05,124 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (81)] Forceful destruction successful, exit code 0 [2022-11-03 03:34:05,315 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 80 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,82 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,81 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt [2022-11-03 03:34:05,315 INFO L420 AbstractCegarLoop]: === Iteration 54 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:34:05,316 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:34:05,316 INFO L85 PathProgramCache]: Analyzing trace with hash 909823867, now seen corresponding path program 2 times [2022-11-03 03:34:05,316 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:34:05,317 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [850781186] [2022-11-03 03:34:05,317 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-03 03:34:05,317 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:34:05,317 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:34:05,318 INFO L229 MonitoredProcess]: Starting monitored process 83 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:34:05,320 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (83)] Waiting until timeout for monitored process [2022-11-03 03:34:05,489 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-03 03:34:05,490 INFO L229 tOrderPrioritization]: Conjunction of SSA is sat [2022-11-03 03:34:05,490 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-03 03:34:05,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-03 03:34:05,932 INFO L130 FreeRefinementEngine]: Strategy WALRUS found a feasible trace [2022-11-03 03:34:05,933 INFO L359 BasicCegarLoop]: Counterexample is feasible [2022-11-03 03:34:05,934 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-11-03 03:34:05,974 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (83)] Ended with exit code 0 [2022-11-03 03:34:06,158 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 83 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:34:06,162 INFO L444 BasicCegarLoop]: Path program histogram: [5, 4, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:34:06,166 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-03 03:34:06,364 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:34:06,364 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:34:06,364 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:34:06,365 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:34:06,443 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 03.11 03:34:06 BoogieIcfgContainer [2022-11-03 03:34:06,444 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-03 03:34:06,445 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-03 03:34:06,445 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-03 03:34:06,445 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-03 03:34:06,445 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 03:31:54" (3/4) ... [2022-11-03 03:34:06,447 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2022-11-03 03:34:06,573 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:34:06,573 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:34:06,573 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:34:06,574 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:34:06,774 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/witness.graphml [2022-11-03 03:34:06,774 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-03 03:34:06,774 INFO L158 Benchmark]: Toolchain (without parser) took 133631.86ms. Allocated memory was 62.9MB in the beginning and 383.8MB in the end (delta: 320.9MB). Free memory was 41.4MB in the beginning and 145.6MB in the end (delta: -104.1MB). Peak memory consumption was 215.8MB. Max. memory is 16.1GB. [2022-11-03 03:34:06,775 INFO L158 Benchmark]: CDTParser took 0.36ms. Allocated memory is still 62.9MB. Free memory was 42.3MB in the beginning and 42.3MB in the end (delta: 52.2kB). There was no memory consumed. Max. memory is 16.1GB. [2022-11-03 03:34:06,775 INFO L158 Benchmark]: CACSL2BoogieTranslator took 416.34ms. Allocated memory is still 62.9MB. Free memory was 41.2MB in the beginning and 42.4MB in the end (delta: -1.2MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. [2022-11-03 03:34:06,775 INFO L158 Benchmark]: Boogie Procedure Inliner took 71.49ms. Allocated memory is still 62.9MB. Free memory was 42.4MB in the beginning and 39.7MB in the end (delta: 2.7MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-11-03 03:34:06,776 INFO L158 Benchmark]: Boogie Preprocessor took 38.96ms. Allocated memory is still 62.9MB. Free memory was 39.7MB in the beginning and 37.6MB in the end (delta: 2.1MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-11-03 03:34:06,776 INFO L158 Benchmark]: RCFGBuilder took 849.42ms. Allocated memory is still 62.9MB. Free memory was 37.6MB in the beginning and 33.9MB in the end (delta: 3.6MB). Peak memory consumption was 17.1MB. Max. memory is 16.1GB. [2022-11-03 03:34:06,781 INFO L158 Benchmark]: TraceAbstraction took 131910.47ms. Allocated memory was 62.9MB in the beginning and 383.8MB in the end (delta: 320.9MB). Free memory was 33.4MB in the beginning and 189.2MB in the end (delta: -155.8MB). Peak memory consumption was 163.9MB. Max. memory is 16.1GB. [2022-11-03 03:34:06,781 INFO L158 Benchmark]: Witness Printer took 329.39ms. Allocated memory is still 383.8MB. Free memory was 188.5MB in the beginning and 145.6MB in the end (delta: 43.0MB). Peak memory consumption was 44.0MB. Max. memory is 16.1GB. [2022-11-03 03:34:06,782 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.36ms. Allocated memory is still 62.9MB. Free memory was 42.3MB in the beginning and 42.3MB in the end (delta: 52.2kB). There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 416.34ms. Allocated memory is still 62.9MB. Free memory was 41.2MB in the beginning and 42.4MB in the end (delta: -1.2MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 71.49ms. Allocated memory is still 62.9MB. Free memory was 42.4MB in the beginning and 39.7MB in the end (delta: 2.7MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * Boogie Preprocessor took 38.96ms. Allocated memory is still 62.9MB. Free memory was 39.7MB in the beginning and 37.6MB in the end (delta: 2.1MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * RCFGBuilder took 849.42ms. Allocated memory is still 62.9MB. Free memory was 37.6MB in the beginning and 33.9MB in the end (delta: 3.6MB). Peak memory consumption was 17.1MB. Max. memory is 16.1GB. * TraceAbstraction took 131910.47ms. Allocated memory was 62.9MB in the beginning and 383.8MB in the end (delta: 320.9MB). Free memory was 33.4MB in the beginning and 189.2MB in the end (delta: -155.8MB). Peak memory consumption was 163.9MB. Max. memory is 16.1GB. * Witness Printer took 329.39ms. Allocated memory is still 383.8MB. Free memory was 188.5MB in the beginning and 145.6MB in the end (delta: 43.0MB). Peak memory consumption was 44.0MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 20]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L25] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 8); [L26] const SORT_1 msb_SORT_1 = (SORT_1)1 << (8 - 1); [L28] const SORT_5 mask_SORT_5 = (SORT_5)-1 >> (sizeof(SORT_5) * 8 - 1); [L29] const SORT_5 msb_SORT_5 = (SORT_5)1 << (1 - 1); [L31] const SORT_1 var_10 = 0; [L32] const SORT_5 var_18 = 1; [L33] const SORT_5 var_28 = 0; [L35] SORT_1 input_2; [L36] SORT_1 input_3; [L37] SORT_1 input_4; [L38] SORT_5 input_6; [L39] SORT_5 input_7; [L40] SORT_5 input_8; [L41] SORT_5 input_9; [L43] SORT_1 state_11 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L44] SORT_1 state_13 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L45] SORT_1 state_22 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L46] SORT_1 state_24 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L47] SORT_1 state_26 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L48] SORT_5 state_29 = __VERIFIER_nondet_uchar() & mask_SORT_5; [L49] SORT_5 state_31 = __VERIFIER_nondet_uchar() & mask_SORT_5; [L50] SORT_1 state_33 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L51] SORT_5 state_35 = __VERIFIER_nondet_uchar() & mask_SORT_5; [L52] SORT_1 state_37 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L53] SORT_1 state_40 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L54] SORT_1 state_42 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L56] SORT_1 init_12_arg_1 = var_10; [L57] state_11 = init_12_arg_1 [L58] SORT_1 init_14_arg_1 = var_10; [L59] state_13 = init_14_arg_1 [L60] SORT_1 init_23_arg_1 = var_10; [L61] state_22 = init_23_arg_1 [L62] SORT_1 init_25_arg_1 = var_10; [L63] state_24 = init_25_arg_1 [L64] SORT_1 init_27_arg_1 = var_10; [L65] state_26 = init_27_arg_1 [L66] SORT_5 init_30_arg_1 = var_28; [L67] state_29 = init_30_arg_1 [L68] SORT_5 init_32_arg_1 = var_28; [L69] state_31 = init_32_arg_1 [L70] SORT_1 init_34_arg_1 = var_10; [L71] state_33 = init_34_arg_1 [L72] SORT_5 init_36_arg_1 = var_28; [L73] state_35 = init_36_arg_1 [L74] SORT_1 init_38_arg_1 = var_10; [L75] state_37 = init_38_arg_1 [L76] SORT_1 init_41_arg_1 = var_10; [L77] state_40 = init_41_arg_1 [L78] SORT_1 init_43_arg_1 = var_10; [L79] state_42 = init_43_arg_1 VAL [init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=0, state_31=0, state_33=0, state_35=0, state_37=0, state_40=0, state_42=0, var_10=0, var_18=1, var_28=0] [L82] input_2 = __VERIFIER_nondet_uchar() [L83] input_3 = __VERIFIER_nondet_uchar() [L84] input_4 = __VERIFIER_nondet_uchar() [L85] input_6 = __VERIFIER_nondet_uchar() [L86] input_7 = __VERIFIER_nondet_uchar() [L87] input_7 = input_7 & mask_SORT_5 [L88] input_8 = __VERIFIER_nondet_uchar() [L89] input_8 = input_8 & mask_SORT_5 [L90] input_9 = __VERIFIER_nondet_uchar() [L91] input_9 = input_9 & mask_SORT_5 [L94] SORT_1 var_15_arg_0 = state_11; [L95] SORT_1 var_15_arg_1 = state_13; [L96] SORT_5 var_15 = var_15_arg_0 == var_15_arg_1; [L97] SORT_5 var_19_arg_0 = var_15; [L98] SORT_5 var_19 = ~var_19_arg_0; [L99] SORT_5 var_20_arg_0 = var_18; [L100] SORT_5 var_20_arg_1 = var_19; [L101] SORT_5 var_20 = var_20_arg_0 & var_20_arg_1; [L102] var_20 = var_20 & mask_SORT_5 [L103] SORT_5 bad_21_arg_0 = var_20; [L104] CALL __VERIFIER_assert(!(bad_21_arg_0)) [L20] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L104] RET __VERIFIER_assert(!(bad_21_arg_0)) [L106] SORT_5 var_52_arg_0 = input_9; [L107] SORT_5 var_52_arg_1 = var_18; [L108] SORT_5 var_52 = var_52_arg_0 == var_52_arg_1; [L109] SORT_5 var_53_arg_0 = var_52; [L110] SORT_1 var_53_arg_1 = var_10; [L111] SORT_1 var_53_arg_2 = state_42; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=127, input_3=192, input_4=0, input_6=2, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=0, state_31=0, state_33=0, state_35=0, state_37=0, state_40=0, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0] [L112] EXPR var_53_arg_0 ? var_53_arg_1 : var_53_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=127, input_3=192, input_4=0, input_6=2, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=0, state_31=0, state_33=0, state_35=0, state_37=0, state_40=0, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53_arg_0=0, var_53_arg_0 ? var_53_arg_1 : var_53_arg_2=0, var_53_arg_1=0, var_53_arg_2=0] [L112] SORT_1 var_53 = var_53_arg_0 ? var_53_arg_1 : var_53_arg_2; [L113] var_53 = var_53 & mask_SORT_1 [L114] SORT_1 next_54_arg_1 = var_53; [L115] SORT_5 var_58_arg_0 = input_9; [L116] SORT_5 var_58_arg_1 = var_18; [L117] SORT_5 var_58 = var_58_arg_0 == var_58_arg_1; [L118] SORT_1 var_56_arg_0 = state_37; [L119] SORT_1 var_56_arg_1 = state_33; [L120] SORT_1 var_56 = var_56_arg_0 + var_56_arg_1; [L121] SORT_1 var_55_arg_0 = state_37; [L122] SORT_1 var_55_arg_1 = state_33; [L123] SORT_1 var_55 = var_55_arg_0 - var_55_arg_1; [L124] SORT_5 var_57_arg_0 = state_35; [L125] SORT_1 var_57_arg_1 = var_56; [L126] SORT_1 var_57_arg_2 = var_55; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=127, input_3=192, input_4=0, input_6=2, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=0, state_31=0, state_33=0, state_35=0, state_37=0, state_40=0, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1] [L127] EXPR var_57_arg_0 ? var_57_arg_1 : var_57_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=127, input_3=192, input_4=0, input_6=2, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=0, state_31=0, state_33=0, state_35=0, state_37=0, state_40=0, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57_arg_0=0, var_57_arg_0 ? var_57_arg_1 : var_57_arg_2=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1] [L127] SORT_1 var_57 = var_57_arg_0 ? var_57_arg_1 : var_57_arg_2; [L128] SORT_5 var_59_arg_0 = var_58; [L129] SORT_1 var_59_arg_1 = var_10; [L130] SORT_1 var_59_arg_2 = var_57; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=127, input_3=192, input_4=0, input_6=2, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=0, state_31=0, state_33=0, state_35=0, state_37=0, state_40=0, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0] [L131] EXPR var_59_arg_0 ? var_59_arg_1 : var_59_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=127, input_3=192, input_4=0, input_6=2, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=0, state_31=0, state_33=0, state_35=0, state_37=0, state_40=0, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59_arg_0=0, var_59_arg_0 ? var_59_arg_1 : var_59_arg_2=0, var_59_arg_1=0, var_59_arg_2=0] [L131] SORT_1 var_59 = var_59_arg_0 ? var_59_arg_1 : var_59_arg_2; [L132] var_59 = var_59 & mask_SORT_1 [L133] SORT_1 next_60_arg_1 = var_59; [L134] SORT_5 var_61_arg_0 = var_58; [L135] SORT_1 var_61_arg_1 = var_10; [L136] SORT_1 var_61_arg_2 = input_2; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=127, input_3=192, input_4=0, input_6=2, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=0, state_31=0, state_33=0, state_35=0, state_37=0, state_40=0, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=127] [L137] EXPR var_61_arg_0 ? var_61_arg_1 : var_61_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=127, input_3=192, input_4=0, input_6=2, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=0, state_31=0, state_33=0, state_35=0, state_37=0, state_40=0, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61_arg_0=0, var_61_arg_0 ? var_61_arg_1 : var_61_arg_2=127, var_61_arg_1=0, var_61_arg_2=127] [L137] SORT_1 var_61 = var_61_arg_0 ? var_61_arg_1 : var_61_arg_2; [L138] SORT_1 next_62_arg_1 = var_61; [L139] SORT_5 var_63_arg_0 = var_58; [L140] SORT_1 var_63_arg_1 = var_10; [L141] SORT_1 var_63_arg_2 = input_3; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=127, input_3=192, input_4=0, input_6=2, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=127, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=0, state_31=0, state_33=0, state_35=0, state_37=0, state_40=0, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=127, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=127, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=192] [L142] EXPR var_63_arg_0 ? var_63_arg_1 : var_63_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=127, input_3=192, input_4=0, input_6=2, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=127, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=0, state_31=0, state_33=0, state_35=0, state_37=0, state_40=0, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=127, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=127, var_63_arg_0=0, var_63_arg_0 ? var_63_arg_1 : var_63_arg_2=192, var_63_arg_1=0, var_63_arg_2=192] [L142] SORT_1 var_63 = var_63_arg_0 ? var_63_arg_1 : var_63_arg_2; [L143] SORT_1 next_64_arg_1 = var_63; [L144] SORT_5 var_65_arg_0 = var_58; [L145] SORT_1 var_65_arg_1 = var_10; [L146] SORT_1 var_65_arg_2 = input_4; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=127, input_3=192, input_4=0, input_6=2, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=127, next_64_arg_1=192, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=0, state_31=0, state_33=0, state_35=0, state_37=0, state_40=0, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=127, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=127, var_63=192, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=192, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0] [L147] EXPR var_65_arg_0 ? var_65_arg_1 : var_65_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=127, input_3=192, input_4=0, input_6=2, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=127, next_64_arg_1=192, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=0, state_31=0, state_33=0, state_35=0, state_37=0, state_40=0, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=127, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=127, var_63=192, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=192, var_65_arg_0=0, var_65_arg_0 ? var_65_arg_1 : var_65_arg_2=0, var_65_arg_1=0, var_65_arg_2=0] [L147] SORT_1 var_65 = var_65_arg_0 ? var_65_arg_1 : var_65_arg_2; [L148] SORT_1 next_66_arg_1 = var_65; [L149] SORT_5 var_67_arg_0 = var_58; [L150] SORT_5 var_67_arg_1 = var_28; [L151] SORT_5 var_67_arg_2 = input_7; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=127, input_3=192, input_4=0, input_6=2, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=127, next_64_arg_1=192, next_66_arg_1=0, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=0, state_31=0, state_33=0, state_35=0, state_37=0, state_40=0, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=127, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=127, var_63=192, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=192, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1] [L152] EXPR var_67_arg_0 ? var_67_arg_1 : var_67_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=127, input_3=192, input_4=0, input_6=2, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=127, next_64_arg_1=192, next_66_arg_1=0, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=0, state_31=0, state_33=0, state_35=0, state_37=0, state_40=0, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=127, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=127, var_63=192, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=192, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67_arg_0=0, var_67_arg_0 ? var_67_arg_1 : var_67_arg_2=1, var_67_arg_1=0, var_67_arg_2=1] [L152] SORT_5 var_67 = var_67_arg_0 ? var_67_arg_1 : var_67_arg_2; [L153] SORT_5 next_68_arg_1 = var_67; [L154] SORT_5 var_69_arg_0 = var_58; [L155] SORT_5 var_69_arg_1 = var_28; [L156] SORT_5 var_69_arg_2 = input_8; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=127, input_3=192, input_4=0, input_6=2, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=127, next_64_arg_1=192, next_66_arg_1=0, next_68_arg_1=1, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=0, state_31=0, state_33=0, state_35=0, state_37=0, state_40=0, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=127, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=127, var_63=192, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=192, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1] [L157] EXPR var_69_arg_0 ? var_69_arg_1 : var_69_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=127, input_3=192, input_4=0, input_6=2, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=127, next_64_arg_1=192, next_66_arg_1=0, next_68_arg_1=1, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=0, state_31=0, state_33=0, state_35=0, state_37=0, state_40=0, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=127, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=127, var_63=192, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=192, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69_arg_0=0, var_69_arg_0 ? var_69_arg_1 : var_69_arg_2=1, var_69_arg_1=0, var_69_arg_2=1] [L157] SORT_5 var_69 = var_69_arg_0 ? var_69_arg_1 : var_69_arg_2; [L158] SORT_5 next_70_arg_1 = var_69; [L159] SORT_5 var_71_arg_0 = var_58; [L160] SORT_1 var_71_arg_1 = var_10; [L161] SORT_1 var_71_arg_2 = state_26; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=127, input_3=192, input_4=0, input_6=2, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=127, next_64_arg_1=192, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=0, state_31=0, state_33=0, state_35=0, state_37=0, state_40=0, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=127, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=127, var_63=192, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=192, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0] [L162] EXPR var_71_arg_0 ? var_71_arg_1 : var_71_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=127, input_3=192, input_4=0, input_6=2, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=127, next_64_arg_1=192, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=0, state_31=0, state_33=0, state_35=0, state_37=0, state_40=0, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=127, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=127, var_63=192, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=192, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71_arg_0=0, var_71_arg_0 ? var_71_arg_1 : var_71_arg_2=0, var_71_arg_1=0, var_71_arg_2=0] [L162] SORT_1 var_71 = var_71_arg_0 ? var_71_arg_1 : var_71_arg_2; [L163] SORT_1 next_72_arg_1 = var_71; [L164] SORT_5 var_73_arg_0 = var_58; [L165] SORT_5 var_73_arg_1 = var_28; [L166] SORT_5 var_73_arg_2 = state_31; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=127, input_3=192, input_4=0, input_6=2, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=127, next_64_arg_1=192, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=0, state_31=0, state_33=0, state_35=0, state_37=0, state_40=0, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=127, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=127, var_63=192, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=192, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0] [L167] EXPR var_73_arg_0 ? var_73_arg_1 : var_73_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=127, input_3=192, input_4=0, input_6=2, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=127, next_64_arg_1=192, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=0, state_31=0, state_33=0, state_35=0, state_37=0, state_40=0, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=127, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=127, var_63=192, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=192, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73_arg_0=0, var_73_arg_0 ? var_73_arg_1 : var_73_arg_2=0, var_73_arg_1=0, var_73_arg_2=0] [L167] SORT_5 var_73 = var_73_arg_0 ? var_73_arg_1 : var_73_arg_2; [L168] var_73 = var_73 & mask_SORT_5 [L169] SORT_5 next_74_arg_1 = var_73; [L170] SORT_5 var_77_arg_0 = state_29; [L171] SORT_5 var_77 = ~var_77_arg_0; [L172] var_77 = var_77 & mask_SORT_5 [L173] SORT_1 var_76_arg_0 = state_22; [L174] SORT_1 var_76_arg_1 = state_24; [L175] SORT_1 var_76 = var_76_arg_0 + var_76_arg_1; [L176] SORT_1 var_75_arg_0 = state_22; [L177] SORT_1 var_75_arg_1 = state_24; [L178] SORT_1 var_75 = var_75_arg_0 - var_75_arg_1; [L179] SORT_5 var_78_arg_0 = var_77; [L180] SORT_1 var_78_arg_1 = var_76; [L181] SORT_1 var_78_arg_2 = var_75; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=127, input_3=192, input_4=0, input_6=2, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=127, next_64_arg_1=192, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=0, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=0, state_31=0, state_33=0, state_35=0, state_37=0, state_40=0, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=127, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=127, var_63=192, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=192, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=1, var_77_arg_0=0, var_78_arg_0=1, var_78_arg_1=0, var_78_arg_2=0] [L182] EXPR var_78_arg_0 ? var_78_arg_1 : var_78_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=127, input_3=192, input_4=0, input_6=2, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=127, next_64_arg_1=192, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=0, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=0, state_31=0, state_33=0, state_35=0, state_37=0, state_40=0, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=127, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=127, var_63=192, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=192, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=1, var_77_arg_0=0, var_78_arg_0=1, var_78_arg_0 ? var_78_arg_1 : var_78_arg_2=0, var_78_arg_1=0, var_78_arg_2=0] [L182] SORT_1 var_78 = var_78_arg_0 ? var_78_arg_1 : var_78_arg_2; [L183] SORT_5 var_79_arg_0 = var_58; [L184] SORT_1 var_79_arg_1 = var_10; [L185] SORT_1 var_79_arg_2 = var_78; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=127, input_3=192, input_4=0, input_6=2, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=127, next_64_arg_1=192, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=0, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=0, state_31=0, state_33=0, state_35=0, state_37=0, state_40=0, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=127, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=127, var_63=192, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=192, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=1, var_77_arg_0=0, var_78=0, var_78_arg_0=1, var_78_arg_1=0, var_78_arg_2=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0] [L186] EXPR var_79_arg_0 ? var_79_arg_1 : var_79_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=127, input_3=192, input_4=0, input_6=2, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=127, next_64_arg_1=192, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=0, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=0, state_31=0, state_33=0, state_35=0, state_37=0, state_40=0, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=127, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=127, var_63=192, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=192, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=1, var_77_arg_0=0, var_78=0, var_78_arg_0=1, var_78_arg_1=0, var_78_arg_2=0, var_79_arg_0=0, var_79_arg_0 ? var_79_arg_1 : var_79_arg_2=0, var_79_arg_1=0, var_79_arg_2=0] [L186] SORT_1 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L187] SORT_1 next_80_arg_1 = var_79; [L188] SORT_1 var_45_arg_0 = input_2; [L189] SORT_1 var_45_arg_1 = input_3; [L190] SORT_1 var_45 = var_45_arg_0 + var_45_arg_1; [L191] SORT_1 var_44_arg_0 = input_2; [L192] SORT_1 var_44_arg_1 = input_3; [L193] SORT_1 var_44 = var_44_arg_0 - var_44_arg_1; [L194] SORT_5 var_46_arg_0 = input_7; [L195] SORT_1 var_46_arg_1 = var_45; [L196] SORT_1 var_46_arg_2 = var_44; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=127, input_3=192, input_4=0, input_6=2, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=127, next_64_arg_1=192, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=0, next_80_arg_1=0, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=0, state_31=0, state_33=0, state_35=0, state_37=0, state_40=0, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=191, var_44_arg_0=127, var_44_arg_1=192, var_45=63, var_45_arg_0=127, var_45_arg_1=192, var_46_arg_0=1, var_46_arg_1=63, var_46_arg_2=191, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=127, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=127, var_63=192, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=192, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=1, var_77_arg_0=0, var_78=0, var_78_arg_0=1, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0] [L197] EXPR var_46_arg_0 ? var_46_arg_1 : var_46_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=127, input_3=192, input_4=0, input_6=2, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=127, next_64_arg_1=192, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=0, next_80_arg_1=0, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=0, state_31=0, state_33=0, state_35=0, state_37=0, state_40=0, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=191, var_44_arg_0=127, var_44_arg_1=192, var_45=63, var_45_arg_0=127, var_45_arg_1=192, var_46_arg_0=1, var_46_arg_0 ? var_46_arg_1 : var_46_arg_2=63, var_46_arg_1=63, var_46_arg_2=191, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=127, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=127, var_63=192, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=192, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=1, var_77_arg_0=0, var_78=0, var_78_arg_0=1, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0] [L197] SORT_1 var_46 = var_46_arg_0 ? var_46_arg_1 : var_46_arg_2; [L198] SORT_1 var_48_arg_0 = var_46; [L199] SORT_1 var_48_arg_1 = input_4; [L200] SORT_1 var_48 = var_48_arg_0 + var_48_arg_1; [L201] SORT_1 var_47_arg_0 = var_46; [L202] SORT_1 var_47_arg_1 = input_4; [L203] SORT_1 var_47 = var_47_arg_0 - var_47_arg_1; [L204] SORT_5 var_49_arg_0 = input_8; [L205] SORT_1 var_49_arg_1 = var_48; [L206] SORT_1 var_49_arg_2 = var_47; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=127, input_3=192, input_4=0, input_6=2, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=127, next_64_arg_1=192, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=0, next_80_arg_1=0, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=0, state_31=0, state_33=0, state_35=0, state_37=0, state_40=0, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=191, var_44_arg_0=127, var_44_arg_1=192, var_45=63, var_45_arg_0=127, var_45_arg_1=192, var_46=63, var_46_arg_0=1, var_46_arg_1=63, var_46_arg_2=191, var_47=63, var_47_arg_0=63, var_47_arg_1=0, var_48=63, var_48_arg_0=63, var_48_arg_1=0, var_49_arg_0=1, var_49_arg_1=63, var_49_arg_2=63, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=127, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=127, var_63=192, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=192, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=1, var_77_arg_0=0, var_78=0, var_78_arg_0=1, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0] [L207] EXPR var_49_arg_0 ? var_49_arg_1 : var_49_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=127, input_3=192, input_4=0, input_6=2, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=127, next_64_arg_1=192, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=0, next_80_arg_1=0, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=0, state_31=0, state_33=0, state_35=0, state_37=0, state_40=0, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=191, var_44_arg_0=127, var_44_arg_1=192, var_45=63, var_45_arg_0=127, var_45_arg_1=192, var_46=63, var_46_arg_0=1, var_46_arg_1=63, var_46_arg_2=191, var_47=63, var_47_arg_0=63, var_47_arg_1=0, var_48=63, var_48_arg_0=63, var_48_arg_1=0, var_49_arg_0=1, var_49_arg_0 ? var_49_arg_1 : var_49_arg_2=63, var_49_arg_1=63, var_49_arg_2=63, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=127, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=127, var_63=192, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=192, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=1, var_77_arg_0=0, var_78=0, var_78_arg_0=1, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0] [L207] SORT_1 var_49 = var_49_arg_0 ? var_49_arg_1 : var_49_arg_2; [L208] SORT_5 var_81_arg_0 = var_52; [L209] SORT_1 var_81_arg_1 = var_10; [L210] SORT_1 var_81_arg_2 = var_49; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=127, input_3=192, input_4=0, input_6=2, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=127, next_64_arg_1=192, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=0, next_80_arg_1=0, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=0, state_31=0, state_33=0, state_35=0, state_37=0, state_40=0, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=191, var_44_arg_0=127, var_44_arg_1=192, var_45=63, var_45_arg_0=127, var_45_arg_1=192, var_46=63, var_46_arg_0=1, var_46_arg_1=63, var_46_arg_2=191, var_47=63, var_47_arg_0=63, var_47_arg_1=0, var_48=63, var_48_arg_0=63, var_48_arg_1=0, var_49=63, var_49_arg_0=1, var_49_arg_1=63, var_49_arg_2=63, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=127, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=127, var_63=192, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=192, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=1, var_77_arg_0=0, var_78=0, var_78_arg_0=1, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=63] [L211] EXPR var_81_arg_0 ? var_81_arg_1 : var_81_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=127, input_3=192, input_4=0, input_6=2, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=127, next_64_arg_1=192, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=0, next_80_arg_1=0, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=0, state_31=0, state_33=0, state_35=0, state_37=0, state_40=0, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=191, var_44_arg_0=127, var_44_arg_1=192, var_45=63, var_45_arg_0=127, var_45_arg_1=192, var_46=63, var_46_arg_0=1, var_46_arg_1=63, var_46_arg_2=191, var_47=63, var_47_arg_0=63, var_47_arg_1=0, var_48=63, var_48_arg_0=63, var_48_arg_1=0, var_49=63, var_49_arg_0=1, var_49_arg_1=63, var_49_arg_2=63, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=127, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=127, var_63=192, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=192, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=1, var_77_arg_0=0, var_78=0, var_78_arg_0=1, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81_arg_0=0, var_81_arg_0 ? var_81_arg_1 : var_81_arg_2=63, var_81_arg_1=0, var_81_arg_2=63] [L211] SORT_1 var_81 = var_81_arg_0 ? var_81_arg_1 : var_81_arg_2; [L212] SORT_1 next_82_arg_1 = var_81; [L213] SORT_5 var_83_arg_0 = var_52; [L214] SORT_1 var_83_arg_1 = var_10; [L215] SORT_1 var_83_arg_2 = state_40; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=127, input_3=192, input_4=0, input_6=2, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=127, next_64_arg_1=192, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=0, next_80_arg_1=0, next_82_arg_1=63, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=0, state_31=0, state_33=0, state_35=0, state_37=0, state_40=0, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=191, var_44_arg_0=127, var_44_arg_1=192, var_45=63, var_45_arg_0=127, var_45_arg_1=192, var_46=63, var_46_arg_0=1, var_46_arg_1=63, var_46_arg_2=191, var_47=63, var_47_arg_0=63, var_47_arg_1=0, var_48=63, var_48_arg_0=63, var_48_arg_1=0, var_49=63, var_49_arg_0=1, var_49_arg_1=63, var_49_arg_2=63, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=127, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=127, var_63=192, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=192, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=1, var_77_arg_0=0, var_78=0, var_78_arg_0=1, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=63, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=63, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0] [L216] EXPR var_83_arg_0 ? var_83_arg_1 : var_83_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=127, input_3=192, input_4=0, input_6=2, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=127, next_64_arg_1=192, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=0, next_80_arg_1=0, next_82_arg_1=63, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=0, state_31=0, state_33=0, state_35=0, state_37=0, state_40=0, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=191, var_44_arg_0=127, var_44_arg_1=192, var_45=63, var_45_arg_0=127, var_45_arg_1=192, var_46=63, var_46_arg_0=1, var_46_arg_1=63, var_46_arg_2=191, var_47=63, var_47_arg_0=63, var_47_arg_1=0, var_48=63, var_48_arg_0=63, var_48_arg_1=0, var_49=63, var_49_arg_0=1, var_49_arg_1=63, var_49_arg_2=63, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=127, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=127, var_63=192, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=192, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=1, var_77_arg_0=0, var_78=0, var_78_arg_0=1, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=63, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=63, var_83_arg_0=0, var_83_arg_0 ? var_83_arg_1 : var_83_arg_2=0, var_83_arg_1=0, var_83_arg_2=0] [L216] SORT_1 var_83 = var_83_arg_0 ? var_83_arg_1 : var_83_arg_2; [L217] SORT_1 next_84_arg_1 = var_83; [L219] state_11 = next_54_arg_1 [L220] state_13 = next_60_arg_1 [L221] state_22 = next_62_arg_1 [L222] state_24 = next_64_arg_1 [L223] state_26 = next_66_arg_1 [L224] state_29 = next_68_arg_1 [L225] state_31 = next_70_arg_1 [L226] state_33 = next_72_arg_1 [L227] state_35 = next_74_arg_1 [L228] state_37 = next_80_arg_1 [L229] state_40 = next_82_arg_1 [L230] state_42 = next_84_arg_1 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=127, input_3=192, input_4=0, input_6=2, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=127, next_64_arg_1=192, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=0, next_80_arg_1=0, next_82_arg_1=63, next_84_arg_1=0, state_11=0, state_13=0, state_22=127, state_24=192, state_26=0, state_29=1, state_31=1, state_33=0, state_35=0, state_37=0, state_40=63, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=191, var_44_arg_0=127, var_44_arg_1=192, var_45=63, var_45_arg_0=127, var_45_arg_1=192, var_46=63, var_46_arg_0=1, var_46_arg_1=63, var_46_arg_2=191, var_47=63, var_47_arg_0=63, var_47_arg_1=0, var_48=63, var_48_arg_0=63, var_48_arg_1=0, var_49=63, var_49_arg_0=1, var_49_arg_1=63, var_49_arg_2=63, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=127, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=127, var_63=192, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=192, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=1, var_77_arg_0=0, var_78=0, var_78_arg_0=1, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=63, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=63, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0] [L82] input_2 = __VERIFIER_nondet_uchar() [L83] input_3 = __VERIFIER_nondet_uchar() [L84] input_4 = __VERIFIER_nondet_uchar() [L85] input_6 = __VERIFIER_nondet_uchar() [L86] input_7 = __VERIFIER_nondet_uchar() [L87] input_7 = input_7 & mask_SORT_5 [L88] input_8 = __VERIFIER_nondet_uchar() [L89] input_8 = input_8 & mask_SORT_5 [L90] input_9 = __VERIFIER_nondet_uchar() [L91] input_9 = input_9 & mask_SORT_5 [L94] SORT_1 var_15_arg_0 = state_11; [L95] SORT_1 var_15_arg_1 = state_13; [L96] SORT_5 var_15 = var_15_arg_0 == var_15_arg_1; [L97] SORT_5 var_19_arg_0 = var_15; [L98] SORT_5 var_19 = ~var_19_arg_0; [L99] SORT_5 var_20_arg_0 = var_18; [L100] SORT_5 var_20_arg_1 = var_19; [L101] SORT_5 var_20 = var_20_arg_0 & var_20_arg_1; [L102] var_20 = var_20 & mask_SORT_5 [L103] SORT_5 bad_21_arg_0 = var_20; [L104] CALL __VERIFIER_assert(!(bad_21_arg_0)) [L20] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L104] RET __VERIFIER_assert(!(bad_21_arg_0)) [L106] SORT_5 var_52_arg_0 = input_9; [L107] SORT_5 var_52_arg_1 = var_18; [L108] SORT_5 var_52 = var_52_arg_0 == var_52_arg_1; [L109] SORT_5 var_53_arg_0 = var_52; [L110] SORT_1 var_53_arg_1 = var_10; [L111] SORT_1 var_53_arg_2 = state_42; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=3, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=127, next_64_arg_1=192, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=0, next_80_arg_1=0, next_82_arg_1=63, next_84_arg_1=0, state_11=0, state_13=0, state_22=127, state_24=192, state_26=0, state_29=1, state_31=1, state_33=0, state_35=0, state_37=0, state_40=63, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=191, var_44_arg_0=127, var_44_arg_1=192, var_45=63, var_45_arg_0=127, var_45_arg_1=192, var_46=63, var_46_arg_0=1, var_46_arg_1=63, var_46_arg_2=191, var_47=63, var_47_arg_0=63, var_47_arg_1=0, var_48=63, var_48_arg_0=63, var_48_arg_1=0, var_49=63, var_49_arg_0=1, var_49_arg_1=63, var_49_arg_2=63, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=127, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=127, var_63=192, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=192, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=1, var_77_arg_0=0, var_78=0, var_78_arg_0=1, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=63, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=63, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0] [L112] EXPR var_53_arg_0 ? var_53_arg_1 : var_53_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=3, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=127, next_64_arg_1=192, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=0, next_80_arg_1=0, next_82_arg_1=63, next_84_arg_1=0, state_11=0, state_13=0, state_22=127, state_24=192, state_26=0, state_29=1, state_31=1, state_33=0, state_35=0, state_37=0, state_40=63, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=191, var_44_arg_0=127, var_44_arg_1=192, var_45=63, var_45_arg_0=127, var_45_arg_1=192, var_46=63, var_46_arg_0=1, var_46_arg_1=63, var_46_arg_2=191, var_47=63, var_47_arg_0=63, var_47_arg_1=0, var_48=63, var_48_arg_0=63, var_48_arg_1=0, var_49=63, var_49_arg_0=1, var_49_arg_1=63, var_49_arg_2=63, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_0 ? var_53_arg_1 : var_53_arg_2=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=127, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=127, var_63=192, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=192, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=1, var_77_arg_0=0, var_78=0, var_78_arg_0=1, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=63, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=63, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0] [L112] SORT_1 var_53 = var_53_arg_0 ? var_53_arg_1 : var_53_arg_2; [L113] var_53 = var_53 & mask_SORT_1 [L114] SORT_1 next_54_arg_1 = var_53; [L115] SORT_5 var_58_arg_0 = input_9; [L116] SORT_5 var_58_arg_1 = var_18; [L117] SORT_5 var_58 = var_58_arg_0 == var_58_arg_1; [L118] SORT_1 var_56_arg_0 = state_37; [L119] SORT_1 var_56_arg_1 = state_33; [L120] SORT_1 var_56 = var_56_arg_0 + var_56_arg_1; [L121] SORT_1 var_55_arg_0 = state_37; [L122] SORT_1 var_55_arg_1 = state_33; [L123] SORT_1 var_55 = var_55_arg_0 - var_55_arg_1; [L124] SORT_5 var_57_arg_0 = state_35; [L125] SORT_1 var_57_arg_1 = var_56; [L126] SORT_1 var_57_arg_2 = var_55; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=3, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=127, next_64_arg_1=192, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=0, next_80_arg_1=0, next_82_arg_1=63, next_84_arg_1=0, state_11=0, state_13=0, state_22=127, state_24=192, state_26=0, state_29=1, state_31=1, state_33=0, state_35=0, state_37=0, state_40=63, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=191, var_44_arg_0=127, var_44_arg_1=192, var_45=63, var_45_arg_0=127, var_45_arg_1=192, var_46=63, var_46_arg_0=1, var_46_arg_1=63, var_46_arg_2=191, var_47=63, var_47_arg_0=63, var_47_arg_1=0, var_48=63, var_48_arg_0=63, var_48_arg_1=0, var_49=63, var_49_arg_0=1, var_49_arg_1=63, var_49_arg_2=63, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=127, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=127, var_63=192, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=192, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=1, var_77_arg_0=0, var_78=0, var_78_arg_0=1, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=63, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=63, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0] [L127] EXPR var_57_arg_0 ? var_57_arg_1 : var_57_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=3, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=127, next_64_arg_1=192, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=0, next_80_arg_1=0, next_82_arg_1=63, next_84_arg_1=0, state_11=0, state_13=0, state_22=127, state_24=192, state_26=0, state_29=1, state_31=1, state_33=0, state_35=0, state_37=0, state_40=63, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=191, var_44_arg_0=127, var_44_arg_1=192, var_45=63, var_45_arg_0=127, var_45_arg_1=192, var_46=63, var_46_arg_0=1, var_46_arg_1=63, var_46_arg_2=191, var_47=63, var_47_arg_0=63, var_47_arg_1=0, var_48=63, var_48_arg_0=63, var_48_arg_1=0, var_49=63, var_49_arg_0=1, var_49_arg_1=63, var_49_arg_2=63, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_0 ? var_57_arg_1 : var_57_arg_2=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=127, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=127, var_63=192, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=192, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=1, var_77_arg_0=0, var_78=0, var_78_arg_0=1, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=63, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=63, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0] [L127] SORT_1 var_57 = var_57_arg_0 ? var_57_arg_1 : var_57_arg_2; [L128] SORT_5 var_59_arg_0 = var_58; [L129] SORT_1 var_59_arg_1 = var_10; [L130] SORT_1 var_59_arg_2 = var_57; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=3, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=127, next_64_arg_1=192, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=0, next_80_arg_1=0, next_82_arg_1=63, next_84_arg_1=0, state_11=0, state_13=0, state_22=127, state_24=192, state_26=0, state_29=1, state_31=1, state_33=0, state_35=0, state_37=0, state_40=63, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=191, var_44_arg_0=127, var_44_arg_1=192, var_45=63, var_45_arg_0=127, var_45_arg_1=192, var_46=63, var_46_arg_0=1, var_46_arg_1=63, var_46_arg_2=191, var_47=63, var_47_arg_0=63, var_47_arg_1=0, var_48=63, var_48_arg_0=63, var_48_arg_1=0, var_49=63, var_49_arg_0=1, var_49_arg_1=63, var_49_arg_2=63, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=127, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=127, var_63=192, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=192, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=1, var_77_arg_0=0, var_78=0, var_78_arg_0=1, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=63, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=63, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0] [L131] EXPR var_59_arg_0 ? var_59_arg_1 : var_59_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=3, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=127, next_64_arg_1=192, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=0, next_80_arg_1=0, next_82_arg_1=63, next_84_arg_1=0, state_11=0, state_13=0, state_22=127, state_24=192, state_26=0, state_29=1, state_31=1, state_33=0, state_35=0, state_37=0, state_40=63, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=191, var_44_arg_0=127, var_44_arg_1=192, var_45=63, var_45_arg_0=127, var_45_arg_1=192, var_46=63, var_46_arg_0=1, var_46_arg_1=63, var_46_arg_2=191, var_47=63, var_47_arg_0=63, var_47_arg_1=0, var_48=63, var_48_arg_0=63, var_48_arg_1=0, var_49=63, var_49_arg_0=1, var_49_arg_1=63, var_49_arg_2=63, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_0 ? var_59_arg_1 : var_59_arg_2=0, var_59_arg_1=0, var_59_arg_2=0, var_61=127, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=127, var_63=192, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=192, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=1, var_77_arg_0=0, var_78=0, var_78_arg_0=1, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=63, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=63, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0] [L131] SORT_1 var_59 = var_59_arg_0 ? var_59_arg_1 : var_59_arg_2; [L132] var_59 = var_59 & mask_SORT_1 [L133] SORT_1 next_60_arg_1 = var_59; [L134] SORT_5 var_61_arg_0 = var_58; [L135] SORT_1 var_61_arg_1 = var_10; [L136] SORT_1 var_61_arg_2 = input_2; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=3, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=127, next_64_arg_1=192, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=0, next_80_arg_1=0, next_82_arg_1=63, next_84_arg_1=0, state_11=0, state_13=0, state_22=127, state_24=192, state_26=0, state_29=1, state_31=1, state_33=0, state_35=0, state_37=0, state_40=63, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=191, var_44_arg_0=127, var_44_arg_1=192, var_45=63, var_45_arg_0=127, var_45_arg_1=192, var_46=63, var_46_arg_0=1, var_46_arg_1=63, var_46_arg_2=191, var_47=63, var_47_arg_0=63, var_47_arg_1=0, var_48=63, var_48_arg_0=63, var_48_arg_1=0, var_49=63, var_49_arg_0=1, var_49_arg_1=63, var_49_arg_2=63, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=127, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=192, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=192, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=1, var_77_arg_0=0, var_78=0, var_78_arg_0=1, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=63, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=63, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0] [L137] EXPR var_61_arg_0 ? var_61_arg_1 : var_61_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=3, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=127, next_64_arg_1=192, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=0, next_80_arg_1=0, next_82_arg_1=63, next_84_arg_1=0, state_11=0, state_13=0, state_22=127, state_24=192, state_26=0, state_29=1, state_31=1, state_33=0, state_35=0, state_37=0, state_40=63, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=191, var_44_arg_0=127, var_44_arg_1=192, var_45=63, var_45_arg_0=127, var_45_arg_1=192, var_46=63, var_46_arg_0=1, var_46_arg_1=63, var_46_arg_2=191, var_47=63, var_47_arg_0=63, var_47_arg_1=0, var_48=63, var_48_arg_0=63, var_48_arg_1=0, var_49=63, var_49_arg_0=1, var_49_arg_1=63, var_49_arg_2=63, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=127, var_61_arg_0=0, var_61_arg_0 ? var_61_arg_1 : var_61_arg_2=0, var_61_arg_1=0, var_61_arg_2=0, var_63=192, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=192, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=1, var_77_arg_0=0, var_78=0, var_78_arg_0=1, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=63, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=63, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0] [L137] SORT_1 var_61 = var_61_arg_0 ? var_61_arg_1 : var_61_arg_2; [L138] SORT_1 next_62_arg_1 = var_61; [L139] SORT_5 var_63_arg_0 = var_58; [L140] SORT_1 var_63_arg_1 = var_10; [L141] SORT_1 var_63_arg_2 = input_3; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=3, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=0, next_64_arg_1=192, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=0, next_80_arg_1=0, next_82_arg_1=63, next_84_arg_1=0, state_11=0, state_13=0, state_22=127, state_24=192, state_26=0, state_29=1, state_31=1, state_33=0, state_35=0, state_37=0, state_40=63, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=191, var_44_arg_0=127, var_44_arg_1=192, var_45=63, var_45_arg_0=127, var_45_arg_1=192, var_46=63, var_46_arg_0=1, var_46_arg_1=63, var_46_arg_2=191, var_47=63, var_47_arg_0=63, var_47_arg_1=0, var_48=63, var_48_arg_0=63, var_48_arg_1=0, var_49=63, var_49_arg_0=1, var_49_arg_1=63, var_49_arg_2=63, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=192, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=1, var_77_arg_0=0, var_78=0, var_78_arg_0=1, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=63, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=63, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0] [L142] EXPR var_63_arg_0 ? var_63_arg_1 : var_63_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=3, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=0, next_64_arg_1=192, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=0, next_80_arg_1=0, next_82_arg_1=63, next_84_arg_1=0, state_11=0, state_13=0, state_22=127, state_24=192, state_26=0, state_29=1, state_31=1, state_33=0, state_35=0, state_37=0, state_40=63, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=191, var_44_arg_0=127, var_44_arg_1=192, var_45=63, var_45_arg_0=127, var_45_arg_1=192, var_46=63, var_46_arg_0=1, var_46_arg_1=63, var_46_arg_2=191, var_47=63, var_47_arg_0=63, var_47_arg_1=0, var_48=63, var_48_arg_0=63, var_48_arg_1=0, var_49=63, var_49_arg_0=1, var_49_arg_1=63, var_49_arg_2=63, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=192, var_63_arg_0=0, var_63_arg_0 ? var_63_arg_1 : var_63_arg_2=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=1, var_77_arg_0=0, var_78=0, var_78_arg_0=1, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=63, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=63, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0] [L142] SORT_1 var_63 = var_63_arg_0 ? var_63_arg_1 : var_63_arg_2; [L143] SORT_1 next_64_arg_1 = var_63; [L144] SORT_5 var_65_arg_0 = var_58; [L145] SORT_1 var_65_arg_1 = var_10; [L146] SORT_1 var_65_arg_2 = input_4; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=3, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=0, next_80_arg_1=0, next_82_arg_1=63, next_84_arg_1=0, state_11=0, state_13=0, state_22=127, state_24=192, state_26=0, state_29=1, state_31=1, state_33=0, state_35=0, state_37=0, state_40=63, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=191, var_44_arg_0=127, var_44_arg_1=192, var_45=63, var_45_arg_0=127, var_45_arg_1=192, var_46=63, var_46_arg_0=1, var_46_arg_1=63, var_46_arg_2=191, var_47=63, var_47_arg_0=63, var_47_arg_1=0, var_48=63, var_48_arg_0=63, var_48_arg_1=0, var_49=63, var_49_arg_0=1, var_49_arg_1=63, var_49_arg_2=63, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=1, var_77_arg_0=0, var_78=0, var_78_arg_0=1, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=63, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=63, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0] [L147] EXPR var_65_arg_0 ? var_65_arg_1 : var_65_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=3, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=0, next_80_arg_1=0, next_82_arg_1=63, next_84_arg_1=0, state_11=0, state_13=0, state_22=127, state_24=192, state_26=0, state_29=1, state_31=1, state_33=0, state_35=0, state_37=0, state_40=63, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=191, var_44_arg_0=127, var_44_arg_1=192, var_45=63, var_45_arg_0=127, var_45_arg_1=192, var_46=63, var_46_arg_0=1, var_46_arg_1=63, var_46_arg_2=191, var_47=63, var_47_arg_0=63, var_47_arg_1=0, var_48=63, var_48_arg_0=63, var_48_arg_1=0, var_49=63, var_49_arg_0=1, var_49_arg_1=63, var_49_arg_2=63, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_0 ? var_65_arg_1 : var_65_arg_2=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=1, var_77_arg_0=0, var_78=0, var_78_arg_0=1, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=63, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=63, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0] [L147] SORT_1 var_65 = var_65_arg_0 ? var_65_arg_1 : var_65_arg_2; [L148] SORT_1 next_66_arg_1 = var_65; [L149] SORT_5 var_67_arg_0 = var_58; [L150] SORT_5 var_67_arg_1 = var_28; [L151] SORT_5 var_67_arg_2 = input_7; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=3, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=0, next_80_arg_1=0, next_82_arg_1=63, next_84_arg_1=0, state_11=0, state_13=0, state_22=127, state_24=192, state_26=0, state_29=1, state_31=1, state_33=0, state_35=0, state_37=0, state_40=63, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=191, var_44_arg_0=127, var_44_arg_1=192, var_45=63, var_45_arg_0=127, var_45_arg_1=192, var_46=63, var_46_arg_0=1, var_46_arg_1=63, var_46_arg_2=191, var_47=63, var_47_arg_0=63, var_47_arg_1=0, var_48=63, var_48_arg_0=63, var_48_arg_1=0, var_49=63, var_49_arg_0=1, var_49_arg_1=63, var_49_arg_2=63, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=1, var_77_arg_0=0, var_78=0, var_78_arg_0=1, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=63, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=63, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0] [L152] EXPR var_67_arg_0 ? var_67_arg_1 : var_67_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=3, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=0, next_80_arg_1=0, next_82_arg_1=63, next_84_arg_1=0, state_11=0, state_13=0, state_22=127, state_24=192, state_26=0, state_29=1, state_31=1, state_33=0, state_35=0, state_37=0, state_40=63, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=191, var_44_arg_0=127, var_44_arg_1=192, var_45=63, var_45_arg_0=127, var_45_arg_1=192, var_46=63, var_46_arg_0=1, var_46_arg_1=63, var_46_arg_2=191, var_47=63, var_47_arg_0=63, var_47_arg_1=0, var_48=63, var_48_arg_0=63, var_48_arg_1=0, var_49=63, var_49_arg_0=1, var_49_arg_1=63, var_49_arg_2=63, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_0 ? var_67_arg_1 : var_67_arg_2=1, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=1, var_77_arg_0=0, var_78=0, var_78_arg_0=1, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=63, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=63, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0] [L152] SORT_5 var_67 = var_67_arg_0 ? var_67_arg_1 : var_67_arg_2; [L153] SORT_5 next_68_arg_1 = var_67; [L154] SORT_5 var_69_arg_0 = var_58; [L155] SORT_5 var_69_arg_1 = var_28; [L156] SORT_5 var_69_arg_2 = input_8; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=3, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=0, next_80_arg_1=0, next_82_arg_1=63, next_84_arg_1=0, state_11=0, state_13=0, state_22=127, state_24=192, state_26=0, state_29=1, state_31=1, state_33=0, state_35=0, state_37=0, state_40=63, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=191, var_44_arg_0=127, var_44_arg_1=192, var_45=63, var_45_arg_0=127, var_45_arg_1=192, var_46=63, var_46_arg_0=1, var_46_arg_1=63, var_46_arg_2=191, var_47=63, var_47_arg_0=63, var_47_arg_1=0, var_48=63, var_48_arg_0=63, var_48_arg_1=0, var_49=63, var_49_arg_0=1, var_49_arg_1=63, var_49_arg_2=63, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=1, var_77_arg_0=0, var_78=0, var_78_arg_0=1, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=63, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=63, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0] [L157] EXPR var_69_arg_0 ? var_69_arg_1 : var_69_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=3, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=0, next_80_arg_1=0, next_82_arg_1=63, next_84_arg_1=0, state_11=0, state_13=0, state_22=127, state_24=192, state_26=0, state_29=1, state_31=1, state_33=0, state_35=0, state_37=0, state_40=63, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=191, var_44_arg_0=127, var_44_arg_1=192, var_45=63, var_45_arg_0=127, var_45_arg_1=192, var_46=63, var_46_arg_0=1, var_46_arg_1=63, var_46_arg_2=191, var_47=63, var_47_arg_0=63, var_47_arg_1=0, var_48=63, var_48_arg_0=63, var_48_arg_1=0, var_49=63, var_49_arg_0=1, var_49_arg_1=63, var_49_arg_2=63, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_0 ? var_69_arg_1 : var_69_arg_2=1, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=1, var_77_arg_0=0, var_78=0, var_78_arg_0=1, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=63, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=63, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0] [L157] SORT_5 var_69 = var_69_arg_0 ? var_69_arg_1 : var_69_arg_2; [L158] SORT_5 next_70_arg_1 = var_69; [L159] SORT_5 var_71_arg_0 = var_58; [L160] SORT_1 var_71_arg_1 = var_10; [L161] SORT_1 var_71_arg_2 = state_26; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=3, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=0, next_80_arg_1=0, next_82_arg_1=63, next_84_arg_1=0, state_11=0, state_13=0, state_22=127, state_24=192, state_26=0, state_29=1, state_31=1, state_33=0, state_35=0, state_37=0, state_40=63, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=191, var_44_arg_0=127, var_44_arg_1=192, var_45=63, var_45_arg_0=127, var_45_arg_1=192, var_46=63, var_46_arg_0=1, var_46_arg_1=63, var_46_arg_2=191, var_47=63, var_47_arg_0=63, var_47_arg_1=0, var_48=63, var_48_arg_0=63, var_48_arg_1=0, var_49=63, var_49_arg_0=1, var_49_arg_1=63, var_49_arg_2=63, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=1, var_77_arg_0=0, var_78=0, var_78_arg_0=1, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=63, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=63, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0] [L162] EXPR var_71_arg_0 ? var_71_arg_1 : var_71_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=3, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=0, next_80_arg_1=0, next_82_arg_1=63, next_84_arg_1=0, state_11=0, state_13=0, state_22=127, state_24=192, state_26=0, state_29=1, state_31=1, state_33=0, state_35=0, state_37=0, state_40=63, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=191, var_44_arg_0=127, var_44_arg_1=192, var_45=63, var_45_arg_0=127, var_45_arg_1=192, var_46=63, var_46_arg_0=1, var_46_arg_1=63, var_46_arg_2=191, var_47=63, var_47_arg_0=63, var_47_arg_1=0, var_48=63, var_48_arg_0=63, var_48_arg_1=0, var_49=63, var_49_arg_0=1, var_49_arg_1=63, var_49_arg_2=63, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_0 ? var_71_arg_1 : var_71_arg_2=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=0, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=1, var_77_arg_0=0, var_78=0, var_78_arg_0=1, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=63, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=63, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0] [L162] SORT_1 var_71 = var_71_arg_0 ? var_71_arg_1 : var_71_arg_2; [L163] SORT_1 next_72_arg_1 = var_71; [L164] SORT_5 var_73_arg_0 = var_58; [L165] SORT_5 var_73_arg_1 = var_28; [L166] SORT_5 var_73_arg_2 = state_31; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=3, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=0, next_80_arg_1=0, next_82_arg_1=63, next_84_arg_1=0, state_11=0, state_13=0, state_22=127, state_24=192, state_26=0, state_29=1, state_31=1, state_33=0, state_35=0, state_37=0, state_40=63, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=191, var_44_arg_0=127, var_44_arg_1=192, var_45=63, var_45_arg_0=127, var_45_arg_1=192, var_46=63, var_46_arg_0=1, var_46_arg_1=63, var_46_arg_2=191, var_47=63, var_47_arg_0=63, var_47_arg_1=0, var_48=63, var_48_arg_0=63, var_48_arg_1=0, var_49=63, var_49_arg_0=1, var_49_arg_1=63, var_49_arg_2=63, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=1, var_77_arg_0=0, var_78=0, var_78_arg_0=1, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=63, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=63, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0] [L167] EXPR var_73_arg_0 ? var_73_arg_1 : var_73_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=3, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=0, next_80_arg_1=0, next_82_arg_1=63, next_84_arg_1=0, state_11=0, state_13=0, state_22=127, state_24=192, state_26=0, state_29=1, state_31=1, state_33=0, state_35=0, state_37=0, state_40=63, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=191, var_44_arg_0=127, var_44_arg_1=192, var_45=63, var_45_arg_0=127, var_45_arg_1=192, var_46=63, var_46_arg_0=1, var_46_arg_1=63, var_46_arg_2=191, var_47=63, var_47_arg_0=63, var_47_arg_1=0, var_48=63, var_48_arg_0=63, var_48_arg_1=0, var_49=63, var_49_arg_0=1, var_49_arg_1=63, var_49_arg_2=63, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_0 ? var_73_arg_1 : var_73_arg_2=1, var_73_arg_1=0, var_73_arg_2=1, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=1, var_77_arg_0=0, var_78=0, var_78_arg_0=1, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=63, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=63, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0] [L167] SORT_5 var_73 = var_73_arg_0 ? var_73_arg_1 : var_73_arg_2; [L168] var_73 = var_73 & mask_SORT_5 [L169] SORT_5 next_74_arg_1 = var_73; [L170] SORT_5 var_77_arg_0 = state_29; [L171] SORT_5 var_77 = ~var_77_arg_0; [L172] var_77 = var_77 & mask_SORT_5 [L173] SORT_1 var_76_arg_0 = state_22; [L174] SORT_1 var_76_arg_1 = state_24; [L175] SORT_1 var_76 = var_76_arg_0 + var_76_arg_1; [L176] SORT_1 var_75_arg_0 = state_22; [L177] SORT_1 var_75_arg_1 = state_24; [L178] SORT_1 var_75 = var_75_arg_0 - var_75_arg_1; [L179] SORT_5 var_78_arg_0 = var_77; [L180] SORT_1 var_78_arg_1 = var_76; [L181] SORT_1 var_78_arg_2 = var_75; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=3, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=0, next_82_arg_1=63, next_84_arg_1=0, state_11=0, state_13=0, state_22=127, state_24=192, state_26=0, state_29=1, state_31=1, state_33=0, state_35=0, state_37=0, state_40=63, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=191, var_44_arg_0=127, var_44_arg_1=192, var_45=63, var_45_arg_0=127, var_45_arg_1=192, var_46=63, var_46_arg_0=1, var_46_arg_1=63, var_46_arg_2=191, var_47=63, var_47_arg_0=63, var_47_arg_1=0, var_48=63, var_48_arg_0=63, var_48_arg_1=0, var_49=63, var_49_arg_0=1, var_49_arg_1=63, var_49_arg_2=63, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=191, var_75_arg_0=127, var_75_arg_1=192, var_76=63, var_76_arg_0=127, var_76_arg_1=192, var_77=0, var_77_arg_0=1, var_78=0, var_78_arg_0=0, var_78_arg_1=63, var_78_arg_2=191, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=63, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=63, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0] [L182] EXPR var_78_arg_0 ? var_78_arg_1 : var_78_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=3, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=0, next_82_arg_1=63, next_84_arg_1=0, state_11=0, state_13=0, state_22=127, state_24=192, state_26=0, state_29=1, state_31=1, state_33=0, state_35=0, state_37=0, state_40=63, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=191, var_44_arg_0=127, var_44_arg_1=192, var_45=63, var_45_arg_0=127, var_45_arg_1=192, var_46=63, var_46_arg_0=1, var_46_arg_1=63, var_46_arg_2=191, var_47=63, var_47_arg_0=63, var_47_arg_1=0, var_48=63, var_48_arg_0=63, var_48_arg_1=0, var_49=63, var_49_arg_0=1, var_49_arg_1=63, var_49_arg_2=63, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=191, var_75_arg_0=127, var_75_arg_1=192, var_76=63, var_76_arg_0=127, var_76_arg_1=192, var_77=0, var_77_arg_0=1, var_78=0, var_78_arg_0=0, var_78_arg_0 ? var_78_arg_1 : var_78_arg_2=191, var_78_arg_1=63, var_78_arg_2=191, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=63, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=63, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0] [L182] SORT_1 var_78 = var_78_arg_0 ? var_78_arg_1 : var_78_arg_2; [L183] SORT_5 var_79_arg_0 = var_58; [L184] SORT_1 var_79_arg_1 = var_10; [L185] SORT_1 var_79_arg_2 = var_78; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=3, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=0, next_82_arg_1=63, next_84_arg_1=0, state_11=0, state_13=0, state_22=127, state_24=192, state_26=0, state_29=1, state_31=1, state_33=0, state_35=0, state_37=0, state_40=63, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=191, var_44_arg_0=127, var_44_arg_1=192, var_45=63, var_45_arg_0=127, var_45_arg_1=192, var_46=63, var_46_arg_0=1, var_46_arg_1=63, var_46_arg_2=191, var_47=63, var_47_arg_0=63, var_47_arg_1=0, var_48=63, var_48_arg_0=63, var_48_arg_1=0, var_49=63, var_49_arg_0=1, var_49_arg_1=63, var_49_arg_2=63, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=191, var_75_arg_0=127, var_75_arg_1=192, var_76=63, var_76_arg_0=127, var_76_arg_1=192, var_77=0, var_77_arg_0=1, var_78=191, var_78_arg_0=0, var_78_arg_1=63, var_78_arg_2=191, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=191, var_81=63, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=63, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0] [L186] EXPR var_79_arg_0 ? var_79_arg_1 : var_79_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=3, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=0, next_82_arg_1=63, next_84_arg_1=0, state_11=0, state_13=0, state_22=127, state_24=192, state_26=0, state_29=1, state_31=1, state_33=0, state_35=0, state_37=0, state_40=63, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=191, var_44_arg_0=127, var_44_arg_1=192, var_45=63, var_45_arg_0=127, var_45_arg_1=192, var_46=63, var_46_arg_0=1, var_46_arg_1=63, var_46_arg_2=191, var_47=63, var_47_arg_0=63, var_47_arg_1=0, var_48=63, var_48_arg_0=63, var_48_arg_1=0, var_49=63, var_49_arg_0=1, var_49_arg_1=63, var_49_arg_2=63, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=191, var_75_arg_0=127, var_75_arg_1=192, var_76=63, var_76_arg_0=127, var_76_arg_1=192, var_77=0, var_77_arg_0=1, var_78=191, var_78_arg_0=0, var_78_arg_1=63, var_78_arg_2=191, var_79=0, var_79_arg_0=0, var_79_arg_0 ? var_79_arg_1 : var_79_arg_2=191, var_79_arg_1=0, var_79_arg_2=191, var_81=63, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=63, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0] [L186] SORT_1 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L187] SORT_1 next_80_arg_1 = var_79; [L188] SORT_1 var_45_arg_0 = input_2; [L189] SORT_1 var_45_arg_1 = input_3; [L190] SORT_1 var_45 = var_45_arg_0 + var_45_arg_1; [L191] SORT_1 var_44_arg_0 = input_2; [L192] SORT_1 var_44_arg_1 = input_3; [L193] SORT_1 var_44 = var_44_arg_0 - var_44_arg_1; [L194] SORT_5 var_46_arg_0 = input_7; [L195] SORT_1 var_46_arg_1 = var_45; [L196] SORT_1 var_46_arg_2 = var_44; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=3, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=191, next_82_arg_1=63, next_84_arg_1=0, state_11=0, state_13=0, state_22=127, state_24=192, state_26=0, state_29=1, state_31=1, state_33=0, state_35=0, state_37=0, state_40=63, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=63, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_47=63, var_47_arg_0=63, var_47_arg_1=0, var_48=63, var_48_arg_0=63, var_48_arg_1=0, var_49=63, var_49_arg_0=1, var_49_arg_1=63, var_49_arg_2=63, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=191, var_75_arg_0=127, var_75_arg_1=192, var_76=63, var_76_arg_0=127, var_76_arg_1=192, var_77=0, var_77_arg_0=1, var_78=191, var_78_arg_0=0, var_78_arg_1=63, var_78_arg_2=191, var_79=191, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=191, var_81=63, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=63, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0] [L197] EXPR var_46_arg_0 ? var_46_arg_1 : var_46_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=3, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=191, next_82_arg_1=63, next_84_arg_1=0, state_11=0, state_13=0, state_22=127, state_24=192, state_26=0, state_29=1, state_31=1, state_33=0, state_35=0, state_37=0, state_40=63, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=63, var_46_arg_0=1, var_46_arg_0 ? var_46_arg_1 : var_46_arg_2=0, var_46_arg_1=0, var_46_arg_2=0, var_47=63, var_47_arg_0=63, var_47_arg_1=0, var_48=63, var_48_arg_0=63, var_48_arg_1=0, var_49=63, var_49_arg_0=1, var_49_arg_1=63, var_49_arg_2=63, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=191, var_75_arg_0=127, var_75_arg_1=192, var_76=63, var_76_arg_0=127, var_76_arg_1=192, var_77=0, var_77_arg_0=1, var_78=191, var_78_arg_0=0, var_78_arg_1=63, var_78_arg_2=191, var_79=191, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=191, var_81=63, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=63, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0] [L197] SORT_1 var_46 = var_46_arg_0 ? var_46_arg_1 : var_46_arg_2; [L198] SORT_1 var_48_arg_0 = var_46; [L199] SORT_1 var_48_arg_1 = input_4; [L200] SORT_1 var_48 = var_48_arg_0 + var_48_arg_1; [L201] SORT_1 var_47_arg_0 = var_46; [L202] SORT_1 var_47_arg_1 = input_4; [L203] SORT_1 var_47 = var_47_arg_0 - var_47_arg_1; [L204] SORT_5 var_49_arg_0 = input_8; [L205] SORT_1 var_49_arg_1 = var_48; [L206] SORT_1 var_49_arg_2 = var_47; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=3, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=191, next_82_arg_1=63, next_84_arg_1=0, state_11=0, state_13=0, state_22=127, state_24=192, state_26=0, state_29=1, state_31=1, state_33=0, state_35=0, state_37=0, state_40=63, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_48=0, var_48_arg_0=0, var_48_arg_1=0, var_49=63, var_49_arg_0=1, var_49_arg_1=0, var_49_arg_2=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=191, var_75_arg_0=127, var_75_arg_1=192, var_76=63, var_76_arg_0=127, var_76_arg_1=192, var_77=0, var_77_arg_0=1, var_78=191, var_78_arg_0=0, var_78_arg_1=63, var_78_arg_2=191, var_79=191, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=191, var_81=63, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=63, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0] [L207] EXPR var_49_arg_0 ? var_49_arg_1 : var_49_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=3, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=191, next_82_arg_1=63, next_84_arg_1=0, state_11=0, state_13=0, state_22=127, state_24=192, state_26=0, state_29=1, state_31=1, state_33=0, state_35=0, state_37=0, state_40=63, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_48=0, var_48_arg_0=0, var_48_arg_1=0, var_49=63, var_49_arg_0=1, var_49_arg_0 ? var_49_arg_1 : var_49_arg_2=0, var_49_arg_1=0, var_49_arg_2=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=191, var_75_arg_0=127, var_75_arg_1=192, var_76=63, var_76_arg_0=127, var_76_arg_1=192, var_77=0, var_77_arg_0=1, var_78=191, var_78_arg_0=0, var_78_arg_1=63, var_78_arg_2=191, var_79=191, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=191, var_81=63, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=63, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0] [L207] SORT_1 var_49 = var_49_arg_0 ? var_49_arg_1 : var_49_arg_2; [L208] SORT_5 var_81_arg_0 = var_52; [L209] SORT_1 var_81_arg_1 = var_10; [L210] SORT_1 var_81_arg_2 = var_49; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=3, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=191, next_82_arg_1=63, next_84_arg_1=0, state_11=0, state_13=0, state_22=127, state_24=192, state_26=0, state_29=1, state_31=1, state_33=0, state_35=0, state_37=0, state_40=63, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_48=0, var_48_arg_0=0, var_48_arg_1=0, var_49=0, var_49_arg_0=1, var_49_arg_1=0, var_49_arg_2=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=191, var_75_arg_0=127, var_75_arg_1=192, var_76=63, var_76_arg_0=127, var_76_arg_1=192, var_77=0, var_77_arg_0=1, var_78=191, var_78_arg_0=0, var_78_arg_1=63, var_78_arg_2=191, var_79=191, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=191, var_81=63, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=0, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0] [L211] EXPR var_81_arg_0 ? var_81_arg_1 : var_81_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=3, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=191, next_82_arg_1=63, next_84_arg_1=0, state_11=0, state_13=0, state_22=127, state_24=192, state_26=0, state_29=1, state_31=1, state_33=0, state_35=0, state_37=0, state_40=63, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_48=0, var_48_arg_0=0, var_48_arg_1=0, var_49=0, var_49_arg_0=1, var_49_arg_1=0, var_49_arg_2=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=191, var_75_arg_0=127, var_75_arg_1=192, var_76=63, var_76_arg_0=127, var_76_arg_1=192, var_77=0, var_77_arg_0=1, var_78=191, var_78_arg_0=0, var_78_arg_1=63, var_78_arg_2=191, var_79=191, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=191, var_81=63, var_81_arg_0=0, var_81_arg_0 ? var_81_arg_1 : var_81_arg_2=0, var_81_arg_1=0, var_81_arg_2=0, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0] [L211] SORT_1 var_81 = var_81_arg_0 ? var_81_arg_1 : var_81_arg_2; [L212] SORT_1 next_82_arg_1 = var_81; [L213] SORT_5 var_83_arg_0 = var_52; [L214] SORT_1 var_83_arg_1 = var_10; [L215] SORT_1 var_83_arg_2 = state_40; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=3, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=191, next_82_arg_1=0, next_84_arg_1=0, state_11=0, state_13=0, state_22=127, state_24=192, state_26=0, state_29=1, state_31=1, state_33=0, state_35=0, state_37=0, state_40=63, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_48=0, var_48_arg_0=0, var_48_arg_1=0, var_49=0, var_49_arg_0=1, var_49_arg_1=0, var_49_arg_2=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=191, var_75_arg_0=127, var_75_arg_1=192, var_76=63, var_76_arg_0=127, var_76_arg_1=192, var_77=0, var_77_arg_0=1, var_78=191, var_78_arg_0=0, var_78_arg_1=63, var_78_arg_2=191, var_79=191, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=191, var_81=0, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=0, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=63] [L216] EXPR var_83_arg_0 ? var_83_arg_1 : var_83_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=3, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=191, next_82_arg_1=0, next_84_arg_1=0, state_11=0, state_13=0, state_22=127, state_24=192, state_26=0, state_29=1, state_31=1, state_33=0, state_35=0, state_37=0, state_40=63, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_48=0, var_48_arg_0=0, var_48_arg_1=0, var_49=0, var_49_arg_0=1, var_49_arg_1=0, var_49_arg_2=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=191, var_75_arg_0=127, var_75_arg_1=192, var_76=63, var_76_arg_0=127, var_76_arg_1=192, var_77=0, var_77_arg_0=1, var_78=191, var_78_arg_0=0, var_78_arg_1=63, var_78_arg_2=191, var_79=191, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=191, var_81=0, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=0, var_83=0, var_83_arg_0=0, var_83_arg_0 ? var_83_arg_1 : var_83_arg_2=63, var_83_arg_1=0, var_83_arg_2=63] [L216] SORT_1 var_83 = var_83_arg_0 ? var_83_arg_1 : var_83_arg_2; [L217] SORT_1 next_84_arg_1 = var_83; [L219] state_11 = next_54_arg_1 [L220] state_13 = next_60_arg_1 [L221] state_22 = next_62_arg_1 [L222] state_24 = next_64_arg_1 [L223] state_26 = next_66_arg_1 [L224] state_29 = next_68_arg_1 [L225] state_31 = next_70_arg_1 [L226] state_33 = next_72_arg_1 [L227] state_35 = next_74_arg_1 [L228] state_37 = next_80_arg_1 [L229] state_40 = next_82_arg_1 [L230] state_42 = next_84_arg_1 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=3, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=191, next_82_arg_1=0, next_84_arg_1=63, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=1, state_31=1, state_33=0, state_35=1, state_37=191, state_40=0, state_42=63, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_48=0, var_48_arg_0=0, var_48_arg_1=0, var_49=0, var_49_arg_0=1, var_49_arg_1=0, var_49_arg_2=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=191, var_75_arg_0=127, var_75_arg_1=192, var_76=63, var_76_arg_0=127, var_76_arg_1=192, var_77=0, var_77_arg_0=1, var_78=191, var_78_arg_0=0, var_78_arg_1=63, var_78_arg_2=191, var_79=191, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=191, var_81=0, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=0, var_83=63, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=63] [L82] input_2 = __VERIFIER_nondet_uchar() [L83] input_3 = __VERIFIER_nondet_uchar() [L84] input_4 = __VERIFIER_nondet_uchar() [L85] input_6 = __VERIFIER_nondet_uchar() [L86] input_7 = __VERIFIER_nondet_uchar() [L87] input_7 = input_7 & mask_SORT_5 [L88] input_8 = __VERIFIER_nondet_uchar() [L89] input_8 = input_8 & mask_SORT_5 [L90] input_9 = __VERIFIER_nondet_uchar() [L91] input_9 = input_9 & mask_SORT_5 [L94] SORT_1 var_15_arg_0 = state_11; [L95] SORT_1 var_15_arg_1 = state_13; [L96] SORT_5 var_15 = var_15_arg_0 == var_15_arg_1; [L97] SORT_5 var_19_arg_0 = var_15; [L98] SORT_5 var_19 = ~var_19_arg_0; [L99] SORT_5 var_20_arg_0 = var_18; [L100] SORT_5 var_20_arg_1 = var_19; [L101] SORT_5 var_20 = var_20_arg_0 & var_20_arg_1; [L102] var_20 = var_20 & mask_SORT_5 [L103] SORT_5 bad_21_arg_0 = var_20; [L104] CALL __VERIFIER_assert(!(bad_21_arg_0)) [L20] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L104] RET __VERIFIER_assert(!(bad_21_arg_0)) [L106] SORT_5 var_52_arg_0 = input_9; [L107] SORT_5 var_52_arg_1 = var_18; [L108] SORT_5 var_52 = var_52_arg_0 == var_52_arg_1; [L109] SORT_5 var_53_arg_0 = var_52; [L110] SORT_1 var_53_arg_1 = var_10; [L111] SORT_1 var_53_arg_2 = state_42; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=4, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=191, next_82_arg_1=0, next_84_arg_1=63, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=1, state_31=1, state_33=0, state_35=1, state_37=191, state_40=0, state_42=63, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_48=0, var_48_arg_0=0, var_48_arg_1=0, var_49=0, var_49_arg_0=1, var_49_arg_1=0, var_49_arg_2=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=63, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=191, var_75_arg_0=127, var_75_arg_1=192, var_76=63, var_76_arg_0=127, var_76_arg_1=192, var_77=0, var_77_arg_0=1, var_78=191, var_78_arg_0=0, var_78_arg_1=63, var_78_arg_2=191, var_79=191, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=191, var_81=0, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=0, var_83=63, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=63] [L112] EXPR var_53_arg_0 ? var_53_arg_1 : var_53_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=4, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=191, next_82_arg_1=0, next_84_arg_1=63, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=1, state_31=1, state_33=0, state_35=1, state_37=191, state_40=0, state_42=63, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_48=0, var_48_arg_0=0, var_48_arg_1=0, var_49=0, var_49_arg_0=1, var_49_arg_1=0, var_49_arg_2=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_0 ? var_53_arg_1 : var_53_arg_2=63, var_53_arg_1=0, var_53_arg_2=63, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=191, var_75_arg_0=127, var_75_arg_1=192, var_76=63, var_76_arg_0=127, var_76_arg_1=192, var_77=0, var_77_arg_0=1, var_78=191, var_78_arg_0=0, var_78_arg_1=63, var_78_arg_2=191, var_79=191, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=191, var_81=0, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=0, var_83=63, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=63] [L112] SORT_1 var_53 = var_53_arg_0 ? var_53_arg_1 : var_53_arg_2; [L113] var_53 = var_53 & mask_SORT_1 [L114] SORT_1 next_54_arg_1 = var_53; [L115] SORT_5 var_58_arg_0 = input_9; [L116] SORT_5 var_58_arg_1 = var_18; [L117] SORT_5 var_58 = var_58_arg_0 == var_58_arg_1; [L118] SORT_1 var_56_arg_0 = state_37; [L119] SORT_1 var_56_arg_1 = state_33; [L120] SORT_1 var_56 = var_56_arg_0 + var_56_arg_1; [L121] SORT_1 var_55_arg_0 = state_37; [L122] SORT_1 var_55_arg_1 = state_33; [L123] SORT_1 var_55 = var_55_arg_0 - var_55_arg_1; [L124] SORT_5 var_57_arg_0 = state_35; [L125] SORT_1 var_57_arg_1 = var_56; [L126] SORT_1 var_57_arg_2 = var_55; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=4, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=63, next_60_arg_1=0, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=191, next_82_arg_1=0, next_84_arg_1=63, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=1, state_31=1, state_33=0, state_35=1, state_37=191, state_40=0, state_42=63, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_48=0, var_48_arg_0=0, var_48_arg_1=0, var_49=0, var_49_arg_0=1, var_49_arg_1=0, var_49_arg_2=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=63, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=63, var_55=191, var_55_arg_0=191, var_55_arg_1=0, var_56=191, var_56_arg_0=191, var_56_arg_1=0, var_57=0, var_57_arg_0=1, var_57_arg_1=191, var_57_arg_2=191, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=191, var_75_arg_0=127, var_75_arg_1=192, var_76=63, var_76_arg_0=127, var_76_arg_1=192, var_77=0, var_77_arg_0=1, var_78=191, var_78_arg_0=0, var_78_arg_1=63, var_78_arg_2=191, var_79=191, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=191, var_81=0, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=0, var_83=63, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=63] [L127] EXPR var_57_arg_0 ? var_57_arg_1 : var_57_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=4, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=63, next_60_arg_1=0, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=191, next_82_arg_1=0, next_84_arg_1=63, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=1, state_31=1, state_33=0, state_35=1, state_37=191, state_40=0, state_42=63, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_48=0, var_48_arg_0=0, var_48_arg_1=0, var_49=0, var_49_arg_0=1, var_49_arg_1=0, var_49_arg_2=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=63, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=63, var_55=191, var_55_arg_0=191, var_55_arg_1=0, var_56=191, var_56_arg_0=191, var_56_arg_1=0, var_57=0, var_57_arg_0=1, var_57_arg_0 ? var_57_arg_1 : var_57_arg_2=191, var_57_arg_1=191, var_57_arg_2=191, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=191, var_75_arg_0=127, var_75_arg_1=192, var_76=63, var_76_arg_0=127, var_76_arg_1=192, var_77=0, var_77_arg_0=1, var_78=191, var_78_arg_0=0, var_78_arg_1=63, var_78_arg_2=191, var_79=191, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=191, var_81=0, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=0, var_83=63, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=63] [L127] SORT_1 var_57 = var_57_arg_0 ? var_57_arg_1 : var_57_arg_2; [L128] SORT_5 var_59_arg_0 = var_58; [L129] SORT_1 var_59_arg_1 = var_10; [L130] SORT_1 var_59_arg_2 = var_57; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=4, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=63, next_60_arg_1=0, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=191, next_82_arg_1=0, next_84_arg_1=63, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=1, state_31=1, state_33=0, state_35=1, state_37=191, state_40=0, state_42=63, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_48=0, var_48_arg_0=0, var_48_arg_1=0, var_49=0, var_49_arg_0=1, var_49_arg_1=0, var_49_arg_2=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=63, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=63, var_55=191, var_55_arg_0=191, var_55_arg_1=0, var_56=191, var_56_arg_0=191, var_56_arg_1=0, var_57=191, var_57_arg_0=1, var_57_arg_1=191, var_57_arg_2=191, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=191, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=191, var_75_arg_0=127, var_75_arg_1=192, var_76=63, var_76_arg_0=127, var_76_arg_1=192, var_77=0, var_77_arg_0=1, var_78=191, var_78_arg_0=0, var_78_arg_1=63, var_78_arg_2=191, var_79=191, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=191, var_81=0, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=0, var_83=63, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=63] [L131] EXPR var_59_arg_0 ? var_59_arg_1 : var_59_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=4, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=63, next_60_arg_1=0, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=191, next_82_arg_1=0, next_84_arg_1=63, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=1, state_31=1, state_33=0, state_35=1, state_37=191, state_40=0, state_42=63, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_48=0, var_48_arg_0=0, var_48_arg_1=0, var_49=0, var_49_arg_0=1, var_49_arg_1=0, var_49_arg_2=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=63, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=63, var_55=191, var_55_arg_0=191, var_55_arg_1=0, var_56=191, var_56_arg_0=191, var_56_arg_1=0, var_57=191, var_57_arg_0=1, var_57_arg_1=191, var_57_arg_2=191, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_0 ? var_59_arg_1 : var_59_arg_2=191, var_59_arg_1=0, var_59_arg_2=191, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=191, var_75_arg_0=127, var_75_arg_1=192, var_76=63, var_76_arg_0=127, var_76_arg_1=192, var_77=0, var_77_arg_0=1, var_78=191, var_78_arg_0=0, var_78_arg_1=63, var_78_arg_2=191, var_79=191, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=191, var_81=0, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=0, var_83=63, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=63] [L131] SORT_1 var_59 = var_59_arg_0 ? var_59_arg_1 : var_59_arg_2; [L132] var_59 = var_59 & mask_SORT_1 [L133] SORT_1 next_60_arg_1 = var_59; [L134] SORT_5 var_61_arg_0 = var_58; [L135] SORT_1 var_61_arg_1 = var_10; [L136] SORT_1 var_61_arg_2 = input_2; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=4, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=63, next_60_arg_1=191, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=191, next_82_arg_1=0, next_84_arg_1=63, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=1, state_31=1, state_33=0, state_35=1, state_37=191, state_40=0, state_42=63, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_48=0, var_48_arg_0=0, var_48_arg_1=0, var_49=0, var_49_arg_0=1, var_49_arg_1=0, var_49_arg_2=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=63, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=63, var_55=191, var_55_arg_0=191, var_55_arg_1=0, var_56=191, var_56_arg_0=191, var_56_arg_1=0, var_57=191, var_57_arg_0=1, var_57_arg_1=191, var_57_arg_2=191, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=191, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=191, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=191, var_75_arg_0=127, var_75_arg_1=192, var_76=63, var_76_arg_0=127, var_76_arg_1=192, var_77=0, var_77_arg_0=1, var_78=191, var_78_arg_0=0, var_78_arg_1=63, var_78_arg_2=191, var_79=191, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=191, var_81=0, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=0, var_83=63, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=63] [L137] EXPR var_61_arg_0 ? var_61_arg_1 : var_61_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=4, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=63, next_60_arg_1=191, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=191, next_82_arg_1=0, next_84_arg_1=63, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=1, state_31=1, state_33=0, state_35=1, state_37=191, state_40=0, state_42=63, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_48=0, var_48_arg_0=0, var_48_arg_1=0, var_49=0, var_49_arg_0=1, var_49_arg_1=0, var_49_arg_2=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=63, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=63, var_55=191, var_55_arg_0=191, var_55_arg_1=0, var_56=191, var_56_arg_0=191, var_56_arg_1=0, var_57=191, var_57_arg_0=1, var_57_arg_1=191, var_57_arg_2=191, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=191, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=191, var_61=0, var_61_arg_0=0, var_61_arg_0 ? var_61_arg_1 : var_61_arg_2=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=191, var_75_arg_0=127, var_75_arg_1=192, var_76=63, var_76_arg_0=127, var_76_arg_1=192, var_77=0, var_77_arg_0=1, var_78=191, var_78_arg_0=0, var_78_arg_1=63, var_78_arg_2=191, var_79=191, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=191, var_81=0, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=0, var_83=63, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=63] [L137] SORT_1 var_61 = var_61_arg_0 ? var_61_arg_1 : var_61_arg_2; [L138] SORT_1 next_62_arg_1 = var_61; [L139] SORT_5 var_63_arg_0 = var_58; [L140] SORT_1 var_63_arg_1 = var_10; [L141] SORT_1 var_63_arg_2 = input_3; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=4, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=63, next_60_arg_1=191, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=191, next_82_arg_1=0, next_84_arg_1=63, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=1, state_31=1, state_33=0, state_35=1, state_37=191, state_40=0, state_42=63, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_48=0, var_48_arg_0=0, var_48_arg_1=0, var_49=0, var_49_arg_0=1, var_49_arg_1=0, var_49_arg_2=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=63, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=63, var_55=191, var_55_arg_0=191, var_55_arg_1=0, var_56=191, var_56_arg_0=191, var_56_arg_1=0, var_57=191, var_57_arg_0=1, var_57_arg_1=191, var_57_arg_2=191, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=191, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=191, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=191, var_75_arg_0=127, var_75_arg_1=192, var_76=63, var_76_arg_0=127, var_76_arg_1=192, var_77=0, var_77_arg_0=1, var_78=191, var_78_arg_0=0, var_78_arg_1=63, var_78_arg_2=191, var_79=191, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=191, var_81=0, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=0, var_83=63, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=63] [L142] EXPR var_63_arg_0 ? var_63_arg_1 : var_63_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=4, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=63, next_60_arg_1=191, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=191, next_82_arg_1=0, next_84_arg_1=63, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=1, state_31=1, state_33=0, state_35=1, state_37=191, state_40=0, state_42=63, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_48=0, var_48_arg_0=0, var_48_arg_1=0, var_49=0, var_49_arg_0=1, var_49_arg_1=0, var_49_arg_2=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=63, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=63, var_55=191, var_55_arg_0=191, var_55_arg_1=0, var_56=191, var_56_arg_0=191, var_56_arg_1=0, var_57=191, var_57_arg_0=1, var_57_arg_1=191, var_57_arg_2=191, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=191, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=191, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_0 ? var_63_arg_1 : var_63_arg_2=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=191, var_75_arg_0=127, var_75_arg_1=192, var_76=63, var_76_arg_0=127, var_76_arg_1=192, var_77=0, var_77_arg_0=1, var_78=191, var_78_arg_0=0, var_78_arg_1=63, var_78_arg_2=191, var_79=191, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=191, var_81=0, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=0, var_83=63, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=63] [L142] SORT_1 var_63 = var_63_arg_0 ? var_63_arg_1 : var_63_arg_2; [L143] SORT_1 next_64_arg_1 = var_63; [L144] SORT_5 var_65_arg_0 = var_58; [L145] SORT_1 var_65_arg_1 = var_10; [L146] SORT_1 var_65_arg_2 = input_4; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=4, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=63, next_60_arg_1=191, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=191, next_82_arg_1=0, next_84_arg_1=63, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=1, state_31=1, state_33=0, state_35=1, state_37=191, state_40=0, state_42=63, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_48=0, var_48_arg_0=0, var_48_arg_1=0, var_49=0, var_49_arg_0=1, var_49_arg_1=0, var_49_arg_2=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=63, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=63, var_55=191, var_55_arg_0=191, var_55_arg_1=0, var_56=191, var_56_arg_0=191, var_56_arg_1=0, var_57=191, var_57_arg_0=1, var_57_arg_1=191, var_57_arg_2=191, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=191, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=191, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=191, var_75_arg_0=127, var_75_arg_1=192, var_76=63, var_76_arg_0=127, var_76_arg_1=192, var_77=0, var_77_arg_0=1, var_78=191, var_78_arg_0=0, var_78_arg_1=63, var_78_arg_2=191, var_79=191, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=191, var_81=0, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=0, var_83=63, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=63] [L147] EXPR var_65_arg_0 ? var_65_arg_1 : var_65_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=4, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=63, next_60_arg_1=191, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=191, next_82_arg_1=0, next_84_arg_1=63, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=1, state_31=1, state_33=0, state_35=1, state_37=191, state_40=0, state_42=63, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_48=0, var_48_arg_0=0, var_48_arg_1=0, var_49=0, var_49_arg_0=1, var_49_arg_1=0, var_49_arg_2=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=63, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=63, var_55=191, var_55_arg_0=191, var_55_arg_1=0, var_56=191, var_56_arg_0=191, var_56_arg_1=0, var_57=191, var_57_arg_0=1, var_57_arg_1=191, var_57_arg_2=191, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=191, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=191, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_0 ? var_65_arg_1 : var_65_arg_2=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=191, var_75_arg_0=127, var_75_arg_1=192, var_76=63, var_76_arg_0=127, var_76_arg_1=192, var_77=0, var_77_arg_0=1, var_78=191, var_78_arg_0=0, var_78_arg_1=63, var_78_arg_2=191, var_79=191, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=191, var_81=0, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=0, var_83=63, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=63] [L147] SORT_1 var_65 = var_65_arg_0 ? var_65_arg_1 : var_65_arg_2; [L148] SORT_1 next_66_arg_1 = var_65; [L149] SORT_5 var_67_arg_0 = var_58; [L150] SORT_5 var_67_arg_1 = var_28; [L151] SORT_5 var_67_arg_2 = input_7; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=4, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=63, next_60_arg_1=191, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=191, next_82_arg_1=0, next_84_arg_1=63, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=1, state_31=1, state_33=0, state_35=1, state_37=191, state_40=0, state_42=63, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_48=0, var_48_arg_0=0, var_48_arg_1=0, var_49=0, var_49_arg_0=1, var_49_arg_1=0, var_49_arg_2=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=63, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=63, var_55=191, var_55_arg_0=191, var_55_arg_1=0, var_56=191, var_56_arg_0=191, var_56_arg_1=0, var_57=191, var_57_arg_0=1, var_57_arg_1=191, var_57_arg_2=191, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=191, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=191, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=191, var_75_arg_0=127, var_75_arg_1=192, var_76=63, var_76_arg_0=127, var_76_arg_1=192, var_77=0, var_77_arg_0=1, var_78=191, var_78_arg_0=0, var_78_arg_1=63, var_78_arg_2=191, var_79=191, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=191, var_81=0, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=0, var_83=63, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=63] [L152] EXPR var_67_arg_0 ? var_67_arg_1 : var_67_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=4, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=63, next_60_arg_1=191, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=191, next_82_arg_1=0, next_84_arg_1=63, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=1, state_31=1, state_33=0, state_35=1, state_37=191, state_40=0, state_42=63, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_48=0, var_48_arg_0=0, var_48_arg_1=0, var_49=0, var_49_arg_0=1, var_49_arg_1=0, var_49_arg_2=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=63, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=63, var_55=191, var_55_arg_0=191, var_55_arg_1=0, var_56=191, var_56_arg_0=191, var_56_arg_1=0, var_57=191, var_57_arg_0=1, var_57_arg_1=191, var_57_arg_2=191, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=191, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=191, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_0 ? var_67_arg_1 : var_67_arg_2=1, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=191, var_75_arg_0=127, var_75_arg_1=192, var_76=63, var_76_arg_0=127, var_76_arg_1=192, var_77=0, var_77_arg_0=1, var_78=191, var_78_arg_0=0, var_78_arg_1=63, var_78_arg_2=191, var_79=191, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=191, var_81=0, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=0, var_83=63, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=63] [L152] SORT_5 var_67 = var_67_arg_0 ? var_67_arg_1 : var_67_arg_2; [L153] SORT_5 next_68_arg_1 = var_67; [L154] SORT_5 var_69_arg_0 = var_58; [L155] SORT_5 var_69_arg_1 = var_28; [L156] SORT_5 var_69_arg_2 = input_8; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=4, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=63, next_60_arg_1=191, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=191, next_82_arg_1=0, next_84_arg_1=63, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=1, state_31=1, state_33=0, state_35=1, state_37=191, state_40=0, state_42=63, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_48=0, var_48_arg_0=0, var_48_arg_1=0, var_49=0, var_49_arg_0=1, var_49_arg_1=0, var_49_arg_2=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=63, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=63, var_55=191, var_55_arg_0=191, var_55_arg_1=0, var_56=191, var_56_arg_0=191, var_56_arg_1=0, var_57=191, var_57_arg_0=1, var_57_arg_1=191, var_57_arg_2=191, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=191, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=191, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=191, var_75_arg_0=127, var_75_arg_1=192, var_76=63, var_76_arg_0=127, var_76_arg_1=192, var_77=0, var_77_arg_0=1, var_78=191, var_78_arg_0=0, var_78_arg_1=63, var_78_arg_2=191, var_79=191, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=191, var_81=0, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=0, var_83=63, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=63] [L157] EXPR var_69_arg_0 ? var_69_arg_1 : var_69_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=4, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=63, next_60_arg_1=191, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=191, next_82_arg_1=0, next_84_arg_1=63, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=1, state_31=1, state_33=0, state_35=1, state_37=191, state_40=0, state_42=63, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_48=0, var_48_arg_0=0, var_48_arg_1=0, var_49=0, var_49_arg_0=1, var_49_arg_1=0, var_49_arg_2=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=63, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=63, var_55=191, var_55_arg_0=191, var_55_arg_1=0, var_56=191, var_56_arg_0=191, var_56_arg_1=0, var_57=191, var_57_arg_0=1, var_57_arg_1=191, var_57_arg_2=191, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=191, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=191, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_0 ? var_69_arg_1 : var_69_arg_2=1, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=191, var_75_arg_0=127, var_75_arg_1=192, var_76=63, var_76_arg_0=127, var_76_arg_1=192, var_77=0, var_77_arg_0=1, var_78=191, var_78_arg_0=0, var_78_arg_1=63, var_78_arg_2=191, var_79=191, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=191, var_81=0, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=0, var_83=63, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=63] [L157] SORT_5 var_69 = var_69_arg_0 ? var_69_arg_1 : var_69_arg_2; [L158] SORT_5 next_70_arg_1 = var_69; [L159] SORT_5 var_71_arg_0 = var_58; [L160] SORT_1 var_71_arg_1 = var_10; [L161] SORT_1 var_71_arg_2 = state_26; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=4, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=63, next_60_arg_1=191, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=191, next_82_arg_1=0, next_84_arg_1=63, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=1, state_31=1, state_33=0, state_35=1, state_37=191, state_40=0, state_42=63, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_48=0, var_48_arg_0=0, var_48_arg_1=0, var_49=0, var_49_arg_0=1, var_49_arg_1=0, var_49_arg_2=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=63, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=63, var_55=191, var_55_arg_0=191, var_55_arg_1=0, var_56=191, var_56_arg_0=191, var_56_arg_1=0, var_57=191, var_57_arg_0=1, var_57_arg_1=191, var_57_arg_2=191, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=191, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=191, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=191, var_75_arg_0=127, var_75_arg_1=192, var_76=63, var_76_arg_0=127, var_76_arg_1=192, var_77=0, var_77_arg_0=1, var_78=191, var_78_arg_0=0, var_78_arg_1=63, var_78_arg_2=191, var_79=191, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=191, var_81=0, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=0, var_83=63, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=63] [L162] EXPR var_71_arg_0 ? var_71_arg_1 : var_71_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=4, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=63, next_60_arg_1=191, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=191, next_82_arg_1=0, next_84_arg_1=63, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=1, state_31=1, state_33=0, state_35=1, state_37=191, state_40=0, state_42=63, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_48=0, var_48_arg_0=0, var_48_arg_1=0, var_49=0, var_49_arg_0=1, var_49_arg_1=0, var_49_arg_2=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=63, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=63, var_55=191, var_55_arg_0=191, var_55_arg_1=0, var_56=191, var_56_arg_0=191, var_56_arg_1=0, var_57=191, var_57_arg_0=1, var_57_arg_1=191, var_57_arg_2=191, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=191, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=191, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_0 ? var_71_arg_1 : var_71_arg_2=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=191, var_75_arg_0=127, var_75_arg_1=192, var_76=63, var_76_arg_0=127, var_76_arg_1=192, var_77=0, var_77_arg_0=1, var_78=191, var_78_arg_0=0, var_78_arg_1=63, var_78_arg_2=191, var_79=191, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=191, var_81=0, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=0, var_83=63, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=63] [L162] SORT_1 var_71 = var_71_arg_0 ? var_71_arg_1 : var_71_arg_2; [L163] SORT_1 next_72_arg_1 = var_71; [L164] SORT_5 var_73_arg_0 = var_58; [L165] SORT_5 var_73_arg_1 = var_28; [L166] SORT_5 var_73_arg_2 = state_31; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=4, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=63, next_60_arg_1=191, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=191, next_82_arg_1=0, next_84_arg_1=63, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=1, state_31=1, state_33=0, state_35=1, state_37=191, state_40=0, state_42=63, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_48=0, var_48_arg_0=0, var_48_arg_1=0, var_49=0, var_49_arg_0=1, var_49_arg_1=0, var_49_arg_2=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=63, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=63, var_55=191, var_55_arg_0=191, var_55_arg_1=0, var_56=191, var_56_arg_0=191, var_56_arg_1=0, var_57=191, var_57_arg_0=1, var_57_arg_1=191, var_57_arg_2=191, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=191, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=191, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=191, var_75_arg_0=127, var_75_arg_1=192, var_76=63, var_76_arg_0=127, var_76_arg_1=192, var_77=0, var_77_arg_0=1, var_78=191, var_78_arg_0=0, var_78_arg_1=63, var_78_arg_2=191, var_79=191, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=191, var_81=0, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=0, var_83=63, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=63] [L167] EXPR var_73_arg_0 ? var_73_arg_1 : var_73_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=4, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=63, next_60_arg_1=191, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=191, next_82_arg_1=0, next_84_arg_1=63, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=1, state_31=1, state_33=0, state_35=1, state_37=191, state_40=0, state_42=63, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_48=0, var_48_arg_0=0, var_48_arg_1=0, var_49=0, var_49_arg_0=1, var_49_arg_1=0, var_49_arg_2=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=63, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=63, var_55=191, var_55_arg_0=191, var_55_arg_1=0, var_56=191, var_56_arg_0=191, var_56_arg_1=0, var_57=191, var_57_arg_0=1, var_57_arg_1=191, var_57_arg_2=191, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=191, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=191, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_0 ? var_73_arg_1 : var_73_arg_2=1, var_73_arg_1=0, var_73_arg_2=1, var_75=191, var_75_arg_0=127, var_75_arg_1=192, var_76=63, var_76_arg_0=127, var_76_arg_1=192, var_77=0, var_77_arg_0=1, var_78=191, var_78_arg_0=0, var_78_arg_1=63, var_78_arg_2=191, var_79=191, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=191, var_81=0, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=0, var_83=63, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=63] [L167] SORT_5 var_73 = var_73_arg_0 ? var_73_arg_1 : var_73_arg_2; [L168] var_73 = var_73 & mask_SORT_5 [L169] SORT_5 next_74_arg_1 = var_73; [L170] SORT_5 var_77_arg_0 = state_29; [L171] SORT_5 var_77 = ~var_77_arg_0; [L172] var_77 = var_77 & mask_SORT_5 [L173] SORT_1 var_76_arg_0 = state_22; [L174] SORT_1 var_76_arg_1 = state_24; [L175] SORT_1 var_76 = var_76_arg_0 + var_76_arg_1; [L176] SORT_1 var_75_arg_0 = state_22; [L177] SORT_1 var_75_arg_1 = state_24; [L178] SORT_1 var_75 = var_75_arg_0 - var_75_arg_1; [L179] SORT_5 var_78_arg_0 = var_77; [L180] SORT_1 var_78_arg_1 = var_76; [L181] SORT_1 var_78_arg_2 = var_75; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=4, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=63, next_60_arg_1=191, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=191, next_82_arg_1=0, next_84_arg_1=63, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=1, state_31=1, state_33=0, state_35=1, state_37=191, state_40=0, state_42=63, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_48=0, var_48_arg_0=0, var_48_arg_1=0, var_49=0, var_49_arg_0=1, var_49_arg_1=0, var_49_arg_2=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=63, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=63, var_55=191, var_55_arg_0=191, var_55_arg_1=0, var_56=191, var_56_arg_0=191, var_56_arg_1=0, var_57=191, var_57_arg_0=1, var_57_arg_1=191, var_57_arg_2=191, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=191, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=191, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=1, var_78=191, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=191, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=191, var_81=0, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=0, var_83=63, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=63] [L182] EXPR var_78_arg_0 ? var_78_arg_1 : var_78_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=4, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=63, next_60_arg_1=191, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=191, next_82_arg_1=0, next_84_arg_1=63, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=1, state_31=1, state_33=0, state_35=1, state_37=191, state_40=0, state_42=63, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_48=0, var_48_arg_0=0, var_48_arg_1=0, var_49=0, var_49_arg_0=1, var_49_arg_1=0, var_49_arg_2=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=63, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=63, var_55=191, var_55_arg_0=191, var_55_arg_1=0, var_56=191, var_56_arg_0=191, var_56_arg_1=0, var_57=191, var_57_arg_0=1, var_57_arg_1=191, var_57_arg_2=191, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=191, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=191, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=1, var_78=191, var_78_arg_0=0, var_78_arg_0 ? var_78_arg_1 : var_78_arg_2=0, var_78_arg_1=0, var_78_arg_2=0, var_79=191, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=191, var_81=0, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=0, var_83=63, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=63] [L182] SORT_1 var_78 = var_78_arg_0 ? var_78_arg_1 : var_78_arg_2; [L183] SORT_5 var_79_arg_0 = var_58; [L184] SORT_1 var_79_arg_1 = var_10; [L185] SORT_1 var_79_arg_2 = var_78; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=4, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=63, next_60_arg_1=191, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=191, next_82_arg_1=0, next_84_arg_1=63, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=1, state_31=1, state_33=0, state_35=1, state_37=191, state_40=0, state_42=63, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_48=0, var_48_arg_0=0, var_48_arg_1=0, var_49=0, var_49_arg_0=1, var_49_arg_1=0, var_49_arg_2=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=63, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=63, var_55=191, var_55_arg_0=191, var_55_arg_1=0, var_56=191, var_56_arg_0=191, var_56_arg_1=0, var_57=191, var_57_arg_0=1, var_57_arg_1=191, var_57_arg_2=191, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=191, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=191, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=191, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=0, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=0, var_83=63, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=63] [L186] EXPR var_79_arg_0 ? var_79_arg_1 : var_79_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=4, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=63, next_60_arg_1=191, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=191, next_82_arg_1=0, next_84_arg_1=63, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=1, state_31=1, state_33=0, state_35=1, state_37=191, state_40=0, state_42=63, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_48=0, var_48_arg_0=0, var_48_arg_1=0, var_49=0, var_49_arg_0=1, var_49_arg_1=0, var_49_arg_2=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=63, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=63, var_55=191, var_55_arg_0=191, var_55_arg_1=0, var_56=191, var_56_arg_0=191, var_56_arg_1=0, var_57=191, var_57_arg_0=1, var_57_arg_1=191, var_57_arg_2=191, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=191, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=191, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=191, var_79_arg_0=0, var_79_arg_0 ? var_79_arg_1 : var_79_arg_2=0, var_79_arg_1=0, var_79_arg_2=0, var_81=0, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=0, var_83=63, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=63] [L186] SORT_1 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L187] SORT_1 next_80_arg_1 = var_79; [L188] SORT_1 var_45_arg_0 = input_2; [L189] SORT_1 var_45_arg_1 = input_3; [L190] SORT_1 var_45 = var_45_arg_0 + var_45_arg_1; [L191] SORT_1 var_44_arg_0 = input_2; [L192] SORT_1 var_44_arg_1 = input_3; [L193] SORT_1 var_44 = var_44_arg_0 - var_44_arg_1; [L194] SORT_5 var_46_arg_0 = input_7; [L195] SORT_1 var_46_arg_1 = var_45; [L196] SORT_1 var_46_arg_2 = var_44; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=4, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=63, next_60_arg_1=191, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=0, next_82_arg_1=0, next_84_arg_1=63, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=1, state_31=1, state_33=0, state_35=1, state_37=191, state_40=0, state_42=63, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_48=0, var_48_arg_0=0, var_48_arg_1=0, var_49=0, var_49_arg_0=1, var_49_arg_1=0, var_49_arg_2=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=63, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=63, var_55=191, var_55_arg_0=191, var_55_arg_1=0, var_56=191, var_56_arg_0=191, var_56_arg_1=0, var_57=191, var_57_arg_0=1, var_57_arg_1=191, var_57_arg_2=191, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=191, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=191, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=0, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=0, var_83=63, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=63] [L197] EXPR var_46_arg_0 ? var_46_arg_1 : var_46_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=4, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=63, next_60_arg_1=191, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=0, next_82_arg_1=0, next_84_arg_1=63, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=1, state_31=1, state_33=0, state_35=1, state_37=191, state_40=0, state_42=63, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_0 ? var_46_arg_1 : var_46_arg_2=0, var_46_arg_1=0, var_46_arg_2=0, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_48=0, var_48_arg_0=0, var_48_arg_1=0, var_49=0, var_49_arg_0=1, var_49_arg_1=0, var_49_arg_2=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=63, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=63, var_55=191, var_55_arg_0=191, var_55_arg_1=0, var_56=191, var_56_arg_0=191, var_56_arg_1=0, var_57=191, var_57_arg_0=1, var_57_arg_1=191, var_57_arg_2=191, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=191, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=191, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=0, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=0, var_83=63, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=63] [L197] SORT_1 var_46 = var_46_arg_0 ? var_46_arg_1 : var_46_arg_2; [L198] SORT_1 var_48_arg_0 = var_46; [L199] SORT_1 var_48_arg_1 = input_4; [L200] SORT_1 var_48 = var_48_arg_0 + var_48_arg_1; [L201] SORT_1 var_47_arg_0 = var_46; [L202] SORT_1 var_47_arg_1 = input_4; [L203] SORT_1 var_47 = var_47_arg_0 - var_47_arg_1; [L204] SORT_5 var_49_arg_0 = input_8; [L205] SORT_1 var_49_arg_1 = var_48; [L206] SORT_1 var_49_arg_2 = var_47; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=4, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=63, next_60_arg_1=191, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=0, next_82_arg_1=0, next_84_arg_1=63, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=1, state_31=1, state_33=0, state_35=1, state_37=191, state_40=0, state_42=63, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_48=0, var_48_arg_0=0, var_48_arg_1=0, var_49=0, var_49_arg_0=1, var_49_arg_1=0, var_49_arg_2=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=63, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=63, var_55=191, var_55_arg_0=191, var_55_arg_1=0, var_56=191, var_56_arg_0=191, var_56_arg_1=0, var_57=191, var_57_arg_0=1, var_57_arg_1=191, var_57_arg_2=191, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=191, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=191, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=0, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=0, var_83=63, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=63] [L207] EXPR var_49_arg_0 ? var_49_arg_1 : var_49_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=4, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=63, next_60_arg_1=191, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=0, next_82_arg_1=0, next_84_arg_1=63, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=1, state_31=1, state_33=0, state_35=1, state_37=191, state_40=0, state_42=63, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_48=0, var_48_arg_0=0, var_48_arg_1=0, var_49=0, var_49_arg_0=1, var_49_arg_0 ? var_49_arg_1 : var_49_arg_2=0, var_49_arg_1=0, var_49_arg_2=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=63, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=63, var_55=191, var_55_arg_0=191, var_55_arg_1=0, var_56=191, var_56_arg_0=191, var_56_arg_1=0, var_57=191, var_57_arg_0=1, var_57_arg_1=191, var_57_arg_2=191, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=191, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=191, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=0, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=0, var_83=63, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=63] [L207] SORT_1 var_49 = var_49_arg_0 ? var_49_arg_1 : var_49_arg_2; [L208] SORT_5 var_81_arg_0 = var_52; [L209] SORT_1 var_81_arg_1 = var_10; [L210] SORT_1 var_81_arg_2 = var_49; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=4, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=63, next_60_arg_1=191, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=0, next_82_arg_1=0, next_84_arg_1=63, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=1, state_31=1, state_33=0, state_35=1, state_37=191, state_40=0, state_42=63, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_48=0, var_48_arg_0=0, var_48_arg_1=0, var_49=0, var_49_arg_0=1, var_49_arg_1=0, var_49_arg_2=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=63, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=63, var_55=191, var_55_arg_0=191, var_55_arg_1=0, var_56=191, var_56_arg_0=191, var_56_arg_1=0, var_57=191, var_57_arg_0=1, var_57_arg_1=191, var_57_arg_2=191, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=191, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=191, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=0, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=0, var_83=63, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=63] [L211] EXPR var_81_arg_0 ? var_81_arg_1 : var_81_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=4, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=63, next_60_arg_1=191, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=0, next_82_arg_1=0, next_84_arg_1=63, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=1, state_31=1, state_33=0, state_35=1, state_37=191, state_40=0, state_42=63, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_48=0, var_48_arg_0=0, var_48_arg_1=0, var_49=0, var_49_arg_0=1, var_49_arg_1=0, var_49_arg_2=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=63, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=63, var_55=191, var_55_arg_0=191, var_55_arg_1=0, var_56=191, var_56_arg_0=191, var_56_arg_1=0, var_57=191, var_57_arg_0=1, var_57_arg_1=191, var_57_arg_2=191, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=191, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=191, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=0, var_81_arg_0=0, var_81_arg_0 ? var_81_arg_1 : var_81_arg_2=0, var_81_arg_1=0, var_81_arg_2=0, var_83=63, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=63] [L211] SORT_1 var_81 = var_81_arg_0 ? var_81_arg_1 : var_81_arg_2; [L212] SORT_1 next_82_arg_1 = var_81; [L213] SORT_5 var_83_arg_0 = var_52; [L214] SORT_1 var_83_arg_1 = var_10; [L215] SORT_1 var_83_arg_2 = state_40; VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=4, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=63, next_60_arg_1=191, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=0, next_82_arg_1=0, next_84_arg_1=63, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=1, state_31=1, state_33=0, state_35=1, state_37=191, state_40=0, state_42=63, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_48=0, var_48_arg_0=0, var_48_arg_1=0, var_49=0, var_49_arg_0=1, var_49_arg_1=0, var_49_arg_2=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=63, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=63, var_55=191, var_55_arg_0=191, var_55_arg_1=0, var_56=191, var_56_arg_0=191, var_56_arg_1=0, var_57=191, var_57_arg_0=1, var_57_arg_1=191, var_57_arg_2=191, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=191, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=191, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=0, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=0, var_83=63, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0] [L216] EXPR var_83_arg_0 ? var_83_arg_1 : var_83_arg_2 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=4, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=63, next_60_arg_1=191, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=0, next_82_arg_1=0, next_84_arg_1=63, state_11=0, state_13=0, state_22=0, state_24=0, state_26=0, state_29=1, state_31=1, state_33=0, state_35=1, state_37=191, state_40=0, state_42=63, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_48=0, var_48_arg_0=0, var_48_arg_1=0, var_49=0, var_49_arg_0=1, var_49_arg_1=0, var_49_arg_2=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=63, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=63, var_55=191, var_55_arg_0=191, var_55_arg_1=0, var_56=191, var_56_arg_0=191, var_56_arg_1=0, var_57=191, var_57_arg_0=1, var_57_arg_1=191, var_57_arg_2=191, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=191, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=191, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=0, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=0, var_83=63, var_83_arg_0=0, var_83_arg_0 ? var_83_arg_1 : var_83_arg_2=0, var_83_arg_1=0, var_83_arg_2=0] [L216] SORT_1 var_83 = var_83_arg_0 ? var_83_arg_1 : var_83_arg_2; [L217] SORT_1 next_84_arg_1 = var_83; [L219] state_11 = next_54_arg_1 [L220] state_13 = next_60_arg_1 [L221] state_22 = next_62_arg_1 [L222] state_24 = next_64_arg_1 [L223] state_26 = next_66_arg_1 [L224] state_29 = next_68_arg_1 [L225] state_31 = next_70_arg_1 [L226] state_33 = next_72_arg_1 [L227] state_35 = next_74_arg_1 [L228] state_37 = next_80_arg_1 [L229] state_40 = next_82_arg_1 [L230] state_42 = next_84_arg_1 VAL [bad_21_arg_0=0, init_12_arg_1=0, init_14_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, input_2=0, input_3=0, input_4=0, input_6=4, input_7=1, input_8=1, input_9=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=63, next_60_arg_1=191, next_62_arg_1=0, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=1, next_72_arg_1=0, next_74_arg_1=1, next_80_arg_1=0, next_82_arg_1=0, next_84_arg_1=0, state_11=63, state_13=191, state_22=0, state_24=0, state_26=0, state_29=1, state_31=1, state_33=0, state_35=1, state_37=0, state_40=0, state_42=0, var_10=0, var_15=1, var_15_arg_0=0, var_15_arg_1=0, var_18=1, var_19=254, var_19_arg_0=1, var_20=0, var_20_arg_0=1, var_20_arg_1=254, var_28=0, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_46_arg_0=1, var_46_arg_1=0, var_46_arg_2=0, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_48=0, var_48_arg_0=0, var_48_arg_1=0, var_49=0, var_49_arg_0=1, var_49_arg_1=0, var_49_arg_2=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=63, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=63, var_55=191, var_55_arg_0=191, var_55_arg_1=0, var_56=191, var_56_arg_0=191, var_56_arg_1=0, var_57=191, var_57_arg_0=1, var_57_arg_1=191, var_57_arg_2=191, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=191, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=191, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=0, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=1, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=1, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=0, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=0, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0] [L82] input_2 = __VERIFIER_nondet_uchar() [L83] input_3 = __VERIFIER_nondet_uchar() [L84] input_4 = __VERIFIER_nondet_uchar() [L85] input_6 = __VERIFIER_nondet_uchar() [L86] input_7 = __VERIFIER_nondet_uchar() [L87] input_7 = input_7 & mask_SORT_5 [L88] input_8 = __VERIFIER_nondet_uchar() [L89] input_8 = input_8 & mask_SORT_5 [L90] input_9 = __VERIFIER_nondet_uchar() [L91] input_9 = input_9 & mask_SORT_5 [L94] SORT_1 var_15_arg_0 = state_11; [L95] SORT_1 var_15_arg_1 = state_13; [L96] SORT_5 var_15 = var_15_arg_0 == var_15_arg_1; [L97] SORT_5 var_19_arg_0 = var_15; [L98] SORT_5 var_19 = ~var_19_arg_0; [L99] SORT_5 var_20_arg_0 = var_18; [L100] SORT_5 var_20_arg_1 = var_19; [L101] SORT_5 var_20 = var_20_arg_0 & var_20_arg_1; [L102] var_20 = var_20 & mask_SORT_5 [L103] SORT_5 bad_21_arg_0 = var_20; [L104] CALL __VERIFIER_assert(!(bad_21_arg_0)) [L20] COND TRUE !(cond) VAL [\old(cond)=0, cond=0] [L20] reach_error() VAL [\old(cond)=0, cond=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 43 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 131.5s, OverallIterations: 54, TraceHistogramMax: 4, PathProgramHistogramMax: 5, EmptinessCheckTime: 0.1s, AutomataDifference: 38.8s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 16246 SdHoareTripleChecker+Valid, 6.7s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 16246 mSDsluCounter, 39847 SdHoareTripleChecker+Invalid, 5.7s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 6956 IncrementalHoareTripleChecker+Unchecked, 34632 mSDsCounter, 503 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 5700 IncrementalHoareTripleChecker+Invalid, 13159 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 503 mSolverCounterUnsat, 5215 mSDtfsCounter, 5700 mSolverCounterSat, 0.1s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 11336 GetRequests, 10219 SyntacticMatches, 26 SemanticMatches, 1091 ConstructedPredicates, 0 IntricatePredicates, 3 DeprecatedPredicates, 10547 ImplicationChecksByTransitivity, 49.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=1719occurred in iteration=53, InterpolantAutomatonStates: 804, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 2.3s AutomataMinimizationTime, 53 MinimizatonAttempts, 14882 StatesRemovedByMinimization, 53 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 3.4s SsaConstructionTime, 7.4s SatisfiabilityAnalysisTime, 57.9s InterpolantComputationTime, 6325 NumberOfCodeBlocks, 6290 NumberOfCodeBlocksAsserted, 116 NumberOfCheckSat, 10733 ConstructedInterpolants, 2139 QuantifiedInterpolants, 114862 SizeOfPredicates, 1268 NumberOfNonLiveVariables, 32589 ConjunctsInSsa, 1539 ConjunctsInUnsatCore, 137 InterpolantComputations, 39 PerfectInterpolantSequences, 4739/7547 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2022-11-03 03:34:06,861 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_63cd8132-c846-4d34-aa44-eda240b7b77e/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE