./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.eq_sdp_v5.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 5e519f3a Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.eq_sdp_v5.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 366eeddf946b02891f12ae6008d89d4c3d48d85db851b5226ae799d18837dde3 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-5e519f3 [2022-11-03 02:53:19,179 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-03 02:53:19,182 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-03 02:53:19,232 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-03 02:53:19,233 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-03 02:53:19,238 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-03 02:53:19,240 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-03 02:53:19,245 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-03 02:53:19,247 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-03 02:53:19,254 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-03 02:53:19,255 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-03 02:53:19,256 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-03 02:53:19,257 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-03 02:53:19,258 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-03 02:53:19,259 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-03 02:53:19,260 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-03 02:53:19,261 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-03 02:53:19,262 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-03 02:53:19,263 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-03 02:53:19,265 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-03 02:53:19,274 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-03 02:53:19,276 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-03 02:53:19,279 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-03 02:53:19,281 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-03 02:53:19,292 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-03 02:53:19,292 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-03 02:53:19,292 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-03 02:53:19,294 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-03 02:53:19,295 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-03 02:53:19,296 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-03 02:53:19,296 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-03 02:53:19,297 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-03 02:53:19,299 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-03 02:53:19,300 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-03 02:53:19,301 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-03 02:53:19,302 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-03 02:53:19,302 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-03 02:53:19,303 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-03 02:53:19,303 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-03 02:53:19,304 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-03 02:53:19,304 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-03 02:53:19,305 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Default.epf [2022-11-03 02:53:19,351 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-03 02:53:19,352 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-03 02:53:19,352 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-03 02:53:19,352 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-03 02:53:19,353 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-03 02:53:19,354 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-03 02:53:19,354 INFO L138 SettingsManager]: * User list type=DISABLED [2022-11-03 02:53:19,354 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-11-03 02:53:19,354 INFO L138 SettingsManager]: * Explicit value domain=true [2022-11-03 02:53:19,354 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2022-11-03 02:53:19,355 INFO L138 SettingsManager]: * Octagon Domain=false [2022-11-03 02:53:19,356 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-11-03 02:53:19,356 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2022-11-03 02:53:19,356 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2022-11-03 02:53:19,356 INFO L138 SettingsManager]: * Interval Domain=false [2022-11-03 02:53:19,356 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2022-11-03 02:53:19,357 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2022-11-03 02:53:19,357 INFO L138 SettingsManager]: * Simplification Technique=POLY_PAC [2022-11-03 02:53:19,357 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-03 02:53:19,358 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-03 02:53:19,358 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-03 02:53:19,358 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-03 02:53:19,358 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-03 02:53:19,358 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-03 02:53:19,358 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-03 02:53:19,359 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-03 02:53:19,359 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-03 02:53:19,359 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-03 02:53:19,359 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-03 02:53:19,359 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 02:53:19,360 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-03 02:53:19,360 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2022-11-03 02:53:19,360 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-03 02:53:19,360 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-03 02:53:19,361 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2022-11-03 02:53:19,361 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-11-03 02:53:19,361 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-03 02:53:19,361 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-11-03 02:53:19,361 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 366eeddf946b02891f12ae6008d89d4c3d48d85db851b5226ae799d18837dde3 [2022-11-03 02:53:19,688 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-03 02:53:19,731 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-03 02:53:19,734 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-03 02:53:19,735 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-03 02:53:19,736 INFO L275 PluginConnector]: CDTParser initialized [2022-11-03 02:53:19,737 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.eq_sdp_v5.c [2022-11-03 02:53:19,813 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/data/b67d8fe53/dcb033f01b7d4a8989a1d30cf893c39a/FLAGd0d8fb395 [2022-11-03 02:53:20,414 INFO L306 CDTParser]: Found 1 translation units. [2022-11-03 02:53:20,415 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.eq_sdp_v5.c [2022-11-03 02:53:20,423 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/data/b67d8fe53/dcb033f01b7d4a8989a1d30cf893c39a/FLAGd0d8fb395 [2022-11-03 02:53:20,735 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/data/b67d8fe53/dcb033f01b7d4a8989a1d30cf893c39a [2022-11-03 02:53:20,737 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-03 02:53:20,739 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-03 02:53:20,740 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-03 02:53:20,740 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-03 02:53:20,744 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-03 02:53:20,745 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 02:53:20" (1/1) ... [2022-11-03 02:53:20,746 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5c887532 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:20, skipping insertion in model container [2022-11-03 02:53:20,746 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 02:53:20" (1/1) ... [2022-11-03 02:53:20,753 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-03 02:53:20,782 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-03 02:53:20,960 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.eq_sdp_v5.c[1107,1120] [2022-11-03 02:53:21,027 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 02:53:21,031 INFO L203 MainTranslator]: Completed pre-run [2022-11-03 02:53:21,042 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.eq_sdp_v5.c[1107,1120] [2022-11-03 02:53:21,083 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 02:53:21,096 INFO L208 MainTranslator]: Completed translation [2022-11-03 02:53:21,097 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:21 WrapperNode [2022-11-03 02:53:21,097 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-03 02:53:21,098 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-03 02:53:21,099 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-03 02:53:21,099 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-03 02:53:21,114 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:21" (1/1) ... [2022-11-03 02:53:21,124 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:21" (1/1) ... [2022-11-03 02:53:21,182 INFO L138 Inliner]: procedures = 11, calls = 3, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 284 [2022-11-03 02:53:21,182 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-03 02:53:21,184 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-03 02:53:21,184 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-03 02:53:21,185 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-03 02:53:21,195 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:21" (1/1) ... [2022-11-03 02:53:21,195 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:21" (1/1) ... [2022-11-03 02:53:21,207 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:21" (1/1) ... [2022-11-03 02:53:21,207 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:21" (1/1) ... [2022-11-03 02:53:21,218 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:21" (1/1) ... [2022-11-03 02:53:21,222 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:21" (1/1) ... [2022-11-03 02:53:21,225 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:21" (1/1) ... [2022-11-03 02:53:21,227 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:21" (1/1) ... [2022-11-03 02:53:21,236 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-03 02:53:21,237 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-03 02:53:21,237 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-03 02:53:21,237 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-03 02:53:21,238 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:21" (1/1) ... [2022-11-03 02:53:21,250 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 02:53:21,267 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:53:21,277 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-03 02:53:21,279 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-03 02:53:21,314 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-03 02:53:21,315 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-03 02:53:21,459 INFO L235 CfgBuilder]: Building ICFG [2022-11-03 02:53:21,462 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-03 02:53:21,944 INFO L276 CfgBuilder]: Performing block encoding [2022-11-03 02:53:22,359 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-03 02:53:22,359 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-03 02:53:22,363 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 02:53:22 BoogieIcfgContainer [2022-11-03 02:53:22,363 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-03 02:53:22,368 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-03 02:53:22,368 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-03 02:53:22,372 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-03 02:53:22,373 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 03.11 02:53:20" (1/3) ... [2022-11-03 02:53:22,374 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7072cd50 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 02:53:22, skipping insertion in model container [2022-11-03 02:53:22,374 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:21" (2/3) ... [2022-11-03 02:53:22,374 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7072cd50 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 02:53:22, skipping insertion in model container [2022-11-03 02:53:22,375 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 02:53:22" (3/3) ... [2022-11-03 02:53:22,376 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.eq_sdp_v5.c [2022-11-03 02:53:22,394 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-03 02:53:22,394 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-03 02:53:22,457 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-03 02:53:22,470 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@35bfbf35, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-03 02:53:22,471 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-03 02:53:22,481 INFO L276 IsEmpty]: Start isEmpty. Operand has 7 states, 5 states have (on average 1.6) internal successors, (8), 6 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:22,491 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2022-11-03 02:53:22,492 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:53:22,492 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1] [2022-11-03 02:53:22,494 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:53:22,500 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:53:22,501 INFO L85 PathProgramCache]: Analyzing trace with hash 4925543, now seen corresponding path program 1 times [2022-11-03 02:53:22,510 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-03 02:53:22,510 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1720831931] [2022-11-03 02:53:22,511 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:53:22,511 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-03 02:53:22,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-03 02:53:22,765 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-03 02:53:22,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-03 02:53:22,875 INFO L130 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2022-11-03 02:53:22,877 INFO L359 BasicCegarLoop]: Counterexample is feasible [2022-11-03 02:53:22,879 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-11-03 02:53:22,881 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-11-03 02:53:22,885 INFO L444 BasicCegarLoop]: Path program histogram: [1] [2022-11-03 02:53:22,910 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-03 02:53:22,938 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 02:53:22,949 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 03.11 02:53:22 BoogieIcfgContainer [2022-11-03 02:53:22,950 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-03 02:53:22,952 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-03 02:53:22,952 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-03 02:53:22,952 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-03 02:53:22,954 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 02:53:22" (3/4) ... [2022-11-03 02:53:22,957 INFO L140 WitnessPrinter]: No result that supports witness generation found [2022-11-03 02:53:22,958 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-03 02:53:22,960 INFO L158 Benchmark]: Toolchain (without parser) took 2220.88ms. Allocated memory was 111.1MB in the beginning and 163.6MB in the end (delta: 52.4MB). Free memory was 83.8MB in the beginning and 133.5MB in the end (delta: -49.7MB). Peak memory consumption was 1.2MB. Max. memory is 16.1GB. [2022-11-03 02:53:22,961 INFO L158 Benchmark]: CDTParser took 0.30ms. Allocated memory is still 111.1MB. Free memory is still 67.2MB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-03 02:53:22,962 INFO L158 Benchmark]: CACSL2BoogieTranslator took 357.68ms. Allocated memory was 111.1MB in the beginning and 163.6MB in the end (delta: 52.4MB). Free memory was 83.6MB in the beginning and 134.8MB in the end (delta: -51.2MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2022-11-03 02:53:22,963 INFO L158 Benchmark]: Boogie Procedure Inliner took 84.27ms. Allocated memory is still 163.6MB. Free memory was 134.8MB in the beginning and 130.7MB in the end (delta: 4.0MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. [2022-11-03 02:53:22,964 INFO L158 Benchmark]: Boogie Preprocessor took 52.58ms. Allocated memory is still 163.6MB. Free memory was 130.7MB in the beginning and 128.3MB in the end (delta: 2.4MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-11-03 02:53:22,965 INFO L158 Benchmark]: RCFGBuilder took 1126.97ms. Allocated memory is still 163.6MB. Free memory was 128.3MB in the beginning and 99.0MB in the end (delta: 29.3MB). Peak memory consumption was 42.3MB. Max. memory is 16.1GB. [2022-11-03 02:53:22,965 INFO L158 Benchmark]: TraceAbstraction took 581.82ms. Allocated memory is still 163.6MB. Free memory was 98.4MB in the beginning and 133.5MB in the end (delta: -35.1MB). Peak memory consumption was 29.9MB. Max. memory is 16.1GB. [2022-11-03 02:53:22,966 INFO L158 Benchmark]: Witness Printer took 6.98ms. Allocated memory is still 163.6MB. Free memory is still 133.5MB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-03 02:53:22,968 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.30ms. Allocated memory is still 111.1MB. Free memory is still 67.2MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 357.68ms. Allocated memory was 111.1MB in the beginning and 163.6MB in the end (delta: 52.4MB). Free memory was 83.6MB in the beginning and 134.8MB in the end (delta: -51.2MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 84.27ms. Allocated memory is still 163.6MB. Free memory was 134.8MB in the beginning and 130.7MB in the end (delta: 4.0MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. * Boogie Preprocessor took 52.58ms. Allocated memory is still 163.6MB. Free memory was 130.7MB in the beginning and 128.3MB in the end (delta: 2.4MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * RCFGBuilder took 1126.97ms. Allocated memory is still 163.6MB. Free memory was 128.3MB in the beginning and 99.0MB in the end (delta: 29.3MB). Peak memory consumption was 42.3MB. Max. memory is 16.1GB. * TraceAbstraction took 581.82ms. Allocated memory is still 163.6MB. Free memory was 98.4MB in the beginning and 133.5MB in the end (delta: -35.1MB). Peak memory consumption was 29.9MB. Max. memory is 16.1GB. * Witness Printer took 6.98ms. Allocated memory is still 163.6MB. Free memory is still 133.5MB. There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 20]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: overapproximation of bitwiseComplement at line 95, overapproximation of bitwiseAnd at line 85. Possible FailurePath: [L25] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 8); [L26] const SORT_1 msb_SORT_1 = (SORT_1)1 << (8 - 1); [L28] const SORT_5 mask_SORT_5 = (SORT_5)-1 >> (sizeof(SORT_5) * 8 - 1); [L29] const SORT_5 msb_SORT_5 = (SORT_5)1 << (1 - 1); [L31] const SORT_1 var_9 = 0; [L32] const SORT_5 var_17 = 1; [L33] const SORT_5 var_29 = 0; [L34] const SORT_1 var_75 = 1; [L36] SORT_1 input_2; [L37] SORT_1 input_3; [L38] SORT_1 input_4; [L39] SORT_5 input_6; [L40] SORT_5 input_7; [L41] SORT_5 input_8; [L42] SORT_5 input_27; [L44] SORT_1 state_10 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L45] SORT_1 state_12 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L46] SORT_1 state_21 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L47] SORT_1 state_23 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L48] SORT_1 state_25 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L49] SORT_5 state_30 = __VERIFIER_nondet_uchar() & mask_SORT_5; [L50] SORT_1 state_32 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L51] SORT_5 state_34 = __VERIFIER_nondet_uchar() & mask_SORT_5; [L52] SORT_1 state_36 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L53] SORT_1 state_39 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L54] SORT_1 state_41 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L56] SORT_1 init_11_arg_1 = var_9; [L57] state_10 = init_11_arg_1 [L58] SORT_1 init_13_arg_1 = var_9; [L59] state_12 = init_13_arg_1 [L60] SORT_1 init_22_arg_1 = var_9; [L61] state_21 = init_22_arg_1 [L62] SORT_1 init_24_arg_1 = var_9; [L63] state_23 = init_24_arg_1 [L64] SORT_1 init_26_arg_1 = var_9; [L65] state_25 = init_26_arg_1 [L66] SORT_5 init_31_arg_1 = var_29; [L67] state_30 = init_31_arg_1 [L68] SORT_1 init_33_arg_1 = var_9; [L69] state_32 = init_33_arg_1 [L70] SORT_5 init_35_arg_1 = var_29; [L71] state_34 = init_35_arg_1 [L72] SORT_1 init_37_arg_1 = var_9; [L73] state_36 = init_37_arg_1 [L74] SORT_1 init_40_arg_1 = var_9; [L75] state_39 = init_40_arg_1 [L76] SORT_1 init_42_arg_1 = var_9; [L77] state_41 = init_42_arg_1 VAL [init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, state_10=0, state_12=0, state_21=0, state_23=0, state_25=0, state_30=0, state_32=0, state_34=0, state_36=0, state_39=0, state_41=0, var_17=1, var_29=0, var_75=1, var_9=0] [L80] input_2 = __VERIFIER_nondet_uchar() [L81] input_3 = __VERIFIER_nondet_uchar() [L82] input_4 = __VERIFIER_nondet_uchar() [L83] input_6 = __VERIFIER_nondet_uchar() [L84] input_7 = __VERIFIER_nondet_uchar() [L85] input_7 = input_7 & mask_SORT_5 [L86] input_8 = __VERIFIER_nondet_uchar() [L87] input_8 = input_8 & mask_SORT_5 [L88] input_27 = __VERIFIER_nondet_uchar() [L91] SORT_1 var_14_arg_0 = state_10; [L92] SORT_1 var_14_arg_1 = state_12; [L93] SORT_5 var_14 = var_14_arg_0 == var_14_arg_1; [L94] SORT_5 var_18_arg_0 = var_14; [L95] SORT_5 var_18 = ~var_18_arg_0; [L96] SORT_5 var_19_arg_0 = var_17; [L97] SORT_5 var_19_arg_1 = var_18; [L98] SORT_5 var_19 = var_19_arg_0 & var_19_arg_1; [L99] var_19 = var_19 & mask_SORT_5 [L100] SORT_5 bad_20_arg_0 = var_19; [L101] CALL __VERIFIER_assert(!(bad_20_arg_0)) [L20] COND TRUE !(cond) VAL [\old(cond)=0, cond=0] [L20] reach_error() VAL [\old(cond)=0, cond=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 7 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 0.5s, OverallIterations: 1, TraceHistogramMax: 1, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: , PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=7occurred in iteration=0, InterpolantAutomatonStates: 0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.0s InterpolantComputationTime, 4 NumberOfCodeBlocks, 4 NumberOfCodeBlocksAsserted, 1 NumberOfCheckSat, 0 ConstructedInterpolants, 0 QuantifiedInterpolants, 0 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 0 InterpolantComputations, 0 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2022-11-03 02:53:23,010 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.eq_sdp_v5.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 366eeddf946b02891f12ae6008d89d4c3d48d85db851b5226ae799d18837dde3 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-5e519f3 [2022-11-03 02:53:25,349 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-03 02:53:25,352 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-03 02:53:25,379 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-03 02:53:25,380 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-03 02:53:25,381 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-03 02:53:25,382 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-03 02:53:25,384 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-03 02:53:25,386 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-03 02:53:25,387 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-03 02:53:25,388 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-03 02:53:25,390 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-03 02:53:25,390 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-03 02:53:25,391 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-03 02:53:25,393 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-03 02:53:25,394 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-03 02:53:25,395 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-03 02:53:25,396 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-03 02:53:25,398 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-03 02:53:25,405 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-03 02:53:25,407 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-03 02:53:25,408 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-03 02:53:25,410 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-03 02:53:25,411 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-03 02:53:25,415 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-03 02:53:25,415 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-03 02:53:25,416 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-03 02:53:25,417 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-03 02:53:25,418 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-03 02:53:25,419 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-03 02:53:25,419 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-03 02:53:25,420 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-03 02:53:25,421 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-03 02:53:25,422 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-03 02:53:25,423 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-03 02:53:25,424 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-03 02:53:25,424 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-03 02:53:25,425 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-03 02:53:25,425 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-03 02:53:25,426 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-03 02:53:25,429 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-03 02:53:25,430 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Bitvector.epf [2022-11-03 02:53:25,472 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-03 02:53:25,475 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-03 02:53:25,476 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-03 02:53:25,477 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-03 02:53:25,477 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-03 02:53:25,478 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-03 02:53:25,478 INFO L138 SettingsManager]: * User list type=DISABLED [2022-11-03 02:53:25,478 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-11-03 02:53:25,478 INFO L138 SettingsManager]: * Explicit value domain=true [2022-11-03 02:53:25,479 INFO L138 SettingsManager]: * Octagon Domain=false [2022-11-03 02:53:25,480 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-11-03 02:53:25,480 INFO L138 SettingsManager]: * Interval Domain=false [2022-11-03 02:53:25,482 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-03 02:53:25,482 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-03 02:53:25,482 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-03 02:53:25,482 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-03 02:53:25,482 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-03 02:53:25,483 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-11-03 02:53:25,483 INFO L138 SettingsManager]: * Use bitvectors instead of ints=true [2022-11-03 02:53:25,483 INFO L138 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2022-11-03 02:53:25,483 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-03 02:53:25,484 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-03 02:53:25,484 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-03 02:53:25,484 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-03 02:53:25,484 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-03 02:53:25,484 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-03 02:53:25,485 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 02:53:25,485 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-03 02:53:25,485 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-03 02:53:25,485 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-03 02:53:25,486 INFO L138 SettingsManager]: * Trace refinement strategy=WALRUS [2022-11-03 02:53:25,486 INFO L138 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2022-11-03 02:53:25,486 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-03 02:53:25,486 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-11-03 02:53:25,487 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-11-03 02:53:25,487 INFO L138 SettingsManager]: * Logic for external solver=AUFBV WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 366eeddf946b02891f12ae6008d89d4c3d48d85db851b5226ae799d18837dde3 [2022-11-03 02:53:25,902 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-03 02:53:25,924 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-03 02:53:25,926 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-03 02:53:25,928 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-03 02:53:25,928 INFO L275 PluginConnector]: CDTParser initialized [2022-11-03 02:53:25,930 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.eq_sdp_v5.c [2022-11-03 02:53:26,000 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/data/a4af2b89b/6cabe9d35be24a9992354ce4bbfb2dbe/FLAGd85bcb77b [2022-11-03 02:53:26,576 INFO L306 CDTParser]: Found 1 translation units. [2022-11-03 02:53:26,577 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.eq_sdp_v5.c [2022-11-03 02:53:26,585 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/data/a4af2b89b/6cabe9d35be24a9992354ce4bbfb2dbe/FLAGd85bcb77b [2022-11-03 02:53:26,909 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/data/a4af2b89b/6cabe9d35be24a9992354ce4bbfb2dbe [2022-11-03 02:53:26,914 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-03 02:53:26,916 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-03 02:53:26,920 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-03 02:53:26,921 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-03 02:53:26,925 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-03 02:53:26,925 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 02:53:26" (1/1) ... [2022-11-03 02:53:26,931 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@610c5a35 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:26, skipping insertion in model container [2022-11-03 02:53:26,931 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 02:53:26" (1/1) ... [2022-11-03 02:53:26,941 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-03 02:53:26,966 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-03 02:53:27,096 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.eq_sdp_v5.c[1107,1120] [2022-11-03 02:53:27,211 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 02:53:27,248 INFO L203 MainTranslator]: Completed pre-run [2022-11-03 02:53:27,266 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.eq_sdp_v5.c[1107,1120] [2022-11-03 02:53:27,325 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 02:53:27,345 INFO L208 MainTranslator]: Completed translation [2022-11-03 02:53:27,346 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:27 WrapperNode [2022-11-03 02:53:27,346 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-03 02:53:27,347 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-03 02:53:27,347 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-03 02:53:27,347 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-03 02:53:27,354 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:27" (1/1) ... [2022-11-03 02:53:27,375 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:27" (1/1) ... [2022-11-03 02:53:27,416 INFO L138 Inliner]: procedures = 11, calls = 3, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 284 [2022-11-03 02:53:27,419 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-03 02:53:27,420 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-03 02:53:27,421 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-03 02:53:27,421 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-03 02:53:27,430 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:27" (1/1) ... [2022-11-03 02:53:27,431 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:27" (1/1) ... [2022-11-03 02:53:27,443 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:27" (1/1) ... [2022-11-03 02:53:27,449 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:27" (1/1) ... [2022-11-03 02:53:27,456 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:27" (1/1) ... [2022-11-03 02:53:27,473 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:27" (1/1) ... [2022-11-03 02:53:27,475 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:27" (1/1) ... [2022-11-03 02:53:27,476 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:27" (1/1) ... [2022-11-03 02:53:27,482 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-03 02:53:27,487 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-03 02:53:27,487 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-03 02:53:27,487 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-03 02:53:27,488 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:27" (1/1) ... [2022-11-03 02:53:27,497 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 02:53:27,508 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:53:27,522 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-03 02:53:27,546 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-03 02:53:27,574 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-03 02:53:27,575 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-03 02:53:27,730 INFO L235 CfgBuilder]: Building ICFG [2022-11-03 02:53:27,739 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-03 02:53:28,268 INFO L276 CfgBuilder]: Performing block encoding [2022-11-03 02:53:28,276 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-03 02:53:28,276 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-03 02:53:28,278 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 02:53:28 BoogieIcfgContainer [2022-11-03 02:53:28,280 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-03 02:53:28,282 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-03 02:53:28,283 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-03 02:53:28,286 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-03 02:53:28,287 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 03.11 02:53:26" (1/3) ... [2022-11-03 02:53:28,288 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5ad0bf75 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 02:53:28, skipping insertion in model container [2022-11-03 02:53:28,288 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:27" (2/3) ... [2022-11-03 02:53:28,289 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5ad0bf75 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 02:53:28, skipping insertion in model container [2022-11-03 02:53:28,289 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 02:53:28" (3/3) ... [2022-11-03 02:53:28,290 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.eq_sdp_v5.c [2022-11-03 02:53:28,311 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-03 02:53:28,311 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-03 02:53:28,372 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-03 02:53:28,378 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@84fc250, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-03 02:53:28,379 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-03 02:53:28,383 INFO L276 IsEmpty]: Start isEmpty. Operand has 41 states, 39 states have (on average 1.4871794871794872) internal successors, (58), 40 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:28,405 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2022-11-03 02:53:28,405 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:53:28,406 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2022-11-03 02:53:28,407 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:53:28,416 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:53:28,416 INFO L85 PathProgramCache]: Analyzing trace with hash 28698761, now seen corresponding path program 1 times [2022-11-03 02:53:28,427 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:53:28,427 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [605191164] [2022-11-03 02:53:28,427 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:53:28,428 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:53:28,428 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:53:28,429 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:53:28,432 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (2)] Waiting until timeout for monitored process [2022-11-03 02:53:28,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:53:28,535 INFO L263 TraceCheckSpWp]: Trace formula consists of 53 conjuncts, 17 conjunts are in the unsatisfiable core [2022-11-03 02:53:28,541 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:53:28,748 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:53:28,748 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:53:28,749 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:53:28,749 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [605191164] [2022-11-03 02:53:28,750 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [605191164] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:53:28,750 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:53:28,750 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-03 02:53:28,766 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2118572474] [2022-11-03 02:53:28,767 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:53:28,771 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 02:53:28,772 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:53:28,801 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 02:53:28,801 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 02:53:28,803 INFO L87 Difference]: Start difference. First operand has 41 states, 39 states have (on average 1.4871794871794872) internal successors, (58), 40 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:28,933 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:53:28,933 INFO L93 Difference]: Finished difference Result 110 states and 165 transitions. [2022-11-03 02:53:28,934 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-03 02:53:28,936 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 5 [2022-11-03 02:53:28,936 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:53:28,944 INFO L225 Difference]: With dead ends: 110 [2022-11-03 02:53:28,945 INFO L226 Difference]: Without dead ends: 71 [2022-11-03 02:53:28,947 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-03 02:53:28,951 INFO L413 NwaCegarLoop]: 49 mSDtfsCounter, 94 mSDsluCounter, 96 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 94 SdHoareTripleChecker+Valid, 145 SdHoareTripleChecker+Invalid, 11 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:53:28,952 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [94 Valid, 145 Invalid, 11 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 02:53:28,969 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71 states. [2022-11-03 02:53:28,984 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71 to 39. [2022-11-03 02:53:28,990 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 38 states have (on average 1.4210526315789473) internal successors, (54), 38 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:28,993 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 54 transitions. [2022-11-03 02:53:28,995 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 54 transitions. Word has length 5 [2022-11-03 02:53:28,995 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:53:28,996 INFO L495 AbstractCegarLoop]: Abstraction has 39 states and 54 transitions. [2022-11-03 02:53:28,996 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:28,996 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 54 transitions. [2022-11-03 02:53:28,998 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2022-11-03 02:53:28,998 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:53:28,998 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:53:29,015 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (2)] Forceful destruction successful, exit code 0 [2022-11-03 02:53:29,209 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:53:29,210 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:53:29,210 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:53:29,211 INFO L85 PathProgramCache]: Analyzing trace with hash -473289749, now seen corresponding path program 1 times [2022-11-03 02:53:29,215 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:53:29,215 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [732047637] [2022-11-03 02:53:29,216 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:53:29,216 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:53:29,216 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:53:29,217 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:53:29,221 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (3)] Waiting until timeout for monitored process [2022-11-03 02:53:29,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:53:29,479 INFO L263 TraceCheckSpWp]: Trace formula consists of 222 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 02:53:29,484 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:53:29,731 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:53:29,731 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:53:29,731 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:53:29,732 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [732047637] [2022-11-03 02:53:29,732 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [732047637] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:53:29,732 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:53:29,732 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-11-03 02:53:29,733 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [637549422] [2022-11-03 02:53:29,733 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:53:29,734 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-03 02:53:29,735 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:53:29,735 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-03 02:53:29,736 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-11-03 02:53:29,736 INFO L87 Difference]: Start difference. First operand 39 states and 54 transitions. Second operand has 8 states, 8 states have (on average 4.75) internal successors, (38), 8 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:29,895 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:53:29,895 INFO L93 Difference]: Finished difference Result 126 states and 179 transitions. [2022-11-03 02:53:29,895 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-03 02:53:29,896 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 4.75) internal successors, (38), 8 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 38 [2022-11-03 02:53:29,896 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:53:29,897 INFO L225 Difference]: With dead ends: 126 [2022-11-03 02:53:29,897 INFO L226 Difference]: Without dead ends: 91 [2022-11-03 02:53:29,898 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2022-11-03 02:53:29,899 INFO L413 NwaCegarLoop]: 64 mSDtfsCounter, 125 mSDsluCounter, 319 mSDsCounter, 0 mSdLazyCounter, 65 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 125 SdHoareTripleChecker+Valid, 383 SdHoareTripleChecker+Invalid, 86 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 65 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 19 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:53:29,900 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [125 Valid, 383 Invalid, 86 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 65 Invalid, 0 Unknown, 19 Unchecked, 0.1s Time] [2022-11-03 02:53:29,901 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91 states. [2022-11-03 02:53:29,907 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91 to 57. [2022-11-03 02:53:29,908 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 57 states, 56 states have (on average 1.4285714285714286) internal successors, (80), 56 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:29,909 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 80 transitions. [2022-11-03 02:53:29,909 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 80 transitions. Word has length 38 [2022-11-03 02:53:29,909 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:53:29,909 INFO L495 AbstractCegarLoop]: Abstraction has 57 states and 80 transitions. [2022-11-03 02:53:29,910 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 4.75) internal successors, (38), 8 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:29,910 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 80 transitions. [2022-11-03 02:53:29,911 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2022-11-03 02:53:29,911 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:53:29,911 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:53:29,931 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (3)] Forceful destruction successful, exit code 0 [2022-11-03 02:53:30,130 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:53:30,131 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:53:30,131 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:53:30,132 INFO L85 PathProgramCache]: Analyzing trace with hash 1115058153, now seen corresponding path program 1 times [2022-11-03 02:53:30,132 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:53:30,133 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1829618316] [2022-11-03 02:53:30,133 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:53:30,133 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:53:30,133 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:53:30,136 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:53:30,170 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (4)] Waiting until timeout for monitored process [2022-11-03 02:53:30,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:53:30,296 INFO L263 TraceCheckSpWp]: Trace formula consists of 222 conjuncts, 11 conjunts are in the unsatisfiable core [2022-11-03 02:53:30,299 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:53:30,461 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:53:30,462 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:53:30,462 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:53:30,462 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1829618316] [2022-11-03 02:53:30,463 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1829618316] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:53:30,463 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:53:30,463 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-03 02:53:30,463 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1870845943] [2022-11-03 02:53:30,464 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:53:30,464 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 02:53:30,464 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:53:30,465 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 02:53:30,465 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 02:53:30,465 INFO L87 Difference]: Start difference. First operand 57 states and 80 transitions. Second operand has 4 states, 4 states have (on average 9.5) internal successors, (38), 4 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:30,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:53:30,497 INFO L93 Difference]: Finished difference Result 155 states and 221 transitions. [2022-11-03 02:53:30,497 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-03 02:53:30,497 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 9.5) internal successors, (38), 4 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 38 [2022-11-03 02:53:30,498 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:53:30,499 INFO L225 Difference]: With dead ends: 155 [2022-11-03 02:53:30,499 INFO L226 Difference]: Without dead ends: 120 [2022-11-03 02:53:30,499 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-03 02:53:30,501 INFO L413 NwaCegarLoop]: 80 mSDtfsCounter, 90 mSDsluCounter, 112 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 90 SdHoareTripleChecker+Valid, 192 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 02:53:30,501 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [90 Valid, 192 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-03 02:53:30,502 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2022-11-03 02:53:30,508 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 75. [2022-11-03 02:53:30,508 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 75 states, 74 states have (on average 1.4324324324324325) internal successors, (106), 74 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:30,509 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 106 transitions. [2022-11-03 02:53:30,510 INFO L78 Accepts]: Start accepts. Automaton has 75 states and 106 transitions. Word has length 38 [2022-11-03 02:53:30,510 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:53:30,510 INFO L495 AbstractCegarLoop]: Abstraction has 75 states and 106 transitions. [2022-11-03 02:53:30,511 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 9.5) internal successors, (38), 4 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:30,511 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 106 transitions. [2022-11-03 02:53:30,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2022-11-03 02:53:30,512 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:53:30,512 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:53:30,540 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (4)] Forceful destruction successful, exit code 0 [2022-11-03 02:53:30,734 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:53:30,735 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:53:30,735 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:53:30,736 INFO L85 PathProgramCache]: Analyzing trace with hash -164805525, now seen corresponding path program 1 times [2022-11-03 02:53:30,736 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:53:30,736 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [2079228907] [2022-11-03 02:53:30,736 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:53:30,737 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:53:30,737 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:53:30,738 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:53:30,741 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (5)] Waiting until timeout for monitored process [2022-11-03 02:53:30,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:53:30,881 INFO L263 TraceCheckSpWp]: Trace formula consists of 222 conjuncts, 23 conjunts are in the unsatisfiable core [2022-11-03 02:53:30,884 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:53:31,313 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:53:31,313 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:53:32,303 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:53:32,304 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:53:32,304 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [2079228907] [2022-11-03 02:53:32,304 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [2079228907] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:53:32,304 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [83880280] [2022-11-03 02:53:32,304 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:53:32,305 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:53:32,305 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:53:32,309 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:53:32,343 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (6)] Waiting until timeout for monitored process [2022-11-03 02:53:32,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:53:32,540 INFO L263 TraceCheckSpWp]: Trace formula consists of 222 conjuncts, 23 conjunts are in the unsatisfiable core [2022-11-03 02:53:32,544 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:53:32,816 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:53:32,816 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:53:33,247 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:53:33,250 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [83880280] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:53:33,251 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [129956597] [2022-11-03 02:53:33,251 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:53:33,251 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:53:33,252 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:53:33,255 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:53:33,274 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-11-03 02:53:33,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:53:33,379 INFO L263 TraceCheckSpWp]: Trace formula consists of 222 conjuncts, 26 conjunts are in the unsatisfiable core [2022-11-03 02:53:33,382 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:53:33,693 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:53:33,693 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:53:34,156 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:53:34,156 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [129956597] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:53:34,156 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:53:34,156 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 12, 12] total 22 [2022-11-03 02:53:34,157 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [639827825] [2022-11-03 02:53:34,157 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:53:34,159 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-11-03 02:53:34,160 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:53:34,161 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-11-03 02:53:34,162 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=86, Invalid=376, Unknown=0, NotChecked=0, Total=462 [2022-11-03 02:53:34,162 INFO L87 Difference]: Start difference. First operand 75 states and 106 transitions. Second operand has 22 states, 22 states have (on average 3.5454545454545454) internal successors, (78), 22 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:35,348 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:53:35,348 INFO L93 Difference]: Finished difference Result 242 states and 346 transitions. [2022-11-03 02:53:35,349 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2022-11-03 02:53:35,349 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 3.5454545454545454) internal successors, (78), 22 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 38 [2022-11-03 02:53:35,350 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:53:35,353 INFO L225 Difference]: With dead ends: 242 [2022-11-03 02:53:35,353 INFO L226 Difference]: Without dead ends: 240 [2022-11-03 02:53:35,354 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 245 GetRequests, 203 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 284 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=472, Invalid=1250, Unknown=0, NotChecked=0, Total=1722 [2022-11-03 02:53:35,359 INFO L413 NwaCegarLoop]: 39 mSDtfsCounter, 1359 mSDsluCounter, 389 mSDsCounter, 0 mSdLazyCounter, 177 mSolverCounterSat, 52 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1359 SdHoareTripleChecker+Valid, 428 SdHoareTripleChecker+Invalid, 562 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 52 IncrementalHoareTripleChecker+Valid, 177 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 333 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-03 02:53:35,361 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1359 Valid, 428 Invalid, 562 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [52 Valid, 177 Invalid, 0 Unknown, 333 Unchecked, 0.3s Time] [2022-11-03 02:53:35,364 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 240 states. [2022-11-03 02:53:35,377 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 240 to 120. [2022-11-03 02:53:35,382 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 120 states, 119 states have (on average 1.4285714285714286) internal successors, (170), 119 states have internal predecessors, (170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:35,384 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 170 transitions. [2022-11-03 02:53:35,387 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 170 transitions. Word has length 38 [2022-11-03 02:53:35,387 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:53:35,387 INFO L495 AbstractCegarLoop]: Abstraction has 120 states and 170 transitions. [2022-11-03 02:53:35,391 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 3.5454545454545454) internal successors, (78), 22 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:35,391 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 170 transitions. [2022-11-03 02:53:35,392 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2022-11-03 02:53:35,394 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:53:35,395 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:53:35,434 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-11-03 02:53:35,612 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (6)] Forceful destruction successful, exit code 0 [2022-11-03 02:53:35,818 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (5)] Forceful destruction successful, exit code 0 [2022-11-03 02:53:36,010 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:53:36,011 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:53:36,011 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:53:36,011 INFO L85 PathProgramCache]: Analyzing trace with hash 1221397869, now seen corresponding path program 1 times [2022-11-03 02:53:36,012 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:53:36,012 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [607717923] [2022-11-03 02:53:36,012 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:53:36,012 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:53:36,012 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:53:36,013 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:53:36,014 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (8)] Waiting until timeout for monitored process [2022-11-03 02:53:36,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:53:36,137 INFO L263 TraceCheckSpWp]: Trace formula consists of 222 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 02:53:36,139 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:53:36,266 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:53:36,266 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:53:36,266 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:53:36,266 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [607717923] [2022-11-03 02:53:36,267 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [607717923] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:53:36,267 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:53:36,267 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-11-03 02:53:36,267 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1857201754] [2022-11-03 02:53:36,267 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:53:36,268 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-03 02:53:36,268 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:53:36,268 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-03 02:53:36,269 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-11-03 02:53:36,269 INFO L87 Difference]: Start difference. First operand 120 states and 170 transitions. Second operand has 8 states, 8 states have (on average 4.75) internal successors, (38), 8 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:36,384 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:53:36,385 INFO L93 Difference]: Finished difference Result 209 states and 296 transitions. [2022-11-03 02:53:36,385 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-03 02:53:36,385 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 4.75) internal successors, (38), 8 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 38 [2022-11-03 02:53:36,385 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:53:36,386 INFO L225 Difference]: With dead ends: 209 [2022-11-03 02:53:36,386 INFO L226 Difference]: Without dead ends: 129 [2022-11-03 02:53:36,387 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2022-11-03 02:53:36,387 INFO L413 NwaCegarLoop]: 46 mSDtfsCounter, 127 mSDsluCounter, 280 mSDsCounter, 0 mSdLazyCounter, 53 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 127 SdHoareTripleChecker+Valid, 326 SdHoareTripleChecker+Invalid, 80 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 53 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 25 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:53:36,388 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [127 Valid, 326 Invalid, 80 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 53 Invalid, 0 Unknown, 25 Unchecked, 0.1s Time] [2022-11-03 02:53:36,388 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2022-11-03 02:53:36,393 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 108. [2022-11-03 02:53:36,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 108 states, 107 states have (on average 1.4205607476635513) internal successors, (152), 107 states have internal predecessors, (152), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:36,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 152 transitions. [2022-11-03 02:53:36,395 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 152 transitions. Word has length 38 [2022-11-03 02:53:36,395 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:53:36,395 INFO L495 AbstractCegarLoop]: Abstraction has 108 states and 152 transitions. [2022-11-03 02:53:36,396 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 4.75) internal successors, (38), 8 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:36,396 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 152 transitions. [2022-11-03 02:53:36,397 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2022-11-03 02:53:36,397 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:53:36,397 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:53:36,419 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (8)] Forceful destruction successful, exit code 0 [2022-11-03 02:53:36,619 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:53:36,619 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:53:36,620 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:53:36,620 INFO L85 PathProgramCache]: Analyzing trace with hash -1825539985, now seen corresponding path program 1 times [2022-11-03 02:53:36,620 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:53:36,620 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1849606986] [2022-11-03 02:53:36,621 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:53:36,621 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:53:36,621 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:53:36,622 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:53:36,638 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (9)] Waiting until timeout for monitored process [2022-11-03 02:53:36,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:53:36,755 INFO L263 TraceCheckSpWp]: Trace formula consists of 222 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 02:53:36,758 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:53:36,891 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:53:36,891 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:53:36,892 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:53:36,892 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1849606986] [2022-11-03 02:53:36,896 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1849606986] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:53:36,896 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:53:36,896 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-11-03 02:53:36,896 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1592050547] [2022-11-03 02:53:36,896 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:53:36,897 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-03 02:53:36,897 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:53:36,898 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-03 02:53:36,898 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-11-03 02:53:36,898 INFO L87 Difference]: Start difference. First operand 108 states and 152 transitions. Second operand has 8 states, 8 states have (on average 4.75) internal successors, (38), 8 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:36,982 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:53:36,982 INFO L93 Difference]: Finished difference Result 218 states and 309 transitions. [2022-11-03 02:53:36,983 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-03 02:53:36,983 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 4.75) internal successors, (38), 8 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 38 [2022-11-03 02:53:36,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:53:36,986 INFO L225 Difference]: With dead ends: 218 [2022-11-03 02:53:36,986 INFO L226 Difference]: Without dead ends: 138 [2022-11-03 02:53:36,988 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=24, Invalid=66, Unknown=0, NotChecked=0, Total=90 [2022-11-03 02:53:36,990 INFO L413 NwaCegarLoop]: 87 mSDtfsCounter, 48 mSDsluCounter, 442 mSDsCounter, 0 mSdLazyCounter, 33 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 48 SdHoareTripleChecker+Valid, 529 SdHoareTripleChecker+Invalid, 59 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 33 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 25 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 02:53:36,991 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [48 Valid, 529 Invalid, 59 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 33 Invalid, 0 Unknown, 25 Unchecked, 0.0s Time] [2022-11-03 02:53:36,991 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2022-11-03 02:53:36,997 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 108. [2022-11-03 02:53:37,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 108 states, 107 states have (on average 1.411214953271028) internal successors, (151), 107 states have internal predecessors, (151), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:37,001 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 151 transitions. [2022-11-03 02:53:37,001 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 151 transitions. Word has length 38 [2022-11-03 02:53:37,002 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:53:37,002 INFO L495 AbstractCegarLoop]: Abstraction has 108 states and 151 transitions. [2022-11-03 02:53:37,002 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 4.75) internal successors, (38), 8 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:37,002 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 151 transitions. [2022-11-03 02:53:37,010 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2022-11-03 02:53:37,010 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:53:37,011 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:53:37,030 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (9)] Forceful destruction successful, exit code 0 [2022-11-03 02:53:37,222 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:53:37,223 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:53:37,223 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:53:37,223 INFO L85 PathProgramCache]: Analyzing trace with hash -439336591, now seen corresponding path program 1 times [2022-11-03 02:53:37,224 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:53:37,224 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [10242188] [2022-11-03 02:53:37,224 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:53:37,224 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:53:37,224 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:53:37,225 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:53:37,232 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (10)] Waiting until timeout for monitored process [2022-11-03 02:53:37,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:53:37,336 INFO L263 TraceCheckSpWp]: Trace formula consists of 222 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 02:53:37,339 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:53:37,463 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:53:37,463 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:53:37,463 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:53:37,464 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [10242188] [2022-11-03 02:53:37,464 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [10242188] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:53:37,464 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:53:37,464 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-11-03 02:53:37,464 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2133707786] [2022-11-03 02:53:37,465 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:53:37,465 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-03 02:53:37,465 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:53:37,466 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-03 02:53:37,466 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-11-03 02:53:37,466 INFO L87 Difference]: Start difference. First operand 108 states and 151 transitions. Second operand has 8 states, 8 states have (on average 4.75) internal successors, (38), 8 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:37,564 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:53:37,564 INFO L93 Difference]: Finished difference Result 267 states and 375 transitions. [2022-11-03 02:53:37,565 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-03 02:53:37,565 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 4.75) internal successors, (38), 8 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 38 [2022-11-03 02:53:37,566 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:53:37,566 INFO L225 Difference]: With dead ends: 267 [2022-11-03 02:53:37,566 INFO L226 Difference]: Without dead ends: 189 [2022-11-03 02:53:37,567 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2022-11-03 02:53:37,567 INFO L413 NwaCegarLoop]: 113 mSDtfsCounter, 83 mSDsluCounter, 330 mSDsCounter, 0 mSdLazyCounter, 51 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 83 SdHoareTripleChecker+Valid, 443 SdHoareTripleChecker+Invalid, 73 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 51 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 21 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:53:37,568 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [83 Valid, 443 Invalid, 73 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 51 Invalid, 0 Unknown, 21 Unchecked, 0.1s Time] [2022-11-03 02:53:37,568 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189 states. [2022-11-03 02:53:37,573 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189 to 108. [2022-11-03 02:53:37,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 108 states, 107 states have (on average 1.4018691588785046) internal successors, (150), 107 states have internal predecessors, (150), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:37,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 150 transitions. [2022-11-03 02:53:37,574 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 150 transitions. Word has length 38 [2022-11-03 02:53:37,575 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:53:37,575 INFO L495 AbstractCegarLoop]: Abstraction has 108 states and 150 transitions. [2022-11-03 02:53:37,575 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 4.75) internal successors, (38), 8 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:37,575 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 150 transitions. [2022-11-03 02:53:37,576 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2022-11-03 02:53:37,576 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:53:37,576 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:53:37,590 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (10)] Ended with exit code 0 [2022-11-03 02:53:37,788 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:53:37,788 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:53:37,789 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:53:37,789 INFO L85 PathProgramCache]: Analyzing trace with hash 1483891443, now seen corresponding path program 1 times [2022-11-03 02:53:37,789 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:53:37,790 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [393444644] [2022-11-03 02:53:37,790 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:53:37,790 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:53:37,790 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:53:37,793 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:53:37,795 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (11)] Waiting until timeout for monitored process [2022-11-03 02:53:37,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:53:37,912 INFO L263 TraceCheckSpWp]: Trace formula consists of 222 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 02:53:37,913 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:53:38,046 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:53:38,046 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:53:38,047 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:53:38,047 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [393444644] [2022-11-03 02:53:38,047 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [393444644] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:53:38,047 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:53:38,047 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-11-03 02:53:38,047 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [19105308] [2022-11-03 02:53:38,048 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:53:38,048 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-03 02:53:38,048 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:53:38,048 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-03 02:53:38,049 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-11-03 02:53:38,049 INFO L87 Difference]: Start difference. First operand 108 states and 150 transitions. Second operand has 8 states, 8 states have (on average 4.75) internal successors, (38), 8 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:38,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:53:38,135 INFO L93 Difference]: Finished difference Result 259 states and 362 transitions. [2022-11-03 02:53:38,136 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-03 02:53:38,136 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 4.75) internal successors, (38), 8 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 38 [2022-11-03 02:53:38,136 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:53:38,137 INFO L225 Difference]: With dead ends: 259 [2022-11-03 02:53:38,137 INFO L226 Difference]: Without dead ends: 183 [2022-11-03 02:53:38,138 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2022-11-03 02:53:38,138 INFO L413 NwaCegarLoop]: 109 mSDtfsCounter, 77 mSDsluCounter, 425 mSDsCounter, 0 mSdLazyCounter, 51 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 77 SdHoareTripleChecker+Valid, 534 SdHoareTripleChecker+Invalid, 75 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 51 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 23 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:53:38,138 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [77 Valid, 534 Invalid, 75 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 51 Invalid, 0 Unknown, 23 Unchecked, 0.1s Time] [2022-11-03 02:53:38,139 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 183 states. [2022-11-03 02:53:38,143 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 183 to 108. [2022-11-03 02:53:38,144 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 108 states, 107 states have (on average 1.3925233644859814) internal successors, (149), 107 states have internal predecessors, (149), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:38,144 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 149 transitions. [2022-11-03 02:53:38,145 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 149 transitions. Word has length 38 [2022-11-03 02:53:38,145 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:53:38,145 INFO L495 AbstractCegarLoop]: Abstraction has 108 states and 149 transitions. [2022-11-03 02:53:38,145 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 4.75) internal successors, (38), 8 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:38,146 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 149 transitions. [2022-11-03 02:53:38,146 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2022-11-03 02:53:38,146 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:53:38,146 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:53:38,158 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (11)] Forceful destruction successful, exit code 0 [2022-11-03 02:53:38,358 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:53:38,358 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:53:38,359 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:53:38,359 INFO L85 PathProgramCache]: Analyzing trace with hash 1624440053, now seen corresponding path program 1 times [2022-11-03 02:53:38,359 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:53:38,359 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1920823115] [2022-11-03 02:53:38,359 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:53:38,359 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:53:38,360 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:53:38,361 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:53:38,399 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (12)] Waiting until timeout for monitored process [2022-11-03 02:53:38,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:53:38,482 INFO L263 TraceCheckSpWp]: Trace formula consists of 222 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 02:53:38,484 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:53:38,610 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:53:38,610 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:53:38,610 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:53:38,610 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1920823115] [2022-11-03 02:53:38,610 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1920823115] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:53:38,610 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:53:38,611 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-11-03 02:53:38,611 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [83059584] [2022-11-03 02:53:38,611 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:53:38,611 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-03 02:53:38,611 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:53:38,611 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-03 02:53:38,612 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-11-03 02:53:38,612 INFO L87 Difference]: Start difference. First operand 108 states and 149 transitions. Second operand has 8 states, 8 states have (on average 4.75) internal successors, (38), 8 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:38,706 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:53:38,706 INFO L93 Difference]: Finished difference Result 247 states and 345 transitions. [2022-11-03 02:53:38,707 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-03 02:53:38,707 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 4.75) internal successors, (38), 8 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 38 [2022-11-03 02:53:38,708 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:53:38,708 INFO L225 Difference]: With dead ends: 247 [2022-11-03 02:53:38,709 INFO L226 Difference]: Without dead ends: 173 [2022-11-03 02:53:38,709 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=79, Unknown=0, NotChecked=0, Total=110 [2022-11-03 02:53:38,710 INFO L413 NwaCegarLoop]: 103 mSDtfsCounter, 103 mSDsluCounter, 456 mSDsCounter, 0 mSdLazyCounter, 27 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 103 SdHoareTripleChecker+Valid, 559 SdHoareTripleChecker+Invalid, 83 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 27 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 55 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 02:53:38,710 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [103 Valid, 559 Invalid, 83 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 27 Invalid, 0 Unknown, 55 Unchecked, 0.0s Time] [2022-11-03 02:53:38,711 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173 states. [2022-11-03 02:53:38,714 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173 to 108. [2022-11-03 02:53:38,715 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 108 states, 107 states have (on average 1.3831775700934579) internal successors, (148), 107 states have internal predecessors, (148), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:38,715 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 148 transitions. [2022-11-03 02:53:38,716 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 148 transitions. Word has length 38 [2022-11-03 02:53:38,716 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:53:38,716 INFO L495 AbstractCegarLoop]: Abstraction has 108 states and 148 transitions. [2022-11-03 02:53:38,716 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 4.75) internal successors, (38), 8 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:38,716 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 148 transitions. [2022-11-03 02:53:38,717 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2022-11-03 02:53:38,717 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:53:38,717 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:53:38,735 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (12)] Forceful destruction successful, exit code 0 [2022-11-03 02:53:38,930 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:53:38,930 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:53:38,931 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:53:38,931 INFO L85 PathProgramCache]: Analyzing trace with hash -180998281, now seen corresponding path program 1 times [2022-11-03 02:53:38,931 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:53:38,931 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [87347921] [2022-11-03 02:53:38,932 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:53:38,932 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:53:38,932 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:53:38,933 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:53:38,950 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (13)] Waiting until timeout for monitored process [2022-11-03 02:53:39,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:53:39,048 INFO L263 TraceCheckSpWp]: Trace formula consists of 222 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 02:53:39,050 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:53:39,198 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:53:39,198 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:53:39,198 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:53:39,198 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [87347921] [2022-11-03 02:53:39,199 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [87347921] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:53:39,199 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:53:39,199 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-11-03 02:53:39,199 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [830318146] [2022-11-03 02:53:39,199 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:53:39,200 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-03 02:53:39,200 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:53:39,200 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-03 02:53:39,200 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-11-03 02:53:39,201 INFO L87 Difference]: Start difference. First operand 108 states and 148 transitions. Second operand has 8 states, 8 states have (on average 4.75) internal successors, (38), 8 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:39,287 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:53:39,288 INFO L93 Difference]: Finished difference Result 239 states and 332 transitions. [2022-11-03 02:53:39,288 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-03 02:53:39,289 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 4.75) internal successors, (38), 8 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 38 [2022-11-03 02:53:39,289 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:53:39,290 INFO L225 Difference]: With dead ends: 239 [2022-11-03 02:53:39,290 INFO L226 Difference]: Without dead ends: 167 [2022-11-03 02:53:39,290 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=79, Unknown=0, NotChecked=0, Total=110 [2022-11-03 02:53:39,291 INFO L413 NwaCegarLoop]: 99 mSDtfsCounter, 133 mSDsluCounter, 302 mSDsCounter, 0 mSdLazyCounter, 26 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 133 SdHoareTripleChecker+Valid, 401 SdHoareTripleChecker+Invalid, 77 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 26 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 50 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 02:53:39,291 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [133 Valid, 401 Invalid, 77 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 26 Invalid, 0 Unknown, 50 Unchecked, 0.0s Time] [2022-11-03 02:53:39,292 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167 states. [2022-11-03 02:53:39,295 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167 to 108. [2022-11-03 02:53:39,296 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 108 states, 107 states have (on average 1.3738317757009346) internal successors, (147), 107 states have internal predecessors, (147), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:39,296 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 147 transitions. [2022-11-03 02:53:39,297 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 147 transitions. Word has length 38 [2022-11-03 02:53:39,297 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:53:39,297 INFO L495 AbstractCegarLoop]: Abstraction has 108 states and 147 transitions. [2022-11-03 02:53:39,297 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 4.75) internal successors, (38), 8 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:39,297 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 147 transitions. [2022-11-03 02:53:39,298 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2022-11-03 02:53:39,298 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:53:39,298 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:53:39,314 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (13)] Forceful destruction successful, exit code 0 [2022-11-03 02:53:39,510 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:53:39,510 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:53:39,510 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:53:39,510 INFO L85 PathProgramCache]: Analyzing trace with hash 241703545, now seen corresponding path program 1 times [2022-11-03 02:53:39,511 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:53:39,511 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [886997049] [2022-11-03 02:53:39,511 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:53:39,511 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:53:39,512 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:53:39,512 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:53:39,514 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (14)] Waiting until timeout for monitored process [2022-11-03 02:53:39,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:53:39,632 INFO L263 TraceCheckSpWp]: Trace formula consists of 222 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 02:53:39,634 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:53:39,762 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:53:39,762 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:53:39,762 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:53:39,762 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [886997049] [2022-11-03 02:53:39,763 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [886997049] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:53:39,763 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:53:39,763 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-11-03 02:53:39,763 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1673810074] [2022-11-03 02:53:39,763 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:53:39,764 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-03 02:53:39,764 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:53:39,765 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-03 02:53:39,765 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-11-03 02:53:39,765 INFO L87 Difference]: Start difference. First operand 108 states and 147 transitions. Second operand has 8 states, 8 states have (on average 4.75) internal successors, (38), 8 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:39,850 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:53:39,850 INFO L93 Difference]: Finished difference Result 231 states and 319 transitions. [2022-11-03 02:53:39,851 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-03 02:53:39,851 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 4.75) internal successors, (38), 8 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 38 [2022-11-03 02:53:39,852 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:53:39,852 INFO L225 Difference]: With dead ends: 231 [2022-11-03 02:53:39,852 INFO L226 Difference]: Without dead ends: 161 [2022-11-03 02:53:39,853 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=79, Unknown=0, NotChecked=0, Total=110 [2022-11-03 02:53:39,853 INFO L413 NwaCegarLoop]: 95 mSDtfsCounter, 125 mSDsluCounter, 293 mSDsCounter, 0 mSdLazyCounter, 25 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 125 SdHoareTripleChecker+Valid, 388 SdHoareTripleChecker+Invalid, 77 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 25 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 51 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 02:53:39,854 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [125 Valid, 388 Invalid, 77 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 25 Invalid, 0 Unknown, 51 Unchecked, 0.0s Time] [2022-11-03 02:53:39,854 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states. [2022-11-03 02:53:39,858 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 108. [2022-11-03 02:53:39,858 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 108 states, 107 states have (on average 1.3644859813084111) internal successors, (146), 107 states have internal predecessors, (146), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:39,859 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 146 transitions. [2022-11-03 02:53:39,859 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 146 transitions. Word has length 38 [2022-11-03 02:53:39,859 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:53:39,860 INFO L495 AbstractCegarLoop]: Abstraction has 108 states and 146 transitions. [2022-11-03 02:53:39,860 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 4.75) internal successors, (38), 8 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:39,860 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 146 transitions. [2022-11-03 02:53:39,860 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2022-11-03 02:53:39,860 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:53:39,861 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:53:39,872 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (14)] Forceful destruction successful, exit code 0 [2022-11-03 02:53:40,066 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:53:40,066 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:53:40,067 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:53:40,067 INFO L85 PathProgramCache]: Analyzing trace with hash -1447240197, now seen corresponding path program 1 times [2022-11-03 02:53:40,067 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:53:40,067 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [479027371] [2022-11-03 02:53:40,067 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:53:40,068 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:53:40,068 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:53:40,069 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:53:40,073 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (15)] Waiting until timeout for monitored process [2022-11-03 02:53:40,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:53:40,182 INFO L263 TraceCheckSpWp]: Trace formula consists of 222 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 02:53:40,183 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:53:40,337 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:53:40,337 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:53:40,337 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:53:40,337 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [479027371] [2022-11-03 02:53:40,337 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [479027371] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:53:40,338 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:53:40,338 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-11-03 02:53:40,338 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2074458990] [2022-11-03 02:53:40,338 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:53:40,338 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-03 02:53:40,339 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:53:40,339 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-03 02:53:40,339 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-11-03 02:53:40,339 INFO L87 Difference]: Start difference. First operand 108 states and 146 transitions. Second operand has 8 states, 8 states have (on average 4.75) internal successors, (38), 8 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:40,443 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:53:40,443 INFO L93 Difference]: Finished difference Result 211 states and 291 transitions. [2022-11-03 02:53:40,443 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-03 02:53:40,444 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 4.75) internal successors, (38), 8 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 38 [2022-11-03 02:53:40,444 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:53:40,444 INFO L225 Difference]: With dead ends: 211 [2022-11-03 02:53:40,445 INFO L226 Difference]: Without dead ends: 145 [2022-11-03 02:53:40,445 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=79, Unknown=0, NotChecked=0, Total=110 [2022-11-03 02:53:40,446 INFO L413 NwaCegarLoop]: 86 mSDtfsCounter, 71 mSDsluCounter, 388 mSDsCounter, 0 mSdLazyCounter, 22 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 71 SdHoareTripleChecker+Valid, 474 SdHoareTripleChecker+Invalid, 86 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 22 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 63 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:53:40,446 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [71 Valid, 474 Invalid, 86 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 22 Invalid, 0 Unknown, 63 Unchecked, 0.1s Time] [2022-11-03 02:53:40,446 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2022-11-03 02:53:40,450 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 110. [2022-11-03 02:53:40,451 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 110 states, 109 states have (on average 1.3577981651376148) internal successors, (148), 109 states have internal predecessors, (148), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:40,451 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 148 transitions. [2022-11-03 02:53:40,452 INFO L78 Accepts]: Start accepts. Automaton has 110 states and 148 transitions. Word has length 38 [2022-11-03 02:53:40,452 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:53:40,452 INFO L495 AbstractCegarLoop]: Abstraction has 110 states and 148 transitions. [2022-11-03 02:53:40,452 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 4.75) internal successors, (38), 8 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:40,452 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 148 transitions. [2022-11-03 02:53:40,453 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2022-11-03 02:53:40,453 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:53:40,453 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:53:40,465 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (15)] Forceful destruction successful, exit code 0 [2022-11-03 02:53:40,665 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 15 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:53:40,665 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:53:40,666 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:53:40,666 INFO L85 PathProgramCache]: Analyzing trace with hash -2034046211, now seen corresponding path program 1 times [2022-11-03 02:53:40,666 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:53:40,666 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [753609785] [2022-11-03 02:53:40,666 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:53:40,666 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:53:40,667 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:53:40,667 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:53:40,668 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (16)] Waiting until timeout for monitored process [2022-11-03 02:53:40,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:53:40,781 INFO L263 TraceCheckSpWp]: Trace formula consists of 222 conjuncts, 4 conjunts are in the unsatisfiable core [2022-11-03 02:53:40,783 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:53:40,837 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:53:40,838 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:53:40,838 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:53:40,838 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [753609785] [2022-11-03 02:53:40,838 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [753609785] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:53:40,838 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:53:40,838 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-03 02:53:40,839 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2078324619] [2022-11-03 02:53:40,839 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:53:40,839 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-03 02:53:40,839 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:53:40,840 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-03 02:53:40,840 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-03 02:53:40,840 INFO L87 Difference]: Start difference. First operand 110 states and 148 transitions. Second operand has 5 states, 5 states have (on average 7.6) internal successors, (38), 5 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:40,916 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:53:40,916 INFO L93 Difference]: Finished difference Result 291 states and 407 transitions. [2022-11-03 02:53:40,917 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-03 02:53:40,917 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 7.6) internal successors, (38), 5 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 38 [2022-11-03 02:53:40,919 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:53:40,921 INFO L225 Difference]: With dead ends: 291 [2022-11-03 02:53:40,921 INFO L226 Difference]: Without dead ends: 225 [2022-11-03 02:53:40,922 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 36 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2022-11-03 02:53:40,924 INFO L413 NwaCegarLoop]: 169 mSDtfsCounter, 124 mSDsluCounter, 176 mSDsCounter, 0 mSdLazyCounter, 31 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 124 SdHoareTripleChecker+Valid, 345 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 31 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 02:53:40,925 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [124 Valid, 345 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 31 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-03 02:53:40,927 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 225 states. [2022-11-03 02:53:40,935 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 225 to 132. [2022-11-03 02:53:40,936 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 132 states, 131 states have (on average 1.3740458015267176) internal successors, (180), 131 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:40,937 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 180 transitions. [2022-11-03 02:53:40,937 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 180 transitions. Word has length 38 [2022-11-03 02:53:40,937 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:53:40,937 INFO L495 AbstractCegarLoop]: Abstraction has 132 states and 180 transitions. [2022-11-03 02:53:40,937 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 7.6) internal successors, (38), 5 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:40,938 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 180 transitions. [2022-11-03 02:53:40,938 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2022-11-03 02:53:40,938 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:53:40,938 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:53:40,952 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (16)] Forceful destruction successful, exit code 0 [2022-11-03 02:53:41,150 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:53:41,150 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:53:41,151 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:53:41,151 INFO L85 PathProgramCache]: Analyzing trace with hash -259038849, now seen corresponding path program 1 times [2022-11-03 02:53:41,151 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:53:41,151 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [812323427] [2022-11-03 02:53:41,151 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:53:41,151 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:53:41,151 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:53:41,153 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:53:41,154 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (17)] Waiting until timeout for monitored process [2022-11-03 02:53:41,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:53:41,266 INFO L263 TraceCheckSpWp]: Trace formula consists of 222 conjuncts, 4 conjunts are in the unsatisfiable core [2022-11-03 02:53:41,268 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:53:41,327 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:53:41,327 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:53:41,327 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:53:41,328 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [812323427] [2022-11-03 02:53:41,328 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [812323427] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:53:41,328 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:53:41,328 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-03 02:53:41,328 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1690075617] [2022-11-03 02:53:41,328 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:53:41,329 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-03 02:53:41,330 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:53:41,330 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-03 02:53:41,330 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-03 02:53:41,331 INFO L87 Difference]: Start difference. First operand 132 states and 180 transitions. Second operand has 5 states, 5 states have (on average 7.6) internal successors, (38), 5 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:41,411 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:53:41,411 INFO L93 Difference]: Finished difference Result 315 states and 440 transitions. [2022-11-03 02:53:41,412 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-03 02:53:41,412 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 7.6) internal successors, (38), 5 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 38 [2022-11-03 02:53:41,412 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:53:41,414 INFO L225 Difference]: With dead ends: 315 [2022-11-03 02:53:41,414 INFO L226 Difference]: Without dead ends: 227 [2022-11-03 02:53:41,414 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 36 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2022-11-03 02:53:41,414 INFO L413 NwaCegarLoop]: 169 mSDtfsCounter, 121 mSDsluCounter, 177 mSDsCounter, 0 mSdLazyCounter, 33 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 121 SdHoareTripleChecker+Valid, 346 SdHoareTripleChecker+Invalid, 34 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 33 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 02:53:41,415 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [121 Valid, 346 Invalid, 34 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 33 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-03 02:53:41,415 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 227 states. [2022-11-03 02:53:41,420 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 227 to 134. [2022-11-03 02:53:41,421 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 134 states, 133 states have (on average 1.368421052631579) internal successors, (182), 133 states have internal predecessors, (182), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:41,422 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 182 transitions. [2022-11-03 02:53:41,422 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 182 transitions. Word has length 38 [2022-11-03 02:53:41,422 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:53:41,422 INFO L495 AbstractCegarLoop]: Abstraction has 134 states and 182 transitions. [2022-11-03 02:53:41,423 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 7.6) internal successors, (38), 5 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:41,423 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 182 transitions. [2022-11-03 02:53:41,423 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2022-11-03 02:53:41,423 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:53:41,423 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:53:41,432 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (17)] Forceful destruction successful, exit code 0 [2022-11-03 02:53:41,630 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:53:41,630 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:53:41,630 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:53:41,631 INFO L85 PathProgramCache]: Analyzing trace with hash -257191807, now seen corresponding path program 1 times [2022-11-03 02:53:41,631 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:53:41,631 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [367332265] [2022-11-03 02:53:41,631 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:53:41,631 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:53:41,631 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:53:41,632 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:53:41,633 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (18)] Waiting until timeout for monitored process [2022-11-03 02:53:41,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:53:41,740 INFO L263 TraceCheckSpWp]: Trace formula consists of 222 conjuncts, 35 conjunts are in the unsatisfiable core [2022-11-03 02:53:41,743 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:53:42,143 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:53:42,143 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:53:43,123 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:53:43,123 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:53:43,123 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [367332265] [2022-11-03 02:53:43,123 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [367332265] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:53:43,123 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [2015426228] [2022-11-03 02:53:43,124 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:53:43,124 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:53:43,124 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:53:43,126 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:53:43,137 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (19)] Waiting until timeout for monitored process [2022-11-03 02:53:43,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:53:43,324 INFO L263 TraceCheckSpWp]: Trace formula consists of 222 conjuncts, 35 conjunts are in the unsatisfiable core [2022-11-03 02:53:43,326 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:53:43,558 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:53:43,559 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:53:43,914 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:53:43,915 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [2015426228] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:53:43,915 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [11721076] [2022-11-03 02:53:43,915 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:53:43,915 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:53:43,915 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:53:43,916 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:53:43,922 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2022-11-03 02:53:44,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:53:44,031 INFO L263 TraceCheckSpWp]: Trace formula consists of 222 conjuncts, 38 conjunts are in the unsatisfiable core [2022-11-03 02:53:44,034 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:53:44,297 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:53:44,297 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:53:44,758 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:53:44,759 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [11721076] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:53:44,759 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:53:44,759 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 13, 13] total 24 [2022-11-03 02:53:44,762 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [897056547] [2022-11-03 02:53:44,762 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:53:44,763 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2022-11-03 02:53:44,763 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:53:44,764 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-11-03 02:53:44,764 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=492, Unknown=0, NotChecked=0, Total=552 [2022-11-03 02:53:44,765 INFO L87 Difference]: Start difference. First operand 134 states and 182 transitions. Second operand has 24 states, 24 states have (on average 3.25) internal successors, (78), 24 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:45,384 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:53:45,384 INFO L93 Difference]: Finished difference Result 271 states and 368 transitions. [2022-11-03 02:53:45,385 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-11-03 02:53:45,385 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 3.25) internal successors, (78), 24 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 38 [2022-11-03 02:53:45,386 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:53:45,387 INFO L225 Difference]: With dead ends: 271 [2022-11-03 02:53:45,387 INFO L226 Difference]: Without dead ends: 269 [2022-11-03 02:53:45,387 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 232 GetRequests, 198 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 119 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=190, Invalid=932, Unknown=0, NotChecked=0, Total=1122 [2022-11-03 02:53:45,388 INFO L413 NwaCegarLoop]: 74 mSDtfsCounter, 458 mSDsluCounter, 764 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 458 SdHoareTripleChecker+Valid, 838 SdHoareTripleChecker+Invalid, 263 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 179 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:53:45,388 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [458 Valid, 838 Invalid, 263 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 78 Invalid, 0 Unknown, 179 Unchecked, 0.1s Time] [2022-11-03 02:53:45,389 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 269 states. [2022-11-03 02:53:45,396 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 269 to 160. [2022-11-03 02:53:45,396 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 160 states, 159 states have (on average 1.3270440251572326) internal successors, (211), 159 states have internal predecessors, (211), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:45,397 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 211 transitions. [2022-11-03 02:53:45,397 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 211 transitions. Word has length 38 [2022-11-03 02:53:45,397 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:53:45,398 INFO L495 AbstractCegarLoop]: Abstraction has 160 states and 211 transitions. [2022-11-03 02:53:45,398 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 3.25) internal successors, (78), 24 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:45,398 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 211 transitions. [2022-11-03 02:53:45,398 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2022-11-03 02:53:45,399 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:53:45,399 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:53:45,414 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (18)] Forceful destruction successful, exit code 0 [2022-11-03 02:53:45,617 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (19)] Forceful destruction successful, exit code 0 [2022-11-03 02:53:45,836 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Forceful destruction successful, exit code 0 [2022-11-03 02:53:46,015 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 18 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,19 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,20 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:53:46,015 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:53:46,015 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:53:46,016 INFO L85 PathProgramCache]: Analyzing trace with hash -958791681, now seen corresponding path program 1 times [2022-11-03 02:53:46,016 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:53:46,016 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [503003248] [2022-11-03 02:53:46,016 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:53:46,016 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:53:46,016 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:53:46,018 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:53:46,031 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (21)] Waiting until timeout for monitored process [2022-11-03 02:53:46,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:53:46,130 INFO L263 TraceCheckSpWp]: Trace formula consists of 222 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-03 02:53:46,132 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:53:46,149 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:53:46,149 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:53:46,150 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:53:46,150 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [503003248] [2022-11-03 02:53:46,150 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [503003248] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:53:46,150 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:53:46,150 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-03 02:53:46,151 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1666812550] [2022-11-03 02:53:46,151 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:53:46,151 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 02:53:46,151 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:53:46,152 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 02:53:46,152 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 02:53:46,152 INFO L87 Difference]: Start difference. First operand 160 states and 211 transitions. Second operand has 4 states, 4 states have (on average 9.5) internal successors, (38), 4 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:46,183 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:53:46,183 INFO L93 Difference]: Finished difference Result 365 states and 502 transitions. [2022-11-03 02:53:46,184 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-03 02:53:46,184 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 9.5) internal successors, (38), 4 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 38 [2022-11-03 02:53:46,184 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:53:46,185 INFO L225 Difference]: With dead ends: 365 [2022-11-03 02:53:46,185 INFO L226 Difference]: Without dead ends: 241 [2022-11-03 02:53:46,186 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-03 02:53:46,187 INFO L413 NwaCegarLoop]: 56 mSDtfsCounter, 128 mSDsluCounter, 97 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 128 SdHoareTripleChecker+Valid, 153 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 02:53:46,187 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [128 Valid, 153 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-03 02:53:46,188 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 241 states. [2022-11-03 02:53:46,194 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 241 to 142. [2022-11-03 02:53:46,194 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 142 states, 141 states have (on average 1.3475177304964538) internal successors, (190), 141 states have internal predecessors, (190), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:46,195 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 190 transitions. [2022-11-03 02:53:46,195 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 190 transitions. Word has length 38 [2022-11-03 02:53:46,195 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:53:46,196 INFO L495 AbstractCegarLoop]: Abstraction has 142 states and 190 transitions. [2022-11-03 02:53:46,196 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 9.5) internal successors, (38), 4 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:46,196 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 190 transitions. [2022-11-03 02:53:46,196 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2022-11-03 02:53:46,197 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:53:46,197 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:53:46,214 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (21)] Forceful destruction successful, exit code 0 [2022-11-03 02:53:46,409 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 21 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:53:46,409 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:53:46,409 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:53:46,409 INFO L85 PathProgramCache]: Analyzing trace with hash 764747083, now seen corresponding path program 1 times [2022-11-03 02:53:46,410 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:53:46,410 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1429852284] [2022-11-03 02:53:46,410 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:53:46,410 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:53:46,410 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:53:46,411 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:53:46,413 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (22)] Waiting until timeout for monitored process [2022-11-03 02:53:46,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:53:46,563 INFO L263 TraceCheckSpWp]: Trace formula consists of 391 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 02:53:46,565 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:53:46,805 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 29 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 02:53:46,805 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:53:46,868 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 34 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 02:53:46,869 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:53:46,869 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1429852284] [2022-11-03 02:53:46,869 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1429852284] provided 1 perfect and 1 imperfect interpolant sequences [2022-11-03 02:53:46,869 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-03 02:53:46,869 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [8] total 12 [2022-11-03 02:53:46,870 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1645216234] [2022-11-03 02:53:46,870 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:53:46,870 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-03 02:53:46,870 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:53:46,871 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-03 02:53:46,871 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2022-11-03 02:53:46,871 INFO L87 Difference]: Start difference. First operand 142 states and 190 transitions. Second operand has 6 states, 6 states have (on average 11.5) internal successors, (69), 6 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:47,036 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:53:47,037 INFO L93 Difference]: Finished difference Result 252 states and 341 transitions. [2022-11-03 02:53:47,037 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-03 02:53:47,037 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 11.5) internal successors, (69), 6 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 71 [2022-11-03 02:53:47,037 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:53:47,038 INFO L225 Difference]: With dead ends: 252 [2022-11-03 02:53:47,038 INFO L226 Difference]: Without dead ends: 162 [2022-11-03 02:53:47,039 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 150 GetRequests, 134 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=66, Invalid=240, Unknown=0, NotChecked=0, Total=306 [2022-11-03 02:53:47,039 INFO L413 NwaCegarLoop]: 44 mSDtfsCounter, 270 mSDsluCounter, 180 mSDsCounter, 0 mSdLazyCounter, 59 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 270 SdHoareTripleChecker+Valid, 224 SdHoareTripleChecker+Invalid, 65 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 59 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:53:47,039 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [270 Valid, 224 Invalid, 65 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 59 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 02:53:47,040 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162 states. [2022-11-03 02:53:47,045 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162 to 118. [2022-11-03 02:53:47,045 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 118 states, 117 states have (on average 1.3076923076923077) internal successors, (153), 117 states have internal predecessors, (153), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:47,046 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 153 transitions. [2022-11-03 02:53:47,046 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 153 transitions. Word has length 71 [2022-11-03 02:53:47,046 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:53:47,047 INFO L495 AbstractCegarLoop]: Abstraction has 118 states and 153 transitions. [2022-11-03 02:53:47,047 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 11.5) internal successors, (69), 6 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:47,047 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 153 transitions. [2022-11-03 02:53:47,047 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2022-11-03 02:53:47,048 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:53:47,048 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:53:47,064 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (22)] Forceful destruction successful, exit code 0 [2022-11-03 02:53:47,248 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 22 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:53:47,248 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:53:47,249 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:53:47,249 INFO L85 PathProgramCache]: Analyzing trace with hash 1083011535, now seen corresponding path program 1 times [2022-11-03 02:53:47,249 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:53:47,249 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1674247719] [2022-11-03 02:53:47,250 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:53:47,250 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:53:47,250 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:53:47,251 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:53:47,267 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (23)] Waiting until timeout for monitored process [2022-11-03 02:53:47,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:53:47,413 INFO L263 TraceCheckSpWp]: Trace formula consists of 391 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 02:53:47,415 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:53:47,643 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 29 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 02:53:47,643 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:53:47,688 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 34 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 02:53:47,688 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:53:47,688 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1674247719] [2022-11-03 02:53:47,688 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1674247719] provided 1 perfect and 1 imperfect interpolant sequences [2022-11-03 02:53:47,688 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-03 02:53:47,689 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [8] total 10 [2022-11-03 02:53:47,689 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1837543153] [2022-11-03 02:53:47,689 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:53:47,689 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-03 02:53:47,689 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:53:47,690 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-03 02:53:47,690 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2022-11-03 02:53:47,690 INFO L87 Difference]: Start difference. First operand 118 states and 153 transitions. Second operand has 6 states, 6 states have (on average 11.5) internal successors, (69), 6 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:47,831 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:53:47,831 INFO L93 Difference]: Finished difference Result 195 states and 259 transitions. [2022-11-03 02:53:47,833 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-03 02:53:47,833 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 11.5) internal successors, (69), 6 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 71 [2022-11-03 02:53:47,833 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:53:47,834 INFO L225 Difference]: With dead ends: 195 [2022-11-03 02:53:47,834 INFO L226 Difference]: Without dead ends: 129 [2022-11-03 02:53:47,834 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 149 GetRequests, 136 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=53, Invalid=157, Unknown=0, NotChecked=0, Total=210 [2022-11-03 02:53:47,835 INFO L413 NwaCegarLoop]: 84 mSDtfsCounter, 172 mSDsluCounter, 138 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 172 SdHoareTripleChecker+Valid, 222 SdHoareTripleChecker+Invalid, 61 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:53:47,835 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [172 Valid, 222 Invalid, 61 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 58 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 02:53:47,835 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2022-11-03 02:53:47,840 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 118. [2022-11-03 02:53:47,841 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 118 states, 117 states have (on average 1.2991452991452992) internal successors, (152), 117 states have internal predecessors, (152), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:47,841 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 152 transitions. [2022-11-03 02:53:47,841 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 152 transitions. Word has length 71 [2022-11-03 02:53:47,843 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:53:47,843 INFO L495 AbstractCegarLoop]: Abstraction has 118 states and 152 transitions. [2022-11-03 02:53:47,843 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 11.5) internal successors, (69), 6 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:47,844 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 152 transitions. [2022-11-03 02:53:47,850 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2022-11-03 02:53:47,850 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:53:47,850 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:53:47,862 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (23)] Forceful destruction successful, exit code 0 [2022-11-03 02:53:48,062 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 23 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:53:48,063 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:53:48,063 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:53:48,063 INFO L85 PathProgramCache]: Analyzing trace with hash -1825752367, now seen corresponding path program 1 times [2022-11-03 02:53:48,063 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:53:48,063 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1760427893] [2022-11-03 02:53:48,063 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:53:48,063 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:53:48,064 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:53:48,064 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:53:48,065 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (24)] Waiting until timeout for monitored process [2022-11-03 02:53:48,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:53:48,201 INFO L263 TraceCheckSpWp]: Trace formula consists of 391 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 02:53:48,203 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:53:48,442 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 27 proven. 9 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 02:53:48,443 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:53:48,484 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 34 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 02:53:48,485 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:53:48,485 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1760427893] [2022-11-03 02:53:48,485 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1760427893] provided 1 perfect and 1 imperfect interpolant sequences [2022-11-03 02:53:48,485 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-03 02:53:48,485 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [8] total 10 [2022-11-03 02:53:48,485 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [401006885] [2022-11-03 02:53:48,485 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:53:48,486 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-03 02:53:48,498 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:53:48,499 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-03 02:53:48,499 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2022-11-03 02:53:48,499 INFO L87 Difference]: Start difference. First operand 118 states and 152 transitions. Second operand has 6 states, 6 states have (on average 11.5) internal successors, (69), 6 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:48,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:53:48,670 INFO L93 Difference]: Finished difference Result 240 states and 318 transitions. [2022-11-03 02:53:48,670 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-03 02:53:48,670 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 11.5) internal successors, (69), 6 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 71 [2022-11-03 02:53:48,670 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:53:48,671 INFO L225 Difference]: With dead ends: 240 [2022-11-03 02:53:48,671 INFO L226 Difference]: Without dead ends: 174 [2022-11-03 02:53:48,672 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 150 GetRequests, 136 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=60, Invalid=180, Unknown=0, NotChecked=0, Total=240 [2022-11-03 02:53:48,672 INFO L413 NwaCegarLoop]: 121 mSDtfsCounter, 173 mSDsluCounter, 201 mSDsCounter, 0 mSdLazyCounter, 76 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 173 SdHoareTripleChecker+Valid, 322 SdHoareTripleChecker+Invalid, 79 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 76 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:53:48,673 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [173 Valid, 322 Invalid, 79 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 76 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 02:53:48,673 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 174 states. [2022-11-03 02:53:48,679 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 174 to 118. [2022-11-03 02:53:48,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 118 states, 117 states have (on average 1.2905982905982907) internal successors, (151), 117 states have internal predecessors, (151), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:48,680 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 151 transitions. [2022-11-03 02:53:48,680 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 151 transitions. Word has length 71 [2022-11-03 02:53:48,680 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:53:48,680 INFO L495 AbstractCegarLoop]: Abstraction has 118 states and 151 transitions. [2022-11-03 02:53:48,681 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 11.5) internal successors, (69), 6 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:48,681 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 151 transitions. [2022-11-03 02:53:48,681 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2022-11-03 02:53:48,682 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:53:48,682 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:53:48,698 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (24)] Forceful destruction successful, exit code 0 [2022-11-03 02:53:48,894 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 24 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:53:48,894 INFO L420 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:53:48,894 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:53:48,894 INFO L85 PathProgramCache]: Analyzing trace with hash 97475667, now seen corresponding path program 1 times [2022-11-03 02:53:48,895 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:53:48,895 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [539311534] [2022-11-03 02:53:48,895 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:53:48,895 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:53:48,895 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:53:48,896 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:53:48,897 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (25)] Waiting until timeout for monitored process [2022-11-03 02:53:49,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:53:49,042 INFO L263 TraceCheckSpWp]: Trace formula consists of 391 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 02:53:49,044 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:53:49,271 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 25 proven. 11 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 02:53:49,272 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:53:49,314 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 34 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 02:53:49,314 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:53:49,315 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [539311534] [2022-11-03 02:53:49,315 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [539311534] provided 1 perfect and 1 imperfect interpolant sequences [2022-11-03 02:53:49,315 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-03 02:53:49,315 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [8] total 10 [2022-11-03 02:53:49,315 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1811458821] [2022-11-03 02:53:49,315 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:53:49,315 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-03 02:53:49,316 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:53:49,316 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-03 02:53:49,316 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2022-11-03 02:53:49,316 INFO L87 Difference]: Start difference. First operand 118 states and 151 transitions. Second operand has 6 states, 6 states have (on average 11.5) internal successors, (69), 6 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:49,494 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:53:49,494 INFO L93 Difference]: Finished difference Result 240 states and 315 transitions. [2022-11-03 02:53:49,498 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-03 02:53:49,498 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 11.5) internal successors, (69), 6 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 71 [2022-11-03 02:53:49,499 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:53:49,499 INFO L225 Difference]: With dead ends: 240 [2022-11-03 02:53:49,499 INFO L226 Difference]: Without dead ends: 174 [2022-11-03 02:53:49,500 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 150 GetRequests, 136 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=60, Invalid=180, Unknown=0, NotChecked=0, Total=240 [2022-11-03 02:53:49,500 INFO L413 NwaCegarLoop]: 121 mSDtfsCounter, 169 mSDsluCounter, 202 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 169 SdHoareTripleChecker+Valid, 323 SdHoareTripleChecker+Invalid, 81 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:53:49,500 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [169 Valid, 323 Invalid, 81 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 02:53:49,501 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 174 states. [2022-11-03 02:53:49,506 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 174 to 118. [2022-11-03 02:53:49,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 118 states, 117 states have (on average 1.2820512820512822) internal successors, (150), 117 states have internal predecessors, (150), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:49,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 150 transitions. [2022-11-03 02:53:49,508 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 150 transitions. Word has length 71 [2022-11-03 02:53:49,508 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:53:49,508 INFO L495 AbstractCegarLoop]: Abstraction has 118 states and 150 transitions. [2022-11-03 02:53:49,508 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 11.5) internal successors, (69), 6 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:49,508 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 150 transitions. [2022-11-03 02:53:49,509 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2022-11-03 02:53:49,509 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:53:49,509 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:53:49,526 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (25)] Forceful destruction successful, exit code 0 [2022-11-03 02:53:49,709 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 25 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:53:49,709 INFO L420 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:53:49,710 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:53:49,710 INFO L85 PathProgramCache]: Analyzing trace with hash 238024277, now seen corresponding path program 1 times [2022-11-03 02:53:49,710 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:53:49,710 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [717619689] [2022-11-03 02:53:49,710 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:53:49,710 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:53:49,711 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:53:49,712 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:53:49,713 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (26)] Waiting until timeout for monitored process [2022-11-03 02:53:49,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:53:49,843 INFO L263 TraceCheckSpWp]: Trace formula consists of 391 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 02:53:49,845 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:53:50,088 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 23 proven. 13 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 02:53:50,088 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:53:50,135 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 34 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 02:53:50,135 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:53:50,135 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [717619689] [2022-11-03 02:53:50,136 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [717619689] provided 1 perfect and 1 imperfect interpolant sequences [2022-11-03 02:53:50,136 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-03 02:53:50,136 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [8] total 10 [2022-11-03 02:53:50,136 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2062351619] [2022-11-03 02:53:50,136 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:53:50,136 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-03 02:53:50,136 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:53:50,137 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-03 02:53:50,137 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2022-11-03 02:53:50,137 INFO L87 Difference]: Start difference. First operand 118 states and 150 transitions. Second operand has 6 states, 6 states have (on average 11.5) internal successors, (69), 6 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:50,328 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:53:50,328 INFO L93 Difference]: Finished difference Result 240 states and 312 transitions. [2022-11-03 02:53:50,329 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-03 02:53:50,329 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 11.5) internal successors, (69), 6 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 71 [2022-11-03 02:53:50,329 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:53:50,330 INFO L225 Difference]: With dead ends: 240 [2022-11-03 02:53:50,330 INFO L226 Difference]: Without dead ends: 174 [2022-11-03 02:53:50,330 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 150 GetRequests, 136 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=60, Invalid=180, Unknown=0, NotChecked=0, Total=240 [2022-11-03 02:53:50,331 INFO L413 NwaCegarLoop]: 121 mSDtfsCounter, 163 mSDsluCounter, 209 mSDsCounter, 0 mSdLazyCounter, 85 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 163 SdHoareTripleChecker+Valid, 330 SdHoareTripleChecker+Invalid, 88 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 85 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:53:50,331 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [163 Valid, 330 Invalid, 88 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 85 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 02:53:50,332 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 174 states. [2022-11-03 02:53:50,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 174 to 118. [2022-11-03 02:53:50,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 118 states, 117 states have (on average 1.2735042735042734) internal successors, (149), 117 states have internal predecessors, (149), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:50,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 149 transitions. [2022-11-03 02:53:50,338 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 149 transitions. Word has length 71 [2022-11-03 02:53:50,338 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:53:50,338 INFO L495 AbstractCegarLoop]: Abstraction has 118 states and 149 transitions. [2022-11-03 02:53:50,339 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 11.5) internal successors, (69), 6 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:50,339 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 149 transitions. [2022-11-03 02:53:50,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2022-11-03 02:53:50,339 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:53:50,340 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:53:50,353 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (26)] Ended with exit code 0 [2022-11-03 02:53:50,552 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 26 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:53:50,553 INFO L420 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:53:50,553 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:53:50,553 INFO L85 PathProgramCache]: Analyzing trace with hash -1567414057, now seen corresponding path program 1 times [2022-11-03 02:53:50,553 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:53:50,553 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1085008792] [2022-11-03 02:53:50,553 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:53:50,554 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:53:50,554 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:53:50,554 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:53:50,556 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (27)] Waiting until timeout for monitored process [2022-11-03 02:53:50,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:53:50,687 INFO L263 TraceCheckSpWp]: Trace formula consists of 391 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 02:53:50,689 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:53:50,900 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 21 proven. 15 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 02:53:50,900 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:53:50,951 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 34 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 02:53:50,951 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:53:50,951 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1085008792] [2022-11-03 02:53:50,951 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1085008792] provided 1 perfect and 1 imperfect interpolant sequences [2022-11-03 02:53:50,952 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-03 02:53:50,952 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [8] total 10 [2022-11-03 02:53:50,952 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1721059832] [2022-11-03 02:53:50,952 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:53:50,952 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-03 02:53:50,953 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:53:50,953 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-03 02:53:50,953 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2022-11-03 02:53:50,953 INFO L87 Difference]: Start difference. First operand 118 states and 149 transitions. Second operand has 6 states, 6 states have (on average 11.5) internal successors, (69), 6 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:51,130 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:53:51,130 INFO L93 Difference]: Finished difference Result 240 states and 309 transitions. [2022-11-03 02:53:51,133 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-03 02:53:51,133 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 11.5) internal successors, (69), 6 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 71 [2022-11-03 02:53:51,134 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:53:51,134 INFO L225 Difference]: With dead ends: 240 [2022-11-03 02:53:51,134 INFO L226 Difference]: Without dead ends: 174 [2022-11-03 02:53:51,135 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 150 GetRequests, 136 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=60, Invalid=180, Unknown=0, NotChecked=0, Total=240 [2022-11-03 02:53:51,135 INFO L413 NwaCegarLoop]: 121 mSDtfsCounter, 161 mSDsluCounter, 204 mSDsCounter, 0 mSdLazyCounter, 82 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 161 SdHoareTripleChecker+Valid, 325 SdHoareTripleChecker+Invalid, 85 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 82 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:53:51,135 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [161 Valid, 325 Invalid, 85 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 82 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 02:53:51,136 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 174 states. [2022-11-03 02:53:51,141 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 174 to 118. [2022-11-03 02:53:51,141 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 118 states, 117 states have (on average 1.264957264957265) internal successors, (148), 117 states have internal predecessors, (148), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:51,143 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 148 transitions. [2022-11-03 02:53:51,143 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 148 transitions. Word has length 71 [2022-11-03 02:53:51,144 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:53:51,144 INFO L495 AbstractCegarLoop]: Abstraction has 118 states and 148 transitions. [2022-11-03 02:53:51,144 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 11.5) internal successors, (69), 6 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:51,144 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 148 transitions. [2022-11-03 02:53:51,145 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2022-11-03 02:53:51,145 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:53:51,145 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:53:51,162 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (27)] Forceful destruction successful, exit code 0 [2022-11-03 02:53:51,358 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 27 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:53:51,358 INFO L420 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:53:51,358 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:53:51,358 INFO L85 PathProgramCache]: Analyzing trace with hash -1144712231, now seen corresponding path program 1 times [2022-11-03 02:53:51,359 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:53:51,359 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1278660722] [2022-11-03 02:53:51,359 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:53:51,359 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:53:51,359 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:53:51,360 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:53:51,363 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (28)] Waiting until timeout for monitored process [2022-11-03 02:53:51,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:53:51,494 INFO L263 TraceCheckSpWp]: Trace formula consists of 391 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 02:53:51,497 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:53:51,717 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 19 proven. 17 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 02:53:51,717 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:53:51,768 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 34 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 02:53:51,769 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:53:51,769 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1278660722] [2022-11-03 02:53:51,769 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1278660722] provided 1 perfect and 1 imperfect interpolant sequences [2022-11-03 02:53:51,769 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-03 02:53:51,770 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [8] total 10 [2022-11-03 02:53:51,770 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2124480625] [2022-11-03 02:53:51,770 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:53:51,770 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-03 02:53:51,770 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:53:51,771 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-03 02:53:51,771 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2022-11-03 02:53:51,771 INFO L87 Difference]: Start difference. First operand 118 states and 148 transitions. Second operand has 6 states, 6 states have (on average 11.5) internal successors, (69), 6 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:51,954 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:53:51,955 INFO L93 Difference]: Finished difference Result 240 states and 306 transitions. [2022-11-03 02:53:51,955 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-03 02:53:51,955 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 11.5) internal successors, (69), 6 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 71 [2022-11-03 02:53:51,956 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:53:51,956 INFO L225 Difference]: With dead ends: 240 [2022-11-03 02:53:51,956 INFO L226 Difference]: Without dead ends: 174 [2022-11-03 02:53:51,957 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 150 GetRequests, 136 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=60, Invalid=180, Unknown=0, NotChecked=0, Total=240 [2022-11-03 02:53:51,962 INFO L413 NwaCegarLoop]: 121 mSDtfsCounter, 157 mSDsluCounter, 205 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 157 SdHoareTripleChecker+Valid, 326 SdHoareTripleChecker+Invalid, 87 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:53:51,962 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [157 Valid, 326 Invalid, 87 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 02:53:51,964 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 174 states. [2022-11-03 02:53:51,969 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 174 to 118. [2022-11-03 02:53:51,970 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 118 states, 117 states have (on average 1.2564102564102564) internal successors, (147), 117 states have internal predecessors, (147), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:51,971 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 147 transitions. [2022-11-03 02:53:51,971 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 147 transitions. Word has length 71 [2022-11-03 02:53:51,971 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:53:51,971 INFO L495 AbstractCegarLoop]: Abstraction has 118 states and 147 transitions. [2022-11-03 02:53:51,972 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 11.5) internal successors, (69), 6 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:51,972 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 147 transitions. [2022-11-03 02:53:51,972 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2022-11-03 02:53:51,972 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:53:51,973 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:53:51,991 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (28)] Forceful destruction successful, exit code 0 [2022-11-03 02:53:52,185 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 28 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:53:52,186 INFO L420 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:53:52,186 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:53:52,186 INFO L85 PathProgramCache]: Analyzing trace with hash 1461311323, now seen corresponding path program 1 times [2022-11-03 02:53:52,186 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:53:52,186 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [484405860] [2022-11-03 02:53:52,186 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:53:52,187 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:53:52,187 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:53:52,187 INFO L229 MonitoredProcess]: Starting monitored process 29 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:53:52,189 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (29)] Waiting until timeout for monitored process [2022-11-03 02:53:52,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:53:52,319 INFO L263 TraceCheckSpWp]: Trace formula consists of 391 conjuncts, 14 conjunts are in the unsatisfiable core [2022-11-03 02:53:52,321 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:53:52,527 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 15 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:53:52,528 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:53:52,846 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 15 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:53:52,847 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:53:52,847 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [484405860] [2022-11-03 02:53:52,847 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [484405860] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:53:52,847 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [301032096] [2022-11-03 02:53:52,848 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:53:52,848 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:53:52,848 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:53:52,849 INFO L229 MonitoredProcess]: Starting monitored process 30 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:53:52,866 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (30)] Waiting until timeout for monitored process [2022-11-03 02:53:53,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:53:53,066 INFO L263 TraceCheckSpWp]: Trace formula consists of 391 conjuncts, 4 conjunts are in the unsatisfiable core [2022-11-03 02:53:53,068 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:53:53,140 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 30 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-11-03 02:53:53,140 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:53:53,140 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [301032096] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:53:53,140 INFO L184 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2022-11-03 02:53:53,141 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [8, 8] total 16 [2022-11-03 02:53:53,141 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [181546026] [2022-11-03 02:53:53,141 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:53:53,141 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-03 02:53:53,142 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:53:53,142 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-03 02:53:53,142 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=206, Unknown=0, NotChecked=0, Total=240 [2022-11-03 02:53:53,142 INFO L87 Difference]: Start difference. First operand 118 states and 147 transitions. Second operand has 5 states, 5 states have (on average 13.2) internal successors, (66), 5 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:53,277 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:53:53,277 INFO L93 Difference]: Finished difference Result 242 states and 308 transitions. [2022-11-03 02:53:53,277 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-03 02:53:53,277 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 13.2) internal successors, (66), 5 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 71 [2022-11-03 02:53:53,278 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:53:53,278 INFO L225 Difference]: With dead ends: 242 [2022-11-03 02:53:53,279 INFO L226 Difference]: Without dead ends: 176 [2022-11-03 02:53:53,279 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 216 GetRequests, 199 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=49, Invalid=293, Unknown=0, NotChecked=0, Total=342 [2022-11-03 02:53:53,280 INFO L413 NwaCegarLoop]: 122 mSDtfsCounter, 116 mSDsluCounter, 141 mSDsCounter, 0 mSdLazyCounter, 79 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 116 SdHoareTripleChecker+Valid, 263 SdHoareTripleChecker+Invalid, 80 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 79 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:53:53,280 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [116 Valid, 263 Invalid, 80 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 79 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 02:53:53,281 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2022-11-03 02:53:53,286 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 118. [2022-11-03 02:53:53,287 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 118 states, 117 states have (on average 1.2478632478632479) internal successors, (146), 117 states have internal predecessors, (146), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:53,287 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 146 transitions. [2022-11-03 02:53:53,287 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 146 transitions. Word has length 71 [2022-11-03 02:53:53,288 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:53:53,288 INFO L495 AbstractCegarLoop]: Abstraction has 118 states and 146 transitions. [2022-11-03 02:53:53,288 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 13.2) internal successors, (66), 5 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:53,288 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 146 transitions. [2022-11-03 02:53:53,289 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2022-11-03 02:53:53,289 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:53:53,289 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:53:53,301 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (29)] Forceful destruction successful, exit code 0 [2022-11-03 02:53:53,503 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (30)] Ended with exit code 0 [2022-11-03 02:53:53,701 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 29 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,30 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt [2022-11-03 02:53:53,701 INFO L420 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:53:53,702 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:53:53,702 INFO L85 PathProgramCache]: Analyzing trace with hash 874505309, now seen corresponding path program 1 times [2022-11-03 02:53:53,702 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:53:53,702 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1909647334] [2022-11-03 02:53:53,702 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:53:53,703 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:53:53,703 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:53:53,704 INFO L229 MonitoredProcess]: Starting monitored process 31 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:53:53,706 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (31)] Waiting until timeout for monitored process [2022-11-03 02:53:53,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:53:53,856 INFO L263 TraceCheckSpWp]: Trace formula consists of 391 conjuncts, 14 conjunts are in the unsatisfiable core [2022-11-03 02:53:53,857 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:53:54,068 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 15 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:53:54,068 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:53:54,392 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 15 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:53:54,393 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:53:54,393 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1909647334] [2022-11-03 02:53:54,393 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1909647334] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:53:54,393 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1832580953] [2022-11-03 02:53:54,393 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:53:54,394 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:53:54,394 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:53:54,398 INFO L229 MonitoredProcess]: Starting monitored process 32 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:53:54,422 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (32)] Waiting until timeout for monitored process [2022-11-03 02:53:54,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:53:54,664 INFO L263 TraceCheckSpWp]: Trace formula consists of 391 conjuncts, 20 conjunts are in the unsatisfiable core [2022-11-03 02:53:54,666 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:53:54,882 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 15 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:53:54,882 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:53:55,096 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 15 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:53:55,096 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1832580953] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:53:55,096 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1961664450] [2022-11-03 02:53:55,096 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:53:55,097 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:53:55,097 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:53:55,098 INFO L229 MonitoredProcess]: Starting monitored process 33 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:53:55,114 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (33)] Waiting until timeout for monitored process [2022-11-03 02:53:55,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:53:55,239 INFO L263 TraceCheckSpWp]: Trace formula consists of 391 conjuncts, 15 conjunts are in the unsatisfiable core [2022-11-03 02:53:55,241 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:53:55,413 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 15 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:53:55,413 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:53:55,600 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 15 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:53:55,600 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1961664450] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:53:55,600 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:53:55,601 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 10, 8, 8, 8] total 15 [2022-11-03 02:53:55,601 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1161599522] [2022-11-03 02:53:55,601 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:53:55,601 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-11-03 02:53:55,602 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:53:55,602 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-11-03 02:53:55,602 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=174, Unknown=0, NotChecked=0, Total=210 [2022-11-03 02:53:55,602 INFO L87 Difference]: Start difference. First operand 118 states and 146 transitions. Second operand has 15 states, 15 states have (on average 8.666666666666666) internal successors, (130), 15 states have internal predecessors, (130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:56,156 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:53:56,157 INFO L93 Difference]: Finished difference Result 461 states and 605 transitions. [2022-11-03 02:53:56,157 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2022-11-03 02:53:56,157 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 8.666666666666666) internal successors, (130), 15 states have internal predecessors, (130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 71 [2022-11-03 02:53:56,158 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:53:56,159 INFO L225 Difference]: With dead ends: 461 [2022-11-03 02:53:56,159 INFO L226 Difference]: Without dead ends: 395 [2022-11-03 02:53:56,160 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 442 GetRequests, 405 SyntacticMatches, 2 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 260 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=328, Invalid=1004, Unknown=0, NotChecked=0, Total=1332 [2022-11-03 02:53:56,161 INFO L413 NwaCegarLoop]: 69 mSDtfsCounter, 800 mSDsluCounter, 481 mSDsCounter, 0 mSdLazyCounter, 117 mSolverCounterSat, 30 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 800 SdHoareTripleChecker+Valid, 550 SdHoareTripleChecker+Invalid, 319 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 30 IncrementalHoareTripleChecker+Valid, 117 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 172 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:53:56,162 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [800 Valid, 550 Invalid, 319 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [30 Valid, 117 Invalid, 0 Unknown, 172 Unchecked, 0.1s Time] [2022-11-03 02:53:56,163 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 395 states. [2022-11-03 02:53:56,173 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 395 to 201. [2022-11-03 02:53:56,173 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 201 states, 200 states have (on average 1.295) internal successors, (259), 200 states have internal predecessors, (259), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:56,174 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 201 states to 201 states and 259 transitions. [2022-11-03 02:53:56,174 INFO L78 Accepts]: Start accepts. Automaton has 201 states and 259 transitions. Word has length 71 [2022-11-03 02:53:56,174 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:53:56,175 INFO L495 AbstractCegarLoop]: Abstraction has 201 states and 259 transitions. [2022-11-03 02:53:56,177 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 8.666666666666666) internal successors, (130), 15 states have internal predecessors, (130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:56,177 INFO L276 IsEmpty]: Start isEmpty. Operand 201 states and 259 transitions. [2022-11-03 02:53:56,178 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2022-11-03 02:53:56,178 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:53:56,178 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:53:56,186 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (32)] Forceful destruction successful, exit code 0 [2022-11-03 02:53:56,402 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (33)] Ended with exit code 0 [2022-11-03 02:53:56,589 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (31)] Forceful destruction successful, exit code 0 [2022-11-03 02:53:56,781 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 32 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,33 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,31 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:53:56,782 INFO L420 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:53:56,782 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:53:56,782 INFO L85 PathProgramCache]: Analyzing trace with hash -405358369, now seen corresponding path program 1 times [2022-11-03 02:53:56,783 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:53:56,783 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1554534475] [2022-11-03 02:53:56,783 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:53:56,783 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:53:56,783 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:53:56,784 INFO L229 MonitoredProcess]: Starting monitored process 34 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:53:56,791 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (34)] Waiting until timeout for monitored process [2022-11-03 02:53:56,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:53:56,921 INFO L263 TraceCheckSpWp]: Trace formula consists of 391 conjuncts, 44 conjunts are in the unsatisfiable core [2022-11-03 02:53:56,923 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:53:57,569 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 37 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:53:57,570 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:54:00,196 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 37 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:54:00,196 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:54:00,196 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1554534475] [2022-11-03 02:54:00,196 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1554534475] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:54:00,196 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1935548778] [2022-11-03 02:54:00,196 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:54:00,197 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:54:00,197 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:54:00,197 INFO L229 MonitoredProcess]: Starting monitored process 35 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:54:00,199 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (35)] Waiting until timeout for monitored process [2022-11-03 02:54:00,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:54:00,451 INFO L263 TraceCheckSpWp]: Trace formula consists of 391 conjuncts, 44 conjunts are in the unsatisfiable core [2022-11-03 02:54:00,453 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:54:00,811 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 37 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:54:00,811 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:54:01,439 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 37 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:54:01,440 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1935548778] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:54:01,440 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [496776399] [2022-11-03 02:54:01,440 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:54:01,440 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:54:01,441 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:54:01,441 INFO L229 MonitoredProcess]: Starting monitored process 36 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:54:01,442 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (36)] Waiting until timeout for monitored process [2022-11-03 02:54:01,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:54:01,565 INFO L263 TraceCheckSpWp]: Trace formula consists of 391 conjuncts, 47 conjunts are in the unsatisfiable core [2022-11-03 02:54:01,568 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:54:02,052 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 37 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:54:02,052 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:54:02,831 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 37 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:54:02,832 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [496776399] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:54:02,832 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:54:02,832 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 22, 22] total 42 [2022-11-03 02:54:02,832 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1663368849] [2022-11-03 02:54:02,832 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:54:02,834 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 42 states [2022-11-03 02:54:02,834 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:54:02,834 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2022-11-03 02:54:02,836 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=131, Invalid=1591, Unknown=0, NotChecked=0, Total=1722 [2022-11-03 02:54:02,836 INFO L87 Difference]: Start difference. First operand 201 states and 259 transitions. Second operand has 42 states, 42 states have (on average 3.4285714285714284) internal successors, (144), 42 states have internal predecessors, (144), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:08,529 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:54:08,529 INFO L93 Difference]: Finished difference Result 743 states and 980 transitions. [2022-11-03 02:54:08,530 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 63 states. [2022-11-03 02:54:08,530 INFO L78 Accepts]: Start accepts. Automaton has has 42 states, 42 states have (on average 3.4285714285714284) internal successors, (144), 42 states have internal predecessors, (144), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 71 [2022-11-03 02:54:08,530 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:54:08,533 INFO L225 Difference]: With dead ends: 743 [2022-11-03 02:54:08,533 INFO L226 Difference]: Without dead ends: 741 [2022-11-03 02:54:08,536 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 489 GetRequests, 386 SyntacticMatches, 2 SemanticMatches, 101 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2336 ImplicationChecksByTransitivity, 7.2s TimeCoverageRelationStatistics Valid=1621, Invalid=8885, Unknown=0, NotChecked=0, Total=10506 [2022-11-03 02:54:08,537 INFO L413 NwaCegarLoop]: 102 mSDtfsCounter, 1485 mSDsluCounter, 2318 mSDsCounter, 0 mSdLazyCounter, 889 mSolverCounterSat, 104 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1485 SdHoareTripleChecker+Valid, 2420 SdHoareTripleChecker+Invalid, 2430 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 104 IncrementalHoareTripleChecker+Valid, 889 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 1437 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-11-03 02:54:08,537 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1485 Valid, 2420 Invalid, 2430 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [104 Valid, 889 Invalid, 0 Unknown, 1437 Unchecked, 0.9s Time] [2022-11-03 02:54:08,538 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 741 states. [2022-11-03 02:54:08,568 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 741 to 271. [2022-11-03 02:54:08,569 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 271 states, 270 states have (on average 1.3) internal successors, (351), 270 states have internal predecessors, (351), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:08,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 271 states to 271 states and 351 transitions. [2022-11-03 02:54:08,570 INFO L78 Accepts]: Start accepts. Automaton has 271 states and 351 transitions. Word has length 71 [2022-11-03 02:54:08,571 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:54:08,571 INFO L495 AbstractCegarLoop]: Abstraction has 271 states and 351 transitions. [2022-11-03 02:54:08,571 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 42 states, 42 states have (on average 3.4285714285714284) internal successors, (144), 42 states have internal predecessors, (144), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:08,571 INFO L276 IsEmpty]: Start isEmpty. Operand 271 states and 351 transitions. [2022-11-03 02:54:08,572 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2022-11-03 02:54:08,572 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:54:08,572 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:54:08,586 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (34)] Forceful destruction successful, exit code 0 [2022-11-03 02:54:08,788 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (35)] Ended with exit code 0 [2022-11-03 02:54:09,007 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (36)] Ended with exit code 0 [2022-11-03 02:54:09,186 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 34 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,35 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,36 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:54:09,186 INFO L420 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:54:09,186 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:54:09,187 INFO L85 PathProgramCache]: Analyzing trace with hash -1106958243, now seen corresponding path program 1 times [2022-11-03 02:54:09,187 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:54:09,187 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1677335788] [2022-11-03 02:54:09,187 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:54:09,187 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:54:09,187 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:54:09,188 INFO L229 MonitoredProcess]: Starting monitored process 37 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:54:09,193 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (37)] Waiting until timeout for monitored process [2022-11-03 02:54:09,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:54:09,321 INFO L263 TraceCheckSpWp]: Trace formula consists of 391 conjuncts, 9 conjunts are in the unsatisfiable core [2022-11-03 02:54:09,322 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:54:09,450 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 31 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:54:09,450 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:54:09,552 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 31 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:54:09,552 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:54:09,552 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1677335788] [2022-11-03 02:54:09,553 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1677335788] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:54:09,553 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [386448205] [2022-11-03 02:54:09,553 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:54:09,553 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:54:09,553 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:54:09,554 INFO L229 MonitoredProcess]: Starting monitored process 38 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:54:09,555 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (38)] Waiting until timeout for monitored process [2022-11-03 02:54:09,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:54:09,804 INFO L263 TraceCheckSpWp]: Trace formula consists of 391 conjuncts, 9 conjunts are in the unsatisfiable core [2022-11-03 02:54:09,805 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:54:09,895 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 31 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:54:09,896 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:54:09,970 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 31 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:54:09,970 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [386448205] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:54:09,970 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1088828351] [2022-11-03 02:54:09,970 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:54:09,970 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:54:09,971 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:54:09,974 INFO L229 MonitoredProcess]: Starting monitored process 39 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:54:09,996 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (39)] Waiting until timeout for monitored process [2022-11-03 02:54:10,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:54:10,113 INFO L263 TraceCheckSpWp]: Trace formula consists of 391 conjuncts, 9 conjunts are in the unsatisfiable core [2022-11-03 02:54:10,115 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:54:10,213 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 31 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:54:10,214 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:54:10,280 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 31 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:54:10,280 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1088828351] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:54:10,280 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:54:10,280 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8, 8] total 11 [2022-11-03 02:54:10,281 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [937430908] [2022-11-03 02:54:10,281 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:54:10,281 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-11-03 02:54:10,281 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:54:10,282 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-11-03 02:54:10,282 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2022-11-03 02:54:10,282 INFO L87 Difference]: Start difference. First operand 271 states and 351 transitions. Second operand has 11 states, 11 states have (on average 8.454545454545455) internal successors, (93), 11 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:10,644 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:54:10,644 INFO L93 Difference]: Finished difference Result 1221 states and 1592 transitions. [2022-11-03 02:54:10,645 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-11-03 02:54:10,645 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 8.454545454545455) internal successors, (93), 11 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 71 [2022-11-03 02:54:10,645 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:54:10,649 INFO L225 Difference]: With dead ends: 1221 [2022-11-03 02:54:10,649 INFO L226 Difference]: Without dead ends: 988 [2022-11-03 02:54:10,650 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 433 GetRequests, 411 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=168, Invalid=384, Unknown=0, NotChecked=0, Total=552 [2022-11-03 02:54:10,650 INFO L413 NwaCegarLoop]: 68 mSDtfsCounter, 489 mSDsluCounter, 368 mSDsCounter, 0 mSdLazyCounter, 101 mSolverCounterSat, 16 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 489 SdHoareTripleChecker+Valid, 436 SdHoareTripleChecker+Invalid, 117 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 16 IncrementalHoareTripleChecker+Valid, 101 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:54:10,651 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [489 Valid, 436 Invalid, 117 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [16 Valid, 101 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 02:54:10,652 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 988 states. [2022-11-03 02:54:10,688 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 988 to 388. [2022-11-03 02:54:10,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 388 states, 387 states have (on average 1.2997416020671835) internal successors, (503), 387 states have internal predecessors, (503), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:10,690 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 388 states to 388 states and 503 transitions. [2022-11-03 02:54:10,690 INFO L78 Accepts]: Start accepts. Automaton has 388 states and 503 transitions. Word has length 71 [2022-11-03 02:54:10,690 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:54:10,690 INFO L495 AbstractCegarLoop]: Abstraction has 388 states and 503 transitions. [2022-11-03 02:54:10,691 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 8.454545454545455) internal successors, (93), 11 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:10,691 INFO L276 IsEmpty]: Start isEmpty. Operand 388 states and 503 transitions. [2022-11-03 02:54:10,692 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2022-11-03 02:54:10,692 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:54:10,692 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:54:10,695 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (38)] Ended with exit code 0 [2022-11-03 02:54:10,918 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (39)] Forceful destruction successful, exit code 0 [2022-11-03 02:54:11,104 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (37)] Forceful destruction successful, exit code 0 [2022-11-03 02:54:11,296 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 38 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,39 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,37 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:54:11,296 INFO L420 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:54:11,296 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:54:11,297 INFO L85 PathProgramCache]: Analyzing trace with hash -1434717667, now seen corresponding path program 1 times [2022-11-03 02:54:11,297 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:54:11,297 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [292965277] [2022-11-03 02:54:11,297 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:54:11,297 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:54:11,297 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:54:11,298 INFO L229 MonitoredProcess]: Starting monitored process 40 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:54:11,300 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (40)] Waiting until timeout for monitored process [2022-11-03 02:54:11,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:54:11,443 INFO L263 TraceCheckSpWp]: Trace formula consists of 391 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-03 02:54:11,445 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:54:11,505 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 34 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 02:54:11,505 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:54:11,506 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:54:11,506 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [292965277] [2022-11-03 02:54:11,506 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [292965277] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:54:11,506 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:54:11,506 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-03 02:54:11,506 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [412503542] [2022-11-03 02:54:11,506 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:54:11,506 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-03 02:54:11,507 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:54:11,507 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-03 02:54:11,507 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-03 02:54:11,507 INFO L87 Difference]: Start difference. First operand 388 states and 503 transitions. Second operand has 5 states, 5 states have (on average 13.8) internal successors, (69), 5 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:11,591 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:54:11,591 INFO L93 Difference]: Finished difference Result 956 states and 1245 transitions. [2022-11-03 02:54:11,591 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-03 02:54:11,592 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 13.8) internal successors, (69), 5 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 71 [2022-11-03 02:54:11,592 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:54:11,595 INFO L225 Difference]: With dead ends: 956 [2022-11-03 02:54:11,595 INFO L226 Difference]: Without dead ends: 604 [2022-11-03 02:54:11,596 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 68 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2022-11-03 02:54:11,596 INFO L413 NwaCegarLoop]: 87 mSDtfsCounter, 179 mSDsluCounter, 120 mSDsCounter, 0 mSdLazyCounter, 26 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 179 SdHoareTripleChecker+Valid, 207 SdHoareTripleChecker+Invalid, 26 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 26 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 02:54:11,597 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [179 Valid, 207 Invalid, 26 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 26 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-03 02:54:11,598 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 604 states. [2022-11-03 02:54:11,628 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 604 to 388. [2022-11-03 02:54:11,629 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 388 states, 387 states have (on average 1.2790697674418605) internal successors, (495), 387 states have internal predecessors, (495), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:11,630 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 388 states to 388 states and 495 transitions. [2022-11-03 02:54:11,630 INFO L78 Accepts]: Start accepts. Automaton has 388 states and 495 transitions. Word has length 71 [2022-11-03 02:54:11,631 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:54:11,631 INFO L495 AbstractCegarLoop]: Abstraction has 388 states and 495 transitions. [2022-11-03 02:54:11,631 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 13.8) internal successors, (69), 5 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:11,631 INFO L276 IsEmpty]: Start isEmpty. Operand 388 states and 495 transitions. [2022-11-03 02:54:11,632 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2022-11-03 02:54:11,632 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:54:11,632 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:54:11,645 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (40)] Ended with exit code 0 [2022-11-03 02:54:11,845 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 40 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:54:11,845 INFO L420 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:54:11,845 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:54:11,845 INFO L85 PathProgramCache]: Analyzing trace with hash 1522914333, now seen corresponding path program 1 times [2022-11-03 02:54:11,846 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:54:11,846 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1514960938] [2022-11-03 02:54:11,846 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:54:11,846 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:54:11,846 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:54:11,847 INFO L229 MonitoredProcess]: Starting monitored process 41 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:54:11,849 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (41)] Waiting until timeout for monitored process [2022-11-03 02:54:11,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:54:11,980 INFO L263 TraceCheckSpWp]: Trace formula consists of 391 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 02:54:11,983 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:54:12,110 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2022-11-03 02:54:12,110 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:54:12,110 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:54:12,111 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1514960938] [2022-11-03 02:54:12,111 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1514960938] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:54:12,111 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:54:12,111 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-11-03 02:54:12,111 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1006797781] [2022-11-03 02:54:12,111 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:54:12,111 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-03 02:54:12,111 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:54:12,112 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-03 02:54:12,112 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-11-03 02:54:12,112 INFO L87 Difference]: Start difference. First operand 388 states and 495 transitions. Second operand has 8 states, 8 states have (on average 7.875) internal successors, (63), 8 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:12,254 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:54:12,255 INFO L93 Difference]: Finished difference Result 992 states and 1258 transitions. [2022-11-03 02:54:12,255 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-03 02:54:12,255 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 7.875) internal successors, (63), 8 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 71 [2022-11-03 02:54:12,255 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:54:12,257 INFO L225 Difference]: With dead ends: 992 [2022-11-03 02:54:12,257 INFO L226 Difference]: Without dead ends: 640 [2022-11-03 02:54:12,258 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 64 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2022-11-03 02:54:12,259 INFO L413 NwaCegarLoop]: 68 mSDtfsCounter, 142 mSDsluCounter, 248 mSDsCounter, 0 mSdLazyCounter, 63 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 142 SdHoareTripleChecker+Valid, 316 SdHoareTripleChecker+Invalid, 85 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 63 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 20 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:54:12,259 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [142 Valid, 316 Invalid, 85 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 63 Invalid, 0 Unknown, 20 Unchecked, 0.1s Time] [2022-11-03 02:54:12,260 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 640 states. [2022-11-03 02:54:12,311 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 640 to 404. [2022-11-03 02:54:12,311 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 404 states, 403 states have (on average 1.2679900744416874) internal successors, (511), 403 states have internal predecessors, (511), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:12,312 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 404 states to 404 states and 511 transitions. [2022-11-03 02:54:12,312 INFO L78 Accepts]: Start accepts. Automaton has 404 states and 511 transitions. Word has length 71 [2022-11-03 02:54:12,312 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:54:12,312 INFO L495 AbstractCegarLoop]: Abstraction has 404 states and 511 transitions. [2022-11-03 02:54:12,313 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 7.875) internal successors, (63), 8 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:12,313 INFO L276 IsEmpty]: Start isEmpty. Operand 404 states and 511 transitions. [2022-11-03 02:54:12,314 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2022-11-03 02:54:12,314 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:54:12,314 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:54:12,325 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (41)] Forceful destruction successful, exit code 0 [2022-11-03 02:54:12,514 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 41 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:54:12,515 INFO L420 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:54:12,515 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:54:12,515 INFO L85 PathProgramCache]: Analyzing trace with hash 1132981661, now seen corresponding path program 1 times [2022-11-03 02:54:12,516 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:54:12,516 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [593435430] [2022-11-03 02:54:12,516 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:54:12,516 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:54:12,516 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:54:12,517 INFO L229 MonitoredProcess]: Starting monitored process 42 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:54:12,518 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (42)] Waiting until timeout for monitored process [2022-11-03 02:54:12,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:54:12,649 INFO L263 TraceCheckSpWp]: Trace formula consists of 391 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 02:54:12,650 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:54:12,759 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 20 proven. 0 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2022-11-03 02:54:12,759 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:54:12,760 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:54:12,760 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [593435430] [2022-11-03 02:54:12,760 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [593435430] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:54:12,760 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:54:12,760 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-11-03 02:54:12,760 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [419027541] [2022-11-03 02:54:12,761 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:54:12,761 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-03 02:54:12,761 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:54:12,761 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-03 02:54:12,761 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-11-03 02:54:12,762 INFO L87 Difference]: Start difference. First operand 404 states and 511 transitions. Second operand has 8 states, 8 states have (on average 7.375) internal successors, (59), 8 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:12,887 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:54:12,887 INFO L93 Difference]: Finished difference Result 848 states and 1074 transitions. [2022-11-03 02:54:12,888 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-03 02:54:12,888 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 7.375) internal successors, (59), 8 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 71 [2022-11-03 02:54:12,888 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:54:12,889 INFO L225 Difference]: With dead ends: 848 [2022-11-03 02:54:12,889 INFO L226 Difference]: Without dead ends: 484 [2022-11-03 02:54:12,889 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 64 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2022-11-03 02:54:12,890 INFO L413 NwaCegarLoop]: 60 mSDtfsCounter, 142 mSDsluCounter, 267 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 142 SdHoareTripleChecker+Valid, 327 SdHoareTripleChecker+Invalid, 88 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 28 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:54:12,890 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [142 Valid, 327 Invalid, 88 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 58 Invalid, 0 Unknown, 28 Unchecked, 0.1s Time] [2022-11-03 02:54:12,891 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 484 states. [2022-11-03 02:54:12,920 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 484 to 392. [2022-11-03 02:54:12,921 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 392 states, 391 states have (on average 1.2710997442455243) internal successors, (497), 391 states have internal predecessors, (497), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:12,922 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 392 states to 392 states and 497 transitions. [2022-11-03 02:54:12,922 INFO L78 Accepts]: Start accepts. Automaton has 392 states and 497 transitions. Word has length 71 [2022-11-03 02:54:12,922 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:54:12,922 INFO L495 AbstractCegarLoop]: Abstraction has 392 states and 497 transitions. [2022-11-03 02:54:12,923 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 7.375) internal successors, (59), 8 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:12,923 INFO L276 IsEmpty]: Start isEmpty. Operand 392 states and 497 transitions. [2022-11-03 02:54:12,924 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2022-11-03 02:54:12,924 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:54:12,924 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2022-11-03 02:54:12,936 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (42)] Forceful destruction successful, exit code 0 [2022-11-03 02:54:13,136 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 42 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:54:13,136 INFO L420 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:54:13,136 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:54:13,136 INFO L85 PathProgramCache]: Analyzing trace with hash -1336544505, now seen corresponding path program 1 times [2022-11-03 02:54:13,137 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:54:13,137 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [450151841] [2022-11-03 02:54:13,137 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:54:13,137 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:54:13,137 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:54:13,138 INFO L229 MonitoredProcess]: Starting monitored process 43 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:54:13,141 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (43)] Waiting until timeout for monitored process [2022-11-03 02:54:13,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:54:13,274 INFO L263 TraceCheckSpWp]: Trace formula consists of 391 conjuncts, 58 conjunts are in the unsatisfiable core [2022-11-03 02:54:13,276 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:54:14,247 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 37 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:54:14,247 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:54:17,745 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 37 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:54:17,745 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:54:17,745 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [450151841] [2022-11-03 02:54:17,745 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [450151841] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:54:17,746 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1781602645] [2022-11-03 02:54:17,746 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:54:17,746 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:54:17,746 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:54:17,750 INFO L229 MonitoredProcess]: Starting monitored process 44 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:54:17,754 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (44)] Waiting until timeout for monitored process [2022-11-03 02:54:18,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:54:18,005 INFO L263 TraceCheckSpWp]: Trace formula consists of 391 conjuncts, 58 conjunts are in the unsatisfiable core [2022-11-03 02:54:18,008 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:54:18,492 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 37 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:54:18,492 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:54:19,192 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 37 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:54:19,192 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1781602645] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:54:19,192 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [289428350] [2022-11-03 02:54:19,192 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:54:19,192 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:54:19,192 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:54:19,193 INFO L229 MonitoredProcess]: Starting monitored process 45 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:54:19,194 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (45)] Waiting until timeout for monitored process [2022-11-03 02:54:19,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:54:19,316 INFO L263 TraceCheckSpWp]: Trace formula consists of 391 conjuncts, 61 conjunts are in the unsatisfiable core [2022-11-03 02:54:19,319 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:54:19,987 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 37 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:54:19,988 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:54:20,890 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 37 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:54:20,890 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [289428350] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:54:20,890 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:54:20,890 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 24, 24] total 46 [2022-11-03 02:54:20,890 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1792501046] [2022-11-03 02:54:20,890 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:54:20,891 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 46 states [2022-11-03 02:54:20,891 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:54:20,891 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2022-11-03 02:54:20,892 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=115, Invalid=1955, Unknown=0, NotChecked=0, Total=2070 [2022-11-03 02:54:20,892 INFO L87 Difference]: Start difference. First operand 392 states and 497 transitions. Second operand has 46 states, 46 states have (on average 3.130434782608696) internal successors, (144), 46 states have internal predecessors, (144), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:23,673 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:54:23,674 INFO L93 Difference]: Finished difference Result 880 states and 1132 transitions. [2022-11-03 02:54:23,674 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2022-11-03 02:54:23,674 INFO L78 Accepts]: Start accepts. Automaton has has 46 states, 46 states have (on average 3.130434782608696) internal successors, (144), 46 states have internal predecessors, (144), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 71 [2022-11-03 02:54:23,675 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:54:23,677 INFO L225 Difference]: With dead ends: 880 [2022-11-03 02:54:23,677 INFO L226 Difference]: Without dead ends: 878 [2022-11-03 02:54:23,679 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 448 GetRequests, 374 SyntacticMatches, 2 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 649 ImplicationChecksByTransitivity, 5.9s TimeCoverageRelationStatistics Valid=507, Invalid=4895, Unknown=0, NotChecked=0, Total=5402 [2022-11-03 02:54:23,680 INFO L413 NwaCegarLoop]: 150 mSDtfsCounter, 544 mSDsluCounter, 4158 mSDsCounter, 0 mSdLazyCounter, 446 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 544 SdHoareTripleChecker+Valid, 4308 SdHoareTripleChecker+Invalid, 1329 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 446 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 873 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-11-03 02:54:23,680 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [544 Valid, 4308 Invalid, 1329 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 446 Invalid, 0 Unknown, 873 Unchecked, 0.4s Time] [2022-11-03 02:54:23,681 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 878 states. [2022-11-03 02:54:23,731 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 878 to 432. [2022-11-03 02:54:23,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 432 states, 431 states have (on average 1.25754060324826) internal successors, (542), 431 states have internal predecessors, (542), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:23,733 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 432 states to 432 states and 542 transitions. [2022-11-03 02:54:23,733 INFO L78 Accepts]: Start accepts. Automaton has 432 states and 542 transitions. Word has length 71 [2022-11-03 02:54:23,733 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:54:23,733 INFO L495 AbstractCegarLoop]: Abstraction has 432 states and 542 transitions. [2022-11-03 02:54:23,733 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 46 states, 46 states have (on average 3.130434782608696) internal successors, (144), 46 states have internal predecessors, (144), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:23,734 INFO L276 IsEmpty]: Start isEmpty. Operand 432 states and 542 transitions. [2022-11-03 02:54:23,735 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2022-11-03 02:54:23,735 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:54:23,735 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:54:23,775 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (45)] Forceful destruction successful, exit code 0 [2022-11-03 02:54:23,967 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (43)] Forceful destruction successful, exit code 0 [2022-11-03 02:54:24,158 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (44)] Forceful destruction successful, exit code 0 [2022-11-03 02:54:24,350 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 45 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,43 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,44 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt [2022-11-03 02:54:24,351 INFO L420 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:54:24,351 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:54:24,351 INFO L85 PathProgramCache]: Analyzing trace with hash -2038144379, now seen corresponding path program 1 times [2022-11-03 02:54:24,351 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:54:24,351 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [617794345] [2022-11-03 02:54:24,352 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:54:24,352 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:54:24,352 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:54:24,354 INFO L229 MonitoredProcess]: Starting monitored process 46 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:54:24,391 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (46)] Waiting until timeout for monitored process [2022-11-03 02:54:24,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:54:24,515 INFO L263 TraceCheckSpWp]: Trace formula consists of 391 conjuncts, 11 conjunts are in the unsatisfiable core [2022-11-03 02:54:24,517 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:54:24,639 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 31 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:54:24,639 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:54:24,732 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 31 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:54:24,732 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:54:24,732 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [617794345] [2022-11-03 02:54:24,733 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [617794345] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:54:24,733 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [198941329] [2022-11-03 02:54:24,733 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:54:24,733 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:54:24,733 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:54:24,734 INFO L229 MonitoredProcess]: Starting monitored process 47 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:54:24,735 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (47)] Waiting until timeout for monitored process [2022-11-03 02:54:24,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:54:24,987 INFO L263 TraceCheckSpWp]: Trace formula consists of 391 conjuncts, 11 conjunts are in the unsatisfiable core [2022-11-03 02:54:24,988 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:54:25,074 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 31 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:54:25,075 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:54:25,138 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 31 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:54:25,138 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [198941329] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:54:25,138 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1914630496] [2022-11-03 02:54:25,138 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:54:25,139 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:54:25,139 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:54:25,139 INFO L229 MonitoredProcess]: Starting monitored process 48 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:54:25,141 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (48)] Waiting until timeout for monitored process [2022-11-03 02:54:25,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:54:25,263 INFO L263 TraceCheckSpWp]: Trace formula consists of 391 conjuncts, 11 conjunts are in the unsatisfiable core [2022-11-03 02:54:25,265 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:54:25,396 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 31 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:54:25,396 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:54:25,458 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 31 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:54:25,459 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1914630496] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:54:25,459 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:54:25,459 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8, 8] total 11 [2022-11-03 02:54:25,459 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2083128] [2022-11-03 02:54:25,459 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:54:25,460 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-11-03 02:54:25,460 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:54:25,460 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-11-03 02:54:25,461 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2022-11-03 02:54:25,461 INFO L87 Difference]: Start difference. First operand 432 states and 542 transitions. Second operand has 11 states, 11 states have (on average 8.454545454545455) internal successors, (93), 11 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:25,713 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:54:25,713 INFO L93 Difference]: Finished difference Result 1355 states and 1734 transitions. [2022-11-03 02:54:25,713 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-11-03 02:54:25,714 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 8.454545454545455) internal successors, (93), 11 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 71 [2022-11-03 02:54:25,714 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:54:25,716 INFO L225 Difference]: With dead ends: 1355 [2022-11-03 02:54:25,716 INFO L226 Difference]: Without dead ends: 1003 [2022-11-03 02:54:25,716 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 429 GetRequests, 411 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 34 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=103, Invalid=277, Unknown=0, NotChecked=0, Total=380 [2022-11-03 02:54:25,717 INFO L413 NwaCegarLoop]: 109 mSDtfsCounter, 378 mSDsluCounter, 533 mSDsCounter, 0 mSdLazyCounter, 95 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 378 SdHoareTripleChecker+Valid, 642 SdHoareTripleChecker+Invalid, 101 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 95 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:54:25,717 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [378 Valid, 642 Invalid, 101 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 95 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 02:54:25,719 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1003 states. [2022-11-03 02:54:25,752 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1003 to 420. [2022-11-03 02:54:25,753 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 420 states, 419 states have (on average 1.260143198090692) internal successors, (528), 419 states have internal predecessors, (528), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:25,754 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 420 states to 420 states and 528 transitions. [2022-11-03 02:54:25,754 INFO L78 Accepts]: Start accepts. Automaton has 420 states and 528 transitions. Word has length 71 [2022-11-03 02:54:25,754 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:54:25,755 INFO L495 AbstractCegarLoop]: Abstraction has 420 states and 528 transitions. [2022-11-03 02:54:25,755 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 8.454545454545455) internal successors, (93), 11 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:25,755 INFO L276 IsEmpty]: Start isEmpty. Operand 420 states and 528 transitions. [2022-11-03 02:54:25,756 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2022-11-03 02:54:25,756 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:54:25,757 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:54:25,760 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (47)] Ended with exit code 0 [2022-11-03 02:54:25,981 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (48)] Ended with exit code 0 [2022-11-03 02:54:26,168 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (46)] Ended with exit code 0 [2022-11-03 02:54:26,360 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 47 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,48 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,46 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:54:26,360 INFO L420 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:54:26,361 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:54:26,361 INFO L85 PathProgramCache]: Analyzing trace with hash -472100867, now seen corresponding path program 2 times [2022-11-03 02:54:26,361 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:54:26,361 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1915713161] [2022-11-03 02:54:26,361 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-03 02:54:26,362 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:54:26,362 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:54:26,362 INFO L229 MonitoredProcess]: Starting monitored process 49 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:54:26,363 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (49)] Waiting until timeout for monitored process [2022-11-03 02:54:26,537 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-03 02:54:26,538 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 02:54:26,545 INFO L263 TraceCheckSpWp]: Trace formula consists of 560 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 02:54:26,548 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:54:26,782 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 70 proven. 19 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-11-03 02:54:26,782 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:54:26,860 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 87 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2022-11-03 02:54:26,860 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:54:26,860 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1915713161] [2022-11-03 02:54:26,861 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1915713161] provided 1 perfect and 1 imperfect interpolant sequences [2022-11-03 02:54:26,861 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-03 02:54:26,861 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [8] total 12 [2022-11-03 02:54:26,861 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [688177478] [2022-11-03 02:54:26,861 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:54:26,861 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-03 02:54:26,862 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:54:26,862 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-03 02:54:26,862 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2022-11-03 02:54:26,862 INFO L87 Difference]: Start difference. First operand 420 states and 528 transitions. Second operand has 6 states, 6 states have (on average 15.166666666666666) internal successors, (91), 6 states have internal predecessors, (91), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:27,031 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:54:27,031 INFO L93 Difference]: Finished difference Result 779 states and 970 transitions. [2022-11-03 02:54:27,031 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-03 02:54:27,032 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 15.166666666666666) internal successors, (91), 6 states have internal predecessors, (91), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 104 [2022-11-03 02:54:27,032 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:54:27,033 INFO L225 Difference]: With dead ends: 779 [2022-11-03 02:54:27,033 INFO L226 Difference]: Without dead ends: 427 [2022-11-03 02:54:27,034 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 216 GetRequests, 200 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 40 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=66, Invalid=240, Unknown=0, NotChecked=0, Total=306 [2022-11-03 02:54:27,035 INFO L413 NwaCegarLoop]: 60 mSDtfsCounter, 185 mSDsluCounter, 171 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 185 SdHoareTripleChecker+Valid, 231 SdHoareTripleChecker+Invalid, 80 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:54:27,035 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [185 Valid, 231 Invalid, 80 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 02:54:27,036 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 427 states. [2022-11-03 02:54:27,059 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 427 to 341. [2022-11-03 02:54:27,059 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 341 states, 340 states have (on average 1.2176470588235293) internal successors, (414), 340 states have internal predecessors, (414), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:27,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 341 states to 341 states and 414 transitions. [2022-11-03 02:54:27,061 INFO L78 Accepts]: Start accepts. Automaton has 341 states and 414 transitions. Word has length 104 [2022-11-03 02:54:27,061 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:54:27,061 INFO L495 AbstractCegarLoop]: Abstraction has 341 states and 414 transitions. [2022-11-03 02:54:27,061 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 15.166666666666666) internal successors, (91), 6 states have internal predecessors, (91), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:27,061 INFO L276 IsEmpty]: Start isEmpty. Operand 341 states and 414 transitions. [2022-11-03 02:54:27,062 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2022-11-03 02:54:27,063 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:54:27,063 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:54:27,076 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (49)] Ended with exit code 0 [2022-11-03 02:54:27,275 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 49 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:54:27,276 INFO L420 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:54:27,276 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:54:27,276 INFO L85 PathProgramCache]: Analyzing trace with hash -1656115329, now seen corresponding path program 2 times [2022-11-03 02:54:27,277 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:54:27,277 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [589158700] [2022-11-03 02:54:27,277 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-03 02:54:27,277 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:54:27,277 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:54:27,278 INFO L229 MonitoredProcess]: Starting monitored process 50 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:54:27,280 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (50)] Waiting until timeout for monitored process [2022-11-03 02:54:27,444 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-03 02:54:27,444 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 02:54:27,453 INFO L263 TraceCheckSpWp]: Trace formula consists of 560 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 02:54:27,455 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:54:27,719 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 70 proven. 23 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-11-03 02:54:27,719 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:54:27,796 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 91 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2022-11-03 02:54:27,797 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:54:27,797 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [589158700] [2022-11-03 02:54:27,797 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [589158700] provided 1 perfect and 1 imperfect interpolant sequences [2022-11-03 02:54:27,797 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-03 02:54:27,797 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [8] total 12 [2022-11-03 02:54:27,797 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [410978559] [2022-11-03 02:54:27,797 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:54:27,798 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-03 02:54:27,798 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:54:27,798 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-03 02:54:27,798 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2022-11-03 02:54:27,798 INFO L87 Difference]: Start difference. First operand 341 states and 414 transitions. Second operand has 6 states, 6 states have (on average 15.666666666666666) internal successors, (94), 6 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:27,971 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:54:27,971 INFO L93 Difference]: Finished difference Result 710 states and 866 transitions. [2022-11-03 02:54:27,972 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-03 02:54:27,972 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 15.666666666666666) internal successors, (94), 6 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 104 [2022-11-03 02:54:27,972 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:54:27,974 INFO L225 Difference]: With dead ends: 710 [2022-11-03 02:54:27,974 INFO L226 Difference]: Without dead ends: 437 [2022-11-03 02:54:27,974 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 215 GetRequests, 200 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=59, Invalid=213, Unknown=0, NotChecked=0, Total=272 [2022-11-03 02:54:27,975 INFO L413 NwaCegarLoop]: 59 mSDtfsCounter, 164 mSDsluCounter, 141 mSDsCounter, 0 mSdLazyCounter, 73 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 164 SdHoareTripleChecker+Valid, 200 SdHoareTripleChecker+Invalid, 77 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 73 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:54:27,975 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [164 Valid, 200 Invalid, 77 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 73 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 02:54:27,976 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 437 states. [2022-11-03 02:54:27,997 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 437 to 329. [2022-11-03 02:54:27,998 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 329 states, 328 states have (on average 1.2134146341463414) internal successors, (398), 328 states have internal predecessors, (398), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:27,998 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 329 states to 329 states and 398 transitions. [2022-11-03 02:54:27,999 INFO L78 Accepts]: Start accepts. Automaton has 329 states and 398 transitions. Word has length 104 [2022-11-03 02:54:27,999 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:54:27,999 INFO L495 AbstractCegarLoop]: Abstraction has 329 states and 398 transitions. [2022-11-03 02:54:27,999 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 15.666666666666666) internal successors, (94), 6 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:27,999 INFO L276 IsEmpty]: Start isEmpty. Operand 329 states and 398 transitions. [2022-11-03 02:54:28,000 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2022-11-03 02:54:28,000 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:54:28,001 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:54:28,014 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (50)] Forceful destruction successful, exit code 0 [2022-11-03 02:54:28,213 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 50 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:54:28,213 INFO L420 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:54:28,214 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:54:28,214 INFO L85 PathProgramCache]: Analyzing trace with hash -2046048001, now seen corresponding path program 3 times [2022-11-03 02:54:28,214 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:54:28,214 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1326405118] [2022-11-03 02:54:28,214 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-03 02:54:28,215 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:54:28,215 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:54:28,215 INFO L229 MonitoredProcess]: Starting monitored process 51 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:54:28,219 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (51)] Waiting until timeout for monitored process [2022-11-03 02:54:28,361 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-11-03 02:54:28,361 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 02:54:28,367 INFO L263 TraceCheckSpWp]: Trace formula consists of 391 conjuncts, 11 conjunts are in the unsatisfiable core [2022-11-03 02:54:28,369 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:54:28,595 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 72 proven. 27 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-11-03 02:54:28,596 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:54:28,700 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 99 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-11-03 02:54:28,701 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:54:28,701 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1326405118] [2022-11-03 02:54:28,701 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1326405118] provided 1 perfect and 1 imperfect interpolant sequences [2022-11-03 02:54:28,701 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-03 02:54:28,701 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [8] total 11 [2022-11-03 02:54:28,701 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [813949805] [2022-11-03 02:54:28,701 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:54:28,702 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-03 02:54:28,702 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:54:28,702 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-03 02:54:28,702 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=84, Unknown=0, NotChecked=0, Total=110 [2022-11-03 02:54:28,703 INFO L87 Difference]: Start difference. First operand 329 states and 398 transitions. Second operand has 7 states, 7 states have (on average 14.285714285714286) internal successors, (100), 7 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:28,916 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:54:28,916 INFO L93 Difference]: Finished difference Result 694 states and 852 transitions. [2022-11-03 02:54:28,917 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-03 02:54:28,917 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 14.285714285714286) internal successors, (100), 7 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 104 [2022-11-03 02:54:28,917 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:54:28,919 INFO L225 Difference]: With dead ends: 694 [2022-11-03 02:54:28,919 INFO L226 Difference]: Without dead ends: 359 [2022-11-03 02:54:28,920 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 219 GetRequests, 203 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=79, Invalid=227, Unknown=0, NotChecked=0, Total=306 [2022-11-03 02:54:28,920 INFO L413 NwaCegarLoop]: 102 mSDtfsCounter, 163 mSDsluCounter, 119 mSDsCounter, 0 mSdLazyCounter, 86 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 163 SdHoareTripleChecker+Valid, 221 SdHoareTripleChecker+Invalid, 88 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 86 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:54:28,921 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [163 Valid, 221 Invalid, 88 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 86 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 02:54:28,921 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 359 states. [2022-11-03 02:54:28,940 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 359 to 246. [2022-11-03 02:54:28,941 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 246 states, 245 states have (on average 1.2) internal successors, (294), 245 states have internal predecessors, (294), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:28,941 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 246 states to 246 states and 294 transitions. [2022-11-03 02:54:28,942 INFO L78 Accepts]: Start accepts. Automaton has 246 states and 294 transitions. Word has length 104 [2022-11-03 02:54:28,942 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:54:28,942 INFO L495 AbstractCegarLoop]: Abstraction has 246 states and 294 transitions. [2022-11-03 02:54:28,942 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 14.285714285714286) internal successors, (100), 7 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:28,943 INFO L276 IsEmpty]: Start isEmpty. Operand 246 states and 294 transitions. [2022-11-03 02:54:28,943 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2022-11-03 02:54:28,943 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:54:28,944 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:54:28,958 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (51)] Forceful destruction successful, exit code 0 [2022-11-03 02:54:29,156 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 51 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:54:29,157 INFO L420 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:54:29,157 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:54:29,157 INFO L85 PathProgramCache]: Analyzing trace with hash -220606871, now seen corresponding path program 2 times [2022-11-03 02:54:29,159 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:54:29,161 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [549662850] [2022-11-03 02:54:29,161 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-03 02:54:29,161 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:54:29,162 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:54:29,162 INFO L229 MonitoredProcess]: Starting monitored process 52 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:54:29,204 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (52)] Waiting until timeout for monitored process [2022-11-03 02:54:29,347 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-03 02:54:29,347 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 02:54:29,356 INFO L263 TraceCheckSpWp]: Trace formula consists of 560 conjuncts, 70 conjunts are in the unsatisfiable core [2022-11-03 02:54:29,359 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:54:30,929 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:54:30,929 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:54:38,537 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:54:38,537 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:54:38,537 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [549662850] [2022-11-03 02:54:38,537 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [549662850] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:54:38,537 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1342648795] [2022-11-03 02:54:38,537 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-03 02:54:38,538 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:54:38,538 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:54:38,538 INFO L229 MonitoredProcess]: Starting monitored process 53 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:54:38,540 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (53)] Waiting until timeout for monitored process [2022-11-03 02:54:38,881 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-03 02:54:38,882 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 02:54:38,890 INFO L263 TraceCheckSpWp]: Trace formula consists of 560 conjuncts, 70 conjunts are in the unsatisfiable core [2022-11-03 02:54:38,893 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:54:39,625 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:54:39,625 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:54:40,660 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:54:40,660 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1342648795] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:54:40,660 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [187985896] [2022-11-03 02:54:40,660 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-03 02:54:40,660 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:54:40,661 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:54:40,661 INFO L229 MonitoredProcess]: Starting monitored process 54 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:54:40,662 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (54)] Waiting until timeout for monitored process [2022-11-03 02:54:40,820 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-03 02:54:40,820 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 02:54:40,825 INFO L263 TraceCheckSpWp]: Trace formula consists of 560 conjuncts, 73 conjunts are in the unsatisfiable core [2022-11-03 02:54:40,827 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:54:41,657 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:54:41,657 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:54:42,980 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:54:42,980 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [187985896] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:54:42,981 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:54:42,981 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34, 34, 34, 35, 35] total 68 [2022-11-03 02:54:42,981 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1035057872] [2022-11-03 02:54:42,981 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:54:42,982 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 68 states [2022-11-03 02:54:42,982 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:54:42,983 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 68 interpolants. [2022-11-03 02:54:42,984 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=191, Invalid=4365, Unknown=0, NotChecked=0, Total=4556 [2022-11-03 02:54:42,984 INFO L87 Difference]: Start difference. First operand 246 states and 294 transitions. Second operand has 68 states, 68 states have (on average 3.088235294117647) internal successors, (210), 68 states have internal predecessors, (210), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:50,277 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:54:50,278 INFO L93 Difference]: Finished difference Result 762 states and 922 transitions. [2022-11-03 02:54:50,278 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 60 states. [2022-11-03 02:54:50,278 INFO L78 Accepts]: Start accepts. Automaton has has 68 states, 68 states have (on average 3.088235294117647) internal successors, (210), 68 states have internal predecessors, (210), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 104 [2022-11-03 02:54:50,278 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:54:50,282 INFO L225 Difference]: With dead ends: 762 [2022-11-03 02:54:50,282 INFO L226 Difference]: Without dead ends: 760 [2022-11-03 02:54:50,285 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 675 GetRequests, 550 SyntacticMatches, 5 SemanticMatches, 120 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2717 ImplicationChecksByTransitivity, 14.2s TimeCoverageRelationStatistics Valid=1066, Invalid=13696, Unknown=0, NotChecked=0, Total=14762 [2022-11-03 02:54:50,286 INFO L413 NwaCegarLoop]: 140 mSDtfsCounter, 1239 mSDsluCounter, 5682 mSDsCounter, 0 mSdLazyCounter, 1046 mSolverCounterSat, 31 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1239 SdHoareTripleChecker+Valid, 5822 SdHoareTripleChecker+Invalid, 3930 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 31 IncrementalHoareTripleChecker+Valid, 1046 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 2853 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2022-11-03 02:54:50,286 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1239 Valid, 5822 Invalid, 3930 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [31 Valid, 1046 Invalid, 0 Unknown, 2853 Unchecked, 1.0s Time] [2022-11-03 02:54:50,287 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 760 states. [2022-11-03 02:54:50,315 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 760 to 314. [2022-11-03 02:54:50,315 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 314 states, 313 states have (on average 1.1980830670926517) internal successors, (375), 313 states have internal predecessors, (375), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:50,316 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 314 states to 314 states and 375 transitions. [2022-11-03 02:54:50,316 INFO L78 Accepts]: Start accepts. Automaton has 314 states and 375 transitions. Word has length 104 [2022-11-03 02:54:50,317 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:54:50,317 INFO L495 AbstractCegarLoop]: Abstraction has 314 states and 375 transitions. [2022-11-03 02:54:50,317 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 68 states, 68 states have (on average 3.088235294117647) internal successors, (210), 68 states have internal predecessors, (210), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:50,317 INFO L276 IsEmpty]: Start isEmpty. Operand 314 states and 375 transitions. [2022-11-03 02:54:50,318 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2022-11-03 02:54:50,318 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:54:50,319 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:54:50,327 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (53)] Forceful destruction successful, exit code 0 [2022-11-03 02:54:50,543 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (54)] Ended with exit code 0 [2022-11-03 02:54:50,732 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (52)] Forceful destruction successful, exit code 0 [2022-11-03 02:54:50,922 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 53 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,54 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,52 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:54:50,923 INFO L420 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:54:50,923 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:54:50,923 INFO L85 PathProgramCache]: Analyzing trace with hash -922206745, now seen corresponding path program 1 times [2022-11-03 02:54:50,923 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:54:50,923 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [407280401] [2022-11-03 02:54:50,923 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:54:50,924 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:54:50,924 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:54:50,925 INFO L229 MonitoredProcess]: Starting monitored process 55 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:54:50,963 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (55)] Waiting until timeout for monitored process [2022-11-03 02:54:51,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:54:51,111 INFO L263 TraceCheckSpWp]: Trace formula consists of 560 conjuncts, 14 conjunts are in the unsatisfiable core [2022-11-03 02:54:51,113 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:54:51,394 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 60 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:54:51,394 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:54:51,657 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 60 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:54:51,657 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:54:51,657 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [407280401] [2022-11-03 02:54:51,657 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [407280401] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:54:51,658 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [82167700] [2022-11-03 02:54:51,658 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:54:51,658 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:54:51,658 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:54:51,659 INFO L229 MonitoredProcess]: Starting monitored process 56 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:54:51,661 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (56)] Waiting until timeout for monitored process [2022-11-03 02:54:52,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:54:52,077 INFO L263 TraceCheckSpWp]: Trace formula consists of 560 conjuncts, 14 conjunts are in the unsatisfiable core [2022-11-03 02:54:52,084 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:54:52,279 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 60 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:54:52,279 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:54:52,413 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 60 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:54:52,414 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [82167700] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:54:52,414 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [282767320] [2022-11-03 02:54:52,414 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:54:52,414 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:54:52,414 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:54:52,423 INFO L229 MonitoredProcess]: Starting monitored process 57 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:54:52,442 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (57)] Waiting until timeout for monitored process [2022-11-03 02:54:52,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:54:52,630 INFO L263 TraceCheckSpWp]: Trace formula consists of 560 conjuncts, 14 conjunts are in the unsatisfiable core [2022-11-03 02:54:52,633 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:54:52,845 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 60 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:54:52,845 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:54:52,963 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 60 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:54:52,963 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [282767320] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:54:52,963 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:54:52,963 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12, 12] total 19 [2022-11-03 02:54:52,964 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2049891569] [2022-11-03 02:54:52,964 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:54:52,964 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-11-03 02:54:52,965 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:54:52,965 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-11-03 02:54:52,965 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=300, Unknown=0, NotChecked=0, Total=342 [2022-11-03 02:54:52,965 INFO L87 Difference]: Start difference. First operand 314 states and 375 transitions. Second operand has 19 states, 19 states have (on average 8.368421052631579) internal successors, (159), 19 states have internal predecessors, (159), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:54,029 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:54:54,029 INFO L93 Difference]: Finished difference Result 1497 states and 1793 transitions. [2022-11-03 02:54:54,030 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2022-11-03 02:54:54,030 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 8.368421052631579) internal successors, (159), 19 states have internal predecessors, (159), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 104 [2022-11-03 02:54:54,031 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:54:54,033 INFO L225 Difference]: With dead ends: 1497 [2022-11-03 02:54:54,033 INFO L226 Difference]: Without dead ends: 1285 [2022-11-03 02:54:54,034 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 654 GetRequests, 601 SyntacticMatches, 0 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 680 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=647, Invalid=2323, Unknown=0, NotChecked=0, Total=2970 [2022-11-03 02:54:54,034 INFO L413 NwaCegarLoop]: 95 mSDtfsCounter, 1635 mSDsluCounter, 961 mSDsCounter, 0 mSdLazyCounter, 307 mSolverCounterSat, 92 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1635 SdHoareTripleChecker+Valid, 1056 SdHoareTripleChecker+Invalid, 399 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 92 IncrementalHoareTripleChecker+Valid, 307 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-03 02:54:54,035 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1635 Valid, 1056 Invalid, 399 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [92 Valid, 307 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-11-03 02:54:54,035 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1285 states. [2022-11-03 02:54:54,074 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1285 to 421. [2022-11-03 02:54:54,075 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 421 states, 420 states have (on average 1.1857142857142857) internal successors, (498), 420 states have internal predecessors, (498), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:54,076 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 421 states to 421 states and 498 transitions. [2022-11-03 02:54:54,076 INFO L78 Accepts]: Start accepts. Automaton has 421 states and 498 transitions. Word has length 104 [2022-11-03 02:54:54,076 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:54:54,077 INFO L495 AbstractCegarLoop]: Abstraction has 421 states and 498 transitions. [2022-11-03 02:54:54,077 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 8.368421052631579) internal successors, (159), 19 states have internal predecessors, (159), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:54,077 INFO L276 IsEmpty]: Start isEmpty. Operand 421 states and 498 transitions. [2022-11-03 02:54:54,078 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2022-11-03 02:54:54,078 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:54:54,078 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:54:54,087 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (56)] Forceful destruction successful, exit code 0 [2022-11-03 02:54:54,303 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (57)] Ended with exit code 0 [2022-11-03 02:54:54,490 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (55)] Ended with exit code 0 [2022-11-03 02:54:54,682 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 56 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,57 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,55 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:54:54,682 INFO L420 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:54:54,683 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:54:54,683 INFO L85 PathProgramCache]: Analyzing trace with hash -2131649429, now seen corresponding path program 1 times [2022-11-03 02:54:54,683 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:54:54,683 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [310161717] [2022-11-03 02:54:54,683 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:54:54,683 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:54:54,684 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:54:54,684 INFO L229 MonitoredProcess]: Starting monitored process 58 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:54:54,688 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (58)] Waiting until timeout for monitored process [2022-11-03 02:54:54,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:54:54,859 INFO L263 TraceCheckSpWp]: Trace formula consists of 560 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-03 02:54:54,861 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:54:54,921 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 62 proven. 0 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2022-11-03 02:54:54,921 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:54:54,921 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:54:54,922 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [310161717] [2022-11-03 02:54:54,922 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [310161717] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:54:54,922 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:54:54,922 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-03 02:54:54,922 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [676461462] [2022-11-03 02:54:54,922 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:54:54,923 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-03 02:54:54,923 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:54:54,923 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-03 02:54:54,923 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-03 02:54:54,924 INFO L87 Difference]: Start difference. First operand 421 states and 498 transitions. Second operand has 5 states, 5 states have (on average 13.8) internal successors, (69), 5 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:55,029 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:54:55,030 INFO L93 Difference]: Finished difference Result 887 states and 1055 transitions. [2022-11-03 02:54:55,030 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-03 02:54:55,030 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 13.8) internal successors, (69), 5 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 104 [2022-11-03 02:54:55,030 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:54:55,033 INFO L225 Difference]: With dead ends: 887 [2022-11-03 02:54:55,033 INFO L226 Difference]: Without dead ends: 589 [2022-11-03 02:54:55,034 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 107 GetRequests, 101 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2022-11-03 02:54:55,034 INFO L413 NwaCegarLoop]: 84 mSDtfsCounter, 165 mSDsluCounter, 116 mSDsCounter, 0 mSdLazyCounter, 24 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 165 SdHoareTripleChecker+Valid, 200 SdHoareTripleChecker+Invalid, 24 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 24 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 02:54:55,034 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [165 Valid, 200 Invalid, 24 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 24 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-03 02:54:55,035 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 589 states. [2022-11-03 02:54:55,060 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 589 to 421. [2022-11-03 02:54:55,061 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 421 states, 420 states have (on average 1.1714285714285715) internal successors, (492), 420 states have internal predecessors, (492), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:55,062 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 421 states to 421 states and 492 transitions. [2022-11-03 02:54:55,062 INFO L78 Accepts]: Start accepts. Automaton has 421 states and 492 transitions. Word has length 104 [2022-11-03 02:54:55,062 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:54:55,062 INFO L495 AbstractCegarLoop]: Abstraction has 421 states and 492 transitions. [2022-11-03 02:54:55,062 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 13.8) internal successors, (69), 5 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:55,063 INFO L276 IsEmpty]: Start isEmpty. Operand 421 states and 492 transitions. [2022-11-03 02:54:55,064 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2022-11-03 02:54:55,064 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:54:55,064 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:54:55,082 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (58)] Forceful destruction successful, exit code 0 [2022-11-03 02:54:55,277 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 58 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:54:55,278 INFO L420 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:54:55,278 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:54:55,278 INFO L85 PathProgramCache]: Analyzing trace with hash -1508482967, now seen corresponding path program 1 times [2022-11-03 02:54:55,278 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:54:55,278 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1518665660] [2022-11-03 02:54:55,279 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:54:55,279 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:54:55,279 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:54:55,280 INFO L229 MonitoredProcess]: Starting monitored process 59 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:54:55,281 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (59)] Waiting until timeout for monitored process [2022-11-03 02:54:55,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:54:55,455 INFO L263 TraceCheckSpWp]: Trace formula consists of 560 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 02:54:55,456 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:54:55,559 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 34 proven. 0 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2022-11-03 02:54:55,560 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:54:55,560 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:54:55,560 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1518665660] [2022-11-03 02:54:55,560 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1518665660] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:54:55,560 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:54:55,561 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-11-03 02:54:55,561 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [24580788] [2022-11-03 02:54:55,561 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:54:55,561 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-03 02:54:55,561 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:54:55,562 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-03 02:54:55,562 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-11-03 02:54:55,562 INFO L87 Difference]: Start difference. First operand 421 states and 492 transitions. Second operand has 8 states, 8 states have (on average 7.5) internal successors, (60), 8 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:55,692 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:54:55,692 INFO L93 Difference]: Finished difference Result 848 states and 994 transitions. [2022-11-03 02:54:55,693 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-03 02:54:55,693 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 7.5) internal successors, (60), 8 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 104 [2022-11-03 02:54:55,693 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:54:55,694 INFO L225 Difference]: With dead ends: 848 [2022-11-03 02:54:55,694 INFO L226 Difference]: Without dead ends: 482 [2022-11-03 02:54:55,695 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 107 GetRequests, 97 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2022-11-03 02:54:55,695 INFO L413 NwaCegarLoop]: 57 mSDtfsCounter, 102 mSDsluCounter, 281 mSDsCounter, 0 mSdLazyCounter, 61 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 102 SdHoareTripleChecker+Valid, 338 SdHoareTripleChecker+Invalid, 83 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 61 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 20 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:54:55,695 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [102 Valid, 338 Invalid, 83 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 61 Invalid, 0 Unknown, 20 Unchecked, 0.1s Time] [2022-11-03 02:54:55,696 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 482 states. [2022-11-03 02:54:55,724 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 482 to 375. [2022-11-03 02:54:55,724 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 375 states, 374 states have (on average 1.1764705882352942) internal successors, (440), 374 states have internal predecessors, (440), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:55,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 375 states to 375 states and 440 transitions. [2022-11-03 02:54:55,725 INFO L78 Accepts]: Start accepts. Automaton has 375 states and 440 transitions. Word has length 104 [2022-11-03 02:54:55,725 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:54:55,726 INFO L495 AbstractCegarLoop]: Abstraction has 375 states and 440 transitions. [2022-11-03 02:54:55,726 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 7.5) internal successors, (60), 8 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:55,726 INFO L276 IsEmpty]: Start isEmpty. Operand 375 states and 440 transitions. [2022-11-03 02:54:55,727 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2022-11-03 02:54:55,727 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:54:55,727 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:54:55,741 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (59)] Forceful destruction successful, exit code 0 [2022-11-03 02:54:55,940 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 59 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:54:55,940 INFO L420 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:54:55,941 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:54:55,941 INFO L85 PathProgramCache]: Analyzing trace with hash -991340437, now seen corresponding path program 1 times [2022-11-03 02:54:55,941 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:54:55,941 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1947242891] [2022-11-03 02:54:55,941 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:54:55,942 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:54:55,942 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:54:55,942 INFO L229 MonitoredProcess]: Starting monitored process 60 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:54:55,943 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (60)] Waiting until timeout for monitored process [2022-11-03 02:54:56,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:54:56,111 INFO L263 TraceCheckSpWp]: Trace formula consists of 560 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 02:54:56,113 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:54:56,215 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 30 proven. 0 refuted. 0 times theorem prover too weak. 75 trivial. 0 not checked. [2022-11-03 02:54:56,215 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:54:56,215 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:54:56,215 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1947242891] [2022-11-03 02:54:56,216 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1947242891] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:54:56,216 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:54:56,216 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-11-03 02:54:56,216 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [88571104] [2022-11-03 02:54:56,216 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:54:56,216 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-03 02:54:56,216 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:54:56,217 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-03 02:54:56,217 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-11-03 02:54:56,217 INFO L87 Difference]: Start difference. First operand 375 states and 440 transitions. Second operand has 8 states, 8 states have (on average 7.25) internal successors, (58), 8 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:56,346 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:54:56,346 INFO L93 Difference]: Finished difference Result 770 states and 899 transitions. [2022-11-03 02:54:56,346 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-03 02:54:56,346 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 7.25) internal successors, (58), 8 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 104 [2022-11-03 02:54:56,346 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:54:56,349 INFO L225 Difference]: With dead ends: 770 [2022-11-03 02:54:56,349 INFO L226 Difference]: Without dead ends: 468 [2022-11-03 02:54:56,349 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 107 GetRequests, 97 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2022-11-03 02:54:56,350 INFO L413 NwaCegarLoop]: 54 mSDtfsCounter, 101 mSDsluCounter, 305 mSDsCounter, 0 mSdLazyCounter, 59 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 101 SdHoareTripleChecker+Valid, 359 SdHoareTripleChecker+Invalid, 87 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 59 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 26 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:54:56,350 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [101 Valid, 359 Invalid, 87 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 59 Invalid, 0 Unknown, 26 Unchecked, 0.1s Time] [2022-11-03 02:54:56,351 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 468 states. [2022-11-03 02:54:56,381 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 468 to 375. [2022-11-03 02:54:56,381 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 375 states, 374 states have (on average 1.1684491978609626) internal successors, (437), 374 states have internal predecessors, (437), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:56,382 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 375 states to 375 states and 437 transitions. [2022-11-03 02:54:56,382 INFO L78 Accepts]: Start accepts. Automaton has 375 states and 437 transitions. Word has length 104 [2022-11-03 02:54:56,382 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:54:56,383 INFO L495 AbstractCegarLoop]: Abstraction has 375 states and 437 transitions. [2022-11-03 02:54:56,383 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 7.25) internal successors, (58), 8 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:56,383 INFO L276 IsEmpty]: Start isEmpty. Operand 375 states and 437 transitions. [2022-11-03 02:54:56,384 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2022-11-03 02:54:56,384 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:54:56,384 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:54:56,402 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (60)] Forceful destruction successful, exit code 0 [2022-11-03 02:54:56,597 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 60 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:54:56,597 INFO L420 AbstractCegarLoop]: === Iteration 41 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:54:56,597 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:54:56,598 INFO L85 PathProgramCache]: Analyzing trace with hash 2133778411, now seen corresponding path program 1 times [2022-11-03 02:54:56,598 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:54:56,598 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1978851536] [2022-11-03 02:54:56,598 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:54:56,598 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:54:56,598 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:54:56,599 INFO L229 MonitoredProcess]: Starting monitored process 61 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:54:56,600 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (61)] Waiting until timeout for monitored process [2022-11-03 02:54:56,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:54:56,766 INFO L263 TraceCheckSpWp]: Trace formula consists of 560 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 02:54:56,768 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:54:56,868 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 79 trivial. 0 not checked. [2022-11-03 02:54:56,868 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:54:56,868 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:54:56,868 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1978851536] [2022-11-03 02:54:56,868 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1978851536] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:54:56,868 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:54:56,868 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-11-03 02:54:56,868 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [537951944] [2022-11-03 02:54:56,869 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:54:56,869 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-03 02:54:56,869 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:54:56,869 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-03 02:54:56,869 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-11-03 02:54:56,870 INFO L87 Difference]: Start difference. First operand 375 states and 437 transitions. Second operand has 8 states, 8 states have (on average 7.125) internal successors, (57), 8 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:56,985 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:54:56,985 INFO L93 Difference]: Finished difference Result 728 states and 847 transitions. [2022-11-03 02:54:56,986 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-03 02:54:56,986 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 7.125) internal successors, (57), 8 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 104 [2022-11-03 02:54:56,986 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:54:56,988 INFO L225 Difference]: With dead ends: 728 [2022-11-03 02:54:56,988 INFO L226 Difference]: Without dead ends: 422 [2022-11-03 02:54:56,988 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 107 GetRequests, 97 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2022-11-03 02:54:56,989 INFO L413 NwaCegarLoop]: 51 mSDtfsCounter, 132 mSDsluCounter, 241 mSDsCounter, 0 mSdLazyCounter, 53 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 132 SdHoareTripleChecker+Valid, 292 SdHoareTripleChecker+Invalid, 82 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 53 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 27 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:54:56,989 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [132 Valid, 292 Invalid, 82 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 53 Invalid, 0 Unknown, 27 Unchecked, 0.1s Time] [2022-11-03 02:54:56,989 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 422 states. [2022-11-03 02:54:57,019 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 422 to 371. [2022-11-03 02:54:57,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 371 states, 370 states have (on average 1.164864864864865) internal successors, (431), 370 states have internal predecessors, (431), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:57,020 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 371 states to 371 states and 431 transitions. [2022-11-03 02:54:57,021 INFO L78 Accepts]: Start accepts. Automaton has 371 states and 431 transitions. Word has length 104 [2022-11-03 02:54:57,021 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:54:57,021 INFO L495 AbstractCegarLoop]: Abstraction has 371 states and 431 transitions. [2022-11-03 02:54:57,021 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 7.125) internal successors, (57), 8 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:57,021 INFO L276 IsEmpty]: Start isEmpty. Operand 371 states and 431 transitions. [2022-11-03 02:54:57,022 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2022-11-03 02:54:57,022 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:54:57,022 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:54:57,039 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (61)] Ended with exit code 0 [2022-11-03 02:54:57,222 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 61 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:54:57,223 INFO L420 AbstractCegarLoop]: === Iteration 42 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:54:57,223 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:54:57,223 INFO L85 PathProgramCache]: Analyzing trace with hash 1251689389, now seen corresponding path program 1 times [2022-11-03 02:54:57,223 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:54:57,224 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1666445552] [2022-11-03 02:54:57,224 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:54:57,224 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:54:57,224 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:54:57,225 INFO L229 MonitoredProcess]: Starting monitored process 62 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:54:57,226 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (62)] Waiting until timeout for monitored process [2022-11-03 02:54:57,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:54:57,396 INFO L263 TraceCheckSpWp]: Trace formula consists of 560 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 02:54:57,398 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:54:57,515 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 83 trivial. 0 not checked. [2022-11-03 02:54:57,515 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:54:57,515 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:54:57,515 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1666445552] [2022-11-03 02:54:57,515 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1666445552] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:54:57,516 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:54:57,516 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-11-03 02:54:57,516 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [792487186] [2022-11-03 02:54:57,516 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:54:57,516 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-03 02:54:57,517 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:54:57,517 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-03 02:54:57,517 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-11-03 02:54:57,517 INFO L87 Difference]: Start difference. First operand 371 states and 431 transitions. Second operand has 8 states, 8 states have (on average 7.0) internal successors, (56), 8 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:57,650 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:54:57,650 INFO L93 Difference]: Finished difference Result 679 states and 791 transitions. [2022-11-03 02:54:57,650 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-03 02:54:57,651 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 7.0) internal successors, (56), 8 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 104 [2022-11-03 02:54:57,651 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:54:57,652 INFO L225 Difference]: With dead ends: 679 [2022-11-03 02:54:57,652 INFO L226 Difference]: Without dead ends: 375 [2022-11-03 02:54:57,652 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 107 GetRequests, 97 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2022-11-03 02:54:57,653 INFO L413 NwaCegarLoop]: 48 mSDtfsCounter, 99 mSDsluCounter, 257 mSDsCounter, 0 mSdLazyCounter, 55 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 99 SdHoareTripleChecker+Valid, 305 SdHoareTripleChecker+Invalid, 78 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 55 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 21 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:54:57,653 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [99 Valid, 305 Invalid, 78 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 55 Invalid, 0 Unknown, 21 Unchecked, 0.1s Time] [2022-11-03 02:54:57,654 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 375 states. [2022-11-03 02:54:57,682 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 375 to 365. [2022-11-03 02:54:57,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 365 states, 364 states have (on average 1.164835164835165) internal successors, (424), 364 states have internal predecessors, (424), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:57,684 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 365 states to 365 states and 424 transitions. [2022-11-03 02:54:57,684 INFO L78 Accepts]: Start accepts. Automaton has 365 states and 424 transitions. Word has length 104 [2022-11-03 02:54:57,684 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:54:57,684 INFO L495 AbstractCegarLoop]: Abstraction has 365 states and 424 transitions. [2022-11-03 02:54:57,684 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 7.0) internal successors, (56), 8 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:57,684 INFO L276 IsEmpty]: Start isEmpty. Operand 365 states and 424 transitions. [2022-11-03 02:54:57,685 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2022-11-03 02:54:57,685 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:54:57,686 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1] [2022-11-03 02:54:57,706 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (62)] Forceful destruction successful, exit code 0 [2022-11-03 02:54:57,898 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 62 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:54:57,899 INFO L420 AbstractCegarLoop]: === Iteration 43 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:54:57,899 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:54:57,899 INFO L85 PathProgramCache]: Analyzing trace with hash 899709249, now seen corresponding path program 2 times [2022-11-03 02:54:57,899 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:54:57,899 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1069061951] [2022-11-03 02:54:57,899 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-03 02:54:57,899 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:54:57,900 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:54:57,900 INFO L229 MonitoredProcess]: Starting monitored process 63 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:54:57,902 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (63)] Waiting until timeout for monitored process [2022-11-03 02:54:58,067 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-03 02:54:58,067 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 02:54:58,075 INFO L263 TraceCheckSpWp]: Trace formula consists of 560 conjuncts, 16 conjunts are in the unsatisfiable core [2022-11-03 02:54:58,077 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:54:58,687 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 61 proven. 44 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:54:58,687 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:54:59,111 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 62 proven. 43 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:54:59,111 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:54:59,111 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1069061951] [2022-11-03 02:54:59,111 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1069061951] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:54:59,111 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [137502464] [2022-11-03 02:54:59,111 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-03 02:54:59,111 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:54:59,112 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:54:59,112 INFO L229 MonitoredProcess]: Starting monitored process 64 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:54:59,114 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (64)] Waiting until timeout for monitored process [2022-11-03 02:54:59,443 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-03 02:54:59,444 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 02:54:59,450 INFO L263 TraceCheckSpWp]: Trace formula consists of 560 conjuncts, 16 conjunts are in the unsatisfiable core [2022-11-03 02:54:59,451 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:54:59,850 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 61 proven. 44 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:54:59,851 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:55:00,040 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 62 proven. 43 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:55:00,040 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [137502464] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:55:00,040 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1509768843] [2022-11-03 02:55:00,040 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-03 02:55:00,040 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:55:00,041 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:55:00,042 INFO L229 MonitoredProcess]: Starting monitored process 65 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:55:00,058 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (65)] Waiting until timeout for monitored process [2022-11-03 02:55:00,232 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-03 02:55:00,232 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 02:55:00,235 INFO L263 TraceCheckSpWp]: Trace formula consists of 560 conjuncts, 16 conjunts are in the unsatisfiable core [2022-11-03 02:55:00,237 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:55:00,613 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 61 proven. 44 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:55:00,613 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:55:00,802 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 62 proven. 43 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:55:00,803 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1509768843] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:55:00,803 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:55:00,803 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 14, 15, 14, 15, 14] total 27 [2022-11-03 02:55:00,803 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1252152286] [2022-11-03 02:55:00,803 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:55:00,804 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2022-11-03 02:55:00,804 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:55:00,805 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2022-11-03 02:55:00,805 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=82, Invalid=620, Unknown=0, NotChecked=0, Total=702 [2022-11-03 02:55:00,805 INFO L87 Difference]: Start difference. First operand 365 states and 424 transitions. Second operand has 27 states, 27 states have (on average 6.555555555555555) internal successors, (177), 27 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:55:02,031 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:55:02,031 INFO L93 Difference]: Finished difference Result 1399 states and 1627 transitions. [2022-11-03 02:55:02,031 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2022-11-03 02:55:02,032 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 27 states have (on average 6.555555555555555) internal successors, (177), 27 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 104 [2022-11-03 02:55:02,032 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:55:02,034 INFO L225 Difference]: With dead ends: 1399 [2022-11-03 02:55:02,034 INFO L226 Difference]: Without dead ends: 1101 [2022-11-03 02:55:02,036 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 654 GetRequests, 596 SyntacticMatches, 2 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 815 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=418, Invalid=2888, Unknown=0, NotChecked=0, Total=3306 [2022-11-03 02:55:02,037 INFO L413 NwaCegarLoop]: 130 mSDtfsCounter, 268 mSDsluCounter, 1988 mSDsCounter, 0 mSdLazyCounter, 136 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 268 SdHoareTripleChecker+Valid, 2118 SdHoareTripleChecker+Invalid, 296 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 136 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 159 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-03 02:55:02,037 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [268 Valid, 2118 Invalid, 296 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 136 Invalid, 0 Unknown, 159 Unchecked, 0.2s Time] [2022-11-03 02:55:02,038 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1101 states. [2022-11-03 02:55:02,087 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1101 to 577. [2022-11-03 02:55:02,088 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 577 states, 576 states have (on average 1.1701388888888888) internal successors, (674), 576 states have internal predecessors, (674), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:55:02,089 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 577 states to 577 states and 674 transitions. [2022-11-03 02:55:02,089 INFO L78 Accepts]: Start accepts. Automaton has 577 states and 674 transitions. Word has length 104 [2022-11-03 02:55:02,089 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:55:02,089 INFO L495 AbstractCegarLoop]: Abstraction has 577 states and 674 transitions. [2022-11-03 02:55:02,090 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 27 states have (on average 6.555555555555555) internal successors, (177), 27 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:55:02,090 INFO L276 IsEmpty]: Start isEmpty. Operand 577 states and 674 transitions. [2022-11-03 02:55:02,091 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2022-11-03 02:55:02,091 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:55:02,091 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1] [2022-11-03 02:55:02,098 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (64)] Forceful destruction successful, exit code 0 [2022-11-03 02:55:02,304 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (63)] Ended with exit code 0 [2022-11-03 02:55:02,517 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (65)] Ended with exit code 0 [2022-11-03 02:55:02,696 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 64 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,63 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,65 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:55:02,697 INFO L420 AbstractCegarLoop]: === Iteration 44 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:55:02,697 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:55:02,697 INFO L85 PathProgramCache]: Analyzing trace with hash 198109375, now seen corresponding path program 2 times [2022-11-03 02:55:02,697 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:55:02,697 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1664008064] [2022-11-03 02:55:02,697 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-03 02:55:02,698 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:55:02,698 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:55:02,698 INFO L229 MonitoredProcess]: Starting monitored process 66 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:55:02,699 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (66)] Waiting until timeout for monitored process [2022-11-03 02:55:02,864 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-03 02:55:02,864 INFO L229 tOrderPrioritization]: Conjunction of SSA is sat [2022-11-03 02:55:02,864 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-03 02:55:02,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-03 02:55:03,242 INFO L130 FreeRefinementEngine]: Strategy WALRUS found a feasible trace [2022-11-03 02:55:03,242 INFO L359 BasicCegarLoop]: Counterexample is feasible [2022-11-03 02:55:03,243 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-11-03 02:55:03,259 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (66)] Forceful destruction successful, exit code 0 [2022-11-03 02:55:03,459 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 66 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:55:03,461 INFO L444 BasicCegarLoop]: Path program histogram: [3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:55:03,465 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-03 02:55:03,651 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 02:55:03,651 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 02:55:03,652 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 02:55:03,652 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 02:55:03,699 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 03.11 02:55:03 BoogieIcfgContainer [2022-11-03 02:55:03,699 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-03 02:55:03,700 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-03 02:55:03,700 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-03 02:55:03,700 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-03 02:55:03,700 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 02:53:28" (3/4) ... [2022-11-03 02:55:03,702 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2022-11-03 02:55:03,817 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 02:55:03,818 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 02:55:03,818 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 02:55:03,818 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 02:55:03,985 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/witness.graphml [2022-11-03 02:55:03,985 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-03 02:55:03,985 INFO L158 Benchmark]: Toolchain (without parser) took 97069.12ms. Allocated memory was 56.6MB in the beginning and 302.0MB in the end (delta: 245.4MB). Free memory was 33.9MB in the beginning and 231.6MB in the end (delta: -197.7MB). Peak memory consumption was 191.4MB. Max. memory is 16.1GB. [2022-11-03 02:55:03,986 INFO L158 Benchmark]: CDTParser took 0.23ms. Allocated memory is still 56.6MB. Free memory was 36.7MB in the beginning and 36.7MB in the end (delta: 30.8kB). There was no memory consumed. Max. memory is 16.1GB. [2022-11-03 02:55:03,986 INFO L158 Benchmark]: CACSL2BoogieTranslator took 425.79ms. Allocated memory is still 56.6MB. Free memory was 33.8MB in the beginning and 37.0MB in the end (delta: -3.2MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. [2022-11-03 02:55:03,986 INFO L158 Benchmark]: Boogie Procedure Inliner took 72.43ms. Allocated memory is still 56.6MB. Free memory was 37.0MB in the beginning and 34.4MB in the end (delta: 2.6MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-11-03 02:55:03,986 INFO L158 Benchmark]: Boogie Preprocessor took 66.01ms. Allocated memory is still 56.6MB. Free memory was 34.4MB in the beginning and 32.4MB in the end (delta: 2.0MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-11-03 02:55:03,987 INFO L158 Benchmark]: RCFGBuilder took 792.79ms. Allocated memory was 56.6MB in the beginning and 69.2MB in the end (delta: 12.6MB). Free memory was 32.4MB in the beginning and 38.1MB in the end (delta: -5.7MB). Peak memory consumption was 14.7MB. Max. memory is 16.1GB. [2022-11-03 02:55:03,987 INFO L158 Benchmark]: TraceAbstraction took 95417.01ms. Allocated memory was 69.2MB in the beginning and 302.0MB in the end (delta: 232.8MB). Free memory was 37.3MB in the beginning and 107.7MB in the end (delta: -70.4MB). Peak memory consumption was 161.6MB. Max. memory is 16.1GB. [2022-11-03 02:55:03,987 INFO L158 Benchmark]: Witness Printer took 285.47ms. Allocated memory is still 302.0MB. Free memory was 107.7MB in the beginning and 231.6MB in the end (delta: -123.8MB). Peak memory consumption was 21.9MB. Max. memory is 16.1GB. [2022-11-03 02:55:03,994 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.23ms. Allocated memory is still 56.6MB. Free memory was 36.7MB in the beginning and 36.7MB in the end (delta: 30.8kB). There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 425.79ms. Allocated memory is still 56.6MB. Free memory was 33.8MB in the beginning and 37.0MB in the end (delta: -3.2MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 72.43ms. Allocated memory is still 56.6MB. Free memory was 37.0MB in the beginning and 34.4MB in the end (delta: 2.6MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * Boogie Preprocessor took 66.01ms. Allocated memory is still 56.6MB. Free memory was 34.4MB in the beginning and 32.4MB in the end (delta: 2.0MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * RCFGBuilder took 792.79ms. Allocated memory was 56.6MB in the beginning and 69.2MB in the end (delta: 12.6MB). Free memory was 32.4MB in the beginning and 38.1MB in the end (delta: -5.7MB). Peak memory consumption was 14.7MB. Max. memory is 16.1GB. * TraceAbstraction took 95417.01ms. Allocated memory was 69.2MB in the beginning and 302.0MB in the end (delta: 232.8MB). Free memory was 37.3MB in the beginning and 107.7MB in the end (delta: -70.4MB). Peak memory consumption was 161.6MB. Max. memory is 16.1GB. * Witness Printer took 285.47ms. Allocated memory is still 302.0MB. Free memory was 107.7MB in the beginning and 231.6MB in the end (delta: -123.8MB). Peak memory consumption was 21.9MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 20]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L25] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 8); [L26] const SORT_1 msb_SORT_1 = (SORT_1)1 << (8 - 1); [L28] const SORT_5 mask_SORT_5 = (SORT_5)-1 >> (sizeof(SORT_5) * 8 - 1); [L29] const SORT_5 msb_SORT_5 = (SORT_5)1 << (1 - 1); [L31] const SORT_1 var_9 = 0; [L32] const SORT_5 var_17 = 1; [L33] const SORT_5 var_29 = 0; [L34] const SORT_1 var_75 = 1; [L36] SORT_1 input_2; [L37] SORT_1 input_3; [L38] SORT_1 input_4; [L39] SORT_5 input_6; [L40] SORT_5 input_7; [L41] SORT_5 input_8; [L42] SORT_5 input_27; [L44] SORT_1 state_10 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L45] SORT_1 state_12 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L46] SORT_1 state_21 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L47] SORT_1 state_23 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L48] SORT_1 state_25 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L49] SORT_5 state_30 = __VERIFIER_nondet_uchar() & mask_SORT_5; [L50] SORT_1 state_32 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L51] SORT_5 state_34 = __VERIFIER_nondet_uchar() & mask_SORT_5; [L52] SORT_1 state_36 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L53] SORT_1 state_39 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L54] SORT_1 state_41 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L56] SORT_1 init_11_arg_1 = var_9; [L57] state_10 = init_11_arg_1 [L58] SORT_1 init_13_arg_1 = var_9; [L59] state_12 = init_13_arg_1 [L60] SORT_1 init_22_arg_1 = var_9; [L61] state_21 = init_22_arg_1 [L62] SORT_1 init_24_arg_1 = var_9; [L63] state_23 = init_24_arg_1 [L64] SORT_1 init_26_arg_1 = var_9; [L65] state_25 = init_26_arg_1 [L66] SORT_5 init_31_arg_1 = var_29; [L67] state_30 = init_31_arg_1 [L68] SORT_1 init_33_arg_1 = var_9; [L69] state_32 = init_33_arg_1 [L70] SORT_5 init_35_arg_1 = var_29; [L71] state_34 = init_35_arg_1 [L72] SORT_1 init_37_arg_1 = var_9; [L73] state_36 = init_37_arg_1 [L74] SORT_1 init_40_arg_1 = var_9; [L75] state_39 = init_40_arg_1 [L76] SORT_1 init_42_arg_1 = var_9; [L77] state_41 = init_42_arg_1 VAL [init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, state_10=0, state_12=0, state_21=0, state_23=0, state_25=0, state_30=0, state_32=0, state_34=0, state_36=0, state_39=0, state_41=0, var_17=1, var_29=0, var_75=1, var_9=0] [L80] input_2 = __VERIFIER_nondet_uchar() [L81] input_3 = __VERIFIER_nondet_uchar() [L82] input_4 = __VERIFIER_nondet_uchar() [L83] input_6 = __VERIFIER_nondet_uchar() [L84] input_7 = __VERIFIER_nondet_uchar() [L85] input_7 = input_7 & mask_SORT_5 [L86] input_8 = __VERIFIER_nondet_uchar() [L87] input_8 = input_8 & mask_SORT_5 [L88] input_27 = __VERIFIER_nondet_uchar() [L91] SORT_1 var_14_arg_0 = state_10; [L92] SORT_1 var_14_arg_1 = state_12; [L93] SORT_5 var_14 = var_14_arg_0 == var_14_arg_1; [L94] SORT_5 var_18_arg_0 = var_14; [L95] SORT_5 var_18 = ~var_18_arg_0; [L96] SORT_5 var_19_arg_0 = var_17; [L97] SORT_5 var_19_arg_1 = var_18; [L98] SORT_5 var_19 = var_19_arg_0 & var_19_arg_1; [L99] var_19 = var_19 & mask_SORT_5 [L100] SORT_5 bad_20_arg_0 = var_19; [L101] CALL __VERIFIER_assert(!(bad_20_arg_0)) [L20] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L101] RET __VERIFIER_assert(!(bad_20_arg_0)) [L103] SORT_5 var_52_arg_0 = input_8; [L104] SORT_5 var_52_arg_1 = var_17; [L105] SORT_5 var_52 = var_52_arg_0 == var_52_arg_1; [L106] SORT_5 var_53_arg_0 = var_52; [L107] SORT_1 var_53_arg_1 = var_9; [L108] SORT_1 var_53_arg_2 = state_41; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=3, input_3=65, input_4=224, input_6=2, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, state_10=0, state_12=0, state_21=0, state_23=0, state_25=0, state_30=0, state_32=0, state_34=0, state_36=0, state_39=0, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_75=1, var_9=0] [L109] EXPR var_53_arg_0 ? var_53_arg_1 : var_53_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=3, input_3=65, input_4=224, input_6=2, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, state_10=0, state_12=0, state_21=0, state_23=0, state_25=0, state_30=0, state_32=0, state_34=0, state_36=0, state_39=0, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53_arg_0=0, var_53_arg_0 ? var_53_arg_1 : var_53_arg_2=0, var_53_arg_1=0, var_53_arg_2=0, var_75=1, var_9=0] [L109] SORT_1 var_53 = var_53_arg_0 ? var_53_arg_1 : var_53_arg_2; [L110] var_53 = var_53 & mask_SORT_1 [L111] SORT_1 next_54_arg_1 = var_53; [L112] SORT_5 var_58_arg_0 = input_8; [L113] SORT_5 var_58_arg_1 = var_17; [L114] SORT_5 var_58 = var_58_arg_0 == var_58_arg_1; [L115] SORT_1 var_56_arg_0 = state_36; [L116] SORT_1 var_56_arg_1 = state_32; [L117] SORT_1 var_56 = var_56_arg_0 - var_56_arg_1; [L118] SORT_1 var_55_arg_0 = state_36; [L119] SORT_1 var_55_arg_1 = state_32; [L120] SORT_1 var_55 = var_55_arg_0 - var_55_arg_1; [L121] SORT_5 var_57_arg_0 = state_34; [L122] SORT_1 var_57_arg_1 = var_56; [L123] SORT_1 var_57_arg_2 = var_55; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=3, input_3=65, input_4=224, input_6=2, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, state_10=0, state_12=0, state_21=0, state_23=0, state_25=0, state_30=0, state_32=0, state_34=0, state_36=0, state_39=0, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_75=1, var_9=0] [L124] EXPR var_57_arg_0 ? var_57_arg_1 : var_57_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=3, input_3=65, input_4=224, input_6=2, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, state_10=0, state_12=0, state_21=0, state_23=0, state_25=0, state_30=0, state_32=0, state_34=0, state_36=0, state_39=0, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57_arg_0=0, var_57_arg_0 ? var_57_arg_1 : var_57_arg_2=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_75=1, var_9=0] [L124] SORT_1 var_57 = var_57_arg_0 ? var_57_arg_1 : var_57_arg_2; [L125] SORT_5 var_59_arg_0 = var_58; [L126] SORT_1 var_59_arg_1 = var_9; [L127] SORT_1 var_59_arg_2 = var_57; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=3, input_3=65, input_4=224, input_6=2, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, state_10=0, state_12=0, state_21=0, state_23=0, state_25=0, state_30=0, state_32=0, state_34=0, state_36=0, state_39=0, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_75=1, var_9=0] [L128] EXPR var_59_arg_0 ? var_59_arg_1 : var_59_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=3, input_3=65, input_4=224, input_6=2, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, state_10=0, state_12=0, state_21=0, state_23=0, state_25=0, state_30=0, state_32=0, state_34=0, state_36=0, state_39=0, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59_arg_0=0, var_59_arg_0 ? var_59_arg_1 : var_59_arg_2=0, var_59_arg_1=0, var_59_arg_2=0, var_75=1, var_9=0] [L128] SORT_1 var_59 = var_59_arg_0 ? var_59_arg_1 : var_59_arg_2; [L129] var_59 = var_59 & mask_SORT_1 [L130] SORT_1 next_60_arg_1 = var_59; [L131] SORT_5 var_61_arg_0 = var_58; [L132] SORT_1 var_61_arg_1 = var_9; [L133] SORT_1 var_61_arg_2 = input_2; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=3, input_3=65, input_4=224, input_6=2, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, state_10=0, state_12=0, state_21=0, state_23=0, state_25=0, state_30=0, state_32=0, state_34=0, state_36=0, state_39=0, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_75=1, var_9=0] [L134] EXPR var_61_arg_0 ? var_61_arg_1 : var_61_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=3, input_3=65, input_4=224, input_6=2, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, state_10=0, state_12=0, state_21=0, state_23=0, state_25=0, state_30=0, state_32=0, state_34=0, state_36=0, state_39=0, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61_arg_0=0, var_61_arg_0 ? var_61_arg_1 : var_61_arg_2=1, var_61_arg_1=0, var_61_arg_2=1, var_75=1, var_9=0] [L134] SORT_1 var_61 = var_61_arg_0 ? var_61_arg_1 : var_61_arg_2; [L135] SORT_1 next_62_arg_1 = var_61; [L136] SORT_5 var_63_arg_0 = var_58; [L137] SORT_1 var_63_arg_1 = var_9; [L138] SORT_1 var_63_arg_2 = input_3; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=3, input_3=65, input_4=224, input_6=2, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, state_10=0, state_12=0, state_21=0, state_23=0, state_25=0, state_30=0, state_32=0, state_34=0, state_36=0, state_39=0, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=65, var_75=1, var_9=0] [L139] EXPR var_63_arg_0 ? var_63_arg_1 : var_63_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=3, input_3=65, input_4=224, input_6=2, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, state_10=0, state_12=0, state_21=0, state_23=0, state_25=0, state_30=0, state_32=0, state_34=0, state_36=0, state_39=0, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63_arg_0=0, var_63_arg_0 ? var_63_arg_1 : var_63_arg_2=65, var_63_arg_1=0, var_63_arg_2=65, var_75=1, var_9=0] [L139] SORT_1 var_63 = var_63_arg_0 ? var_63_arg_1 : var_63_arg_2; [L140] SORT_1 next_64_arg_1 = var_63; [L141] SORT_5 var_65_arg_0 = var_58; [L142] SORT_1 var_65_arg_1 = var_9; [L143] SORT_1 var_65_arg_2 = input_4; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=3, input_3=65, input_4=224, input_6=2, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=65, state_10=0, state_12=0, state_21=0, state_23=0, state_25=0, state_30=0, state_32=0, state_34=0, state_36=0, state_39=0, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=65, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=65, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=224, var_75=1, var_9=0] [L144] EXPR var_65_arg_0 ? var_65_arg_1 : var_65_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=3, input_3=65, input_4=224, input_6=2, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=65, state_10=0, state_12=0, state_21=0, state_23=0, state_25=0, state_30=0, state_32=0, state_34=0, state_36=0, state_39=0, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=65, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=65, var_65_arg_0=0, var_65_arg_0 ? var_65_arg_1 : var_65_arg_2=224, var_65_arg_1=0, var_65_arg_2=224, var_75=1, var_9=0] [L144] SORT_1 var_65 = var_65_arg_0 ? var_65_arg_1 : var_65_arg_2; [L145] SORT_1 next_66_arg_1 = var_65; [L146] SORT_5 var_67_arg_0 = var_58; [L147] SORT_5 var_67_arg_1 = var_29; [L148] SORT_5 var_67_arg_2 = input_7; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=3, input_3=65, input_4=224, input_6=2, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=65, next_66_arg_1=224, state_10=0, state_12=0, state_21=0, state_23=0, state_25=0, state_30=0, state_32=0, state_34=0, state_36=0, state_39=0, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=65, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=65, var_65=224, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=224, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_75=1, var_9=0] [L149] EXPR var_67_arg_0 ? var_67_arg_1 : var_67_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=3, input_3=65, input_4=224, input_6=2, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=65, next_66_arg_1=224, state_10=0, state_12=0, state_21=0, state_23=0, state_25=0, state_30=0, state_32=0, state_34=0, state_36=0, state_39=0, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=65, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=65, var_65=224, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=224, var_67_arg_0=0, var_67_arg_0 ? var_67_arg_1 : var_67_arg_2=1, var_67_arg_1=0, var_67_arg_2=1, var_75=1, var_9=0] [L149] SORT_5 var_67 = var_67_arg_0 ? var_67_arg_1 : var_67_arg_2; [L150] SORT_5 next_68_arg_1 = var_67; [L151] SORT_5 var_69_arg_0 = var_58; [L152] SORT_1 var_69_arg_1 = var_9; [L153] SORT_1 var_69_arg_2 = state_25; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=3, input_3=65, input_4=224, input_6=2, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=65, next_66_arg_1=224, next_68_arg_1=1, state_10=0, state_12=0, state_21=0, state_23=0, state_25=0, state_30=0, state_32=0, state_34=0, state_36=0, state_39=0, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=65, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=65, var_65=224, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=224, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_75=1, var_9=0] [L154] EXPR var_69_arg_0 ? var_69_arg_1 : var_69_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=3, input_3=65, input_4=224, input_6=2, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=65, next_66_arg_1=224, next_68_arg_1=1, state_10=0, state_12=0, state_21=0, state_23=0, state_25=0, state_30=0, state_32=0, state_34=0, state_36=0, state_39=0, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=65, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=65, var_65=224, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=224, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69_arg_0=0, var_69_arg_0 ? var_69_arg_1 : var_69_arg_2=0, var_69_arg_1=0, var_69_arg_2=0, var_75=1, var_9=0] [L154] SORT_1 var_69 = var_69_arg_0 ? var_69_arg_1 : var_69_arg_2; [L155] SORT_1 next_70_arg_1 = var_69; [L156] SORT_5 var_71_arg_0 = var_58; [L157] SORT_5 var_71_arg_1 = var_29; [L158] SORT_5 var_71_arg_2 = state_30; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=3, input_3=65, input_4=224, input_6=2, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=65, next_66_arg_1=224, next_68_arg_1=1, next_70_arg_1=0, state_10=0, state_12=0, state_21=0, state_23=0, state_25=0, state_30=0, state_32=0, state_34=0, state_36=0, state_39=0, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=65, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=65, var_65=224, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=224, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_75=1, var_9=0] [L159] EXPR var_71_arg_0 ? var_71_arg_1 : var_71_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=3, input_3=65, input_4=224, input_6=2, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=65, next_66_arg_1=224, next_68_arg_1=1, next_70_arg_1=0, state_10=0, state_12=0, state_21=0, state_23=0, state_25=0, state_30=0, state_32=0, state_34=0, state_36=0, state_39=0, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=65, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=65, var_65=224, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=224, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71_arg_0=0, var_71_arg_0 ? var_71_arg_1 : var_71_arg_2=0, var_71_arg_1=0, var_71_arg_2=0, var_75=1, var_9=0] [L159] SORT_5 var_71 = var_71_arg_0 ? var_71_arg_1 : var_71_arg_2; [L160] var_71 = var_71 & mask_SORT_5 [L161] SORT_5 next_72_arg_1 = var_71; [L162] SORT_1 var_76_arg_0 = state_21; [L163] SORT_1 var_76_arg_1 = var_75; [L164] SORT_1 var_76 = var_76_arg_0 & var_76_arg_1; [L165] var_76 = var_76 & mask_SORT_1 [L166] SORT_1 var_77_arg_0 = var_76; [L167] SORT_1 var_77_arg_1 = var_75; [L168] SORT_5 var_77 = var_77_arg_0 == var_77_arg_1; [L169] SORT_1 var_74_arg_0 = state_21; [L170] SORT_1 var_74_arg_1 = state_23; [L171] SORT_1 var_74 = var_74_arg_0 + var_74_arg_1; [L172] SORT_1 var_73_arg_0 = state_21; [L173] SORT_1 var_73_arg_1 = state_23; [L174] SORT_1 var_73 = var_73_arg_0 - var_73_arg_1; [L175] SORT_5 var_78_arg_0 = var_77; [L176] SORT_1 var_78_arg_1 = var_74; [L177] SORT_1 var_78_arg_2 = var_73; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=3, input_3=65, input_4=224, input_6=2, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=65, next_66_arg_1=224, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=0, state_10=0, state_12=0, state_21=0, state_23=0, state_25=0, state_30=0, state_32=0, state_34=0, state_36=0, state_39=0, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=65, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=65, var_65=224, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=224, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_74=0, var_74_arg_0=0, var_74_arg_1=0, var_75=1, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_9=0] [L178] EXPR var_78_arg_0 ? var_78_arg_1 : var_78_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=3, input_3=65, input_4=224, input_6=2, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=65, next_66_arg_1=224, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=0, state_10=0, state_12=0, state_21=0, state_23=0, state_25=0, state_30=0, state_32=0, state_34=0, state_36=0, state_39=0, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=65, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=65, var_65=224, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=224, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_74=0, var_74_arg_0=0, var_74_arg_1=0, var_75=1, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78_arg_0=0, var_78_arg_0 ? var_78_arg_1 : var_78_arg_2=0, var_78_arg_1=0, var_78_arg_2=0, var_9=0] [L178] SORT_1 var_78 = var_78_arg_0 ? var_78_arg_1 : var_78_arg_2; [L179] SORT_5 var_79_arg_0 = var_58; [L180] SORT_1 var_79_arg_1 = var_9; [L181] SORT_1 var_79_arg_2 = var_78; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=3, input_3=65, input_4=224, input_6=2, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=65, next_66_arg_1=224, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=0, state_10=0, state_12=0, state_21=0, state_23=0, state_25=0, state_30=0, state_32=0, state_34=0, state_36=0, state_39=0, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=65, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=65, var_65=224, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=224, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_74=0, var_74_arg_0=0, var_74_arg_1=0, var_75=1, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_9=0] [L182] EXPR var_79_arg_0 ? var_79_arg_1 : var_79_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=3, input_3=65, input_4=224, input_6=2, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=65, next_66_arg_1=224, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=0, state_10=0, state_12=0, state_21=0, state_23=0, state_25=0, state_30=0, state_32=0, state_34=0, state_36=0, state_39=0, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=65, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=65, var_65=224, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=224, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_74=0, var_74_arg_0=0, var_74_arg_1=0, var_75=1, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79_arg_0=0, var_79_arg_0 ? var_79_arg_1 : var_79_arg_2=0, var_79_arg_1=0, var_79_arg_2=0, var_9=0] [L182] SORT_1 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L183] SORT_1 next_80_arg_1 = var_79; [L184] SORT_1 var_45_arg_0 = input_2; [L185] SORT_5 var_45 = var_45_arg_0 >> 0; [L186] var_45 = var_45 & mask_SORT_5 [L187] SORT_1 var_44_arg_0 = input_2; [L188] SORT_1 var_44_arg_1 = input_3; [L189] SORT_1 var_44 = var_44_arg_0 + var_44_arg_1; [L190] SORT_1 var_43_arg_0 = input_2; [L191] SORT_1 var_43_arg_1 = input_3; [L192] SORT_1 var_43 = var_43_arg_0 - var_43_arg_1; [L193] SORT_5 var_46_arg_0 = var_45; [L194] SORT_1 var_46_arg_1 = var_44; [L195] SORT_1 var_46_arg_2 = var_43; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=3, input_3=65, input_4=224, input_6=2, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=65, next_66_arg_1=224, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=0, next_80_arg_1=0, state_10=0, state_12=0, state_21=0, state_23=0, state_25=0, state_30=0, state_32=0, state_34=0, state_36=0, state_39=0, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=192, var_43_arg_0=1, var_43_arg_1=65, var_44=66, var_44_arg_0=1, var_44_arg_1=65, var_45=1, var_45_arg_0=1, var_46_arg_0=1, var_46_arg_1=66, var_46_arg_2=192, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=65, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=65, var_65=224, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=224, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_74=0, var_74_arg_0=0, var_74_arg_1=0, var_75=1, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_9=0] [L196] EXPR var_46_arg_0 ? var_46_arg_1 : var_46_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=3, input_3=65, input_4=224, input_6=2, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=65, next_66_arg_1=224, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=0, next_80_arg_1=0, state_10=0, state_12=0, state_21=0, state_23=0, state_25=0, state_30=0, state_32=0, state_34=0, state_36=0, state_39=0, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=192, var_43_arg_0=1, var_43_arg_1=65, var_44=66, var_44_arg_0=1, var_44_arg_1=65, var_45=1, var_45_arg_0=1, var_46_arg_0=1, var_46_arg_0 ? var_46_arg_1 : var_46_arg_2=66, var_46_arg_1=66, var_46_arg_2=192, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=65, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=65, var_65=224, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=224, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_74=0, var_74_arg_0=0, var_74_arg_1=0, var_75=1, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_9=0] [L196] SORT_1 var_46 = var_46_arg_0 ? var_46_arg_1 : var_46_arg_2; [L197] SORT_1 var_48_arg_0 = var_46; [L198] SORT_1 var_48_arg_1 = input_4; [L199] SORT_1 var_48 = var_48_arg_0 + var_48_arg_1; [L200] SORT_1 var_47_arg_0 = var_46; [L201] SORT_1 var_47_arg_1 = input_4; [L202] SORT_1 var_47 = var_47_arg_0 - var_47_arg_1; [L203] SORT_5 var_49_arg_0 = input_7; [L204] SORT_1 var_49_arg_1 = var_48; [L205] SORT_1 var_49_arg_2 = var_47; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=3, input_3=65, input_4=224, input_6=2, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=65, next_66_arg_1=224, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=0, next_80_arg_1=0, state_10=0, state_12=0, state_21=0, state_23=0, state_25=0, state_30=0, state_32=0, state_34=0, state_36=0, state_39=0, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=192, var_43_arg_0=1, var_43_arg_1=65, var_44=66, var_44_arg_0=1, var_44_arg_1=65, var_45=1, var_45_arg_0=1, var_46=66, var_46_arg_0=1, var_46_arg_1=66, var_46_arg_2=192, var_47=98, var_47_arg_0=66, var_47_arg_1=224, var_48=34, var_48_arg_0=66, var_48_arg_1=224, var_49_arg_0=1, var_49_arg_1=34, var_49_arg_2=98, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=65, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=65, var_65=224, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=224, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_74=0, var_74_arg_0=0, var_74_arg_1=0, var_75=1, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_9=0] [L206] EXPR var_49_arg_0 ? var_49_arg_1 : var_49_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=3, input_3=65, input_4=224, input_6=2, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=65, next_66_arg_1=224, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=0, next_80_arg_1=0, state_10=0, state_12=0, state_21=0, state_23=0, state_25=0, state_30=0, state_32=0, state_34=0, state_36=0, state_39=0, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=192, var_43_arg_0=1, var_43_arg_1=65, var_44=66, var_44_arg_0=1, var_44_arg_1=65, var_45=1, var_45_arg_0=1, var_46=66, var_46_arg_0=1, var_46_arg_1=66, var_46_arg_2=192, var_47=98, var_47_arg_0=66, var_47_arg_1=224, var_48=34, var_48_arg_0=66, var_48_arg_1=224, var_49_arg_0=1, var_49_arg_0 ? var_49_arg_1 : var_49_arg_2=34, var_49_arg_1=34, var_49_arg_2=98, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=65, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=65, var_65=224, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=224, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_74=0, var_74_arg_0=0, var_74_arg_1=0, var_75=1, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_9=0] [L206] SORT_1 var_49 = var_49_arg_0 ? var_49_arg_1 : var_49_arg_2; [L207] SORT_5 var_81_arg_0 = var_52; [L208] SORT_1 var_81_arg_1 = var_9; [L209] SORT_1 var_81_arg_2 = var_49; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=3, input_3=65, input_4=224, input_6=2, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=65, next_66_arg_1=224, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=0, next_80_arg_1=0, state_10=0, state_12=0, state_21=0, state_23=0, state_25=0, state_30=0, state_32=0, state_34=0, state_36=0, state_39=0, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=192, var_43_arg_0=1, var_43_arg_1=65, var_44=66, var_44_arg_0=1, var_44_arg_1=65, var_45=1, var_45_arg_0=1, var_46=66, var_46_arg_0=1, var_46_arg_1=66, var_46_arg_2=192, var_47=98, var_47_arg_0=66, var_47_arg_1=224, var_48=34, var_48_arg_0=66, var_48_arg_1=224, var_49=34, var_49_arg_0=1, var_49_arg_1=34, var_49_arg_2=98, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=65, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=65, var_65=224, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=224, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_74=0, var_74_arg_0=0, var_74_arg_1=0, var_75=1, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=34, var_9=0] [L210] EXPR var_81_arg_0 ? var_81_arg_1 : var_81_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=3, input_3=65, input_4=224, input_6=2, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=65, next_66_arg_1=224, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=0, next_80_arg_1=0, state_10=0, state_12=0, state_21=0, state_23=0, state_25=0, state_30=0, state_32=0, state_34=0, state_36=0, state_39=0, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=192, var_43_arg_0=1, var_43_arg_1=65, var_44=66, var_44_arg_0=1, var_44_arg_1=65, var_45=1, var_45_arg_0=1, var_46=66, var_46_arg_0=1, var_46_arg_1=66, var_46_arg_2=192, var_47=98, var_47_arg_0=66, var_47_arg_1=224, var_48=34, var_48_arg_0=66, var_48_arg_1=224, var_49=34, var_49_arg_0=1, var_49_arg_1=34, var_49_arg_2=98, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=65, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=65, var_65=224, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=224, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_74=0, var_74_arg_0=0, var_74_arg_1=0, var_75=1, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81_arg_0=0, var_81_arg_0 ? var_81_arg_1 : var_81_arg_2=34, var_81_arg_1=0, var_81_arg_2=34, var_9=0] [L210] SORT_1 var_81 = var_81_arg_0 ? var_81_arg_1 : var_81_arg_2; [L211] SORT_1 next_82_arg_1 = var_81; [L212] SORT_5 var_83_arg_0 = var_52; [L213] SORT_1 var_83_arg_1 = var_9; [L214] SORT_1 var_83_arg_2 = state_39; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=3, input_3=65, input_4=224, input_6=2, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=65, next_66_arg_1=224, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=0, next_80_arg_1=0, next_82_arg_1=34, state_10=0, state_12=0, state_21=0, state_23=0, state_25=0, state_30=0, state_32=0, state_34=0, state_36=0, state_39=0, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=192, var_43_arg_0=1, var_43_arg_1=65, var_44=66, var_44_arg_0=1, var_44_arg_1=65, var_45=1, var_45_arg_0=1, var_46=66, var_46_arg_0=1, var_46_arg_1=66, var_46_arg_2=192, var_47=98, var_47_arg_0=66, var_47_arg_1=224, var_48=34, var_48_arg_0=66, var_48_arg_1=224, var_49=34, var_49_arg_0=1, var_49_arg_1=34, var_49_arg_2=98, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=65, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=65, var_65=224, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=224, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_74=0, var_74_arg_0=0, var_74_arg_1=0, var_75=1, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=34, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=34, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0, var_9=0] [L215] EXPR var_83_arg_0 ? var_83_arg_1 : var_83_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=3, input_3=65, input_4=224, input_6=2, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=65, next_66_arg_1=224, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=0, next_80_arg_1=0, next_82_arg_1=34, state_10=0, state_12=0, state_21=0, state_23=0, state_25=0, state_30=0, state_32=0, state_34=0, state_36=0, state_39=0, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=192, var_43_arg_0=1, var_43_arg_1=65, var_44=66, var_44_arg_0=1, var_44_arg_1=65, var_45=1, var_45_arg_0=1, var_46=66, var_46_arg_0=1, var_46_arg_1=66, var_46_arg_2=192, var_47=98, var_47_arg_0=66, var_47_arg_1=224, var_48=34, var_48_arg_0=66, var_48_arg_1=224, var_49=34, var_49_arg_0=1, var_49_arg_1=34, var_49_arg_2=98, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=65, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=65, var_65=224, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=224, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_74=0, var_74_arg_0=0, var_74_arg_1=0, var_75=1, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=34, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=34, var_83_arg_0=0, var_83_arg_0 ? var_83_arg_1 : var_83_arg_2=0, var_83_arg_1=0, var_83_arg_2=0, var_9=0] [L215] SORT_1 var_83 = var_83_arg_0 ? var_83_arg_1 : var_83_arg_2; [L216] SORT_1 next_84_arg_1 = var_83; [L218] state_10 = next_54_arg_1 [L219] state_12 = next_60_arg_1 [L220] state_21 = next_62_arg_1 [L221] state_23 = next_64_arg_1 [L222] state_25 = next_66_arg_1 [L223] state_30 = next_68_arg_1 [L224] state_32 = next_70_arg_1 [L225] state_34 = next_72_arg_1 [L226] state_36 = next_80_arg_1 [L227] state_39 = next_82_arg_1 [L228] state_41 = next_84_arg_1 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=3, input_3=65, input_4=224, input_6=2, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=65, next_66_arg_1=224, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=0, next_80_arg_1=0, next_82_arg_1=34, next_84_arg_1=0, state_10=0, state_12=0, state_21=1, state_23=65, state_25=224, state_30=1, state_32=0, state_34=0, state_36=0, state_39=34, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=192, var_43_arg_0=1, var_43_arg_1=65, var_44=66, var_44_arg_0=1, var_44_arg_1=65, var_45=1, var_45_arg_0=1, var_46=66, var_46_arg_0=1, var_46_arg_1=66, var_46_arg_2=192, var_47=98, var_47_arg_0=66, var_47_arg_1=224, var_48=34, var_48_arg_0=66, var_48_arg_1=224, var_49=34, var_49_arg_0=1, var_49_arg_1=34, var_49_arg_2=98, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=65, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=65, var_65=224, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=224, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_74=0, var_74_arg_0=0, var_74_arg_1=0, var_75=1, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=34, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=34, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0, var_9=0] [L80] input_2 = __VERIFIER_nondet_uchar() [L81] input_3 = __VERIFIER_nondet_uchar() [L82] input_4 = __VERIFIER_nondet_uchar() [L83] input_6 = __VERIFIER_nondet_uchar() [L84] input_7 = __VERIFIER_nondet_uchar() [L85] input_7 = input_7 & mask_SORT_5 [L86] input_8 = __VERIFIER_nondet_uchar() [L87] input_8 = input_8 & mask_SORT_5 [L88] input_27 = __VERIFIER_nondet_uchar() [L91] SORT_1 var_14_arg_0 = state_10; [L92] SORT_1 var_14_arg_1 = state_12; [L93] SORT_5 var_14 = var_14_arg_0 == var_14_arg_1; [L94] SORT_5 var_18_arg_0 = var_14; [L95] SORT_5 var_18 = ~var_18_arg_0; [L96] SORT_5 var_19_arg_0 = var_17; [L97] SORT_5 var_19_arg_1 = var_18; [L98] SORT_5 var_19 = var_19_arg_0 & var_19_arg_1; [L99] var_19 = var_19 & mask_SORT_5 [L100] SORT_5 bad_20_arg_0 = var_19; [L101] CALL __VERIFIER_assert(!(bad_20_arg_0)) [L20] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L101] RET __VERIFIER_assert(!(bad_20_arg_0)) [L103] SORT_5 var_52_arg_0 = input_8; [L104] SORT_5 var_52_arg_1 = var_17; [L105] SORT_5 var_52 = var_52_arg_0 == var_52_arg_1; [L106] SORT_5 var_53_arg_0 = var_52; [L107] SORT_1 var_53_arg_1 = var_9; [L108] SORT_1 var_53_arg_2 = state_41; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=4, input_3=0, input_4=0, input_6=5, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=65, next_66_arg_1=224, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=0, next_80_arg_1=0, next_82_arg_1=34, next_84_arg_1=0, state_10=0, state_12=0, state_21=1, state_23=65, state_25=224, state_30=1, state_32=0, state_34=0, state_36=0, state_39=34, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=192, var_43_arg_0=1, var_43_arg_1=65, var_44=66, var_44_arg_0=1, var_44_arg_1=65, var_45=1, var_45_arg_0=1, var_46=66, var_46_arg_0=1, var_46_arg_1=66, var_46_arg_2=192, var_47=98, var_47_arg_0=66, var_47_arg_1=224, var_48=34, var_48_arg_0=66, var_48_arg_1=224, var_49=34, var_49_arg_0=1, var_49_arg_1=34, var_49_arg_2=98, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=65, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=65, var_65=224, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=224, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_74=0, var_74_arg_0=0, var_74_arg_1=0, var_75=1, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=34, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=34, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0, var_9=0] [L109] EXPR var_53_arg_0 ? var_53_arg_1 : var_53_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=4, input_3=0, input_4=0, input_6=5, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=65, next_66_arg_1=224, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=0, next_80_arg_1=0, next_82_arg_1=34, next_84_arg_1=0, state_10=0, state_12=0, state_21=1, state_23=65, state_25=224, state_30=1, state_32=0, state_34=0, state_36=0, state_39=34, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=192, var_43_arg_0=1, var_43_arg_1=65, var_44=66, var_44_arg_0=1, var_44_arg_1=65, var_45=1, var_45_arg_0=1, var_46=66, var_46_arg_0=1, var_46_arg_1=66, var_46_arg_2=192, var_47=98, var_47_arg_0=66, var_47_arg_1=224, var_48=34, var_48_arg_0=66, var_48_arg_1=224, var_49=34, var_49_arg_0=1, var_49_arg_1=34, var_49_arg_2=98, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_0 ? var_53_arg_1 : var_53_arg_2=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=65, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=65, var_65=224, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=224, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_74=0, var_74_arg_0=0, var_74_arg_1=0, var_75=1, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=34, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=34, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0, var_9=0] [L109] SORT_1 var_53 = var_53_arg_0 ? var_53_arg_1 : var_53_arg_2; [L110] var_53 = var_53 & mask_SORT_1 [L111] SORT_1 next_54_arg_1 = var_53; [L112] SORT_5 var_58_arg_0 = input_8; [L113] SORT_5 var_58_arg_1 = var_17; [L114] SORT_5 var_58 = var_58_arg_0 == var_58_arg_1; [L115] SORT_1 var_56_arg_0 = state_36; [L116] SORT_1 var_56_arg_1 = state_32; [L117] SORT_1 var_56 = var_56_arg_0 - var_56_arg_1; [L118] SORT_1 var_55_arg_0 = state_36; [L119] SORT_1 var_55_arg_1 = state_32; [L120] SORT_1 var_55 = var_55_arg_0 - var_55_arg_1; [L121] SORT_5 var_57_arg_0 = state_34; [L122] SORT_1 var_57_arg_1 = var_56; [L123] SORT_1 var_57_arg_2 = var_55; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=4, input_3=0, input_4=0, input_6=5, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=65, next_66_arg_1=224, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=0, next_80_arg_1=0, next_82_arg_1=34, next_84_arg_1=0, state_10=0, state_12=0, state_21=1, state_23=65, state_25=224, state_30=1, state_32=0, state_34=0, state_36=0, state_39=34, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=192, var_43_arg_0=1, var_43_arg_1=65, var_44=66, var_44_arg_0=1, var_44_arg_1=65, var_45=1, var_45_arg_0=1, var_46=66, var_46_arg_0=1, var_46_arg_1=66, var_46_arg_2=192, var_47=98, var_47_arg_0=66, var_47_arg_1=224, var_48=34, var_48_arg_0=66, var_48_arg_1=224, var_49=34, var_49_arg_0=1, var_49_arg_1=34, var_49_arg_2=98, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=65, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=65, var_65=224, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=224, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_74=0, var_74_arg_0=0, var_74_arg_1=0, var_75=1, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=34, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=34, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0, var_9=0] [L124] EXPR var_57_arg_0 ? var_57_arg_1 : var_57_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=4, input_3=0, input_4=0, input_6=5, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=65, next_66_arg_1=224, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=0, next_80_arg_1=0, next_82_arg_1=34, next_84_arg_1=0, state_10=0, state_12=0, state_21=1, state_23=65, state_25=224, state_30=1, state_32=0, state_34=0, state_36=0, state_39=34, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=192, var_43_arg_0=1, var_43_arg_1=65, var_44=66, var_44_arg_0=1, var_44_arg_1=65, var_45=1, var_45_arg_0=1, var_46=66, var_46_arg_0=1, var_46_arg_1=66, var_46_arg_2=192, var_47=98, var_47_arg_0=66, var_47_arg_1=224, var_48=34, var_48_arg_0=66, var_48_arg_1=224, var_49=34, var_49_arg_0=1, var_49_arg_1=34, var_49_arg_2=98, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_0 ? var_57_arg_1 : var_57_arg_2=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=65, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=65, var_65=224, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=224, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_74=0, var_74_arg_0=0, var_74_arg_1=0, var_75=1, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=34, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=34, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0, var_9=0] [L124] SORT_1 var_57 = var_57_arg_0 ? var_57_arg_1 : var_57_arg_2; [L125] SORT_5 var_59_arg_0 = var_58; [L126] SORT_1 var_59_arg_1 = var_9; [L127] SORT_1 var_59_arg_2 = var_57; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=4, input_3=0, input_4=0, input_6=5, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=65, next_66_arg_1=224, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=0, next_80_arg_1=0, next_82_arg_1=34, next_84_arg_1=0, state_10=0, state_12=0, state_21=1, state_23=65, state_25=224, state_30=1, state_32=0, state_34=0, state_36=0, state_39=34, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=192, var_43_arg_0=1, var_43_arg_1=65, var_44=66, var_44_arg_0=1, var_44_arg_1=65, var_45=1, var_45_arg_0=1, var_46=66, var_46_arg_0=1, var_46_arg_1=66, var_46_arg_2=192, var_47=98, var_47_arg_0=66, var_47_arg_1=224, var_48=34, var_48_arg_0=66, var_48_arg_1=224, var_49=34, var_49_arg_0=1, var_49_arg_1=34, var_49_arg_2=98, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=65, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=65, var_65=224, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=224, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_74=0, var_74_arg_0=0, var_74_arg_1=0, var_75=1, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=34, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=34, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0, var_9=0] [L128] EXPR var_59_arg_0 ? var_59_arg_1 : var_59_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=4, input_3=0, input_4=0, input_6=5, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=65, next_66_arg_1=224, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=0, next_80_arg_1=0, next_82_arg_1=34, next_84_arg_1=0, state_10=0, state_12=0, state_21=1, state_23=65, state_25=224, state_30=1, state_32=0, state_34=0, state_36=0, state_39=34, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=192, var_43_arg_0=1, var_43_arg_1=65, var_44=66, var_44_arg_0=1, var_44_arg_1=65, var_45=1, var_45_arg_0=1, var_46=66, var_46_arg_0=1, var_46_arg_1=66, var_46_arg_2=192, var_47=98, var_47_arg_0=66, var_47_arg_1=224, var_48=34, var_48_arg_0=66, var_48_arg_1=224, var_49=34, var_49_arg_0=1, var_49_arg_1=34, var_49_arg_2=98, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_0 ? var_59_arg_1 : var_59_arg_2=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=65, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=65, var_65=224, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=224, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_74=0, var_74_arg_0=0, var_74_arg_1=0, var_75=1, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=34, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=34, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0, var_9=0] [L128] SORT_1 var_59 = var_59_arg_0 ? var_59_arg_1 : var_59_arg_2; [L129] var_59 = var_59 & mask_SORT_1 [L130] SORT_1 next_60_arg_1 = var_59; [L131] SORT_5 var_61_arg_0 = var_58; [L132] SORT_1 var_61_arg_1 = var_9; [L133] SORT_1 var_61_arg_2 = input_2; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=4, input_3=0, input_4=0, input_6=5, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=65, next_66_arg_1=224, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=0, next_80_arg_1=0, next_82_arg_1=34, next_84_arg_1=0, state_10=0, state_12=0, state_21=1, state_23=65, state_25=224, state_30=1, state_32=0, state_34=0, state_36=0, state_39=34, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=192, var_43_arg_0=1, var_43_arg_1=65, var_44=66, var_44_arg_0=1, var_44_arg_1=65, var_45=1, var_45_arg_0=1, var_46=66, var_46_arg_0=1, var_46_arg_1=66, var_46_arg_2=192, var_47=98, var_47_arg_0=66, var_47_arg_1=224, var_48=34, var_48_arg_0=66, var_48_arg_1=224, var_49=34, var_49_arg_0=1, var_49_arg_1=34, var_49_arg_2=98, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=65, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=65, var_65=224, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=224, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_74=0, var_74_arg_0=0, var_74_arg_1=0, var_75=1, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=34, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=34, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0, var_9=0] [L134] EXPR var_61_arg_0 ? var_61_arg_1 : var_61_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=4, input_3=0, input_4=0, input_6=5, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=65, next_66_arg_1=224, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=0, next_80_arg_1=0, next_82_arg_1=34, next_84_arg_1=0, state_10=0, state_12=0, state_21=1, state_23=65, state_25=224, state_30=1, state_32=0, state_34=0, state_36=0, state_39=34, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=192, var_43_arg_0=1, var_43_arg_1=65, var_44=66, var_44_arg_0=1, var_44_arg_1=65, var_45=1, var_45_arg_0=1, var_46=66, var_46_arg_0=1, var_46_arg_1=66, var_46_arg_2=192, var_47=98, var_47_arg_0=66, var_47_arg_1=224, var_48=34, var_48_arg_0=66, var_48_arg_1=224, var_49=34, var_49_arg_0=1, var_49_arg_1=34, var_49_arg_2=98, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_0 ? var_61_arg_1 : var_61_arg_2=1, var_61_arg_1=0, var_61_arg_2=1, var_63=65, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=65, var_65=224, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=224, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_74=0, var_74_arg_0=0, var_74_arg_1=0, var_75=1, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=34, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=34, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0, var_9=0] [L134] SORT_1 var_61 = var_61_arg_0 ? var_61_arg_1 : var_61_arg_2; [L135] SORT_1 next_62_arg_1 = var_61; [L136] SORT_5 var_63_arg_0 = var_58; [L137] SORT_1 var_63_arg_1 = var_9; [L138] SORT_1 var_63_arg_2 = input_3; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=4, input_3=0, input_4=0, input_6=5, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=65, next_66_arg_1=224, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=0, next_80_arg_1=0, next_82_arg_1=34, next_84_arg_1=0, state_10=0, state_12=0, state_21=1, state_23=65, state_25=224, state_30=1, state_32=0, state_34=0, state_36=0, state_39=34, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=192, var_43_arg_0=1, var_43_arg_1=65, var_44=66, var_44_arg_0=1, var_44_arg_1=65, var_45=1, var_45_arg_0=1, var_46=66, var_46_arg_0=1, var_46_arg_1=66, var_46_arg_2=192, var_47=98, var_47_arg_0=66, var_47_arg_1=224, var_48=34, var_48_arg_0=66, var_48_arg_1=224, var_49=34, var_49_arg_0=1, var_49_arg_1=34, var_49_arg_2=98, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=65, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=224, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=224, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_74=0, var_74_arg_0=0, var_74_arg_1=0, var_75=1, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=34, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=34, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0, var_9=0] [L139] EXPR var_63_arg_0 ? var_63_arg_1 : var_63_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=4, input_3=0, input_4=0, input_6=5, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=65, next_66_arg_1=224, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=0, next_80_arg_1=0, next_82_arg_1=34, next_84_arg_1=0, state_10=0, state_12=0, state_21=1, state_23=65, state_25=224, state_30=1, state_32=0, state_34=0, state_36=0, state_39=34, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=192, var_43_arg_0=1, var_43_arg_1=65, var_44=66, var_44_arg_0=1, var_44_arg_1=65, var_45=1, var_45_arg_0=1, var_46=66, var_46_arg_0=1, var_46_arg_1=66, var_46_arg_2=192, var_47=98, var_47_arg_0=66, var_47_arg_1=224, var_48=34, var_48_arg_0=66, var_48_arg_1=224, var_49=34, var_49_arg_0=1, var_49_arg_1=34, var_49_arg_2=98, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=65, var_63_arg_0=0, var_63_arg_0 ? var_63_arg_1 : var_63_arg_2=0, var_63_arg_1=0, var_63_arg_2=0, var_65=224, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=224, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_74=0, var_74_arg_0=0, var_74_arg_1=0, var_75=1, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=34, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=34, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0, var_9=0] [L139] SORT_1 var_63 = var_63_arg_0 ? var_63_arg_1 : var_63_arg_2; [L140] SORT_1 next_64_arg_1 = var_63; [L141] SORT_5 var_65_arg_0 = var_58; [L142] SORT_1 var_65_arg_1 = var_9; [L143] SORT_1 var_65_arg_2 = input_4; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=4, input_3=0, input_4=0, input_6=5, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=224, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=0, next_80_arg_1=0, next_82_arg_1=34, next_84_arg_1=0, state_10=0, state_12=0, state_21=1, state_23=65, state_25=224, state_30=1, state_32=0, state_34=0, state_36=0, state_39=34, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=192, var_43_arg_0=1, var_43_arg_1=65, var_44=66, var_44_arg_0=1, var_44_arg_1=65, var_45=1, var_45_arg_0=1, var_46=66, var_46_arg_0=1, var_46_arg_1=66, var_46_arg_2=192, var_47=98, var_47_arg_0=66, var_47_arg_1=224, var_48=34, var_48_arg_0=66, var_48_arg_1=224, var_49=34, var_49_arg_0=1, var_49_arg_1=34, var_49_arg_2=98, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=224, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_74=0, var_74_arg_0=0, var_74_arg_1=0, var_75=1, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=34, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=34, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0, var_9=0] [L144] EXPR var_65_arg_0 ? var_65_arg_1 : var_65_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=4, input_3=0, input_4=0, input_6=5, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=224, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=0, next_80_arg_1=0, next_82_arg_1=34, next_84_arg_1=0, state_10=0, state_12=0, state_21=1, state_23=65, state_25=224, state_30=1, state_32=0, state_34=0, state_36=0, state_39=34, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=192, var_43_arg_0=1, var_43_arg_1=65, var_44=66, var_44_arg_0=1, var_44_arg_1=65, var_45=1, var_45_arg_0=1, var_46=66, var_46_arg_0=1, var_46_arg_1=66, var_46_arg_2=192, var_47=98, var_47_arg_0=66, var_47_arg_1=224, var_48=34, var_48_arg_0=66, var_48_arg_1=224, var_49=34, var_49_arg_0=1, var_49_arg_1=34, var_49_arg_2=98, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=224, var_65_arg_0=0, var_65_arg_0 ? var_65_arg_1 : var_65_arg_2=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_74=0, var_74_arg_0=0, var_74_arg_1=0, var_75=1, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=34, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=34, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0, var_9=0] [L144] SORT_1 var_65 = var_65_arg_0 ? var_65_arg_1 : var_65_arg_2; [L145] SORT_1 next_66_arg_1 = var_65; [L146] SORT_5 var_67_arg_0 = var_58; [L147] SORT_5 var_67_arg_1 = var_29; [L148] SORT_5 var_67_arg_2 = input_7; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=4, input_3=0, input_4=0, input_6=5, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=0, next_80_arg_1=0, next_82_arg_1=34, next_84_arg_1=0, state_10=0, state_12=0, state_21=1, state_23=65, state_25=224, state_30=1, state_32=0, state_34=0, state_36=0, state_39=34, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=192, var_43_arg_0=1, var_43_arg_1=65, var_44=66, var_44_arg_0=1, var_44_arg_1=65, var_45=1, var_45_arg_0=1, var_46=66, var_46_arg_0=1, var_46_arg_1=66, var_46_arg_2=192, var_47=98, var_47_arg_0=66, var_47_arg_1=224, var_48=34, var_48_arg_0=66, var_48_arg_1=224, var_49=34, var_49_arg_0=1, var_49_arg_1=34, var_49_arg_2=98, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_74=0, var_74_arg_0=0, var_74_arg_1=0, var_75=1, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=34, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=34, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0, var_9=0] [L149] EXPR var_67_arg_0 ? var_67_arg_1 : var_67_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=4, input_3=0, input_4=0, input_6=5, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=0, next_80_arg_1=0, next_82_arg_1=34, next_84_arg_1=0, state_10=0, state_12=0, state_21=1, state_23=65, state_25=224, state_30=1, state_32=0, state_34=0, state_36=0, state_39=34, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=192, var_43_arg_0=1, var_43_arg_1=65, var_44=66, var_44_arg_0=1, var_44_arg_1=65, var_45=1, var_45_arg_0=1, var_46=66, var_46_arg_0=1, var_46_arg_1=66, var_46_arg_2=192, var_47=98, var_47_arg_0=66, var_47_arg_1=224, var_48=34, var_48_arg_0=66, var_48_arg_1=224, var_49=34, var_49_arg_0=1, var_49_arg_1=34, var_49_arg_2=98, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_0 ? var_67_arg_1 : var_67_arg_2=1, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_74=0, var_74_arg_0=0, var_74_arg_1=0, var_75=1, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=34, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=34, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0, var_9=0] [L149] SORT_5 var_67 = var_67_arg_0 ? var_67_arg_1 : var_67_arg_2; [L150] SORT_5 next_68_arg_1 = var_67; [L151] SORT_5 var_69_arg_0 = var_58; [L152] SORT_1 var_69_arg_1 = var_9; [L153] SORT_1 var_69_arg_2 = state_25; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=4, input_3=0, input_4=0, input_6=5, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=0, next_80_arg_1=0, next_82_arg_1=34, next_84_arg_1=0, state_10=0, state_12=0, state_21=1, state_23=65, state_25=224, state_30=1, state_32=0, state_34=0, state_36=0, state_39=34, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=192, var_43_arg_0=1, var_43_arg_1=65, var_44=66, var_44_arg_0=1, var_44_arg_1=65, var_45=1, var_45_arg_0=1, var_46=66, var_46_arg_0=1, var_46_arg_1=66, var_46_arg_2=192, var_47=98, var_47_arg_0=66, var_47_arg_1=224, var_48=34, var_48_arg_0=66, var_48_arg_1=224, var_49=34, var_49_arg_0=1, var_49_arg_1=34, var_49_arg_2=98, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=224, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_74=0, var_74_arg_0=0, var_74_arg_1=0, var_75=1, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=34, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=34, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0, var_9=0] [L154] EXPR var_69_arg_0 ? var_69_arg_1 : var_69_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=4, input_3=0, input_4=0, input_6=5, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=0, next_80_arg_1=0, next_82_arg_1=34, next_84_arg_1=0, state_10=0, state_12=0, state_21=1, state_23=65, state_25=224, state_30=1, state_32=0, state_34=0, state_36=0, state_39=34, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=192, var_43_arg_0=1, var_43_arg_1=65, var_44=66, var_44_arg_0=1, var_44_arg_1=65, var_45=1, var_45_arg_0=1, var_46=66, var_46_arg_0=1, var_46_arg_1=66, var_46_arg_2=192, var_47=98, var_47_arg_0=66, var_47_arg_1=224, var_48=34, var_48_arg_0=66, var_48_arg_1=224, var_49=34, var_49_arg_0=1, var_49_arg_1=34, var_49_arg_2=98, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_0 ? var_69_arg_1 : var_69_arg_2=224, var_69_arg_1=0, var_69_arg_2=224, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_74=0, var_74_arg_0=0, var_74_arg_1=0, var_75=1, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=34, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=34, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0, var_9=0] [L154] SORT_1 var_69 = var_69_arg_0 ? var_69_arg_1 : var_69_arg_2; [L155] SORT_1 next_70_arg_1 = var_69; [L156] SORT_5 var_71_arg_0 = var_58; [L157] SORT_5 var_71_arg_1 = var_29; [L158] SORT_5 var_71_arg_2 = state_30; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=4, input_3=0, input_4=0, input_6=5, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=224, next_72_arg_1=0, next_80_arg_1=0, next_82_arg_1=34, next_84_arg_1=0, state_10=0, state_12=0, state_21=1, state_23=65, state_25=224, state_30=1, state_32=0, state_34=0, state_36=0, state_39=34, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=192, var_43_arg_0=1, var_43_arg_1=65, var_44=66, var_44_arg_0=1, var_44_arg_1=65, var_45=1, var_45_arg_0=1, var_46=66, var_46_arg_0=1, var_46_arg_1=66, var_46_arg_2=192, var_47=98, var_47_arg_0=66, var_47_arg_1=224, var_48=34, var_48_arg_0=66, var_48_arg_1=224, var_49=34, var_49_arg_0=1, var_49_arg_1=34, var_49_arg_2=98, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=224, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=224, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_74=0, var_74_arg_0=0, var_74_arg_1=0, var_75=1, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=34, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=34, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0, var_9=0] [L159] EXPR var_71_arg_0 ? var_71_arg_1 : var_71_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=4, input_3=0, input_4=0, input_6=5, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=224, next_72_arg_1=0, next_80_arg_1=0, next_82_arg_1=34, next_84_arg_1=0, state_10=0, state_12=0, state_21=1, state_23=65, state_25=224, state_30=1, state_32=0, state_34=0, state_36=0, state_39=34, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=192, var_43_arg_0=1, var_43_arg_1=65, var_44=66, var_44_arg_0=1, var_44_arg_1=65, var_45=1, var_45_arg_0=1, var_46=66, var_46_arg_0=1, var_46_arg_1=66, var_46_arg_2=192, var_47=98, var_47_arg_0=66, var_47_arg_1=224, var_48=34, var_48_arg_0=66, var_48_arg_1=224, var_49=34, var_49_arg_0=1, var_49_arg_1=34, var_49_arg_2=98, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=224, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=224, var_71=0, var_71_arg_0=0, var_71_arg_0 ? var_71_arg_1 : var_71_arg_2=1, var_71_arg_1=0, var_71_arg_2=1, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_74=0, var_74_arg_0=0, var_74_arg_1=0, var_75=1, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_78_arg_2=0, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=34, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=34, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0, var_9=0] [L159] SORT_5 var_71 = var_71_arg_0 ? var_71_arg_1 : var_71_arg_2; [L160] var_71 = var_71 & mask_SORT_5 [L161] SORT_5 next_72_arg_1 = var_71; [L162] SORT_1 var_76_arg_0 = state_21; [L163] SORT_1 var_76_arg_1 = var_75; [L164] SORT_1 var_76 = var_76_arg_0 & var_76_arg_1; [L165] var_76 = var_76 & mask_SORT_1 [L166] SORT_1 var_77_arg_0 = var_76; [L167] SORT_1 var_77_arg_1 = var_75; [L168] SORT_5 var_77 = var_77_arg_0 == var_77_arg_1; [L169] SORT_1 var_74_arg_0 = state_21; [L170] SORT_1 var_74_arg_1 = state_23; [L171] SORT_1 var_74 = var_74_arg_0 + var_74_arg_1; [L172] SORT_1 var_73_arg_0 = state_21; [L173] SORT_1 var_73_arg_1 = state_23; [L174] SORT_1 var_73 = var_73_arg_0 - var_73_arg_1; [L175] SORT_5 var_78_arg_0 = var_77; [L176] SORT_1 var_78_arg_1 = var_74; [L177] SORT_1 var_78_arg_2 = var_73; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=4, input_3=0, input_4=0, input_6=5, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=224, next_72_arg_1=1, next_80_arg_1=0, next_82_arg_1=34, next_84_arg_1=0, state_10=0, state_12=0, state_21=1, state_23=65, state_25=224, state_30=1, state_32=0, state_34=0, state_36=0, state_39=34, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=192, var_43_arg_0=1, var_43_arg_1=65, var_44=66, var_44_arg_0=1, var_44_arg_1=65, var_45=1, var_45_arg_0=1, var_46=66, var_46_arg_0=1, var_46_arg_1=66, var_46_arg_2=192, var_47=98, var_47_arg_0=66, var_47_arg_1=224, var_48=34, var_48_arg_0=66, var_48_arg_1=224, var_49=34, var_49_arg_0=1, var_49_arg_1=34, var_49_arg_2=98, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=224, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=224, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=192, var_73_arg_0=1, var_73_arg_1=65, var_74=66, var_74_arg_0=1, var_74_arg_1=65, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=0, var_78_arg_0=1, var_78_arg_1=66, var_78_arg_2=192, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=34, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=34, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0, var_9=0] [L178] EXPR var_78_arg_0 ? var_78_arg_1 : var_78_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=4, input_3=0, input_4=0, input_6=5, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=224, next_72_arg_1=1, next_80_arg_1=0, next_82_arg_1=34, next_84_arg_1=0, state_10=0, state_12=0, state_21=1, state_23=65, state_25=224, state_30=1, state_32=0, state_34=0, state_36=0, state_39=34, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=192, var_43_arg_0=1, var_43_arg_1=65, var_44=66, var_44_arg_0=1, var_44_arg_1=65, var_45=1, var_45_arg_0=1, var_46=66, var_46_arg_0=1, var_46_arg_1=66, var_46_arg_2=192, var_47=98, var_47_arg_0=66, var_47_arg_1=224, var_48=34, var_48_arg_0=66, var_48_arg_1=224, var_49=34, var_49_arg_0=1, var_49_arg_1=34, var_49_arg_2=98, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=224, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=224, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=192, var_73_arg_0=1, var_73_arg_1=65, var_74=66, var_74_arg_0=1, var_74_arg_1=65, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=0, var_78_arg_0=1, var_78_arg_0 ? var_78_arg_1 : var_78_arg_2=66, var_78_arg_1=66, var_78_arg_2=192, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=0, var_81=34, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=34, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0, var_9=0] [L178] SORT_1 var_78 = var_78_arg_0 ? var_78_arg_1 : var_78_arg_2; [L179] SORT_5 var_79_arg_0 = var_58; [L180] SORT_1 var_79_arg_1 = var_9; [L181] SORT_1 var_79_arg_2 = var_78; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=4, input_3=0, input_4=0, input_6=5, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=224, next_72_arg_1=1, next_80_arg_1=0, next_82_arg_1=34, next_84_arg_1=0, state_10=0, state_12=0, state_21=1, state_23=65, state_25=224, state_30=1, state_32=0, state_34=0, state_36=0, state_39=34, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=192, var_43_arg_0=1, var_43_arg_1=65, var_44=66, var_44_arg_0=1, var_44_arg_1=65, var_45=1, var_45_arg_0=1, var_46=66, var_46_arg_0=1, var_46_arg_1=66, var_46_arg_2=192, var_47=98, var_47_arg_0=66, var_47_arg_1=224, var_48=34, var_48_arg_0=66, var_48_arg_1=224, var_49=34, var_49_arg_0=1, var_49_arg_1=34, var_49_arg_2=98, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=224, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=224, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=192, var_73_arg_0=1, var_73_arg_1=65, var_74=66, var_74_arg_0=1, var_74_arg_1=65, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=66, var_78_arg_0=1, var_78_arg_1=66, var_78_arg_2=192, var_79=0, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=66, var_81=34, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=34, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0, var_9=0] [L182] EXPR var_79_arg_0 ? var_79_arg_1 : var_79_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=4, input_3=0, input_4=0, input_6=5, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=224, next_72_arg_1=1, next_80_arg_1=0, next_82_arg_1=34, next_84_arg_1=0, state_10=0, state_12=0, state_21=1, state_23=65, state_25=224, state_30=1, state_32=0, state_34=0, state_36=0, state_39=34, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=192, var_43_arg_0=1, var_43_arg_1=65, var_44=66, var_44_arg_0=1, var_44_arg_1=65, var_45=1, var_45_arg_0=1, var_46=66, var_46_arg_0=1, var_46_arg_1=66, var_46_arg_2=192, var_47=98, var_47_arg_0=66, var_47_arg_1=224, var_48=34, var_48_arg_0=66, var_48_arg_1=224, var_49=34, var_49_arg_0=1, var_49_arg_1=34, var_49_arg_2=98, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=224, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=224, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=192, var_73_arg_0=1, var_73_arg_1=65, var_74=66, var_74_arg_0=1, var_74_arg_1=65, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=66, var_78_arg_0=1, var_78_arg_1=66, var_78_arg_2=192, var_79=0, var_79_arg_0=0, var_79_arg_0 ? var_79_arg_1 : var_79_arg_2=66, var_79_arg_1=0, var_79_arg_2=66, var_81=34, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=34, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0, var_9=0] [L182] SORT_1 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L183] SORT_1 next_80_arg_1 = var_79; [L184] SORT_1 var_45_arg_0 = input_2; [L185] SORT_5 var_45 = var_45_arg_0 >> 0; [L186] var_45 = var_45 & mask_SORT_5 [L187] SORT_1 var_44_arg_0 = input_2; [L188] SORT_1 var_44_arg_1 = input_3; [L189] SORT_1 var_44 = var_44_arg_0 + var_44_arg_1; [L190] SORT_1 var_43_arg_0 = input_2; [L191] SORT_1 var_43_arg_1 = input_3; [L192] SORT_1 var_43 = var_43_arg_0 - var_43_arg_1; [L193] SORT_5 var_46_arg_0 = var_45; [L194] SORT_1 var_46_arg_1 = var_44; [L195] SORT_1 var_46_arg_2 = var_43; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=4, input_3=0, input_4=0, input_6=5, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=224, next_72_arg_1=1, next_80_arg_1=66, next_82_arg_1=34, next_84_arg_1=0, state_10=0, state_12=0, state_21=1, state_23=65, state_25=224, state_30=1, state_32=0, state_34=0, state_36=0, state_39=34, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=1, var_43_arg_0=1, var_43_arg_1=0, var_44=1, var_44_arg_0=1, var_44_arg_1=0, var_45=1, var_45_arg_0=1, var_46=66, var_46_arg_0=1, var_46_arg_1=1, var_46_arg_2=1, var_47=98, var_47_arg_0=66, var_47_arg_1=224, var_48=34, var_48_arg_0=66, var_48_arg_1=224, var_49=34, var_49_arg_0=1, var_49_arg_1=34, var_49_arg_2=98, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=224, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=224, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=192, var_73_arg_0=1, var_73_arg_1=65, var_74=66, var_74_arg_0=1, var_74_arg_1=65, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=66, var_78_arg_0=1, var_78_arg_1=66, var_78_arg_2=192, var_79=66, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=66, var_81=34, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=34, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0, var_9=0] [L196] EXPR var_46_arg_0 ? var_46_arg_1 : var_46_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=4, input_3=0, input_4=0, input_6=5, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=224, next_72_arg_1=1, next_80_arg_1=66, next_82_arg_1=34, next_84_arg_1=0, state_10=0, state_12=0, state_21=1, state_23=65, state_25=224, state_30=1, state_32=0, state_34=0, state_36=0, state_39=34, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=1, var_43_arg_0=1, var_43_arg_1=0, var_44=1, var_44_arg_0=1, var_44_arg_1=0, var_45=1, var_45_arg_0=1, var_46=66, var_46_arg_0=1, var_46_arg_0 ? var_46_arg_1 : var_46_arg_2=1, var_46_arg_1=1, var_46_arg_2=1, var_47=98, var_47_arg_0=66, var_47_arg_1=224, var_48=34, var_48_arg_0=66, var_48_arg_1=224, var_49=34, var_49_arg_0=1, var_49_arg_1=34, var_49_arg_2=98, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=224, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=224, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=192, var_73_arg_0=1, var_73_arg_1=65, var_74=66, var_74_arg_0=1, var_74_arg_1=65, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=66, var_78_arg_0=1, var_78_arg_1=66, var_78_arg_2=192, var_79=66, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=66, var_81=34, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=34, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0, var_9=0] [L196] SORT_1 var_46 = var_46_arg_0 ? var_46_arg_1 : var_46_arg_2; [L197] SORT_1 var_48_arg_0 = var_46; [L198] SORT_1 var_48_arg_1 = input_4; [L199] SORT_1 var_48 = var_48_arg_0 + var_48_arg_1; [L200] SORT_1 var_47_arg_0 = var_46; [L201] SORT_1 var_47_arg_1 = input_4; [L202] SORT_1 var_47 = var_47_arg_0 - var_47_arg_1; [L203] SORT_5 var_49_arg_0 = input_7; [L204] SORT_1 var_49_arg_1 = var_48; [L205] SORT_1 var_49_arg_2 = var_47; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=4, input_3=0, input_4=0, input_6=5, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=224, next_72_arg_1=1, next_80_arg_1=66, next_82_arg_1=34, next_84_arg_1=0, state_10=0, state_12=0, state_21=1, state_23=65, state_25=224, state_30=1, state_32=0, state_34=0, state_36=0, state_39=34, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=1, var_43_arg_0=1, var_43_arg_1=0, var_44=1, var_44_arg_0=1, var_44_arg_1=0, var_45=1, var_45_arg_0=1, var_46=1, var_46_arg_0=1, var_46_arg_1=1, var_46_arg_2=1, var_47=1, var_47_arg_0=1, var_47_arg_1=0, var_48=1, var_48_arg_0=1, var_48_arg_1=0, var_49=34, var_49_arg_0=1, var_49_arg_1=1, var_49_arg_2=1, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=224, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=224, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=192, var_73_arg_0=1, var_73_arg_1=65, var_74=66, var_74_arg_0=1, var_74_arg_1=65, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=66, var_78_arg_0=1, var_78_arg_1=66, var_78_arg_2=192, var_79=66, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=66, var_81=34, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=34, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0, var_9=0] [L206] EXPR var_49_arg_0 ? var_49_arg_1 : var_49_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=4, input_3=0, input_4=0, input_6=5, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=224, next_72_arg_1=1, next_80_arg_1=66, next_82_arg_1=34, next_84_arg_1=0, state_10=0, state_12=0, state_21=1, state_23=65, state_25=224, state_30=1, state_32=0, state_34=0, state_36=0, state_39=34, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=1, var_43_arg_0=1, var_43_arg_1=0, var_44=1, var_44_arg_0=1, var_44_arg_1=0, var_45=1, var_45_arg_0=1, var_46=1, var_46_arg_0=1, var_46_arg_1=1, var_46_arg_2=1, var_47=1, var_47_arg_0=1, var_47_arg_1=0, var_48=1, var_48_arg_0=1, var_48_arg_1=0, var_49=34, var_49_arg_0=1, var_49_arg_0 ? var_49_arg_1 : var_49_arg_2=1, var_49_arg_1=1, var_49_arg_2=1, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=224, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=224, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=192, var_73_arg_0=1, var_73_arg_1=65, var_74=66, var_74_arg_0=1, var_74_arg_1=65, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=66, var_78_arg_0=1, var_78_arg_1=66, var_78_arg_2=192, var_79=66, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=66, var_81=34, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=34, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0, var_9=0] [L206] SORT_1 var_49 = var_49_arg_0 ? var_49_arg_1 : var_49_arg_2; [L207] SORT_5 var_81_arg_0 = var_52; [L208] SORT_1 var_81_arg_1 = var_9; [L209] SORT_1 var_81_arg_2 = var_49; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=4, input_3=0, input_4=0, input_6=5, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=224, next_72_arg_1=1, next_80_arg_1=66, next_82_arg_1=34, next_84_arg_1=0, state_10=0, state_12=0, state_21=1, state_23=65, state_25=224, state_30=1, state_32=0, state_34=0, state_36=0, state_39=34, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=1, var_43_arg_0=1, var_43_arg_1=0, var_44=1, var_44_arg_0=1, var_44_arg_1=0, var_45=1, var_45_arg_0=1, var_46=1, var_46_arg_0=1, var_46_arg_1=1, var_46_arg_2=1, var_47=1, var_47_arg_0=1, var_47_arg_1=0, var_48=1, var_48_arg_0=1, var_48_arg_1=0, var_49=1, var_49_arg_0=1, var_49_arg_1=1, var_49_arg_2=1, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=224, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=224, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=192, var_73_arg_0=1, var_73_arg_1=65, var_74=66, var_74_arg_0=1, var_74_arg_1=65, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=66, var_78_arg_0=1, var_78_arg_1=66, var_78_arg_2=192, var_79=66, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=66, var_81=34, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=1, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0, var_9=0] [L210] EXPR var_81_arg_0 ? var_81_arg_1 : var_81_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=4, input_3=0, input_4=0, input_6=5, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=224, next_72_arg_1=1, next_80_arg_1=66, next_82_arg_1=34, next_84_arg_1=0, state_10=0, state_12=0, state_21=1, state_23=65, state_25=224, state_30=1, state_32=0, state_34=0, state_36=0, state_39=34, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=1, var_43_arg_0=1, var_43_arg_1=0, var_44=1, var_44_arg_0=1, var_44_arg_1=0, var_45=1, var_45_arg_0=1, var_46=1, var_46_arg_0=1, var_46_arg_1=1, var_46_arg_2=1, var_47=1, var_47_arg_0=1, var_47_arg_1=0, var_48=1, var_48_arg_0=1, var_48_arg_1=0, var_49=1, var_49_arg_0=1, var_49_arg_1=1, var_49_arg_2=1, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=224, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=224, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=192, var_73_arg_0=1, var_73_arg_1=65, var_74=66, var_74_arg_0=1, var_74_arg_1=65, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=66, var_78_arg_0=1, var_78_arg_1=66, var_78_arg_2=192, var_79=66, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=66, var_81=34, var_81_arg_0=0, var_81_arg_0 ? var_81_arg_1 : var_81_arg_2=1, var_81_arg_1=0, var_81_arg_2=1, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=0, var_9=0] [L210] SORT_1 var_81 = var_81_arg_0 ? var_81_arg_1 : var_81_arg_2; [L211] SORT_1 next_82_arg_1 = var_81; [L212] SORT_5 var_83_arg_0 = var_52; [L213] SORT_1 var_83_arg_1 = var_9; [L214] SORT_1 var_83_arg_2 = state_39; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=4, input_3=0, input_4=0, input_6=5, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=224, next_72_arg_1=1, next_80_arg_1=66, next_82_arg_1=1, next_84_arg_1=0, state_10=0, state_12=0, state_21=1, state_23=65, state_25=224, state_30=1, state_32=0, state_34=0, state_36=0, state_39=34, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=1, var_43_arg_0=1, var_43_arg_1=0, var_44=1, var_44_arg_0=1, var_44_arg_1=0, var_45=1, var_45_arg_0=1, var_46=1, var_46_arg_0=1, var_46_arg_1=1, var_46_arg_2=1, var_47=1, var_47_arg_0=1, var_47_arg_1=0, var_48=1, var_48_arg_0=1, var_48_arg_1=0, var_49=1, var_49_arg_0=1, var_49_arg_1=1, var_49_arg_2=1, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=224, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=224, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=192, var_73_arg_0=1, var_73_arg_1=65, var_74=66, var_74_arg_0=1, var_74_arg_1=65, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=66, var_78_arg_0=1, var_78_arg_1=66, var_78_arg_2=192, var_79=66, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=66, var_81=1, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=1, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=34, var_9=0] [L215] EXPR var_83_arg_0 ? var_83_arg_1 : var_83_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=4, input_3=0, input_4=0, input_6=5, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=224, next_72_arg_1=1, next_80_arg_1=66, next_82_arg_1=1, next_84_arg_1=0, state_10=0, state_12=0, state_21=1, state_23=65, state_25=224, state_30=1, state_32=0, state_34=0, state_36=0, state_39=34, state_41=0, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=1, var_43_arg_0=1, var_43_arg_1=0, var_44=1, var_44_arg_0=1, var_44_arg_1=0, var_45=1, var_45_arg_0=1, var_46=1, var_46_arg_0=1, var_46_arg_1=1, var_46_arg_2=1, var_47=1, var_47_arg_0=1, var_47_arg_1=0, var_48=1, var_48_arg_0=1, var_48_arg_1=0, var_49=1, var_49_arg_0=1, var_49_arg_1=1, var_49_arg_2=1, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=224, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=224, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=192, var_73_arg_0=1, var_73_arg_1=65, var_74=66, var_74_arg_0=1, var_74_arg_1=65, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=66, var_78_arg_0=1, var_78_arg_1=66, var_78_arg_2=192, var_79=66, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=66, var_81=1, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=1, var_83=0, var_83_arg_0=0, var_83_arg_0 ? var_83_arg_1 : var_83_arg_2=34, var_83_arg_1=0, var_83_arg_2=34, var_9=0] [L215] SORT_1 var_83 = var_83_arg_0 ? var_83_arg_1 : var_83_arg_2; [L216] SORT_1 next_84_arg_1 = var_83; [L218] state_10 = next_54_arg_1 [L219] state_12 = next_60_arg_1 [L220] state_21 = next_62_arg_1 [L221] state_23 = next_64_arg_1 [L222] state_25 = next_66_arg_1 [L223] state_30 = next_68_arg_1 [L224] state_32 = next_70_arg_1 [L225] state_34 = next_72_arg_1 [L226] state_36 = next_80_arg_1 [L227] state_39 = next_82_arg_1 [L228] state_41 = next_84_arg_1 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=4, input_3=0, input_4=0, input_6=5, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=224, next_72_arg_1=1, next_80_arg_1=66, next_82_arg_1=1, next_84_arg_1=34, state_10=0, state_12=0, state_21=1, state_23=0, state_25=0, state_30=1, state_32=224, state_34=1, state_36=66, state_39=1, state_41=34, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=1, var_43_arg_0=1, var_43_arg_1=0, var_44=1, var_44_arg_0=1, var_44_arg_1=0, var_45=1, var_45_arg_0=1, var_46=1, var_46_arg_0=1, var_46_arg_1=1, var_46_arg_2=1, var_47=1, var_47_arg_0=1, var_47_arg_1=0, var_48=1, var_48_arg_0=1, var_48_arg_1=0, var_49=1, var_49_arg_0=1, var_49_arg_1=1, var_49_arg_2=1, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=0, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=224, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=224, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=192, var_73_arg_0=1, var_73_arg_1=65, var_74=66, var_74_arg_0=1, var_74_arg_1=65, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=66, var_78_arg_0=1, var_78_arg_1=66, var_78_arg_2=192, var_79=66, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=66, var_81=1, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=1, var_83=34, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=34, var_9=0] [L80] input_2 = __VERIFIER_nondet_uchar() [L81] input_3 = __VERIFIER_nondet_uchar() [L82] input_4 = __VERIFIER_nondet_uchar() [L83] input_6 = __VERIFIER_nondet_uchar() [L84] input_7 = __VERIFIER_nondet_uchar() [L85] input_7 = input_7 & mask_SORT_5 [L86] input_8 = __VERIFIER_nondet_uchar() [L87] input_8 = input_8 & mask_SORT_5 [L88] input_27 = __VERIFIER_nondet_uchar() [L91] SORT_1 var_14_arg_0 = state_10; [L92] SORT_1 var_14_arg_1 = state_12; [L93] SORT_5 var_14 = var_14_arg_0 == var_14_arg_1; [L94] SORT_5 var_18_arg_0 = var_14; [L95] SORT_5 var_18 = ~var_18_arg_0; [L96] SORT_5 var_19_arg_0 = var_17; [L97] SORT_5 var_19_arg_1 = var_18; [L98] SORT_5 var_19 = var_19_arg_0 & var_19_arg_1; [L99] var_19 = var_19 & mask_SORT_5 [L100] SORT_5 bad_20_arg_0 = var_19; [L101] CALL __VERIFIER_assert(!(bad_20_arg_0)) [L20] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L101] RET __VERIFIER_assert(!(bad_20_arg_0)) [L103] SORT_5 var_52_arg_0 = input_8; [L104] SORT_5 var_52_arg_1 = var_17; [L105] SORT_5 var_52 = var_52_arg_0 == var_52_arg_1; [L106] SORT_5 var_53_arg_0 = var_52; [L107] SORT_1 var_53_arg_1 = var_9; [L108] SORT_1 var_53_arg_2 = state_41; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=6, input_3=0, input_4=0, input_6=7, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=224, next_72_arg_1=1, next_80_arg_1=66, next_82_arg_1=1, next_84_arg_1=34, state_10=0, state_12=0, state_21=1, state_23=0, state_25=0, state_30=1, state_32=224, state_34=1, state_36=66, state_39=1, state_41=34, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=1, var_43_arg_0=1, var_43_arg_1=0, var_44=1, var_44_arg_0=1, var_44_arg_1=0, var_45=1, var_45_arg_0=1, var_46=1, var_46_arg_0=1, var_46_arg_1=1, var_46_arg_2=1, var_47=1, var_47_arg_0=1, var_47_arg_1=0, var_48=1, var_48_arg_0=1, var_48_arg_1=0, var_49=1, var_49_arg_0=1, var_49_arg_1=1, var_49_arg_2=1, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=34, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=224, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=224, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=192, var_73_arg_0=1, var_73_arg_1=65, var_74=66, var_74_arg_0=1, var_74_arg_1=65, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=66, var_78_arg_0=1, var_78_arg_1=66, var_78_arg_2=192, var_79=66, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=66, var_81=1, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=1, var_83=34, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=34, var_9=0] [L109] EXPR var_53_arg_0 ? var_53_arg_1 : var_53_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=6, input_3=0, input_4=0, input_6=7, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=0, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=224, next_72_arg_1=1, next_80_arg_1=66, next_82_arg_1=1, next_84_arg_1=34, state_10=0, state_12=0, state_21=1, state_23=0, state_25=0, state_30=1, state_32=224, state_34=1, state_36=66, state_39=1, state_41=34, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=1, var_43_arg_0=1, var_43_arg_1=0, var_44=1, var_44_arg_0=1, var_44_arg_1=0, var_45=1, var_45_arg_0=1, var_46=1, var_46_arg_0=1, var_46_arg_1=1, var_46_arg_2=1, var_47=1, var_47_arg_0=1, var_47_arg_1=0, var_48=1, var_48_arg_0=1, var_48_arg_1=0, var_49=1, var_49_arg_0=1, var_49_arg_1=1, var_49_arg_2=1, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_0 ? var_53_arg_1 : var_53_arg_2=34, var_53_arg_1=0, var_53_arg_2=34, var_55=0, var_55_arg_0=0, var_55_arg_1=0, var_56=0, var_56_arg_0=0, var_56_arg_1=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_57_arg_2=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=224, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=224, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=192, var_73_arg_0=1, var_73_arg_1=65, var_74=66, var_74_arg_0=1, var_74_arg_1=65, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=66, var_78_arg_0=1, var_78_arg_1=66, var_78_arg_2=192, var_79=66, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=66, var_81=1, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=1, var_83=34, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=34, var_9=0] [L109] SORT_1 var_53 = var_53_arg_0 ? var_53_arg_1 : var_53_arg_2; [L110] var_53 = var_53 & mask_SORT_1 [L111] SORT_1 next_54_arg_1 = var_53; [L112] SORT_5 var_58_arg_0 = input_8; [L113] SORT_5 var_58_arg_1 = var_17; [L114] SORT_5 var_58 = var_58_arg_0 == var_58_arg_1; [L115] SORT_1 var_56_arg_0 = state_36; [L116] SORT_1 var_56_arg_1 = state_32; [L117] SORT_1 var_56 = var_56_arg_0 - var_56_arg_1; [L118] SORT_1 var_55_arg_0 = state_36; [L119] SORT_1 var_55_arg_1 = state_32; [L120] SORT_1 var_55 = var_55_arg_0 - var_55_arg_1; [L121] SORT_5 var_57_arg_0 = state_34; [L122] SORT_1 var_57_arg_1 = var_56; [L123] SORT_1 var_57_arg_2 = var_55; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=6, input_3=0, input_4=0, input_6=7, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=34, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=224, next_72_arg_1=1, next_80_arg_1=66, next_82_arg_1=1, next_84_arg_1=34, state_10=0, state_12=0, state_21=1, state_23=0, state_25=0, state_30=1, state_32=224, state_34=1, state_36=66, state_39=1, state_41=34, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=1, var_43_arg_0=1, var_43_arg_1=0, var_44=1, var_44_arg_0=1, var_44_arg_1=0, var_45=1, var_45_arg_0=1, var_46=1, var_46_arg_0=1, var_46_arg_1=1, var_46_arg_2=1, var_47=1, var_47_arg_0=1, var_47_arg_1=0, var_48=1, var_48_arg_0=1, var_48_arg_1=0, var_49=1, var_49_arg_0=1, var_49_arg_1=1, var_49_arg_2=1, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=34, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=34, var_55=98, var_55_arg_0=66, var_55_arg_1=224, var_56=98, var_56_arg_0=66, var_56_arg_1=224, var_57=0, var_57_arg_0=1, var_57_arg_1=98, var_57_arg_2=98, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=224, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=224, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=192, var_73_arg_0=1, var_73_arg_1=65, var_74=66, var_74_arg_0=1, var_74_arg_1=65, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=66, var_78_arg_0=1, var_78_arg_1=66, var_78_arg_2=192, var_79=66, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=66, var_81=1, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=1, var_83=34, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=34, var_9=0] [L124] EXPR var_57_arg_0 ? var_57_arg_1 : var_57_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=6, input_3=0, input_4=0, input_6=7, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=34, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=224, next_72_arg_1=1, next_80_arg_1=66, next_82_arg_1=1, next_84_arg_1=34, state_10=0, state_12=0, state_21=1, state_23=0, state_25=0, state_30=1, state_32=224, state_34=1, state_36=66, state_39=1, state_41=34, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=1, var_43_arg_0=1, var_43_arg_1=0, var_44=1, var_44_arg_0=1, var_44_arg_1=0, var_45=1, var_45_arg_0=1, var_46=1, var_46_arg_0=1, var_46_arg_1=1, var_46_arg_2=1, var_47=1, var_47_arg_0=1, var_47_arg_1=0, var_48=1, var_48_arg_0=1, var_48_arg_1=0, var_49=1, var_49_arg_0=1, var_49_arg_1=1, var_49_arg_2=1, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=34, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=34, var_55=98, var_55_arg_0=66, var_55_arg_1=224, var_56=98, var_56_arg_0=66, var_56_arg_1=224, var_57=0, var_57_arg_0=1, var_57_arg_0 ? var_57_arg_1 : var_57_arg_2=98, var_57_arg_1=98, var_57_arg_2=98, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=0, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=224, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=224, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=192, var_73_arg_0=1, var_73_arg_1=65, var_74=66, var_74_arg_0=1, var_74_arg_1=65, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=66, var_78_arg_0=1, var_78_arg_1=66, var_78_arg_2=192, var_79=66, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=66, var_81=1, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=1, var_83=34, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=34, var_9=0] [L124] SORT_1 var_57 = var_57_arg_0 ? var_57_arg_1 : var_57_arg_2; [L125] SORT_5 var_59_arg_0 = var_58; [L126] SORT_1 var_59_arg_1 = var_9; [L127] SORT_1 var_59_arg_2 = var_57; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=6, input_3=0, input_4=0, input_6=7, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=34, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=224, next_72_arg_1=1, next_80_arg_1=66, next_82_arg_1=1, next_84_arg_1=34, state_10=0, state_12=0, state_21=1, state_23=0, state_25=0, state_30=1, state_32=224, state_34=1, state_36=66, state_39=1, state_41=34, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=1, var_43_arg_0=1, var_43_arg_1=0, var_44=1, var_44_arg_0=1, var_44_arg_1=0, var_45=1, var_45_arg_0=1, var_46=1, var_46_arg_0=1, var_46_arg_1=1, var_46_arg_2=1, var_47=1, var_47_arg_0=1, var_47_arg_1=0, var_48=1, var_48_arg_0=1, var_48_arg_1=0, var_49=1, var_49_arg_0=1, var_49_arg_1=1, var_49_arg_2=1, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=34, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=34, var_55=98, var_55_arg_0=66, var_55_arg_1=224, var_56=98, var_56_arg_0=66, var_56_arg_1=224, var_57=98, var_57_arg_0=1, var_57_arg_1=98, var_57_arg_2=98, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=98, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=224, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=224, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=192, var_73_arg_0=1, var_73_arg_1=65, var_74=66, var_74_arg_0=1, var_74_arg_1=65, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=66, var_78_arg_0=1, var_78_arg_1=66, var_78_arg_2=192, var_79=66, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=66, var_81=1, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=1, var_83=34, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=34, var_9=0] [L128] EXPR var_59_arg_0 ? var_59_arg_1 : var_59_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=6, input_3=0, input_4=0, input_6=7, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=34, next_60_arg_1=0, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=224, next_72_arg_1=1, next_80_arg_1=66, next_82_arg_1=1, next_84_arg_1=34, state_10=0, state_12=0, state_21=1, state_23=0, state_25=0, state_30=1, state_32=224, state_34=1, state_36=66, state_39=1, state_41=34, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=1, var_43_arg_0=1, var_43_arg_1=0, var_44=1, var_44_arg_0=1, var_44_arg_1=0, var_45=1, var_45_arg_0=1, var_46=1, var_46_arg_0=1, var_46_arg_1=1, var_46_arg_2=1, var_47=1, var_47_arg_0=1, var_47_arg_1=0, var_48=1, var_48_arg_0=1, var_48_arg_1=0, var_49=1, var_49_arg_0=1, var_49_arg_1=1, var_49_arg_2=1, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=34, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=34, var_55=98, var_55_arg_0=66, var_55_arg_1=224, var_56=98, var_56_arg_0=66, var_56_arg_1=224, var_57=98, var_57_arg_0=1, var_57_arg_1=98, var_57_arg_2=98, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=0, var_59_arg_0=0, var_59_arg_0 ? var_59_arg_1 : var_59_arg_2=98, var_59_arg_1=0, var_59_arg_2=98, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=224, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=224, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=192, var_73_arg_0=1, var_73_arg_1=65, var_74=66, var_74_arg_0=1, var_74_arg_1=65, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=66, var_78_arg_0=1, var_78_arg_1=66, var_78_arg_2=192, var_79=66, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=66, var_81=1, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=1, var_83=34, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=34, var_9=0] [L128] SORT_1 var_59 = var_59_arg_0 ? var_59_arg_1 : var_59_arg_2; [L129] var_59 = var_59 & mask_SORT_1 [L130] SORT_1 next_60_arg_1 = var_59; [L131] SORT_5 var_61_arg_0 = var_58; [L132] SORT_1 var_61_arg_1 = var_9; [L133] SORT_1 var_61_arg_2 = input_2; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=6, input_3=0, input_4=0, input_6=7, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=34, next_60_arg_1=98, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=224, next_72_arg_1=1, next_80_arg_1=66, next_82_arg_1=1, next_84_arg_1=34, state_10=0, state_12=0, state_21=1, state_23=0, state_25=0, state_30=1, state_32=224, state_34=1, state_36=66, state_39=1, state_41=34, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=1, var_43_arg_0=1, var_43_arg_1=0, var_44=1, var_44_arg_0=1, var_44_arg_1=0, var_45=1, var_45_arg_0=1, var_46=1, var_46_arg_0=1, var_46_arg_1=1, var_46_arg_2=1, var_47=1, var_47_arg_0=1, var_47_arg_1=0, var_48=1, var_48_arg_0=1, var_48_arg_1=0, var_49=1, var_49_arg_0=1, var_49_arg_1=1, var_49_arg_2=1, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=34, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=34, var_55=98, var_55_arg_0=66, var_55_arg_1=224, var_56=98, var_56_arg_0=66, var_56_arg_1=224, var_57=98, var_57_arg_0=1, var_57_arg_1=98, var_57_arg_2=98, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=98, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=98, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=224, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=224, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=192, var_73_arg_0=1, var_73_arg_1=65, var_74=66, var_74_arg_0=1, var_74_arg_1=65, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=66, var_78_arg_0=1, var_78_arg_1=66, var_78_arg_2=192, var_79=66, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=66, var_81=1, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=1, var_83=34, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=34, var_9=0] [L134] EXPR var_61_arg_0 ? var_61_arg_1 : var_61_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=6, input_3=0, input_4=0, input_6=7, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=34, next_60_arg_1=98, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=224, next_72_arg_1=1, next_80_arg_1=66, next_82_arg_1=1, next_84_arg_1=34, state_10=0, state_12=0, state_21=1, state_23=0, state_25=0, state_30=1, state_32=224, state_34=1, state_36=66, state_39=1, state_41=34, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=1, var_43_arg_0=1, var_43_arg_1=0, var_44=1, var_44_arg_0=1, var_44_arg_1=0, var_45=1, var_45_arg_0=1, var_46=1, var_46_arg_0=1, var_46_arg_1=1, var_46_arg_2=1, var_47=1, var_47_arg_0=1, var_47_arg_1=0, var_48=1, var_48_arg_0=1, var_48_arg_1=0, var_49=1, var_49_arg_0=1, var_49_arg_1=1, var_49_arg_2=1, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=34, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=34, var_55=98, var_55_arg_0=66, var_55_arg_1=224, var_56=98, var_56_arg_0=66, var_56_arg_1=224, var_57=98, var_57_arg_0=1, var_57_arg_1=98, var_57_arg_2=98, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=98, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=98, var_61=1, var_61_arg_0=0, var_61_arg_0 ? var_61_arg_1 : var_61_arg_2=1, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=224, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=224, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=192, var_73_arg_0=1, var_73_arg_1=65, var_74=66, var_74_arg_0=1, var_74_arg_1=65, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=66, var_78_arg_0=1, var_78_arg_1=66, var_78_arg_2=192, var_79=66, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=66, var_81=1, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=1, var_83=34, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=34, var_9=0] [L134] SORT_1 var_61 = var_61_arg_0 ? var_61_arg_1 : var_61_arg_2; [L135] SORT_1 next_62_arg_1 = var_61; [L136] SORT_5 var_63_arg_0 = var_58; [L137] SORT_1 var_63_arg_1 = var_9; [L138] SORT_1 var_63_arg_2 = input_3; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=6, input_3=0, input_4=0, input_6=7, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=34, next_60_arg_1=98, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=224, next_72_arg_1=1, next_80_arg_1=66, next_82_arg_1=1, next_84_arg_1=34, state_10=0, state_12=0, state_21=1, state_23=0, state_25=0, state_30=1, state_32=224, state_34=1, state_36=66, state_39=1, state_41=34, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=1, var_43_arg_0=1, var_43_arg_1=0, var_44=1, var_44_arg_0=1, var_44_arg_1=0, var_45=1, var_45_arg_0=1, var_46=1, var_46_arg_0=1, var_46_arg_1=1, var_46_arg_2=1, var_47=1, var_47_arg_0=1, var_47_arg_1=0, var_48=1, var_48_arg_0=1, var_48_arg_1=0, var_49=1, var_49_arg_0=1, var_49_arg_1=1, var_49_arg_2=1, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=34, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=34, var_55=98, var_55_arg_0=66, var_55_arg_1=224, var_56=98, var_56_arg_0=66, var_56_arg_1=224, var_57=98, var_57_arg_0=1, var_57_arg_1=98, var_57_arg_2=98, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=98, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=98, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=224, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=224, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=192, var_73_arg_0=1, var_73_arg_1=65, var_74=66, var_74_arg_0=1, var_74_arg_1=65, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=66, var_78_arg_0=1, var_78_arg_1=66, var_78_arg_2=192, var_79=66, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=66, var_81=1, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=1, var_83=34, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=34, var_9=0] [L139] EXPR var_63_arg_0 ? var_63_arg_1 : var_63_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=6, input_3=0, input_4=0, input_6=7, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=34, next_60_arg_1=98, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=224, next_72_arg_1=1, next_80_arg_1=66, next_82_arg_1=1, next_84_arg_1=34, state_10=0, state_12=0, state_21=1, state_23=0, state_25=0, state_30=1, state_32=224, state_34=1, state_36=66, state_39=1, state_41=34, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=1, var_43_arg_0=1, var_43_arg_1=0, var_44=1, var_44_arg_0=1, var_44_arg_1=0, var_45=1, var_45_arg_0=1, var_46=1, var_46_arg_0=1, var_46_arg_1=1, var_46_arg_2=1, var_47=1, var_47_arg_0=1, var_47_arg_1=0, var_48=1, var_48_arg_0=1, var_48_arg_1=0, var_49=1, var_49_arg_0=1, var_49_arg_1=1, var_49_arg_2=1, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=34, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=34, var_55=98, var_55_arg_0=66, var_55_arg_1=224, var_56=98, var_56_arg_0=66, var_56_arg_1=224, var_57=98, var_57_arg_0=1, var_57_arg_1=98, var_57_arg_2=98, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=98, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=98, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_0 ? var_63_arg_1 : var_63_arg_2=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=224, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=224, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=192, var_73_arg_0=1, var_73_arg_1=65, var_74=66, var_74_arg_0=1, var_74_arg_1=65, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=66, var_78_arg_0=1, var_78_arg_1=66, var_78_arg_2=192, var_79=66, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=66, var_81=1, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=1, var_83=34, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=34, var_9=0] [L139] SORT_1 var_63 = var_63_arg_0 ? var_63_arg_1 : var_63_arg_2; [L140] SORT_1 next_64_arg_1 = var_63; [L141] SORT_5 var_65_arg_0 = var_58; [L142] SORT_1 var_65_arg_1 = var_9; [L143] SORT_1 var_65_arg_2 = input_4; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=6, input_3=0, input_4=0, input_6=7, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=34, next_60_arg_1=98, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=224, next_72_arg_1=1, next_80_arg_1=66, next_82_arg_1=1, next_84_arg_1=34, state_10=0, state_12=0, state_21=1, state_23=0, state_25=0, state_30=1, state_32=224, state_34=1, state_36=66, state_39=1, state_41=34, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=1, var_43_arg_0=1, var_43_arg_1=0, var_44=1, var_44_arg_0=1, var_44_arg_1=0, var_45=1, var_45_arg_0=1, var_46=1, var_46_arg_0=1, var_46_arg_1=1, var_46_arg_2=1, var_47=1, var_47_arg_0=1, var_47_arg_1=0, var_48=1, var_48_arg_0=1, var_48_arg_1=0, var_49=1, var_49_arg_0=1, var_49_arg_1=1, var_49_arg_2=1, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=34, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=34, var_55=98, var_55_arg_0=66, var_55_arg_1=224, var_56=98, var_56_arg_0=66, var_56_arg_1=224, var_57=98, var_57_arg_0=1, var_57_arg_1=98, var_57_arg_2=98, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=98, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=98, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=224, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=224, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=192, var_73_arg_0=1, var_73_arg_1=65, var_74=66, var_74_arg_0=1, var_74_arg_1=65, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=66, var_78_arg_0=1, var_78_arg_1=66, var_78_arg_2=192, var_79=66, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=66, var_81=1, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=1, var_83=34, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=34, var_9=0] [L144] EXPR var_65_arg_0 ? var_65_arg_1 : var_65_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=6, input_3=0, input_4=0, input_6=7, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=34, next_60_arg_1=98, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=224, next_72_arg_1=1, next_80_arg_1=66, next_82_arg_1=1, next_84_arg_1=34, state_10=0, state_12=0, state_21=1, state_23=0, state_25=0, state_30=1, state_32=224, state_34=1, state_36=66, state_39=1, state_41=34, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=1, var_43_arg_0=1, var_43_arg_1=0, var_44=1, var_44_arg_0=1, var_44_arg_1=0, var_45=1, var_45_arg_0=1, var_46=1, var_46_arg_0=1, var_46_arg_1=1, var_46_arg_2=1, var_47=1, var_47_arg_0=1, var_47_arg_1=0, var_48=1, var_48_arg_0=1, var_48_arg_1=0, var_49=1, var_49_arg_0=1, var_49_arg_1=1, var_49_arg_2=1, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=34, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=34, var_55=98, var_55_arg_0=66, var_55_arg_1=224, var_56=98, var_56_arg_0=66, var_56_arg_1=224, var_57=98, var_57_arg_0=1, var_57_arg_1=98, var_57_arg_2=98, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=98, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=98, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_0 ? var_65_arg_1 : var_65_arg_2=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=224, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=224, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=192, var_73_arg_0=1, var_73_arg_1=65, var_74=66, var_74_arg_0=1, var_74_arg_1=65, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=66, var_78_arg_0=1, var_78_arg_1=66, var_78_arg_2=192, var_79=66, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=66, var_81=1, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=1, var_83=34, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=34, var_9=0] [L144] SORT_1 var_65 = var_65_arg_0 ? var_65_arg_1 : var_65_arg_2; [L145] SORT_1 next_66_arg_1 = var_65; [L146] SORT_5 var_67_arg_0 = var_58; [L147] SORT_5 var_67_arg_1 = var_29; [L148] SORT_5 var_67_arg_2 = input_7; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=6, input_3=0, input_4=0, input_6=7, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=34, next_60_arg_1=98, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=224, next_72_arg_1=1, next_80_arg_1=66, next_82_arg_1=1, next_84_arg_1=34, state_10=0, state_12=0, state_21=1, state_23=0, state_25=0, state_30=1, state_32=224, state_34=1, state_36=66, state_39=1, state_41=34, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=1, var_43_arg_0=1, var_43_arg_1=0, var_44=1, var_44_arg_0=1, var_44_arg_1=0, var_45=1, var_45_arg_0=1, var_46=1, var_46_arg_0=1, var_46_arg_1=1, var_46_arg_2=1, var_47=1, var_47_arg_0=1, var_47_arg_1=0, var_48=1, var_48_arg_0=1, var_48_arg_1=0, var_49=1, var_49_arg_0=1, var_49_arg_1=1, var_49_arg_2=1, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=34, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=34, var_55=98, var_55_arg_0=66, var_55_arg_1=224, var_56=98, var_56_arg_0=66, var_56_arg_1=224, var_57=98, var_57_arg_0=1, var_57_arg_1=98, var_57_arg_2=98, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=98, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=98, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=224, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=224, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=192, var_73_arg_0=1, var_73_arg_1=65, var_74=66, var_74_arg_0=1, var_74_arg_1=65, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=66, var_78_arg_0=1, var_78_arg_1=66, var_78_arg_2=192, var_79=66, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=66, var_81=1, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=1, var_83=34, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=34, var_9=0] [L149] EXPR var_67_arg_0 ? var_67_arg_1 : var_67_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=6, input_3=0, input_4=0, input_6=7, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=34, next_60_arg_1=98, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=224, next_72_arg_1=1, next_80_arg_1=66, next_82_arg_1=1, next_84_arg_1=34, state_10=0, state_12=0, state_21=1, state_23=0, state_25=0, state_30=1, state_32=224, state_34=1, state_36=66, state_39=1, state_41=34, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=1, var_43_arg_0=1, var_43_arg_1=0, var_44=1, var_44_arg_0=1, var_44_arg_1=0, var_45=1, var_45_arg_0=1, var_46=1, var_46_arg_0=1, var_46_arg_1=1, var_46_arg_2=1, var_47=1, var_47_arg_0=1, var_47_arg_1=0, var_48=1, var_48_arg_0=1, var_48_arg_1=0, var_49=1, var_49_arg_0=1, var_49_arg_1=1, var_49_arg_2=1, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=34, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=34, var_55=98, var_55_arg_0=66, var_55_arg_1=224, var_56=98, var_56_arg_0=66, var_56_arg_1=224, var_57=98, var_57_arg_0=1, var_57_arg_1=98, var_57_arg_2=98, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=98, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=98, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_0 ? var_67_arg_1 : var_67_arg_2=1, var_67_arg_1=0, var_67_arg_2=1, var_69=224, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=224, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=192, var_73_arg_0=1, var_73_arg_1=65, var_74=66, var_74_arg_0=1, var_74_arg_1=65, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=66, var_78_arg_0=1, var_78_arg_1=66, var_78_arg_2=192, var_79=66, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=66, var_81=1, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=1, var_83=34, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=34, var_9=0] [L149] SORT_5 var_67 = var_67_arg_0 ? var_67_arg_1 : var_67_arg_2; [L150] SORT_5 next_68_arg_1 = var_67; [L151] SORT_5 var_69_arg_0 = var_58; [L152] SORT_1 var_69_arg_1 = var_9; [L153] SORT_1 var_69_arg_2 = state_25; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=6, input_3=0, input_4=0, input_6=7, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=34, next_60_arg_1=98, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=224, next_72_arg_1=1, next_80_arg_1=66, next_82_arg_1=1, next_84_arg_1=34, state_10=0, state_12=0, state_21=1, state_23=0, state_25=0, state_30=1, state_32=224, state_34=1, state_36=66, state_39=1, state_41=34, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=1, var_43_arg_0=1, var_43_arg_1=0, var_44=1, var_44_arg_0=1, var_44_arg_1=0, var_45=1, var_45_arg_0=1, var_46=1, var_46_arg_0=1, var_46_arg_1=1, var_46_arg_2=1, var_47=1, var_47_arg_0=1, var_47_arg_1=0, var_48=1, var_48_arg_0=1, var_48_arg_1=0, var_49=1, var_49_arg_0=1, var_49_arg_1=1, var_49_arg_2=1, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=34, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=34, var_55=98, var_55_arg_0=66, var_55_arg_1=224, var_56=98, var_56_arg_0=66, var_56_arg_1=224, var_57=98, var_57_arg_0=1, var_57_arg_1=98, var_57_arg_2=98, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=98, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=98, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=224, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=192, var_73_arg_0=1, var_73_arg_1=65, var_74=66, var_74_arg_0=1, var_74_arg_1=65, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=66, var_78_arg_0=1, var_78_arg_1=66, var_78_arg_2=192, var_79=66, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=66, var_81=1, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=1, var_83=34, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=34, var_9=0] [L154] EXPR var_69_arg_0 ? var_69_arg_1 : var_69_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=6, input_3=0, input_4=0, input_6=7, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=34, next_60_arg_1=98, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=224, next_72_arg_1=1, next_80_arg_1=66, next_82_arg_1=1, next_84_arg_1=34, state_10=0, state_12=0, state_21=1, state_23=0, state_25=0, state_30=1, state_32=224, state_34=1, state_36=66, state_39=1, state_41=34, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=1, var_43_arg_0=1, var_43_arg_1=0, var_44=1, var_44_arg_0=1, var_44_arg_1=0, var_45=1, var_45_arg_0=1, var_46=1, var_46_arg_0=1, var_46_arg_1=1, var_46_arg_2=1, var_47=1, var_47_arg_0=1, var_47_arg_1=0, var_48=1, var_48_arg_0=1, var_48_arg_1=0, var_49=1, var_49_arg_0=1, var_49_arg_1=1, var_49_arg_2=1, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=34, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=34, var_55=98, var_55_arg_0=66, var_55_arg_1=224, var_56=98, var_56_arg_0=66, var_56_arg_1=224, var_57=98, var_57_arg_0=1, var_57_arg_1=98, var_57_arg_2=98, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=98, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=98, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=224, var_69_arg_0=0, var_69_arg_0 ? var_69_arg_1 : var_69_arg_2=0, var_69_arg_1=0, var_69_arg_2=0, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=192, var_73_arg_0=1, var_73_arg_1=65, var_74=66, var_74_arg_0=1, var_74_arg_1=65, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=66, var_78_arg_0=1, var_78_arg_1=66, var_78_arg_2=192, var_79=66, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=66, var_81=1, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=1, var_83=34, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=34, var_9=0] [L154] SORT_1 var_69 = var_69_arg_0 ? var_69_arg_1 : var_69_arg_2; [L155] SORT_1 next_70_arg_1 = var_69; [L156] SORT_5 var_71_arg_0 = var_58; [L157] SORT_5 var_71_arg_1 = var_29; [L158] SORT_5 var_71_arg_2 = state_30; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=6, input_3=0, input_4=0, input_6=7, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=34, next_60_arg_1=98, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=1, next_80_arg_1=66, next_82_arg_1=1, next_84_arg_1=34, state_10=0, state_12=0, state_21=1, state_23=0, state_25=0, state_30=1, state_32=224, state_34=1, state_36=66, state_39=1, state_41=34, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=1, var_43_arg_0=1, var_43_arg_1=0, var_44=1, var_44_arg_0=1, var_44_arg_1=0, var_45=1, var_45_arg_0=1, var_46=1, var_46_arg_0=1, var_46_arg_1=1, var_46_arg_2=1, var_47=1, var_47_arg_0=1, var_47_arg_1=0, var_48=1, var_48_arg_0=1, var_48_arg_1=0, var_49=1, var_49_arg_0=1, var_49_arg_1=1, var_49_arg_2=1, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=34, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=34, var_55=98, var_55_arg_0=66, var_55_arg_1=224, var_56=98, var_56_arg_0=66, var_56_arg_1=224, var_57=98, var_57_arg_0=1, var_57_arg_1=98, var_57_arg_2=98, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=98, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=98, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=192, var_73_arg_0=1, var_73_arg_1=65, var_74=66, var_74_arg_0=1, var_74_arg_1=65, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=66, var_78_arg_0=1, var_78_arg_1=66, var_78_arg_2=192, var_79=66, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=66, var_81=1, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=1, var_83=34, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=34, var_9=0] [L159] EXPR var_71_arg_0 ? var_71_arg_1 : var_71_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=6, input_3=0, input_4=0, input_6=7, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=34, next_60_arg_1=98, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=1, next_80_arg_1=66, next_82_arg_1=1, next_84_arg_1=34, state_10=0, state_12=0, state_21=1, state_23=0, state_25=0, state_30=1, state_32=224, state_34=1, state_36=66, state_39=1, state_41=34, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=1, var_43_arg_0=1, var_43_arg_1=0, var_44=1, var_44_arg_0=1, var_44_arg_1=0, var_45=1, var_45_arg_0=1, var_46=1, var_46_arg_0=1, var_46_arg_1=1, var_46_arg_2=1, var_47=1, var_47_arg_0=1, var_47_arg_1=0, var_48=1, var_48_arg_0=1, var_48_arg_1=0, var_49=1, var_49_arg_0=1, var_49_arg_1=1, var_49_arg_2=1, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=34, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=34, var_55=98, var_55_arg_0=66, var_55_arg_1=224, var_56=98, var_56_arg_0=66, var_56_arg_1=224, var_57=98, var_57_arg_0=1, var_57_arg_1=98, var_57_arg_2=98, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=98, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=98, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=1, var_71_arg_0=0, var_71_arg_0 ? var_71_arg_1 : var_71_arg_2=1, var_71_arg_1=0, var_71_arg_2=1, var_73=192, var_73_arg_0=1, var_73_arg_1=65, var_74=66, var_74_arg_0=1, var_74_arg_1=65, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=66, var_78_arg_0=1, var_78_arg_1=66, var_78_arg_2=192, var_79=66, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=66, var_81=1, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=1, var_83=34, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=34, var_9=0] [L159] SORT_5 var_71 = var_71_arg_0 ? var_71_arg_1 : var_71_arg_2; [L160] var_71 = var_71 & mask_SORT_5 [L161] SORT_5 next_72_arg_1 = var_71; [L162] SORT_1 var_76_arg_0 = state_21; [L163] SORT_1 var_76_arg_1 = var_75; [L164] SORT_1 var_76 = var_76_arg_0 & var_76_arg_1; [L165] var_76 = var_76 & mask_SORT_1 [L166] SORT_1 var_77_arg_0 = var_76; [L167] SORT_1 var_77_arg_1 = var_75; [L168] SORT_5 var_77 = var_77_arg_0 == var_77_arg_1; [L169] SORT_1 var_74_arg_0 = state_21; [L170] SORT_1 var_74_arg_1 = state_23; [L171] SORT_1 var_74 = var_74_arg_0 + var_74_arg_1; [L172] SORT_1 var_73_arg_0 = state_21; [L173] SORT_1 var_73_arg_1 = state_23; [L174] SORT_1 var_73 = var_73_arg_0 - var_73_arg_1; [L175] SORT_5 var_78_arg_0 = var_77; [L176] SORT_1 var_78_arg_1 = var_74; [L177] SORT_1 var_78_arg_2 = var_73; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=6, input_3=0, input_4=0, input_6=7, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=34, next_60_arg_1=98, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=1, next_80_arg_1=66, next_82_arg_1=1, next_84_arg_1=34, state_10=0, state_12=0, state_21=1, state_23=0, state_25=0, state_30=1, state_32=224, state_34=1, state_36=66, state_39=1, state_41=34, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=1, var_43_arg_0=1, var_43_arg_1=0, var_44=1, var_44_arg_0=1, var_44_arg_1=0, var_45=1, var_45_arg_0=1, var_46=1, var_46_arg_0=1, var_46_arg_1=1, var_46_arg_2=1, var_47=1, var_47_arg_0=1, var_47_arg_1=0, var_48=1, var_48_arg_0=1, var_48_arg_1=0, var_49=1, var_49_arg_0=1, var_49_arg_1=1, var_49_arg_2=1, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=34, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=34, var_55=98, var_55_arg_0=66, var_55_arg_1=224, var_56=98, var_56_arg_0=66, var_56_arg_1=224, var_57=98, var_57_arg_0=1, var_57_arg_1=98, var_57_arg_2=98, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=98, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=98, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=1, var_73_arg_0=1, var_73_arg_1=0, var_74=1, var_74_arg_0=1, var_74_arg_1=0, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=66, var_78_arg_0=1, var_78_arg_1=1, var_78_arg_2=1, var_79=66, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=66, var_81=1, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=1, var_83=34, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=34, var_9=0] [L178] EXPR var_78_arg_0 ? var_78_arg_1 : var_78_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=6, input_3=0, input_4=0, input_6=7, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=34, next_60_arg_1=98, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=1, next_80_arg_1=66, next_82_arg_1=1, next_84_arg_1=34, state_10=0, state_12=0, state_21=1, state_23=0, state_25=0, state_30=1, state_32=224, state_34=1, state_36=66, state_39=1, state_41=34, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=1, var_43_arg_0=1, var_43_arg_1=0, var_44=1, var_44_arg_0=1, var_44_arg_1=0, var_45=1, var_45_arg_0=1, var_46=1, var_46_arg_0=1, var_46_arg_1=1, var_46_arg_2=1, var_47=1, var_47_arg_0=1, var_47_arg_1=0, var_48=1, var_48_arg_0=1, var_48_arg_1=0, var_49=1, var_49_arg_0=1, var_49_arg_1=1, var_49_arg_2=1, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=34, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=34, var_55=98, var_55_arg_0=66, var_55_arg_1=224, var_56=98, var_56_arg_0=66, var_56_arg_1=224, var_57=98, var_57_arg_0=1, var_57_arg_1=98, var_57_arg_2=98, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=98, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=98, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=1, var_73_arg_0=1, var_73_arg_1=0, var_74=1, var_74_arg_0=1, var_74_arg_1=0, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=66, var_78_arg_0=1, var_78_arg_0 ? var_78_arg_1 : var_78_arg_2=1, var_78_arg_1=1, var_78_arg_2=1, var_79=66, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=66, var_81=1, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=1, var_83=34, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=34, var_9=0] [L178] SORT_1 var_78 = var_78_arg_0 ? var_78_arg_1 : var_78_arg_2; [L179] SORT_5 var_79_arg_0 = var_58; [L180] SORT_1 var_79_arg_1 = var_9; [L181] SORT_1 var_79_arg_2 = var_78; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=6, input_3=0, input_4=0, input_6=7, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=34, next_60_arg_1=98, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=1, next_80_arg_1=66, next_82_arg_1=1, next_84_arg_1=34, state_10=0, state_12=0, state_21=1, state_23=0, state_25=0, state_30=1, state_32=224, state_34=1, state_36=66, state_39=1, state_41=34, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=1, var_43_arg_0=1, var_43_arg_1=0, var_44=1, var_44_arg_0=1, var_44_arg_1=0, var_45=1, var_45_arg_0=1, var_46=1, var_46_arg_0=1, var_46_arg_1=1, var_46_arg_2=1, var_47=1, var_47_arg_0=1, var_47_arg_1=0, var_48=1, var_48_arg_0=1, var_48_arg_1=0, var_49=1, var_49_arg_0=1, var_49_arg_1=1, var_49_arg_2=1, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=34, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=34, var_55=98, var_55_arg_0=66, var_55_arg_1=224, var_56=98, var_56_arg_0=66, var_56_arg_1=224, var_57=98, var_57_arg_0=1, var_57_arg_1=98, var_57_arg_2=98, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=98, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=98, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=1, var_73_arg_0=1, var_73_arg_1=0, var_74=1, var_74_arg_0=1, var_74_arg_1=0, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=1, var_78_arg_0=1, var_78_arg_1=1, var_78_arg_2=1, var_79=66, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=1, var_81=1, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=1, var_83=34, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=34, var_9=0] [L182] EXPR var_79_arg_0 ? var_79_arg_1 : var_79_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=6, input_3=0, input_4=0, input_6=7, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=34, next_60_arg_1=98, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=1, next_80_arg_1=66, next_82_arg_1=1, next_84_arg_1=34, state_10=0, state_12=0, state_21=1, state_23=0, state_25=0, state_30=1, state_32=224, state_34=1, state_36=66, state_39=1, state_41=34, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=1, var_43_arg_0=1, var_43_arg_1=0, var_44=1, var_44_arg_0=1, var_44_arg_1=0, var_45=1, var_45_arg_0=1, var_46=1, var_46_arg_0=1, var_46_arg_1=1, var_46_arg_2=1, var_47=1, var_47_arg_0=1, var_47_arg_1=0, var_48=1, var_48_arg_0=1, var_48_arg_1=0, var_49=1, var_49_arg_0=1, var_49_arg_1=1, var_49_arg_2=1, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=34, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=34, var_55=98, var_55_arg_0=66, var_55_arg_1=224, var_56=98, var_56_arg_0=66, var_56_arg_1=224, var_57=98, var_57_arg_0=1, var_57_arg_1=98, var_57_arg_2=98, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=98, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=98, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=1, var_73_arg_0=1, var_73_arg_1=0, var_74=1, var_74_arg_0=1, var_74_arg_1=0, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=1, var_78_arg_0=1, var_78_arg_1=1, var_78_arg_2=1, var_79=66, var_79_arg_0=0, var_79_arg_0 ? var_79_arg_1 : var_79_arg_2=1, var_79_arg_1=0, var_79_arg_2=1, var_81=1, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=1, var_83=34, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=34, var_9=0] [L182] SORT_1 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L183] SORT_1 next_80_arg_1 = var_79; [L184] SORT_1 var_45_arg_0 = input_2; [L185] SORT_5 var_45 = var_45_arg_0 >> 0; [L186] var_45 = var_45 & mask_SORT_5 [L187] SORT_1 var_44_arg_0 = input_2; [L188] SORT_1 var_44_arg_1 = input_3; [L189] SORT_1 var_44 = var_44_arg_0 + var_44_arg_1; [L190] SORT_1 var_43_arg_0 = input_2; [L191] SORT_1 var_43_arg_1 = input_3; [L192] SORT_1 var_43 = var_43_arg_0 - var_43_arg_1; [L193] SORT_5 var_46_arg_0 = var_45; [L194] SORT_1 var_46_arg_1 = var_44; [L195] SORT_1 var_46_arg_2 = var_43; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=6, input_3=0, input_4=0, input_6=7, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=34, next_60_arg_1=98, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=1, next_80_arg_1=1, next_82_arg_1=1, next_84_arg_1=34, state_10=0, state_12=0, state_21=1, state_23=0, state_25=0, state_30=1, state_32=224, state_34=1, state_36=66, state_39=1, state_41=34, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=1, var_43_arg_0=1, var_43_arg_1=0, var_44=1, var_44_arg_0=1, var_44_arg_1=0, var_45=1, var_45_arg_0=1, var_46=1, var_46_arg_0=1, var_46_arg_1=1, var_46_arg_2=1, var_47=1, var_47_arg_0=1, var_47_arg_1=0, var_48=1, var_48_arg_0=1, var_48_arg_1=0, var_49=1, var_49_arg_0=1, var_49_arg_1=1, var_49_arg_2=1, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=34, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=34, var_55=98, var_55_arg_0=66, var_55_arg_1=224, var_56=98, var_56_arg_0=66, var_56_arg_1=224, var_57=98, var_57_arg_0=1, var_57_arg_1=98, var_57_arg_2=98, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=98, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=98, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=1, var_73_arg_0=1, var_73_arg_1=0, var_74=1, var_74_arg_0=1, var_74_arg_1=0, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=1, var_78_arg_0=1, var_78_arg_1=1, var_78_arg_2=1, var_79=1, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=1, var_81=1, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=1, var_83=34, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=34, var_9=0] [L196] EXPR var_46_arg_0 ? var_46_arg_1 : var_46_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=6, input_3=0, input_4=0, input_6=7, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=34, next_60_arg_1=98, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=1, next_80_arg_1=1, next_82_arg_1=1, next_84_arg_1=34, state_10=0, state_12=0, state_21=1, state_23=0, state_25=0, state_30=1, state_32=224, state_34=1, state_36=66, state_39=1, state_41=34, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=1, var_43_arg_0=1, var_43_arg_1=0, var_44=1, var_44_arg_0=1, var_44_arg_1=0, var_45=1, var_45_arg_0=1, var_46=1, var_46_arg_0=1, var_46_arg_0 ? var_46_arg_1 : var_46_arg_2=1, var_46_arg_1=1, var_46_arg_2=1, var_47=1, var_47_arg_0=1, var_47_arg_1=0, var_48=1, var_48_arg_0=1, var_48_arg_1=0, var_49=1, var_49_arg_0=1, var_49_arg_1=1, var_49_arg_2=1, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=34, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=34, var_55=98, var_55_arg_0=66, var_55_arg_1=224, var_56=98, var_56_arg_0=66, var_56_arg_1=224, var_57=98, var_57_arg_0=1, var_57_arg_1=98, var_57_arg_2=98, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=98, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=98, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=1, var_73_arg_0=1, var_73_arg_1=0, var_74=1, var_74_arg_0=1, var_74_arg_1=0, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=1, var_78_arg_0=1, var_78_arg_1=1, var_78_arg_2=1, var_79=1, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=1, var_81=1, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=1, var_83=34, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=34, var_9=0] [L196] SORT_1 var_46 = var_46_arg_0 ? var_46_arg_1 : var_46_arg_2; [L197] SORT_1 var_48_arg_0 = var_46; [L198] SORT_1 var_48_arg_1 = input_4; [L199] SORT_1 var_48 = var_48_arg_0 + var_48_arg_1; [L200] SORT_1 var_47_arg_0 = var_46; [L201] SORT_1 var_47_arg_1 = input_4; [L202] SORT_1 var_47 = var_47_arg_0 - var_47_arg_1; [L203] SORT_5 var_49_arg_0 = input_7; [L204] SORT_1 var_49_arg_1 = var_48; [L205] SORT_1 var_49_arg_2 = var_47; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=6, input_3=0, input_4=0, input_6=7, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=34, next_60_arg_1=98, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=1, next_80_arg_1=1, next_82_arg_1=1, next_84_arg_1=34, state_10=0, state_12=0, state_21=1, state_23=0, state_25=0, state_30=1, state_32=224, state_34=1, state_36=66, state_39=1, state_41=34, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=1, var_43_arg_0=1, var_43_arg_1=0, var_44=1, var_44_arg_0=1, var_44_arg_1=0, var_45=1, var_45_arg_0=1, var_46=1, var_46_arg_0=1, var_46_arg_1=1, var_46_arg_2=1, var_47=1, var_47_arg_0=1, var_47_arg_1=0, var_48=1, var_48_arg_0=1, var_48_arg_1=0, var_49=1, var_49_arg_0=1, var_49_arg_1=1, var_49_arg_2=1, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=34, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=34, var_55=98, var_55_arg_0=66, var_55_arg_1=224, var_56=98, var_56_arg_0=66, var_56_arg_1=224, var_57=98, var_57_arg_0=1, var_57_arg_1=98, var_57_arg_2=98, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=98, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=98, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=1, var_73_arg_0=1, var_73_arg_1=0, var_74=1, var_74_arg_0=1, var_74_arg_1=0, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=1, var_78_arg_0=1, var_78_arg_1=1, var_78_arg_2=1, var_79=1, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=1, var_81=1, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=1, var_83=34, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=34, var_9=0] [L206] EXPR var_49_arg_0 ? var_49_arg_1 : var_49_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=6, input_3=0, input_4=0, input_6=7, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=34, next_60_arg_1=98, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=1, next_80_arg_1=1, next_82_arg_1=1, next_84_arg_1=34, state_10=0, state_12=0, state_21=1, state_23=0, state_25=0, state_30=1, state_32=224, state_34=1, state_36=66, state_39=1, state_41=34, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=1, var_43_arg_0=1, var_43_arg_1=0, var_44=1, var_44_arg_0=1, var_44_arg_1=0, var_45=1, var_45_arg_0=1, var_46=1, var_46_arg_0=1, var_46_arg_1=1, var_46_arg_2=1, var_47=1, var_47_arg_0=1, var_47_arg_1=0, var_48=1, var_48_arg_0=1, var_48_arg_1=0, var_49=1, var_49_arg_0=1, var_49_arg_0 ? var_49_arg_1 : var_49_arg_2=1, var_49_arg_1=1, var_49_arg_2=1, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=34, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=34, var_55=98, var_55_arg_0=66, var_55_arg_1=224, var_56=98, var_56_arg_0=66, var_56_arg_1=224, var_57=98, var_57_arg_0=1, var_57_arg_1=98, var_57_arg_2=98, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=98, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=98, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=1, var_73_arg_0=1, var_73_arg_1=0, var_74=1, var_74_arg_0=1, var_74_arg_1=0, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=1, var_78_arg_0=1, var_78_arg_1=1, var_78_arg_2=1, var_79=1, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=1, var_81=1, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=1, var_83=34, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=34, var_9=0] [L206] SORT_1 var_49 = var_49_arg_0 ? var_49_arg_1 : var_49_arg_2; [L207] SORT_5 var_81_arg_0 = var_52; [L208] SORT_1 var_81_arg_1 = var_9; [L209] SORT_1 var_81_arg_2 = var_49; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=6, input_3=0, input_4=0, input_6=7, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=34, next_60_arg_1=98, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=1, next_80_arg_1=1, next_82_arg_1=1, next_84_arg_1=34, state_10=0, state_12=0, state_21=1, state_23=0, state_25=0, state_30=1, state_32=224, state_34=1, state_36=66, state_39=1, state_41=34, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=1, var_43_arg_0=1, var_43_arg_1=0, var_44=1, var_44_arg_0=1, var_44_arg_1=0, var_45=1, var_45_arg_0=1, var_46=1, var_46_arg_0=1, var_46_arg_1=1, var_46_arg_2=1, var_47=1, var_47_arg_0=1, var_47_arg_1=0, var_48=1, var_48_arg_0=1, var_48_arg_1=0, var_49=1, var_49_arg_0=1, var_49_arg_1=1, var_49_arg_2=1, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=34, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=34, var_55=98, var_55_arg_0=66, var_55_arg_1=224, var_56=98, var_56_arg_0=66, var_56_arg_1=224, var_57=98, var_57_arg_0=1, var_57_arg_1=98, var_57_arg_2=98, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=98, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=98, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=1, var_73_arg_0=1, var_73_arg_1=0, var_74=1, var_74_arg_0=1, var_74_arg_1=0, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=1, var_78_arg_0=1, var_78_arg_1=1, var_78_arg_2=1, var_79=1, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=1, var_81=1, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=1, var_83=34, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=34, var_9=0] [L210] EXPR var_81_arg_0 ? var_81_arg_1 : var_81_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=6, input_3=0, input_4=0, input_6=7, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=34, next_60_arg_1=98, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=1, next_80_arg_1=1, next_82_arg_1=1, next_84_arg_1=34, state_10=0, state_12=0, state_21=1, state_23=0, state_25=0, state_30=1, state_32=224, state_34=1, state_36=66, state_39=1, state_41=34, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=1, var_43_arg_0=1, var_43_arg_1=0, var_44=1, var_44_arg_0=1, var_44_arg_1=0, var_45=1, var_45_arg_0=1, var_46=1, var_46_arg_0=1, var_46_arg_1=1, var_46_arg_2=1, var_47=1, var_47_arg_0=1, var_47_arg_1=0, var_48=1, var_48_arg_0=1, var_48_arg_1=0, var_49=1, var_49_arg_0=1, var_49_arg_1=1, var_49_arg_2=1, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=34, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=34, var_55=98, var_55_arg_0=66, var_55_arg_1=224, var_56=98, var_56_arg_0=66, var_56_arg_1=224, var_57=98, var_57_arg_0=1, var_57_arg_1=98, var_57_arg_2=98, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=98, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=98, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=1, var_73_arg_0=1, var_73_arg_1=0, var_74=1, var_74_arg_0=1, var_74_arg_1=0, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=1, var_78_arg_0=1, var_78_arg_1=1, var_78_arg_2=1, var_79=1, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=1, var_81=1, var_81_arg_0=0, var_81_arg_0 ? var_81_arg_1 : var_81_arg_2=1, var_81_arg_1=0, var_81_arg_2=1, var_83=34, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=34, var_9=0] [L210] SORT_1 var_81 = var_81_arg_0 ? var_81_arg_1 : var_81_arg_2; [L211] SORT_1 next_82_arg_1 = var_81; [L212] SORT_5 var_83_arg_0 = var_52; [L213] SORT_1 var_83_arg_1 = var_9; [L214] SORT_1 var_83_arg_2 = state_39; VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=6, input_3=0, input_4=0, input_6=7, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=34, next_60_arg_1=98, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=1, next_80_arg_1=1, next_82_arg_1=1, next_84_arg_1=34, state_10=0, state_12=0, state_21=1, state_23=0, state_25=0, state_30=1, state_32=224, state_34=1, state_36=66, state_39=1, state_41=34, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=1, var_43_arg_0=1, var_43_arg_1=0, var_44=1, var_44_arg_0=1, var_44_arg_1=0, var_45=1, var_45_arg_0=1, var_46=1, var_46_arg_0=1, var_46_arg_1=1, var_46_arg_2=1, var_47=1, var_47_arg_0=1, var_47_arg_1=0, var_48=1, var_48_arg_0=1, var_48_arg_1=0, var_49=1, var_49_arg_0=1, var_49_arg_1=1, var_49_arg_2=1, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=34, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=34, var_55=98, var_55_arg_0=66, var_55_arg_1=224, var_56=98, var_56_arg_0=66, var_56_arg_1=224, var_57=98, var_57_arg_0=1, var_57_arg_1=98, var_57_arg_2=98, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=98, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=98, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=1, var_73_arg_0=1, var_73_arg_1=0, var_74=1, var_74_arg_0=1, var_74_arg_1=0, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=1, var_78_arg_0=1, var_78_arg_1=1, var_78_arg_2=1, var_79=1, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=1, var_81=1, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=1, var_83=34, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=1, var_9=0] [L215] EXPR var_83_arg_0 ? var_83_arg_1 : var_83_arg_2 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=6, input_3=0, input_4=0, input_6=7, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=34, next_60_arg_1=98, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=1, next_80_arg_1=1, next_82_arg_1=1, next_84_arg_1=34, state_10=0, state_12=0, state_21=1, state_23=0, state_25=0, state_30=1, state_32=224, state_34=1, state_36=66, state_39=1, state_41=34, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=1, var_43_arg_0=1, var_43_arg_1=0, var_44=1, var_44_arg_0=1, var_44_arg_1=0, var_45=1, var_45_arg_0=1, var_46=1, var_46_arg_0=1, var_46_arg_1=1, var_46_arg_2=1, var_47=1, var_47_arg_0=1, var_47_arg_1=0, var_48=1, var_48_arg_0=1, var_48_arg_1=0, var_49=1, var_49_arg_0=1, var_49_arg_1=1, var_49_arg_2=1, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=34, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=34, var_55=98, var_55_arg_0=66, var_55_arg_1=224, var_56=98, var_56_arg_0=66, var_56_arg_1=224, var_57=98, var_57_arg_0=1, var_57_arg_1=98, var_57_arg_2=98, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=98, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=98, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=1, var_73_arg_0=1, var_73_arg_1=0, var_74=1, var_74_arg_0=1, var_74_arg_1=0, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=1, var_78_arg_0=1, var_78_arg_1=1, var_78_arg_2=1, var_79=1, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=1, var_81=1, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=1, var_83=34, var_83_arg_0=0, var_83_arg_0 ? var_83_arg_1 : var_83_arg_2=1, var_83_arg_1=0, var_83_arg_2=1, var_9=0] [L215] SORT_1 var_83 = var_83_arg_0 ? var_83_arg_1 : var_83_arg_2; [L216] SORT_1 next_84_arg_1 = var_83; [L218] state_10 = next_54_arg_1 [L219] state_12 = next_60_arg_1 [L220] state_21 = next_62_arg_1 [L221] state_23 = next_64_arg_1 [L222] state_25 = next_66_arg_1 [L223] state_30 = next_68_arg_1 [L224] state_32 = next_70_arg_1 [L225] state_34 = next_72_arg_1 [L226] state_36 = next_80_arg_1 [L227] state_39 = next_82_arg_1 [L228] state_41 = next_84_arg_1 VAL [bad_20_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, input_2=1, input_27=6, input_3=0, input_4=0, input_6=7, input_7=1, input_8=0, mask_SORT_1=255, mask_SORT_5=1, msb_SORT_1=128, msb_SORT_5=1, next_54_arg_1=34, next_60_arg_1=98, next_62_arg_1=1, next_64_arg_1=0, next_66_arg_1=0, next_68_arg_1=1, next_70_arg_1=0, next_72_arg_1=1, next_80_arg_1=1, next_82_arg_1=1, next_84_arg_1=1, state_10=34, state_12=98, state_21=1, state_23=0, state_25=0, state_30=1, state_32=0, state_34=1, state_36=1, state_39=1, state_41=1, var_14=1, var_14_arg_0=0, var_14_arg_1=0, var_17=1, var_18=254, var_18_arg_0=1, var_19=0, var_19_arg_0=1, var_19_arg_1=254, var_29=0, var_43=1, var_43_arg_0=1, var_43_arg_1=0, var_44=1, var_44_arg_0=1, var_44_arg_1=0, var_45=1, var_45_arg_0=1, var_46=1, var_46_arg_0=1, var_46_arg_1=1, var_46_arg_2=1, var_47=1, var_47_arg_0=1, var_47_arg_1=0, var_48=1, var_48_arg_0=1, var_48_arg_1=0, var_49=1, var_49_arg_0=1, var_49_arg_1=1, var_49_arg_2=1, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=34, var_53_arg_0=0, var_53_arg_1=0, var_53_arg_2=34, var_55=98, var_55_arg_0=66, var_55_arg_1=224, var_56=98, var_56_arg_0=66, var_56_arg_1=224, var_57=98, var_57_arg_0=1, var_57_arg_1=98, var_57_arg_2=98, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=98, var_59_arg_0=0, var_59_arg_1=0, var_59_arg_2=98, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_61_arg_2=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_63_arg_2=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_65_arg_2=0, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_67_arg_2=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_69_arg_2=0, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=1, var_73=1, var_73_arg_0=1, var_73_arg_1=0, var_74=1, var_74_arg_0=1, var_74_arg_1=0, var_75=1, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_78=1, var_78_arg_0=1, var_78_arg_1=1, var_78_arg_2=1, var_79=1, var_79_arg_0=0, var_79_arg_1=0, var_79_arg_2=1, var_81=1, var_81_arg_0=0, var_81_arg_1=0, var_81_arg_2=1, var_83=1, var_83_arg_0=0, var_83_arg_1=0, var_83_arg_2=1, var_9=0] [L80] input_2 = __VERIFIER_nondet_uchar() [L81] input_3 = __VERIFIER_nondet_uchar() [L82] input_4 = __VERIFIER_nondet_uchar() [L83] input_6 = __VERIFIER_nondet_uchar() [L84] input_7 = __VERIFIER_nondet_uchar() [L85] input_7 = input_7 & mask_SORT_5 [L86] input_8 = __VERIFIER_nondet_uchar() [L87] input_8 = input_8 & mask_SORT_5 [L88] input_27 = __VERIFIER_nondet_uchar() [L91] SORT_1 var_14_arg_0 = state_10; [L92] SORT_1 var_14_arg_1 = state_12; [L93] SORT_5 var_14 = var_14_arg_0 == var_14_arg_1; [L94] SORT_5 var_18_arg_0 = var_14; [L95] SORT_5 var_18 = ~var_18_arg_0; [L96] SORT_5 var_19_arg_0 = var_17; [L97] SORT_5 var_19_arg_1 = var_18; [L98] SORT_5 var_19 = var_19_arg_0 & var_19_arg_1; [L99] var_19 = var_19 & mask_SORT_5 [L100] SORT_5 bad_20_arg_0 = var_19; [L101] CALL __VERIFIER_assert(!(bad_20_arg_0)) [L20] COND TRUE !(cond) VAL [\old(cond)=0, cond=0] [L20] reach_error() VAL [\old(cond)=0, cond=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 41 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 95.1s, OverallIterations: 44, TraceHistogramMax: 4, PathProgramHistogramMax: 3, EmptinessCheckTime: 0.1s, AutomataDifference: 25.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 13059 SdHoareTripleChecker+Valid, 5.6s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 13059 mSDsluCounter, 29167 SdHoareTripleChecker+Invalid, 4.8s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 6480 IncrementalHoareTripleChecker+Unchecked, 25281 mSDsCounter, 412 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 5067 IncrementalHoareTripleChecker+Invalid, 11959 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 412 mSolverCounterUnsat, 3886 mSDtfsCounter, 5067 mSolverCounterSat, 0.1s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 7897 GetRequests, 6995 SyntacticMatches, 17 SemanticMatches, 885 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8456 ImplicationChecksByTransitivity, 37.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=577occurred in iteration=43, InterpolantAutomatonStates: 623, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.8s AutomataMinimizationTime, 43 MinimizatonAttempts, 6844 StatesRemovedByMinimization, 43 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 2.5s SsaConstructionTime, 5.2s SatisfiabilityAnalysisTime, 43.9s InterpolantComputationTime, 4516 NumberOfCodeBlocks, 4483 NumberOfCodeBlocksAsserted, 76 NumberOfCheckSat, 7416 ConstructedInterpolants, 1420 QuantifiedInterpolants, 83537 SizeOfPredicates, 1084 NumberOfNonLiveVariables, 24179 ConjunctsInSsa, 1296 ConjunctsInUnsatCore, 105 InterpolantComputations, 33 PerfectInterpolantSequences, 2923/4945 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2022-11-03 02:55:04,059 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bff40cc8-046e-499a-9234-5e03d00c32c7/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE