./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.factorial4even.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 5e519f3a Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.factorial4even.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 01e407ff37f0e05cc0af0c9add6c9f6be76650fc51d4c59f5df1e4bebb9e67d5 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-5e519f3 [2022-11-03 03:35:45,498 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-03 03:35:45,500 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-03 03:35:45,529 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-03 03:35:45,530 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-03 03:35:45,531 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-03 03:35:45,533 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-03 03:35:45,535 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-03 03:35:45,537 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-03 03:35:45,538 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-03 03:35:45,539 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-03 03:35:45,541 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-03 03:35:45,541 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-03 03:35:45,543 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-03 03:35:45,544 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-03 03:35:45,546 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-03 03:35:45,547 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-03 03:35:45,548 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-03 03:35:45,551 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-03 03:35:45,553 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-03 03:35:45,555 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-03 03:35:45,557 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-03 03:35:45,559 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-03 03:35:45,560 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-03 03:35:45,565 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-03 03:35:45,565 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-03 03:35:45,566 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-03 03:35:45,567 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-03 03:35:45,568 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-03 03:35:45,569 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-03 03:35:45,570 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-03 03:35:45,571 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-03 03:35:45,572 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-03 03:35:45,573 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-03 03:35:45,574 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-03 03:35:45,575 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-03 03:35:45,576 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-03 03:35:45,576 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-03 03:35:45,576 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-03 03:35:45,578 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-03 03:35:45,579 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-03 03:35:45,580 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Default.epf [2022-11-03 03:35:45,606 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-03 03:35:45,606 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-03 03:35:45,607 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-03 03:35:45,607 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-03 03:35:45,608 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-03 03:35:45,608 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-03 03:35:45,608 INFO L138 SettingsManager]: * User list type=DISABLED [2022-11-03 03:35:45,609 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-11-03 03:35:45,609 INFO L138 SettingsManager]: * Explicit value domain=true [2022-11-03 03:35:45,609 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2022-11-03 03:35:45,609 INFO L138 SettingsManager]: * Octagon Domain=false [2022-11-03 03:35:45,609 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-11-03 03:35:45,610 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2022-11-03 03:35:45,610 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2022-11-03 03:35:45,610 INFO L138 SettingsManager]: * Interval Domain=false [2022-11-03 03:35:45,610 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2022-11-03 03:35:45,610 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2022-11-03 03:35:45,611 INFO L138 SettingsManager]: * Simplification Technique=POLY_PAC [2022-11-03 03:35:45,611 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-03 03:35:45,612 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-03 03:35:45,612 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-03 03:35:45,612 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-03 03:35:45,612 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-03 03:35:45,613 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-03 03:35:45,613 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-03 03:35:45,613 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-03 03:35:45,613 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-03 03:35:45,613 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-03 03:35:45,614 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-03 03:35:45,614 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 03:35:45,614 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-03 03:35:45,614 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2022-11-03 03:35:45,615 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-03 03:35:45,615 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-03 03:35:45,615 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2022-11-03 03:35:45,615 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-11-03 03:35:45,616 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-03 03:35:45,616 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-11-03 03:35:45,616 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 01e407ff37f0e05cc0af0c9add6c9f6be76650fc51d4c59f5df1e4bebb9e67d5 [2022-11-03 03:35:45,906 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-03 03:35:45,942 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-03 03:35:45,945 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-03 03:35:45,947 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-03 03:35:45,948 INFO L275 PluginConnector]: CDTParser initialized [2022-11-03 03:35:45,949 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.factorial4even.c [2022-11-03 03:35:46,044 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/data/b476a1a30/3f860804e87f4645abaa341db878155e/FLAGde296a439 [2022-11-03 03:35:46,619 INFO L306 CDTParser]: Found 1 translation units. [2022-11-03 03:35:46,619 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.factorial4even.c [2022-11-03 03:35:46,630 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/data/b476a1a30/3f860804e87f4645abaa341db878155e/FLAGde296a439 [2022-11-03 03:35:46,972 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/data/b476a1a30/3f860804e87f4645abaa341db878155e [2022-11-03 03:35:46,980 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-03 03:35:46,987 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-03 03:35:46,991 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-03 03:35:46,991 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-03 03:35:46,999 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-03 03:35:47,000 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 03:35:46" (1/1) ... [2022-11-03 03:35:47,001 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3bdeca13 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:35:47, skipping insertion in model container [2022-11-03 03:35:47,001 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 03:35:46" (1/1) ... [2022-11-03 03:35:47,011 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-03 03:35:47,032 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-03 03:35:47,254 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.factorial4even.c[1292,1305] [2022-11-03 03:35:47,306 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 03:35:47,309 INFO L203 MainTranslator]: Completed pre-run [2022-11-03 03:35:47,322 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.factorial4even.c[1292,1305] [2022-11-03 03:35:47,345 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 03:35:47,364 INFO L208 MainTranslator]: Completed translation [2022-11-03 03:35:47,365 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:35:47 WrapperNode [2022-11-03 03:35:47,365 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-03 03:35:47,368 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-03 03:35:47,368 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-03 03:35:47,369 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-03 03:35:47,375 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:35:47" (1/1) ... [2022-11-03 03:35:47,382 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:35:47" (1/1) ... [2022-11-03 03:35:47,405 INFO L138 Inliner]: procedures = 11, calls = 4, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 50 [2022-11-03 03:35:47,406 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-03 03:35:47,406 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-03 03:35:47,406 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-03 03:35:47,407 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-03 03:35:47,417 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:35:47" (1/1) ... [2022-11-03 03:35:47,417 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:35:47" (1/1) ... [2022-11-03 03:35:47,419 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:35:47" (1/1) ... [2022-11-03 03:35:47,419 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:35:47" (1/1) ... [2022-11-03 03:35:47,424 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:35:47" (1/1) ... [2022-11-03 03:35:47,428 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:35:47" (1/1) ... [2022-11-03 03:35:47,445 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:35:47" (1/1) ... [2022-11-03 03:35:47,446 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:35:47" (1/1) ... [2022-11-03 03:35:47,448 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-03 03:35:47,448 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-03 03:35:47,449 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-03 03:35:47,449 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-03 03:35:47,456 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:35:47" (1/1) ... [2022-11-03 03:35:47,464 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 03:35:47,475 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:35:47,488 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-03 03:35:47,517 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-03 03:35:47,537 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-03 03:35:47,537 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-03 03:35:47,537 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-11-03 03:35:47,538 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-11-03 03:35:47,624 INFO L235 CfgBuilder]: Building ICFG [2022-11-03 03:35:47,628 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-03 03:35:47,910 INFO L276 CfgBuilder]: Performing block encoding [2022-11-03 03:35:47,948 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-03 03:35:47,948 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-03 03:35:47,951 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 03:35:47 BoogieIcfgContainer [2022-11-03 03:35:47,951 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-03 03:35:47,953 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-03 03:35:47,954 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-03 03:35:47,964 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-03 03:35:47,965 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 03.11 03:35:46" (1/3) ... [2022-11-03 03:35:47,965 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@50bea710 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 03:35:47, skipping insertion in model container [2022-11-03 03:35:47,966 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:35:47" (2/3) ... [2022-11-03 03:35:47,966 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@50bea710 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 03:35:47, skipping insertion in model container [2022-11-03 03:35:47,966 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 03:35:47" (3/3) ... [2022-11-03 03:35:47,967 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.factorial4even.c [2022-11-03 03:35:48,014 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-03 03:35:48,014 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-03 03:35:48,107 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-03 03:35:48,119 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@5f6ad705, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-03 03:35:48,120 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-03 03:35:48,127 INFO L276 IsEmpty]: Start isEmpty. Operand has 13 states, 8 states have (on average 1.375) internal successors, (11), 9 states have internal predecessors, (11), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-03 03:35:48,137 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 7 [2022-11-03 03:35:48,137 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:35:48,138 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1] [2022-11-03 03:35:48,140 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:35:48,148 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:35:48,149 INFO L85 PathProgramCache]: Analyzing trace with hash 2014311611, now seen corresponding path program 1 times [2022-11-03 03:35:48,160 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-03 03:35:48,160 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1956647281] [2022-11-03 03:35:48,161 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:35:48,161 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-03 03:35:48,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:35:48,751 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:35:48,751 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-03 03:35:48,752 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1956647281] [2022-11-03 03:35:48,753 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1956647281] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:35:48,753 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:35:48,753 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-03 03:35:48,755 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1943161214] [2022-11-03 03:35:48,756 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:35:48,760 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-03 03:35:48,761 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-03 03:35:48,790 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-03 03:35:48,791 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-11-03 03:35:48,793 INFO L87 Difference]: Start difference. First operand has 13 states, 8 states have (on average 1.375) internal successors, (11), 9 states have internal predecessors, (11), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand has 6 states, 5 states have (on average 1.0) internal successors, (5), 4 states have internal predecessors, (5), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:35:48,919 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:35:48,919 INFO L93 Difference]: Finished difference Result 34 states and 47 transitions. [2022-11-03 03:35:48,921 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-03 03:35:48,923 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 1.0) internal successors, (5), 4 states have internal predecessors, (5), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 6 [2022-11-03 03:35:48,923 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:35:48,931 INFO L225 Difference]: With dead ends: 34 [2022-11-03 03:35:48,932 INFO L226 Difference]: Without dead ends: 22 [2022-11-03 03:35:48,935 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-11-03 03:35:48,939 INFO L413 NwaCegarLoop]: 9 mSDtfsCounter, 9 mSDsluCounter, 30 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 9 SdHoareTripleChecker+Valid, 37 SdHoareTripleChecker+Invalid, 40 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:35:48,941 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [9 Valid, 37 Invalid, 40 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 03:35:48,960 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2022-11-03 03:35:48,984 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 18. [2022-11-03 03:35:48,986 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 12 states have (on average 1.0833333333333333) internal successors, (13), 13 states have internal predecessors, (13), 3 states have call successors, (3), 2 states have call predecessors, (3), 2 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-03 03:35:48,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 19 transitions. [2022-11-03 03:35:48,988 INFO L78 Accepts]: Start accepts. Automaton has 18 states and 19 transitions. Word has length 6 [2022-11-03 03:35:48,989 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:35:48,989 INFO L495 AbstractCegarLoop]: Abstraction has 18 states and 19 transitions. [2022-11-03 03:35:48,989 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 1.0) internal successors, (5), 4 states have internal predecessors, (5), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:35:48,990 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 19 transitions. [2022-11-03 03:35:48,990 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2022-11-03 03:35:48,990 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:35:48,991 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:35:48,992 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-11-03 03:35:48,992 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:35:48,993 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:35:48,994 INFO L85 PathProgramCache]: Analyzing trace with hash 1372500953, now seen corresponding path program 1 times [2022-11-03 03:35:48,994 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-03 03:35:48,995 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [386395219] [2022-11-03 03:35:48,995 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:35:48,996 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-03 03:35:49,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:35:49,830 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:35:49,830 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-03 03:35:49,830 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [386395219] [2022-11-03 03:35:49,831 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [386395219] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:35:49,831 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:35:49,831 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-11-03 03:35:49,831 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [38144215] [2022-11-03 03:35:49,831 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:35:49,833 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-03 03:35:49,833 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-03 03:35:49,834 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-03 03:35:49,834 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-11-03 03:35:49,834 INFO L87 Difference]: Start difference. First operand 18 states and 19 transitions. Second operand has 6 states, 5 states have (on average 1.8) internal successors, (9), 5 states have internal predecessors, (9), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-11-03 03:35:49,937 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:35:49,937 INFO L93 Difference]: Finished difference Result 30 states and 32 transitions. [2022-11-03 03:35:49,937 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-03 03:35:49,938 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 1.8) internal successors, (9), 5 states have internal predecessors, (9), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 12 [2022-11-03 03:35:49,938 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:35:49,939 INFO L225 Difference]: With dead ends: 30 [2022-11-03 03:35:49,939 INFO L226 Difference]: Without dead ends: 28 [2022-11-03 03:35:49,940 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-11-03 03:35:49,941 INFO L413 NwaCegarLoop]: 15 mSDtfsCounter, 6 mSDsluCounter, 44 mSDsCounter, 0 mSdLazyCounter, 36 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 57 SdHoareTripleChecker+Invalid, 40 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 36 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:35:49,942 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 57 Invalid, 40 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 36 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 03:35:49,943 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2022-11-03 03:35:49,950 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 24. [2022-11-03 03:35:49,950 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 16 states have (on average 1.0625) internal successors, (17), 17 states have internal predecessors, (17), 4 states have call successors, (4), 3 states have call predecessors, (4), 3 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-11-03 03:35:49,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 25 transitions. [2022-11-03 03:35:49,951 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 25 transitions. Word has length 12 [2022-11-03 03:35:49,952 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:35:49,952 INFO L495 AbstractCegarLoop]: Abstraction has 24 states and 25 transitions. [2022-11-03 03:35:49,952 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 1.8) internal successors, (9), 5 states have internal predecessors, (9), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-11-03 03:35:49,953 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 25 transitions. [2022-11-03 03:35:49,953 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-11-03 03:35:49,953 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:35:49,954 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:35:49,954 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-11-03 03:35:49,954 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:35:49,955 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:35:49,955 INFO L85 PathProgramCache]: Analyzing trace with hash -718003265, now seen corresponding path program 1 times [2022-11-03 03:35:49,955 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-03 03:35:49,955 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1914255419] [2022-11-03 03:35:49,956 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:35:49,956 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-03 03:35:49,972 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-03 03:35:49,972 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1812620273] [2022-11-03 03:35:49,972 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:35:49,973 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:35:49,973 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:35:49,975 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:35:50,017 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-11-03 03:35:50,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-03 03:35:50,126 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-03 03:35:50,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-03 03:35:50,185 INFO L130 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2022-11-03 03:35:50,186 INFO L359 BasicCegarLoop]: Counterexample is feasible [2022-11-03 03:35:50,187 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-11-03 03:35:50,238 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-11-03 03:35:50,416 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:35:50,420 INFO L444 BasicCegarLoop]: Path program histogram: [1, 1, 1] [2022-11-03 03:35:50,424 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-03 03:35:50,449 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:35:50,456 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:35:50,464 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 03.11 03:35:50 BoogieIcfgContainer [2022-11-03 03:35:50,464 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-03 03:35:50,465 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-03 03:35:50,465 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-03 03:35:50,466 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-03 03:35:50,466 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 03:35:47" (3/4) ... [2022-11-03 03:35:50,475 INFO L140 WitnessPrinter]: No result that supports witness generation found [2022-11-03 03:35:50,475 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-03 03:35:50,476 INFO L158 Benchmark]: Toolchain (without parser) took 3488.29ms. Allocated memory was 115.3MB in the beginning and 148.9MB in the end (delta: 33.6MB). Free memory was 81.6MB in the beginning and 117.0MB in the end (delta: -35.5MB). There was no memory consumed. Max. memory is 16.1GB. [2022-11-03 03:35:50,477 INFO L158 Benchmark]: CDTParser took 0.36ms. Allocated memory is still 88.1MB. Free memory was 63.1MB in the beginning and 63.0MB in the end (delta: 27.2kB). There was no memory consumed. Max. memory is 16.1GB. [2022-11-03 03:35:50,482 INFO L158 Benchmark]: CACSL2BoogieTranslator took 374.89ms. Allocated memory is still 115.3MB. Free memory was 81.3MB in the beginning and 91.7MB in the end (delta: -10.4MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2022-11-03 03:35:50,483 INFO L158 Benchmark]: Boogie Procedure Inliner took 37.66ms. Allocated memory is still 115.3MB. Free memory was 91.2MB in the beginning and 89.6MB in the end (delta: 1.6MB). There was no memory consumed. Max. memory is 16.1GB. [2022-11-03 03:35:50,484 INFO L158 Benchmark]: Boogie Preprocessor took 41.54ms. Allocated memory is still 115.3MB. Free memory was 89.6MB in the beginning and 88.2MB in the end (delta: 1.4MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-11-03 03:35:50,484 INFO L158 Benchmark]: RCFGBuilder took 502.89ms. Allocated memory is still 115.3MB. Free memory was 88.2MB in the beginning and 76.1MB in the end (delta: 12.1MB). Peak memory consumption was 12.6MB. Max. memory is 16.1GB. [2022-11-03 03:35:50,485 INFO L158 Benchmark]: TraceAbstraction took 2511.29ms. Allocated memory was 115.3MB in the beginning and 148.9MB in the end (delta: 33.6MB). Free memory was 75.7MB in the beginning and 118.0MB in the end (delta: -42.4MB). There was no memory consumed. Max. memory is 16.1GB. [2022-11-03 03:35:50,485 INFO L158 Benchmark]: Witness Printer took 9.90ms. Allocated memory is still 148.9MB. Free memory was 118.0MB in the beginning and 117.0MB in the end (delta: 1.0MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-11-03 03:35:50,489 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.36ms. Allocated memory is still 88.1MB. Free memory was 63.1MB in the beginning and 63.0MB in the end (delta: 27.2kB). There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 374.89ms. Allocated memory is still 115.3MB. Free memory was 81.3MB in the beginning and 91.7MB in the end (delta: -10.4MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 37.66ms. Allocated memory is still 115.3MB. Free memory was 91.2MB in the beginning and 89.6MB in the end (delta: 1.6MB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 41.54ms. Allocated memory is still 115.3MB. Free memory was 89.6MB in the beginning and 88.2MB in the end (delta: 1.4MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * RCFGBuilder took 502.89ms. Allocated memory is still 115.3MB. Free memory was 88.2MB in the beginning and 76.1MB in the end (delta: 12.1MB). Peak memory consumption was 12.6MB. Max. memory is 16.1GB. * TraceAbstraction took 2511.29ms. Allocated memory was 115.3MB in the beginning and 148.9MB in the end (delta: 33.6MB). Free memory was 75.7MB in the beginning and 118.0MB in the end (delta: -42.4MB). There was no memory consumed. Max. memory is 16.1GB. * Witness Printer took 9.90ms. Allocated memory is still 148.9MB. Free memory was 118.0MB in the beginning and 117.0MB in the end (delta: 1.0MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 28]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: overapproximation of bitwiseAnd at line 75. Possible FailurePath: [L33] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 4); [L34] const SORT_1 msb_SORT_1 = (SORT_1)1 << (4 - 1); [L36] const SORT_12 mask_SORT_12 = (SORT_12)-1 >> (sizeof(SORT_12) * 8 - 1); [L37] const SORT_12 msb_SORT_12 = (SORT_12)1 << (1 - 1); [L39] const SORT_1 var_2 = 1; [L40] const SORT_1 var_11 = mask_SORT_1; [L41] const SORT_1 var_16 = 3; [L44] SORT_1 state_3 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L45] SORT_1 state_4 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L47] SORT_1 init_5_arg_1 = var_2; [L48] state_3 = init_5_arg_1 [L49] SORT_1 init_6_arg_1 = var_2; [L50] state_4 = init_6_arg_1 VAL [init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, state_3=1, state_4=1, var_11=15, var_16=3, var_2=1] [L55] SORT_1 var_13_arg_0 = state_4; [L56] SORT_1 var_13_arg_1 = var_11; [L57] SORT_12 var_13 = var_13_arg_0 == var_13_arg_1; [L58] SORT_12 bad_14_arg_0 = var_13; VAL [bad_14_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, state_3=1, state_4=1, var_11=15, var_13=0, var_13_arg_0=1, var_13_arg_1=15, var_16=3, var_2=1] [L59] CALL __VERIFIER_assert(!(bad_14_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L59] RET __VERIFIER_assert(!(bad_14_arg_0)) VAL [bad_14_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, state_3=1, state_4=1, var_11=15, var_13=0, var_13_arg_0=1, var_13_arg_1=15, var_16=3, var_2=1] [L60] SORT_1 var_17_arg_0 = state_4; [L61] SORT_1 var_17_arg_1 = var_16; [L62] SORT_12 var_17 = var_17_arg_0 > var_17_arg_1; [L63] SORT_1 var_15_arg_0 = state_3; [L64] SORT_12 var_15 = var_15_arg_0 >> 0; [L65] SORT_12 var_18_arg_0 = var_17; [L66] SORT_12 var_18_arg_1 = var_15; [L67] SORT_12 var_18 = var_18_arg_0 & var_18_arg_1; [L68] var_18 = var_18 & mask_SORT_12 [L69] SORT_12 bad_19_arg_0 = var_18; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, state_3=1, state_4=1, var_11=15, var_13=0, var_13_arg_0=1, var_13_arg_1=15, var_15=1, var_15_arg_0=1, var_16=3, var_17=0, var_17_arg_0=1, var_17_arg_1=3, var_18=0, var_18_arg_0=0, var_18_arg_1=1, var_2=1] [L70] CALL __VERIFIER_assert(!(bad_19_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L70] RET __VERIFIER_assert(!(bad_19_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, state_3=1, state_4=1, var_11=15, var_13=0, var_13_arg_0=1, var_13_arg_1=15, var_15=1, var_15_arg_0=1, var_16=3, var_17=0, var_17_arg_0=1, var_17_arg_1=3, var_18=0, var_18_arg_0=0, var_18_arg_1=1, var_2=1] [L72] SORT_1 var_7_arg_0 = state_4; [L73] SORT_1 var_7_arg_1 = var_2; [L74] SORT_1 var_7 = var_7_arg_0 + var_7_arg_1; [L75] var_7 = var_7 & mask_SORT_1 [L76] SORT_1 next_9_arg_1 = var_7; [L77] SORT_1 var_8_arg_0 = state_3; [L78] SORT_1 var_8_arg_1 = state_4; [L79] SORT_1 var_8 = var_8_arg_0 * var_8_arg_1; [L80] SORT_1 next_10_arg_1 = var_8; [L82] state_4 = next_9_arg_1 [L83] state_3 = next_10_arg_1 VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=1, next_9_arg_1=15, state_3=1, state_4=15, var_11=15, var_13=0, var_13_arg_0=1, var_13_arg_1=15, var_15=1, var_15_arg_0=1, var_16=3, var_17=0, var_17_arg_0=1, var_17_arg_1=3, var_18=0, var_18_arg_0=0, var_18_arg_1=1, var_2=1, var_7=15, var_7_arg_0=1, var_7_arg_1=1, var_8=1, var_8_arg_0=1, var_8_arg_1=1] [L55] SORT_1 var_13_arg_0 = state_4; [L56] SORT_1 var_13_arg_1 = var_11; [L57] SORT_12 var_13 = var_13_arg_0 == var_13_arg_1; [L58] SORT_12 bad_14_arg_0 = var_13; VAL [bad_14_arg_0=1, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=1, next_9_arg_1=15, state_3=1, state_4=15, var_11=15, var_13=1, var_13_arg_0=15, var_13_arg_1=15, var_15=1, var_15_arg_0=1, var_16=3, var_17=0, var_17_arg_0=1, var_17_arg_1=3, var_18=0, var_18_arg_0=0, var_18_arg_1=1, var_2=1, var_7=15, var_7_arg_0=1, var_7_arg_1=1, var_8=1, var_8_arg_0=1, var_8_arg_1=1] [L59] CALL __VERIFIER_assert(!(bad_14_arg_0)) VAL [\old(cond)=0] [L28] COND TRUE !(cond) VAL [\old(cond)=0, cond=0] [L28] reach_error() VAL [\old(cond)=0, cond=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 2 procedures, 13 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 2.3s, OverallIterations: 3, TraceHistogramMax: 3, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 0.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 16 SdHoareTripleChecker+Valid, 0.1s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 15 mSDsluCounter, 94 SdHoareTripleChecker+Invalid, 0.1s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 74 mSDsCounter, 10 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 70 IncrementalHoareTripleChecker+Invalid, 80 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 10 mSolverCounterUnsat, 24 mSDtfsCounter, 70 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=24occurred in iteration=2, InterpolantAutomatonStates: 16, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 2 MinimizatonAttempts, 8 StatesRemovedByMinimization, 2 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 1.1s InterpolantComputationTime, 37 NumberOfCodeBlocks, 37 NumberOfCodeBlocksAsserted, 3 NumberOfCheckSat, 16 ConstructedInterpolants, 0 QuantifiedInterpolants, 92 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 2 InterpolantComputations, 2 PerfectInterpolantSequences, 2/2 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2022-11-03 03:35:50,560 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.factorial4even.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 01e407ff37f0e05cc0af0c9add6c9f6be76650fc51d4c59f5df1e4bebb9e67d5 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-5e519f3 [2022-11-03 03:35:53,159 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-03 03:35:53,163 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-03 03:35:53,210 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-03 03:35:53,214 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-03 03:35:53,219 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-03 03:35:53,222 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-03 03:35:53,229 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-03 03:35:53,237 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-03 03:35:53,239 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-03 03:35:53,240 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-03 03:35:53,242 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-03 03:35:53,242 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-03 03:35:53,244 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-03 03:35:53,245 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-03 03:35:53,247 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-03 03:35:53,248 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-03 03:35:53,249 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-03 03:35:53,258 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-03 03:35:53,261 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-03 03:35:53,263 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-03 03:35:53,269 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-03 03:35:53,270 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-03 03:35:53,271 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-03 03:35:53,275 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-03 03:35:53,275 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-03 03:35:53,276 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-03 03:35:53,277 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-03 03:35:53,277 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-03 03:35:53,279 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-03 03:35:53,279 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-03 03:35:53,284 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-03 03:35:53,285 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-03 03:35:53,286 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-03 03:35:53,287 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-03 03:35:53,287 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-03 03:35:53,288 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-03 03:35:53,288 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-03 03:35:53,289 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-03 03:35:53,290 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-03 03:35:53,291 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-03 03:35:53,293 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Bitvector.epf [2022-11-03 03:35:53,347 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-03 03:35:53,348 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-03 03:35:53,348 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-03 03:35:53,348 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-03 03:35:53,349 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-03 03:35:53,349 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-03 03:35:53,349 INFO L138 SettingsManager]: * User list type=DISABLED [2022-11-03 03:35:53,350 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-11-03 03:35:53,350 INFO L138 SettingsManager]: * Explicit value domain=true [2022-11-03 03:35:53,350 INFO L138 SettingsManager]: * Octagon Domain=false [2022-11-03 03:35:53,350 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-11-03 03:35:53,351 INFO L138 SettingsManager]: * Interval Domain=false [2022-11-03 03:35:53,351 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-03 03:35:53,352 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-03 03:35:53,352 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-03 03:35:53,352 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-03 03:35:53,352 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-03 03:35:53,352 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-11-03 03:35:53,353 INFO L138 SettingsManager]: * Use bitvectors instead of ints=true [2022-11-03 03:35:53,353 INFO L138 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2022-11-03 03:35:53,353 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-03 03:35:53,353 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-03 03:35:53,354 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-03 03:35:53,354 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-03 03:35:53,354 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-03 03:35:53,354 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-03 03:35:53,354 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 03:35:53,355 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-03 03:35:53,355 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-03 03:35:53,355 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-03 03:35:53,355 INFO L138 SettingsManager]: * Trace refinement strategy=WALRUS [2022-11-03 03:35:53,356 INFO L138 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2022-11-03 03:35:53,360 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-03 03:35:53,361 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-11-03 03:35:53,361 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-11-03 03:35:53,361 INFO L138 SettingsManager]: * Logic for external solver=AUFBV WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 01e407ff37f0e05cc0af0c9add6c9f6be76650fc51d4c59f5df1e4bebb9e67d5 [2022-11-03 03:35:53,775 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-03 03:35:53,800 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-03 03:35:53,803 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-03 03:35:53,805 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-03 03:35:53,806 INFO L275 PluginConnector]: CDTParser initialized [2022-11-03 03:35:53,808 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.factorial4even.c [2022-11-03 03:35:53,903 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/data/8bc5421aa/d539a3b545aa44faab60e7164c7445f6/FLAG2defc6d91 [2022-11-03 03:35:54,572 INFO L306 CDTParser]: Found 1 translation units. [2022-11-03 03:35:54,573 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.factorial4even.c [2022-11-03 03:35:54,581 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/data/8bc5421aa/d539a3b545aa44faab60e7164c7445f6/FLAG2defc6d91 [2022-11-03 03:35:54,909 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/data/8bc5421aa/d539a3b545aa44faab60e7164c7445f6 [2022-11-03 03:35:54,913 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-03 03:35:54,915 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-03 03:35:54,916 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-03 03:35:54,917 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-03 03:35:54,929 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-03 03:35:54,930 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 03:35:54" (1/1) ... [2022-11-03 03:35:54,933 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6dd8e975 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:35:54, skipping insertion in model container [2022-11-03 03:35:54,933 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 03:35:54" (1/1) ... [2022-11-03 03:35:54,941 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-03 03:35:54,967 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-03 03:35:55,151 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.factorial4even.c[1292,1305] [2022-11-03 03:35:55,195 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 03:35:55,201 INFO L203 MainTranslator]: Completed pre-run [2022-11-03 03:35:55,220 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.factorial4even.c[1292,1305] [2022-11-03 03:35:55,267 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 03:35:55,287 INFO L208 MainTranslator]: Completed translation [2022-11-03 03:35:55,288 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:35:55 WrapperNode [2022-11-03 03:35:55,288 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-03 03:35:55,291 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-03 03:35:55,291 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-03 03:35:55,292 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-03 03:35:55,300 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:35:55" (1/1) ... [2022-11-03 03:35:55,314 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:35:55" (1/1) ... [2022-11-03 03:35:55,346 INFO L138 Inliner]: procedures = 11, calls = 4, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 50 [2022-11-03 03:35:55,346 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-03 03:35:55,348 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-03 03:35:55,348 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-03 03:35:55,348 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-03 03:35:55,359 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:35:55" (1/1) ... [2022-11-03 03:35:55,359 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:35:55" (1/1) ... [2022-11-03 03:35:55,375 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:35:55" (1/1) ... [2022-11-03 03:35:55,376 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:35:55" (1/1) ... [2022-11-03 03:35:55,388 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:35:55" (1/1) ... [2022-11-03 03:35:55,398 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:35:55" (1/1) ... [2022-11-03 03:35:55,399 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:35:55" (1/1) ... [2022-11-03 03:35:55,403 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:35:55" (1/1) ... [2022-11-03 03:35:55,406 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-03 03:35:55,410 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-03 03:35:55,411 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-03 03:35:55,411 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-03 03:35:55,412 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:35:55" (1/1) ... [2022-11-03 03:35:55,424 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 03:35:55,438 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:35:55,458 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-03 03:35:55,496 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-03 03:35:55,521 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-03 03:35:55,521 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-03 03:35:55,522 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-11-03 03:35:55,522 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-11-03 03:35:55,630 INFO L235 CfgBuilder]: Building ICFG [2022-11-03 03:35:55,634 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-03 03:35:55,866 INFO L276 CfgBuilder]: Performing block encoding [2022-11-03 03:35:55,874 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-03 03:35:55,875 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-03 03:35:55,877 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 03:35:55 BoogieIcfgContainer [2022-11-03 03:35:55,877 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-03 03:35:55,880 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-03 03:35:55,880 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-03 03:35:55,884 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-03 03:35:55,884 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 03.11 03:35:54" (1/3) ... [2022-11-03 03:35:55,885 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@24fea9a3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 03:35:55, skipping insertion in model container [2022-11-03 03:35:55,885 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:35:55" (2/3) ... [2022-11-03 03:35:55,886 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@24fea9a3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 03:35:55, skipping insertion in model container [2022-11-03 03:35:55,886 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 03:35:55" (3/3) ... [2022-11-03 03:35:55,887 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.factorial4even.c [2022-11-03 03:35:55,909 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-03 03:35:55,910 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-03 03:35:55,984 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-03 03:35:55,992 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@539252eb, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-03 03:35:55,993 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-03 03:35:56,009 INFO L276 IsEmpty]: Start isEmpty. Operand has 17 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 13 states have internal predecessors, (16), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-03 03:35:56,016 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2022-11-03 03:35:56,017 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:35:56,017 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:35:56,018 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:35:56,022 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:35:56,022 INFO L85 PathProgramCache]: Analyzing trace with hash 1810339678, now seen corresponding path program 1 times [2022-11-03 03:35:56,050 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:35:56,050 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [129232423] [2022-11-03 03:35:56,051 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:35:56,051 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:35:56,052 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:35:56,060 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:35:56,097 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (2)] Waiting until timeout for monitored process [2022-11-03 03:35:56,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:35:56,173 WARN L261 TraceCheckSpWp]: Trace formula consists of 24 conjuncts, 12 conjunts are in the unsatisfiable core [2022-11-03 03:35:56,180 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:35:56,413 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:35:56,418 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:35:56,419 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:35:56,419 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [129232423] [2022-11-03 03:35:56,420 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [129232423] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:35:56,420 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:35:56,421 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-11-03 03:35:56,423 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2000375455] [2022-11-03 03:35:56,424 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:35:56,430 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-03 03:35:56,431 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:35:56,474 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-03 03:35:56,475 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-11-03 03:35:56,477 INFO L87 Difference]: Start difference. First operand has 17 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 13 states have internal predecessors, (16), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand has 6 states, 5 states have (on average 1.2) internal successors, (6), 5 states have internal predecessors, (6), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:35:56,603 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:35:56,604 INFO L93 Difference]: Finished difference Result 38 states and 55 transitions. [2022-11-03 03:35:56,606 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-03 03:35:56,609 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 1.2) internal successors, (6), 5 states have internal predecessors, (6), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 7 [2022-11-03 03:35:56,609 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:35:56,628 INFO L225 Difference]: With dead ends: 38 [2022-11-03 03:35:56,637 INFO L226 Difference]: Without dead ends: 23 [2022-11-03 03:35:56,642 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-11-03 03:35:56,646 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 8 mSDsluCounter, 35 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 8 SdHoareTripleChecker+Valid, 46 SdHoareTripleChecker+Invalid, 37 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:35:56,647 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [8 Valid, 46 Invalid, 37 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 03:35:56,665 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2022-11-03 03:35:56,686 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 19. [2022-11-03 03:35:56,687 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 13 states have (on average 1.0769230769230769) internal successors, (14), 14 states have internal predecessors, (14), 3 states have call successors, (3), 2 states have call predecessors, (3), 2 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-03 03:35:56,689 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 20 transitions. [2022-11-03 03:35:56,690 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 20 transitions. Word has length 7 [2022-11-03 03:35:56,691 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:35:56,691 INFO L495 AbstractCegarLoop]: Abstraction has 19 states and 20 transitions. [2022-11-03 03:35:56,691 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 1.2) internal successors, (6), 5 states have internal predecessors, (6), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:35:56,692 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 20 transitions. [2022-11-03 03:35:56,692 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2022-11-03 03:35:56,693 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:35:56,693 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:35:56,712 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (2)] Forceful destruction successful, exit code 0 [2022-11-03 03:35:56,906 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:35:56,907 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:35:56,908 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:35:56,908 INFO L85 PathProgramCache]: Analyzing trace with hash 679252028, now seen corresponding path program 1 times [2022-11-03 03:35:56,909 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:35:56,909 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [270169612] [2022-11-03 03:35:56,909 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:35:56,909 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:35:56,909 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:35:56,911 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:35:56,928 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (3)] Waiting until timeout for monitored process [2022-11-03 03:35:56,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:35:56,961 INFO L263 TraceCheckSpWp]: Trace formula consists of 40 conjuncts, 14 conjunts are in the unsatisfiable core [2022-11-03 03:35:56,964 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:35:57,134 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:35:57,134 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:35:57,134 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:35:57,135 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [270169612] [2022-11-03 03:35:57,135 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [270169612] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:35:57,135 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:35:57,135 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-11-03 03:35:57,136 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [228595821] [2022-11-03 03:35:57,136 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:35:57,137 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-03 03:35:57,137 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:35:57,138 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-03 03:35:57,138 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-11-03 03:35:57,139 INFO L87 Difference]: Start difference. First operand 19 states and 20 transitions. Second operand has 6 states, 5 states have (on average 2.0) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-11-03 03:35:57,263 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:35:57,263 INFO L93 Difference]: Finished difference Result 31 states and 33 transitions. [2022-11-03 03:35:57,267 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-03 03:35:57,267 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 2.0) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 13 [2022-11-03 03:35:57,268 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:35:57,268 INFO L225 Difference]: With dead ends: 31 [2022-11-03 03:35:57,269 INFO L226 Difference]: Without dead ends: 29 [2022-11-03 03:35:57,269 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-11-03 03:35:57,271 INFO L413 NwaCegarLoop]: 17 mSDtfsCounter, 7 mSDsluCounter, 49 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 8 SdHoareTripleChecker+Valid, 66 SdHoareTripleChecker+Invalid, 37 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:35:57,272 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [8 Valid, 66 Invalid, 37 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 03:35:57,273 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2022-11-03 03:35:57,281 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 25. [2022-11-03 03:35:57,281 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 17 states have (on average 1.0588235294117647) internal successors, (18), 18 states have internal predecessors, (18), 4 states have call successors, (4), 3 states have call predecessors, (4), 3 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-11-03 03:35:57,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 26 transitions. [2022-11-03 03:35:57,282 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 26 transitions. Word has length 13 [2022-11-03 03:35:57,283 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:35:57,283 INFO L495 AbstractCegarLoop]: Abstraction has 25 states and 26 transitions. [2022-11-03 03:35:57,283 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 2.0) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-11-03 03:35:57,283 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 26 transitions. [2022-11-03 03:35:57,284 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2022-11-03 03:35:57,284 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:35:57,284 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:35:57,304 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (3)] Forceful destruction successful, exit code 0 [2022-11-03 03:35:57,497 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:35:57,498 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:35:57,499 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:35:57,499 INFO L85 PathProgramCache]: Analyzing trace with hash 1082860028, now seen corresponding path program 1 times [2022-11-03 03:35:57,500 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:35:57,500 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [264741811] [2022-11-03 03:35:57,500 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:35:57,501 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:35:57,501 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:35:57,508 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:35:57,510 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (4)] Waiting until timeout for monitored process [2022-11-03 03:35:57,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:35:57,588 INFO L263 TraceCheckSpWp]: Trace formula consists of 61 conjuncts, 17 conjunts are in the unsatisfiable core [2022-11-03 03:35:57,591 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:35:57,852 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-11-03 03:35:57,852 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:35:58,064 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-11-03 03:35:58,064 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:35:58,065 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [264741811] [2022-11-03 03:35:58,066 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [264741811] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:35:58,071 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1157249180] [2022-11-03 03:35:58,071 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:35:58,071 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 03:35:58,072 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 03:35:58,074 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 03:35:58,092 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (5)] Waiting until timeout for monitored process [2022-11-03 03:35:58,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:35:58,193 INFO L263 TraceCheckSpWp]: Trace formula consists of 61 conjuncts, 20 conjunts are in the unsatisfiable core [2022-11-03 03:35:58,195 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:35:58,365 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-11-03 03:35:58,365 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:35:58,442 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-11-03 03:35:58,442 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1157249180] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:35:58,442 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1773809559] [2022-11-03 03:35:58,442 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:35:58,443 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:35:58,443 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:35:58,445 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:35:58,468 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-11-03 03:35:58,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:35:58,514 INFO L263 TraceCheckSpWp]: Trace formula consists of 61 conjuncts, 20 conjunts are in the unsatisfiable core [2022-11-03 03:35:58,517 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:35:58,646 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 3 proven. 6 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 03:35:58,647 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:35:58,747 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-11-03 03:35:58,747 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1773809559] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:35:58,748 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 03:35:58,748 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 9, 7] total 12 [2022-11-03 03:35:58,749 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1916558381] [2022-11-03 03:35:58,749 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 03:35:58,751 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-11-03 03:35:58,751 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:35:58,752 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-11-03 03:35:58,754 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=106, Unknown=0, NotChecked=0, Total=132 [2022-11-03 03:35:58,755 INFO L87 Difference]: Start difference. First operand 25 states and 26 transitions. Second operand has 12 states, 11 states have (on average 2.0) internal successors, (22), 11 states have internal predecessors, (22), 3 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2022-11-03 03:35:59,196 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:35:59,196 INFO L93 Difference]: Finished difference Result 47 states and 53 transitions. [2022-11-03 03:35:59,197 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-11-03 03:35:59,197 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 11 states have (on average 2.0) internal successors, (22), 11 states have internal predecessors, (22), 3 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 20 [2022-11-03 03:35:59,198 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:35:59,199 INFO L225 Difference]: With dead ends: 47 [2022-11-03 03:35:59,199 INFO L226 Difference]: Without dead ends: 45 [2022-11-03 03:35:59,199 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 120 GetRequests, 104 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=65, Invalid=241, Unknown=0, NotChecked=0, Total=306 [2022-11-03 03:35:59,201 INFO L413 NwaCegarLoop]: 8 mSDtfsCounter, 25 mSDsluCounter, 32 mSDsCounter, 0 mSdLazyCounter, 150 mSolverCounterSat, 31 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 26 SdHoareTripleChecker+Valid, 40 SdHoareTripleChecker+Invalid, 181 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 31 IncrementalHoareTripleChecker+Valid, 150 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-03 03:35:59,201 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [26 Valid, 40 Invalid, 181 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [31 Valid, 150 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-03 03:35:59,202 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2022-11-03 03:35:59,214 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 42. [2022-11-03 03:35:59,215 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 28 states have (on average 1.0357142857142858) internal successors, (29), 29 states have internal predecessors, (29), 9 states have call successors, (9), 4 states have call predecessors, (9), 4 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) [2022-11-03 03:35:59,216 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 47 transitions. [2022-11-03 03:35:59,217 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 47 transitions. Word has length 20 [2022-11-03 03:35:59,217 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:35:59,217 INFO L495 AbstractCegarLoop]: Abstraction has 42 states and 47 transitions. [2022-11-03 03:35:59,218 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 11 states have (on average 2.0) internal successors, (22), 11 states have internal predecessors, (22), 3 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2022-11-03 03:35:59,218 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 47 transitions. [2022-11-03 03:35:59,218 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-11-03 03:35:59,219 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:35:59,219 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2022-11-03 03:35:59,237 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (5)] Forceful destruction successful, exit code 0 [2022-11-03 03:35:59,446 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2022-11-03 03:35:59,633 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (4)] Ended with exit code 0 [2022-11-03 03:35:59,824 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:35:59,824 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:35:59,825 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:35:59,825 INFO L85 PathProgramCache]: Analyzing trace with hash 2028547162, now seen corresponding path program 2 times [2022-11-03 03:35:59,826 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:35:59,826 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1115621777] [2022-11-03 03:35:59,826 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-03 03:35:59,826 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:35:59,826 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:35:59,832 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:35:59,866 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (7)] Waiting until timeout for monitored process [2022-11-03 03:35:59,895 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-03 03:35:59,895 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 03:35:59,898 INFO L263 TraceCheckSpWp]: Trace formula consists of 77 conjuncts, 20 conjunts are in the unsatisfiable core [2022-11-03 03:35:59,905 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:36:00,129 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-11-03 03:36:00,130 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:36:00,261 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:36:00,262 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1115621777] [2022-11-03 03:36:00,262 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1115621777] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-03 03:36:00,262 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1578833295] [2022-11-03 03:36:00,262 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-03 03:36:00,262 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 03:36:00,263 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 03:36:00,264 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 03:36:00,294 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (8)] Waiting until timeout for monitored process [2022-11-03 03:36:00,378 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-03 03:36:00,378 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 03:36:00,381 INFO L263 TraceCheckSpWp]: Trace formula consists of 77 conjuncts, 20 conjunts are in the unsatisfiable core [2022-11-03 03:36:00,384 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:36:00,542 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-11-03 03:36:00,543 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:36:00,615 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1578833295] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-03 03:36:00,616 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [315076484] [2022-11-03 03:36:00,617 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-03 03:36:00,617 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:36:00,617 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:36:00,620 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:36:00,641 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-11-03 03:36:00,688 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-03 03:36:00,689 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 03:36:00,696 INFO L263 TraceCheckSpWp]: Trace formula consists of 77 conjuncts, 23 conjunts are in the unsatisfiable core [2022-11-03 03:36:00,699 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:36:00,877 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 5 proven. 11 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-11-03 03:36:00,877 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:36:00,943 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [315076484] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-03 03:36:00,943 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-03 03:36:00,943 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 9] total 9 [2022-11-03 03:36:00,944 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1966907190] [2022-11-03 03:36:00,944 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-03 03:36:00,944 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-11-03 03:36:00,945 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:36:00,945 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-11-03 03:36:00,946 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2022-11-03 03:36:00,946 INFO L87 Difference]: Start difference. First operand 42 states and 47 transitions. Second operand has 9 states, 8 states have (on average 2.0) internal successors, (16), 8 states have internal predecessors, (16), 3 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-11-03 03:36:01,165 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:36:01,166 INFO L93 Difference]: Finished difference Result 48 states and 52 transitions. [2022-11-03 03:36:01,166 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-03 03:36:01,166 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 8 states have (on average 2.0) internal successors, (16), 8 states have internal predecessors, (16), 3 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 26 [2022-11-03 03:36:01,167 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:36:01,169 INFO L225 Difference]: With dead ends: 48 [2022-11-03 03:36:01,169 INFO L226 Difference]: Without dead ends: 46 [2022-11-03 03:36:01,170 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 97 GetRequests, 82 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=46, Invalid=164, Unknown=0, NotChecked=0, Total=210 [2022-11-03 03:36:01,171 INFO L413 NwaCegarLoop]: 10 mSDtfsCounter, 13 mSDsluCounter, 33 mSDsCounter, 0 mSdLazyCounter, 107 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 14 SdHoareTripleChecker+Valid, 43 SdHoareTripleChecker+Invalid, 118 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 107 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:36:01,171 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [14 Valid, 43 Invalid, 118 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 107 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 03:36:01,172 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2022-11-03 03:36:01,183 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2022-11-03 03:36:01,184 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 31 states have (on average 1.032258064516129) internal successors, (32), 32 states have internal predecessors, (32), 9 states have call successors, (9), 5 states have call predecessors, (9), 5 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) [2022-11-03 03:36:01,185 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 50 transitions. [2022-11-03 03:36:01,185 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 50 transitions. Word has length 26 [2022-11-03 03:36:01,186 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:36:01,186 INFO L495 AbstractCegarLoop]: Abstraction has 46 states and 50 transitions. [2022-11-03 03:36:01,186 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 8 states have (on average 2.0) internal successors, (16), 8 states have internal predecessors, (16), 3 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-11-03 03:36:01,186 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 50 transitions. [2022-11-03 03:36:01,187 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-11-03 03:36:01,187 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:36:01,188 INFO L195 NwaCegarLoop]: trace histogram [6, 5, 5, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1] [2022-11-03 03:36:01,206 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (7)] Forceful destruction successful, exit code 0 [2022-11-03 03:36:01,402 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (8)] Ended with exit code 0 [2022-11-03 03:36:01,623 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-11-03 03:36:01,802 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:36:01,802 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:36:01,803 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:36:01,803 INFO L85 PathProgramCache]: Analyzing trace with hash -690507524, now seen corresponding path program 3 times [2022-11-03 03:36:01,804 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:36:01,804 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [610315074] [2022-11-03 03:36:01,804 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-03 03:36:01,804 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:36:01,804 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:36:01,805 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:36:01,817 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (10)] Waiting until timeout for monitored process [2022-11-03 03:36:01,877 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-11-03 03:36:01,877 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 03:36:01,880 INFO L263 TraceCheckSpWp]: Trace formula consists of 98 conjuncts, 21 conjunts are in the unsatisfiable core [2022-11-03 03:36:01,884 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:36:02,143 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 10 proven. 13 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-11-03 03:36:02,143 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:36:02,240 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:36:02,240 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [610315074] [2022-11-03 03:36:02,240 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [610315074] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-03 03:36:02,241 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [779366645] [2022-11-03 03:36:02,241 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-03 03:36:02,241 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 03:36:02,241 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 03:36:02,242 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 03:36:02,276 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (11)] Waiting until timeout for monitored process [2022-11-03 03:36:02,378 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-11-03 03:36:02,378 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 03:36:02,381 INFO L263 TraceCheckSpWp]: Trace formula consists of 98 conjuncts, 21 conjunts are in the unsatisfiable core [2022-11-03 03:36:02,384 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:36:02,501 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 10 proven. 13 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-11-03 03:36:02,501 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:36:02,543 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [779366645] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-03 03:36:02,547 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2024540447] [2022-11-03 03:36:02,548 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-03 03:36:02,548 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:36:02,548 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:36:02,549 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:36:02,572 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-11-03 03:36:02,623 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-11-03 03:36:02,623 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 03:36:02,625 INFO L263 TraceCheckSpWp]: Trace formula consists of 98 conjuncts, 24 conjunts are in the unsatisfiable core [2022-11-03 03:36:02,627 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:36:02,783 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 21 proven. 14 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2022-11-03 03:36:02,783 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:36:02,856 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2024540447] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-03 03:36:02,856 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-03 03:36:02,857 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 10] total 11 [2022-11-03 03:36:02,857 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1761280495] [2022-11-03 03:36:02,857 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-03 03:36:02,857 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-11-03 03:36:02,858 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:36:02,858 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-11-03 03:36:02,858 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=128, Unknown=0, NotChecked=0, Total=156 [2022-11-03 03:36:02,859 INFO L87 Difference]: Start difference. First operand 46 states and 50 transitions. Second operand has 11 states, 9 states have (on average 2.2222222222222223) internal successors, (20), 10 states have internal predecessors, (20), 5 states have call successors, (7), 2 states have call predecessors, (7), 2 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2022-11-03 03:36:02,989 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:36:02,990 INFO L93 Difference]: Finished difference Result 52 states and 55 transitions. [2022-11-03 03:36:02,990 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-03 03:36:02,991 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 9 states have (on average 2.2222222222222223) internal successors, (20), 10 states have internal predecessors, (20), 5 states have call successors, (7), 2 states have call predecessors, (7), 2 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 39 [2022-11-03 03:36:02,991 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:36:02,992 INFO L225 Difference]: With dead ends: 52 [2022-11-03 03:36:02,992 INFO L226 Difference]: Without dead ends: 50 [2022-11-03 03:36:02,992 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 135 GetRequests, 119 SyntacticMatches, 3 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 1 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=41, Invalid=169, Unknown=0, NotChecked=0, Total=210 [2022-11-03 03:36:02,993 INFO L413 NwaCegarLoop]: 13 mSDtfsCounter, 10 mSDsluCounter, 59 mSDsCounter, 0 mSdLazyCounter, 59 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 10 SdHoareTripleChecker+Valid, 72 SdHoareTripleChecker+Invalid, 124 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 59 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 64 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:36:02,994 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [10 Valid, 72 Invalid, 124 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 59 Invalid, 0 Unknown, 64 Unchecked, 0.1s Time] [2022-11-03 03:36:02,994 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. [2022-11-03 03:36:03,006 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 50. [2022-11-03 03:36:03,006 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 34 states have (on average 1.0294117647058822) internal successors, (35), 35 states have internal predecessors, (35), 9 states have call successors, (9), 6 states have call predecessors, (9), 6 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) [2022-11-03 03:36:03,008 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 53 transitions. [2022-11-03 03:36:03,008 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 53 transitions. Word has length 39 [2022-11-03 03:36:03,008 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:36:03,008 INFO L495 AbstractCegarLoop]: Abstraction has 50 states and 53 transitions. [2022-11-03 03:36:03,009 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 9 states have (on average 2.2222222222222223) internal successors, (20), 10 states have internal predecessors, (20), 5 states have call successors, (7), 2 states have call predecessors, (7), 2 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2022-11-03 03:36:03,009 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 53 transitions. [2022-11-03 03:36:03,010 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2022-11-03 03:36:03,010 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:36:03,010 INFO L195 NwaCegarLoop]: trace histogram [8, 7, 7, 4, 4, 4, 4, 4, 3, 3, 1, 1, 1, 1] [2022-11-03 03:36:03,021 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (11)] Forceful destruction successful, exit code 0 [2022-11-03 03:36:03,237 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-11-03 03:36:03,424 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (10)] Forceful destruction successful, exit code 0 [2022-11-03 03:36:03,616 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:36:03,617 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:36:03,617 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:36:03,617 INFO L85 PathProgramCache]: Analyzing trace with hash 1442399130, now seen corresponding path program 4 times [2022-11-03 03:36:03,618 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:36:03,618 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1804866960] [2022-11-03 03:36:03,618 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-03 03:36:03,618 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:36:03,619 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:36:03,620 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:36:03,626 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (13)] Waiting until timeout for monitored process [2022-11-03 03:36:03,692 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-03 03:36:03,692 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 03:36:03,696 INFO L263 TraceCheckSpWp]: Trace formula consists of 151 conjuncts, 25 conjunts are in the unsatisfiable core [2022-11-03 03:36:03,699 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:36:04,096 INFO L134 CoverageAnalysis]: Checked inductivity of 125 backedges. 14 proven. 24 refuted. 0 times theorem prover too weak. 87 trivial. 0 not checked. [2022-11-03 03:36:04,097 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:36:04,181 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:36:04,181 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1804866960] [2022-11-03 03:36:04,182 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1804866960] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-03 03:36:04,182 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1374625467] [2022-11-03 03:36:04,182 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-03 03:36:04,182 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 03:36:04,182 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 03:36:04,185 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 03:36:04,198 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (14)] Waiting until timeout for monitored process [2022-11-03 03:36:04,338 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-03 03:36:04,338 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 03:36:04,342 INFO L263 TraceCheckSpWp]: Trace formula consists of 151 conjuncts, 25 conjunts are in the unsatisfiable core [2022-11-03 03:36:04,345 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:36:04,634 INFO L134 CoverageAnalysis]: Checked inductivity of 125 backedges. 14 proven. 24 refuted. 0 times theorem prover too weak. 87 trivial. 0 not checked. [2022-11-03 03:36:04,634 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:36:04,675 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1374625467] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-03 03:36:04,675 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1614685881] [2022-11-03 03:36:04,675 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-03 03:36:04,675 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:36:04,675 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:36:04,681 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:36:04,704 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-11-03 03:36:04,763 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-03 03:36:04,763 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 03:36:04,765 INFO L263 TraceCheckSpWp]: Trace formula consists of 151 conjuncts, 28 conjunts are in the unsatisfiable core [2022-11-03 03:36:04,767 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:36:05,074 INFO L134 CoverageAnalysis]: Checked inductivity of 125 backedges. 13 proven. 43 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2022-11-03 03:36:05,074 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:36:05,115 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1614685881] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-03 03:36:05,115 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-03 03:36:05,116 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 10] total 11 [2022-11-03 03:36:05,116 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [218170697] [2022-11-03 03:36:05,117 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-03 03:36:05,117 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-11-03 03:36:05,117 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:36:05,118 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-11-03 03:36:05,118 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=128, Unknown=0, NotChecked=0, Total=156 [2022-11-03 03:36:05,118 INFO L87 Difference]: Start difference. First operand 50 states and 53 transitions. Second operand has 11 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 5 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) [2022-11-03 03:36:05,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:36:05,245 INFO L93 Difference]: Finished difference Result 56 states and 58 transitions. [2022-11-03 03:36:05,246 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-03 03:36:05,246 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 5 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) Word has length 52 [2022-11-03 03:36:05,246 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:36:05,247 INFO L225 Difference]: With dead ends: 56 [2022-11-03 03:36:05,247 INFO L226 Difference]: Without dead ends: 54 [2022-11-03 03:36:05,248 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 174 GetRequests, 155 SyntacticMatches, 5 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 1 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=47, Invalid=193, Unknown=0, NotChecked=0, Total=240 [2022-11-03 03:36:05,248 INFO L413 NwaCegarLoop]: 13 mSDtfsCounter, 10 mSDsluCounter, 57 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 10 SdHoareTripleChecker+Valid, 70 SdHoareTripleChecker+Invalid, 94 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 55 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 03:36:05,249 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [10 Valid, 70 Invalid, 94 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 55 Unchecked, 0.0s Time] [2022-11-03 03:36:05,249 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2022-11-03 03:36:05,261 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 54. [2022-11-03 03:36:05,261 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 54 states, 37 states have (on average 1.027027027027027) internal successors, (38), 38 states have internal predecessors, (38), 9 states have call successors, (9), 7 states have call predecessors, (9), 7 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) [2022-11-03 03:36:05,262 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 56 transitions. [2022-11-03 03:36:05,262 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 56 transitions. Word has length 52 [2022-11-03 03:36:05,263 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:36:05,263 INFO L495 AbstractCegarLoop]: Abstraction has 54 states and 56 transitions. [2022-11-03 03:36:05,263 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 5 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) [2022-11-03 03:36:05,264 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 56 transitions. [2022-11-03 03:36:05,265 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2022-11-03 03:36:05,265 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:36:05,265 INFO L195 NwaCegarLoop]: trace histogram [9, 8, 8, 5, 5, 4, 4, 4, 4, 4, 1, 1, 1, 1] [2022-11-03 03:36:05,309 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Forceful destruction successful, exit code 0 [2022-11-03 03:36:05,492 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (13)] Forceful destruction successful, exit code 0 [2022-11-03 03:36:05,682 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (14)] Forceful destruction successful, exit code 0 [2022-11-03 03:36:05,880 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 15 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt [2022-11-03 03:36:05,881 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:36:05,881 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:36:05,881 INFO L85 PathProgramCache]: Analyzing trace with hash -962754338, now seen corresponding path program 5 times [2022-11-03 03:36:05,881 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:36:05,882 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [125947433] [2022-11-03 03:36:05,882 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-03 03:36:05,882 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:36:05,882 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:36:05,883 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:36:05,884 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (16)] Waiting until timeout for monitored process [2022-11-03 03:36:05,992 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 8 check-sat command(s) [2022-11-03 03:36:05,992 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 03:36:05,997 INFO L263 TraceCheckSpWp]: Trace formula consists of 172 conjuncts, 32 conjunts are in the unsatisfiable core [2022-11-03 03:36:06,000 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:36:06,418 INFO L134 CoverageAnalysis]: Checked inductivity of 166 backedges. 16 proven. 38 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2022-11-03 03:36:06,419 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:36:06,871 INFO L134 CoverageAnalysis]: Checked inductivity of 166 backedges. 16 proven. 38 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2022-11-03 03:36:06,871 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:36:06,872 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [125947433] [2022-11-03 03:36:06,881 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [125947433] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:36:06,881 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1311209067] [2022-11-03 03:36:06,881 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-03 03:36:06,881 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 03:36:06,881 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 03:36:06,885 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 03:36:06,923 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (17)] Waiting until timeout for monitored process [2022-11-03 03:36:07,135 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 8 check-sat command(s) [2022-11-03 03:36:07,135 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 03:36:07,140 INFO L263 TraceCheckSpWp]: Trace formula consists of 172 conjuncts, 37 conjunts are in the unsatisfiable core [2022-11-03 03:36:07,143 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:36:07,535 INFO L134 CoverageAnalysis]: Checked inductivity of 166 backedges. 27 proven. 48 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2022-11-03 03:36:07,536 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:36:07,841 INFO L134 CoverageAnalysis]: Checked inductivity of 166 backedges. 27 proven. 48 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2022-11-03 03:36:07,841 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1311209067] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:36:07,841 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1738697770] [2022-11-03 03:36:07,841 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-03 03:36:07,841 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:36:07,842 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:36:07,843 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:36:07,856 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-11-03 03:36:07,953 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 8 check-sat command(s) [2022-11-03 03:36:07,953 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 03:36:07,956 INFO L263 TraceCheckSpWp]: Trace formula consists of 172 conjuncts, 35 conjunts are in the unsatisfiable core [2022-11-03 03:36:07,959 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:36:08,221 INFO L134 CoverageAnalysis]: Checked inductivity of 166 backedges. 21 proven. 54 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2022-11-03 03:36:08,222 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:36:08,401 INFO L134 CoverageAnalysis]: Checked inductivity of 166 backedges. 16 proven. 38 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2022-11-03 03:36:08,401 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1738697770] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:36:08,401 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 03:36:08,401 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 13, 12, 12, 10] total 21 [2022-11-03 03:36:08,402 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1321917270] [2022-11-03 03:36:08,402 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 03:36:08,404 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2022-11-03 03:36:08,404 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:36:08,405 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2022-11-03 03:36:08,405 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=342, Unknown=0, NotChecked=0, Total=420 [2022-11-03 03:36:08,406 INFO L87 Difference]: Start difference. First operand 54 states and 56 transitions. Second operand has 21 states, 18 states have (on average 2.4444444444444446) internal successors, (44), 20 states have internal predecessors, (44), 11 states have call successors, (20), 3 states have call predecessors, (20), 2 states have return successors, (19), 8 states have call predecessors, (19), 10 states have call successors, (19) [2022-11-03 03:36:09,633 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:36:09,634 INFO L93 Difference]: Finished difference Result 88 states and 100 transitions. [2022-11-03 03:36:09,634 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-11-03 03:36:09,634 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 18 states have (on average 2.4444444444444446) internal successors, (44), 20 states have internal predecessors, (44), 11 states have call successors, (20), 3 states have call predecessors, (20), 2 states have return successors, (19), 8 states have call predecessors, (19), 10 states have call successors, (19) Word has length 59 [2022-11-03 03:36:09,635 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:36:09,636 INFO L225 Difference]: With dead ends: 88 [2022-11-03 03:36:09,636 INFO L226 Difference]: Without dead ends: 86 [2022-11-03 03:36:09,636 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 359 GetRequests, 329 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 113 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=194, Invalid=798, Unknown=0, NotChecked=0, Total=992 [2022-11-03 03:36:09,637 INFO L413 NwaCegarLoop]: 14 mSDtfsCounter, 44 mSDsluCounter, 81 mSDsCounter, 0 mSdLazyCounter, 460 mSolverCounterSat, 95 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 45 SdHoareTripleChecker+Valid, 95 SdHoareTripleChecker+Invalid, 555 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 95 IncrementalHoareTripleChecker+Valid, 460 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-11-03 03:36:09,638 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [45 Valid, 95 Invalid, 555 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [95 Valid, 460 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2022-11-03 03:36:09,638 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states. [2022-11-03 03:36:09,672 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 83. [2022-11-03 03:36:09,674 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 83 states, 55 states have (on average 1.018181818181818) internal successors, (56), 56 states have internal predecessors, (56), 19 states have call successors, (19), 8 states have call predecessors, (19), 8 states have return successors, (19), 18 states have call predecessors, (19), 19 states have call successors, (19) [2022-11-03 03:36:09,679 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 94 transitions. [2022-11-03 03:36:09,679 INFO L78 Accepts]: Start accepts. Automaton has 83 states and 94 transitions. Word has length 59 [2022-11-03 03:36:09,680 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:36:09,680 INFO L495 AbstractCegarLoop]: Abstraction has 83 states and 94 transitions. [2022-11-03 03:36:09,681 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 18 states have (on average 2.4444444444444446) internal successors, (44), 20 states have internal predecessors, (44), 11 states have call successors, (20), 3 states have call predecessors, (20), 2 states have return successors, (19), 8 states have call predecessors, (19), 10 states have call successors, (19) [2022-11-03 03:36:09,681 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 94 transitions. [2022-11-03 03:36:09,688 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2022-11-03 03:36:09,689 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:36:09,689 INFO L195 NwaCegarLoop]: trace histogram [19, 18, 18, 10, 10, 9, 9, 9, 9, 9, 1, 1, 1, 1] [2022-11-03 03:36:09,698 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (17)] Forceful destruction successful, exit code 0 [2022-11-03 03:36:09,910 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (16)] Forceful destruction successful, exit code 0 [2022-11-03 03:36:10,117 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Forceful destruction successful, exit code 0 [2022-11-03 03:36:10,292 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,16 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,18 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:36:10,292 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:36:10,293 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:36:10,293 INFO L85 PathProgramCache]: Analyzing trace with hash 1753079548, now seen corresponding path program 6 times [2022-11-03 03:36:10,293 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:36:10,294 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [241748054] [2022-11-03 03:36:10,294 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-11-03 03:36:10,294 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:36:10,294 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:36:10,300 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:36:10,302 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (19)] Waiting until timeout for monitored process [2022-11-03 03:36:10,484 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 15 check-sat command(s) [2022-11-03 03:36:10,485 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 03:36:10,491 INFO L263 TraceCheckSpWp]: Trace formula consists of 357 conjuncts, 57 conjunts are in the unsatisfiable core [2022-11-03 03:36:10,495 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:36:11,672 INFO L134 CoverageAnalysis]: Checked inductivity of 846 backedges. 36 proven. 198 refuted. 0 times theorem prover too weak. 612 trivial. 0 not checked. [2022-11-03 03:36:11,673 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:36:13,096 INFO L134 CoverageAnalysis]: Checked inductivity of 846 backedges. 36 proven. 198 refuted. 0 times theorem prover too weak. 612 trivial. 0 not checked. [2022-11-03 03:36:13,096 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:36:13,097 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [241748054] [2022-11-03 03:36:13,097 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [241748054] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:36:13,097 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [722438027] [2022-11-03 03:36:13,097 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-11-03 03:36:13,098 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 03:36:13,098 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 03:36:13,103 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 03:36:13,109 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (20)] Waiting until timeout for monitored process [2022-11-03 03:36:13,394 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 15 check-sat command(s) [2022-11-03 03:36:13,394 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 03:36:13,399 INFO L263 TraceCheckSpWp]: Trace formula consists of 357 conjuncts, 60 conjunts are in the unsatisfiable core [2022-11-03 03:36:13,403 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:36:14,067 INFO L134 CoverageAnalysis]: Checked inductivity of 846 backedges. 36 proven. 198 refuted. 0 times theorem prover too weak. 612 trivial. 0 not checked. [2022-11-03 03:36:14,068 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:36:14,481 INFO L134 CoverageAnalysis]: Checked inductivity of 846 backedges. 36 proven. 198 refuted. 0 times theorem prover too weak. 612 trivial. 0 not checked. [2022-11-03 03:36:14,482 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [722438027] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:36:14,482 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [3649757] [2022-11-03 03:36:14,482 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-11-03 03:36:14,482 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:36:14,482 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:36:14,484 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:36:14,506 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2022-11-03 03:36:14,656 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 15 check-sat command(s) [2022-11-03 03:36:14,656 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 03:36:14,661 INFO L263 TraceCheckSpWp]: Trace formula consists of 357 conjuncts, 64 conjunts are in the unsatisfiable core [2022-11-03 03:36:14,665 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:36:15,491 INFO L134 CoverageAnalysis]: Checked inductivity of 846 backedges. 35 proven. 250 refuted. 0 times theorem prover too weak. 561 trivial. 0 not checked. [2022-11-03 03:36:15,491 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:36:16,442 INFO L134 CoverageAnalysis]: Checked inductivity of 846 backedges. 35 proven. 250 refuted. 0 times theorem prover too weak. 561 trivial. 0 not checked. [2022-11-03 03:36:16,442 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [3649757] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:36:16,442 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 03:36:16,442 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 18, 18] total 32 [2022-11-03 03:36:16,442 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1689833906] [2022-11-03 03:36:16,443 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 03:36:16,444 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 32 states [2022-11-03 03:36:16,444 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:36:16,445 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2022-11-03 03:36:16,445 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=189, Invalid=803, Unknown=0, NotChecked=0, Total=992 [2022-11-03 03:36:16,446 INFO L87 Difference]: Start difference. First operand 83 states and 94 transitions. Second operand has 32 states, 29 states have (on average 2.586206896551724) internal successors, (75), 31 states have internal predecessors, (75), 21 states have call successors, (40), 3 states have call predecessors, (40), 2 states have return successors, (38), 18 states have call predecessors, (38), 20 states have call successors, (38) [2022-11-03 03:36:20,777 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:36:20,777 INFO L93 Difference]: Finished difference Result 147 states and 180 transitions. [2022-11-03 03:36:20,778 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2022-11-03 03:36:20,778 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 29 states have (on average 2.586206896551724) internal successors, (75), 31 states have internal predecessors, (75), 21 states have call successors, (40), 3 states have call predecessors, (40), 2 states have return successors, (38), 18 states have call predecessors, (38), 20 states have call successors, (38) Word has length 124 [2022-11-03 03:36:20,779 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:36:20,780 INFO L225 Difference]: With dead ends: 147 [2022-11-03 03:36:20,780 INFO L226 Difference]: Without dead ends: 145 [2022-11-03 03:36:20,782 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 760 GetRequests, 708 SyntacticMatches, 0 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 394 ImplicationChecksByTransitivity, 4.1s TimeCoverageRelationStatistics Valid=554, Invalid=2308, Unknown=0, NotChecked=0, Total=2862 [2022-11-03 03:36:20,783 INFO L413 NwaCegarLoop]: 24 mSDtfsCounter, 72 mSDsluCounter, 192 mSDsCounter, 0 mSdLazyCounter, 1287 mSolverCounterSat, 206 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 75 SdHoareTripleChecker+Valid, 216 SdHoareTripleChecker+Invalid, 1493 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 206 IncrementalHoareTripleChecker+Valid, 1287 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.2s IncrementalHoareTripleChecker+Time [2022-11-03 03:36:20,783 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [75 Valid, 216 Invalid, 1493 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [206 Valid, 1287 Invalid, 0 Unknown, 0 Unchecked, 2.2s Time] [2022-11-03 03:36:20,784 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2022-11-03 03:36:20,830 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 142. [2022-11-03 03:36:20,830 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 142 states, 91 states have (on average 1.010989010989011) internal successors, (92), 92 states have internal predecessors, (92), 41 states have call successors, (41), 9 states have call predecessors, (41), 9 states have return successors, (41), 40 states have call predecessors, (41), 41 states have call successors, (41) [2022-11-03 03:36:20,832 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 174 transitions. [2022-11-03 03:36:20,832 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 174 transitions. Word has length 124 [2022-11-03 03:36:20,833 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:36:20,833 INFO L495 AbstractCegarLoop]: Abstraction has 142 states and 174 transitions. [2022-11-03 03:36:20,834 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 32 states, 29 states have (on average 2.586206896551724) internal successors, (75), 31 states have internal predecessors, (75), 21 states have call successors, (40), 3 states have call predecessors, (40), 2 states have return successors, (38), 18 states have call predecessors, (38), 20 states have call successors, (38) [2022-11-03 03:36:20,834 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 174 transitions. [2022-11-03 03:36:20,836 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 190 [2022-11-03 03:36:20,836 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:36:20,836 INFO L195 NwaCegarLoop]: trace histogram [29, 28, 28, 15, 15, 14, 14, 14, 14, 14, 1, 1, 1, 1] [2022-11-03 03:36:20,877 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Forceful destruction successful, exit code 0 [2022-11-03 03:36:21,063 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (20)] Forceful destruction successful, exit code 0 [2022-11-03 03:36:21,270 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (19)] Forceful destruction successful, exit code 0 [2022-11-03 03:36:21,460 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 21 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,20 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,19 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:36:21,461 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:36:21,461 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:36:21,461 INFO L85 PathProgramCache]: Analyzing trace with hash 1810513054, now seen corresponding path program 7 times [2022-11-03 03:36:21,462 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:36:21,462 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1584674743] [2022-11-03 03:36:21,463 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-11-03 03:36:21,463 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:36:21,463 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:36:21,464 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:36:21,484 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (22)] Waiting until timeout for monitored process [2022-11-03 03:36:21,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-03 03:36:21,653 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-03 03:36:21,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-03 03:36:21,933 INFO L130 FreeRefinementEngine]: Strategy WALRUS found a feasible trace [2022-11-03 03:36:21,933 INFO L359 BasicCegarLoop]: Counterexample is feasible [2022-11-03 03:36:21,935 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-11-03 03:36:21,976 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (22)] Forceful destruction successful, exit code 0 [2022-11-03 03:36:22,161 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 22 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:36:22,165 INFO L444 BasicCegarLoop]: Path program histogram: [7, 1, 1] [2022-11-03 03:36:22,169 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-03 03:36:22,286 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:36:22,303 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:36:22,303 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:36:22,304 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:36:22,304 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:36:22,304 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:36:22,304 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:36:22,304 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:36:22,304 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:36:22,305 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:36:22,305 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:36:22,305 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:36:22,305 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:36:22,305 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:36:22,305 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:36:22,329 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 03.11 03:36:22 BoogieIcfgContainer [2022-11-03 03:36:22,329 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-03 03:36:22,330 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-03 03:36:22,330 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-03 03:36:22,330 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-03 03:36:22,331 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 03:35:55" (3/4) ... [2022-11-03 03:36:22,333 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2022-11-03 03:36:22,358 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:36:22,358 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:36:22,359 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:36:22,359 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:36:22,359 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:36:22,359 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:36:22,359 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:36:22,359 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:36:22,359 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:36:22,360 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:36:22,360 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:36:22,360 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:36:22,360 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:36:22,360 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:36:22,360 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:36:22,462 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/witness.graphml [2022-11-03 03:36:22,462 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-03 03:36:22,463 INFO L158 Benchmark]: Toolchain (without parser) took 27548.04ms. Allocated memory was 50.3MB in the beginning and 174.1MB in the end (delta: 123.7MB). Free memory was 26.0MB in the beginning and 53.4MB in the end (delta: -27.5MB). Peak memory consumption was 96.8MB. Max. memory is 16.1GB. [2022-11-03 03:36:22,463 INFO L158 Benchmark]: CDTParser took 0.36ms. Allocated memory is still 50.3MB. Free memory was 30.6MB in the beginning and 30.6MB in the end (delta: 46.3kB). There was no memory consumed. Max. memory is 16.1GB. [2022-11-03 03:36:22,463 INFO L158 Benchmark]: CACSL2BoogieTranslator took 372.56ms. Allocated memory was 50.3MB in the beginning and 60.8MB in the end (delta: 10.5MB). Free memory was 25.8MB in the beginning and 43.8MB in the end (delta: -18.0MB). Peak memory consumption was 12.3MB. Max. memory is 16.1GB. [2022-11-03 03:36:22,464 INFO L158 Benchmark]: Boogie Procedure Inliner took 55.58ms. Allocated memory is still 60.8MB. Free memory was 43.6MB in the beginning and 42.1MB in the end (delta: 1.5MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-11-03 03:36:22,464 INFO L158 Benchmark]: Boogie Preprocessor took 62.02ms. Allocated memory is still 60.8MB. Free memory was 42.1MB in the beginning and 40.9MB in the end (delta: 1.2MB). There was no memory consumed. Max. memory is 16.1GB. [2022-11-03 03:36:22,464 INFO L158 Benchmark]: RCFGBuilder took 466.91ms. Allocated memory is still 60.8MB. Free memory was 40.9MB in the beginning and 30.5MB in the end (delta: 10.4MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. [2022-11-03 03:36:22,465 INFO L158 Benchmark]: TraceAbstraction took 26449.59ms. Allocated memory was 60.8MB in the beginning and 174.1MB in the end (delta: 113.2MB). Free memory was 29.7MB in the beginning and 68.1MB in the end (delta: -38.4MB). Peak memory consumption was 76.1MB. Max. memory is 16.1GB. [2022-11-03 03:36:22,465 INFO L158 Benchmark]: Witness Printer took 132.18ms. Allocated memory is still 174.1MB. Free memory was 68.1MB in the beginning and 53.4MB in the end (delta: 14.7MB). Peak memory consumption was 14.7MB. Max. memory is 16.1GB. [2022-11-03 03:36:22,467 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.36ms. Allocated memory is still 50.3MB. Free memory was 30.6MB in the beginning and 30.6MB in the end (delta: 46.3kB). There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 372.56ms. Allocated memory was 50.3MB in the beginning and 60.8MB in the end (delta: 10.5MB). Free memory was 25.8MB in the beginning and 43.8MB in the end (delta: -18.0MB). Peak memory consumption was 12.3MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 55.58ms. Allocated memory is still 60.8MB. Free memory was 43.6MB in the beginning and 42.1MB in the end (delta: 1.5MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * Boogie Preprocessor took 62.02ms. Allocated memory is still 60.8MB. Free memory was 42.1MB in the beginning and 40.9MB in the end (delta: 1.2MB). There was no memory consumed. Max. memory is 16.1GB. * RCFGBuilder took 466.91ms. Allocated memory is still 60.8MB. Free memory was 40.9MB in the beginning and 30.5MB in the end (delta: 10.4MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. * TraceAbstraction took 26449.59ms. Allocated memory was 60.8MB in the beginning and 174.1MB in the end (delta: 113.2MB). Free memory was 29.7MB in the beginning and 68.1MB in the end (delta: -38.4MB). Peak memory consumption was 76.1MB. Max. memory is 16.1GB. * Witness Printer took 132.18ms. Allocated memory is still 174.1MB. Free memory was 68.1MB in the beginning and 53.4MB in the end (delta: 14.7MB). Peak memory consumption was 14.7MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 28]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L33] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 4); [L34] const SORT_1 msb_SORT_1 = (SORT_1)1 << (4 - 1); [L36] const SORT_12 mask_SORT_12 = (SORT_12)-1 >> (sizeof(SORT_12) * 8 - 1); [L37] const SORT_12 msb_SORT_12 = (SORT_12)1 << (1 - 1); [L39] const SORT_1 var_2 = 1; [L40] const SORT_1 var_11 = mask_SORT_1; [L41] const SORT_1 var_16 = 3; [L44] SORT_1 state_3 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L45] SORT_1 state_4 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L47] SORT_1 init_5_arg_1 = var_2; [L48] state_3 = init_5_arg_1 [L49] SORT_1 init_6_arg_1 = var_2; [L50] state_4 = init_6_arg_1 VAL [init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, state_3=1, state_4=1, var_11=15, var_16=3, var_2=1] [L55] SORT_1 var_13_arg_0 = state_4; [L56] SORT_1 var_13_arg_1 = var_11; [L57] SORT_12 var_13 = var_13_arg_0 == var_13_arg_1; [L58] SORT_12 bad_14_arg_0 = var_13; VAL [bad_14_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, state_3=1, state_4=1, var_11=15, var_13=0, var_13_arg_0=1, var_13_arg_1=15, var_16=3, var_2=1] [L59] CALL __VERIFIER_assert(!(bad_14_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L59] RET __VERIFIER_assert(!(bad_14_arg_0)) VAL [bad_14_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, state_3=1, state_4=1, var_11=15, var_13=0, var_13_arg_0=1, var_13_arg_1=15, var_16=3, var_2=1] [L60] SORT_1 var_17_arg_0 = state_4; [L61] SORT_1 var_17_arg_1 = var_16; [L62] SORT_12 var_17 = var_17_arg_0 > var_17_arg_1; [L63] SORT_1 var_15_arg_0 = state_3; [L64] SORT_12 var_15 = var_15_arg_0 >> 0; [L65] SORT_12 var_18_arg_0 = var_17; [L66] SORT_12 var_18_arg_1 = var_15; [L67] SORT_12 var_18 = var_18_arg_0 & var_18_arg_1; [L68] var_18 = var_18 & mask_SORT_12 [L69] SORT_12 bad_19_arg_0 = var_18; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, state_3=1, state_4=1, var_11=15, var_13=0, var_13_arg_0=1, var_13_arg_1=15, var_15=1, var_15_arg_0=1, var_16=3, var_17=0, var_17_arg_0=1, var_17_arg_1=3, var_18=0, var_18_arg_0=0, var_18_arg_1=1, var_2=1] [L70] CALL __VERIFIER_assert(!(bad_19_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L70] RET __VERIFIER_assert(!(bad_19_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, state_3=1, state_4=1, var_11=15, var_13=0, var_13_arg_0=1, var_13_arg_1=15, var_15=1, var_15_arg_0=1, var_16=3, var_17=0, var_17_arg_0=1, var_17_arg_1=3, var_18=0, var_18_arg_0=0, var_18_arg_1=1, var_2=1] [L72] SORT_1 var_7_arg_0 = state_4; [L73] SORT_1 var_7_arg_1 = var_2; [L74] SORT_1 var_7 = var_7_arg_0 + var_7_arg_1; [L75] var_7 = var_7 & mask_SORT_1 [L76] SORT_1 next_9_arg_1 = var_7; [L77] SORT_1 var_8_arg_0 = state_3; [L78] SORT_1 var_8_arg_1 = state_4; [L79] SORT_1 var_8 = var_8_arg_0 * var_8_arg_1; [L80] SORT_1 next_10_arg_1 = var_8; [L82] state_4 = next_9_arg_1 [L83] state_3 = next_10_arg_1 VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=1, next_9_arg_1=2, state_3=1, state_4=2, var_11=15, var_13=0, var_13_arg_0=1, var_13_arg_1=15, var_15=1, var_15_arg_0=1, var_16=3, var_17=0, var_17_arg_0=1, var_17_arg_1=3, var_18=0, var_18_arg_0=0, var_18_arg_1=1, var_2=1, var_7=2, var_7_arg_0=1, var_7_arg_1=1, var_8=1, var_8_arg_0=1, var_8_arg_1=1] [L55] SORT_1 var_13_arg_0 = state_4; [L56] SORT_1 var_13_arg_1 = var_11; [L57] SORT_12 var_13 = var_13_arg_0 == var_13_arg_1; [L58] SORT_12 bad_14_arg_0 = var_13; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=1, next_9_arg_1=2, state_3=1, state_4=2, var_11=15, var_13=0, var_13_arg_0=2, var_13_arg_1=15, var_15=1, var_15_arg_0=1, var_16=3, var_17=0, var_17_arg_0=1, var_17_arg_1=3, var_18=0, var_18_arg_0=0, var_18_arg_1=1, var_2=1, var_7=2, var_7_arg_0=1, var_7_arg_1=1, var_8=1, var_8_arg_0=1, var_8_arg_1=1] [L59] CALL __VERIFIER_assert(!(bad_14_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L59] RET __VERIFIER_assert(!(bad_14_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=1, next_9_arg_1=2, state_3=1, state_4=2, var_11=15, var_13=0, var_13_arg_0=2, var_13_arg_1=15, var_15=1, var_15_arg_0=1, var_16=3, var_17=0, var_17_arg_0=1, var_17_arg_1=3, var_18=0, var_18_arg_0=0, var_18_arg_1=1, var_2=1, var_7=2, var_7_arg_0=1, var_7_arg_1=1, var_8=1, var_8_arg_0=1, var_8_arg_1=1] [L60] SORT_1 var_17_arg_0 = state_4; [L61] SORT_1 var_17_arg_1 = var_16; [L62] SORT_12 var_17 = var_17_arg_0 > var_17_arg_1; [L63] SORT_1 var_15_arg_0 = state_3; [L64] SORT_12 var_15 = var_15_arg_0 >> 0; [L65] SORT_12 var_18_arg_0 = var_17; [L66] SORT_12 var_18_arg_1 = var_15; [L67] SORT_12 var_18 = var_18_arg_0 & var_18_arg_1; [L68] var_18 = var_18 & mask_SORT_12 [L69] SORT_12 bad_19_arg_0 = var_18; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=1, next_9_arg_1=2, state_3=1, state_4=2, var_11=15, var_13=0, var_13_arg_0=2, var_13_arg_1=15, var_15=1, var_15_arg_0=1, var_16=3, var_17=0, var_17_arg_0=2, var_17_arg_1=3, var_18=0, var_18_arg_0=0, var_18_arg_1=1, var_2=1, var_7=2, var_7_arg_0=1, var_7_arg_1=1, var_8=1, var_8_arg_0=1, var_8_arg_1=1] [L70] CALL __VERIFIER_assert(!(bad_19_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L70] RET __VERIFIER_assert(!(bad_19_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=1, next_9_arg_1=2, state_3=1, state_4=2, var_11=15, var_13=0, var_13_arg_0=2, var_13_arg_1=15, var_15=1, var_15_arg_0=1, var_16=3, var_17=0, var_17_arg_0=2, var_17_arg_1=3, var_18=0, var_18_arg_0=0, var_18_arg_1=1, var_2=1, var_7=2, var_7_arg_0=1, var_7_arg_1=1, var_8=1, var_8_arg_0=1, var_8_arg_1=1] [L72] SORT_1 var_7_arg_0 = state_4; [L73] SORT_1 var_7_arg_1 = var_2; [L74] SORT_1 var_7 = var_7_arg_0 + var_7_arg_1; [L75] var_7 = var_7 & mask_SORT_1 [L76] SORT_1 next_9_arg_1 = var_7; [L77] SORT_1 var_8_arg_0 = state_3; [L78] SORT_1 var_8_arg_1 = state_4; [L79] SORT_1 var_8 = var_8_arg_0 * var_8_arg_1; [L80] SORT_1 next_10_arg_1 = var_8; [L82] state_4 = next_9_arg_1 [L83] state_3 = next_10_arg_1 VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=2, next_9_arg_1=3, state_3=2, state_4=3, var_11=15, var_13=0, var_13_arg_0=2, var_13_arg_1=15, var_15=1, var_15_arg_0=1, var_16=3, var_17=0, var_17_arg_0=2, var_17_arg_1=3, var_18=0, var_18_arg_0=0, var_18_arg_1=1, var_2=1, var_7=3, var_7_arg_0=2, var_7_arg_1=1, var_8=2, var_8_arg_0=1, var_8_arg_1=2] [L55] SORT_1 var_13_arg_0 = state_4; [L56] SORT_1 var_13_arg_1 = var_11; [L57] SORT_12 var_13 = var_13_arg_0 == var_13_arg_1; [L58] SORT_12 bad_14_arg_0 = var_13; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=2, next_9_arg_1=3, state_3=2, state_4=3, var_11=15, var_13=0, var_13_arg_0=3, var_13_arg_1=15, var_15=1, var_15_arg_0=1, var_16=3, var_17=0, var_17_arg_0=2, var_17_arg_1=3, var_18=0, var_18_arg_0=0, var_18_arg_1=1, var_2=1, var_7=3, var_7_arg_0=2, var_7_arg_1=1, var_8=2, var_8_arg_0=1, var_8_arg_1=2] [L59] CALL __VERIFIER_assert(!(bad_14_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L59] RET __VERIFIER_assert(!(bad_14_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=2, next_9_arg_1=3, state_3=2, state_4=3, var_11=15, var_13=0, var_13_arg_0=3, var_13_arg_1=15, var_15=1, var_15_arg_0=1, var_16=3, var_17=0, var_17_arg_0=2, var_17_arg_1=3, var_18=0, var_18_arg_0=0, var_18_arg_1=1, var_2=1, var_7=3, var_7_arg_0=2, var_7_arg_1=1, var_8=2, var_8_arg_0=1, var_8_arg_1=2] [L60] SORT_1 var_17_arg_0 = state_4; [L61] SORT_1 var_17_arg_1 = var_16; [L62] SORT_12 var_17 = var_17_arg_0 > var_17_arg_1; [L63] SORT_1 var_15_arg_0 = state_3; [L64] SORT_12 var_15 = var_15_arg_0 >> 0; [L65] SORT_12 var_18_arg_0 = var_17; [L66] SORT_12 var_18_arg_1 = var_15; [L67] SORT_12 var_18 = var_18_arg_0 & var_18_arg_1; [L68] var_18 = var_18 & mask_SORT_12 [L69] SORT_12 bad_19_arg_0 = var_18; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=2, next_9_arg_1=3, state_3=2, state_4=3, var_11=15, var_13=0, var_13_arg_0=3, var_13_arg_1=15, var_15=2, var_15_arg_0=2, var_16=3, var_17=0, var_17_arg_0=3, var_17_arg_1=3, var_18=0, var_18_arg_0=0, var_18_arg_1=2, var_2=1, var_7=3, var_7_arg_0=2, var_7_arg_1=1, var_8=2, var_8_arg_0=1, var_8_arg_1=2] [L70] CALL __VERIFIER_assert(!(bad_19_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L70] RET __VERIFIER_assert(!(bad_19_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=2, next_9_arg_1=3, state_3=2, state_4=3, var_11=15, var_13=0, var_13_arg_0=3, var_13_arg_1=15, var_15=2, var_15_arg_0=2, var_16=3, var_17=0, var_17_arg_0=3, var_17_arg_1=3, var_18=0, var_18_arg_0=0, var_18_arg_1=2, var_2=1, var_7=3, var_7_arg_0=2, var_7_arg_1=1, var_8=2, var_8_arg_0=1, var_8_arg_1=2] [L72] SORT_1 var_7_arg_0 = state_4; [L73] SORT_1 var_7_arg_1 = var_2; [L74] SORT_1 var_7 = var_7_arg_0 + var_7_arg_1; [L75] var_7 = var_7 & mask_SORT_1 [L76] SORT_1 next_9_arg_1 = var_7; [L77] SORT_1 var_8_arg_0 = state_3; [L78] SORT_1 var_8_arg_1 = state_4; [L79] SORT_1 var_8 = var_8_arg_0 * var_8_arg_1; [L80] SORT_1 next_10_arg_1 = var_8; [L82] state_4 = next_9_arg_1 [L83] state_3 = next_10_arg_1 VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=6, next_9_arg_1=4, state_3=6, state_4=4, var_11=15, var_13=0, var_13_arg_0=3, var_13_arg_1=15, var_15=2, var_15_arg_0=2, var_16=3, var_17=0, var_17_arg_0=3, var_17_arg_1=3, var_18=0, var_18_arg_0=0, var_18_arg_1=2, var_2=1, var_7=4, var_7_arg_0=3, var_7_arg_1=1, var_8=6, var_8_arg_0=2, var_8_arg_1=3] [L55] SORT_1 var_13_arg_0 = state_4; [L56] SORT_1 var_13_arg_1 = var_11; [L57] SORT_12 var_13 = var_13_arg_0 == var_13_arg_1; [L58] SORT_12 bad_14_arg_0 = var_13; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=6, next_9_arg_1=4, state_3=6, state_4=4, var_11=15, var_13=0, var_13_arg_0=4, var_13_arg_1=15, var_15=2, var_15_arg_0=2, var_16=3, var_17=0, var_17_arg_0=3, var_17_arg_1=3, var_18=0, var_18_arg_0=0, var_18_arg_1=2, var_2=1, var_7=4, var_7_arg_0=3, var_7_arg_1=1, var_8=6, var_8_arg_0=2, var_8_arg_1=3] [L59] CALL __VERIFIER_assert(!(bad_14_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L59] RET __VERIFIER_assert(!(bad_14_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=6, next_9_arg_1=4, state_3=6, state_4=4, var_11=15, var_13=0, var_13_arg_0=4, var_13_arg_1=15, var_15=2, var_15_arg_0=2, var_16=3, var_17=0, var_17_arg_0=3, var_17_arg_1=3, var_18=0, var_18_arg_0=0, var_18_arg_1=2, var_2=1, var_7=4, var_7_arg_0=3, var_7_arg_1=1, var_8=6, var_8_arg_0=2, var_8_arg_1=3] [L60] SORT_1 var_17_arg_0 = state_4; [L61] SORT_1 var_17_arg_1 = var_16; [L62] SORT_12 var_17 = var_17_arg_0 > var_17_arg_1; [L63] SORT_1 var_15_arg_0 = state_3; [L64] SORT_12 var_15 = var_15_arg_0 >> 0; [L65] SORT_12 var_18_arg_0 = var_17; [L66] SORT_12 var_18_arg_1 = var_15; [L67] SORT_12 var_18 = var_18_arg_0 & var_18_arg_1; [L68] var_18 = var_18 & mask_SORT_12 [L69] SORT_12 bad_19_arg_0 = var_18; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=6, next_9_arg_1=4, state_3=6, state_4=4, var_11=15, var_13=0, var_13_arg_0=4, var_13_arg_1=15, var_15=6, var_15_arg_0=6, var_16=3, var_17=1, var_17_arg_0=4, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=6, var_2=1, var_7=4, var_7_arg_0=3, var_7_arg_1=1, var_8=6, var_8_arg_0=2, var_8_arg_1=3] [L70] CALL __VERIFIER_assert(!(bad_19_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L70] RET __VERIFIER_assert(!(bad_19_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=6, next_9_arg_1=4, state_3=6, state_4=4, var_11=15, var_13=0, var_13_arg_0=4, var_13_arg_1=15, var_15=6, var_15_arg_0=6, var_16=3, var_17=1, var_17_arg_0=4, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=6, var_2=1, var_7=4, var_7_arg_0=3, var_7_arg_1=1, var_8=6, var_8_arg_0=2, var_8_arg_1=3] [L72] SORT_1 var_7_arg_0 = state_4; [L73] SORT_1 var_7_arg_1 = var_2; [L74] SORT_1 var_7 = var_7_arg_0 + var_7_arg_1; [L75] var_7 = var_7 & mask_SORT_1 [L76] SORT_1 next_9_arg_1 = var_7; [L77] SORT_1 var_8_arg_0 = state_3; [L78] SORT_1 var_8_arg_1 = state_4; [L79] SORT_1 var_8 = var_8_arg_0 * var_8_arg_1; [L80] SORT_1 next_10_arg_1 = var_8; [L82] state_4 = next_9_arg_1 [L83] state_3 = next_10_arg_1 VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=24, next_9_arg_1=5, state_3=24, state_4=5, var_11=15, var_13=0, var_13_arg_0=4, var_13_arg_1=15, var_15=6, var_15_arg_0=6, var_16=3, var_17=1, var_17_arg_0=4, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=6, var_2=1, var_7=5, var_7_arg_0=4, var_7_arg_1=1, var_8=24, var_8_arg_0=6, var_8_arg_1=4] [L55] SORT_1 var_13_arg_0 = state_4; [L56] SORT_1 var_13_arg_1 = var_11; [L57] SORT_12 var_13 = var_13_arg_0 == var_13_arg_1; [L58] SORT_12 bad_14_arg_0 = var_13; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=24, next_9_arg_1=5, state_3=24, state_4=5, var_11=15, var_13=0, var_13_arg_0=5, var_13_arg_1=15, var_15=6, var_15_arg_0=6, var_16=3, var_17=1, var_17_arg_0=4, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=6, var_2=1, var_7=5, var_7_arg_0=4, var_7_arg_1=1, var_8=24, var_8_arg_0=6, var_8_arg_1=4] [L59] CALL __VERIFIER_assert(!(bad_14_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L59] RET __VERIFIER_assert(!(bad_14_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=24, next_9_arg_1=5, state_3=24, state_4=5, var_11=15, var_13=0, var_13_arg_0=5, var_13_arg_1=15, var_15=6, var_15_arg_0=6, var_16=3, var_17=1, var_17_arg_0=4, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=6, var_2=1, var_7=5, var_7_arg_0=4, var_7_arg_1=1, var_8=24, var_8_arg_0=6, var_8_arg_1=4] [L60] SORT_1 var_17_arg_0 = state_4; [L61] SORT_1 var_17_arg_1 = var_16; [L62] SORT_12 var_17 = var_17_arg_0 > var_17_arg_1; [L63] SORT_1 var_15_arg_0 = state_3; [L64] SORT_12 var_15 = var_15_arg_0 >> 0; [L65] SORT_12 var_18_arg_0 = var_17; [L66] SORT_12 var_18_arg_1 = var_15; [L67] SORT_12 var_18 = var_18_arg_0 & var_18_arg_1; [L68] var_18 = var_18 & mask_SORT_12 [L69] SORT_12 bad_19_arg_0 = var_18; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=24, next_9_arg_1=5, state_3=24, state_4=5, var_11=15, var_13=0, var_13_arg_0=5, var_13_arg_1=15, var_15=24, var_15_arg_0=24, var_16=3, var_17=1, var_17_arg_0=5, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=24, var_2=1, var_7=5, var_7_arg_0=4, var_7_arg_1=1, var_8=24, var_8_arg_0=6, var_8_arg_1=4] [L70] CALL __VERIFIER_assert(!(bad_19_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L70] RET __VERIFIER_assert(!(bad_19_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=24, next_9_arg_1=5, state_3=24, state_4=5, var_11=15, var_13=0, var_13_arg_0=5, var_13_arg_1=15, var_15=24, var_15_arg_0=24, var_16=3, var_17=1, var_17_arg_0=5, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=24, var_2=1, var_7=5, var_7_arg_0=4, var_7_arg_1=1, var_8=24, var_8_arg_0=6, var_8_arg_1=4] [L72] SORT_1 var_7_arg_0 = state_4; [L73] SORT_1 var_7_arg_1 = var_2; [L74] SORT_1 var_7 = var_7_arg_0 + var_7_arg_1; [L75] var_7 = var_7 & mask_SORT_1 [L76] SORT_1 next_9_arg_1 = var_7; [L77] SORT_1 var_8_arg_0 = state_3; [L78] SORT_1 var_8_arg_1 = state_4; [L79] SORT_1 var_8 = var_8_arg_0 * var_8_arg_1; [L80] SORT_1 next_10_arg_1 = var_8; [L82] state_4 = next_9_arg_1 [L83] state_3 = next_10_arg_1 VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=120, next_9_arg_1=6, state_3=120, state_4=6, var_11=15, var_13=0, var_13_arg_0=5, var_13_arg_1=15, var_15=24, var_15_arg_0=24, var_16=3, var_17=1, var_17_arg_0=5, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=24, var_2=1, var_7=6, var_7_arg_0=5, var_7_arg_1=1, var_8=120, var_8_arg_0=24, var_8_arg_1=5] [L55] SORT_1 var_13_arg_0 = state_4; [L56] SORT_1 var_13_arg_1 = var_11; [L57] SORT_12 var_13 = var_13_arg_0 == var_13_arg_1; [L58] SORT_12 bad_14_arg_0 = var_13; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=120, next_9_arg_1=6, state_3=120, state_4=6, var_11=15, var_13=0, var_13_arg_0=6, var_13_arg_1=15, var_15=24, var_15_arg_0=24, var_16=3, var_17=1, var_17_arg_0=5, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=24, var_2=1, var_7=6, var_7_arg_0=5, var_7_arg_1=1, var_8=120, var_8_arg_0=24, var_8_arg_1=5] [L59] CALL __VERIFIER_assert(!(bad_14_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L59] RET __VERIFIER_assert(!(bad_14_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=120, next_9_arg_1=6, state_3=120, state_4=6, var_11=15, var_13=0, var_13_arg_0=6, var_13_arg_1=15, var_15=24, var_15_arg_0=24, var_16=3, var_17=1, var_17_arg_0=5, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=24, var_2=1, var_7=6, var_7_arg_0=5, var_7_arg_1=1, var_8=120, var_8_arg_0=24, var_8_arg_1=5] [L60] SORT_1 var_17_arg_0 = state_4; [L61] SORT_1 var_17_arg_1 = var_16; [L62] SORT_12 var_17 = var_17_arg_0 > var_17_arg_1; [L63] SORT_1 var_15_arg_0 = state_3; [L64] SORT_12 var_15 = var_15_arg_0 >> 0; [L65] SORT_12 var_18_arg_0 = var_17; [L66] SORT_12 var_18_arg_1 = var_15; [L67] SORT_12 var_18 = var_18_arg_0 & var_18_arg_1; [L68] var_18 = var_18 & mask_SORT_12 [L69] SORT_12 bad_19_arg_0 = var_18; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=120, next_9_arg_1=6, state_3=120, state_4=6, var_11=15, var_13=0, var_13_arg_0=6, var_13_arg_1=15, var_15=120, var_15_arg_0=120, var_16=3, var_17=1, var_17_arg_0=6, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=120, var_2=1, var_7=6, var_7_arg_0=5, var_7_arg_1=1, var_8=120, var_8_arg_0=24, var_8_arg_1=5] [L70] CALL __VERIFIER_assert(!(bad_19_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L70] RET __VERIFIER_assert(!(bad_19_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=120, next_9_arg_1=6, state_3=120, state_4=6, var_11=15, var_13=0, var_13_arg_0=6, var_13_arg_1=15, var_15=120, var_15_arg_0=120, var_16=3, var_17=1, var_17_arg_0=6, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=120, var_2=1, var_7=6, var_7_arg_0=5, var_7_arg_1=1, var_8=120, var_8_arg_0=24, var_8_arg_1=5] [L72] SORT_1 var_7_arg_0 = state_4; [L73] SORT_1 var_7_arg_1 = var_2; [L74] SORT_1 var_7 = var_7_arg_0 + var_7_arg_1; [L75] var_7 = var_7 & mask_SORT_1 [L76] SORT_1 next_9_arg_1 = var_7; [L77] SORT_1 var_8_arg_0 = state_3; [L78] SORT_1 var_8_arg_1 = state_4; [L79] SORT_1 var_8 = var_8_arg_0 * var_8_arg_1; [L80] SORT_1 next_10_arg_1 = var_8; [L82] state_4 = next_9_arg_1 [L83] state_3 = next_10_arg_1 VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=208, next_9_arg_1=7, state_3=208, state_4=7, var_11=15, var_13=0, var_13_arg_0=6, var_13_arg_1=15, var_15=120, var_15_arg_0=120, var_16=3, var_17=1, var_17_arg_0=6, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=120, var_2=1, var_7=7, var_7_arg_0=6, var_7_arg_1=1, var_8=208, var_8_arg_0=120, var_8_arg_1=6] [L55] SORT_1 var_13_arg_0 = state_4; [L56] SORT_1 var_13_arg_1 = var_11; [L57] SORT_12 var_13 = var_13_arg_0 == var_13_arg_1; [L58] SORT_12 bad_14_arg_0 = var_13; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=208, next_9_arg_1=7, state_3=208, state_4=7, var_11=15, var_13=0, var_13_arg_0=7, var_13_arg_1=15, var_15=120, var_15_arg_0=120, var_16=3, var_17=1, var_17_arg_0=6, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=120, var_2=1, var_7=7, var_7_arg_0=6, var_7_arg_1=1, var_8=208, var_8_arg_0=120, var_8_arg_1=6] [L59] CALL __VERIFIER_assert(!(bad_14_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L59] RET __VERIFIER_assert(!(bad_14_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=208, next_9_arg_1=7, state_3=208, state_4=7, var_11=15, var_13=0, var_13_arg_0=7, var_13_arg_1=15, var_15=120, var_15_arg_0=120, var_16=3, var_17=1, var_17_arg_0=6, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=120, var_2=1, var_7=7, var_7_arg_0=6, var_7_arg_1=1, var_8=208, var_8_arg_0=120, var_8_arg_1=6] [L60] SORT_1 var_17_arg_0 = state_4; [L61] SORT_1 var_17_arg_1 = var_16; [L62] SORT_12 var_17 = var_17_arg_0 > var_17_arg_1; [L63] SORT_1 var_15_arg_0 = state_3; [L64] SORT_12 var_15 = var_15_arg_0 >> 0; [L65] SORT_12 var_18_arg_0 = var_17; [L66] SORT_12 var_18_arg_1 = var_15; [L67] SORT_12 var_18 = var_18_arg_0 & var_18_arg_1; [L68] var_18 = var_18 & mask_SORT_12 [L69] SORT_12 bad_19_arg_0 = var_18; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=208, next_9_arg_1=7, state_3=208, state_4=7, var_11=15, var_13=0, var_13_arg_0=7, var_13_arg_1=15, var_15=208, var_15_arg_0=208, var_16=3, var_17=1, var_17_arg_0=7, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=208, var_2=1, var_7=7, var_7_arg_0=6, var_7_arg_1=1, var_8=208, var_8_arg_0=120, var_8_arg_1=6] [L70] CALL __VERIFIER_assert(!(bad_19_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L70] RET __VERIFIER_assert(!(bad_19_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=208, next_9_arg_1=7, state_3=208, state_4=7, var_11=15, var_13=0, var_13_arg_0=7, var_13_arg_1=15, var_15=208, var_15_arg_0=208, var_16=3, var_17=1, var_17_arg_0=7, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=208, var_2=1, var_7=7, var_7_arg_0=6, var_7_arg_1=1, var_8=208, var_8_arg_0=120, var_8_arg_1=6] [L72] SORT_1 var_7_arg_0 = state_4; [L73] SORT_1 var_7_arg_1 = var_2; [L74] SORT_1 var_7 = var_7_arg_0 + var_7_arg_1; [L75] var_7 = var_7 & mask_SORT_1 [L76] SORT_1 next_9_arg_1 = var_7; [L77] SORT_1 var_8_arg_0 = state_3; [L78] SORT_1 var_8_arg_1 = state_4; [L79] SORT_1 var_8 = var_8_arg_0 * var_8_arg_1; [L80] SORT_1 next_10_arg_1 = var_8; [L82] state_4 = next_9_arg_1 [L83] state_3 = next_10_arg_1 VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=176, next_9_arg_1=8, state_3=176, state_4=8, var_11=15, var_13=0, var_13_arg_0=7, var_13_arg_1=15, var_15=208, var_15_arg_0=208, var_16=3, var_17=1, var_17_arg_0=7, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=208, var_2=1, var_7=8, var_7_arg_0=7, var_7_arg_1=1, var_8=176, var_8_arg_0=208, var_8_arg_1=7] [L55] SORT_1 var_13_arg_0 = state_4; [L56] SORT_1 var_13_arg_1 = var_11; [L57] SORT_12 var_13 = var_13_arg_0 == var_13_arg_1; [L58] SORT_12 bad_14_arg_0 = var_13; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=176, next_9_arg_1=8, state_3=176, state_4=8, var_11=15, var_13=0, var_13_arg_0=8, var_13_arg_1=15, var_15=208, var_15_arg_0=208, var_16=3, var_17=1, var_17_arg_0=7, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=208, var_2=1, var_7=8, var_7_arg_0=7, var_7_arg_1=1, var_8=176, var_8_arg_0=208, var_8_arg_1=7] [L59] CALL __VERIFIER_assert(!(bad_14_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L59] RET __VERIFIER_assert(!(bad_14_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=176, next_9_arg_1=8, state_3=176, state_4=8, var_11=15, var_13=0, var_13_arg_0=8, var_13_arg_1=15, var_15=208, var_15_arg_0=208, var_16=3, var_17=1, var_17_arg_0=7, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=208, var_2=1, var_7=8, var_7_arg_0=7, var_7_arg_1=1, var_8=176, var_8_arg_0=208, var_8_arg_1=7] [L60] SORT_1 var_17_arg_0 = state_4; [L61] SORT_1 var_17_arg_1 = var_16; [L62] SORT_12 var_17 = var_17_arg_0 > var_17_arg_1; [L63] SORT_1 var_15_arg_0 = state_3; [L64] SORT_12 var_15 = var_15_arg_0 >> 0; [L65] SORT_12 var_18_arg_0 = var_17; [L66] SORT_12 var_18_arg_1 = var_15; [L67] SORT_12 var_18 = var_18_arg_0 & var_18_arg_1; [L68] var_18 = var_18 & mask_SORT_12 [L69] SORT_12 bad_19_arg_0 = var_18; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=176, next_9_arg_1=8, state_3=176, state_4=8, var_11=15, var_13=0, var_13_arg_0=8, var_13_arg_1=15, var_15=176, var_15_arg_0=176, var_16=3, var_17=1, var_17_arg_0=8, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=176, var_2=1, var_7=8, var_7_arg_0=7, var_7_arg_1=1, var_8=176, var_8_arg_0=208, var_8_arg_1=7] [L70] CALL __VERIFIER_assert(!(bad_19_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L70] RET __VERIFIER_assert(!(bad_19_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=176, next_9_arg_1=8, state_3=176, state_4=8, var_11=15, var_13=0, var_13_arg_0=8, var_13_arg_1=15, var_15=176, var_15_arg_0=176, var_16=3, var_17=1, var_17_arg_0=8, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=176, var_2=1, var_7=8, var_7_arg_0=7, var_7_arg_1=1, var_8=176, var_8_arg_0=208, var_8_arg_1=7] [L72] SORT_1 var_7_arg_0 = state_4; [L73] SORT_1 var_7_arg_1 = var_2; [L74] SORT_1 var_7 = var_7_arg_0 + var_7_arg_1; [L75] var_7 = var_7 & mask_SORT_1 [L76] SORT_1 next_9_arg_1 = var_7; [L77] SORT_1 var_8_arg_0 = state_3; [L78] SORT_1 var_8_arg_1 = state_4; [L79] SORT_1 var_8 = var_8_arg_0 * var_8_arg_1; [L80] SORT_1 next_10_arg_1 = var_8; [L82] state_4 = next_9_arg_1 [L83] state_3 = next_10_arg_1 VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=128, next_9_arg_1=9, state_3=128, state_4=9, var_11=15, var_13=0, var_13_arg_0=8, var_13_arg_1=15, var_15=176, var_15_arg_0=176, var_16=3, var_17=1, var_17_arg_0=8, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=176, var_2=1, var_7=9, var_7_arg_0=8, var_7_arg_1=1, var_8=128, var_8_arg_0=176, var_8_arg_1=8] [L55] SORT_1 var_13_arg_0 = state_4; [L56] SORT_1 var_13_arg_1 = var_11; [L57] SORT_12 var_13 = var_13_arg_0 == var_13_arg_1; [L58] SORT_12 bad_14_arg_0 = var_13; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=128, next_9_arg_1=9, state_3=128, state_4=9, var_11=15, var_13=0, var_13_arg_0=9, var_13_arg_1=15, var_15=176, var_15_arg_0=176, var_16=3, var_17=1, var_17_arg_0=8, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=176, var_2=1, var_7=9, var_7_arg_0=8, var_7_arg_1=1, var_8=128, var_8_arg_0=176, var_8_arg_1=8] [L59] CALL __VERIFIER_assert(!(bad_14_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L59] RET __VERIFIER_assert(!(bad_14_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=128, next_9_arg_1=9, state_3=128, state_4=9, var_11=15, var_13=0, var_13_arg_0=9, var_13_arg_1=15, var_15=176, var_15_arg_0=176, var_16=3, var_17=1, var_17_arg_0=8, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=176, var_2=1, var_7=9, var_7_arg_0=8, var_7_arg_1=1, var_8=128, var_8_arg_0=176, var_8_arg_1=8] [L60] SORT_1 var_17_arg_0 = state_4; [L61] SORT_1 var_17_arg_1 = var_16; [L62] SORT_12 var_17 = var_17_arg_0 > var_17_arg_1; [L63] SORT_1 var_15_arg_0 = state_3; [L64] SORT_12 var_15 = var_15_arg_0 >> 0; [L65] SORT_12 var_18_arg_0 = var_17; [L66] SORT_12 var_18_arg_1 = var_15; [L67] SORT_12 var_18 = var_18_arg_0 & var_18_arg_1; [L68] var_18 = var_18 & mask_SORT_12 [L69] SORT_12 bad_19_arg_0 = var_18; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=128, next_9_arg_1=9, state_3=128, state_4=9, var_11=15, var_13=0, var_13_arg_0=9, var_13_arg_1=15, var_15=128, var_15_arg_0=128, var_16=3, var_17=1, var_17_arg_0=9, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=128, var_2=1, var_7=9, var_7_arg_0=8, var_7_arg_1=1, var_8=128, var_8_arg_0=176, var_8_arg_1=8] [L70] CALL __VERIFIER_assert(!(bad_19_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L70] RET __VERIFIER_assert(!(bad_19_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=128, next_9_arg_1=9, state_3=128, state_4=9, var_11=15, var_13=0, var_13_arg_0=9, var_13_arg_1=15, var_15=128, var_15_arg_0=128, var_16=3, var_17=1, var_17_arg_0=9, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=128, var_2=1, var_7=9, var_7_arg_0=8, var_7_arg_1=1, var_8=128, var_8_arg_0=176, var_8_arg_1=8] [L72] SORT_1 var_7_arg_0 = state_4; [L73] SORT_1 var_7_arg_1 = var_2; [L74] SORT_1 var_7 = var_7_arg_0 + var_7_arg_1; [L75] var_7 = var_7 & mask_SORT_1 [L76] SORT_1 next_9_arg_1 = var_7; [L77] SORT_1 var_8_arg_0 = state_3; [L78] SORT_1 var_8_arg_1 = state_4; [L79] SORT_1 var_8 = var_8_arg_0 * var_8_arg_1; [L80] SORT_1 next_10_arg_1 = var_8; [L82] state_4 = next_9_arg_1 [L83] state_3 = next_10_arg_1 VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=128, next_9_arg_1=10, state_3=128, state_4=10, var_11=15, var_13=0, var_13_arg_0=9, var_13_arg_1=15, var_15=128, var_15_arg_0=128, var_16=3, var_17=1, var_17_arg_0=9, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=128, var_2=1, var_7=10, var_7_arg_0=9, var_7_arg_1=1, var_8=128, var_8_arg_0=128, var_8_arg_1=9] [L55] SORT_1 var_13_arg_0 = state_4; [L56] SORT_1 var_13_arg_1 = var_11; [L57] SORT_12 var_13 = var_13_arg_0 == var_13_arg_1; [L58] SORT_12 bad_14_arg_0 = var_13; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=128, next_9_arg_1=10, state_3=128, state_4=10, var_11=15, var_13=0, var_13_arg_0=10, var_13_arg_1=15, var_15=128, var_15_arg_0=128, var_16=3, var_17=1, var_17_arg_0=9, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=128, var_2=1, var_7=10, var_7_arg_0=9, var_7_arg_1=1, var_8=128, var_8_arg_0=128, var_8_arg_1=9] [L59] CALL __VERIFIER_assert(!(bad_14_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L59] RET __VERIFIER_assert(!(bad_14_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=128, next_9_arg_1=10, state_3=128, state_4=10, var_11=15, var_13=0, var_13_arg_0=10, var_13_arg_1=15, var_15=128, var_15_arg_0=128, var_16=3, var_17=1, var_17_arg_0=9, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=128, var_2=1, var_7=10, var_7_arg_0=9, var_7_arg_1=1, var_8=128, var_8_arg_0=128, var_8_arg_1=9] [L60] SORT_1 var_17_arg_0 = state_4; [L61] SORT_1 var_17_arg_1 = var_16; [L62] SORT_12 var_17 = var_17_arg_0 > var_17_arg_1; [L63] SORT_1 var_15_arg_0 = state_3; [L64] SORT_12 var_15 = var_15_arg_0 >> 0; [L65] SORT_12 var_18_arg_0 = var_17; [L66] SORT_12 var_18_arg_1 = var_15; [L67] SORT_12 var_18 = var_18_arg_0 & var_18_arg_1; [L68] var_18 = var_18 & mask_SORT_12 [L69] SORT_12 bad_19_arg_0 = var_18; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=128, next_9_arg_1=10, state_3=128, state_4=10, var_11=15, var_13=0, var_13_arg_0=10, var_13_arg_1=15, var_15=128, var_15_arg_0=128, var_16=3, var_17=1, var_17_arg_0=10, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=128, var_2=1, var_7=10, var_7_arg_0=9, var_7_arg_1=1, var_8=128, var_8_arg_0=128, var_8_arg_1=9] [L70] CALL __VERIFIER_assert(!(bad_19_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L70] RET __VERIFIER_assert(!(bad_19_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=128, next_9_arg_1=10, state_3=128, state_4=10, var_11=15, var_13=0, var_13_arg_0=10, var_13_arg_1=15, var_15=128, var_15_arg_0=128, var_16=3, var_17=1, var_17_arg_0=10, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=128, var_2=1, var_7=10, var_7_arg_0=9, var_7_arg_1=1, var_8=128, var_8_arg_0=128, var_8_arg_1=9] [L72] SORT_1 var_7_arg_0 = state_4; [L73] SORT_1 var_7_arg_1 = var_2; [L74] SORT_1 var_7 = var_7_arg_0 + var_7_arg_1; [L75] var_7 = var_7 & mask_SORT_1 [L76] SORT_1 next_9_arg_1 = var_7; [L77] SORT_1 var_8_arg_0 = state_3; [L78] SORT_1 var_8_arg_1 = state_4; [L79] SORT_1 var_8 = var_8_arg_0 * var_8_arg_1; [L80] SORT_1 next_10_arg_1 = var_8; [L82] state_4 = next_9_arg_1 [L83] state_3 = next_10_arg_1 VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=11, state_3=0, state_4=11, var_11=15, var_13=0, var_13_arg_0=10, var_13_arg_1=15, var_15=128, var_15_arg_0=128, var_16=3, var_17=1, var_17_arg_0=10, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=128, var_2=1, var_7=11, var_7_arg_0=10, var_7_arg_1=1, var_8=0, var_8_arg_0=128, var_8_arg_1=10] [L55] SORT_1 var_13_arg_0 = state_4; [L56] SORT_1 var_13_arg_1 = var_11; [L57] SORT_12 var_13 = var_13_arg_0 == var_13_arg_1; [L58] SORT_12 bad_14_arg_0 = var_13; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=11, state_3=0, state_4=11, var_11=15, var_13=0, var_13_arg_0=11, var_13_arg_1=15, var_15=128, var_15_arg_0=128, var_16=3, var_17=1, var_17_arg_0=10, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=128, var_2=1, var_7=11, var_7_arg_0=10, var_7_arg_1=1, var_8=0, var_8_arg_0=128, var_8_arg_1=10] [L59] CALL __VERIFIER_assert(!(bad_14_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L59] RET __VERIFIER_assert(!(bad_14_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=11, state_3=0, state_4=11, var_11=15, var_13=0, var_13_arg_0=11, var_13_arg_1=15, var_15=128, var_15_arg_0=128, var_16=3, var_17=1, var_17_arg_0=10, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=128, var_2=1, var_7=11, var_7_arg_0=10, var_7_arg_1=1, var_8=0, var_8_arg_0=128, var_8_arg_1=10] [L60] SORT_1 var_17_arg_0 = state_4; [L61] SORT_1 var_17_arg_1 = var_16; [L62] SORT_12 var_17 = var_17_arg_0 > var_17_arg_1; [L63] SORT_1 var_15_arg_0 = state_3; [L64] SORT_12 var_15 = var_15_arg_0 >> 0; [L65] SORT_12 var_18_arg_0 = var_17; [L66] SORT_12 var_18_arg_1 = var_15; [L67] SORT_12 var_18 = var_18_arg_0 & var_18_arg_1; [L68] var_18 = var_18 & mask_SORT_12 [L69] SORT_12 bad_19_arg_0 = var_18; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=11, state_3=0, state_4=11, var_11=15, var_13=0, var_13_arg_0=11, var_13_arg_1=15, var_15=0, var_15_arg_0=0, var_16=3, var_17=1, var_17_arg_0=11, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=0, var_2=1, var_7=11, var_7_arg_0=10, var_7_arg_1=1, var_8=0, var_8_arg_0=128, var_8_arg_1=10] [L70] CALL __VERIFIER_assert(!(bad_19_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L70] RET __VERIFIER_assert(!(bad_19_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=11, state_3=0, state_4=11, var_11=15, var_13=0, var_13_arg_0=11, var_13_arg_1=15, var_15=0, var_15_arg_0=0, var_16=3, var_17=1, var_17_arg_0=11, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=0, var_2=1, var_7=11, var_7_arg_0=10, var_7_arg_1=1, var_8=0, var_8_arg_0=128, var_8_arg_1=10] [L72] SORT_1 var_7_arg_0 = state_4; [L73] SORT_1 var_7_arg_1 = var_2; [L74] SORT_1 var_7 = var_7_arg_0 + var_7_arg_1; [L75] var_7 = var_7 & mask_SORT_1 [L76] SORT_1 next_9_arg_1 = var_7; [L77] SORT_1 var_8_arg_0 = state_3; [L78] SORT_1 var_8_arg_1 = state_4; [L79] SORT_1 var_8 = var_8_arg_0 * var_8_arg_1; [L80] SORT_1 next_10_arg_1 = var_8; [L82] state_4 = next_9_arg_1 [L83] state_3 = next_10_arg_1 VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=12, state_3=0, state_4=12, var_11=15, var_13=0, var_13_arg_0=11, var_13_arg_1=15, var_15=0, var_15_arg_0=0, var_16=3, var_17=1, var_17_arg_0=11, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=0, var_2=1, var_7=12, var_7_arg_0=11, var_7_arg_1=1, var_8=0, var_8_arg_0=0, var_8_arg_1=11] [L55] SORT_1 var_13_arg_0 = state_4; [L56] SORT_1 var_13_arg_1 = var_11; [L57] SORT_12 var_13 = var_13_arg_0 == var_13_arg_1; [L58] SORT_12 bad_14_arg_0 = var_13; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=12, state_3=0, state_4=12, var_11=15, var_13=0, var_13_arg_0=12, var_13_arg_1=15, var_15=0, var_15_arg_0=0, var_16=3, var_17=1, var_17_arg_0=11, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=0, var_2=1, var_7=12, var_7_arg_0=11, var_7_arg_1=1, var_8=0, var_8_arg_0=0, var_8_arg_1=11] [L59] CALL __VERIFIER_assert(!(bad_14_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L59] RET __VERIFIER_assert(!(bad_14_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=12, state_3=0, state_4=12, var_11=15, var_13=0, var_13_arg_0=12, var_13_arg_1=15, var_15=0, var_15_arg_0=0, var_16=3, var_17=1, var_17_arg_0=11, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=0, var_2=1, var_7=12, var_7_arg_0=11, var_7_arg_1=1, var_8=0, var_8_arg_0=0, var_8_arg_1=11] [L60] SORT_1 var_17_arg_0 = state_4; [L61] SORT_1 var_17_arg_1 = var_16; [L62] SORT_12 var_17 = var_17_arg_0 > var_17_arg_1; [L63] SORT_1 var_15_arg_0 = state_3; [L64] SORT_12 var_15 = var_15_arg_0 >> 0; [L65] SORT_12 var_18_arg_0 = var_17; [L66] SORT_12 var_18_arg_1 = var_15; [L67] SORT_12 var_18 = var_18_arg_0 & var_18_arg_1; [L68] var_18 = var_18 & mask_SORT_12 [L69] SORT_12 bad_19_arg_0 = var_18; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=12, state_3=0, state_4=12, var_11=15, var_13=0, var_13_arg_0=12, var_13_arg_1=15, var_15=0, var_15_arg_0=0, var_16=3, var_17=1, var_17_arg_0=12, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=0, var_2=1, var_7=12, var_7_arg_0=11, var_7_arg_1=1, var_8=0, var_8_arg_0=0, var_8_arg_1=11] [L70] CALL __VERIFIER_assert(!(bad_19_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L70] RET __VERIFIER_assert(!(bad_19_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=12, state_3=0, state_4=12, var_11=15, var_13=0, var_13_arg_0=12, var_13_arg_1=15, var_15=0, var_15_arg_0=0, var_16=3, var_17=1, var_17_arg_0=12, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=0, var_2=1, var_7=12, var_7_arg_0=11, var_7_arg_1=1, var_8=0, var_8_arg_0=0, var_8_arg_1=11] [L72] SORT_1 var_7_arg_0 = state_4; [L73] SORT_1 var_7_arg_1 = var_2; [L74] SORT_1 var_7 = var_7_arg_0 + var_7_arg_1; [L75] var_7 = var_7 & mask_SORT_1 [L76] SORT_1 next_9_arg_1 = var_7; [L77] SORT_1 var_8_arg_0 = state_3; [L78] SORT_1 var_8_arg_1 = state_4; [L79] SORT_1 var_8 = var_8_arg_0 * var_8_arg_1; [L80] SORT_1 next_10_arg_1 = var_8; [L82] state_4 = next_9_arg_1 [L83] state_3 = next_10_arg_1 VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=13, state_3=0, state_4=13, var_11=15, var_13=0, var_13_arg_0=12, var_13_arg_1=15, var_15=0, var_15_arg_0=0, var_16=3, var_17=1, var_17_arg_0=12, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=0, var_2=1, var_7=13, var_7_arg_0=12, var_7_arg_1=1, var_8=0, var_8_arg_0=0, var_8_arg_1=12] [L55] SORT_1 var_13_arg_0 = state_4; [L56] SORT_1 var_13_arg_1 = var_11; [L57] SORT_12 var_13 = var_13_arg_0 == var_13_arg_1; [L58] SORT_12 bad_14_arg_0 = var_13; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=13, state_3=0, state_4=13, var_11=15, var_13=0, var_13_arg_0=13, var_13_arg_1=15, var_15=0, var_15_arg_0=0, var_16=3, var_17=1, var_17_arg_0=12, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=0, var_2=1, var_7=13, var_7_arg_0=12, var_7_arg_1=1, var_8=0, var_8_arg_0=0, var_8_arg_1=12] [L59] CALL __VERIFIER_assert(!(bad_14_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L59] RET __VERIFIER_assert(!(bad_14_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=13, state_3=0, state_4=13, var_11=15, var_13=0, var_13_arg_0=13, var_13_arg_1=15, var_15=0, var_15_arg_0=0, var_16=3, var_17=1, var_17_arg_0=12, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=0, var_2=1, var_7=13, var_7_arg_0=12, var_7_arg_1=1, var_8=0, var_8_arg_0=0, var_8_arg_1=12] [L60] SORT_1 var_17_arg_0 = state_4; [L61] SORT_1 var_17_arg_1 = var_16; [L62] SORT_12 var_17 = var_17_arg_0 > var_17_arg_1; [L63] SORT_1 var_15_arg_0 = state_3; [L64] SORT_12 var_15 = var_15_arg_0 >> 0; [L65] SORT_12 var_18_arg_0 = var_17; [L66] SORT_12 var_18_arg_1 = var_15; [L67] SORT_12 var_18 = var_18_arg_0 & var_18_arg_1; [L68] var_18 = var_18 & mask_SORT_12 [L69] SORT_12 bad_19_arg_0 = var_18; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=13, state_3=0, state_4=13, var_11=15, var_13=0, var_13_arg_0=13, var_13_arg_1=15, var_15=0, var_15_arg_0=0, var_16=3, var_17=1, var_17_arg_0=13, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=0, var_2=1, var_7=13, var_7_arg_0=12, var_7_arg_1=1, var_8=0, var_8_arg_0=0, var_8_arg_1=12] [L70] CALL __VERIFIER_assert(!(bad_19_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L70] RET __VERIFIER_assert(!(bad_19_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=13, state_3=0, state_4=13, var_11=15, var_13=0, var_13_arg_0=13, var_13_arg_1=15, var_15=0, var_15_arg_0=0, var_16=3, var_17=1, var_17_arg_0=13, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=0, var_2=1, var_7=13, var_7_arg_0=12, var_7_arg_1=1, var_8=0, var_8_arg_0=0, var_8_arg_1=12] [L72] SORT_1 var_7_arg_0 = state_4; [L73] SORT_1 var_7_arg_1 = var_2; [L74] SORT_1 var_7 = var_7_arg_0 + var_7_arg_1; [L75] var_7 = var_7 & mask_SORT_1 [L76] SORT_1 next_9_arg_1 = var_7; [L77] SORT_1 var_8_arg_0 = state_3; [L78] SORT_1 var_8_arg_1 = state_4; [L79] SORT_1 var_8 = var_8_arg_0 * var_8_arg_1; [L80] SORT_1 next_10_arg_1 = var_8; [L82] state_4 = next_9_arg_1 [L83] state_3 = next_10_arg_1 VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=14, state_3=0, state_4=14, var_11=15, var_13=0, var_13_arg_0=13, var_13_arg_1=15, var_15=0, var_15_arg_0=0, var_16=3, var_17=1, var_17_arg_0=13, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=0, var_2=1, var_7=14, var_7_arg_0=13, var_7_arg_1=1, var_8=0, var_8_arg_0=0, var_8_arg_1=13] [L55] SORT_1 var_13_arg_0 = state_4; [L56] SORT_1 var_13_arg_1 = var_11; [L57] SORT_12 var_13 = var_13_arg_0 == var_13_arg_1; [L58] SORT_12 bad_14_arg_0 = var_13; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=14, state_3=0, state_4=14, var_11=15, var_13=0, var_13_arg_0=14, var_13_arg_1=15, var_15=0, var_15_arg_0=0, var_16=3, var_17=1, var_17_arg_0=13, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=0, var_2=1, var_7=14, var_7_arg_0=13, var_7_arg_1=1, var_8=0, var_8_arg_0=0, var_8_arg_1=13] [L59] CALL __VERIFIER_assert(!(bad_14_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L59] RET __VERIFIER_assert(!(bad_14_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=14, state_3=0, state_4=14, var_11=15, var_13=0, var_13_arg_0=14, var_13_arg_1=15, var_15=0, var_15_arg_0=0, var_16=3, var_17=1, var_17_arg_0=13, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=0, var_2=1, var_7=14, var_7_arg_0=13, var_7_arg_1=1, var_8=0, var_8_arg_0=0, var_8_arg_1=13] [L60] SORT_1 var_17_arg_0 = state_4; [L61] SORT_1 var_17_arg_1 = var_16; [L62] SORT_12 var_17 = var_17_arg_0 > var_17_arg_1; [L63] SORT_1 var_15_arg_0 = state_3; [L64] SORT_12 var_15 = var_15_arg_0 >> 0; [L65] SORT_12 var_18_arg_0 = var_17; [L66] SORT_12 var_18_arg_1 = var_15; [L67] SORT_12 var_18 = var_18_arg_0 & var_18_arg_1; [L68] var_18 = var_18 & mask_SORT_12 [L69] SORT_12 bad_19_arg_0 = var_18; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=14, state_3=0, state_4=14, var_11=15, var_13=0, var_13_arg_0=14, var_13_arg_1=15, var_15=0, var_15_arg_0=0, var_16=3, var_17=1, var_17_arg_0=14, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=0, var_2=1, var_7=14, var_7_arg_0=13, var_7_arg_1=1, var_8=0, var_8_arg_0=0, var_8_arg_1=13] [L70] CALL __VERIFIER_assert(!(bad_19_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L70] RET __VERIFIER_assert(!(bad_19_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=14, state_3=0, state_4=14, var_11=15, var_13=0, var_13_arg_0=14, var_13_arg_1=15, var_15=0, var_15_arg_0=0, var_16=3, var_17=1, var_17_arg_0=14, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=0, var_2=1, var_7=14, var_7_arg_0=13, var_7_arg_1=1, var_8=0, var_8_arg_0=0, var_8_arg_1=13] [L72] SORT_1 var_7_arg_0 = state_4; [L73] SORT_1 var_7_arg_1 = var_2; [L74] SORT_1 var_7 = var_7_arg_0 + var_7_arg_1; [L75] var_7 = var_7 & mask_SORT_1 [L76] SORT_1 next_9_arg_1 = var_7; [L77] SORT_1 var_8_arg_0 = state_3; [L78] SORT_1 var_8_arg_1 = state_4; [L79] SORT_1 var_8 = var_8_arg_0 * var_8_arg_1; [L80] SORT_1 next_10_arg_1 = var_8; [L82] state_4 = next_9_arg_1 [L83] state_3 = next_10_arg_1 VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=15, state_3=0, state_4=15, var_11=15, var_13=0, var_13_arg_0=14, var_13_arg_1=15, var_15=0, var_15_arg_0=0, var_16=3, var_17=1, var_17_arg_0=14, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=0, var_2=1, var_7=15, var_7_arg_0=14, var_7_arg_1=1, var_8=0, var_8_arg_0=0, var_8_arg_1=14] [L55] SORT_1 var_13_arg_0 = state_4; [L56] SORT_1 var_13_arg_1 = var_11; [L57] SORT_12 var_13 = var_13_arg_0 == var_13_arg_1; [L58] SORT_12 bad_14_arg_0 = var_13; VAL [bad_14_arg_0=1, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=15, state_3=0, state_4=15, var_11=15, var_13=1, var_13_arg_0=15, var_13_arg_1=15, var_15=0, var_15_arg_0=0, var_16=3, var_17=1, var_17_arg_0=14, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=0, var_2=1, var_7=15, var_7_arg_0=14, var_7_arg_1=1, var_8=0, var_8_arg_0=0, var_8_arg_1=14] [L59] CALL __VERIFIER_assert(!(bad_14_arg_0)) VAL [\old(cond)=0] [L28] COND TRUE !(cond) VAL [\old(cond)=0, cond=0] [L28] reach_error() VAL [\old(cond)=0, cond=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 2 procedures, 17 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 26.2s, OverallIterations: 9, TraceHistogramMax: 29, PathProgramHistogramMax: 7, EmptinessCheckTime: 0.0s, AutomataDifference: 6.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 196 SdHoareTripleChecker+Valid, 3.6s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 189 mSDsluCounter, 648 SdHoareTripleChecker+Invalid, 3.0s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 119 IncrementalHoareTripleChecker+Unchecked, 538 mSDsCounter, 352 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 2168 IncrementalHoareTripleChecker+Invalid, 2639 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 352 mSolverCounterUnsat, 110 mSDtfsCounter, 2168 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 1667 GetRequests, 1507 SyntacticMatches, 10 SemanticMatches, 150 ConstructedPredicates, 0 IntricatePredicates, 2 DeprecatedPredicates, 598 ImplicationChecksByTransitivity, 6.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=142occurred in iteration=8, InterpolantAutomatonStates: 102, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.2s AutomataMinimizationTime, 8 MinimizatonAttempts, 17 StatesRemovedByMinimization, 5 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.4s SsaConstructionTime, 1.3s SatisfiabilityAnalysisTime, 11.7s InterpolantComputationTime, 1169 NumberOfCodeBlocks, 1151 NumberOfCodeBlocksAsserted, 93 NumberOfCheckSat, 1560 ConstructedInterpolants, 65 QuantifiedInterpolants, 21573 SizeOfPredicates, 475 NumberOfNonLiveVariables, 2812 ConjunctsInSsa, 575 ConjunctsInUnsatCore, 29 InterpolantComputations, 2 PerfectInterpolantSequences, 5042/6764 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2022-11-03 03:36:22,547 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8c8886b4-644a-4f09-9866-0734b79cd59c/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE