./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.peterson.3.prop1-back-serstep.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 5e519f3a Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.peterson.3.prop1-back-serstep.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 34706d6ed7dc5457e6baaed7dcfb04a35fb2715043d8576caf0678232a84ae10 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-5e519f3 [2022-11-03 02:53:22,294 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-03 02:53:22,297 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-03 02:53:22,350 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-03 02:53:22,351 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-03 02:53:22,356 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-03 02:53:22,358 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-03 02:53:22,362 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-03 02:53:22,364 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-03 02:53:22,370 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-03 02:53:22,371 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-03 02:53:22,373 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-03 02:53:22,374 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-03 02:53:22,376 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-03 02:53:22,378 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-03 02:53:22,379 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-03 02:53:22,381 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-03 02:53:22,382 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-03 02:53:22,384 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-03 02:53:22,393 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-03 02:53:22,395 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-03 02:53:22,396 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-03 02:53:22,399 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-03 02:53:22,401 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-03 02:53:22,409 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-03 02:53:22,411 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-03 02:53:22,411 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-03 02:53:22,413 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-03 02:53:22,414 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-03 02:53:22,415 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-03 02:53:22,415 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-03 02:53:22,417 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-03 02:53:22,419 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-03 02:53:22,420 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-03 02:53:22,421 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-03 02:53:22,422 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-03 02:53:22,422 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-03 02:53:22,423 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-03 02:53:22,423 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-03 02:53:22,424 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-03 02:53:22,425 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-03 02:53:22,426 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Default.epf [2022-11-03 02:53:22,471 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-03 02:53:22,472 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-03 02:53:22,472 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-03 02:53:22,473 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-03 02:53:22,473 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-03 02:53:22,474 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-03 02:53:22,474 INFO L138 SettingsManager]: * User list type=DISABLED [2022-11-03 02:53:22,474 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-11-03 02:53:22,475 INFO L138 SettingsManager]: * Explicit value domain=true [2022-11-03 02:53:22,475 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2022-11-03 02:53:22,476 INFO L138 SettingsManager]: * Octagon Domain=false [2022-11-03 02:53:22,476 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-11-03 02:53:22,476 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2022-11-03 02:53:22,477 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2022-11-03 02:53:22,477 INFO L138 SettingsManager]: * Interval Domain=false [2022-11-03 02:53:22,477 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2022-11-03 02:53:22,477 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2022-11-03 02:53:22,478 INFO L138 SettingsManager]: * Simplification Technique=POLY_PAC [2022-11-03 02:53:22,478 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-03 02:53:22,479 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-03 02:53:22,479 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-03 02:53:22,479 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-03 02:53:22,479 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-03 02:53:22,480 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-03 02:53:22,480 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-03 02:53:22,480 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-03 02:53:22,480 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-03 02:53:22,481 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-03 02:53:22,481 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-03 02:53:22,481 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 02:53:22,481 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-03 02:53:22,482 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2022-11-03 02:53:22,482 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-03 02:53:22,482 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-03 02:53:22,483 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2022-11-03 02:53:22,483 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-11-03 02:53:22,483 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-03 02:53:22,483 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-11-03 02:53:22,483 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 34706d6ed7dc5457e6baaed7dcfb04a35fb2715043d8576caf0678232a84ae10 [2022-11-03 02:53:22,807 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-03 02:53:22,835 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-03 02:53:22,839 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-03 02:53:22,841 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-03 02:53:22,842 INFO L275 PluginConnector]: CDTParser initialized [2022-11-03 02:53:22,843 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.peterson.3.prop1-back-serstep.c [2022-11-03 02:53:22,914 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/data/c104a4c57/84d7327926cb4858ae996bd1f4c1719b/FLAG77224cb56 [2022-11-03 02:53:23,590 INFO L306 CDTParser]: Found 1 translation units. [2022-11-03 02:53:23,591 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.peterson.3.prop1-back-serstep.c [2022-11-03 02:53:23,619 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/data/c104a4c57/84d7327926cb4858ae996bd1f4c1719b/FLAG77224cb56 [2022-11-03 02:53:23,825 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/data/c104a4c57/84d7327926cb4858ae996bd1f4c1719b [2022-11-03 02:53:23,829 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-03 02:53:23,832 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-03 02:53:23,835 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-03 02:53:23,836 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-03 02:53:23,839 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-03 02:53:23,840 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 02:53:23" (1/1) ... [2022-11-03 02:53:23,843 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7ff843ad and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:23, skipping insertion in model container [2022-11-03 02:53:23,843 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 02:53:23" (1/1) ... [2022-11-03 02:53:23,850 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-03 02:53:23,922 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-03 02:53:24,149 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.peterson.3.prop1-back-serstep.c[1014,1027] [2022-11-03 02:53:24,588 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 02:53:24,591 INFO L203 MainTranslator]: Completed pre-run [2022-11-03 02:53:24,602 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.peterson.3.prop1-back-serstep.c[1014,1027] [2022-11-03 02:53:24,782 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 02:53:24,796 INFO L208 MainTranslator]: Completed translation [2022-11-03 02:53:24,796 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:24 WrapperNode [2022-11-03 02:53:24,796 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-03 02:53:24,798 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-03 02:53:24,798 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-03 02:53:24,798 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-03 02:53:24,807 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:24" (1/1) ... [2022-11-03 02:53:24,881 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:24" (1/1) ... [2022-11-03 02:53:25,107 INFO L138 Inliner]: procedures = 11, calls = 3, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1951 [2022-11-03 02:53:25,108 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-03 02:53:25,108 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-03 02:53:25,109 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-03 02:53:25,109 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-03 02:53:25,118 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:24" (1/1) ... [2022-11-03 02:53:25,119 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:24" (1/1) ... [2022-11-03 02:53:25,151 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:24" (1/1) ... [2022-11-03 02:53:25,151 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:24" (1/1) ... [2022-11-03 02:53:25,327 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:24" (1/1) ... [2022-11-03 02:53:25,347 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:24" (1/1) ... [2022-11-03 02:53:25,377 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:24" (1/1) ... [2022-11-03 02:53:25,389 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:24" (1/1) ... [2022-11-03 02:53:25,435 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-03 02:53:25,437 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-03 02:53:25,437 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-03 02:53:25,437 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-03 02:53:25,438 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:24" (1/1) ... [2022-11-03 02:53:25,445 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 02:53:25,458 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:53:25,472 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-03 02:53:25,498 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-03 02:53:25,526 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-03 02:53:25,526 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-03 02:53:26,083 INFO L235 CfgBuilder]: Building ICFG [2022-11-03 02:53:26,085 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-03 02:53:46,492 INFO L276 CfgBuilder]: Performing block encoding [2022-11-03 02:53:56,540 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-03 02:53:56,540 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-03 02:53:56,542 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 02:53:56 BoogieIcfgContainer [2022-11-03 02:53:56,543 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-03 02:53:56,545 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-03 02:53:56,545 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-03 02:53:56,549 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-03 02:53:56,550 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 03.11 02:53:23" (1/3) ... [2022-11-03 02:53:56,550 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@28889137 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 02:53:56, skipping insertion in model container [2022-11-03 02:53:56,551 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:53:24" (2/3) ... [2022-11-03 02:53:56,551 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@28889137 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 02:53:56, skipping insertion in model container [2022-11-03 02:53:56,551 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 02:53:56" (3/3) ... [2022-11-03 02:53:56,553 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.peterson.3.prop1-back-serstep.c [2022-11-03 02:53:56,569 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-03 02:53:56,569 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-03 02:53:56,616 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-03 02:53:56,624 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@61502ae9, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-03 02:53:56,624 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-03 02:53:56,628 INFO L276 IsEmpty]: Start isEmpty. Operand has 7 states, 5 states have (on average 1.6) internal successors, (8), 6 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:53:56,636 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2022-11-03 02:53:56,640 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:53:56,640 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1] [2022-11-03 02:53:56,641 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:53:56,649 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:53:56,649 INFO L85 PathProgramCache]: Analyzing trace with hash 10764579, now seen corresponding path program 1 times [2022-11-03 02:53:56,660 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-03 02:53:56,661 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [900367167] [2022-11-03 02:53:56,662 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:53:56,662 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-03 02:53:57,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:54:02,416 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:54:02,431 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-03 02:54:02,431 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [900367167] [2022-11-03 02:54:02,432 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [900367167] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:54:02,432 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:54:02,432 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-03 02:54:02,434 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [551320738] [2022-11-03 02:54:02,435 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:54:02,439 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 02:54:02,440 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-03 02:54:02,465 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 02:54:02,466 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 02:54:02,468 INFO L87 Difference]: Start difference. First operand has 7 states, 5 states have (on average 1.6) internal successors, (8), 6 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 1.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:03,783 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.29s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-11-03 02:54:06,028 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.20s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-11-03 02:54:08,336 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-11-03 02:54:08,402 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:54:08,402 INFO L93 Difference]: Finished difference Result 15 states and 20 transitions. [2022-11-03 02:54:08,403 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-03 02:54:08,404 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 4 [2022-11-03 02:54:08,405 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:54:08,412 INFO L225 Difference]: With dead ends: 15 [2022-11-03 02:54:08,412 INFO L226 Difference]: Without dead ends: 9 [2022-11-03 02:54:08,415 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-03 02:54:08,424 INFO L413 NwaCegarLoop]: 2 mSDtfsCounter, 3 mSDsluCounter, 5 mSDsCounter, 0 mSdLazyCounter, 6 mSolverCounterSat, 1 mSolverCounterUnsat, 2 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 5.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 6 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 6 IncrementalHoareTripleChecker+Invalid, 2 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 5.9s IncrementalHoareTripleChecker+Time [2022-11-03 02:54:08,430 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 6 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 6 Invalid, 2 Unknown, 0 Unchecked, 5.9s Time] [2022-11-03 02:54:08,448 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9 states. [2022-11-03 02:54:08,460 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9 to 8. [2022-11-03 02:54:08,461 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 7 states have (on average 1.1428571428571428) internal successors, (8), 7 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:08,462 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 8 transitions. [2022-11-03 02:54:08,463 INFO L78 Accepts]: Start accepts. Automaton has 8 states and 8 transitions. Word has length 4 [2022-11-03 02:54:08,463 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:54:08,464 INFO L495 AbstractCegarLoop]: Abstraction has 8 states and 8 transitions. [2022-11-03 02:54:08,465 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 1.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:54:08,465 INFO L276 IsEmpty]: Start isEmpty. Operand 8 states and 8 transitions. [2022-11-03 02:54:08,465 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2022-11-03 02:54:08,466 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:54:08,466 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1] [2022-11-03 02:54:08,466 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-11-03 02:54:08,467 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:54:08,467 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:54:08,467 INFO L85 PathProgramCache]: Analyzing trace with hash -1417000210, now seen corresponding path program 1 times [2022-11-03 02:54:08,468 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-03 02:54:08,468 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2046871953] [2022-11-03 02:54:08,469 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:54:08,469 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-03 02:59:09,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-03 02:59:09,983 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-03 03:05:13,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-03 03:05:13,244 INFO L130 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2022-11-03 03:05:13,245 INFO L359 BasicCegarLoop]: Counterexample is feasible [2022-11-03 03:05:13,247 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-11-03 03:05:13,249 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-11-03 03:05:13,253 INFO L444 BasicCegarLoop]: Path program histogram: [1, 1] [2022-11-03 03:05:13,257 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-03 03:05:13,397 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:05:13,403 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:05:13,479 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 03.11 03:05:13 BoogieIcfgContainer [2022-11-03 03:05:13,479 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-03 03:05:13,480 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-03 03:05:13,480 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-03 03:05:13,481 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-03 03:05:13,482 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 02:53:56" (3/4) ... [2022-11-03 03:05:13,485 INFO L140 WitnessPrinter]: No result that supports witness generation found [2022-11-03 03:05:13,485 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-03 03:05:13,488 INFO L158 Benchmark]: Toolchain (without parser) took 709654.24ms. Allocated memory was 88.1MB in the beginning and 3.7GB in the end (delta: 3.7GB). Free memory was 48.1MB in the beginning and 2.4GB in the end (delta: -2.4GB). Peak memory consumption was 1.3GB. Max. memory is 16.1GB. [2022-11-03 03:05:13,490 INFO L158 Benchmark]: CDTParser took 0.28ms. Allocated memory is still 88.1MB. Free memory is still 67.8MB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-03 03:05:13,493 INFO L158 Benchmark]: CACSL2BoogieTranslator took 961.52ms. Allocated memory was 88.1MB in the beginning and 119.5MB in the end (delta: 31.5MB). Free memory was 47.9MB in the beginning and 70.7MB in the end (delta: -22.8MB). Peak memory consumption was 21.3MB. Max. memory is 16.1GB. [2022-11-03 03:05:13,495 INFO L158 Benchmark]: Boogie Procedure Inliner took 310.19ms. Allocated memory is still 119.5MB. Free memory was 70.7MB in the beginning and 53.9MB in the end (delta: 16.8MB). Peak memory consumption was 36.1MB. Max. memory is 16.1GB. [2022-11-03 03:05:13,496 INFO L158 Benchmark]: Boogie Preprocessor took 327.64ms. Allocated memory is still 119.5MB. Free memory was 53.9MB in the beginning and 50.1MB in the end (delta: 3.9MB). Peak memory consumption was 26.2MB. Max. memory is 16.1GB. [2022-11-03 03:05:13,497 INFO L158 Benchmark]: RCFGBuilder took 31105.68ms. Allocated memory was 119.5MB in the beginning and 2.3GB in the end (delta: 2.2GB). Free memory was 50.1MB in the beginning and 1.7GB in the end (delta: -1.6GB). Peak memory consumption was 843.6MB. Max. memory is 16.1GB. [2022-11-03 03:05:13,497 INFO L158 Benchmark]: TraceAbstraction took 676934.27ms. Allocated memory was 2.3GB in the beginning and 3.7GB in the end (delta: 1.4GB). Free memory was 1.7GB in the beginning and 2.4GB in the end (delta: -758.5MB). Peak memory consumption was 1.9GB. Max. memory is 16.1GB. [2022-11-03 03:05:13,497 INFO L158 Benchmark]: Witness Printer took 5.12ms. Allocated memory is still 3.7GB. Free memory is still 2.4GB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-03 03:05:13,505 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.28ms. Allocated memory is still 88.1MB. Free memory is still 67.8MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 961.52ms. Allocated memory was 88.1MB in the beginning and 119.5MB in the end (delta: 31.5MB). Free memory was 47.9MB in the beginning and 70.7MB in the end (delta: -22.8MB). Peak memory consumption was 21.3MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 310.19ms. Allocated memory is still 119.5MB. Free memory was 70.7MB in the beginning and 53.9MB in the end (delta: 16.8MB). Peak memory consumption was 36.1MB. Max. memory is 16.1GB. * Boogie Preprocessor took 327.64ms. Allocated memory is still 119.5MB. Free memory was 53.9MB in the beginning and 50.1MB in the end (delta: 3.9MB). Peak memory consumption was 26.2MB. Max. memory is 16.1GB. * RCFGBuilder took 31105.68ms. Allocated memory was 119.5MB in the beginning and 2.3GB in the end (delta: 2.2GB). Free memory was 50.1MB in the beginning and 1.7GB in the end (delta: -1.6GB). Peak memory consumption was 843.6MB. Max. memory is 16.1GB. * TraceAbstraction took 676934.27ms. Allocated memory was 2.3GB in the beginning and 3.7GB in the end (delta: 1.4GB). Free memory was 1.7GB in the beginning and 2.4GB in the end (delta: -758.5MB). Peak memory consumption was 1.9GB. Max. memory is 16.1GB. * Witness Printer took 5.12ms. Allocated memory is still 3.7GB. Free memory is still 2.4GB. There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 20]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: overapproximation of bitwiseComplement at line 285, overapproximation of bitwiseOr at line 448, overapproximation of bitwiseAnd at line 190. Possible FailurePath: [L25] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L26] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L28] const SORT_2 mask_SORT_2 = (SORT_2)-1 >> (sizeof(SORT_2) * 8 - 8); [L29] const SORT_2 msb_SORT_2 = (SORT_2)1 << (8 - 1); [L31] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 24); [L32] const SORT_3 msb_SORT_3 = (SORT_3)1 << (24 - 1); [L34] const SORT_4 mask_SORT_4 = (SORT_4)-1 >> (sizeof(SORT_4) * 8 - 32); [L35] const SORT_4 msb_SORT_4 = (SORT_4)1 << (32 - 1); [L37] const SORT_2 var_5 = 0; [L38] const SORT_1 var_30 = 0; [L39] const SORT_2 var_79 = 0; [L40] const SORT_1 var_160 = 1; [L41] const SORT_4 var_166 = 3; [L42] const SORT_3 var_167 = 0; [L43] const SORT_2 var_168 = 1; [L44] const SORT_4 var_197 = 0; [L45] const SORT_4 var_198 = 1; [L46] const SORT_2 var_205 = 3; [L47] const SORT_2 var_310 = 2; [L48] const SORT_4 var_494 = 2; [L50] SORT_2 input_106; [L51] SORT_2 input_108; [L52] SORT_2 input_110; [L53] SORT_2 input_112; [L54] SORT_2 input_114; [L55] SORT_2 input_116; [L56] SORT_2 input_118; [L57] SORT_2 input_120; [L58] SORT_2 input_122; [L59] SORT_2 input_124; [L60] SORT_2 input_126; [L61] SORT_2 input_128; [L62] SORT_1 input_130; [L63] SORT_1 input_132; [L64] SORT_1 input_134; [L65] SORT_1 input_136; [L66] SORT_1 input_138; [L67] SORT_1 input_140; [L68] SORT_1 input_142; [L69] SORT_1 input_144; [L70] SORT_1 input_146; [L71] SORT_1 input_148; [L72] SORT_1 input_150; [L73] SORT_1 input_152; [L74] SORT_1 input_154; [L75] SORT_1 input_156; [L76] SORT_1 input_158; [L77] SORT_1 input_162; [L78] SORT_1 input_164; [L79] SORT_1 input_176; [L80] SORT_1 input_179; [L81] SORT_1 input_196; [L82] SORT_1 input_214; [L83] SORT_1 input_225; [L84] SORT_1 input_228; [L85] SORT_1 input_231; [L86] SORT_1 input_240; [L87] SORT_1 input_243; [L88] SORT_1 input_261; [L89] SORT_1 input_276; [L90] SORT_1 input_287; [L91] SORT_1 input_290; [L92] SORT_1 input_293; [L93] SORT_1 input_302; [L94] SORT_1 input_305; [L95] SORT_1 input_325; [L96] SORT_1 input_340; [L97] SORT_1 input_351; [L99] SORT_2 state_6 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L100] SORT_2 state_8 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L101] SORT_2 state_10 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L102] SORT_2 state_12 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L103] SORT_2 state_14 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L104] SORT_2 state_16 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L105] SORT_2 state_18 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L106] SORT_2 state_20 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L107] SORT_2 state_22 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L108] SORT_2 state_24 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L109] SORT_2 state_26 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L110] SORT_2 state_28 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L111] SORT_1 state_31 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L112] SORT_1 state_33 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L113] SORT_1 state_35 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L114] SORT_1 state_37 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L115] SORT_1 state_39 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L116] SORT_1 state_41 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L117] SORT_1 state_43 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L118] SORT_1 state_45 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L119] SORT_1 state_47 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L120] SORT_1 state_49 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L121] SORT_1 state_51 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L122] SORT_1 state_53 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L123] SORT_1 state_55 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L124] SORT_1 state_57 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L125] SORT_1 state_59 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L126] SORT_1 state_61 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L127] SORT_1 state_63 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L129] SORT_2 init_7_arg_1 = var_5; [L130] state_6 = init_7_arg_1 [L131] SORT_2 init_9_arg_1 = var_5; [L132] state_8 = init_9_arg_1 [L133] SORT_2 init_11_arg_1 = var_5; [L134] state_10 = init_11_arg_1 [L135] SORT_2 init_13_arg_1 = var_5; [L136] state_12 = init_13_arg_1 [L137] SORT_2 init_15_arg_1 = var_5; [L138] state_14 = init_15_arg_1 [L139] SORT_2 init_17_arg_1 = var_5; [L140] state_16 = init_17_arg_1 [L141] SORT_2 init_19_arg_1 = var_5; [L142] state_18 = init_19_arg_1 [L143] SORT_2 init_21_arg_1 = var_5; [L144] state_20 = init_21_arg_1 [L145] SORT_2 init_23_arg_1 = var_5; [L146] state_22 = init_23_arg_1 [L147] SORT_2 init_25_arg_1 = var_5; [L148] state_24 = init_25_arg_1 [L149] SORT_2 init_27_arg_1 = var_5; [L150] state_26 = init_27_arg_1 [L151] SORT_2 init_29_arg_1 = var_5; [L152] state_28 = init_29_arg_1 [L153] SORT_1 init_32_arg_1 = var_30; [L154] state_31 = init_32_arg_1 [L155] SORT_1 init_34_arg_1 = var_30; [L156] state_33 = init_34_arg_1 [L157] SORT_1 init_36_arg_1 = var_30; [L158] state_35 = init_36_arg_1 [L159] SORT_1 init_38_arg_1 = var_30; [L160] state_37 = init_38_arg_1 [L161] SORT_1 init_40_arg_1 = var_30; [L162] state_39 = init_40_arg_1 [L163] SORT_1 init_42_arg_1 = var_30; [L164] state_41 = init_42_arg_1 [L165] SORT_1 init_44_arg_1 = var_30; [L166] state_43 = init_44_arg_1 [L167] SORT_1 init_46_arg_1 = var_30; [L168] state_45 = init_46_arg_1 [L169] SORT_1 init_48_arg_1 = var_30; [L170] state_47 = init_48_arg_1 [L171] SORT_1 init_50_arg_1 = var_30; [L172] state_49 = init_50_arg_1 [L173] SORT_1 init_52_arg_1 = var_30; [L174] state_51 = init_52_arg_1 [L175] SORT_1 init_54_arg_1 = var_30; [L176] state_53 = init_54_arg_1 [L177] SORT_1 init_56_arg_1 = var_30; [L178] state_55 = init_56_arg_1 [L179] SORT_1 init_58_arg_1 = var_30; [L180] state_57 = init_58_arg_1 [L181] SORT_1 init_60_arg_1 = var_30; [L182] state_59 = init_60_arg_1 [L183] SORT_1 init_62_arg_1 = var_30; [L184] state_61 = init_62_arg_1 [L185] SORT_1 init_64_arg_1 = var_30; [L186] state_63 = init_64_arg_1 VAL [init_11_arg_1=0, init_13_arg_1=0, init_15_arg_1=0, init_17_arg_1=0, init_19_arg_1=0, init_21_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_29_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, init_44_arg_1=0, init_46_arg_1=0, init_48_arg_1=0, init_50_arg_1=0, init_52_arg_1=0, init_54_arg_1=0, init_56_arg_1=0, init_58_arg_1=0, init_60_arg_1=0, init_62_arg_1=0, init_64_arg_1=0, init_7_arg_1=0, init_9_arg_1=0, mask_SORT_1=1, mask_SORT_2=255, mask_SORT_3=4294967295, mask_SORT_4=4294967295, msb_SORT_1=1, msb_SORT_2=128, msb_SORT_3=8388608, msb_SORT_4=2147483648, state_10=0, state_12=0, state_14=0, state_16=0, state_18=0, state_20=0, state_22=0, state_24=0, state_26=0, state_28=0, state_31=0, state_33=0, state_35=0, state_37=0, state_39=0, state_41=0, state_43=0, state_45=0, state_47=0, state_49=0, state_51=0, state_53=0, state_55=0, state_57=0, state_59=0, state_6=0, state_61=0, state_63=0, state_8=0, var_160=1, var_166=3, var_167=0, var_168=1, var_197=0, var_198=1, var_205=3, var_30=0, var_310=2, var_494=2, var_5=0, var_79=0] [L189] input_106 = __VERIFIER_nondet_uchar() [L190] input_106 = input_106 & mask_SORT_2 [L191] input_108 = __VERIFIER_nondet_uchar() [L192] input_108 = input_108 & mask_SORT_2 [L193] input_110 = __VERIFIER_nondet_uchar() [L194] input_110 = input_110 & mask_SORT_2 [L195] input_112 = __VERIFIER_nondet_uchar() [L196] input_112 = input_112 & mask_SORT_2 [L197] input_114 = __VERIFIER_nondet_uchar() [L198] input_114 = input_114 & mask_SORT_2 [L199] input_116 = __VERIFIER_nondet_uchar() [L200] input_116 = input_116 & mask_SORT_2 [L201] input_118 = __VERIFIER_nondet_uchar() [L202] input_118 = input_118 & mask_SORT_2 [L203] input_120 = __VERIFIER_nondet_uchar() [L204] input_120 = input_120 & mask_SORT_2 [L205] input_122 = __VERIFIER_nondet_uchar() [L206] input_122 = input_122 & mask_SORT_2 [L207] input_124 = __VERIFIER_nondet_uchar() [L208] input_124 = input_124 & mask_SORT_2 [L209] input_126 = __VERIFIER_nondet_uchar() [L210] input_126 = input_126 & mask_SORT_2 [L211] input_128 = __VERIFIER_nondet_uchar() [L212] input_128 = input_128 & mask_SORT_2 [L213] input_130 = __VERIFIER_nondet_uchar() [L214] input_130 = input_130 & mask_SORT_1 [L215] input_132 = __VERIFIER_nondet_uchar() [L216] input_132 = input_132 & mask_SORT_1 [L217] input_134 = __VERIFIER_nondet_uchar() [L218] input_134 = input_134 & mask_SORT_1 [L219] input_136 = __VERIFIER_nondet_uchar() [L220] input_136 = input_136 & mask_SORT_1 [L221] input_138 = __VERIFIER_nondet_uchar() [L222] input_138 = input_138 & mask_SORT_1 [L223] input_140 = __VERIFIER_nondet_uchar() [L224] input_140 = input_140 & mask_SORT_1 [L225] input_142 = __VERIFIER_nondet_uchar() [L226] input_142 = input_142 & mask_SORT_1 [L227] input_144 = __VERIFIER_nondet_uchar() [L228] input_144 = input_144 & mask_SORT_1 [L229] input_146 = __VERIFIER_nondet_uchar() [L230] input_146 = input_146 & mask_SORT_1 [L231] input_148 = __VERIFIER_nondet_uchar() [L232] input_148 = input_148 & mask_SORT_1 [L233] input_150 = __VERIFIER_nondet_uchar() [L234] input_150 = input_150 & mask_SORT_1 [L235] input_152 = __VERIFIER_nondet_uchar() [L236] input_152 = input_152 & mask_SORT_1 [L237] input_154 = __VERIFIER_nondet_uchar() [L238] input_154 = input_154 & mask_SORT_1 [L239] input_156 = __VERIFIER_nondet_uchar() [L240] input_156 = input_156 & mask_SORT_1 [L241] input_158 = __VERIFIER_nondet_uchar() [L242] input_158 = input_158 & mask_SORT_1 [L243] input_162 = __VERIFIER_nondet_uchar() [L244] input_162 = input_162 & mask_SORT_1 [L245] input_164 = __VERIFIER_nondet_uchar() [L246] input_164 = input_164 & mask_SORT_1 [L247] input_176 = __VERIFIER_nondet_uchar() [L248] input_176 = input_176 & mask_SORT_1 [L249] input_179 = __VERIFIER_nondet_uchar() [L250] input_179 = input_179 & mask_SORT_1 [L251] input_196 = __VERIFIER_nondet_uchar() [L252] input_196 = input_196 & mask_SORT_1 [L253] input_214 = __VERIFIER_nondet_uchar() [L254] input_225 = __VERIFIER_nondet_uchar() [L255] input_225 = input_225 & mask_SORT_1 [L256] input_228 = __VERIFIER_nondet_uchar() [L257] input_228 = input_228 & mask_SORT_1 [L258] input_231 = __VERIFIER_nondet_uchar() [L259] input_231 = input_231 & mask_SORT_1 [L260] input_240 = __VERIFIER_nondet_uchar() [L261] input_240 = input_240 & mask_SORT_1 [L262] input_243 = __VERIFIER_nondet_uchar() [L263] input_243 = input_243 & mask_SORT_1 [L264] input_261 = __VERIFIER_nondet_uchar() [L265] input_261 = input_261 & mask_SORT_1 [L266] input_276 = __VERIFIER_nondet_uchar() [L267] input_287 = __VERIFIER_nondet_uchar() [L268] input_287 = input_287 & mask_SORT_1 [L269] input_290 = __VERIFIER_nondet_uchar() [L270] input_290 = input_290 & mask_SORT_1 [L271] input_293 = __VERIFIER_nondet_uchar() [L272] input_293 = input_293 & mask_SORT_1 [L273] input_302 = __VERIFIER_nondet_uchar() [L274] input_302 = input_302 & mask_SORT_1 [L275] input_305 = __VERIFIER_nondet_uchar() [L276] input_305 = input_305 & mask_SORT_1 [L277] input_325 = __VERIFIER_nondet_uchar() [L278] input_325 = input_325 & mask_SORT_1 [L279] input_340 = __VERIFIER_nondet_uchar() [L280] input_351 = __VERIFIER_nondet_uchar() [L281] input_351 = input_351 & mask_SORT_1 [L284] SORT_1 var_65_arg_0 = state_31; [L285] SORT_1 var_65_arg_1 = ~state_33; [L286] var_65_arg_1 = var_65_arg_1 & mask_SORT_1 [L287] SORT_1 var_65 = var_65_arg_0 & var_65_arg_1; [L288] SORT_1 var_66_arg_0 = var_65; [L289] SORT_1 var_66_arg_1 = ~state_35; [L290] var_66_arg_1 = var_66_arg_1 & mask_SORT_1 [L291] SORT_1 var_66 = var_66_arg_0 & var_66_arg_1; [L292] SORT_1 var_67_arg_0 = var_66; [L293] SORT_1 var_67_arg_1 = ~state_37; [L294] var_67_arg_1 = var_67_arg_1 & mask_SORT_1 [L295] SORT_1 var_67 = var_67_arg_0 & var_67_arg_1; [L296] SORT_1 var_68_arg_0 = var_67; [L297] SORT_1 var_68_arg_1 = ~state_39; [L298] var_68_arg_1 = var_68_arg_1 & mask_SORT_1 [L299] SORT_1 var_68 = var_68_arg_0 & var_68_arg_1; [L300] SORT_1 var_69_arg_0 = var_68; [L301] SORT_1 var_69_arg_1 = state_41; [L302] SORT_1 var_69 = var_69_arg_0 & var_69_arg_1; [L303] SORT_1 var_70_arg_0 = var_69; [L304] SORT_1 var_70_arg_1 = ~state_43; [L305] var_70_arg_1 = var_70_arg_1 & mask_SORT_1 [L306] SORT_1 var_70 = var_70_arg_0 & var_70_arg_1; [L307] SORT_1 var_71_arg_0 = var_70; [L308] SORT_1 var_71_arg_1 = ~state_45; [L309] var_71_arg_1 = var_71_arg_1 & mask_SORT_1 [L310] SORT_1 var_71 = var_71_arg_0 & var_71_arg_1; [L311] SORT_1 var_72_arg_0 = var_71; [L312] SORT_1 var_72_arg_1 = ~state_47; [L313] var_72_arg_1 = var_72_arg_1 & mask_SORT_1 [L314] SORT_1 var_72 = var_72_arg_0 & var_72_arg_1; [L315] SORT_1 var_73_arg_0 = var_72; [L316] SORT_1 var_73_arg_1 = ~state_49; [L317] var_73_arg_1 = var_73_arg_1 & mask_SORT_1 [L318] SORT_1 var_73 = var_73_arg_0 & var_73_arg_1; [L319] SORT_1 var_74_arg_0 = var_73; [L320] SORT_1 var_74_arg_1 = state_51; [L321] SORT_1 var_74 = var_74_arg_0 & var_74_arg_1; [L322] SORT_1 var_75_arg_0 = var_74; [L323] SORT_1 var_75_arg_1 = ~state_53; [L324] var_75_arg_1 = var_75_arg_1 & mask_SORT_1 [L325] SORT_1 var_75 = var_75_arg_0 & var_75_arg_1; [L326] SORT_1 var_76_arg_0 = var_75; [L327] SORT_1 var_76_arg_1 = ~state_55; [L328] var_76_arg_1 = var_76_arg_1 & mask_SORT_1 [L329] SORT_1 var_76 = var_76_arg_0 & var_76_arg_1; [L330] SORT_1 var_77_arg_0 = var_76; [L331] SORT_1 var_77_arg_1 = ~state_57; [L332] var_77_arg_1 = var_77_arg_1 & mask_SORT_1 [L333] SORT_1 var_77 = var_77_arg_0 & var_77_arg_1; [L334] SORT_1 var_78_arg_0 = var_77; [L335] SORT_1 var_78_arg_1 = ~state_59; [L336] var_78_arg_1 = var_78_arg_1 & mask_SORT_1 [L337] SORT_1 var_78 = var_78_arg_0 & var_78_arg_1; [L338] SORT_2 var_80_arg_0 = var_79; [L339] SORT_2 var_80_arg_1 = state_6; [L340] SORT_1 var_80 = var_80_arg_0 == var_80_arg_1; [L341] SORT_1 var_81_arg_0 = var_78; [L342] SORT_1 var_81_arg_1 = var_80; [L343] SORT_1 var_81 = var_81_arg_0 & var_81_arg_1; [L344] SORT_2 var_82_arg_0 = var_79; [L345] SORT_2 var_82_arg_1 = state_8; [L346] SORT_1 var_82 = var_82_arg_0 == var_82_arg_1; [L347] SORT_1 var_83_arg_0 = var_81; [L348] SORT_1 var_83_arg_1 = var_82; [L349] SORT_1 var_83 = var_83_arg_0 & var_83_arg_1; [L350] SORT_2 var_84_arg_0 = var_79; [L351] SORT_2 var_84_arg_1 = state_10; [L352] SORT_1 var_84 = var_84_arg_0 == var_84_arg_1; [L353] SORT_1 var_85_arg_0 = var_83; [L354] SORT_1 var_85_arg_1 = var_84; [L355] SORT_1 var_85 = var_85_arg_0 & var_85_arg_1; [L356] SORT_2 var_86_arg_0 = var_79; [L357] SORT_2 var_86_arg_1 = state_12; [L358] SORT_1 var_86 = var_86_arg_0 == var_86_arg_1; [L359] SORT_1 var_87_arg_0 = var_85; [L360] SORT_1 var_87_arg_1 = var_86; [L361] SORT_1 var_87 = var_87_arg_0 & var_87_arg_1; [L362] SORT_2 var_88_arg_0 = var_79; [L363] SORT_2 var_88_arg_1 = state_14; [L364] SORT_1 var_88 = var_88_arg_0 == var_88_arg_1; [L365] SORT_1 var_89_arg_0 = var_87; [L366] SORT_1 var_89_arg_1 = var_88; [L367] SORT_1 var_89 = var_89_arg_0 & var_89_arg_1; [L368] SORT_2 var_90_arg_0 = var_79; [L369] SORT_2 var_90_arg_1 = state_16; [L370] SORT_1 var_90 = var_90_arg_0 == var_90_arg_1; [L371] SORT_1 var_91_arg_0 = var_89; [L372] SORT_1 var_91_arg_1 = var_90; [L373] SORT_1 var_91 = var_91_arg_0 & var_91_arg_1; [L374] SORT_2 var_92_arg_0 = var_79; [L375] SORT_2 var_92_arg_1 = state_18; [L376] SORT_1 var_92 = var_92_arg_0 == var_92_arg_1; [L377] SORT_1 var_93_arg_0 = var_91; [L378] SORT_1 var_93_arg_1 = var_92; [L379] SORT_1 var_93 = var_93_arg_0 & var_93_arg_1; [L380] SORT_2 var_94_arg_0 = var_79; [L381] SORT_2 var_94_arg_1 = state_20; [L382] SORT_1 var_94 = var_94_arg_0 == var_94_arg_1; [L383] SORT_1 var_95_arg_0 = var_93; [L384] SORT_1 var_95_arg_1 = var_94; [L385] SORT_1 var_95 = var_95_arg_0 & var_95_arg_1; [L386] SORT_2 var_96_arg_0 = var_79; [L387] SORT_2 var_96_arg_1 = state_22; [L388] SORT_1 var_96 = var_96_arg_0 == var_96_arg_1; [L389] SORT_1 var_97_arg_0 = var_95; [L390] SORT_1 var_97_arg_1 = var_96; [L391] SORT_1 var_97 = var_97_arg_0 & var_97_arg_1; [L392] SORT_2 var_98_arg_0 = var_79; [L393] SORT_2 var_98_arg_1 = state_24; [L394] SORT_1 var_98 = var_98_arg_0 == var_98_arg_1; [L395] SORT_1 var_99_arg_0 = var_97; [L396] SORT_1 var_99_arg_1 = var_98; [L397] SORT_1 var_99 = var_99_arg_0 & var_99_arg_1; [L398] SORT_2 var_100_arg_0 = var_79; [L399] SORT_2 var_100_arg_1 = state_26; [L400] SORT_1 var_100 = var_100_arg_0 == var_100_arg_1; [L401] SORT_1 var_101_arg_0 = var_99; [L402] SORT_1 var_101_arg_1 = var_100; [L403] SORT_1 var_101 = var_101_arg_0 & var_101_arg_1; [L404] SORT_2 var_102_arg_0 = var_79; [L405] SORT_2 var_102_arg_1 = state_28; [L406] SORT_1 var_102 = var_102_arg_0 == var_102_arg_1; [L407] SORT_1 var_103_arg_0 = var_101; [L408] SORT_1 var_103_arg_1 = var_102; [L409] SORT_1 var_103 = var_103_arg_0 & var_103_arg_1; [L410] SORT_1 var_104_arg_0 = state_63; [L411] SORT_1 var_104_arg_1 = var_103; [L412] SORT_1 var_104 = var_104_arg_0 & var_104_arg_1; [L413] var_104 = var_104 & mask_SORT_1 [L414] SORT_1 bad_105_arg_0 = var_104; [L415] CALL __VERIFIER_assert(!(bad_105_arg_0)) [L20] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L415] RET __VERIFIER_assert(!(bad_105_arg_0)) [L417] SORT_2 next_107_arg_1 = input_106; [L418] SORT_2 next_109_arg_1 = input_108; [L419] SORT_2 next_111_arg_1 = input_110; [L420] SORT_2 next_113_arg_1 = input_112; [L421] SORT_2 next_115_arg_1 = input_114; [L422] SORT_2 next_117_arg_1 = input_116; [L423] SORT_2 next_119_arg_1 = input_118; [L424] SORT_2 next_121_arg_1 = input_120; [L425] SORT_2 next_123_arg_1 = input_122; [L426] SORT_2 next_125_arg_1 = input_124; [L427] SORT_2 next_127_arg_1 = input_126; [L428] SORT_2 next_129_arg_1 = input_128; [L429] SORT_1 next_131_arg_1 = input_130; [L430] SORT_1 next_133_arg_1 = input_132; [L431] SORT_1 next_135_arg_1 = input_134; [L432] SORT_1 next_137_arg_1 = input_136; [L433] SORT_1 next_139_arg_1 = input_138; [L434] SORT_1 next_141_arg_1 = input_140; [L435] SORT_1 next_143_arg_1 = input_142; [L436] SORT_1 next_145_arg_1 = input_144; [L437] SORT_1 next_147_arg_1 = input_146; [L438] SORT_1 next_149_arg_1 = input_148; [L439] SORT_1 next_151_arg_1 = input_150; [L440] SORT_1 next_153_arg_1 = input_152; [L441] SORT_1 next_155_arg_1 = input_154; [L442] SORT_1 next_157_arg_1 = input_156; [L443] SORT_1 next_159_arg_1 = input_158; [L444] SORT_1 next_161_arg_1 = var_160; [L445] SORT_1 var_163_arg_0 = input_130; [L446] SORT_1 var_163_arg_1 = ~input_162; [L447] var_163_arg_1 = var_163_arg_1 & mask_SORT_1 [L448] SORT_1 var_163 = var_163_arg_0 | var_163_arg_1; [L449] SORT_1 var_165_arg_0 = input_134; [L450] SORT_1 var_165_arg_1 = input_162; [L451] SORT_1 var_165 = var_165_arg_0 | var_165_arg_1; [L452] SORT_1 var_169_arg_0 = input_162; [L453] SORT_2 var_169_arg_1 = var_168; [L454] SORT_2 var_169_arg_2 = input_118; [L455] EXPR var_169_arg_0 ? var_169_arg_1 : var_169_arg_2 [L455] SORT_2 var_169 = var_169_arg_0 ? var_169_arg_1 : var_169_arg_2; [L456] var_169 = var_169 & mask_SORT_2 [L457] SORT_3 var_170_arg_0 = var_167; [L458] SORT_2 var_170_arg_1 = var_169; [L459] SORT_4 var_170 = ((SORT_4)var_170_arg_0 << 8) | var_170_arg_1; [L460] var_170 = var_170 & mask_SORT_4 [L461] SORT_4 var_171_arg_0 = var_166; [L462] SORT_4 var_171_arg_1 = var_170; [L463] SORT_1 var_171 = var_171_arg_0 <= var_171_arg_1; [L464] SORT_1 var_172_arg_0 = var_165; [L465] SORT_1 var_172_arg_1 = ~var_171; [L466] var_172_arg_1 = var_172_arg_1 & mask_SORT_1 [L467] SORT_1 var_172 = var_172_arg_0 & var_172_arg_1; [L468] SORT_1 var_173_arg_0 = ~input_164; [L469] var_173_arg_0 = var_173_arg_0 & mask_SORT_1 [L470] SORT_1 var_173_arg_1 = var_172; [L471] SORT_1 var_173 = var_173_arg_0 | var_173_arg_1; [L472] SORT_1 var_174_arg_0 = var_163; [L473] SORT_1 var_174_arg_1 = var_173; [L474] SORT_1 var_174 = var_174_arg_0 & var_174_arg_1; [L475] SORT_1 var_175_arg_0 = input_136; [L476] SORT_1 var_175_arg_1 = input_164; [L477] SORT_1 var_175 = var_175_arg_0 | var_175_arg_1; [L478] SORT_1 var_177_arg_0 = var_175; [L479] SORT_1 var_177_arg_1 = ~input_176; [L480] var_177_arg_1 = var_177_arg_1 & mask_SORT_1 [L481] SORT_1 var_177 = var_177_arg_0 | var_177_arg_1; [L482] SORT_1 var_178_arg_0 = var_174; [L483] SORT_1 var_178_arg_1 = var_177; [L484] SORT_1 var_178 = var_178_arg_0 & var_178_arg_1; [L485] SORT_1 var_180_arg_0 = input_138; [L486] SORT_1 var_180_arg_1 = input_176; [L487] SORT_1 var_180 = var_180_arg_0 | var_180_arg_1; [L488] SORT_1 var_181_arg_0 = input_176; [L489] SORT_2 var_181_arg_1 = var_79; [L490] SORT_2 var_181_arg_2 = input_120; [L491] EXPR var_181_arg_0 ? var_181_arg_1 : var_181_arg_2 [L491] SORT_2 var_181 = var_181_arg_0 ? var_181_arg_1 : var_181_arg_2; [L492] var_181 = var_181 & mask_SORT_2 [L493] SORT_3 var_182_arg_0 = var_167; [L494] SORT_2 var_182_arg_1 = var_181; [L495] SORT_4 var_182 = ((SORT_4)var_182_arg_0 << 8) | var_182_arg_1; [L496] var_182 = var_182 & mask_SORT_4 [L497] SORT_4 var_183_arg_0 = var_166; [L498] SORT_4 var_183_arg_1 = var_182; [L499] SORT_1 var_183 = var_183_arg_0 <= var_183_arg_1; [L500] SORT_2 var_184_arg_0 = var_79; [L501] SORT_2 var_184_arg_1 = var_181; [L502] SORT_1 var_184 = var_184_arg_0 == var_184_arg_1; [L503] SORT_1 var_185_arg_0 = input_164; [L504] SORT_2 var_185_arg_1 = var_169; [L505] SORT_2 var_185_arg_2 = input_106; [L506] EXPR var_185_arg_0 ? var_185_arg_1 : var_185_arg_2 [L506] SORT_2 var_185 = var_185_arg_0 ? var_185_arg_1 : var_185_arg_2; [L507] SORT_2 var_186_arg_0 = var_168; [L508] SORT_2 var_186_arg_1 = var_181; [L509] SORT_1 var_186 = var_186_arg_0 == var_186_arg_1; [L510] SORT_1 var_187_arg_0 = var_186; [L511] SORT_2 var_187_arg_1 = input_108; [L512] SORT_2 var_187_arg_2 = input_110; [L513] EXPR var_187_arg_0 ? var_187_arg_1 : var_187_arg_2 [L513] SORT_2 var_187 = var_187_arg_0 ? var_187_arg_1 : var_187_arg_2; [L514] SORT_1 var_188_arg_0 = var_184; [L515] SORT_2 var_188_arg_1 = var_185; [L516] SORT_2 var_188_arg_2 = var_187; [L517] EXPR var_188_arg_0 ? var_188_arg_1 : var_188_arg_2 [L517] SORT_2 var_188 = var_188_arg_0 ? var_188_arg_1 : var_188_arg_2; [L518] var_188 = var_188 & mask_SORT_2 [L519] SORT_3 var_189_arg_0 = var_167; [L520] SORT_2 var_189_arg_1 = var_188; [L521] SORT_4 var_189 = ((SORT_4)var_189_arg_0 << 8) | var_189_arg_1; [L522] var_189 = var_189 & mask_SORT_4 [L523] SORT_4 var_190_arg_0 = var_170; [L524] SORT_4 var_190_arg_1 = var_189; [L525] SORT_1 var_190 = var_190_arg_0 <= var_190_arg_1; [L526] SORT_1 var_191_arg_0 = var_184; [L527] SORT_1 var_191_arg_1 = ~var_190; [L528] var_191_arg_1 = var_191_arg_1 & mask_SORT_1 [L529] SORT_1 var_191 = var_191_arg_0 | var_191_arg_1; [L530] SORT_1 var_192_arg_0 = ~var_183; [L531] var_192_arg_0 = var_192_arg_0 & mask_SORT_1 [L532] SORT_1 var_192_arg_1 = var_191; [L533] SORT_1 var_192 = var_192_arg_0 & var_192_arg_1; [L534] SORT_1 var_193_arg_0 = var_180; [L535] SORT_1 var_193_arg_1 = var_192; [L536] SORT_1 var_193 = var_193_arg_0 & var_193_arg_1; [L537] SORT_1 var_194_arg_0 = ~input_179; [L538] var_194_arg_0 = var_194_arg_0 & mask_SORT_1 [L539] SORT_1 var_194_arg_1 = var_193; [L540] SORT_1 var_194 = var_194_arg_0 | var_194_arg_1; [L541] SORT_1 var_195_arg_0 = var_178; [L542] SORT_1 var_195_arg_1 = var_194; [L543] SORT_1 var_195 = var_195_arg_0 & var_195_arg_1; [L544] SORT_4 var_199_arg_0 = var_170; [L545] SORT_4 var_199_arg_1 = var_198; [L546] SORT_4 var_199 = var_199_arg_0 - var_199_arg_1; [L547] var_199 = var_199 & mask_SORT_4 [L548] SORT_4 var_200_arg_0 = var_197; [L549] SORT_4 var_200_arg_1 = var_199; [L550] SORT_1 var_200 = var_200_arg_0 == var_200_arg_1; [L551] SORT_4 var_201_arg_0 = var_198; [L552] SORT_4 var_201_arg_1 = var_199; [L553] SORT_1 var_201 = var_201_arg_0 == var_201_arg_1; [L554] SORT_1 var_202_arg_0 = var_201; [L555] SORT_2 var_202_arg_1 = input_108; [L556] SORT_2 var_202_arg_2 = input_110; [L557] EXPR var_202_arg_0 ? var_202_arg_1 : var_202_arg_2 [L557] SORT_2 var_202 = var_202_arg_0 ? var_202_arg_1 : var_202_arg_2; [L558] SORT_1 var_203_arg_0 = var_200; [L559] SORT_2 var_203_arg_1 = var_185; [L560] SORT_2 var_203_arg_2 = var_202; [L561] EXPR var_203_arg_0 ? var_203_arg_1 : var_203_arg_2 [L561] SORT_2 var_203 = var_203_arg_0 ? var_203_arg_1 : var_203_arg_2; [L562] var_203 = var_203 & mask_SORT_2 [L563] SORT_2 var_204_arg_0 = var_79; [L564] SORT_2 var_204_arg_1 = var_203; [L565] SORT_1 var_204 = var_204_arg_0 == var_204_arg_1; [L566] SORT_4 var_206_arg_0 = var_198; [L567] SORT_4 var_206_arg_1 = var_182; [L568] SORT_4 var_206 = var_206_arg_0 + var_206_arg_1; [L569] SORT_4 var_207_arg_0 = var_206; [L570] SORT_2 var_207 = var_207_arg_0 >> 0; [L571] SORT_1 var_208_arg_0 = input_179; [L572] SORT_2 var_208_arg_1 = var_207; [L573] SORT_2 var_208_arg_2 = var_181; [L574] EXPR var_208_arg_0 ? var_208_arg_1 : var_208_arg_2 [L574] SORT_2 var_208 = var_208_arg_0 ? var_208_arg_1 : var_208_arg_2; [L575] var_208 = var_208 & mask_SORT_2 [L576] SORT_2 var_209_arg_0 = var_205; [L577] SORT_2 var_209_arg_1 = var_208; [L578] SORT_1 var_209 = var_209_arg_0 == var_209_arg_1; [L579] SORT_1 var_210_arg_0 = ~var_204; [L580] var_210_arg_0 = var_210_arg_0 & mask_SORT_1 [L581] SORT_1 var_210_arg_1 = var_209; [L582] SORT_1 var_210 = var_210_arg_0 | var_210_arg_1; [L583] SORT_1 var_211_arg_0 = var_180; [L584] SORT_1 var_211_arg_1 = var_210; [L585] SORT_1 var_211 = var_211_arg_0 & var_211_arg_1; [L586] SORT_1 var_212_arg_0 = ~input_196; [L587] var_212_arg_0 = var_212_arg_0 & mask_SORT_1 [L588] SORT_1 var_212_arg_1 = var_211; [L589] SORT_1 var_212 = var_212_arg_0 | var_212_arg_1; [L590] SORT_1 var_213_arg_0 = var_195; [L591] SORT_1 var_213_arg_1 = var_212; [L592] SORT_1 var_213 = var_213_arg_0 & var_213_arg_1; [L593] SORT_1 var_215_arg_0 = var_165; [L594] SORT_1 var_215_arg_1 = ~input_164; [L595] var_215_arg_1 = var_215_arg_1 & mask_SORT_1 [L596] SORT_1 var_215 = var_215_arg_0 & var_215_arg_1; [L597] SORT_1 var_216_arg_0 = var_215; [L598] SORT_1 var_216_arg_1 = input_196; [L599] SORT_1 var_216 = var_216_arg_0 | var_216_arg_1; [L600] SORT_4 var_217_arg_0 = var_198; [L601] SORT_4 var_217_arg_1 = var_170; [L602] SORT_4 var_217 = var_217_arg_0 + var_217_arg_1; [L603] SORT_4 var_218_arg_0 = var_217; [L604] SORT_2 var_218 = var_218_arg_0 >> 0; [L605] SORT_1 var_219_arg_0 = input_196; [L606] SORT_2 var_219_arg_1 = var_218; [L607] SORT_2 var_219_arg_2 = var_169; [L608] EXPR var_219_arg_0 ? var_219_arg_1 : var_219_arg_2 [L608] SORT_2 var_219 = var_219_arg_0 ? var_219_arg_1 : var_219_arg_2; [L609] var_219 = var_219 & mask_SORT_2 [L610] SORT_2 var_220_arg_0 = var_205; [L611] SORT_2 var_220_arg_1 = var_219; [L612] SORT_1 var_220 = var_220_arg_0 == var_220_arg_1; [L613] SORT_1 var_221_arg_0 = var_216; [L614] SORT_1 var_221_arg_1 = var_220; [L615] SORT_1 var_221 = var_221_arg_0 & var_221_arg_1; [L616] SORT_1 var_222_arg_0 = ~input_214; [L617] var_222_arg_0 = var_222_arg_0 & mask_SORT_1 [L618] SORT_1 var_222_arg_1 = var_221; [L619] SORT_1 var_222 = var_222_arg_0 | var_222_arg_1; [L620] SORT_1 var_223_arg_0 = var_213; [L621] SORT_1 var_223_arg_1 = var_222; [L622] SORT_1 var_223 = var_223_arg_0 & var_223_arg_1; [L623] SORT_1 var_224_arg_0 = input_132; [L624] SORT_1 var_224_arg_1 = input_214; [L625] SORT_1 var_224 = var_224_arg_0 | var_224_arg_1; [L626] SORT_1 var_226_arg_0 = var_224; [L627] SORT_1 var_226_arg_1 = ~input_225; [L628] var_226_arg_1 = var_226_arg_1 & mask_SORT_1 [L629] SORT_1 var_226 = var_226_arg_0 | var_226_arg_1; [L630] SORT_1 var_227_arg_0 = var_223; [L631] SORT_1 var_227_arg_1 = var_226; [L632] SORT_1 var_227 = var_227_arg_0 & var_227_arg_1; [L633] SORT_1 var_229_arg_0 = input_140; [L634] SORT_1 var_229_arg_1 = ~input_228; [L635] var_229_arg_1 = var_229_arg_1 & mask_SORT_1 [L636] SORT_1 var_229 = var_229_arg_0 | var_229_arg_1; [L637] SORT_1 var_230_arg_0 = var_227; [L638] SORT_1 var_230_arg_1 = var_229; [L639] SORT_1 var_230 = var_230_arg_0 & var_230_arg_1; [L640] SORT_1 var_232_arg_0 = input_144; [L641] SORT_1 var_232_arg_1 = input_228; [L642] SORT_1 var_232 = var_232_arg_0 | var_232_arg_1; [L643] SORT_1 var_233_arg_0 = input_228; [L644] SORT_2 var_233_arg_1 = var_168; [L645] SORT_2 var_233_arg_2 = input_122; [L646] EXPR var_233_arg_0 ? var_233_arg_1 : var_233_arg_2 [L646] SORT_2 var_233 = var_233_arg_0 ? var_233_arg_1 : var_233_arg_2; [L647] var_233 = var_233 & mask_SORT_2 [L648] SORT_3 var_234_arg_0 = var_167; [L649] SORT_2 var_234_arg_1 = var_233; [L650] SORT_4 var_234 = ((SORT_4)var_234_arg_0 << 8) | var_234_arg_1; [L651] var_234 = var_234 & mask_SORT_4 [L652] SORT_4 var_235_arg_0 = var_166; [L653] SORT_4 var_235_arg_1 = var_234; [L654] SORT_1 var_235 = var_235_arg_0 <= var_235_arg_1; [L655] SORT_1 var_236_arg_0 = var_232; [L656] SORT_1 var_236_arg_1 = ~var_235; [L657] var_236_arg_1 = var_236_arg_1 & mask_SORT_1 [L658] SORT_1 var_236 = var_236_arg_0 & var_236_arg_1; [L659] SORT_1 var_237_arg_0 = ~input_231; [L660] var_237_arg_0 = var_237_arg_0 & mask_SORT_1 [L661] SORT_1 var_237_arg_1 = var_236; [L662] SORT_1 var_237 = var_237_arg_0 | var_237_arg_1; [L663] SORT_1 var_238_arg_0 = var_230; [L664] SORT_1 var_238_arg_1 = var_237; [L665] SORT_1 var_238 = var_238_arg_0 & var_238_arg_1; [L666] SORT_1 var_239_arg_0 = input_146; [L667] SORT_1 var_239_arg_1 = input_231; [L668] SORT_1 var_239 = var_239_arg_0 | var_239_arg_1; [L669] SORT_1 var_241_arg_0 = var_239; [L670] SORT_1 var_241_arg_1 = ~input_240; [L671] var_241_arg_1 = var_241_arg_1 & mask_SORT_1 [L672] SORT_1 var_241 = var_241_arg_0 | var_241_arg_1; [L673] SORT_1 var_242_arg_0 = var_238; [L674] SORT_1 var_242_arg_1 = var_241; [L675] SORT_1 var_242 = var_242_arg_0 & var_242_arg_1; [L676] SORT_1 var_244_arg_0 = input_148; [L677] SORT_1 var_244_arg_1 = input_240; [L678] SORT_1 var_244 = var_244_arg_0 | var_244_arg_1; [L679] SORT_1 var_245_arg_0 = input_240; [L680] SORT_2 var_245_arg_1 = var_79; [L681] SORT_2 var_245_arg_2 = input_124; [L682] EXPR var_245_arg_0 ? var_245_arg_1 : var_245_arg_2 [L682] SORT_2 var_245 = var_245_arg_0 ? var_245_arg_1 : var_245_arg_2; [L683] var_245 = var_245 & mask_SORT_2 [L684] SORT_3 var_246_arg_0 = var_167; [L685] SORT_2 var_246_arg_1 = var_245; [L686] SORT_4 var_246 = ((SORT_4)var_246_arg_0 << 8) | var_246_arg_1; [L687] var_246 = var_246 & mask_SORT_4 [L688] SORT_4 var_247_arg_0 = var_166; [L689] SORT_4 var_247_arg_1 = var_246; [L690] SORT_1 var_247 = var_247_arg_0 <= var_247_arg_1; [L691] SORT_2 var_248_arg_0 = var_168; [L692] SORT_2 var_248_arg_1 = var_245; [L693] SORT_1 var_248 = var_248_arg_0 == var_248_arg_1; [L694] SORT_2 var_249_arg_0 = var_79; [L695] SORT_2 var_249_arg_1 = var_245; [L696] SORT_1 var_249 = var_249_arg_0 == var_249_arg_1; [L697] SORT_1 var_250_arg_0 = input_225; [L698] SORT_2 var_250_arg_1 = var_79; [L699] SORT_2 var_250_arg_2 = var_185; [L700] EXPR var_250_arg_0 ? var_250_arg_1 : var_250_arg_2 [L700] SORT_2 var_250 = var_250_arg_0 ? var_250_arg_1 : var_250_arg_2; [L701] var_250 = var_250 & mask_SORT_2 [L702] SORT_1 var_251_arg_0 = input_231; [L703] SORT_2 var_251_arg_1 = var_233; [L704] SORT_2 var_251_arg_2 = input_108; [L705] EXPR var_251_arg_0 ? var_251_arg_1 : var_251_arg_2 [L705] SORT_2 var_251 = var_251_arg_0 ? var_251_arg_1 : var_251_arg_2; [L706] SORT_1 var_252_arg_0 = var_248; [L707] SORT_2 var_252_arg_1 = var_251; [L708] SORT_2 var_252_arg_2 = input_110; [L709] EXPR var_252_arg_0 ? var_252_arg_1 : var_252_arg_2 [L709] SORT_2 var_252 = var_252_arg_0 ? var_252_arg_1 : var_252_arg_2; [L710] SORT_1 var_253_arg_0 = var_249; [L711] SORT_2 var_253_arg_1 = var_250; [L712] SORT_2 var_253_arg_2 = var_252; [L713] EXPR var_253_arg_0 ? var_253_arg_1 : var_253_arg_2 [L713] SORT_2 var_253 = var_253_arg_0 ? var_253_arg_1 : var_253_arg_2; [L714] var_253 = var_253 & mask_SORT_2 [L715] SORT_3 var_254_arg_0 = var_167; [L716] SORT_2 var_254_arg_1 = var_253; [L717] SORT_4 var_254 = ((SORT_4)var_254_arg_0 << 8) | var_254_arg_1; [L718] var_254 = var_254 & mask_SORT_4 [L719] SORT_4 var_255_arg_0 = var_234; [L720] SORT_4 var_255_arg_1 = var_254; [L721] SORT_1 var_255 = var_255_arg_0 <= var_255_arg_1; [L722] SORT_1 var_256_arg_0 = var_248; [L723] SORT_1 var_256_arg_1 = ~var_255; [L724] var_256_arg_1 = var_256_arg_1 & mask_SORT_1 [L725] SORT_1 var_256 = var_256_arg_0 | var_256_arg_1; [L726] SORT_1 var_257_arg_0 = ~var_247; [L727] var_257_arg_0 = var_257_arg_0 & mask_SORT_1 [L728] SORT_1 var_257_arg_1 = var_256; [L729] SORT_1 var_257 = var_257_arg_0 & var_257_arg_1; [L730] SORT_1 var_258_arg_0 = var_244; [L731] SORT_1 var_258_arg_1 = var_257; [L732] SORT_1 var_258 = var_258_arg_0 & var_258_arg_1; [L733] SORT_1 var_259_arg_0 = ~input_243; [L734] var_259_arg_0 = var_259_arg_0 & mask_SORT_1 [L735] SORT_1 var_259_arg_1 = var_258; [L736] SORT_1 var_259 = var_259_arg_0 | var_259_arg_1; [L737] SORT_1 var_260_arg_0 = var_242; [L738] SORT_1 var_260_arg_1 = var_259; [L739] SORT_1 var_260 = var_260_arg_0 & var_260_arg_1; [L740] SORT_4 var_262_arg_0 = var_234; [L741] SORT_4 var_262_arg_1 = var_198; [L742] SORT_4 var_262 = var_262_arg_0 - var_262_arg_1; [L743] var_262 = var_262 & mask_SORT_4 [L744] SORT_4 var_263_arg_0 = var_197; [L745] SORT_4 var_263_arg_1 = var_262; [L746] SORT_1 var_263 = var_263_arg_0 == var_263_arg_1; [L747] SORT_4 var_264_arg_0 = var_198; [L748] SORT_4 var_264_arg_1 = var_262; [L749] SORT_1 var_264 = var_264_arg_0 == var_264_arg_1; [L750] SORT_1 var_265_arg_0 = var_264; [L751] SORT_2 var_265_arg_1 = var_251; [L752] SORT_2 var_265_arg_2 = input_110; [L753] EXPR var_265_arg_0 ? var_265_arg_1 : var_265_arg_2 [L753] SORT_2 var_265 = var_265_arg_0 ? var_265_arg_1 : var_265_arg_2; [L754] SORT_1 var_266_arg_0 = var_263; [L755] SORT_2 var_266_arg_1 = var_250; [L756] SORT_2 var_266_arg_2 = var_265; [L757] EXPR var_266_arg_0 ? var_266_arg_1 : var_266_arg_2 [L757] SORT_2 var_266 = var_266_arg_0 ? var_266_arg_1 : var_266_arg_2; [L758] var_266 = var_266 & mask_SORT_2 [L759] SORT_2 var_267_arg_0 = var_168; [L760] SORT_2 var_267_arg_1 = var_266; [L761] SORT_1 var_267 = var_267_arg_0 == var_267_arg_1; [L762] SORT_4 var_268_arg_0 = var_198; [L763] SORT_4 var_268_arg_1 = var_246; [L764] SORT_4 var_268 = var_268_arg_0 + var_268_arg_1; [L765] SORT_4 var_269_arg_0 = var_268; [L766] SORT_2 var_269 = var_269_arg_0 >> 0; [L767] SORT_1 var_270_arg_0 = input_243; [L768] SORT_2 var_270_arg_1 = var_269; [L769] SORT_2 var_270_arg_2 = var_245; [L770] EXPR var_270_arg_0 ? var_270_arg_1 : var_270_arg_2 [L770] SORT_2 var_270 = var_270_arg_0 ? var_270_arg_1 : var_270_arg_2; [L771] var_270 = var_270 & mask_SORT_2 [L772] SORT_2 var_271_arg_0 = var_205; [L773] SORT_2 var_271_arg_1 = var_270; [L774] SORT_1 var_271 = var_271_arg_0 == var_271_arg_1; [L775] SORT_1 var_272_arg_0 = ~var_267; [L776] var_272_arg_0 = var_272_arg_0 & mask_SORT_1 [L777] SORT_1 var_272_arg_1 = var_271; [L778] SORT_1 var_272 = var_272_arg_0 | var_272_arg_1; [L779] SORT_1 var_273_arg_0 = var_244; [L780] SORT_1 var_273_arg_1 = var_272; [L781] SORT_1 var_273 = var_273_arg_0 & var_273_arg_1; [L782] SORT_1 var_274_arg_0 = ~input_261; [L783] var_274_arg_0 = var_274_arg_0 & mask_SORT_1 [L784] SORT_1 var_274_arg_1 = var_273; [L785] SORT_1 var_274 = var_274_arg_0 | var_274_arg_1; [L786] SORT_1 var_275_arg_0 = var_260; [L787] SORT_1 var_275_arg_1 = var_274; [L788] SORT_1 var_275 = var_275_arg_0 & var_275_arg_1; [L789] SORT_1 var_277_arg_0 = var_232; [L790] SORT_1 var_277_arg_1 = ~input_231; [L791] var_277_arg_1 = var_277_arg_1 & mask_SORT_1 [L792] SORT_1 var_277 = var_277_arg_0 & var_277_arg_1; [L793] SORT_1 var_278_arg_0 = var_277; [L794] SORT_1 var_278_arg_1 = input_261; [L795] SORT_1 var_278 = var_278_arg_0 | var_278_arg_1; [L796] SORT_4 var_279_arg_0 = var_198; [L797] SORT_4 var_279_arg_1 = var_234; [L798] SORT_4 var_279 = var_279_arg_0 + var_279_arg_1; [L799] SORT_4 var_280_arg_0 = var_279; [L800] SORT_2 var_280 = var_280_arg_0 >> 0; [L801] SORT_1 var_281_arg_0 = input_261; [L802] SORT_2 var_281_arg_1 = var_280; [L803] SORT_2 var_281_arg_2 = var_233; [L804] EXPR var_281_arg_0 ? var_281_arg_1 : var_281_arg_2 [L804] SORT_2 var_281 = var_281_arg_0 ? var_281_arg_1 : var_281_arg_2; [L805] var_281 = var_281 & mask_SORT_2 [L806] SORT_2 var_282_arg_0 = var_205; [L807] SORT_2 var_282_arg_1 = var_281; [L808] SORT_1 var_282 = var_282_arg_0 == var_282_arg_1; [L809] SORT_1 var_283_arg_0 = var_278; [L810] SORT_1 var_283_arg_1 = var_282; [L811] SORT_1 var_283 = var_283_arg_0 & var_283_arg_1; [L812] SORT_1 var_284_arg_0 = ~input_276; [L813] var_284_arg_0 = var_284_arg_0 & mask_SORT_1 [L814] SORT_1 var_284_arg_1 = var_283; [L815] SORT_1 var_284 = var_284_arg_0 | var_284_arg_1; [L816] SORT_1 var_285_arg_0 = var_275; [L817] SORT_1 var_285_arg_1 = var_284; [L818] SORT_1 var_285 = var_285_arg_0 & var_285_arg_1; [L819] SORT_1 var_286_arg_0 = input_142; [L820] SORT_1 var_286_arg_1 = input_276; [L821] SORT_1 var_286 = var_286_arg_0 | var_286_arg_1; [L822] SORT_1 var_288_arg_0 = var_286; [L823] SORT_1 var_288_arg_1 = ~input_287; [L824] var_288_arg_1 = var_288_arg_1 & mask_SORT_1 [L825] SORT_1 var_288 = var_288_arg_0 | var_288_arg_1; [L826] SORT_1 var_289_arg_0 = var_285; [L827] SORT_1 var_289_arg_1 = var_288; [L828] SORT_1 var_289 = var_289_arg_0 & var_289_arg_1; [L829] SORT_1 var_291_arg_0 = input_150; [L830] SORT_1 var_291_arg_1 = ~input_290; [L831] var_291_arg_1 = var_291_arg_1 & mask_SORT_1 [L832] SORT_1 var_291 = var_291_arg_0 | var_291_arg_1; [L833] SORT_1 var_292_arg_0 = var_289; [L834] SORT_1 var_292_arg_1 = var_291; [L835] SORT_1 var_292 = var_292_arg_0 & var_292_arg_1; [L836] SORT_1 var_294_arg_0 = input_154; [L837] SORT_1 var_294_arg_1 = input_290; [L838] SORT_1 var_294 = var_294_arg_0 | var_294_arg_1; [L839] SORT_1 var_295_arg_0 = input_290; [L840] SORT_2 var_295_arg_1 = var_168; [L841] SORT_2 var_295_arg_2 = input_126; [L842] EXPR var_295_arg_0 ? var_295_arg_1 : var_295_arg_2 [L842] SORT_2 var_295 = var_295_arg_0 ? var_295_arg_1 : var_295_arg_2; [L843] var_295 = var_295 & mask_SORT_2 [L844] SORT_3 var_296_arg_0 = var_167; [L845] SORT_2 var_296_arg_1 = var_295; [L846] SORT_4 var_296 = ((SORT_4)var_296_arg_0 << 8) | var_296_arg_1; [L847] var_296 = var_296 & mask_SORT_4 [L848] SORT_4 var_297_arg_0 = var_166; [L849] SORT_4 var_297_arg_1 = var_296; [L850] SORT_1 var_297 = var_297_arg_0 <= var_297_arg_1; [L851] SORT_1 var_298_arg_0 = var_294; [L852] SORT_1 var_298_arg_1 = ~var_297; [L853] var_298_arg_1 = var_298_arg_1 & mask_SORT_1 [L854] SORT_1 var_298 = var_298_arg_0 & var_298_arg_1; [L855] SORT_1 var_299_arg_0 = ~input_293; [L856] var_299_arg_0 = var_299_arg_0 & mask_SORT_1 [L857] SORT_1 var_299_arg_1 = var_298; [L858] SORT_1 var_299 = var_299_arg_0 | var_299_arg_1; [L859] SORT_1 var_300_arg_0 = var_292; [L860] SORT_1 var_300_arg_1 = var_299; [L861] SORT_1 var_300 = var_300_arg_0 & var_300_arg_1; [L862] SORT_1 var_301_arg_0 = input_156; [L863] SORT_1 var_301_arg_1 = input_293; [L864] SORT_1 var_301 = var_301_arg_0 | var_301_arg_1; [L865] SORT_1 var_303_arg_0 = var_301; [L866] SORT_1 var_303_arg_1 = ~input_302; [L867] var_303_arg_1 = var_303_arg_1 & mask_SORT_1 [L868] SORT_1 var_303 = var_303_arg_0 | var_303_arg_1; [L869] SORT_1 var_304_arg_0 = var_300; [L870] SORT_1 var_304_arg_1 = var_303; [L871] SORT_1 var_304 = var_304_arg_0 & var_304_arg_1; [L872] SORT_1 var_306_arg_0 = input_158; [L873] SORT_1 var_306_arg_1 = input_302; [L874] SORT_1 var_306 = var_306_arg_0 | var_306_arg_1; [L875] SORT_1 var_307_arg_0 = input_302; [L876] SORT_2 var_307_arg_1 = var_79; [L877] SORT_2 var_307_arg_2 = input_128; [L878] EXPR var_307_arg_0 ? var_307_arg_1 : var_307_arg_2 [L878] SORT_2 var_307 = var_307_arg_0 ? var_307_arg_1 : var_307_arg_2; [L879] var_307 = var_307 & mask_SORT_2 [L880] SORT_3 var_308_arg_0 = var_167; [L881] SORT_2 var_308_arg_1 = var_307; [L882] SORT_4 var_308 = ((SORT_4)var_308_arg_0 << 8) | var_308_arg_1; [L883] var_308 = var_308 & mask_SORT_4 [L884] SORT_4 var_309_arg_0 = var_166; [L885] SORT_4 var_309_arg_1 = var_308; [L886] SORT_1 var_309 = var_309_arg_0 <= var_309_arg_1; [L887] SORT_2 var_311_arg_0 = var_310; [L888] SORT_2 var_311_arg_1 = var_307; [L889] SORT_1 var_311 = var_311_arg_0 == var_311_arg_1; [L890] SORT_2 var_312_arg_0 = var_79; [L891] SORT_2 var_312_arg_1 = var_307; [L892] SORT_1 var_312 = var_312_arg_0 == var_312_arg_1; [L893] SORT_2 var_313_arg_0 = var_168; [L894] SORT_2 var_313_arg_1 = var_307; [L895] SORT_1 var_313 = var_313_arg_0 == var_313_arg_1; [L896] SORT_1 var_314_arg_0 = input_287; [L897] SORT_2 var_314_arg_1 = var_79; [L898] SORT_2 var_314_arg_2 = var_251; [L899] EXPR var_314_arg_0 ? var_314_arg_1 : var_314_arg_2 [L899] SORT_2 var_314 = var_314_arg_0 ? var_314_arg_1 : var_314_arg_2; [L900] var_314 = var_314 & mask_SORT_2 [L901] SORT_1 var_315_arg_0 = input_293; [L902] SORT_2 var_315_arg_1 = var_295; [L903] SORT_2 var_315_arg_2 = input_110; [L904] EXPR var_315_arg_0 ? var_315_arg_1 : var_315_arg_2 [L904] SORT_2 var_315 = var_315_arg_0 ? var_315_arg_1 : var_315_arg_2; [L905] SORT_1 var_316_arg_0 = var_313; [L906] SORT_2 var_316_arg_1 = var_314; [L907] SORT_2 var_316_arg_2 = var_315; [L908] EXPR var_316_arg_0 ? var_316_arg_1 : var_316_arg_2 [L908] SORT_2 var_316 = var_316_arg_0 ? var_316_arg_1 : var_316_arg_2; [L909] SORT_1 var_317_arg_0 = var_312; [L910] SORT_2 var_317_arg_1 = var_250; [L911] SORT_2 var_317_arg_2 = var_316; [L912] EXPR var_317_arg_0 ? var_317_arg_1 : var_317_arg_2 [L912] SORT_2 var_317 = var_317_arg_0 ? var_317_arg_1 : var_317_arg_2; [L913] var_317 = var_317 & mask_SORT_2 [L914] SORT_3 var_318_arg_0 = var_167; [L915] SORT_2 var_318_arg_1 = var_317; [L916] SORT_4 var_318 = ((SORT_4)var_318_arg_0 << 8) | var_318_arg_1; [L917] var_318 = var_318 & mask_SORT_4 [L918] SORT_4 var_319_arg_0 = var_296; [L919] SORT_4 var_319_arg_1 = var_318; [L920] SORT_1 var_319 = var_319_arg_0 <= var_319_arg_1; [L921] SORT_1 var_320_arg_0 = var_311; [L922] SORT_1 var_320_arg_1 = ~var_319; [L923] var_320_arg_1 = var_320_arg_1 & mask_SORT_1 [L924] SORT_1 var_320 = var_320_arg_0 | var_320_arg_1; [L925] SORT_1 var_321_arg_0 = ~var_309; [L926] var_321_arg_0 = var_321_arg_0 & mask_SORT_1 [L927] SORT_1 var_321_arg_1 = var_320; [L928] SORT_1 var_321 = var_321_arg_0 & var_321_arg_1; [L929] SORT_1 var_322_arg_0 = var_306; [L930] SORT_1 var_322_arg_1 = var_321; [L931] SORT_1 var_322 = var_322_arg_0 & var_322_arg_1; [L932] SORT_1 var_323_arg_0 = ~input_305; [L933] var_323_arg_0 = var_323_arg_0 & mask_SORT_1 [L934] SORT_1 var_323_arg_1 = var_322; [L935] SORT_1 var_323 = var_323_arg_0 | var_323_arg_1; [L936] SORT_1 var_324_arg_0 = var_304; [L937] SORT_1 var_324_arg_1 = var_323; [L938] SORT_1 var_324 = var_324_arg_0 & var_324_arg_1; [L939] SORT_4 var_326_arg_0 = var_296; [L940] SORT_4 var_326_arg_1 = var_198; [L941] SORT_4 var_326 = var_326_arg_0 - var_326_arg_1; [L942] var_326 = var_326 & mask_SORT_4 [L943] SORT_4 var_327_arg_0 = var_197; [L944] SORT_4 var_327_arg_1 = var_326; [L945] SORT_1 var_327 = var_327_arg_0 == var_327_arg_1; [L946] SORT_4 var_328_arg_0 = var_198; [L947] SORT_4 var_328_arg_1 = var_326; [L948] SORT_1 var_328 = var_328_arg_0 == var_328_arg_1; [L949] SORT_1 var_329_arg_0 = var_328; [L950] SORT_2 var_329_arg_1 = var_314; [L951] SORT_2 var_329_arg_2 = var_315; [L952] EXPR var_329_arg_0 ? var_329_arg_1 : var_329_arg_2 [L952] SORT_2 var_329 = var_329_arg_0 ? var_329_arg_1 : var_329_arg_2; [L953] SORT_1 var_330_arg_0 = var_327; [L954] SORT_2 var_330_arg_1 = var_250; [L955] SORT_2 var_330_arg_2 = var_329; [L956] EXPR var_330_arg_0 ? var_330_arg_1 : var_330_arg_2 [L956] SORT_2 var_330 = var_330_arg_0 ? var_330_arg_1 : var_330_arg_2; [L957] var_330 = var_330 & mask_SORT_2 [L958] SORT_2 var_331_arg_0 = var_310; [L959] SORT_2 var_331_arg_1 = var_330; [L960] SORT_1 var_331 = var_331_arg_0 == var_331_arg_1; [L961] SORT_4 var_332_arg_0 = var_198; [L962] SORT_4 var_332_arg_1 = var_308; [L963] SORT_4 var_332 = var_332_arg_0 + var_332_arg_1; [L964] SORT_4 var_333_arg_0 = var_332; [L965] SORT_2 var_333 = var_333_arg_0 >> 0; [L966] SORT_1 var_334_arg_0 = input_305; [L967] SORT_2 var_334_arg_1 = var_333; [L968] SORT_2 var_334_arg_2 = var_307; [L969] EXPR var_334_arg_0 ? var_334_arg_1 : var_334_arg_2 [L969] SORT_2 var_334 = var_334_arg_0 ? var_334_arg_1 : var_334_arg_2; [L970] var_334 = var_334 & mask_SORT_2 [L971] SORT_2 var_335_arg_0 = var_205; [L972] SORT_2 var_335_arg_1 = var_334; [L973] SORT_1 var_335 = var_335_arg_0 == var_335_arg_1; [L974] SORT_1 var_336_arg_0 = ~var_331; [L975] var_336_arg_0 = var_336_arg_0 & mask_SORT_1 [L976] SORT_1 var_336_arg_1 = var_335; [L977] SORT_1 var_336 = var_336_arg_0 | var_336_arg_1; [L978] SORT_1 var_337_arg_0 = var_306; [L979] SORT_1 var_337_arg_1 = var_336; [L980] SORT_1 var_337 = var_337_arg_0 & var_337_arg_1; [L981] SORT_1 var_338_arg_0 = ~input_325; [L982] var_338_arg_0 = var_338_arg_0 & mask_SORT_1 [L983] SORT_1 var_338_arg_1 = var_337; [L984] SORT_1 var_338 = var_338_arg_0 | var_338_arg_1; [L985] SORT_1 var_339_arg_0 = var_324; [L986] SORT_1 var_339_arg_1 = var_338; [L987] SORT_1 var_339 = var_339_arg_0 & var_339_arg_1; [L988] SORT_1 var_341_arg_0 = var_294; [L989] SORT_1 var_341_arg_1 = ~input_293; [L990] var_341_arg_1 = var_341_arg_1 & mask_SORT_1 [L991] SORT_1 var_341 = var_341_arg_0 & var_341_arg_1; [L992] SORT_1 var_342_arg_0 = var_341; [L993] SORT_1 var_342_arg_1 = input_325; [L994] SORT_1 var_342 = var_342_arg_0 | var_342_arg_1; [L995] SORT_4 var_343_arg_0 = var_198; [L996] SORT_4 var_343_arg_1 = var_296; [L997] SORT_4 var_343 = var_343_arg_0 + var_343_arg_1; [L998] SORT_4 var_344_arg_0 = var_343; [L999] SORT_2 var_344 = var_344_arg_0 >> 0; [L1000] SORT_1 var_345_arg_0 = input_325; [L1001] SORT_2 var_345_arg_1 = var_344; [L1002] SORT_2 var_345_arg_2 = var_295; [L1003] EXPR var_345_arg_0 ? var_345_arg_1 : var_345_arg_2 [L1003] SORT_2 var_345 = var_345_arg_0 ? var_345_arg_1 : var_345_arg_2; [L1004] var_345 = var_345 & mask_SORT_2 [L1005] SORT_2 var_346_arg_0 = var_205; [L1006] SORT_2 var_346_arg_1 = var_345; [L1007] SORT_1 var_346 = var_346_arg_0 == var_346_arg_1; [L1008] SORT_1 var_347_arg_0 = var_342; [L1009] SORT_1 var_347_arg_1 = var_346; [L1010] SORT_1 var_347 = var_347_arg_0 & var_347_arg_1; [L1011] SORT_1 var_348_arg_0 = ~input_340; [L1012] var_348_arg_0 = var_348_arg_0 & mask_SORT_1 [L1013] SORT_1 var_348_arg_1 = var_347; [L1014] SORT_1 var_348 = var_348_arg_0 | var_348_arg_1; [L1015] SORT_1 var_349_arg_0 = var_339; [L1016] SORT_1 var_349_arg_1 = var_348; [L1017] SORT_1 var_349 = var_349_arg_0 & var_349_arg_1; [L1018] SORT_1 var_350_arg_0 = input_152; [L1019] SORT_1 var_350_arg_1 = input_340; [L1020] SORT_1 var_350 = var_350_arg_0 | var_350_arg_1; [L1021] SORT_1 var_352_arg_0 = var_350; [L1022] SORT_1 var_352_arg_1 = ~input_351; [L1023] var_352_arg_1 = var_352_arg_1 & mask_SORT_1 [L1024] SORT_1 var_352 = var_352_arg_0 | var_352_arg_1; [L1025] SORT_1 var_353_arg_0 = var_349; [L1026] SORT_1 var_353_arg_1 = var_352; [L1027] SORT_1 var_353 = var_353_arg_0 & var_353_arg_1; [L1028] SORT_1 var_354_arg_0 = input_162; [L1029] SORT_1 var_354_arg_1 = input_164; [L1030] SORT_1 var_354 = var_354_arg_0 | var_354_arg_1; [L1031] SORT_1 var_355_arg_0 = input_176; [L1032] SORT_1 var_355_arg_1 = var_354; [L1033] SORT_1 var_355 = var_355_arg_0 | var_355_arg_1; [L1034] SORT_1 var_356_arg_0 = input_179; [L1035] SORT_1 var_356_arg_1 = var_355; [L1036] SORT_1 var_356 = var_356_arg_0 | var_356_arg_1; [L1037] SORT_1 var_357_arg_0 = input_196; [L1038] SORT_1 var_357_arg_1 = var_356; [L1039] SORT_1 var_357 = var_357_arg_0 | var_357_arg_1; [L1040] SORT_1 var_358_arg_0 = input_214; [L1041] SORT_1 var_358_arg_1 = var_357; [L1042] SORT_1 var_358 = var_358_arg_0 | var_358_arg_1; [L1043] SORT_1 var_359_arg_0 = input_225; [L1044] SORT_1 var_359_arg_1 = var_358; [L1045] SORT_1 var_359 = var_359_arg_0 | var_359_arg_1; [L1046] SORT_1 var_360_arg_0 = input_228; [L1047] SORT_1 var_360_arg_1 = var_359; [L1048] SORT_1 var_360 = var_360_arg_0 | var_360_arg_1; [L1049] SORT_1 var_361_arg_0 = input_231; [L1050] SORT_1 var_361_arg_1 = var_360; [L1051] SORT_1 var_361 = var_361_arg_0 | var_361_arg_1; [L1052] SORT_1 var_362_arg_0 = input_240; [L1053] SORT_1 var_362_arg_1 = var_361; [L1054] SORT_1 var_362 = var_362_arg_0 | var_362_arg_1; [L1055] SORT_1 var_363_arg_0 = input_243; [L1056] SORT_1 var_363_arg_1 = var_362; [L1057] SORT_1 var_363 = var_363_arg_0 | var_363_arg_1; [L1058] SORT_1 var_364_arg_0 = input_261; [L1059] SORT_1 var_364_arg_1 = var_363; [L1060] SORT_1 var_364 = var_364_arg_0 | var_364_arg_1; [L1061] SORT_1 var_365_arg_0 = input_276; [L1062] SORT_1 var_365_arg_1 = var_364; [L1063] SORT_1 var_365 = var_365_arg_0 | var_365_arg_1; [L1064] SORT_1 var_366_arg_0 = input_287; [L1065] SORT_1 var_366_arg_1 = var_365; [L1066] SORT_1 var_366 = var_366_arg_0 | var_366_arg_1; [L1067] SORT_1 var_367_arg_0 = input_290; [L1068] SORT_1 var_367_arg_1 = var_366; [L1069] SORT_1 var_367 = var_367_arg_0 | var_367_arg_1; [L1070] SORT_1 var_368_arg_0 = input_293; [L1071] SORT_1 var_368_arg_1 = var_367; [L1072] SORT_1 var_368 = var_368_arg_0 | var_368_arg_1; [L1073] SORT_1 var_369_arg_0 = input_302; [L1074] SORT_1 var_369_arg_1 = var_368; [L1075] SORT_1 var_369 = var_369_arg_0 | var_369_arg_1; [L1076] SORT_1 var_370_arg_0 = input_305; [L1077] SORT_1 var_370_arg_1 = var_369; [L1078] SORT_1 var_370 = var_370_arg_0 | var_370_arg_1; [L1079] SORT_1 var_371_arg_0 = input_325; [L1080] SORT_1 var_371_arg_1 = var_370; [L1081] SORT_1 var_371 = var_371_arg_0 | var_371_arg_1; [L1082] SORT_1 var_372_arg_0 = input_340; [L1083] SORT_1 var_372_arg_1 = var_371; [L1084] SORT_1 var_372 = var_372_arg_0 | var_372_arg_1; [L1085] SORT_1 var_373_arg_0 = input_351; [L1086] SORT_1 var_373_arg_1 = var_372; [L1087] SORT_1 var_373 = var_373_arg_0 | var_373_arg_1; [L1088] SORT_1 var_374_arg_0 = var_353; [L1089] SORT_1 var_374_arg_1 = var_373; [L1090] SORT_1 var_374 = var_374_arg_0 & var_374_arg_1; [L1091] SORT_1 var_375_arg_0 = input_130; [L1092] SORT_1 var_375_arg_1 = input_132; [L1093] SORT_1 var_375 = var_375_arg_0 & var_375_arg_1; [L1094] SORT_1 var_376_arg_0 = input_130; [L1095] SORT_1 var_376_arg_1 = input_132; [L1096] SORT_1 var_376 = var_376_arg_0 | var_376_arg_1; [L1097] SORT_1 var_377_arg_0 = input_134; [L1098] SORT_1 var_377_arg_1 = var_376; [L1099] SORT_1 var_377 = var_377_arg_0 & var_377_arg_1; [L1100] SORT_1 var_378_arg_0 = var_375; [L1101] SORT_1 var_378_arg_1 = var_377; [L1102] SORT_1 var_378 = var_378_arg_0 | var_378_arg_1; [L1103] SORT_1 var_379_arg_0 = input_134; [L1104] SORT_1 var_379_arg_1 = var_376; [L1105] SORT_1 var_379 = var_379_arg_0 | var_379_arg_1; [L1106] SORT_1 var_380_arg_0 = input_136; [L1107] SORT_1 var_380_arg_1 = var_379; [L1108] SORT_1 var_380 = var_380_arg_0 & var_380_arg_1; [L1109] SORT_1 var_381_arg_0 = var_378; [L1110] SORT_1 var_381_arg_1 = var_380; [L1111] SORT_1 var_381 = var_381_arg_0 | var_381_arg_1; [L1112] SORT_1 var_382_arg_0 = input_136; [L1113] SORT_1 var_382_arg_1 = var_379; [L1114] SORT_1 var_382 = var_382_arg_0 | var_382_arg_1; [L1115] SORT_1 var_383_arg_0 = input_138; [L1116] SORT_1 var_383_arg_1 = var_382; [L1117] SORT_1 var_383 = var_383_arg_0 & var_383_arg_1; [L1118] SORT_1 var_384_arg_0 = var_381; [L1119] SORT_1 var_384_arg_1 = var_383; [L1120] SORT_1 var_384 = var_384_arg_0 | var_384_arg_1; [L1121] SORT_1 var_385_arg_0 = input_138; [L1122] SORT_1 var_385_arg_1 = var_382; [L1123] SORT_1 var_385 = var_385_arg_0 | var_385_arg_1; [L1124] SORT_1 var_386_arg_0 = ~var_384; [L1125] var_386_arg_0 = var_386_arg_0 & mask_SORT_1 [L1126] SORT_1 var_386_arg_1 = var_385; [L1127] SORT_1 var_386 = var_386_arg_0 & var_386_arg_1; [L1128] SORT_1 var_387_arg_0 = input_140; [L1129] SORT_1 var_387_arg_1 = input_142; [L1130] SORT_1 var_387 = var_387_arg_0 & var_387_arg_1; [L1131] SORT_1 var_388_arg_0 = input_140; [L1132] SORT_1 var_388_arg_1 = input_142; [L1133] SORT_1 var_388 = var_388_arg_0 | var_388_arg_1; [L1134] SORT_1 var_389_arg_0 = input_144; [L1135] SORT_1 var_389_arg_1 = var_388; [L1136] SORT_1 var_389 = var_389_arg_0 & var_389_arg_1; [L1137] SORT_1 var_390_arg_0 = var_387; [L1138] SORT_1 var_390_arg_1 = var_389; [L1139] SORT_1 var_390 = var_390_arg_0 | var_390_arg_1; [L1140] SORT_1 var_391_arg_0 = input_144; [L1141] SORT_1 var_391_arg_1 = var_388; [L1142] SORT_1 var_391 = var_391_arg_0 | var_391_arg_1; [L1143] SORT_1 var_392_arg_0 = input_146; [L1144] SORT_1 var_392_arg_1 = var_391; [L1145] SORT_1 var_392 = var_392_arg_0 & var_392_arg_1; [L1146] SORT_1 var_393_arg_0 = var_390; [L1147] SORT_1 var_393_arg_1 = var_392; [L1148] SORT_1 var_393 = var_393_arg_0 | var_393_arg_1; [L1149] SORT_1 var_394_arg_0 = input_146; [L1150] SORT_1 var_394_arg_1 = var_391; [L1151] SORT_1 var_394 = var_394_arg_0 | var_394_arg_1; [L1152] SORT_1 var_395_arg_0 = input_148; [L1153] SORT_1 var_395_arg_1 = var_394; [L1154] SORT_1 var_395 = var_395_arg_0 & var_395_arg_1; [L1155] SORT_1 var_396_arg_0 = var_393; [L1156] SORT_1 var_396_arg_1 = var_395; [L1157] SORT_1 var_396 = var_396_arg_0 | var_396_arg_1; [L1158] SORT_1 var_397_arg_0 = var_386; [L1159] SORT_1 var_397_arg_1 = ~var_396; [L1160] var_397_arg_1 = var_397_arg_1 & mask_SORT_1 [L1161] SORT_1 var_397 = var_397_arg_0 & var_397_arg_1; [L1162] SORT_1 var_398_arg_0 = input_148; [L1163] SORT_1 var_398_arg_1 = var_394; [L1164] SORT_1 var_398 = var_398_arg_0 | var_398_arg_1; [L1165] SORT_1 var_399_arg_0 = var_397; [L1166] SORT_1 var_399_arg_1 = var_398; [L1167] SORT_1 var_399 = var_399_arg_0 & var_399_arg_1; [L1168] SORT_1 var_400_arg_0 = input_150; [L1169] SORT_1 var_400_arg_1 = input_152; [L1170] SORT_1 var_400 = var_400_arg_0 & var_400_arg_1; [L1171] SORT_1 var_401_arg_0 = input_150; [L1172] SORT_1 var_401_arg_1 = input_152; [L1173] SORT_1 var_401 = var_401_arg_0 | var_401_arg_1; [L1174] SORT_1 var_402_arg_0 = input_154; [L1175] SORT_1 var_402_arg_1 = var_401; [L1176] SORT_1 var_402 = var_402_arg_0 & var_402_arg_1; [L1177] SORT_1 var_403_arg_0 = var_400; [L1178] SORT_1 var_403_arg_1 = var_402; [L1179] SORT_1 var_403 = var_403_arg_0 | var_403_arg_1; [L1180] SORT_1 var_404_arg_0 = input_154; [L1181] SORT_1 var_404_arg_1 = var_401; [L1182] SORT_1 var_404 = var_404_arg_0 | var_404_arg_1; [L1183] SORT_1 var_405_arg_0 = input_156; [L1184] SORT_1 var_405_arg_1 = var_404; [L1185] SORT_1 var_405 = var_405_arg_0 & var_405_arg_1; [L1186] SORT_1 var_406_arg_0 = var_403; [L1187] SORT_1 var_406_arg_1 = var_405; [L1188] SORT_1 var_406 = var_406_arg_0 | var_406_arg_1; [L1189] SORT_1 var_407_arg_0 = input_156; [L1190] SORT_1 var_407_arg_1 = var_404; [L1191] SORT_1 var_407 = var_407_arg_0 | var_407_arg_1; [L1192] SORT_1 var_408_arg_0 = input_158; [L1193] SORT_1 var_408_arg_1 = var_407; [L1194] SORT_1 var_408 = var_408_arg_0 & var_408_arg_1; [L1195] SORT_1 var_409_arg_0 = var_406; [L1196] SORT_1 var_409_arg_1 = var_408; [L1197] SORT_1 var_409 = var_409_arg_0 | var_409_arg_1; [L1198] SORT_1 var_410_arg_0 = var_399; [L1199] SORT_1 var_410_arg_1 = ~var_409; [L1200] var_410_arg_1 = var_410_arg_1 & mask_SORT_1 [L1201] SORT_1 var_410 = var_410_arg_0 & var_410_arg_1; [L1202] SORT_1 var_411_arg_0 = input_158; [L1203] SORT_1 var_411_arg_1 = var_407; [L1204] SORT_1 var_411 = var_411_arg_0 | var_411_arg_1; [L1205] SORT_1 var_412_arg_0 = var_410; [L1206] SORT_1 var_412_arg_1 = var_411; [L1207] SORT_1 var_412 = var_412_arg_0 & var_412_arg_1; [L1208] SORT_1 var_413_arg_0 = var_374; [L1209] SORT_1 var_413_arg_1 = var_412; [L1210] SORT_1 var_413 = var_413_arg_0 & var_413_arg_1; [L1211] SORT_1 var_414_arg_0 = input_130; [L1212] SORT_1 var_414_arg_1 = ~input_162; [L1213] var_414_arg_1 = var_414_arg_1 & mask_SORT_1 [L1214] SORT_1 var_414 = var_414_arg_0 & var_414_arg_1; [L1215] SORT_1 var_415_arg_0 = var_414; [L1216] SORT_1 var_415_arg_1 = input_225; [L1217] SORT_1 var_415 = var_415_arg_0 | var_415_arg_1; [L1218] var_415 = var_415 & mask_SORT_1 [L1219] SORT_1 var_416_arg_0 = var_224; [L1220] SORT_1 var_416_arg_1 = ~input_225; [L1221] var_416_arg_1 = var_416_arg_1 & mask_SORT_1 [L1222] SORT_1 var_416 = var_416_arg_0 & var_416_arg_1; [L1223] var_416 = var_416 & mask_SORT_1 [L1224] SORT_1 var_417_arg_0 = var_415; [L1225] SORT_1 var_417_arg_1 = var_416; [L1226] SORT_1 var_417 = var_417_arg_0 & var_417_arg_1; [L1227] SORT_1 var_418_arg_0 = var_216; [L1228] SORT_1 var_418_arg_1 = ~input_214; [L1229] var_418_arg_1 = var_418_arg_1 & mask_SORT_1 [L1230] SORT_1 var_418 = var_418_arg_0 & var_418_arg_1; [L1231] var_418 = var_418 & mask_SORT_1 [L1232] SORT_1 var_419_arg_0 = var_415; [L1233] SORT_1 var_419_arg_1 = var_416; [L1234] SORT_1 var_419 = var_419_arg_0 | var_419_arg_1; [L1235] SORT_1 var_420_arg_0 = var_418; [L1236] SORT_1 var_420_arg_1 = var_419; [L1237] SORT_1 var_420 = var_420_arg_0 & var_420_arg_1; [L1238] SORT_1 var_421_arg_0 = var_417; [L1239] SORT_1 var_421_arg_1 = var_420; [L1240] SORT_1 var_421 = var_421_arg_0 | var_421_arg_1; [L1241] SORT_1 var_422_arg_0 = var_175; [L1242] SORT_1 var_422_arg_1 = ~input_176; [L1243] var_422_arg_1 = var_422_arg_1 & mask_SORT_1 [L1244] SORT_1 var_422 = var_422_arg_0 & var_422_arg_1; [L1245] var_422 = var_422 & mask_SORT_1 [L1246] SORT_1 var_423_arg_0 = var_418; [L1247] SORT_1 var_423_arg_1 = var_419; [L1248] SORT_1 var_423 = var_423_arg_0 | var_423_arg_1; [L1249] SORT_1 var_424_arg_0 = var_422; [L1250] SORT_1 var_424_arg_1 = var_423; [L1251] SORT_1 var_424 = var_424_arg_0 & var_424_arg_1; [L1252] SORT_1 var_425_arg_0 = var_421; [L1253] SORT_1 var_425_arg_1 = var_424; [L1254] SORT_1 var_425 = var_425_arg_0 | var_425_arg_1; [L1255] SORT_1 var_426_arg_0 = var_180; [L1256] SORT_1 var_426_arg_1 = ~input_196; [L1257] var_426_arg_1 = var_426_arg_1 & mask_SORT_1 [L1258] SORT_1 var_426 = var_426_arg_0 & var_426_arg_1; [L1259] var_426 = var_426 & mask_SORT_1 [L1260] SORT_1 var_427_arg_0 = var_422; [L1261] SORT_1 var_427_arg_1 = var_423; [L1262] SORT_1 var_427 = var_427_arg_0 | var_427_arg_1; [L1263] SORT_1 var_428_arg_0 = var_426; [L1264] SORT_1 var_428_arg_1 = var_427; [L1265] SORT_1 var_428 = var_428_arg_0 & var_428_arg_1; [L1266] SORT_1 var_429_arg_0 = var_425; [L1267] SORT_1 var_429_arg_1 = var_428; [L1268] SORT_1 var_429 = var_429_arg_0 | var_429_arg_1; [L1269] SORT_1 var_430_arg_0 = var_426; [L1270] SORT_1 var_430_arg_1 = var_427; [L1271] SORT_1 var_430 = var_430_arg_0 | var_430_arg_1; [L1272] SORT_1 var_431_arg_0 = ~var_429; [L1273] var_431_arg_0 = var_431_arg_0 & mask_SORT_1 [L1274] SORT_1 var_431_arg_1 = var_430; [L1275] SORT_1 var_431 = var_431_arg_0 & var_431_arg_1; [L1276] SORT_1 var_432_arg_0 = input_140; [L1277] SORT_1 var_432_arg_1 = ~input_228; [L1278] var_432_arg_1 = var_432_arg_1 & mask_SORT_1 [L1279] SORT_1 var_432 = var_432_arg_0 & var_432_arg_1; [L1280] SORT_1 var_433_arg_0 = var_432; [L1281] SORT_1 var_433_arg_1 = input_287; [L1282] SORT_1 var_433 = var_433_arg_0 | var_433_arg_1; [L1283] var_433 = var_433 & mask_SORT_1 [L1284] SORT_1 var_434_arg_0 = var_286; [L1285] SORT_1 var_434_arg_1 = ~input_287; [L1286] var_434_arg_1 = var_434_arg_1 & mask_SORT_1 [L1287] SORT_1 var_434 = var_434_arg_0 & var_434_arg_1; [L1288] var_434 = var_434 & mask_SORT_1 [L1289] SORT_1 var_435_arg_0 = var_433; [L1290] SORT_1 var_435_arg_1 = var_434; [L1291] SORT_1 var_435 = var_435_arg_0 & var_435_arg_1; [L1292] SORT_1 var_436_arg_0 = var_278; [L1293] SORT_1 var_436_arg_1 = ~input_276; [L1294] var_436_arg_1 = var_436_arg_1 & mask_SORT_1 [L1295] SORT_1 var_436 = var_436_arg_0 & var_436_arg_1; [L1296] var_436 = var_436 & mask_SORT_1 [L1297] SORT_1 var_437_arg_0 = var_433; [L1298] SORT_1 var_437_arg_1 = var_434; [L1299] SORT_1 var_437 = var_437_arg_0 | var_437_arg_1; [L1300] SORT_1 var_438_arg_0 = var_436; [L1301] SORT_1 var_438_arg_1 = var_437; [L1302] SORT_1 var_438 = var_438_arg_0 & var_438_arg_1; [L1303] SORT_1 var_439_arg_0 = var_435; [L1304] SORT_1 var_439_arg_1 = var_438; [L1305] SORT_1 var_439 = var_439_arg_0 | var_439_arg_1; [L1306] SORT_1 var_440_arg_0 = var_239; [L1307] SORT_1 var_440_arg_1 = ~input_240; [L1308] var_440_arg_1 = var_440_arg_1 & mask_SORT_1 [L1309] SORT_1 var_440 = var_440_arg_0 & var_440_arg_1; [L1310] var_440 = var_440 & mask_SORT_1 [L1311] SORT_1 var_441_arg_0 = var_436; [L1312] SORT_1 var_441_arg_1 = var_437; [L1313] SORT_1 var_441 = var_441_arg_0 | var_441_arg_1; [L1314] SORT_1 var_442_arg_0 = var_440; [L1315] SORT_1 var_442_arg_1 = var_441; [L1316] SORT_1 var_442 = var_442_arg_0 & var_442_arg_1; [L1317] SORT_1 var_443_arg_0 = var_439; [L1318] SORT_1 var_443_arg_1 = var_442; [L1319] SORT_1 var_443 = var_443_arg_0 | var_443_arg_1; [L1320] SORT_1 var_444_arg_0 = var_244; [L1321] SORT_1 var_444_arg_1 = ~input_261; [L1322] var_444_arg_1 = var_444_arg_1 & mask_SORT_1 [L1323] SORT_1 var_444 = var_444_arg_0 & var_444_arg_1; [L1324] var_444 = var_444 & mask_SORT_1 [L1325] SORT_1 var_445_arg_0 = var_440; [L1326] SORT_1 var_445_arg_1 = var_441; [L1327] SORT_1 var_445 = var_445_arg_0 | var_445_arg_1; [L1328] SORT_1 var_446_arg_0 = var_444; [L1329] SORT_1 var_446_arg_1 = var_445; [L1330] SORT_1 var_446 = var_446_arg_0 & var_446_arg_1; [L1331] SORT_1 var_447_arg_0 = var_443; [L1332] SORT_1 var_447_arg_1 = var_446; [L1333] SORT_1 var_447 = var_447_arg_0 | var_447_arg_1; [L1334] SORT_1 var_448_arg_0 = var_431; [L1335] SORT_1 var_448_arg_1 = ~var_447; [L1336] var_448_arg_1 = var_448_arg_1 & mask_SORT_1 [L1337] SORT_1 var_448 = var_448_arg_0 & var_448_arg_1; [L1338] SORT_1 var_449_arg_0 = var_444; [L1339] SORT_1 var_449_arg_1 = var_445; [L1340] SORT_1 var_449 = var_449_arg_0 | var_449_arg_1; [L1341] SORT_1 var_450_arg_0 = var_448; [L1342] SORT_1 var_450_arg_1 = var_449; [L1343] SORT_1 var_450 = var_450_arg_0 & var_450_arg_1; [L1344] SORT_1 var_451_arg_0 = input_150; [L1345] SORT_1 var_451_arg_1 = ~input_290; [L1346] var_451_arg_1 = var_451_arg_1 & mask_SORT_1 [L1347] SORT_1 var_451 = var_451_arg_0 & var_451_arg_1; [L1348] SORT_1 var_452_arg_0 = var_451; [L1349] SORT_1 var_452_arg_1 = input_351; [L1350] SORT_1 var_452 = var_452_arg_0 | var_452_arg_1; [L1351] var_452 = var_452 & mask_SORT_1 [L1352] SORT_1 var_453_arg_0 = var_350; [L1353] SORT_1 var_453_arg_1 = ~input_351; [L1354] var_453_arg_1 = var_453_arg_1 & mask_SORT_1 [L1355] SORT_1 var_453 = var_453_arg_0 & var_453_arg_1; [L1356] var_453 = var_453 & mask_SORT_1 [L1357] SORT_1 var_454_arg_0 = var_452; [L1358] SORT_1 var_454_arg_1 = var_453; [L1359] SORT_1 var_454 = var_454_arg_0 & var_454_arg_1; [L1360] SORT_1 var_455_arg_0 = var_342; [L1361] SORT_1 var_455_arg_1 = ~input_340; [L1362] var_455_arg_1 = var_455_arg_1 & mask_SORT_1 [L1363] SORT_1 var_455 = var_455_arg_0 & var_455_arg_1; [L1364] var_455 = var_455 & mask_SORT_1 [L1365] SORT_1 var_456_arg_0 = var_452; [L1366] SORT_1 var_456_arg_1 = var_453; [L1367] SORT_1 var_456 = var_456_arg_0 | var_456_arg_1; [L1368] SORT_1 var_457_arg_0 = var_455; [L1369] SORT_1 var_457_arg_1 = var_456; [L1370] SORT_1 var_457 = var_457_arg_0 & var_457_arg_1; [L1371] SORT_1 var_458_arg_0 = var_454; [L1372] SORT_1 var_458_arg_1 = var_457; [L1373] SORT_1 var_458 = var_458_arg_0 | var_458_arg_1; [L1374] SORT_1 var_459_arg_0 = var_301; [L1375] SORT_1 var_459_arg_1 = ~input_302; [L1376] var_459_arg_1 = var_459_arg_1 & mask_SORT_1 [L1377] SORT_1 var_459 = var_459_arg_0 & var_459_arg_1; [L1378] var_459 = var_459 & mask_SORT_1 [L1379] SORT_1 var_460_arg_0 = var_455; [L1380] SORT_1 var_460_arg_1 = var_456; [L1381] SORT_1 var_460 = var_460_arg_0 | var_460_arg_1; [L1382] SORT_1 var_461_arg_0 = var_459; [L1383] SORT_1 var_461_arg_1 = var_460; [L1384] SORT_1 var_461 = var_461_arg_0 & var_461_arg_1; [L1385] SORT_1 var_462_arg_0 = var_458; [L1386] SORT_1 var_462_arg_1 = var_461; [L1387] SORT_1 var_462 = var_462_arg_0 | var_462_arg_1; [L1388] SORT_1 var_463_arg_0 = var_306; [L1389] SORT_1 var_463_arg_1 = ~input_325; [L1390] var_463_arg_1 = var_463_arg_1 & mask_SORT_1 [L1391] SORT_1 var_463 = var_463_arg_0 & var_463_arg_1; [L1392] var_463 = var_463 & mask_SORT_1 [L1393] SORT_1 var_464_arg_0 = var_459; [L1394] SORT_1 var_464_arg_1 = var_460; [L1395] SORT_1 var_464 = var_464_arg_0 | var_464_arg_1; [L1396] SORT_1 var_465_arg_0 = var_463; [L1397] SORT_1 var_465_arg_1 = var_464; [L1398] SORT_1 var_465 = var_465_arg_0 & var_465_arg_1; [L1399] SORT_1 var_466_arg_0 = var_462; [L1400] SORT_1 var_466_arg_1 = var_465; [L1401] SORT_1 var_466 = var_466_arg_0 | var_466_arg_1; [L1402] SORT_1 var_467_arg_0 = var_450; [L1403] SORT_1 var_467_arg_1 = ~var_466; [L1404] var_467_arg_1 = var_467_arg_1 & mask_SORT_1 [L1405] SORT_1 var_467 = var_467_arg_0 & var_467_arg_1; [L1406] SORT_1 var_468_arg_0 = var_463; [L1407] SORT_1 var_468_arg_1 = var_464; [L1408] SORT_1 var_468 = var_468_arg_0 | var_468_arg_1; [L1409] SORT_1 var_469_arg_0 = var_467; [L1410] SORT_1 var_469_arg_1 = var_468; [L1411] SORT_1 var_469 = var_469_arg_0 & var_469_arg_1; [L1412] SORT_1 var_470_arg_0 = var_413; [L1413] SORT_1 var_470_arg_1 = var_469; [L1414] SORT_1 var_470 = var_470_arg_0 & var_470_arg_1; [L1415] SORT_2 var_471_arg_0 = var_250; [L1416] SORT_2 var_471_arg_1 = state_6; [L1417] SORT_1 var_471 = var_471_arg_0 == var_471_arg_1; [L1418] SORT_1 var_472_arg_0 = var_470; [L1419] SORT_1 var_472_arg_1 = var_471; [L1420] SORT_1 var_472 = var_472_arg_0 & var_472_arg_1; [L1421] SORT_2 var_473_arg_0 = var_314; [L1422] SORT_2 var_473_arg_1 = state_8; [L1423] SORT_1 var_473 = var_473_arg_0 == var_473_arg_1; [L1424] SORT_1 var_474_arg_0 = var_472; [L1425] SORT_1 var_474_arg_1 = var_473; [L1426] SORT_1 var_474 = var_474_arg_0 & var_474_arg_1; [L1427] SORT_1 var_475_arg_0 = input_351; [L1428] SORT_2 var_475_arg_1 = var_79; [L1429] SORT_2 var_475_arg_2 = var_315; [L1430] EXPR var_475_arg_0 ? var_475_arg_1 : var_475_arg_2 [L1430] SORT_2 var_475 = var_475_arg_0 ? var_475_arg_1 : var_475_arg_2; [L1431] var_475 = var_475 & mask_SORT_2 [L1432] SORT_2 var_476_arg_0 = var_475; [L1433] SORT_2 var_476_arg_1 = state_10; [L1434] SORT_1 var_476 = var_476_arg_0 == var_476_arg_1; [L1435] SORT_1 var_477_arg_0 = var_474; [L1436] SORT_1 var_477_arg_1 = var_476; [L1437] SORT_1 var_477 = var_477_arg_0 & var_477_arg_1; [L1438] SORT_1 var_478_arg_0 = input_302; [L1439] SORT_1 var_478_arg_1 = var_327; [L1440] SORT_1 var_478 = var_478_arg_0 & var_478_arg_1; [L1441] var_478 = var_478 & mask_SORT_1 [L1442] SORT_1 var_479_arg_0 = input_240; [L1443] SORT_1 var_479_arg_1 = var_263; [L1444] SORT_1 var_479 = var_479_arg_0 & var_479_arg_1; [L1445] var_479 = var_479 & mask_SORT_1 [L1446] SORT_1 var_480_arg_0 = input_176; [L1447] SORT_1 var_480_arg_1 = var_200; [L1448] SORT_1 var_480 = var_480_arg_0 & var_480_arg_1; [L1449] var_480 = var_480 & mask_SORT_1 [L1450] SORT_1 var_481_arg_0 = var_480; [L1451] SORT_2 var_481_arg_1 = var_79; [L1452] SORT_2 var_481_arg_2 = input_112; [L1453] EXPR var_481_arg_0 ? var_481_arg_1 : var_481_arg_2 [L1453] SORT_2 var_481 = var_481_arg_0 ? var_481_arg_1 : var_481_arg_2; [L1454] SORT_1 var_482_arg_0 = var_479; [L1455] SORT_2 var_482_arg_1 = var_168; [L1456] SORT_2 var_482_arg_2 = var_481; [L1457] EXPR var_482_arg_0 ? var_482_arg_1 : var_482_arg_2 [L1457] SORT_2 var_482 = var_482_arg_0 ? var_482_arg_1 : var_482_arg_2; [L1458] SORT_1 var_483_arg_0 = var_478; [L1459] SORT_2 var_483_arg_1 = var_310; [L1460] SORT_2 var_483_arg_2 = var_482; [L1461] EXPR var_483_arg_0 ? var_483_arg_1 : var_483_arg_2 [L1461] SORT_2 var_483 = var_483_arg_0 ? var_483_arg_1 : var_483_arg_2; [L1462] var_483 = var_483 & mask_SORT_2 [L1463] SORT_2 var_484_arg_0 = var_483; [L1464] SORT_2 var_484_arg_1 = state_12; [L1465] SORT_1 var_484 = var_484_arg_0 == var_484_arg_1; [L1466] SORT_1 var_485_arg_0 = var_477; [L1467] SORT_1 var_485_arg_1 = var_484; [L1468] SORT_1 var_485 = var_485_arg_0 & var_485_arg_1; [L1469] SORT_1 var_486_arg_0 = input_302; [L1470] SORT_1 var_486_arg_1 = var_328; [L1471] SORT_1 var_486 = var_486_arg_0 & var_486_arg_1; [L1472] var_486 = var_486 & mask_SORT_1 [L1473] SORT_1 var_487_arg_0 = input_240; [L1474] SORT_1 var_487_arg_1 = var_264; [L1475] SORT_1 var_487 = var_487_arg_0 & var_487_arg_1; [L1476] var_487 = var_487 & mask_SORT_1 [L1477] SORT_1 var_488_arg_0 = input_176; [L1478] SORT_1 var_488_arg_1 = var_201; [L1479] SORT_1 var_488 = var_488_arg_0 & var_488_arg_1; [L1480] var_488 = var_488 & mask_SORT_1 [L1481] SORT_1 var_489_arg_0 = var_488; [L1482] SORT_2 var_489_arg_1 = var_79; [L1483] SORT_2 var_489_arg_2 = input_114; [L1484] EXPR var_489_arg_0 ? var_489_arg_1 : var_489_arg_2 [L1484] SORT_2 var_489 = var_489_arg_0 ? var_489_arg_1 : var_489_arg_2; [L1485] SORT_1 var_490_arg_0 = var_487; [L1486] SORT_2 var_490_arg_1 = var_168; [L1487] SORT_2 var_490_arg_2 = var_489; [L1488] EXPR var_490_arg_0 ? var_490_arg_1 : var_490_arg_2 [L1488] SORT_2 var_490 = var_490_arg_0 ? var_490_arg_1 : var_490_arg_2; [L1489] SORT_1 var_491_arg_0 = var_486; [L1490] SORT_2 var_491_arg_1 = var_310; [L1491] SORT_2 var_491_arg_2 = var_490; [L1492] EXPR var_491_arg_0 ? var_491_arg_1 : var_491_arg_2 [L1492] SORT_2 var_491 = var_491_arg_0 ? var_491_arg_1 : var_491_arg_2; [L1493] var_491 = var_491 & mask_SORT_2 [L1494] SORT_2 var_492_arg_0 = var_491; [L1495] SORT_2 var_492_arg_1 = state_14; [L1496] SORT_1 var_492 = var_492_arg_0 == var_492_arg_1; [L1497] SORT_1 var_493_arg_0 = var_485; [L1498] SORT_1 var_493_arg_1 = var_492; [L1499] SORT_1 var_493 = var_493_arg_0 & var_493_arg_1; [L1500] SORT_4 var_495_arg_0 = var_494; [L1501] SORT_4 var_495_arg_1 = var_326; [L1502] SORT_1 var_495 = var_495_arg_0 == var_495_arg_1; [L1503] SORT_1 var_496_arg_0 = input_302; [L1504] SORT_1 var_496_arg_1 = var_495; [L1505] SORT_1 var_496 = var_496_arg_0 & var_496_arg_1; [L1506] var_496 = var_496 & mask_SORT_1 [L1507] SORT_4 var_497_arg_0 = var_494; [L1508] SORT_4 var_497_arg_1 = var_262; [L1509] SORT_1 var_497 = var_497_arg_0 == var_497_arg_1; [L1510] SORT_1 var_498_arg_0 = input_240; [L1511] SORT_1 var_498_arg_1 = var_497; [L1512] SORT_1 var_498 = var_498_arg_0 & var_498_arg_1; [L1513] var_498 = var_498 & mask_SORT_1 [L1514] SORT_4 var_499_arg_0 = var_494; [L1515] SORT_4 var_499_arg_1 = var_199; [L1516] SORT_1 var_499 = var_499_arg_0 == var_499_arg_1; [L1517] SORT_1 var_500_arg_0 = input_176; [L1518] SORT_1 var_500_arg_1 = var_499; [L1519] SORT_1 var_500 = var_500_arg_0 & var_500_arg_1; [L1520] var_500 = var_500 & mask_SORT_1 [L1521] SORT_1 var_501_arg_0 = var_500; [L1522] SORT_2 var_501_arg_1 = var_79; [L1523] SORT_2 var_501_arg_2 = input_116; [L1524] EXPR var_501_arg_0 ? var_501_arg_1 : var_501_arg_2 [L1524] SORT_2 var_501 = var_501_arg_0 ? var_501_arg_1 : var_501_arg_2; [L1525] SORT_1 var_502_arg_0 = var_498; [L1526] SORT_2 var_502_arg_1 = var_168; [L1527] SORT_2 var_502_arg_2 = var_501; [L1528] EXPR var_502_arg_0 ? var_502_arg_1 : var_502_arg_2 [L1528] SORT_2 var_502 = var_502_arg_0 ? var_502_arg_1 : var_502_arg_2; [L1529] SORT_1 var_503_arg_0 = var_496; [L1530] SORT_2 var_503_arg_1 = var_310; [L1531] SORT_2 var_503_arg_2 = var_502; [L1532] EXPR var_503_arg_0 ? var_503_arg_1 : var_503_arg_2 [L1532] SORT_2 var_503 = var_503_arg_0 ? var_503_arg_1 : var_503_arg_2; [L1533] var_503 = var_503 & mask_SORT_2 [L1534] SORT_2 var_504_arg_0 = var_503; [L1535] SORT_2 var_504_arg_1 = state_16; [L1536] SORT_1 var_504 = var_504_arg_0 == var_504_arg_1; [L1537] SORT_1 var_505_arg_0 = var_493; [L1538] SORT_1 var_505_arg_1 = var_504; [L1539] SORT_1 var_505 = var_505_arg_0 & var_505_arg_1; [L1540] SORT_2 var_506_arg_0 = var_219; [L1541] SORT_2 var_506_arg_1 = state_18; [L1542] SORT_1 var_506 = var_506_arg_0 == var_506_arg_1; [L1543] SORT_1 var_507_arg_0 = var_505; [L1544] SORT_1 var_507_arg_1 = var_506; [L1545] SORT_1 var_507 = var_507_arg_0 & var_507_arg_1; [L1546] SORT_2 var_508_arg_0 = var_208; [L1547] SORT_2 var_508_arg_1 = state_20; [L1548] SORT_1 var_508 = var_508_arg_0 == var_508_arg_1; [L1549] SORT_1 var_509_arg_0 = var_507; [L1550] SORT_1 var_509_arg_1 = var_508; [L1551] SORT_1 var_509 = var_509_arg_0 & var_509_arg_1; [L1552] SORT_2 var_510_arg_0 = var_281; [L1553] SORT_2 var_510_arg_1 = state_22; [L1554] SORT_1 var_510 = var_510_arg_0 == var_510_arg_1; [L1555] SORT_1 var_511_arg_0 = var_509; [L1556] SORT_1 var_511_arg_1 = var_510; [L1557] SORT_1 var_511 = var_511_arg_0 & var_511_arg_1; [L1558] SORT_2 var_512_arg_0 = var_270; [L1559] SORT_2 var_512_arg_1 = state_24; [L1560] SORT_1 var_512 = var_512_arg_0 == var_512_arg_1; [L1561] SORT_1 var_513_arg_0 = var_511; [L1562] SORT_1 var_513_arg_1 = var_512; [L1563] SORT_1 var_513 = var_513_arg_0 & var_513_arg_1; [L1564] SORT_2 var_514_arg_0 = var_345; [L1565] SORT_2 var_514_arg_1 = state_26; [L1566] SORT_1 var_514 = var_514_arg_0 == var_514_arg_1; [L1567] SORT_1 var_515_arg_0 = var_513; [L1568] SORT_1 var_515_arg_1 = var_514; [L1569] SORT_1 var_515 = var_515_arg_0 & var_515_arg_1; [L1570] SORT_2 var_516_arg_0 = var_334; [L1571] SORT_2 var_516_arg_1 = state_28; [L1572] SORT_1 var_516 = var_516_arg_0 == var_516_arg_1; [L1573] SORT_1 var_517_arg_0 = var_515; [L1574] SORT_1 var_517_arg_1 = var_516; [L1575] SORT_1 var_517 = var_517_arg_0 & var_517_arg_1; [L1576] SORT_1 var_518_arg_0 = var_415; [L1577] SORT_1 var_518_arg_1 = state_31; [L1578] SORT_1 var_518 = var_518_arg_0 == var_518_arg_1; [L1579] SORT_1 var_519_arg_0 = var_517; [L1580] SORT_1 var_519_arg_1 = var_518; [L1581] SORT_1 var_519 = var_519_arg_0 & var_519_arg_1; [L1582] SORT_1 var_520_arg_0 = var_416; [L1583] SORT_1 var_520_arg_1 = state_33; [L1584] SORT_1 var_520 = var_520_arg_0 == var_520_arg_1; [L1585] SORT_1 var_521_arg_0 = var_519; [L1586] SORT_1 var_521_arg_1 = var_520; [L1587] SORT_1 var_521 = var_521_arg_0 & var_521_arg_1; [L1588] SORT_1 var_522_arg_0 = var_418; [L1589] SORT_1 var_522_arg_1 = state_35; [L1590] SORT_1 var_522 = var_522_arg_0 == var_522_arg_1; [L1591] SORT_1 var_523_arg_0 = var_521; [L1592] SORT_1 var_523_arg_1 = var_522; [L1593] SORT_1 var_523 = var_523_arg_0 & var_523_arg_1; [L1594] SORT_1 var_524_arg_0 = var_422; [L1595] SORT_1 var_524_arg_1 = state_37; [L1596] SORT_1 var_524 = var_524_arg_0 == var_524_arg_1; [L1597] SORT_1 var_525_arg_0 = var_523; [L1598] SORT_1 var_525_arg_1 = var_524; [L1599] SORT_1 var_525 = var_525_arg_0 & var_525_arg_1; [L1600] SORT_1 var_526_arg_0 = var_426; [L1601] SORT_1 var_526_arg_1 = state_39; [L1602] SORT_1 var_526 = var_526_arg_0 == var_526_arg_1; [L1603] SORT_1 var_527_arg_0 = var_525; [L1604] SORT_1 var_527_arg_1 = var_526; [L1605] SORT_1 var_527 = var_527_arg_0 & var_527_arg_1; [L1606] SORT_1 var_528_arg_0 = var_433; [L1607] SORT_1 var_528_arg_1 = state_41; [L1608] SORT_1 var_528 = var_528_arg_0 == var_528_arg_1; [L1609] SORT_1 var_529_arg_0 = var_527; [L1610] SORT_1 var_529_arg_1 = var_528; [L1611] SORT_1 var_529 = var_529_arg_0 & var_529_arg_1; [L1612] SORT_1 var_530_arg_0 = var_434; [L1613] SORT_1 var_530_arg_1 = state_43; [L1614] SORT_1 var_530 = var_530_arg_0 == var_530_arg_1; [L1615] SORT_1 var_531_arg_0 = var_529; [L1616] SORT_1 var_531_arg_1 = var_530; [L1617] SORT_1 var_531 = var_531_arg_0 & var_531_arg_1; [L1618] SORT_1 var_532_arg_0 = var_436; [L1619] SORT_1 var_532_arg_1 = state_45; [L1620] SORT_1 var_532 = var_532_arg_0 == var_532_arg_1; [L1621] SORT_1 var_533_arg_0 = var_531; [L1622] SORT_1 var_533_arg_1 = var_532; [L1623] SORT_1 var_533 = var_533_arg_0 & var_533_arg_1; [L1624] SORT_1 var_534_arg_0 = var_440; [L1625] SORT_1 var_534_arg_1 = state_47; [L1626] SORT_1 var_534 = var_534_arg_0 == var_534_arg_1; [L1627] SORT_1 var_535_arg_0 = var_533; [L1628] SORT_1 var_535_arg_1 = var_534; [L1629] SORT_1 var_535 = var_535_arg_0 & var_535_arg_1; [L1630] SORT_1 var_536_arg_0 = var_444; [L1631] SORT_1 var_536_arg_1 = state_49; [L1632] SORT_1 var_536 = var_536_arg_0 == var_536_arg_1; [L1633] SORT_1 var_537_arg_0 = var_535; [L1634] SORT_1 var_537_arg_1 = var_536; [L1635] SORT_1 var_537 = var_537_arg_0 & var_537_arg_1; [L1636] SORT_1 var_538_arg_0 = var_452; [L1637] SORT_1 var_538_arg_1 = state_51; [L1638] SORT_1 var_538 = var_538_arg_0 == var_538_arg_1; [L1639] SORT_1 var_539_arg_0 = var_537; [L1640] SORT_1 var_539_arg_1 = var_538; [L1641] SORT_1 var_539 = var_539_arg_0 & var_539_arg_1; [L1642] SORT_1 var_540_arg_0 = var_453; [L1643] SORT_1 var_540_arg_1 = state_53; [L1644] SORT_1 var_540 = var_540_arg_0 == var_540_arg_1; [L1645] SORT_1 var_541_arg_0 = var_539; [L1646] SORT_1 var_541_arg_1 = var_540; [L1647] SORT_1 var_541 = var_541_arg_0 & var_541_arg_1; [L1648] SORT_1 var_542_arg_0 = var_455; [L1649] SORT_1 var_542_arg_1 = state_55; [L1650] SORT_1 var_542 = var_542_arg_0 == var_542_arg_1; [L1651] SORT_1 var_543_arg_0 = var_541; [L1652] SORT_1 var_543_arg_1 = var_542; [L1653] SORT_1 var_543 = var_543_arg_0 & var_543_arg_1; [L1654] SORT_1 var_544_arg_0 = var_459; [L1655] SORT_1 var_544_arg_1 = state_57; [L1656] SORT_1 var_544 = var_544_arg_0 == var_544_arg_1; [L1657] SORT_1 var_545_arg_0 = var_543; [L1658] SORT_1 var_545_arg_1 = var_544; [L1659] SORT_1 var_545 = var_545_arg_0 & var_545_arg_1; [L1660] SORT_1 var_546_arg_0 = var_463; [L1661] SORT_1 var_546_arg_1 = state_59; [L1662] SORT_1 var_546 = var_546_arg_0 == var_546_arg_1; [L1663] SORT_1 var_547_arg_0 = var_545; [L1664] SORT_1 var_547_arg_1 = var_546; [L1665] SORT_1 var_547 = var_547_arg_0 & var_547_arg_1; [L1666] SORT_1 var_548_arg_0 = var_547; [L1667] SORT_1 var_548_arg_1 = state_63; [L1668] SORT_1 var_548 = var_548_arg_0 & var_548_arg_1; [L1669] SORT_1 var_549_arg_0 = input_132; [L1670] SORT_4 var_549_arg_1 = var_198; [L1671] SORT_4 var_549_arg_2 = var_197; [L1672] EXPR var_549_arg_0 ? var_549_arg_1 : var_549_arg_2 [L1672] SORT_4 var_549 = var_549_arg_0 ? var_549_arg_1 : var_549_arg_2; [L1673] SORT_1 var_550_arg_0 = input_142; [L1674] SORT_4 var_550_arg_1 = var_198; [L1675] SORT_4 var_550_arg_2 = var_197; [L1676] EXPR var_550_arg_0 ? var_550_arg_1 : var_550_arg_2 [L1676] SORT_4 var_550 = var_550_arg_0 ? var_550_arg_1 : var_550_arg_2; [L1677] SORT_4 var_551_arg_0 = var_549; [L1678] SORT_4 var_551_arg_1 = var_550; [L1679] SORT_4 var_551 = var_551_arg_0 + var_551_arg_1; [L1680] SORT_1 var_552_arg_0 = input_152; [L1681] SORT_4 var_552_arg_1 = var_198; [L1682] SORT_4 var_552_arg_2 = var_197; [L1683] EXPR var_552_arg_0 ? var_552_arg_1 : var_552_arg_2 [L1683] SORT_4 var_552 = var_552_arg_0 ? var_552_arg_1 : var_552_arg_2; [L1684] SORT_4 var_553_arg_0 = var_551; [L1685] SORT_4 var_553_arg_1 = var_552; [L1686] SORT_4 var_553 = var_553_arg_0 + var_553_arg_1; [L1687] var_553 = var_553 & mask_SORT_4 [L1688] SORT_4 var_554_arg_0 = var_553; [L1689] SORT_4 var_554_arg_1 = var_198; [L1690] SORT_1 var_554 = var_554_arg_0 <= var_554_arg_1; [L1691] SORT_1 var_555_arg_0 = state_61; [L1692] SORT_1 var_555_arg_1 = var_548; [L1693] SORT_1 var_555_arg_2 = ~var_554; [L1694] var_555_arg_2 = var_555_arg_2 & mask_SORT_1 [L1695] EXPR var_555_arg_0 ? var_555_arg_1 : var_555_arg_2 [L1695] SORT_1 var_555 = var_555_arg_0 ? var_555_arg_1 : var_555_arg_2; [L1696] SORT_1 next_556_arg_1 = var_555; [L1698] state_6 = next_107_arg_1 [L1699] state_8 = next_109_arg_1 [L1700] state_10 = next_111_arg_1 [L1701] state_12 = next_113_arg_1 [L1702] state_14 = next_115_arg_1 [L1703] state_16 = next_117_arg_1 [L1704] state_18 = next_119_arg_1 [L1705] state_20 = next_121_arg_1 [L1706] state_22 = next_123_arg_1 [L1707] state_24 = next_125_arg_1 [L1708] state_26 = next_127_arg_1 [L1709] state_28 = next_129_arg_1 [L1710] state_31 = next_131_arg_1 [L1711] state_33 = next_133_arg_1 [L1712] state_35 = next_135_arg_1 [L1713] state_37 = next_137_arg_1 [L1714] state_39 = next_139_arg_1 [L1715] state_41 = next_141_arg_1 [L1716] state_43 = next_143_arg_1 [L1717] state_45 = next_145_arg_1 [L1718] state_47 = next_147_arg_1 [L1719] state_49 = next_149_arg_1 [L1720] state_51 = next_151_arg_1 [L1721] state_53 = next_153_arg_1 [L1722] state_55 = next_155_arg_1 [L1723] state_57 = next_157_arg_1 [L1724] state_59 = next_159_arg_1 [L1725] state_61 = next_161_arg_1 [L1726] state_63 = next_556_arg_1 VAL [bad_105_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_15_arg_1=0, init_17_arg_1=0, init_19_arg_1=0, init_21_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_29_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, init_44_arg_1=0, init_46_arg_1=0, init_48_arg_1=0, init_50_arg_1=0, init_52_arg_1=0, init_54_arg_1=0, init_56_arg_1=0, init_58_arg_1=0, init_60_arg_1=0, init_62_arg_1=0, init_64_arg_1=0, init_7_arg_1=0, init_9_arg_1=0, input_106=0, input_108=0, input_110=0, input_112=0, input_114=0, input_116=0, input_118=0, input_120=0, input_122=0, input_124=0, input_126=0, input_128=0, input_130=1, input_132=0, input_134=1, input_136=1, input_138=1, input_140=1, input_142=1, input_144=1, input_146=1, input_148=1, input_150=1, input_152=1, input_154=1, input_156=1, input_158=1, input_162=1, input_164=1, input_176=0, input_179=0, input_196=1, input_214=2, input_225=0, input_228=1, input_231=1, input_240=0, input_243=0, input_261=1, input_276=2, input_287=0, input_290=0, input_293=1, input_302=0, input_305=0, input_325=0, input_340=2, input_351=0, mask_SORT_1=1, mask_SORT_2=255, mask_SORT_3=4294967295, mask_SORT_4=4294967295, msb_SORT_1=1, msb_SORT_2=128, msb_SORT_3=8388608, msb_SORT_4=2147483648, next_107_arg_1=0, next_109_arg_1=0, next_111_arg_1=0, next_113_arg_1=0, next_115_arg_1=0, next_117_arg_1=0, next_119_arg_1=0, next_121_arg_1=0, next_123_arg_1=0, next_125_arg_1=0, next_127_arg_1=0, next_129_arg_1=0, next_131_arg_1=1, next_133_arg_1=0, next_135_arg_1=1, next_137_arg_1=1, next_139_arg_1=1, next_141_arg_1=1, next_143_arg_1=1, next_145_arg_1=1, next_147_arg_1=1, next_149_arg_1=1, next_151_arg_1=1, next_153_arg_1=1, next_155_arg_1=1, next_157_arg_1=1, next_159_arg_1=1, next_161_arg_1=1, next_556_arg_1=1, state_10=0, state_12=0, state_14=0, state_16=0, state_18=0, state_20=0, state_22=0, state_24=0, state_26=0, state_28=0, state_31=1, state_33=0, state_35=1, state_37=1, state_39=1, state_41=1, state_43=1, state_45=1, state_47=1, state_49=1, state_51=1, state_53=1, state_55=1, state_57=1, state_59=1, state_6=0, state_61=1, state_63=1, state_8=0, var_100=1, var_100_arg_0=0, var_100_arg_1=0, var_101=0, var_101_arg_0=0, var_101_arg_1=1, var_102=1, var_102_arg_0=0, var_102_arg_1=0, var_103=0, var_103_arg_0=0, var_103_arg_1=1, var_104=0, var_104_arg_0=0, var_104_arg_1=0, var_160=1, var_163=1, var_163_arg_0=1, var_163_arg_1=1, var_165=1, var_165_arg_0=1, var_165_arg_1=1, var_166=3, var_167=0, var_168=1, var_169=1, var_169_arg_0=1, var_169_arg_1=1, var_169_arg_2=0, var_170=4294967039, var_170_arg_0=0, var_170_arg_1=1, var_171=1, var_171_arg_0=3, var_171_arg_1=4294967039, var_172=0, var_172_arg_0=1, var_172_arg_1=0, var_173=1, var_173_arg_0=1, var_173_arg_1=0, var_174=1, var_174_arg_0=1, var_174_arg_1=1, var_175=1, var_175_arg_0=1, var_175_arg_1=1, var_177=1, var_177_arg_0=1, var_177_arg_1=1, var_178=1, var_178_arg_0=1, var_178_arg_1=1, var_180=1, var_180_arg_0=1, var_180_arg_1=0, var_181=0, var_181_arg_0=0, var_181_arg_1=0, var_181_arg_2=0, var_182=0, var_182_arg_0=0, var_182_arg_1=0, var_183=0, var_183_arg_0=3, var_183_arg_1=0, var_184=1, var_184_arg_0=0, var_184_arg_1=0, var_185=1, var_185_arg_0=1, var_185_arg_1=1, var_185_arg_2=0, var_186=0, var_186_arg_0=1, var_186_arg_1=0, var_187=0, var_187_arg_0=0, var_187_arg_1=0, var_187_arg_2=0, var_188=1, var_188_arg_0=1, var_188_arg_1=1, var_188_arg_2=0, var_189=0, var_189_arg_0=0, var_189_arg_1=1, var_190=0, var_190_arg_0=4294967039, var_190_arg_1=0, var_191=1, var_191_arg_0=1, var_191_arg_1=1, var_192=1, var_192_arg_0=1, var_192_arg_1=1, var_193=1, var_193_arg_0=1, var_193_arg_1=1, var_194=1, var_194_arg_0=1, var_194_arg_1=1, var_195=1, var_195_arg_0=1, var_195_arg_1=1, var_197=0, var_198=1, var_199=3, var_199_arg_0=4294967039, var_199_arg_1=1, var_200=0, var_200_arg_0=0, var_200_arg_1=3, var_201=0, var_201_arg_0=1, var_201_arg_1=3, var_202=0, var_202_arg_0=0, var_202_arg_1=0, var_202_arg_2=0, var_203=0, var_203_arg_0=0, var_203_arg_1=1, var_203_arg_2=0, var_204=1, var_204_arg_0=0, var_204_arg_1=0, var_205=3, var_206=1, var_206_arg_0=1, var_206_arg_1=0, var_207=1, var_207_arg_0=1, var_208=0, var_208_arg_0=0, var_208_arg_1=1, var_208_arg_2=0, var_209=0, var_209_arg_0=3, var_209_arg_1=0, var_210=1, var_210_arg_0=1, var_210_arg_1=0, var_211=1, var_211_arg_0=1, var_211_arg_1=1, var_212=1, var_212_arg_0=0, var_212_arg_1=1, var_213=1, var_213_arg_0=1, var_213_arg_1=1, var_215=1, var_215_arg_0=1, var_215_arg_1=1, var_216=1, var_216_arg_0=1, var_216_arg_1=1, var_217=4294967040, var_217_arg_0=1, var_217_arg_1=4294967039, var_218=0, var_218_arg_0=4294967040, var_219=0, var_219_arg_0=1, var_219_arg_1=0, var_219_arg_2=1, var_220=0, var_220_arg_0=3, var_220_arg_1=0, var_221=0, var_221_arg_0=1, var_221_arg_1=0, var_222=0, var_222_arg_0=0, var_222_arg_1=0, var_223=0, var_223_arg_0=1, var_223_arg_1=0, var_224=75, var_224_arg_0=0, var_224_arg_1=2, var_226=74, var_226_arg_0=75, var_226_arg_1=0, var_227=0, var_227_arg_0=0, var_227_arg_1=74, var_229=1, var_229_arg_0=1, var_229_arg_1=1, var_230=0, var_230_arg_0=0, var_230_arg_1=1, var_232=1, var_232_arg_0=1, var_232_arg_1=1, var_233=1, var_233_arg_0=1, var_233_arg_1=1, var_233_arg_2=0, var_234=4294967034, var_234_arg_0=0, var_234_arg_1=1, var_235=1, var_235_arg_0=3, var_235_arg_1=4294967034, var_236=1, var_236_arg_0=1, var_236_arg_1=1, var_237=1, var_237_arg_0=1, var_237_arg_1=1, var_238=0, var_238_arg_0=0, var_238_arg_1=1, var_239=1, var_239_arg_0=1, var_239_arg_1=1, var_241=1, var_241_arg_0=1, var_241_arg_1=0, var_242=0, var_242_arg_0=0, var_242_arg_1=1, var_244=1, var_244_arg_0=1, var_244_arg_1=0, var_245=0, var_245_arg_0=0, var_245_arg_1=0, var_245_arg_2=0, var_246=0, var_246_arg_0=0, var_246_arg_1=0, var_247=0, var_247_arg_0=3, var_247_arg_1=0, var_248=0, var_248_arg_0=1, var_248_arg_1=0, var_249=1, var_249_arg_0=0, var_249_arg_1=0, var_250=1, var_250_arg_0=0, var_250_arg_1=0, var_250_arg_2=1, var_251=1, var_251_arg_0=1, var_251_arg_1=1, var_251_arg_2=0, var_252=0, var_252_arg_0=0, var_252_arg_1=1, var_252_arg_2=0, var_253=1, var_253_arg_0=1, var_253_arg_1=1, var_253_arg_2=0, var_254=0, var_254_arg_0=0, var_254_arg_1=1, var_255=0, var_255_arg_0=4294967034, var_255_arg_1=0, var_256=1, var_256_arg_0=0, var_256_arg_1=1, var_257=1, var_257_arg_0=1, var_257_arg_1=1, var_258=1, var_258_arg_0=1, var_258_arg_1=1, var_259=1, var_259_arg_0=0, var_259_arg_1=1, var_260=0, var_260_arg_0=0, var_260_arg_1=1, var_262=0, var_262_arg_0=4294967034, var_262_arg_1=1, var_263=1, var_263_arg_0=0, var_263_arg_1=0, var_264=0, var_264_arg_0=1, var_264_arg_1=0, var_265=0, var_265_arg_0=0, var_265_arg_1=1, var_265_arg_2=0, var_266=1, var_266_arg_0=1, var_266_arg_1=1, var_266_arg_2=0, var_267=1, var_267_arg_0=1, var_267_arg_1=1, var_268=1, var_268_arg_0=1, var_268_arg_1=0, var_269=1, var_269_arg_0=1, var_270=0, var_270_arg_0=0, var_270_arg_1=1, var_270_arg_2=0, var_271=0, var_271_arg_0=3, var_271_arg_1=0, var_272=0, var_272_arg_0=0, var_272_arg_1=0, var_273=0, var_273_arg_0=1, var_273_arg_1=0, var_274=1, var_274_arg_0=1, var_274_arg_1=0, var_275=0, var_275_arg_0=0, var_275_arg_1=1, var_277=1, var_277_arg_0=1, var_277_arg_1=1, var_278=1, var_278_arg_0=1, var_278_arg_1=1, var_279=4294967035, var_279_arg_0=1, var_279_arg_1=4294967034, var_280=251, var_280_arg_0=4294967035, var_281=0, var_281_arg_0=1, var_281_arg_1=251, var_281_arg_2=1, var_282=0, var_282_arg_0=3, var_282_arg_1=0, var_283=0, var_283_arg_0=1, var_283_arg_1=0, var_284=1, var_284_arg_0=1, var_284_arg_1=0, var_285=0, var_285_arg_0=0, var_285_arg_1=1, var_286=39, var_286_arg_0=1, var_286_arg_1=2, var_288=39, var_288_arg_0=39, var_288_arg_1=1, var_289=0, var_289_arg_0=0, var_289_arg_1=39, var_291=1, var_291_arg_0=1, var_291_arg_1=1, var_292=0, var_292_arg_0=0, var_292_arg_1=1, var_294=1, var_294_arg_0=1, var_294_arg_1=0, var_295=0, var_295_arg_0=0, var_295_arg_1=1, var_295_arg_2=0, var_296=0, var_296_arg_0=0, var_296_arg_1=0, var_297=0, var_297_arg_0=3, var_297_arg_1=0, var_298=1, var_298_arg_0=1, var_298_arg_1=1, var_299=1, var_299_arg_0=0, var_299_arg_1=1, var_30=0, var_300=0, var_300_arg_0=0, var_300_arg_1=1, var_301=1, var_301_arg_0=1, var_301_arg_1=1, var_303=1, var_303_arg_0=1, var_303_arg_1=1, var_304=0, var_304_arg_0=0, var_304_arg_1=1, var_306=1, var_306_arg_0=1, var_306_arg_1=0, var_307=0, var_307_arg_0=0, var_307_arg_1=0, var_307_arg_2=0, var_308=0, var_308_arg_0=0, var_308_arg_1=0, var_309=0, var_309_arg_0=3, var_309_arg_1=0, var_310=2, var_311=0, var_311_arg_0=2, var_311_arg_1=0, var_312=1, var_312_arg_0=0, var_312_arg_1=0, var_313=0, var_313_arg_0=1, var_313_arg_1=0, var_314=1, var_314_arg_0=0, var_314_arg_1=0, var_314_arg_2=1, var_315=0, var_315_arg_0=1, var_315_arg_1=0, var_315_arg_2=0, var_316=0, var_316_arg_0=0, var_316_arg_1=1, var_316_arg_2=0, var_317=1, var_317_arg_0=1, var_317_arg_1=1, var_317_arg_2=0, var_318=0, var_318_arg_0=0, var_318_arg_1=1, var_319=1, var_319_arg_0=0, var_319_arg_1=0, var_320=0, var_320_arg_0=0, var_320_arg_1=0, var_321=0, var_321_arg_0=1, var_321_arg_1=0, var_322=0, var_322_arg_0=1, var_322_arg_1=0, var_323=1, var_323_arg_0=1, var_323_arg_1=0, var_324=0, var_324_arg_0=0, var_324_arg_1=1, var_326=1, var_326_arg_0=0, var_326_arg_1=1, var_327=0, var_327_arg_0=0, var_327_arg_1=1, var_328=1, var_328_arg_0=1, var_328_arg_1=1, var_329=1, var_329_arg_0=1, var_329_arg_1=1, var_329_arg_2=0, var_330=1, var_330_arg_0=0, var_330_arg_1=1, var_330_arg_2=1, var_331=0, var_331_arg_0=2, var_331_arg_1=1, var_332=1, var_332_arg_0=1, var_332_arg_1=0, var_333=1, var_333_arg_0=1, var_334=0, var_334_arg_0=0, var_334_arg_1=1, var_334_arg_2=0, var_335=0, var_335_arg_0=3, var_335_arg_1=0, var_336=0, var_336_arg_0=0, var_336_arg_1=0, var_337=0, var_337_arg_0=1, var_337_arg_1=0, var_338=1, var_338_arg_0=1, var_338_arg_1=0, var_339=0, var_339_arg_0=0, var_339_arg_1=1, var_341=1, var_341_arg_0=1, var_341_arg_1=1, var_342=1, var_342_arg_0=1, var_342_arg_1=0, var_343=1, var_343_arg_0=1, var_343_arg_1=0, var_344=1, var_344_arg_0=1, var_345=0, var_345_arg_0=0, var_345_arg_1=1, var_345_arg_2=0, var_346=0, var_346_arg_0=3, var_346_arg_1=0, var_347=0, var_347_arg_0=1, var_347_arg_1=0, var_348=1, var_348_arg_0=1, var_348_arg_1=0, var_349=0, var_349_arg_0=0, var_349_arg_1=1, var_350=1, var_350_arg_0=1, var_350_arg_1=2, var_352=1, var_352_arg_0=1, var_352_arg_1=0, var_353=0, var_353_arg_0=0, var_353_arg_1=1, var_354=1, var_354_arg_0=1, var_354_arg_1=1, var_355=1, var_355_arg_0=0, var_355_arg_1=1, var_356=1, var_356_arg_0=0, var_356_arg_1=1, var_357=1, var_357_arg_0=1, var_357_arg_1=1, var_358=11, var_358_arg_0=2, var_358_arg_1=1, var_359=253, var_359_arg_0=0, var_359_arg_1=11, var_360=3, var_360_arg_0=1, var_360_arg_1=253, var_361=3, var_361_arg_0=1, var_361_arg_1=3, var_362=3, var_362_arg_0=0, var_362_arg_1=3, var_363=3, var_363_arg_0=0, var_363_arg_1=3, var_364=1, var_364_arg_0=1, var_364_arg_1=3, var_365=2, var_365_arg_0=2, var_365_arg_1=1, var_366=5, var_366_arg_0=0, var_366_arg_1=2, var_367=254, var_367_arg_0=0, var_367_arg_1=5, var_368=254, var_368_arg_0=1, var_368_arg_1=254, var_369=9, var_369_arg_0=0, var_369_arg_1=254, var_370=3, var_370_arg_0=0, var_370_arg_1=9, var_371=0, var_371_arg_0=0, var_371_arg_1=3, var_372=2, var_372_arg_0=2, var_372_arg_1=0, var_373=76, var_373_arg_0=0, var_373_arg_1=2, var_374=0, var_374_arg_0=0, var_374_arg_1=76, var_375=0, var_375_arg_0=1, var_375_arg_1=0, var_376=1, var_376_arg_0=1, var_376_arg_1=0, var_377=1, var_377_arg_0=1, var_377_arg_1=1, var_378=1, var_378_arg_0=0, var_378_arg_1=1, var_379=1, var_379_arg_0=1, var_379_arg_1=1, var_380=1, var_380_arg_0=1, var_380_arg_1=1, var_381=1, var_381_arg_0=1, var_381_arg_1=1, var_382=1, var_382_arg_0=1, var_382_arg_1=1, var_383=1, var_383_arg_0=1, var_383_arg_1=1, var_384=1, var_384_arg_0=1, var_384_arg_1=1, var_385=1, var_385_arg_0=1, var_385_arg_1=1, var_386=1, var_386_arg_0=1, var_386_arg_1=1, var_387=1, var_387_arg_0=1, var_387_arg_1=1, var_388=1, var_388_arg_0=1, var_388_arg_1=1, var_389=1, var_389_arg_0=1, var_389_arg_1=1, var_390=1, var_390_arg_0=1, var_390_arg_1=1, var_391=1, var_391_arg_0=1, var_391_arg_1=1, var_392=1, var_392_arg_0=1, var_392_arg_1=1, var_393=1, var_393_arg_0=1, var_393_arg_1=1, var_394=1, var_394_arg_0=1, var_394_arg_1=1, var_395=1, var_395_arg_0=1, var_395_arg_1=1, var_396=1, var_396_arg_0=1, var_396_arg_1=1, var_397=1, var_397_arg_0=1, var_397_arg_1=1, var_398=1, var_398_arg_0=1, var_398_arg_1=1, var_399=1, var_399_arg_0=1, var_399_arg_1=1, var_400=1, var_400_arg_0=1, var_400_arg_1=1, var_401=1, var_401_arg_0=1, var_401_arg_1=1, var_402=1, var_402_arg_0=1, var_402_arg_1=1, var_403=1, var_403_arg_0=1, var_403_arg_1=1, var_404=1, var_404_arg_0=1, var_404_arg_1=1, var_405=1, var_405_arg_0=1, var_405_arg_1=1, var_406=1, var_406_arg_0=1, var_406_arg_1=1, var_407=1, var_407_arg_0=1, var_407_arg_1=1, var_408=1, var_408_arg_0=1, var_408_arg_1=1, var_409=1, var_409_arg_0=1, var_409_arg_1=1, var_410=1, var_410_arg_0=1, var_410_arg_1=1, var_411=1, var_411_arg_0=1, var_411_arg_1=1, var_412=1, var_412_arg_0=1, var_412_arg_1=1, var_413=0, var_413_arg_0=0, var_413_arg_1=1, var_414=0, var_414_arg_0=1, var_414_arg_1=0, var_415=0, var_415_arg_0=0, var_415_arg_1=0, var_416=1, var_416_arg_0=75, var_416_arg_1=1, var_417=0, var_417_arg_0=0, var_417_arg_1=1, var_418=1, var_418_arg_0=1, var_418_arg_1=1, var_419=1, var_419_arg_0=0, var_419_arg_1=1, var_420=1, var_420_arg_0=1, var_420_arg_1=1, var_421=1, var_421_arg_0=0, var_421_arg_1=1, var_422=0, var_422_arg_0=1, var_422_arg_1=0, var_423=1, var_423_arg_0=1, var_423_arg_1=1, var_424=0, var_424_arg_0=0, var_424_arg_1=1, var_425=1, var_425_arg_0=1, var_425_arg_1=0, var_426=0, var_426_arg_0=1, var_426_arg_1=0, var_427=1, var_427_arg_0=0, var_427_arg_1=1, var_428=0, var_428_arg_0=0, var_428_arg_1=1, var_429=1, var_429_arg_0=1, var_429_arg_1=0, var_430=1, var_430_arg_0=0, var_430_arg_1=1, var_431=1, var_431_arg_0=1, var_431_arg_1=1, var_432=1, var_432_arg_0=1, var_432_arg_1=1, var_433=1, var_433_arg_0=1, var_433_arg_1=0, var_434=1, var_434_arg_0=39, var_434_arg_1=1, var_435=1, var_435_arg_0=1, var_435_arg_1=1, var_436=1, var_436_arg_0=1, var_436_arg_1=1, var_437=1, var_437_arg_0=1, var_437_arg_1=1, var_438=1, var_438_arg_0=1, var_438_arg_1=1, var_439=1, var_439_arg_0=1, var_439_arg_1=1, var_440=0, var_440_arg_0=1, var_440_arg_1=0, var_441=1, var_441_arg_0=1, var_441_arg_1=1, var_442=0, var_442_arg_0=0, var_442_arg_1=1, var_443=1, var_443_arg_0=1, var_443_arg_1=0, var_444=1, var_444_arg_0=1, var_444_arg_1=1, var_445=1, var_445_arg_0=0, var_445_arg_1=1, var_446=1, var_446_arg_0=1, var_446_arg_1=1, var_447=1, var_447_arg_0=1, var_447_arg_1=1, var_448=1, var_448_arg_0=1, var_448_arg_1=1, var_449=1, var_449_arg_0=1, var_449_arg_1=1, var_450=1, var_450_arg_0=1, var_450_arg_1=1, var_451=0, var_451_arg_0=1, var_451_arg_1=0, var_452=0, var_452_arg_0=0, var_452_arg_1=0, var_453=1, var_453_arg_0=1, var_453_arg_1=1, var_454=0, var_454_arg_0=0, var_454_arg_1=1, var_455=1, var_455_arg_0=1, var_455_arg_1=1, var_456=1, var_456_arg_0=0, var_456_arg_1=1, var_457=1, var_457_arg_0=1, var_457_arg_1=1, var_458=1, var_458_arg_0=0, var_458_arg_1=1, var_459=1, var_459_arg_0=1, var_459_arg_1=1, var_460=1, var_460_arg_0=1, var_460_arg_1=1, var_461=1, var_461_arg_0=1, var_461_arg_1=1, var_462=1, var_462_arg_0=1, var_462_arg_1=1, var_463=1, var_463_arg_0=1, var_463_arg_1=1, var_464=1, var_464_arg_0=1, var_464_arg_1=1, var_465=1, var_465_arg_0=1, var_465_arg_1=1, var_466=1, var_466_arg_0=1, var_466_arg_1=1, var_467=1, var_467_arg_0=1, var_467_arg_1=1, var_468=1, var_468_arg_0=1, var_468_arg_1=1, var_469=1, var_469_arg_0=1, var_469_arg_1=1, var_470=0, var_470_arg_0=0, var_470_arg_1=1, var_471=0, var_471_arg_0=1, var_471_arg_1=0, var_472=0, var_472_arg_0=0, var_472_arg_1=0, var_473=0, var_473_arg_0=1, var_473_arg_1=0, var_474=0, var_474_arg_0=0, var_474_arg_1=0, var_475=0, var_475_arg_0=0, var_475_arg_1=0, var_475_arg_2=0, var_476=1, var_476_arg_0=0, var_476_arg_1=0, var_477=0, var_477_arg_0=0, var_477_arg_1=1, var_478=0, var_478_arg_0=0, var_478_arg_1=0, var_479=0, var_479_arg_0=0, var_479_arg_1=1, var_480=0, var_480_arg_0=0, var_480_arg_1=0, var_481=0, var_481_arg_0=0, var_481_arg_1=0, var_481_arg_2=0, var_482=0, var_482_arg_0=0, var_482_arg_1=1, var_482_arg_2=0, var_483=0, var_483_arg_0=0, var_483_arg_1=2, var_483_arg_2=0, var_484=1, var_484_arg_0=0, var_484_arg_1=0, var_485=0, var_485_arg_0=0, var_485_arg_1=1, var_486=0, var_486_arg_0=0, var_486_arg_1=1, var_487=0, var_487_arg_0=0, var_487_arg_1=0, var_488=0, var_488_arg_0=0, var_488_arg_1=0, var_489=0, var_489_arg_0=0, var_489_arg_1=0, var_489_arg_2=0, var_490=0, var_490_arg_0=0, var_490_arg_1=1, var_490_arg_2=0, var_491=0, var_491_arg_0=0, var_491_arg_1=2, var_491_arg_2=0, var_492=1, var_492_arg_0=0, var_492_arg_1=0, var_493=0, var_493_arg_0=0, var_493_arg_1=1, var_494=2, var_495=0, var_495_arg_0=2, var_495_arg_1=1, var_496=0, var_496_arg_0=0, var_496_arg_1=0, var_497=0, var_497_arg_0=2, var_497_arg_1=0, var_498=0, var_498_arg_0=0, var_498_arg_1=0, var_499=0, var_499_arg_0=2, var_499_arg_1=3, var_5=0, var_500=0, var_500_arg_0=0, var_500_arg_1=0, var_501=0, var_501_arg_0=0, var_501_arg_1=0, var_501_arg_2=0, var_502=0, var_502_arg_0=0, var_502_arg_1=1, var_502_arg_2=0, var_503=0, var_503_arg_0=0, var_503_arg_1=2, var_503_arg_2=0, var_504=1, var_504_arg_0=0, var_504_arg_1=0, var_505=0, var_505_arg_0=0, var_505_arg_1=1, var_506=1, var_506_arg_0=0, var_506_arg_1=0, var_507=0, var_507_arg_0=0, var_507_arg_1=1, var_508=1, var_508_arg_0=0, var_508_arg_1=0, var_509=0, var_509_arg_0=0, var_509_arg_1=1, var_510=1, var_510_arg_0=0, var_510_arg_1=0, var_511=0, var_511_arg_0=0, var_511_arg_1=1, var_512=1, var_512_arg_0=0, var_512_arg_1=0, var_513=0, var_513_arg_0=0, var_513_arg_1=1, var_514=1, var_514_arg_0=0, var_514_arg_1=0, var_515=0, var_515_arg_0=0, var_515_arg_1=1, var_516=1, var_516_arg_0=0, var_516_arg_1=0, var_517=0, var_517_arg_0=0, var_517_arg_1=1, var_518=1, var_518_arg_0=0, var_518_arg_1=0, var_519=0, var_519_arg_0=0, var_519_arg_1=1, var_520=0, var_520_arg_0=1, var_520_arg_1=0, var_521=0, var_521_arg_0=0, var_521_arg_1=0, var_522=0, var_522_arg_0=1, var_522_arg_1=0, var_523=0, var_523_arg_0=0, var_523_arg_1=0, var_524=1, var_524_arg_0=0, var_524_arg_1=0, var_525=0, var_525_arg_0=0, var_525_arg_1=1, var_526=1, var_526_arg_0=0, var_526_arg_1=0, var_527=0, var_527_arg_0=0, var_527_arg_1=1, var_528=0, var_528_arg_0=1, var_528_arg_1=0, var_529=0, var_529_arg_0=0, var_529_arg_1=0, var_530=0, var_530_arg_0=1, var_530_arg_1=0, var_531=0, var_531_arg_0=0, var_531_arg_1=0, var_532=0, var_532_arg_0=1, var_532_arg_1=0, var_533=0, var_533_arg_0=0, var_533_arg_1=0, var_534=1, var_534_arg_0=0, var_534_arg_1=0, var_535=0, var_535_arg_0=0, var_535_arg_1=1, var_536=0, var_536_arg_0=1, var_536_arg_1=0, var_537=0, var_537_arg_0=0, var_537_arg_1=0, var_538=1, var_538_arg_0=0, var_538_arg_1=0, var_539=0, var_539_arg_0=0, var_539_arg_1=1, var_540=0, var_540_arg_0=1, var_540_arg_1=0, var_541=0, var_541_arg_0=0, var_541_arg_1=0, var_542=0, var_542_arg_0=1, var_542_arg_1=0, var_543=0, var_543_arg_0=0, var_543_arg_1=0, var_544=0, var_544_arg_0=1, var_544_arg_1=0, var_545=0, var_545_arg_0=0, var_545_arg_1=0, var_546=0, var_546_arg_0=1, var_546_arg_1=0, var_547=0, var_547_arg_0=0, var_547_arg_1=0, var_548=0, var_548_arg_0=0, var_548_arg_1=0, var_549=0, var_549_arg_0=0, var_549_arg_1=1, var_549_arg_2=0, var_550=1, var_550_arg_0=1, var_550_arg_1=1, var_550_arg_2=0, var_551=1, var_551_arg_0=0, var_551_arg_1=1, var_552=1, var_552_arg_0=1, var_552_arg_1=1, var_552_arg_2=0, var_553=0, var_553_arg_0=1, var_553_arg_1=1, var_554=1, var_554_arg_0=0, var_554_arg_1=1, var_555=1, var_555_arg_0=0, var_555_arg_1=0, var_555_arg_2=1, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_66=0, var_66_arg_0=0, var_66_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=1, var_68=0, var_68_arg_0=0, var_68_arg_1=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_72=0, var_72_arg_0=0, var_72_arg_1=0, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_74=0, var_74_arg_0=0, var_74_arg_1=0, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_79=0, var_80=1, var_80_arg_0=0, var_80_arg_1=0, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_82=1, var_82_arg_0=0, var_82_arg_1=0, var_83=0, var_83_arg_0=0, var_83_arg_1=1, var_84=1, var_84_arg_0=0, var_84_arg_1=0, var_85=0, var_85_arg_0=0, var_85_arg_1=1, var_86=1, var_86_arg_0=0, var_86_arg_1=0, var_87=0, var_87_arg_0=0, var_87_arg_1=1, var_88=1, var_88_arg_0=0, var_88_arg_1=0, var_89=0, var_89_arg_0=0, var_89_arg_1=1, var_90=1, var_90_arg_0=0, var_90_arg_1=0, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=1, var_92_arg_0=0, var_92_arg_1=0, var_93=0, var_93_arg_0=0, var_93_arg_1=1, var_94=1, var_94_arg_0=0, var_94_arg_1=0, var_95=0, var_95_arg_0=0, var_95_arg_1=1, var_96=1, var_96_arg_0=0, var_96_arg_1=0, var_97=0, var_97_arg_0=0, var_97_arg_1=1, var_98=1, var_98_arg_0=0, var_98_arg_1=0, var_99=0, var_99_arg_0=0, var_99_arg_1=1] [L189] input_106 = __VERIFIER_nondet_uchar() [L190] input_106 = input_106 & mask_SORT_2 [L191] input_108 = __VERIFIER_nondet_uchar() [L192] input_108 = input_108 & mask_SORT_2 [L193] input_110 = __VERIFIER_nondet_uchar() [L194] input_110 = input_110 & mask_SORT_2 [L195] input_112 = __VERIFIER_nondet_uchar() [L196] input_112 = input_112 & mask_SORT_2 [L197] input_114 = __VERIFIER_nondet_uchar() [L198] input_114 = input_114 & mask_SORT_2 [L199] input_116 = __VERIFIER_nondet_uchar() [L200] input_116 = input_116 & mask_SORT_2 [L201] input_118 = __VERIFIER_nondet_uchar() [L202] input_118 = input_118 & mask_SORT_2 [L203] input_120 = __VERIFIER_nondet_uchar() [L204] input_120 = input_120 & mask_SORT_2 [L205] input_122 = __VERIFIER_nondet_uchar() [L206] input_122 = input_122 & mask_SORT_2 [L207] input_124 = __VERIFIER_nondet_uchar() [L208] input_124 = input_124 & mask_SORT_2 [L209] input_126 = __VERIFIER_nondet_uchar() [L210] input_126 = input_126 & mask_SORT_2 [L211] input_128 = __VERIFIER_nondet_uchar() [L212] input_128 = input_128 & mask_SORT_2 [L213] input_130 = __VERIFIER_nondet_uchar() [L214] input_130 = input_130 & mask_SORT_1 [L215] input_132 = __VERIFIER_nondet_uchar() [L216] input_132 = input_132 & mask_SORT_1 [L217] input_134 = __VERIFIER_nondet_uchar() [L218] input_134 = input_134 & mask_SORT_1 [L219] input_136 = __VERIFIER_nondet_uchar() [L220] input_136 = input_136 & mask_SORT_1 [L221] input_138 = __VERIFIER_nondet_uchar() [L222] input_138 = input_138 & mask_SORT_1 [L223] input_140 = __VERIFIER_nondet_uchar() [L224] input_140 = input_140 & mask_SORT_1 [L225] input_142 = __VERIFIER_nondet_uchar() [L226] input_142 = input_142 & mask_SORT_1 [L227] input_144 = __VERIFIER_nondet_uchar() [L228] input_144 = input_144 & mask_SORT_1 [L229] input_146 = __VERIFIER_nondet_uchar() [L230] input_146 = input_146 & mask_SORT_1 [L231] input_148 = __VERIFIER_nondet_uchar() [L232] input_148 = input_148 & mask_SORT_1 [L233] input_150 = __VERIFIER_nondet_uchar() [L234] input_150 = input_150 & mask_SORT_1 [L235] input_152 = __VERIFIER_nondet_uchar() [L236] input_152 = input_152 & mask_SORT_1 [L237] input_154 = __VERIFIER_nondet_uchar() [L238] input_154 = input_154 & mask_SORT_1 [L239] input_156 = __VERIFIER_nondet_uchar() [L240] input_156 = input_156 & mask_SORT_1 [L241] input_158 = __VERIFIER_nondet_uchar() [L242] input_158 = input_158 & mask_SORT_1 [L243] input_162 = __VERIFIER_nondet_uchar() [L244] input_162 = input_162 & mask_SORT_1 [L245] input_164 = __VERIFIER_nondet_uchar() [L246] input_164 = input_164 & mask_SORT_1 [L247] input_176 = __VERIFIER_nondet_uchar() [L248] input_176 = input_176 & mask_SORT_1 [L249] input_179 = __VERIFIER_nondet_uchar() [L250] input_179 = input_179 & mask_SORT_1 [L251] input_196 = __VERIFIER_nondet_uchar() [L252] input_196 = input_196 & mask_SORT_1 [L253] input_214 = __VERIFIER_nondet_uchar() [L254] input_225 = __VERIFIER_nondet_uchar() [L255] input_225 = input_225 & mask_SORT_1 [L256] input_228 = __VERIFIER_nondet_uchar() [L257] input_228 = input_228 & mask_SORT_1 [L258] input_231 = __VERIFIER_nondet_uchar() [L259] input_231 = input_231 & mask_SORT_1 [L260] input_240 = __VERIFIER_nondet_uchar() [L261] input_240 = input_240 & mask_SORT_1 [L262] input_243 = __VERIFIER_nondet_uchar() [L263] input_243 = input_243 & mask_SORT_1 [L264] input_261 = __VERIFIER_nondet_uchar() [L265] input_261 = input_261 & mask_SORT_1 [L266] input_276 = __VERIFIER_nondet_uchar() [L267] input_287 = __VERIFIER_nondet_uchar() [L268] input_287 = input_287 & mask_SORT_1 [L269] input_290 = __VERIFIER_nondet_uchar() [L270] input_290 = input_290 & mask_SORT_1 [L271] input_293 = __VERIFIER_nondet_uchar() [L272] input_293 = input_293 & mask_SORT_1 [L273] input_302 = __VERIFIER_nondet_uchar() [L274] input_302 = input_302 & mask_SORT_1 [L275] input_305 = __VERIFIER_nondet_uchar() [L276] input_305 = input_305 & mask_SORT_1 [L277] input_325 = __VERIFIER_nondet_uchar() [L278] input_325 = input_325 & mask_SORT_1 [L279] input_340 = __VERIFIER_nondet_uchar() [L280] input_351 = __VERIFIER_nondet_uchar() [L281] input_351 = input_351 & mask_SORT_1 [L284] SORT_1 var_65_arg_0 = state_31; [L285] SORT_1 var_65_arg_1 = ~state_33; [L286] var_65_arg_1 = var_65_arg_1 & mask_SORT_1 [L287] SORT_1 var_65 = var_65_arg_0 & var_65_arg_1; [L288] SORT_1 var_66_arg_0 = var_65; [L289] SORT_1 var_66_arg_1 = ~state_35; [L290] var_66_arg_1 = var_66_arg_1 & mask_SORT_1 [L291] SORT_1 var_66 = var_66_arg_0 & var_66_arg_1; [L292] SORT_1 var_67_arg_0 = var_66; [L293] SORT_1 var_67_arg_1 = ~state_37; [L294] var_67_arg_1 = var_67_arg_1 & mask_SORT_1 [L295] SORT_1 var_67 = var_67_arg_0 & var_67_arg_1; [L296] SORT_1 var_68_arg_0 = var_67; [L297] SORT_1 var_68_arg_1 = ~state_39; [L298] var_68_arg_1 = var_68_arg_1 & mask_SORT_1 [L299] SORT_1 var_68 = var_68_arg_0 & var_68_arg_1; [L300] SORT_1 var_69_arg_0 = var_68; [L301] SORT_1 var_69_arg_1 = state_41; [L302] SORT_1 var_69 = var_69_arg_0 & var_69_arg_1; [L303] SORT_1 var_70_arg_0 = var_69; [L304] SORT_1 var_70_arg_1 = ~state_43; [L305] var_70_arg_1 = var_70_arg_1 & mask_SORT_1 [L306] SORT_1 var_70 = var_70_arg_0 & var_70_arg_1; [L307] SORT_1 var_71_arg_0 = var_70; [L308] SORT_1 var_71_arg_1 = ~state_45; [L309] var_71_arg_1 = var_71_arg_1 & mask_SORT_1 [L310] SORT_1 var_71 = var_71_arg_0 & var_71_arg_1; [L311] SORT_1 var_72_arg_0 = var_71; [L312] SORT_1 var_72_arg_1 = ~state_47; [L313] var_72_arg_1 = var_72_arg_1 & mask_SORT_1 [L314] SORT_1 var_72 = var_72_arg_0 & var_72_arg_1; [L315] SORT_1 var_73_arg_0 = var_72; [L316] SORT_1 var_73_arg_1 = ~state_49; [L317] var_73_arg_1 = var_73_arg_1 & mask_SORT_1 [L318] SORT_1 var_73 = var_73_arg_0 & var_73_arg_1; [L319] SORT_1 var_74_arg_0 = var_73; [L320] SORT_1 var_74_arg_1 = state_51; [L321] SORT_1 var_74 = var_74_arg_0 & var_74_arg_1; [L322] SORT_1 var_75_arg_0 = var_74; [L323] SORT_1 var_75_arg_1 = ~state_53; [L324] var_75_arg_1 = var_75_arg_1 & mask_SORT_1 [L325] SORT_1 var_75 = var_75_arg_0 & var_75_arg_1; [L326] SORT_1 var_76_arg_0 = var_75; [L327] SORT_1 var_76_arg_1 = ~state_55; [L328] var_76_arg_1 = var_76_arg_1 & mask_SORT_1 [L329] SORT_1 var_76 = var_76_arg_0 & var_76_arg_1; [L330] SORT_1 var_77_arg_0 = var_76; [L331] SORT_1 var_77_arg_1 = ~state_57; [L332] var_77_arg_1 = var_77_arg_1 & mask_SORT_1 [L333] SORT_1 var_77 = var_77_arg_0 & var_77_arg_1; [L334] SORT_1 var_78_arg_0 = var_77; [L335] SORT_1 var_78_arg_1 = ~state_59; [L336] var_78_arg_1 = var_78_arg_1 & mask_SORT_1 [L337] SORT_1 var_78 = var_78_arg_0 & var_78_arg_1; [L338] SORT_2 var_80_arg_0 = var_79; [L339] SORT_2 var_80_arg_1 = state_6; [L340] SORT_1 var_80 = var_80_arg_0 == var_80_arg_1; [L341] SORT_1 var_81_arg_0 = var_78; [L342] SORT_1 var_81_arg_1 = var_80; [L343] SORT_1 var_81 = var_81_arg_0 & var_81_arg_1; [L344] SORT_2 var_82_arg_0 = var_79; [L345] SORT_2 var_82_arg_1 = state_8; [L346] SORT_1 var_82 = var_82_arg_0 == var_82_arg_1; [L347] SORT_1 var_83_arg_0 = var_81; [L348] SORT_1 var_83_arg_1 = var_82; [L349] SORT_1 var_83 = var_83_arg_0 & var_83_arg_1; [L350] SORT_2 var_84_arg_0 = var_79; [L351] SORT_2 var_84_arg_1 = state_10; [L352] SORT_1 var_84 = var_84_arg_0 == var_84_arg_1; [L353] SORT_1 var_85_arg_0 = var_83; [L354] SORT_1 var_85_arg_1 = var_84; [L355] SORT_1 var_85 = var_85_arg_0 & var_85_arg_1; [L356] SORT_2 var_86_arg_0 = var_79; [L357] SORT_2 var_86_arg_1 = state_12; [L358] SORT_1 var_86 = var_86_arg_0 == var_86_arg_1; [L359] SORT_1 var_87_arg_0 = var_85; [L360] SORT_1 var_87_arg_1 = var_86; [L361] SORT_1 var_87 = var_87_arg_0 & var_87_arg_1; [L362] SORT_2 var_88_arg_0 = var_79; [L363] SORT_2 var_88_arg_1 = state_14; [L364] SORT_1 var_88 = var_88_arg_0 == var_88_arg_1; [L365] SORT_1 var_89_arg_0 = var_87; [L366] SORT_1 var_89_arg_1 = var_88; [L367] SORT_1 var_89 = var_89_arg_0 & var_89_arg_1; [L368] SORT_2 var_90_arg_0 = var_79; [L369] SORT_2 var_90_arg_1 = state_16; [L370] SORT_1 var_90 = var_90_arg_0 == var_90_arg_1; [L371] SORT_1 var_91_arg_0 = var_89; [L372] SORT_1 var_91_arg_1 = var_90; [L373] SORT_1 var_91 = var_91_arg_0 & var_91_arg_1; [L374] SORT_2 var_92_arg_0 = var_79; [L375] SORT_2 var_92_arg_1 = state_18; [L376] SORT_1 var_92 = var_92_arg_0 == var_92_arg_1; [L377] SORT_1 var_93_arg_0 = var_91; [L378] SORT_1 var_93_arg_1 = var_92; [L379] SORT_1 var_93 = var_93_arg_0 & var_93_arg_1; [L380] SORT_2 var_94_arg_0 = var_79; [L381] SORT_2 var_94_arg_1 = state_20; [L382] SORT_1 var_94 = var_94_arg_0 == var_94_arg_1; [L383] SORT_1 var_95_arg_0 = var_93; [L384] SORT_1 var_95_arg_1 = var_94; [L385] SORT_1 var_95 = var_95_arg_0 & var_95_arg_1; [L386] SORT_2 var_96_arg_0 = var_79; [L387] SORT_2 var_96_arg_1 = state_22; [L388] SORT_1 var_96 = var_96_arg_0 == var_96_arg_1; [L389] SORT_1 var_97_arg_0 = var_95; [L390] SORT_1 var_97_arg_1 = var_96; [L391] SORT_1 var_97 = var_97_arg_0 & var_97_arg_1; [L392] SORT_2 var_98_arg_0 = var_79; [L393] SORT_2 var_98_arg_1 = state_24; [L394] SORT_1 var_98 = var_98_arg_0 == var_98_arg_1; [L395] SORT_1 var_99_arg_0 = var_97; [L396] SORT_1 var_99_arg_1 = var_98; [L397] SORT_1 var_99 = var_99_arg_0 & var_99_arg_1; [L398] SORT_2 var_100_arg_0 = var_79; [L399] SORT_2 var_100_arg_1 = state_26; [L400] SORT_1 var_100 = var_100_arg_0 == var_100_arg_1; [L401] SORT_1 var_101_arg_0 = var_99; [L402] SORT_1 var_101_arg_1 = var_100; [L403] SORT_1 var_101 = var_101_arg_0 & var_101_arg_1; [L404] SORT_2 var_102_arg_0 = var_79; [L405] SORT_2 var_102_arg_1 = state_28; [L406] SORT_1 var_102 = var_102_arg_0 == var_102_arg_1; [L407] SORT_1 var_103_arg_0 = var_101; [L408] SORT_1 var_103_arg_1 = var_102; [L409] SORT_1 var_103 = var_103_arg_0 & var_103_arg_1; [L410] SORT_1 var_104_arg_0 = state_63; [L411] SORT_1 var_104_arg_1 = var_103; [L412] SORT_1 var_104 = var_104_arg_0 & var_104_arg_1; [L413] var_104 = var_104 & mask_SORT_1 [L414] SORT_1 bad_105_arg_0 = var_104; [L415] CALL __VERIFIER_assert(!(bad_105_arg_0)) [L20] COND TRUE !(cond) VAL [\old(cond)=0, cond=0] [L20] reach_error() VAL [\old(cond)=0, cond=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 7 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 676.7s, OverallIterations: 2, TraceHistogramMax: 2, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 6.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 2 mSolverCounterUnknown, 3 SdHoareTripleChecker+Valid, 5.9s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 3 mSDsluCounter, 6 SdHoareTripleChecker+Invalid, 5.8s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 5 mSDsCounter, 1 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 6 IncrementalHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 1 mSolverCounterUnsat, 2 mSDtfsCounter, 6 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=8occurred in iteration=1, InterpolantAutomatonStates: 5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 1 MinimizatonAttempts, 1 StatesRemovedByMinimization, 1 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 302.0s SatisfiabilityAnalysisTime, 4.8s InterpolantComputationTime, 11 NumberOfCodeBlocks, 11 NumberOfCodeBlocksAsserted, 2 NumberOfCheckSat, 3 ConstructedInterpolants, 0 QuantifiedInterpolants, 8 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 1 InterpolantComputations, 1 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2022-11-03 03:05:13,565 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.peterson.3.prop1-back-serstep.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 34706d6ed7dc5457e6baaed7dcfb04a35fb2715043d8576caf0678232a84ae10 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-5e519f3 [2022-11-03 03:05:16,068 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-03 03:05:16,071 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-03 03:05:16,103 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-03 03:05:16,104 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-03 03:05:16,105 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-03 03:05:16,107 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-03 03:05:16,109 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-03 03:05:16,111 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-03 03:05:16,112 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-03 03:05:16,114 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-03 03:05:16,115 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-03 03:05:16,116 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-03 03:05:16,117 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-03 03:05:16,118 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-03 03:05:16,119 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-03 03:05:16,120 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-03 03:05:16,122 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-03 03:05:16,123 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-03 03:05:16,126 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-03 03:05:16,127 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-03 03:05:16,129 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-03 03:05:16,130 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-03 03:05:16,132 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-03 03:05:16,136 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-03 03:05:16,136 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-03 03:05:16,137 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-03 03:05:16,138 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-03 03:05:16,138 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-03 03:05:16,140 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-03 03:05:16,140 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-03 03:05:16,141 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-03 03:05:16,142 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-03 03:05:16,143 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-03 03:05:16,144 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-03 03:05:16,145 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-03 03:05:16,146 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-03 03:05:16,146 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-03 03:05:16,146 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-03 03:05:16,147 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-03 03:05:16,148 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-03 03:05:16,149 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Bitvector.epf [2022-11-03 03:05:16,190 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-03 03:05:16,190 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-03 03:05:16,190 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-03 03:05:16,191 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-03 03:05:16,191 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-03 03:05:16,192 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-03 03:05:16,192 INFO L138 SettingsManager]: * User list type=DISABLED [2022-11-03 03:05:16,192 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-11-03 03:05:16,192 INFO L138 SettingsManager]: * Explicit value domain=true [2022-11-03 03:05:16,192 INFO L138 SettingsManager]: * Octagon Domain=false [2022-11-03 03:05:16,193 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-11-03 03:05:16,193 INFO L138 SettingsManager]: * Interval Domain=false [2022-11-03 03:05:16,194 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-03 03:05:16,194 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-03 03:05:16,194 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-03 03:05:16,194 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-03 03:05:16,194 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-03 03:05:16,195 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-11-03 03:05:16,195 INFO L138 SettingsManager]: * Use bitvectors instead of ints=true [2022-11-03 03:05:16,195 INFO L138 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2022-11-03 03:05:16,195 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-03 03:05:16,195 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-03 03:05:16,196 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-03 03:05:16,196 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-03 03:05:16,196 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-03 03:05:16,196 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-03 03:05:16,196 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 03:05:16,197 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-03 03:05:16,197 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-03 03:05:16,197 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-03 03:05:16,197 INFO L138 SettingsManager]: * Trace refinement strategy=WALRUS [2022-11-03 03:05:16,198 INFO L138 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2022-11-03 03:05:16,198 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-03 03:05:16,198 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-11-03 03:05:16,198 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-11-03 03:05:16,202 INFO L138 SettingsManager]: * Logic for external solver=AUFBV WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 34706d6ed7dc5457e6baaed7dcfb04a35fb2715043d8576caf0678232a84ae10 [2022-11-03 03:05:16,695 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-03 03:05:16,722 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-03 03:05:16,725 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-03 03:05:16,727 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-03 03:05:16,728 INFO L275 PluginConnector]: CDTParser initialized [2022-11-03 03:05:16,731 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.peterson.3.prop1-back-serstep.c [2022-11-03 03:05:16,810 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/data/2c8c1dca6/459890e227cf4f319d5ce0a52cc8df99/FLAG029b04857 [2022-11-03 03:05:17,709 INFO L306 CDTParser]: Found 1 translation units. [2022-11-03 03:05:17,710 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.peterson.3.prop1-back-serstep.c [2022-11-03 03:05:17,727 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/data/2c8c1dca6/459890e227cf4f319d5ce0a52cc8df99/FLAG029b04857 [2022-11-03 03:05:17,844 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/data/2c8c1dca6/459890e227cf4f319d5ce0a52cc8df99 [2022-11-03 03:05:17,847 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-03 03:05:17,854 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-03 03:05:17,856 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-03 03:05:17,856 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-03 03:05:17,861 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-03 03:05:17,862 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 03:05:17" (1/1) ... [2022-11-03 03:05:17,864 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5c91c76d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:05:17, skipping insertion in model container [2022-11-03 03:05:17,864 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 03:05:17" (1/1) ... [2022-11-03 03:05:17,873 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-03 03:05:17,948 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-03 03:05:18,179 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.peterson.3.prop1-back-serstep.c[1014,1027] [2022-11-03 03:05:18,625 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 03:05:18,630 INFO L203 MainTranslator]: Completed pre-run [2022-11-03 03:05:18,644 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.peterson.3.prop1-back-serstep.c[1014,1027] [2022-11-03 03:05:18,808 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 03:05:18,823 INFO L208 MainTranslator]: Completed translation [2022-11-03 03:05:18,824 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:05:18 WrapperNode [2022-11-03 03:05:18,824 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-03 03:05:18,826 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-03 03:05:18,826 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-03 03:05:18,826 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-03 03:05:18,835 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:05:18" (1/1) ... [2022-11-03 03:05:18,880 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:05:18" (1/1) ... [2022-11-03 03:05:19,006 INFO L138 Inliner]: procedures = 11, calls = 3, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1951 [2022-11-03 03:05:19,016 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-03 03:05:19,017 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-03 03:05:19,017 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-03 03:05:19,017 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-03 03:05:19,028 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:05:18" (1/1) ... [2022-11-03 03:05:19,028 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:05:18" (1/1) ... [2022-11-03 03:05:19,045 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:05:18" (1/1) ... [2022-11-03 03:05:19,045 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:05:18" (1/1) ... [2022-11-03 03:05:19,094 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:05:18" (1/1) ... [2022-11-03 03:05:19,104 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:05:18" (1/1) ... [2022-11-03 03:05:19,113 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:05:18" (1/1) ... [2022-11-03 03:05:19,122 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:05:18" (1/1) ... [2022-11-03 03:05:19,139 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-03 03:05:19,141 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-03 03:05:19,141 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-03 03:05:19,141 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-03 03:05:19,142 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:05:18" (1/1) ... [2022-11-03 03:05:19,151 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 03:05:19,167 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:05:19,182 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-03 03:05:19,232 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-03 03:05:19,267 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-03 03:05:19,267 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-03 03:05:19,854 INFO L235 CfgBuilder]: Building ICFG [2022-11-03 03:05:19,857 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-03 03:05:21,582 INFO L276 CfgBuilder]: Performing block encoding [2022-11-03 03:05:21,595 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-03 03:05:21,596 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-03 03:05:21,600 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 03:05:21 BoogieIcfgContainer [2022-11-03 03:05:21,600 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-03 03:05:21,605 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-03 03:05:21,605 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-03 03:05:21,609 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-03 03:05:21,610 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 03.11 03:05:17" (1/3) ... [2022-11-03 03:05:21,611 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@11dfa3b2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 03:05:21, skipping insertion in model container [2022-11-03 03:05:21,612 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:05:18" (2/3) ... [2022-11-03 03:05:21,613 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@11dfa3b2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 03:05:21, skipping insertion in model container [2022-11-03 03:05:21,613 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 03:05:21" (3/3) ... [2022-11-03 03:05:21,615 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.peterson.3.prop1-back-serstep.c [2022-11-03 03:05:21,639 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-03 03:05:21,639 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-03 03:05:21,740 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-03 03:05:21,750 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@3b9d75ac, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-03 03:05:21,751 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-03 03:05:21,756 INFO L276 IsEmpty]: Start isEmpty. Operand has 97 states, 95 states have (on average 1.4947368421052631) internal successors, (142), 96 states have internal predecessors, (142), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:21,763 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2022-11-03 03:05:21,764 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:05:21,765 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2022-11-03 03:05:21,766 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:05:21,774 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:05:21,775 INFO L85 PathProgramCache]: Analyzing trace with hash 28698761, now seen corresponding path program 1 times [2022-11-03 03:05:21,794 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:05:21,794 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1532087742] [2022-11-03 03:05:21,795 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:05:21,795 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:05:21,796 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:05:21,802 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:05:21,813 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (2)] Waiting until timeout for monitored process [2022-11-03 03:05:22,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:05:22,397 INFO L263 TraceCheckSpWp]: Trace formula consists of 251 conjuncts, 10 conjunts are in the unsatisfiable core [2022-11-03 03:05:22,409 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:05:22,515 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:05:22,516 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:05:22,517 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:05:22,519 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1532087742] [2022-11-03 03:05:22,520 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1532087742] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:05:22,520 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:05:22,521 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-03 03:05:22,523 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2082336430] [2022-11-03 03:05:22,524 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:05:22,532 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 03:05:22,532 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:05:22,572 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 03:05:22,573 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 03:05:22,576 INFO L87 Difference]: Start difference. First operand has 97 states, 95 states have (on average 1.4947368421052631) internal successors, (142), 96 states have internal predecessors, (142), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:23,083 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:05:23,083 INFO L93 Difference]: Finished difference Result 278 states and 417 transitions. [2022-11-03 03:05:23,087 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-03 03:05:23,088 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 5 [2022-11-03 03:05:23,089 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:05:23,118 INFO L225 Difference]: With dead ends: 278 [2022-11-03 03:05:23,118 INFO L226 Difference]: Without dead ends: 183 [2022-11-03 03:05:23,131 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-03 03:05:23,135 INFO L413 NwaCegarLoop]: 117 mSDtfsCounter, 262 mSDsluCounter, 248 mSDsCounter, 0 mSdLazyCounter, 43 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 262 SdHoareTripleChecker+Valid, 365 SdHoareTripleChecker+Invalid, 43 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 43 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-11-03 03:05:23,137 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [262 Valid, 365 Invalid, 43 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 43 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-11-03 03:05:23,159 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 183 states. [2022-11-03 03:05:23,203 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 183 to 95. [2022-11-03 03:05:23,207 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 95 states, 94 states have (on average 1.4680851063829787) internal successors, (138), 94 states have internal predecessors, (138), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:23,209 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 138 transitions. [2022-11-03 03:05:23,210 INFO L78 Accepts]: Start accepts. Automaton has 95 states and 138 transitions. Word has length 5 [2022-11-03 03:05:23,211 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:05:23,211 INFO L495 AbstractCegarLoop]: Abstraction has 95 states and 138 transitions. [2022-11-03 03:05:23,211 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:23,212 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 138 transitions. [2022-11-03 03:05:23,215 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2022-11-03 03:05:23,215 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:05:23,216 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:05:23,236 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (2)] Forceful destruction successful, exit code 0 [2022-11-03 03:05:23,433 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:05:23,434 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:05:23,435 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:05:23,436 INFO L85 PathProgramCache]: Analyzing trace with hash -2079681341, now seen corresponding path program 1 times [2022-11-03 03:05:23,440 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:05:23,442 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1638046978] [2022-11-03 03:05:23,443 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:05:23,443 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:05:23,443 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:05:23,445 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:05:23,453 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (3)] Waiting until timeout for monitored process [2022-11-03 03:05:24,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:05:24,712 INFO L263 TraceCheckSpWp]: Trace formula consists of 1696 conjuncts, 12 conjunts are in the unsatisfiable core [2022-11-03 03:05:24,730 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:05:25,015 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:05:25,016 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:05:25,016 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:05:25,017 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1638046978] [2022-11-03 03:05:25,017 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1638046978] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:05:25,017 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:05:25,017 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-11-03 03:05:25,018 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [887790144] [2022-11-03 03:05:25,018 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:05:25,020 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-03 03:05:25,020 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:05:25,021 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-03 03:05:25,021 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2022-11-03 03:05:25,021 INFO L87 Difference]: Start difference. First operand 95 states and 138 transitions. Second operand has 7 states, 7 states have (on average 13.428571428571429) internal successors, (94), 7 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:25,969 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:05:25,969 INFO L93 Difference]: Finished difference Result 370 states and 541 transitions. [2022-11-03 03:05:25,970 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-03 03:05:25,970 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 13.428571428571429) internal successors, (94), 7 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 94 [2022-11-03 03:05:25,970 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:05:25,972 INFO L225 Difference]: With dead ends: 370 [2022-11-03 03:05:25,972 INFO L226 Difference]: Without dead ends: 279 [2022-11-03 03:05:25,973 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 99 GetRequests, 88 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=56, Invalid=100, Unknown=0, NotChecked=0, Total=156 [2022-11-03 03:05:25,975 INFO L413 NwaCegarLoop]: 118 mSDtfsCounter, 1146 mSDsluCounter, 355 mSDsCounter, 0 mSdLazyCounter, 124 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1146 SdHoareTripleChecker+Valid, 473 SdHoareTripleChecker+Invalid, 127 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 124 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-11-03 03:05:25,976 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1146 Valid, 473 Invalid, 127 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 124 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-11-03 03:05:25,977 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 279 states. [2022-11-03 03:05:25,985 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 279 to 97. [2022-11-03 03:05:25,986 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 97 states, 96 states have (on average 1.4583333333333333) internal successors, (140), 96 states have internal predecessors, (140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:25,986 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 140 transitions. [2022-11-03 03:05:25,987 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 140 transitions. Word has length 94 [2022-11-03 03:05:25,987 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:05:25,987 INFO L495 AbstractCegarLoop]: Abstraction has 97 states and 140 transitions. [2022-11-03 03:05:25,988 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 13.428571428571429) internal successors, (94), 7 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:25,988 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 140 transitions. [2022-11-03 03:05:25,990 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2022-11-03 03:05:25,990 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:05:25,991 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:05:26,026 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (3)] Forceful destruction successful, exit code 0 [2022-11-03 03:05:26,216 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:05:26,217 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:05:26,217 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:05:26,217 INFO L85 PathProgramCache]: Analyzing trace with hash 1157447877, now seen corresponding path program 1 times [2022-11-03 03:05:26,221 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:05:26,222 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [541385852] [2022-11-03 03:05:26,222 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:05:26,222 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:05:26,222 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:05:26,224 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:05:26,235 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (4)] Waiting until timeout for monitored process [2022-11-03 03:05:27,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:05:27,361 INFO L263 TraceCheckSpWp]: Trace formula consists of 1696 conjuncts, 17 conjunts are in the unsatisfiable core [2022-11-03 03:05:27,382 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:05:27,694 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:05:27,695 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:05:27,695 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:05:27,695 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [541385852] [2022-11-03 03:05:27,696 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [541385852] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:05:27,696 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:05:27,696 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-11-03 03:05:27,696 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [141704916] [2022-11-03 03:05:27,696 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:05:27,697 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-03 03:05:27,697 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:05:27,698 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-03 03:05:27,698 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2022-11-03 03:05:27,698 INFO L87 Difference]: Start difference. First operand 97 states and 140 transitions. Second operand has 7 states, 7 states have (on average 13.428571428571429) internal successors, (94), 7 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:28,254 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:05:28,255 INFO L93 Difference]: Finished difference Result 299 states and 434 transitions. [2022-11-03 03:05:28,256 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-03 03:05:28,256 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 13.428571428571429) internal successors, (94), 7 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 94 [2022-11-03 03:05:28,256 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:05:28,257 INFO L225 Difference]: With dead ends: 299 [2022-11-03 03:05:28,257 INFO L226 Difference]: Without dead ends: 206 [2022-11-03 03:05:28,258 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 88 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2022-11-03 03:05:28,259 INFO L413 NwaCegarLoop]: 146 mSDtfsCounter, 151 mSDsluCounter, 591 mSDsCounter, 0 mSdLazyCounter, 111 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 151 SdHoareTripleChecker+Valid, 737 SdHoareTripleChecker+Invalid, 141 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 111 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 27 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-11-03 03:05:28,259 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [151 Valid, 737 Invalid, 141 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 111 Invalid, 0 Unknown, 27 Unchecked, 0.5s Time] [2022-11-03 03:05:28,260 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206 states. [2022-11-03 03:05:28,270 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206 to 111. [2022-11-03 03:05:28,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 111 states, 110 states have (on average 1.4454545454545455) internal successors, (159), 110 states have internal predecessors, (159), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:28,277 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 159 transitions. [2022-11-03 03:05:28,279 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 159 transitions. Word has length 94 [2022-11-03 03:05:28,280 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:05:28,280 INFO L495 AbstractCegarLoop]: Abstraction has 111 states and 159 transitions. [2022-11-03 03:05:28,280 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 13.428571428571429) internal successors, (94), 7 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:28,281 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 159 transitions. [2022-11-03 03:05:28,282 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2022-11-03 03:05:28,286 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:05:28,286 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:05:28,320 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (4)] Forceful destruction successful, exit code 0 [2022-11-03 03:05:28,511 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:05:28,512 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:05:28,512 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:05:28,512 INFO L85 PathProgramCache]: Analyzing trace with hash 1397687623, now seen corresponding path program 1 times [2022-11-03 03:05:28,515 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:05:28,516 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [199384151] [2022-11-03 03:05:28,516 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:05:28,516 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:05:28,516 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:05:28,517 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:05:28,546 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (5)] Waiting until timeout for monitored process [2022-11-03 03:05:29,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:05:29,454 INFO L263 TraceCheckSpWp]: Trace formula consists of 1696 conjuncts, 10 conjunts are in the unsatisfiable core [2022-11-03 03:05:29,467 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:05:29,648 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:05:29,648 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:05:29,649 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:05:29,649 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [199384151] [2022-11-03 03:05:29,649 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [199384151] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:05:29,649 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:05:29,650 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-11-03 03:05:29,650 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1516384530] [2022-11-03 03:05:29,650 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:05:29,651 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-03 03:05:29,651 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:05:29,651 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-03 03:05:29,651 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2022-11-03 03:05:29,652 INFO L87 Difference]: Start difference. First operand 111 states and 159 transitions. Second operand has 7 states, 7 states have (on average 13.428571428571429) internal successors, (94), 7 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:30,342 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:05:30,342 INFO L93 Difference]: Finished difference Result 417 states and 604 transitions. [2022-11-03 03:05:30,346 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-03 03:05:30,347 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 13.428571428571429) internal successors, (94), 7 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 94 [2022-11-03 03:05:30,347 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:05:30,349 INFO L225 Difference]: With dead ends: 417 [2022-11-03 03:05:30,349 INFO L226 Difference]: Without dead ends: 324 [2022-11-03 03:05:30,350 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 100 GetRequests, 88 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=64, Invalid=118, Unknown=0, NotChecked=0, Total=182 [2022-11-03 03:05:30,351 INFO L413 NwaCegarLoop]: 143 mSDtfsCounter, 859 mSDsluCounter, 549 mSDsCounter, 0 mSdLazyCounter, 167 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 859 SdHoareTripleChecker+Valid, 692 SdHoareTripleChecker+Invalid, 176 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 167 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-11-03 03:05:30,351 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [859 Valid, 692 Invalid, 176 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 167 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-11-03 03:05:30,352 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 324 states. [2022-11-03 03:05:30,360 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 324 to 117. [2022-11-03 03:05:30,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 117 states, 116 states have (on average 1.4396551724137931) internal successors, (167), 116 states have internal predecessors, (167), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:30,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 167 transitions. [2022-11-03 03:05:30,361 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 167 transitions. Word has length 94 [2022-11-03 03:05:30,362 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:05:30,362 INFO L495 AbstractCegarLoop]: Abstraction has 117 states and 167 transitions. [2022-11-03 03:05:30,362 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 13.428571428571429) internal successors, (94), 7 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:30,363 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 167 transitions. [2022-11-03 03:05:30,364 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2022-11-03 03:05:30,364 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:05:30,364 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:05:30,395 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (5)] Forceful destruction successful, exit code 0 [2022-11-03 03:05:30,586 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:05:30,587 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:05:30,587 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:05:30,587 INFO L85 PathProgramCache]: Analyzing trace with hash 980291017, now seen corresponding path program 1 times [2022-11-03 03:05:30,589 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:05:30,589 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1527404750] [2022-11-03 03:05:30,589 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:05:30,589 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:05:30,590 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:05:30,590 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:05:30,592 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (6)] Waiting until timeout for monitored process [2022-11-03 03:05:31,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:05:31,495 INFO L263 TraceCheckSpWp]: Trace formula consists of 1696 conjuncts, 17 conjunts are in the unsatisfiable core [2022-11-03 03:05:31,507 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:05:32,064 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:05:32,065 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:05:32,065 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:05:32,066 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1527404750] [2022-11-03 03:05:32,066 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1527404750] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:05:32,066 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:05:32,067 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-11-03 03:05:32,074 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1401429527] [2022-11-03 03:05:32,074 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:05:32,075 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-03 03:05:32,075 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:05:32,075 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-03 03:05:32,076 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2022-11-03 03:05:32,076 INFO L87 Difference]: Start difference. First operand 117 states and 167 transitions. Second operand has 7 states, 7 states have (on average 13.428571428571429) internal successors, (94), 7 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:32,716 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:05:32,716 INFO L93 Difference]: Finished difference Result 356 states and 513 transitions. [2022-11-03 03:05:32,720 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-03 03:05:32,720 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 13.428571428571429) internal successors, (94), 7 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 94 [2022-11-03 03:05:32,721 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:05:32,723 INFO L225 Difference]: With dead ends: 356 [2022-11-03 03:05:32,724 INFO L226 Difference]: Without dead ends: 257 [2022-11-03 03:05:32,725 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 88 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2022-11-03 03:05:32,726 INFO L413 NwaCegarLoop]: 169 mSDtfsCounter, 161 mSDsluCounter, 654 mSDsCounter, 0 mSdLazyCounter, 138 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 161 SdHoareTripleChecker+Valid, 823 SdHoareTripleChecker+Invalid, 178 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 138 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 37 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-11-03 03:05:32,730 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [161 Valid, 823 Invalid, 178 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 138 Invalid, 0 Unknown, 37 Unchecked, 0.5s Time] [2022-11-03 03:05:32,731 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 257 states. [2022-11-03 03:05:32,738 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 257 to 155. [2022-11-03 03:05:32,738 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 155 states, 154 states have (on average 1.4350649350649352) internal successors, (221), 154 states have internal predecessors, (221), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:32,739 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 221 transitions. [2022-11-03 03:05:32,739 INFO L78 Accepts]: Start accepts. Automaton has 155 states and 221 transitions. Word has length 94 [2022-11-03 03:05:32,740 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:05:32,740 INFO L495 AbstractCegarLoop]: Abstraction has 155 states and 221 transitions. [2022-11-03 03:05:32,740 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 13.428571428571429) internal successors, (94), 7 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:32,740 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 221 transitions. [2022-11-03 03:05:32,742 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2022-11-03 03:05:32,742 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:05:32,742 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:05:32,763 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (6)] Forceful destruction successful, exit code 0 [2022-11-03 03:05:32,950 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:05:32,951 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:05:32,951 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:05:32,951 INFO L85 PathProgramCache]: Analyzing trace with hash 1540990795, now seen corresponding path program 1 times [2022-11-03 03:05:32,953 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:05:32,953 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [770342423] [2022-11-03 03:05:32,953 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:05:32,953 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:05:32,953 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:05:32,955 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:05:32,963 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (7)] Waiting until timeout for monitored process [2022-11-03 03:05:33,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:05:33,887 INFO L263 TraceCheckSpWp]: Trace formula consists of 1696 conjuncts, 10 conjunts are in the unsatisfiable core [2022-11-03 03:05:33,898 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:05:34,223 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:05:34,224 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:05:34,224 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:05:34,224 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [770342423] [2022-11-03 03:05:34,224 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [770342423] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:05:34,224 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:05:34,225 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-11-03 03:05:34,225 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [64953863] [2022-11-03 03:05:34,226 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:05:34,227 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-03 03:05:34,227 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:05:34,227 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-03 03:05:34,228 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2022-11-03 03:05:34,228 INFO L87 Difference]: Start difference. First operand 155 states and 221 transitions. Second operand has 7 states, 7 states have (on average 13.428571428571429) internal successors, (94), 7 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:34,914 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:05:34,915 INFO L93 Difference]: Finished difference Result 485 states and 699 transitions. [2022-11-03 03:05:34,915 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-03 03:05:34,915 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 13.428571428571429) internal successors, (94), 7 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 94 [2022-11-03 03:05:34,916 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:05:34,917 INFO L225 Difference]: With dead ends: 485 [2022-11-03 03:05:34,917 INFO L226 Difference]: Without dead ends: 386 [2022-11-03 03:05:34,918 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 100 GetRequests, 88 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=64, Invalid=118, Unknown=0, NotChecked=0, Total=182 [2022-11-03 03:05:34,919 INFO L413 NwaCegarLoop]: 170 mSDtfsCounter, 809 mSDsluCounter, 656 mSDsCounter, 0 mSdLazyCounter, 183 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 809 SdHoareTripleChecker+Valid, 826 SdHoareTripleChecker+Invalid, 192 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 183 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-11-03 03:05:34,919 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [809 Valid, 826 Invalid, 192 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 183 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-11-03 03:05:34,920 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 386 states. [2022-11-03 03:05:34,938 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 386 to 161. [2022-11-03 03:05:34,940 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 161 states, 160 states have (on average 1.43125) internal successors, (229), 160 states have internal predecessors, (229), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:34,941 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 229 transitions. [2022-11-03 03:05:34,947 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 229 transitions. Word has length 94 [2022-11-03 03:05:34,947 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:05:34,948 INFO L495 AbstractCegarLoop]: Abstraction has 161 states and 229 transitions. [2022-11-03 03:05:34,948 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 13.428571428571429) internal successors, (94), 7 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:34,948 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 229 transitions. [2022-11-03 03:05:34,949 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2022-11-03 03:05:34,949 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:05:34,950 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:05:34,974 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (7)] Forceful destruction successful, exit code 0 [2022-11-03 03:05:35,150 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:05:35,150 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:05:35,151 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:05:35,151 INFO L85 PathProgramCache]: Analyzing trace with hash 643597517, now seen corresponding path program 1 times [2022-11-03 03:05:35,153 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:05:35,153 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [133471450] [2022-11-03 03:05:35,153 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:05:35,153 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:05:35,153 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:05:35,155 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:05:35,159 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (8)] Waiting until timeout for monitored process [2022-11-03 03:05:35,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:05:35,987 INFO L263 TraceCheckSpWp]: Trace formula consists of 1696 conjuncts, 9 conjunts are in the unsatisfiable core [2022-11-03 03:05:35,995 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:05:36,132 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:05:36,132 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:05:36,132 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:05:36,133 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [133471450] [2022-11-03 03:05:36,133 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [133471450] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:05:36,133 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:05:36,133 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-11-03 03:05:36,133 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [261182877] [2022-11-03 03:05:36,133 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:05:36,134 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-03 03:05:36,134 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:05:36,134 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-03 03:05:36,134 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-11-03 03:05:36,135 INFO L87 Difference]: Start difference. First operand 161 states and 229 transitions. Second operand has 7 states, 7 states have (on average 13.428571428571429) internal successors, (94), 7 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:36,527 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:05:36,527 INFO L93 Difference]: Finished difference Result 400 states and 574 transitions. [2022-11-03 03:05:36,528 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-03 03:05:36,528 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 13.428571428571429) internal successors, (94), 7 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 94 [2022-11-03 03:05:36,528 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:05:36,530 INFO L225 Difference]: With dead ends: 400 [2022-11-03 03:05:36,530 INFO L226 Difference]: Without dead ends: 295 [2022-11-03 03:05:36,530 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 88 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=47, Invalid=85, Unknown=0, NotChecked=0, Total=132 [2022-11-03 03:05:36,531 INFO L413 NwaCegarLoop]: 186 mSDtfsCounter, 681 mSDsluCounter, 600 mSDsCounter, 0 mSdLazyCounter, 107 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 681 SdHoareTripleChecker+Valid, 786 SdHoareTripleChecker+Invalid, 113 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 107 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-03 03:05:36,532 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [681 Valid, 786 Invalid, 113 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 107 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-11-03 03:05:36,538 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 295 states. [2022-11-03 03:05:36,544 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 295 to 163. [2022-11-03 03:05:36,548 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 163 states, 162 states have (on average 1.4259259259259258) internal successors, (231), 162 states have internal predecessors, (231), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:36,549 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 231 transitions. [2022-11-03 03:05:36,549 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 231 transitions. Word has length 94 [2022-11-03 03:05:36,549 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:05:36,550 INFO L495 AbstractCegarLoop]: Abstraction has 163 states and 231 transitions. [2022-11-03 03:05:36,550 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 13.428571428571429) internal successors, (94), 7 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:36,550 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 231 transitions. [2022-11-03 03:05:36,551 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2022-11-03 03:05:36,551 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:05:36,551 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:05:36,580 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (8)] Forceful destruction successful, exit code 0 [2022-11-03 03:05:36,775 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:05:36,775 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:05:36,775 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:05:36,776 INFO L85 PathProgramCache]: Analyzing trace with hash 219950795, now seen corresponding path program 1 times [2022-11-03 03:05:36,777 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:05:36,777 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1690783847] [2022-11-03 03:05:36,778 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:05:36,778 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:05:36,778 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:05:36,779 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:05:36,806 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (9)] Waiting until timeout for monitored process [2022-11-03 03:05:37,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:05:37,549 INFO L263 TraceCheckSpWp]: Trace formula consists of 1696 conjuncts, 17 conjunts are in the unsatisfiable core [2022-11-03 03:05:37,556 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:05:38,237 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:05:38,237 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:05:38,237 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:05:38,237 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1690783847] [2022-11-03 03:05:38,238 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1690783847] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:05:38,238 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:05:38,238 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-11-03 03:05:38,238 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1853058892] [2022-11-03 03:05:38,238 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:05:38,239 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-03 03:05:38,239 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:05:38,239 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-03 03:05:38,240 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2022-11-03 03:05:38,240 INFO L87 Difference]: Start difference. First operand 163 states and 231 transitions. Second operand has 7 states, 7 states have (on average 13.428571428571429) internal successors, (94), 7 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:38,863 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:05:38,863 INFO L93 Difference]: Finished difference Result 426 states and 608 transitions. [2022-11-03 03:05:38,864 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-03 03:05:38,864 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 13.428571428571429) internal successors, (94), 7 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 94 [2022-11-03 03:05:38,864 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:05:38,866 INFO L225 Difference]: With dead ends: 426 [2022-11-03 03:05:38,866 INFO L226 Difference]: Without dead ends: 319 [2022-11-03 03:05:38,867 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 88 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2022-11-03 03:05:38,868 INFO L413 NwaCegarLoop]: 192 mSDtfsCounter, 171 mSDsluCounter, 716 mSDsCounter, 0 mSdLazyCounter, 166 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 171 SdHoareTripleChecker+Valid, 908 SdHoareTripleChecker+Invalid, 212 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 166 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 43 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-11-03 03:05:38,868 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [171 Valid, 908 Invalid, 212 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 166 Invalid, 0 Unknown, 43 Unchecked, 0.6s Time] [2022-11-03 03:05:38,869 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 319 states. [2022-11-03 03:05:38,875 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 319 to 209. [2022-11-03 03:05:38,876 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 209 states, 208 states have (on average 1.4230769230769231) internal successors, (296), 208 states have internal predecessors, (296), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:38,877 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 209 states to 209 states and 296 transitions. [2022-11-03 03:05:38,877 INFO L78 Accepts]: Start accepts. Automaton has 209 states and 296 transitions. Word has length 94 [2022-11-03 03:05:38,877 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:05:38,877 INFO L495 AbstractCegarLoop]: Abstraction has 209 states and 296 transitions. [2022-11-03 03:05:38,878 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 13.428571428571429) internal successors, (94), 7 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:38,878 INFO L276 IsEmpty]: Start isEmpty. Operand 209 states and 296 transitions. [2022-11-03 03:05:38,879 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2022-11-03 03:05:38,879 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:05:38,879 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:05:38,903 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (9)] Forceful destruction successful, exit code 0 [2022-11-03 03:05:39,094 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:05:39,095 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:05:39,095 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:05:39,095 INFO L85 PathProgramCache]: Analyzing trace with hash -1625416371, now seen corresponding path program 1 times [2022-11-03 03:05:39,097 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:05:39,097 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1491559421] [2022-11-03 03:05:39,097 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:05:39,098 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:05:39,098 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:05:39,099 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:05:39,105 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (10)] Waiting until timeout for monitored process [2022-11-03 03:05:39,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:05:39,930 INFO L263 TraceCheckSpWp]: Trace formula consists of 1696 conjuncts, 7 conjunts are in the unsatisfiable core [2022-11-03 03:05:39,938 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:05:40,253 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:05:40,253 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:05:40,253 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:05:40,254 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1491559421] [2022-11-03 03:05:40,254 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1491559421] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:05:40,254 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:05:40,254 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-11-03 03:05:40,255 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1119505846] [2022-11-03 03:05:40,255 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:05:40,255 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-03 03:05:40,255 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:05:40,256 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-03 03:05:40,256 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2022-11-03 03:05:40,256 INFO L87 Difference]: Start difference. First operand 209 states and 296 transitions. Second operand has 6 states, 6 states have (on average 15.666666666666666) internal successors, (94), 6 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:40,772 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:05:40,772 INFO L93 Difference]: Finished difference Result 687 states and 981 transitions. [2022-11-03 03:05:40,772 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-03 03:05:40,773 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 15.666666666666666) internal successors, (94), 6 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 94 [2022-11-03 03:05:40,773 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:05:40,775 INFO L225 Difference]: With dead ends: 687 [2022-11-03 03:05:40,775 INFO L226 Difference]: Without dead ends: 580 [2022-11-03 03:05:40,775 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 97 GetRequests, 89 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=35, Invalid=55, Unknown=0, NotChecked=0, Total=90 [2022-11-03 03:05:40,776 INFO L413 NwaCegarLoop]: 191 mSDtfsCounter, 574 mSDsluCounter, 348 mSDsCounter, 0 mSdLazyCounter, 106 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 574 SdHoareTripleChecker+Valid, 539 SdHoareTripleChecker+Invalid, 109 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 106 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-11-03 03:05:40,776 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [574 Valid, 539 Invalid, 109 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 106 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-11-03 03:05:40,777 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 580 states. [2022-11-03 03:05:40,787 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 580 to 375. [2022-11-03 03:05:40,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 375 states, 374 states have (on average 1.4197860962566844) internal successors, (531), 374 states have internal predecessors, (531), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:40,789 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 375 states to 375 states and 531 transitions. [2022-11-03 03:05:40,789 INFO L78 Accepts]: Start accepts. Automaton has 375 states and 531 transitions. Word has length 94 [2022-11-03 03:05:40,789 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:05:40,790 INFO L495 AbstractCegarLoop]: Abstraction has 375 states and 531 transitions. [2022-11-03 03:05:40,790 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 15.666666666666666) internal successors, (94), 6 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:40,790 INFO L276 IsEmpty]: Start isEmpty. Operand 375 states and 531 transitions. [2022-11-03 03:05:40,791 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2022-11-03 03:05:40,791 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:05:40,792 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:05:40,813 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (10)] Forceful destruction successful, exit code 0 [2022-11-03 03:05:41,006 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:05:41,007 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:05:41,007 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:05:41,007 INFO L85 PathProgramCache]: Analyzing trace with hash -239212977, now seen corresponding path program 1 times [2022-11-03 03:05:41,009 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:05:41,009 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [38975812] [2022-11-03 03:05:41,009 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:05:41,009 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:05:41,010 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:05:41,011 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:05:41,014 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (11)] Waiting until timeout for monitored process [2022-11-03 03:05:41,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:05:41,800 INFO L263 TraceCheckSpWp]: Trace formula consists of 1696 conjuncts, 20 conjunts are in the unsatisfiable core [2022-11-03 03:05:41,808 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:05:42,541 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:05:42,541 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:05:42,542 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:05:42,542 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [38975812] [2022-11-03 03:05:42,542 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [38975812] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:05:42,542 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:05:42,542 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2022-11-03 03:05:42,543 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1765338170] [2022-11-03 03:05:42,543 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:05:42,543 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-11-03 03:05:42,543 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:05:42,544 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-11-03 03:05:42,544 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2022-11-03 03:05:42,544 INFO L87 Difference]: Start difference. First operand 375 states and 531 transitions. Second operand has 9 states, 9 states have (on average 10.444444444444445) internal successors, (94), 9 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:43,370 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:05:43,370 INFO L93 Difference]: Finished difference Result 870 states and 1236 transitions. [2022-11-03 03:05:43,371 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-03 03:05:43,371 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 10.444444444444445) internal successors, (94), 9 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 94 [2022-11-03 03:05:43,372 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:05:43,374 INFO L225 Difference]: With dead ends: 870 [2022-11-03 03:05:43,375 INFO L226 Difference]: Without dead ends: 689 [2022-11-03 03:05:43,375 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 86 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=41, Invalid=141, Unknown=0, NotChecked=0, Total=182 [2022-11-03 03:05:43,376 INFO L413 NwaCegarLoop]: 151 mSDtfsCounter, 351 mSDsluCounter, 996 mSDsCounter, 0 mSdLazyCounter, 224 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 351 SdHoareTripleChecker+Valid, 1147 SdHoareTripleChecker+Invalid, 287 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 224 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 60 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-11-03 03:05:43,377 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [351 Valid, 1147 Invalid, 287 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 224 Invalid, 0 Unknown, 60 Unchecked, 0.7s Time] [2022-11-03 03:05:43,378 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 689 states. [2022-11-03 03:05:43,399 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 689 to 499. [2022-11-03 03:05:43,400 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 499 states, 498 states have (on average 1.4156626506024097) internal successors, (705), 498 states have internal predecessors, (705), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:43,402 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 499 states to 499 states and 705 transitions. [2022-11-03 03:05:43,403 INFO L78 Accepts]: Start accepts. Automaton has 499 states and 705 transitions. Word has length 94 [2022-11-03 03:05:43,404 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:05:43,405 INFO L495 AbstractCegarLoop]: Abstraction has 499 states and 705 transitions. [2022-11-03 03:05:43,405 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 10.444444444444445) internal successors, (94), 9 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:43,405 INFO L276 IsEmpty]: Start isEmpty. Operand 499 states and 705 transitions. [2022-11-03 03:05:43,407 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2022-11-03 03:05:43,407 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:05:43,408 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:05:43,438 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (11)] Forceful destruction successful, exit code 0 [2022-11-03 03:05:43,621 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:05:43,621 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:05:43,621 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:05:43,622 INFO L85 PathProgramCache]: Analyzing trace with hash 183488849, now seen corresponding path program 1 times [2022-11-03 03:05:43,623 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:05:43,623 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1898774360] [2022-11-03 03:05:43,623 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:05:43,624 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:05:43,624 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:05:43,624 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:05:43,633 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (12)] Waiting until timeout for monitored process [2022-11-03 03:05:44,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:05:44,456 INFO L263 TraceCheckSpWp]: Trace formula consists of 1696 conjuncts, 20 conjunts are in the unsatisfiable core [2022-11-03 03:05:44,464 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:05:45,527 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:05:45,527 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:05:45,527 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:05:45,528 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1898774360] [2022-11-03 03:05:45,528 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1898774360] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:05:45,528 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:05:45,528 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2022-11-03 03:05:45,528 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [134790397] [2022-11-03 03:05:45,528 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:05:45,529 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-11-03 03:05:45,529 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:05:45,529 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-11-03 03:05:45,530 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2022-11-03 03:05:45,530 INFO L87 Difference]: Start difference. First operand 499 states and 705 transitions. Second operand has 9 states, 9 states have (on average 10.444444444444445) internal successors, (94), 9 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:46,476 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:05:46,476 INFO L93 Difference]: Finished difference Result 1044 states and 1483 transitions. [2022-11-03 03:05:46,478 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-03 03:05:46,479 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 10.444444444444445) internal successors, (94), 9 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 94 [2022-11-03 03:05:46,479 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:05:46,481 INFO L225 Difference]: With dead ends: 1044 [2022-11-03 03:05:46,481 INFO L226 Difference]: Without dead ends: 863 [2022-11-03 03:05:46,482 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 86 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=41, Invalid=141, Unknown=0, NotChecked=0, Total=182 [2022-11-03 03:05:46,483 INFO L413 NwaCegarLoop]: 174 mSDtfsCounter, 463 mSDsluCounter, 1105 mSDsCounter, 0 mSdLazyCounter, 256 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 463 SdHoareTripleChecker+Valid, 1279 SdHoareTripleChecker+Invalid, 312 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 256 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 53 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-11-03 03:05:46,483 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [463 Valid, 1279 Invalid, 312 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 256 Invalid, 0 Unknown, 53 Unchecked, 0.8s Time] [2022-11-03 03:05:46,484 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 863 states. [2022-11-03 03:05:46,496 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 863 to 557. [2022-11-03 03:05:46,497 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 557 states, 556 states have (on average 1.4172661870503598) internal successors, (788), 556 states have internal predecessors, (788), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:46,499 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 557 states to 557 states and 788 transitions. [2022-11-03 03:05:46,500 INFO L78 Accepts]: Start accepts. Automaton has 557 states and 788 transitions. Word has length 94 [2022-11-03 03:05:46,500 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:05:46,500 INFO L495 AbstractCegarLoop]: Abstraction has 557 states and 788 transitions. [2022-11-03 03:05:46,500 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 10.444444444444445) internal successors, (94), 9 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:46,501 INFO L276 IsEmpty]: Start isEmpty. Operand 557 states and 788 transitions. [2022-11-03 03:05:46,502 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2022-11-03 03:05:46,502 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:05:46,502 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:05:46,534 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (12)] Forceful destruction successful, exit code 0 [2022-11-03 03:05:46,718 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:05:46,719 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:05:46,719 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:05:46,719 INFO L85 PathProgramCache]: Analyzing trace with hash -1505454893, now seen corresponding path program 1 times [2022-11-03 03:05:46,721 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:05:46,721 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [665474457] [2022-11-03 03:05:46,721 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:05:46,722 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:05:46,722 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:05:46,723 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:05:46,742 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (13)] Waiting until timeout for monitored process [2022-11-03 03:05:47,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:05:47,614 INFO L263 TraceCheckSpWp]: Trace formula consists of 1696 conjuncts, 7 conjunts are in the unsatisfiable core [2022-11-03 03:05:47,622 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:05:48,022 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:05:48,022 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:05:48,022 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:05:48,022 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [665474457] [2022-11-03 03:05:48,022 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [665474457] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:05:48,022 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:05:48,023 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-11-03 03:05:48,023 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1058481413] [2022-11-03 03:05:48,023 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:05:48,023 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-03 03:05:48,023 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:05:48,024 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-03 03:05:48,024 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2022-11-03 03:05:48,024 INFO L87 Difference]: Start difference. First operand 557 states and 788 transitions. Second operand has 6 states, 6 states have (on average 15.666666666666666) internal successors, (94), 6 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:48,638 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:05:48,638 INFO L93 Difference]: Finished difference Result 981 states and 1396 transitions. [2022-11-03 03:05:48,639 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-03 03:05:48,639 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 15.666666666666666) internal successors, (94), 6 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 94 [2022-11-03 03:05:48,640 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:05:48,642 INFO L225 Difference]: With dead ends: 981 [2022-11-03 03:05:48,643 INFO L226 Difference]: Without dead ends: 800 [2022-11-03 03:05:48,644 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 97 GetRequests, 89 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=35, Invalid=55, Unknown=0, NotChecked=0, Total=90 [2022-11-03 03:05:48,644 INFO L413 NwaCegarLoop]: 207 mSDtfsCounter, 807 mSDsluCounter, 346 mSDsCounter, 0 mSdLazyCounter, 108 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 807 SdHoareTripleChecker+Valid, 553 SdHoareTripleChecker+Invalid, 111 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 108 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-11-03 03:05:48,645 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [807 Valid, 553 Invalid, 111 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 108 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-11-03 03:05:48,646 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 800 states. [2022-11-03 03:05:48,659 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 800 to 595. [2022-11-03 03:05:48,661 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 595 states, 594 states have (on average 1.4158249158249159) internal successors, (841), 594 states have internal predecessors, (841), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:48,663 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 595 states to 595 states and 841 transitions. [2022-11-03 03:05:48,663 INFO L78 Accepts]: Start accepts. Automaton has 595 states and 841 transitions. Word has length 94 [2022-11-03 03:05:48,663 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:05:48,664 INFO L495 AbstractCegarLoop]: Abstraction has 595 states and 841 transitions. [2022-11-03 03:05:48,664 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 15.666666666666666) internal successors, (94), 6 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:48,664 INFO L276 IsEmpty]: Start isEmpty. Operand 595 states and 841 transitions. [2022-11-03 03:05:48,666 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2022-11-03 03:05:48,666 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:05:48,666 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:05:48,689 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (13)] Forceful destruction successful, exit code 0 [2022-11-03 03:05:48,874 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:05:48,875 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:05:48,875 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:05:48,875 INFO L85 PathProgramCache]: Analyzing trace with hash 1201164501, now seen corresponding path program 1 times [2022-11-03 03:05:48,877 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:05:48,877 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1092316816] [2022-11-03 03:05:48,877 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:05:48,877 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:05:48,878 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:05:48,879 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:05:48,880 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (14)] Waiting until timeout for monitored process [2022-11-03 03:05:49,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:05:49,653 INFO L263 TraceCheckSpWp]: Trace formula consists of 1696 conjuncts, 21 conjunts are in the unsatisfiable core [2022-11-03 03:05:49,659 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:05:50,987 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:05:50,987 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:05:50,987 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:05:50,988 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1092316816] [2022-11-03 03:05:50,988 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1092316816] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:05:50,988 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:05:50,988 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2022-11-03 03:05:50,988 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [76238706] [2022-11-03 03:05:50,988 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:05:50,989 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-11-03 03:05:50,989 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:05:50,989 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-11-03 03:05:50,990 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2022-11-03 03:05:50,990 INFO L87 Difference]: Start difference. First operand 595 states and 841 transitions. Second operand has 9 states, 9 states have (on average 10.444444444444445) internal successors, (94), 9 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:51,491 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:05:51,491 INFO L93 Difference]: Finished difference Result 980 states and 1388 transitions. [2022-11-03 03:05:51,492 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-03 03:05:51,493 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 10.444444444444445) internal successors, (94), 9 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 94 [2022-11-03 03:05:51,493 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:05:51,495 INFO L225 Difference]: With dead ends: 980 [2022-11-03 03:05:51,495 INFO L226 Difference]: Without dead ends: 787 [2022-11-03 03:05:51,496 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 97 GetRequests, 86 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=35, Invalid=121, Unknown=0, NotChecked=0, Total=156 [2022-11-03 03:05:51,497 INFO L413 NwaCegarLoop]: 159 mSDtfsCounter, 247 mSDsluCounter, 962 mSDsCounter, 0 mSdLazyCounter, 119 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 247 SdHoareTripleChecker+Valid, 1121 SdHoareTripleChecker+Invalid, 225 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 119 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 103 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-11-03 03:05:51,498 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [247 Valid, 1121 Invalid, 225 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 119 Invalid, 0 Unknown, 103 Unchecked, 0.4s Time] [2022-11-03 03:05:51,499 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 787 states. [2022-11-03 03:05:51,512 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 787 to 609. [2022-11-03 03:05:51,514 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 609 states, 608 states have (on average 1.4111842105263157) internal successors, (858), 608 states have internal predecessors, (858), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:51,516 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 609 states to 609 states and 858 transitions. [2022-11-03 03:05:51,517 INFO L78 Accepts]: Start accepts. Automaton has 609 states and 858 transitions. Word has length 94 [2022-11-03 03:05:51,517 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:05:51,517 INFO L495 AbstractCegarLoop]: Abstraction has 609 states and 858 transitions. [2022-11-03 03:05:51,517 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 10.444444444444445) internal successors, (94), 9 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:51,518 INFO L276 IsEmpty]: Start isEmpty. Operand 609 states and 858 transitions. [2022-11-03 03:05:51,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2022-11-03 03:05:51,520 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:05:51,520 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:05:51,553 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (14)] Forceful destruction successful, exit code 0 [2022-11-03 03:05:51,734 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:05:51,735 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:05:51,735 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:05:51,735 INFO L85 PathProgramCache]: Analyzing trace with hash -78699177, now seen corresponding path program 1 times [2022-11-03 03:05:51,736 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:05:51,736 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [2038490429] [2022-11-03 03:05:51,737 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:05:51,737 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:05:51,737 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:05:51,738 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:05:51,740 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (15)] Waiting until timeout for monitored process [2022-11-03 03:05:52,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:05:52,498 INFO L263 TraceCheckSpWp]: Trace formula consists of 1696 conjuncts, 21 conjunts are in the unsatisfiable core [2022-11-03 03:05:52,504 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:05:53,914 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:05:53,914 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:05:53,914 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:05:53,915 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [2038490429] [2022-11-03 03:05:53,915 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [2038490429] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:05:53,915 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:05:53,915 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2022-11-03 03:05:53,915 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1018417076] [2022-11-03 03:05:53,915 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:05:53,916 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-11-03 03:05:53,916 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:05:53,916 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-11-03 03:05:53,916 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2022-11-03 03:05:53,917 INFO L87 Difference]: Start difference. First operand 609 states and 858 transitions. Second operand has 9 states, 9 states have (on average 10.444444444444445) internal successors, (94), 9 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:54,570 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:05:54,571 INFO L93 Difference]: Finished difference Result 1110 states and 1569 transitions. [2022-11-03 03:05:54,571 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-03 03:05:54,572 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 10.444444444444445) internal successors, (94), 9 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 94 [2022-11-03 03:05:54,572 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:05:54,575 INFO L225 Difference]: With dead ends: 1110 [2022-11-03 03:05:54,575 INFO L226 Difference]: Without dead ends: 917 [2022-11-03 03:05:54,576 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 97 GetRequests, 86 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=35, Invalid=121, Unknown=0, NotChecked=0, Total=156 [2022-11-03 03:05:54,577 INFO L413 NwaCegarLoop]: 186 mSDtfsCounter, 329 mSDsluCounter, 1072 mSDsCounter, 0 mSdLazyCounter, 173 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 329 SdHoareTripleChecker+Valid, 1258 SdHoareTripleChecker+Invalid, 272 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 173 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 96 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-11-03 03:05:54,578 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [329 Valid, 1258 Invalid, 272 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 173 Invalid, 0 Unknown, 96 Unchecked, 0.5s Time] [2022-11-03 03:05:54,580 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 917 states. [2022-11-03 03:05:54,602 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 917 to 623. [2022-11-03 03:05:54,603 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 623 states, 622 states have (on average 1.4067524115755627) internal successors, (875), 622 states have internal predecessors, (875), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:54,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 623 states to 623 states and 875 transitions. [2022-11-03 03:05:54,605 INFO L78 Accepts]: Start accepts. Automaton has 623 states and 875 transitions. Word has length 94 [2022-11-03 03:05:54,606 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:05:54,606 INFO L495 AbstractCegarLoop]: Abstraction has 623 states and 875 transitions. [2022-11-03 03:05:54,606 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 10.444444444444445) internal successors, (94), 9 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:54,606 INFO L276 IsEmpty]: Start isEmpty. Operand 623 states and 875 transitions. [2022-11-03 03:05:54,608 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2022-11-03 03:05:54,608 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:05:54,608 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:05:54,638 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (15)] Forceful destruction successful, exit code 0 [2022-11-03 03:05:54,822 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 15 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:05:54,823 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:05:54,823 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:05:54,823 INFO L85 PathProgramCache]: Analyzing trace with hash -665505191, now seen corresponding path program 1 times [2022-11-03 03:05:54,825 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:05:54,825 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [229234373] [2022-11-03 03:05:54,825 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:05:54,825 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:05:54,825 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:05:54,826 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:05:54,830 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (16)] Waiting until timeout for monitored process [2022-11-03 03:05:55,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:05:55,600 INFO L263 TraceCheckSpWp]: Trace formula consists of 1696 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-03 03:05:55,604 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:05:55,771 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:05:55,771 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:05:55,771 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:05:55,772 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [229234373] [2022-11-03 03:05:55,772 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [229234373] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:05:55,772 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:05:55,772 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-03 03:05:55,772 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [87298286] [2022-11-03 03:05:55,772 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:05:55,773 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 03:05:55,773 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:05:55,773 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 03:05:55,774 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 03:05:55,774 INFO L87 Difference]: Start difference. First operand 623 states and 875 transitions. Second operand has 4 states, 4 states have (on average 23.5) internal successors, (94), 4 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:55,828 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:05:55,829 INFO L93 Difference]: Finished difference Result 1105 states and 1566 transitions. [2022-11-03 03:05:55,829 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-03 03:05:55,829 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 23.5) internal successors, (94), 4 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 94 [2022-11-03 03:05:55,830 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:05:55,839 INFO L225 Difference]: With dead ends: 1105 [2022-11-03 03:05:55,839 INFO L226 Difference]: Without dead ends: 912 [2022-11-03 03:05:55,842 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 91 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-03 03:05:55,843 INFO L413 NwaCegarLoop]: 263 mSDtfsCounter, 177 mSDsluCounter, 265 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 177 SdHoareTripleChecker+Valid, 528 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 03:05:55,846 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [177 Valid, 528 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-03 03:05:55,849 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 912 states. [2022-11-03 03:05:55,864 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 912 to 719. [2022-11-03 03:05:55,866 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 719 states, 718 states have (on average 1.4094707520891365) internal successors, (1012), 718 states have internal predecessors, (1012), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:55,870 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 719 states to 719 states and 1012 transitions. [2022-11-03 03:05:55,870 INFO L78 Accepts]: Start accepts. Automaton has 719 states and 1012 transitions. Word has length 94 [2022-11-03 03:05:55,871 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:05:55,871 INFO L495 AbstractCegarLoop]: Abstraction has 719 states and 1012 transitions. [2022-11-03 03:05:55,871 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 23.5) internal successors, (94), 4 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:05:55,871 INFO L276 IsEmpty]: Start isEmpty. Operand 719 states and 1012 transitions. [2022-11-03 03:05:55,873 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2022-11-03 03:05:55,873 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:05:55,874 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:05:55,907 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (16)] Forceful destruction successful, exit code 0 [2022-11-03 03:05:56,088 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:05:56,088 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:05:56,089 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:05:56,089 INFO L85 PathProgramCache]: Analyzing trace with hash -663658149, now seen corresponding path program 1 times [2022-11-03 03:05:56,091 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:05:56,091 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [924192813] [2022-11-03 03:05:56,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:05:56,091 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:05:56,092 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:05:56,093 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:05:56,095 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (17)] Waiting until timeout for monitored process [2022-11-03 03:05:56,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:05:56,899 INFO L263 TraceCheckSpWp]: Trace formula consists of 1696 conjuncts, 44 conjunts are in the unsatisfiable core [2022-11-03 03:05:56,903 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:05:57,842 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:05:57,842 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:06:00,989 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:06:00,990 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:06:00,990 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [924192813] [2022-11-03 03:06:00,990 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [924192813] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:06:00,990 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [83498397] [2022-11-03 03:06:00,991 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:06:00,991 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 03:06:00,991 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 03:06:01,018 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 03:06:01,074 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (18)] Waiting until timeout for monitored process [2022-11-03 03:06:02,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:06:02,600 INFO L263 TraceCheckSpWp]: Trace formula consists of 1696 conjuncts, 44 conjunts are in the unsatisfiable core [2022-11-03 03:06:02,605 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:06:03,336 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:06:03,337 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:06:05,215 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:06:05,215 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [83498397] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:06:05,216 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [240771951] [2022-11-03 03:06:05,216 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:06:05,216 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:06:05,216 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:06:05,217 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:06:05,219 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-11-03 03:06:05,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:06:05,881 INFO L263 TraceCheckSpWp]: Trace formula consists of 1696 conjuncts, 39 conjunts are in the unsatisfiable core [2022-11-03 03:06:05,886 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:06:07,795 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:06:07,795 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:06:10,404 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:06:10,404 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [240771951] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:06:10,405 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 03:06:10,405 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 14, 14] total 38 [2022-11-03 03:06:10,405 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [441666984] [2022-11-03 03:06:10,405 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 03:06:10,406 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 38 states [2022-11-03 03:06:10,406 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:06:10,407 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2022-11-03 03:06:10,408 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=176, Invalid=1230, Unknown=0, NotChecked=0, Total=1406 [2022-11-03 03:06:10,408 INFO L87 Difference]: Start difference. First operand 719 states and 1012 transitions. Second operand has 38 states, 38 states have (on average 9.68421052631579) internal successors, (368), 38 states have internal predecessors, (368), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:06:11,792 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:06:11,793 INFO L93 Difference]: Finished difference Result 1414 states and 1989 transitions. [2022-11-03 03:06:11,793 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2022-11-03 03:06:11,794 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 38 states have (on average 9.68421052631579) internal successors, (368), 38 states have internal predecessors, (368), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 94 [2022-11-03 03:06:11,794 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:06:11,803 INFO L225 Difference]: With dead ends: 1414 [2022-11-03 03:06:11,803 INFO L226 Difference]: Without dead ends: 1412 [2022-11-03 03:06:11,804 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 577 GetRequests, 525 SyntacticMatches, 2 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 631 ImplicationChecksByTransitivity, 5.1s TimeCoverageRelationStatistics Valid=363, Invalid=2289, Unknown=0, NotChecked=0, Total=2652 [2022-11-03 03:06:11,805 INFO L413 NwaCegarLoop]: 103 mSDtfsCounter, 760 mSDsluCounter, 2963 mSDsCounter, 0 mSdLazyCounter, 31 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 760 SdHoareTripleChecker+Valid, 3066 SdHoareTripleChecker+Invalid, 207 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 31 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 176 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:06:11,805 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [760 Valid, 3066 Invalid, 207 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 31 Invalid, 0 Unknown, 176 Unchecked, 0.1s Time] [2022-11-03 03:06:11,807 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1412 states. [2022-11-03 03:06:11,839 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1412 to 1390. [2022-11-03 03:06:11,842 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1390 states, 1389 states have (on average 1.4103671706263499) internal successors, (1959), 1389 states have internal predecessors, (1959), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:06:11,846 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1390 states to 1390 states and 1959 transitions. [2022-11-03 03:06:11,847 INFO L78 Accepts]: Start accepts. Automaton has 1390 states and 1959 transitions. Word has length 94 [2022-11-03 03:06:11,847 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:06:11,847 INFO L495 AbstractCegarLoop]: Abstraction has 1390 states and 1959 transitions. [2022-11-03 03:06:11,848 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 38 states, 38 states have (on average 9.68421052631579) internal successors, (368), 38 states have internal predecessors, (368), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:06:11,848 INFO L276 IsEmpty]: Start isEmpty. Operand 1390 states and 1959 transitions. [2022-11-03 03:06:11,850 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2022-11-03 03:06:11,851 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:06:11,851 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:06:11,893 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Forceful destruction successful, exit code 0 [2022-11-03 03:06:12,074 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (18)] Forceful destruction successful, exit code 0 [2022-11-03 03:06:12,282 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (17)] Forceful destruction successful, exit code 0 [2022-11-03 03:06:12,464 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 19 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,18 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,17 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:06:12,465 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:06:12,465 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:06:12,465 INFO L85 PathProgramCache]: Analyzing trace with hash 1111349213, now seen corresponding path program 1 times [2022-11-03 03:06:12,467 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:06:12,467 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1301992604] [2022-11-03 03:06:12,467 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:06:12,467 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:06:12,467 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:06:12,468 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:06:12,470 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (20)] Waiting until timeout for monitored process [2022-11-03 03:06:13,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:06:13,213 INFO L263 TraceCheckSpWp]: Trace formula consists of 1696 conjuncts, 33 conjunts are in the unsatisfiable core [2022-11-03 03:06:13,217 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:06:14,321 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:06:14,321 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:06:17,736 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:06:17,737 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:06:17,737 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1301992604] [2022-11-03 03:06:17,737 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1301992604] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:06:17,737 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1286676694] [2022-11-03 03:06:17,737 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:06:17,738 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 03:06:17,738 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 03:06:17,739 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 03:06:17,740 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (21)] Waiting until timeout for monitored process [2022-11-03 03:06:19,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:06:19,244 INFO L263 TraceCheckSpWp]: Trace formula consists of 1696 conjuncts, 64 conjunts are in the unsatisfiable core [2022-11-03 03:06:19,249 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:06:20,490 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:06:20,490 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:06:28,565 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:06:28,565 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1286676694] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:06:28,565 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [453281321] [2022-11-03 03:06:28,565 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:06:28,566 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:06:28,566 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:06:28,567 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:06:28,569 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2022-11-03 03:06:29,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:06:29,275 INFO L263 TraceCheckSpWp]: Trace formula consists of 1696 conjuncts, 35 conjunts are in the unsatisfiable core [2022-11-03 03:06:29,282 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:06:31,405 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:06:31,405 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:06:36,006 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:06:36,007 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [453281321] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:06:36,007 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 03:06:36,007 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 9, 9, 14, 14] total 52 [2022-11-03 03:06:36,008 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1486306657] [2022-11-03 03:06:36,008 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 03:06:36,009 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 52 states [2022-11-03 03:06:36,009 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:06:36,010 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2022-11-03 03:06:36,010 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=262, Invalid=2390, Unknown=0, NotChecked=0, Total=2652 [2022-11-03 03:06:36,011 INFO L87 Difference]: Start difference. First operand 1390 states and 1959 transitions. Second operand has 52 states, 52 states have (on average 10.461538461538462) internal successors, (544), 52 states have internal predecessors, (544), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:06:37,526 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:06:37,526 INFO L93 Difference]: Finished difference Result 1792 states and 2533 transitions. [2022-11-03 03:06:37,527 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-11-03 03:06:37,527 INFO L78 Accepts]: Start accepts. Automaton has has 52 states, 52 states have (on average 10.461538461538462) internal successors, (544), 52 states have internal predecessors, (544), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 94 [2022-11-03 03:06:37,527 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:06:37,532 INFO L225 Difference]: With dead ends: 1792 [2022-11-03 03:06:37,532 INFO L226 Difference]: Without dead ends: 1790 [2022-11-03 03:06:37,533 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 574 GetRequests, 510 SyntacticMatches, 1 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1247 ImplicationChecksByTransitivity, 13.6s TimeCoverageRelationStatistics Valid=426, Invalid=3734, Unknown=0, NotChecked=0, Total=4160 [2022-11-03 03:06:37,534 INFO L413 NwaCegarLoop]: 103 mSDtfsCounter, 910 mSDsluCounter, 2986 mSDsCounter, 0 mSdLazyCounter, 14 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 910 SdHoareTripleChecker+Valid, 3089 SdHoareTripleChecker+Invalid, 117 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 14 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 103 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:06:37,534 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [910 Valid, 3089 Invalid, 117 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 14 Invalid, 0 Unknown, 103 Unchecked, 0.1s Time] [2022-11-03 03:06:37,536 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1790 states. [2022-11-03 03:06:37,567 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1790 to 1780. [2022-11-03 03:06:37,569 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1780 states, 1779 states have (on average 1.415964024732996) internal successors, (2519), 1779 states have internal predecessors, (2519), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:06:37,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1780 states to 1780 states and 2519 transitions. [2022-11-03 03:06:37,574 INFO L78 Accepts]: Start accepts. Automaton has 1780 states and 2519 transitions. Word has length 94 [2022-11-03 03:06:37,575 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:06:37,575 INFO L495 AbstractCegarLoop]: Abstraction has 1780 states and 2519 transitions. [2022-11-03 03:06:37,575 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 52 states, 52 states have (on average 10.461538461538462) internal successors, (544), 52 states have internal predecessors, (544), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:06:37,575 INFO L276 IsEmpty]: Start isEmpty. Operand 1780 states and 2519 transitions. [2022-11-03 03:06:37,578 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2022-11-03 03:06:37,578 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:06:37,578 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:06:37,603 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (20)] Forceful destruction successful, exit code 0 [2022-11-03 03:06:37,811 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (21)] Forceful destruction successful, exit code 0 [2022-11-03 03:06:38,019 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Ended with exit code 0 [2022-11-03 03:06:38,194 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 20 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,21 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,22 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:06:38,194 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:06:38,194 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:06:38,194 INFO L85 PathProgramCache]: Analyzing trace with hash 1812413791, now seen corresponding path program 1 times [2022-11-03 03:06:38,196 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:06:38,196 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [663688984] [2022-11-03 03:06:38,196 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:06:38,196 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:06:38,196 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:06:38,197 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:06:38,198 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (23)] Waiting until timeout for monitored process [2022-11-03 03:06:38,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:06:38,917 INFO L263 TraceCheckSpWp]: Trace formula consists of 1696 conjuncts, 30 conjunts are in the unsatisfiable core [2022-11-03 03:06:38,921 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:06:39,463 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:06:39,464 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:06:42,281 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:06:42,281 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:06:42,281 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [663688984] [2022-11-03 03:06:42,281 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [663688984] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:06:42,282 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [172706338] [2022-11-03 03:06:42,282 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:06:42,282 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 03:06:42,282 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 03:06:42,283 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 03:06:42,286 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (24)] Waiting until timeout for monitored process [2022-11-03 03:06:43,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:06:43,969 INFO L263 TraceCheckSpWp]: Trace formula consists of 1696 conjuncts, 32 conjunts are in the unsatisfiable core [2022-11-03 03:06:43,973 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:06:45,307 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:06:45,307 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:06:48,703 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:06:48,703 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [172706338] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:06:48,703 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [354911255] [2022-11-03 03:06:48,703 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:06:48,703 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:06:48,703 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:06:48,704 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:06:48,705 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2022-11-03 03:06:49,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:06:49,379 INFO L263 TraceCheckSpWp]: Trace formula consists of 1696 conjuncts, 35 conjunts are in the unsatisfiable core [2022-11-03 03:06:49,385 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:06:50,179 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:06:50,179 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:06:51,777 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:06:51,777 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [354911255] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:06:51,777 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 03:06:51,777 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 14, 14] total 40 [2022-11-03 03:06:51,778 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1527940849] [2022-11-03 03:06:51,778 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 03:06:51,778 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 40 states [2022-11-03 03:06:51,779 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:06:51,779 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2022-11-03 03:06:51,780 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=168, Invalid=1392, Unknown=0, NotChecked=0, Total=1560 [2022-11-03 03:06:51,780 INFO L87 Difference]: Start difference. First operand 1780 states and 2519 transitions. Second operand has 40 states, 40 states have (on average 9.15) internal successors, (366), 40 states have internal predecessors, (366), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:06:54,438 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:06:54,438 INFO L93 Difference]: Finished difference Result 2204 states and 3120 transitions. [2022-11-03 03:06:54,439 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-11-03 03:06:54,439 INFO L78 Accepts]: Start accepts. Automaton has has 40 states, 40 states have (on average 9.15) internal successors, (366), 40 states have internal predecessors, (366), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 94 [2022-11-03 03:06:54,439 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:06:54,446 INFO L225 Difference]: With dead ends: 2204 [2022-11-03 03:06:54,446 INFO L226 Difference]: Without dead ends: 2202 [2022-11-03 03:06:54,448 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 574 GetRequests, 519 SyntacticMatches, 2 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 652 ImplicationChecksByTransitivity, 6.0s TimeCoverageRelationStatistics Valid=527, Invalid=2443, Unknown=0, NotChecked=0, Total=2970 [2022-11-03 03:06:54,449 INFO L413 NwaCegarLoop]: 218 mSDtfsCounter, 1022 mSDsluCounter, 3524 mSDsCounter, 0 mSdLazyCounter, 538 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1022 SdHoareTripleChecker+Valid, 3742 SdHoareTripleChecker+Invalid, 1275 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 538 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 732 IncrementalHoareTripleChecker+Unchecked, 1.3s IncrementalHoareTripleChecker+Time [2022-11-03 03:06:54,449 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1022 Valid, 3742 Invalid, 1275 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 538 Invalid, 0 Unknown, 732 Unchecked, 1.3s Time] [2022-11-03 03:06:54,452 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2202 states. [2022-11-03 03:06:54,493 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2202 to 1799. [2022-11-03 03:06:54,496 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1799 states, 1798 states have (on average 1.4154616240266964) internal successors, (2545), 1798 states have internal predecessors, (2545), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:06:54,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1799 states to 1799 states and 2545 transitions. [2022-11-03 03:06:54,501 INFO L78 Accepts]: Start accepts. Automaton has 1799 states and 2545 transitions. Word has length 94 [2022-11-03 03:06:54,502 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:06:54,502 INFO L495 AbstractCegarLoop]: Abstraction has 1799 states and 2545 transitions. [2022-11-03 03:06:54,503 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 40 states, 40 states have (on average 9.15) internal successors, (366), 40 states have internal predecessors, (366), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:06:54,503 INFO L276 IsEmpty]: Start isEmpty. Operand 1799 states and 2545 transitions. [2022-11-03 03:06:54,506 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2022-11-03 03:06:54,506 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:06:54,506 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:06:54,544 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (23)] Forceful destruction successful, exit code 0 [2022-11-03 03:06:54,748 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Forceful destruction successful, exit code 0 [2022-11-03 03:06:54,931 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (24)] Forceful destruction successful, exit code 0 [2022-11-03 03:06:55,123 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 23 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,25 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,24 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt [2022-11-03 03:06:55,123 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:06:55,124 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:06:55,124 INFO L85 PathProgramCache]: Analyzing trace with hash 1132355421, now seen corresponding path program 1 times [2022-11-03 03:06:55,125 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:06:55,125 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1364559274] [2022-11-03 03:06:55,125 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:06:55,126 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:06:55,126 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:06:55,127 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:06:55,133 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (26)] Waiting until timeout for monitored process [2022-11-03 03:06:55,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:06:56,003 INFO L263 TraceCheckSpWp]: Trace formula consists of 1696 conjuncts, 33 conjunts are in the unsatisfiable core [2022-11-03 03:06:56,008 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:06:57,275 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:06:57,276 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:07:00,926 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:07:00,926 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:07:00,926 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1364559274] [2022-11-03 03:07:00,926 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1364559274] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:07:00,926 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1671237257] [2022-11-03 03:07:00,926 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:07:00,927 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 03:07:00,927 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 03:07:00,928 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 03:07:00,929 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (27)] Waiting until timeout for monitored process [2022-11-03 03:07:02,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:07:02,643 INFO L263 TraceCheckSpWp]: Trace formula consists of 1696 conjuncts, 54 conjunts are in the unsatisfiable core [2022-11-03 03:07:02,648 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:07:03,910 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:07:03,910 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:07:09,972 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:07:09,972 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1671237257] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:07:09,972 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [405706744] [2022-11-03 03:07:09,972 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:07:09,973 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:07:09,973 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:07:09,974 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:07:09,975 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Waiting until timeout for monitored process [2022-11-03 03:07:10,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:07:10,629 INFO L263 TraceCheckSpWp]: Trace formula consists of 1696 conjuncts, 35 conjunts are in the unsatisfiable core [2022-11-03 03:07:10,633 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:07:12,270 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:07:12,270 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:07:16,914 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:07:16,915 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [405706744] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:07:16,915 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 03:07:16,915 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 9, 9, 14, 14] total 52 [2022-11-03 03:07:16,915 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [210754636] [2022-11-03 03:07:16,915 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 03:07:16,916 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 52 states [2022-11-03 03:07:16,916 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:07:16,917 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2022-11-03 03:07:16,918 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=262, Invalid=2390, Unknown=0, NotChecked=0, Total=2652 [2022-11-03 03:07:16,919 INFO L87 Difference]: Start difference. First operand 1799 states and 2545 transitions. Second operand has 52 states, 52 states have (on average 10.461538461538462) internal successors, (544), 52 states have internal predecessors, (544), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:07:18,357 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:07:18,357 INFO L93 Difference]: Finished difference Result 2577 states and 3659 transitions. [2022-11-03 03:07:18,358 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-11-03 03:07:18,358 INFO L78 Accepts]: Start accepts. Automaton has has 52 states, 52 states have (on average 10.461538461538462) internal successors, (544), 52 states have internal predecessors, (544), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 94 [2022-11-03 03:07:18,358 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:07:18,363 INFO L225 Difference]: With dead ends: 2577 [2022-11-03 03:07:18,363 INFO L226 Difference]: Without dead ends: 2575 [2022-11-03 03:07:18,365 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 575 GetRequests, 510 SyntacticMatches, 1 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1272 ImplicationChecksByTransitivity, 11.8s TimeCoverageRelationStatistics Valid=448, Invalid=3842, Unknown=0, NotChecked=0, Total=4290 [2022-11-03 03:07:18,366 INFO L413 NwaCegarLoop]: 113 mSDtfsCounter, 746 mSDsluCounter, 2908 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 746 SdHoareTripleChecker+Valid, 3021 SdHoareTripleChecker+Invalid, 165 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 144 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:07:18,366 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [746 Valid, 3021 Invalid, 165 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 21 Invalid, 0 Unknown, 144 Unchecked, 0.1s Time] [2022-11-03 03:07:18,369 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2575 states. [2022-11-03 03:07:18,415 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2575 to 2571. [2022-11-03 03:07:18,420 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2571 states, 2570 states have (on average 1.4214007782101168) internal successors, (3653), 2570 states have internal predecessors, (3653), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:07:18,425 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2571 states to 2571 states and 3653 transitions. [2022-11-03 03:07:18,425 INFO L78 Accepts]: Start accepts. Automaton has 2571 states and 3653 transitions. Word has length 94 [2022-11-03 03:07:18,426 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:07:18,426 INFO L495 AbstractCegarLoop]: Abstraction has 2571 states and 3653 transitions. [2022-11-03 03:07:18,426 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 52 states, 52 states have (on average 10.461538461538462) internal successors, (544), 52 states have internal predecessors, (544), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:07:18,427 INFO L276 IsEmpty]: Start isEmpty. Operand 2571 states and 3653 transitions. [2022-11-03 03:07:18,429 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2022-11-03 03:07:18,430 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:07:18,430 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:07:18,464 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (26)] Forceful destruction successful, exit code 0 [2022-11-03 03:07:18,665 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (27)] Forceful destruction successful, exit code 0 [2022-11-03 03:07:18,888 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_823beeb6-ef23-49e6-85bc-a5dd2d46172a/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Forceful destruction successful, exit code 0