./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.protocols.1.prop1-back-serstep.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 5e519f3a Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.protocols.1.prop1-back-serstep.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash ccd52863c81af6b9363b3cb9123948c48a201f89c1fc65f79eb7e0f4a69bd04e --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-5e519f3 [2022-11-03 02:36:26,147 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-03 02:36:26,149 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-03 02:36:26,189 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-03 02:36:26,190 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-03 02:36:26,191 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-03 02:36:26,193 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-03 02:36:26,195 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-03 02:36:26,197 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-03 02:36:26,198 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-03 02:36:26,203 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-03 02:36:26,204 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-03 02:36:26,205 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-03 02:36:26,206 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-03 02:36:26,207 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-03 02:36:26,209 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-03 02:36:26,210 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-03 02:36:26,211 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-03 02:36:26,213 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-03 02:36:26,215 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-03 02:36:26,217 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-03 02:36:26,219 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-03 02:36:26,220 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-03 02:36:26,221 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-03 02:36:26,225 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-03 02:36:26,225 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-03 02:36:26,226 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-03 02:36:26,227 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-03 02:36:26,227 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-03 02:36:26,228 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-03 02:36:26,229 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-03 02:36:26,230 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-03 02:36:26,230 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-03 02:36:26,231 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-03 02:36:26,243 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-03 02:36:26,244 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-03 02:36:26,244 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-03 02:36:26,245 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-03 02:36:26,245 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-03 02:36:26,246 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-03 02:36:26,247 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-03 02:36:26,251 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Default.epf [2022-11-03 02:36:26,303 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-03 02:36:26,303 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-03 02:36:26,304 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-03 02:36:26,304 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-03 02:36:26,305 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-03 02:36:26,305 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-03 02:36:26,306 INFO L138 SettingsManager]: * User list type=DISABLED [2022-11-03 02:36:26,306 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-11-03 02:36:26,306 INFO L138 SettingsManager]: * Explicit value domain=true [2022-11-03 02:36:26,306 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2022-11-03 02:36:26,308 INFO L138 SettingsManager]: * Octagon Domain=false [2022-11-03 02:36:26,308 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-11-03 02:36:26,308 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2022-11-03 02:36:26,308 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2022-11-03 02:36:26,309 INFO L138 SettingsManager]: * Interval Domain=false [2022-11-03 02:36:26,309 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2022-11-03 02:36:26,309 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2022-11-03 02:36:26,309 INFO L138 SettingsManager]: * Simplification Technique=POLY_PAC [2022-11-03 02:36:26,310 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-03 02:36:26,310 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-03 02:36:26,310 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-03 02:36:26,311 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-03 02:36:26,311 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-03 02:36:26,311 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-03 02:36:26,311 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-03 02:36:26,312 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-03 02:36:26,312 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-03 02:36:26,312 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-03 02:36:26,312 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-03 02:36:26,313 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 02:36:26,313 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-03 02:36:26,313 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2022-11-03 02:36:26,314 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-03 02:36:26,314 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-03 02:36:26,315 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2022-11-03 02:36:26,315 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-11-03 02:36:26,315 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-03 02:36:26,315 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-11-03 02:36:26,316 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> ccd52863c81af6b9363b3cb9123948c48a201f89c1fc65f79eb7e0f4a69bd04e [2022-11-03 02:36:26,650 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-03 02:36:26,678 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-03 02:36:26,681 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-03 02:36:26,683 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-03 02:36:26,684 INFO L275 PluginConnector]: CDTParser initialized [2022-11-03 02:36:26,686 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.protocols.1.prop1-back-serstep.c [2022-11-03 02:36:26,777 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/data/4cc1cbddc/98682f1068f74927b4671818f5cd8d3e/FLAGd4cf734da [2022-11-03 02:36:27,576 INFO L306 CDTParser]: Found 1 translation units. [2022-11-03 02:36:27,577 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.protocols.1.prop1-back-serstep.c [2022-11-03 02:36:27,599 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/data/4cc1cbddc/98682f1068f74927b4671818f5cd8d3e/FLAGd4cf734da [2022-11-03 02:36:27,793 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/data/4cc1cbddc/98682f1068f74927b4671818f5cd8d3e [2022-11-03 02:36:27,796 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-03 02:36:27,798 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-03 02:36:27,800 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-03 02:36:27,800 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-03 02:36:27,816 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-03 02:36:27,817 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 02:36:27" (1/1) ... [2022-11-03 02:36:27,818 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@38eaadea and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:36:27, skipping insertion in model container [2022-11-03 02:36:27,819 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 02:36:27" (1/1) ... [2022-11-03 02:36:27,831 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-03 02:36:27,923 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-03 02:36:28,210 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.protocols.1.prop1-back-serstep.c[1014,1027] [2022-11-03 02:36:28,601 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 02:36:28,605 INFO L203 MainTranslator]: Completed pre-run [2022-11-03 02:36:28,618 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.protocols.1.prop1-back-serstep.c[1014,1027] [2022-11-03 02:36:28,739 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 02:36:28,754 INFO L208 MainTranslator]: Completed translation [2022-11-03 02:36:28,755 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:36:28 WrapperNode [2022-11-03 02:36:28,755 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-03 02:36:28,757 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-03 02:36:28,757 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-03 02:36:28,757 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-03 02:36:28,767 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:36:28" (1/1) ... [2022-11-03 02:36:28,810 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:36:28" (1/1) ... [2022-11-03 02:36:28,962 INFO L138 Inliner]: procedures = 11, calls = 3, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1235 [2022-11-03 02:36:28,963 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-03 02:36:28,964 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-03 02:36:28,964 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-03 02:36:28,964 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-03 02:36:28,976 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:36:28" (1/1) ... [2022-11-03 02:36:28,976 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:36:28" (1/1) ... [2022-11-03 02:36:28,999 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:36:28" (1/1) ... [2022-11-03 02:36:29,000 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:36:28" (1/1) ... [2022-11-03 02:36:29,069 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:36:28" (1/1) ... [2022-11-03 02:36:29,076 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:36:28" (1/1) ... [2022-11-03 02:36:29,091 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:36:28" (1/1) ... [2022-11-03 02:36:29,108 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:36:28" (1/1) ... [2022-11-03 02:36:29,134 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-03 02:36:29,135 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-03 02:36:29,135 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-03 02:36:29,135 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-03 02:36:29,137 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:36:28" (1/1) ... [2022-11-03 02:36:29,146 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 02:36:29,161 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:36:29,180 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-03 02:36:29,266 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-03 02:36:29,292 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-03 02:36:29,292 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-03 02:36:29,788 INFO L235 CfgBuilder]: Building ICFG [2022-11-03 02:36:29,790 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-03 02:37:13,946 INFO L276 CfgBuilder]: Performing block encoding [2022-11-03 02:37:16,651 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-03 02:37:16,652 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-03 02:37:16,654 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 02:37:16 BoogieIcfgContainer [2022-11-03 02:37:16,655 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-03 02:37:16,658 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-03 02:37:16,659 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-03 02:37:16,662 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-03 02:37:16,663 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 03.11 02:36:27" (1/3) ... [2022-11-03 02:37:16,663 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@570751a9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 02:37:16, skipping insertion in model container [2022-11-03 02:37:16,664 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:36:28" (2/3) ... [2022-11-03 02:37:16,664 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@570751a9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 02:37:16, skipping insertion in model container [2022-11-03 02:37:16,664 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 02:37:16" (3/3) ... [2022-11-03 02:37:16,666 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.protocols.1.prop1-back-serstep.c [2022-11-03 02:37:16,685 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-03 02:37:16,685 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-03 02:37:16,746 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-03 02:37:16,763 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@681c7b9b, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-03 02:37:16,763 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-03 02:37:16,769 INFO L276 IsEmpty]: Start isEmpty. Operand has 7 states, 5 states have (on average 1.6) internal successors, (8), 6 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:37:16,775 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2022-11-03 02:37:16,775 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:37:16,776 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1] [2022-11-03 02:37:16,776 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:37:16,781 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:37:16,782 INFO L85 PathProgramCache]: Analyzing trace with hash 3704112, now seen corresponding path program 1 times [2022-11-03 02:37:16,792 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-03 02:37:16,793 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [24778808] [2022-11-03 02:37:16,793 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:37:16,793 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-03 02:37:17,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:37:22,046 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:37:22,046 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-03 02:37:22,047 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [24778808] [2022-11-03 02:37:22,047 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [24778808] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:37:22,048 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:37:22,048 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-03 02:37:22,050 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [802042965] [2022-11-03 02:37:22,050 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:37:22,055 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 02:37:22,055 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-03 02:37:22,083 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 02:37:22,085 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 02:37:22,087 INFO L87 Difference]: Start difference. First operand has 7 states, 5 states have (on average 1.6) internal successors, (8), 6 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 1.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:37:24,472 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.12s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-11-03 02:37:25,362 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:37:25,363 INFO L93 Difference]: Finished difference Result 15 states and 20 transitions. [2022-11-03 02:37:25,364 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-03 02:37:25,366 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 4 [2022-11-03 02:37:25,366 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:37:25,372 INFO L225 Difference]: With dead ends: 15 [2022-11-03 02:37:25,372 INFO L226 Difference]: Without dead ends: 9 [2022-11-03 02:37:25,374 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-03 02:37:25,378 INFO L413 NwaCegarLoop]: 2 mSDtfsCounter, 3 mSDsluCounter, 5 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 1 mSolverCounterUnsat, 1 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 6 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 1 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.2s IncrementalHoareTripleChecker+Time [2022-11-03 02:37:25,379 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 6 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 7 Invalid, 1 Unknown, 0 Unchecked, 3.2s Time] [2022-11-03 02:37:25,394 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9 states. [2022-11-03 02:37:25,402 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9 to 8. [2022-11-03 02:37:25,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 7 states have (on average 1.1428571428571428) internal successors, (8), 7 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:37:25,404 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 8 transitions. [2022-11-03 02:37:25,406 INFO L78 Accepts]: Start accepts. Automaton has 8 states and 8 transitions. Word has length 4 [2022-11-03 02:37:25,406 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:37:25,406 INFO L495 AbstractCegarLoop]: Abstraction has 8 states and 8 transitions. [2022-11-03 02:37:25,406 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 1.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:37:25,406 INFO L276 IsEmpty]: Start isEmpty. Operand 8 states and 8 transitions. [2022-11-03 02:37:25,407 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2022-11-03 02:37:25,407 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:37:25,407 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1] [2022-11-03 02:37:25,407 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-11-03 02:37:25,408 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:37:25,408 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:37:25,408 INFO L85 PathProgramCache]: Analyzing trace with hash -1312104043, now seen corresponding path program 1 times [2022-11-03 02:37:25,409 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-03 02:37:25,409 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1471024852] [2022-11-03 02:37:25,409 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:37:25,409 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-03 02:38:59,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-03 02:38:59,097 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-03 02:40:52,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-03 02:40:52,690 INFO L130 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2022-11-03 02:40:52,690 INFO L359 BasicCegarLoop]: Counterexample is feasible [2022-11-03 02:40:52,692 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-11-03 02:40:52,695 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-11-03 02:40:52,702 INFO L444 BasicCegarLoop]: Path program histogram: [1, 1] [2022-11-03 02:40:52,706 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-03 02:40:52,850 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 02:40:52,853 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 02:40:52,903 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 03.11 02:40:52 BoogieIcfgContainer [2022-11-03 02:40:52,903 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-03 02:40:52,904 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-03 02:40:52,904 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-03 02:40:52,904 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-03 02:40:52,905 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 02:37:16" (3/4) ... [2022-11-03 02:40:52,908 INFO L140 WitnessPrinter]: No result that supports witness generation found [2022-11-03 02:40:52,908 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-03 02:40:52,909 INFO L158 Benchmark]: Toolchain (without parser) took 265111.32ms. Allocated memory was 144.7MB in the beginning and 2.1GB in the end (delta: 2.0GB). Free memory was 111.3MB in the beginning and 873.4MB in the end (delta: -762.1MB). Peak memory consumption was 1.2GB. Max. memory is 16.1GB. [2022-11-03 02:40:52,910 INFO L158 Benchmark]: CDTParser took 0.27ms. Allocated memory is still 92.3MB. Free memory was 46.8MB in the beginning and 46.7MB in the end (delta: 44.3kB). There was no memory consumed. Max. memory is 16.1GB. [2022-11-03 02:40:52,910 INFO L158 Benchmark]: CACSL2BoogieTranslator took 955.86ms. Allocated memory is still 144.7MB. Free memory was 111.3MB in the beginning and 90.4MB in the end (delta: 20.9MB). Peak memory consumption was 21.0MB. Max. memory is 16.1GB. [2022-11-03 02:40:52,911 INFO L158 Benchmark]: Boogie Procedure Inliner took 206.30ms. Allocated memory is still 144.7MB. Free memory was 90.4MB in the beginning and 61.0MB in the end (delta: 29.4MB). Peak memory consumption was 29.4MB. Max. memory is 16.1GB. [2022-11-03 02:40:52,911 INFO L158 Benchmark]: Boogie Preprocessor took 170.43ms. Allocated memory is still 144.7MB. Free memory was 61.0MB in the beginning and 45.5MB in the end (delta: 15.6MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2022-11-03 02:40:52,912 INFO L158 Benchmark]: RCFGBuilder took 47519.98ms. Allocated memory was 144.7MB in the beginning and 627.0MB in the end (delta: 482.3MB). Free memory was 45.5MB in the beginning and 418.8MB in the end (delta: -373.3MB). Peak memory consumption was 335.6MB. Max. memory is 16.1GB. [2022-11-03 02:40:52,913 INFO L158 Benchmark]: TraceAbstraction took 216244.62ms. Allocated memory was 627.0MB in the beginning and 2.1GB in the end (delta: 1.5GB). Free memory was 417.7MB in the beginning and 873.4MB in the end (delta: -455.7MB). Peak memory consumption was 1.2GB. Max. memory is 16.1GB. [2022-11-03 02:40:52,913 INFO L158 Benchmark]: Witness Printer took 4.80ms. Allocated memory is still 2.1GB. Free memory is still 873.4MB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-03 02:40:52,917 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.27ms. Allocated memory is still 92.3MB. Free memory was 46.8MB in the beginning and 46.7MB in the end (delta: 44.3kB). There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 955.86ms. Allocated memory is still 144.7MB. Free memory was 111.3MB in the beginning and 90.4MB in the end (delta: 20.9MB). Peak memory consumption was 21.0MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 206.30ms. Allocated memory is still 144.7MB. Free memory was 90.4MB in the beginning and 61.0MB in the end (delta: 29.4MB). Peak memory consumption was 29.4MB. Max. memory is 16.1GB. * Boogie Preprocessor took 170.43ms. Allocated memory is still 144.7MB. Free memory was 61.0MB in the beginning and 45.5MB in the end (delta: 15.6MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * RCFGBuilder took 47519.98ms. Allocated memory was 144.7MB in the beginning and 627.0MB in the end (delta: 482.3MB). Free memory was 45.5MB in the beginning and 418.8MB in the end (delta: -373.3MB). Peak memory consumption was 335.6MB. Max. memory is 16.1GB. * TraceAbstraction took 216244.62ms. Allocated memory was 627.0MB in the beginning and 2.1GB in the end (delta: 1.5GB). Free memory was 417.7MB in the beginning and 873.4MB in the end (delta: -455.7MB). Peak memory consumption was 1.2GB. Max. memory is 16.1GB. * Witness Printer took 4.80ms. Allocated memory is still 2.1GB. Free memory is still 873.4MB. There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 20]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: overapproximation of bitwiseComplement at line 236, overapproximation of bitwiseOr at line 370, overapproximation of bitwiseAnd at line 166. Possible FailurePath: [L25] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L26] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L28] const SORT_2 mask_SORT_2 = (SORT_2)-1 >> (sizeof(SORT_2) * 8 - 8); [L29] const SORT_2 msb_SORT_2 = (SORT_2)1 << (8 - 1); [L31] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 24); [L32] const SORT_3 msb_SORT_3 = (SORT_3)1 << (24 - 1); [L34] const SORT_4 mask_SORT_4 = (SORT_4)-1 >> (sizeof(SORT_4) * 8 - 32); [L35] const SORT_4 msb_SORT_4 = (SORT_4)1 << (32 - 1); [L37] const SORT_2 var_5 = 0; [L38] const SORT_1 var_20 = 0; [L39] const SORT_2 var_75 = 0; [L40] const SORT_1 var_140 = 1; [L41] const SORT_4 var_143 = 3; [L42] const SORT_3 var_144 = 0; [L43] const SORT_2 var_169 = 1; [L44] const SORT_4 var_328 = 1; [L46] SORT_2 input_92; [L47] SORT_2 input_94; [L48] SORT_2 input_96; [L49] SORT_2 input_98; [L50] SORT_2 input_100; [L51] SORT_2 input_102; [L52] SORT_2 input_104; [L53] SORT_1 input_106; [L54] SORT_1 input_108; [L55] SORT_1 input_110; [L56] SORT_1 input_112; [L57] SORT_1 input_114; [L58] SORT_1 input_116; [L59] SORT_1 input_118; [L60] SORT_1 input_120; [L61] SORT_1 input_122; [L62] SORT_1 input_124; [L63] SORT_1 input_126; [L64] SORT_1 input_128; [L65] SORT_1 input_130; [L66] SORT_1 input_132; [L67] SORT_1 input_134; [L68] SORT_1 input_136; [L69] SORT_1 input_138; [L70] SORT_1 input_142; [L71] SORT_1 input_149; [L72] SORT_1 input_155; [L73] SORT_1 input_159; [L74] SORT_1 input_162; [L75] SORT_1 input_167; [L76] SORT_1 input_175; [L77] SORT_1 input_179; [L78] SORT_1 input_182; [L79] SORT_1 input_187; [L80] SORT_1 input_193; [L81] SORT_1 input_199; [L82] SORT_1 input_205; [L84] SORT_2 state_6 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L85] SORT_2 state_8 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L86] SORT_2 state_10 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L87] SORT_2 state_12 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L88] SORT_2 state_14 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L89] SORT_2 state_16 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L90] SORT_2 state_18 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L91] SORT_1 state_21 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L92] SORT_1 state_23 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L93] SORT_1 state_25 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L94] SORT_1 state_27 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L95] SORT_1 state_29 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L96] SORT_1 state_31 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L97] SORT_1 state_33 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L98] SORT_1 state_35 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L99] SORT_1 state_37 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L100] SORT_1 state_39 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L101] SORT_1 state_41 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L102] SORT_1 state_43 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L103] SORT_1 state_45 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L104] SORT_1 state_47 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L105] SORT_1 state_49 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L106] SORT_1 state_51 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L107] SORT_1 state_53 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L108] SORT_1 state_55 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L109] SORT_1 state_57 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L111] SORT_2 init_7_arg_1 = var_5; [L112] state_6 = init_7_arg_1 [L113] SORT_2 init_9_arg_1 = var_5; [L114] state_8 = init_9_arg_1 [L115] SORT_2 init_11_arg_1 = var_5; [L116] state_10 = init_11_arg_1 [L117] SORT_2 init_13_arg_1 = var_5; [L118] state_12 = init_13_arg_1 [L119] SORT_2 init_15_arg_1 = var_5; [L120] state_14 = init_15_arg_1 [L121] SORT_2 init_17_arg_1 = var_5; [L122] state_16 = init_17_arg_1 [L123] SORT_2 init_19_arg_1 = var_5; [L124] state_18 = init_19_arg_1 [L125] SORT_1 init_22_arg_1 = var_20; [L126] state_21 = init_22_arg_1 [L127] SORT_1 init_24_arg_1 = var_20; [L128] state_23 = init_24_arg_1 [L129] SORT_1 init_26_arg_1 = var_20; [L130] state_25 = init_26_arg_1 [L131] SORT_1 init_28_arg_1 = var_20; [L132] state_27 = init_28_arg_1 [L133] SORT_1 init_30_arg_1 = var_20; [L134] state_29 = init_30_arg_1 [L135] SORT_1 init_32_arg_1 = var_20; [L136] state_31 = init_32_arg_1 [L137] SORT_1 init_34_arg_1 = var_20; [L138] state_33 = init_34_arg_1 [L139] SORT_1 init_36_arg_1 = var_20; [L140] state_35 = init_36_arg_1 [L141] SORT_1 init_38_arg_1 = var_20; [L142] state_37 = init_38_arg_1 [L143] SORT_1 init_40_arg_1 = var_20; [L144] state_39 = init_40_arg_1 [L145] SORT_1 init_42_arg_1 = var_20; [L146] state_41 = init_42_arg_1 [L147] SORT_1 init_44_arg_1 = var_20; [L148] state_43 = init_44_arg_1 [L149] SORT_1 init_46_arg_1 = var_20; [L150] state_45 = init_46_arg_1 [L151] SORT_1 init_48_arg_1 = var_20; [L152] state_47 = init_48_arg_1 [L153] SORT_1 init_50_arg_1 = var_20; [L154] state_49 = init_50_arg_1 [L155] SORT_1 init_52_arg_1 = var_20; [L156] state_51 = init_52_arg_1 [L157] SORT_1 init_54_arg_1 = var_20; [L158] state_53 = init_54_arg_1 [L159] SORT_1 init_56_arg_1 = var_20; [L160] state_55 = init_56_arg_1 [L161] SORT_1 init_58_arg_1 = var_20; [L162] state_57 = init_58_arg_1 VAL [init_11_arg_1=0, init_13_arg_1=0, init_15_arg_1=0, init_17_arg_1=0, init_19_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_28_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, init_44_arg_1=0, init_46_arg_1=0, init_48_arg_1=0, init_50_arg_1=0, init_52_arg_1=0, init_54_arg_1=0, init_56_arg_1=0, init_58_arg_1=0, init_7_arg_1=0, init_9_arg_1=0, mask_SORT_1=1, mask_SORT_2=255, mask_SORT_3=4294967295, mask_SORT_4=4294967295, msb_SORT_1=1, msb_SORT_2=128, msb_SORT_3=8388608, msb_SORT_4=2147483648, state_10=0, state_12=0, state_14=0, state_16=0, state_18=0, state_21=0, state_23=0, state_25=0, state_27=0, state_29=0, state_31=0, state_33=0, state_35=0, state_37=0, state_39=0, state_41=0, state_43=0, state_45=0, state_47=0, state_49=0, state_51=0, state_53=0, state_55=0, state_57=0, state_6=0, state_8=0, var_140=1, var_143=3, var_144=0, var_169=1, var_20=0, var_328=1, var_5=0, var_75=0] [L165] input_92 = __VERIFIER_nondet_uchar() [L166] input_92 = input_92 & mask_SORT_2 [L167] input_94 = __VERIFIER_nondet_uchar() [L168] input_94 = input_94 & mask_SORT_2 [L169] input_96 = __VERIFIER_nondet_uchar() [L170] input_96 = input_96 & mask_SORT_2 [L171] input_98 = __VERIFIER_nondet_uchar() [L172] input_98 = input_98 & mask_SORT_2 [L173] input_100 = __VERIFIER_nondet_uchar() [L174] input_100 = input_100 & mask_SORT_2 [L175] input_102 = __VERIFIER_nondet_uchar() [L176] input_102 = input_102 & mask_SORT_2 [L177] input_104 = __VERIFIER_nondet_uchar() [L178] input_104 = input_104 & mask_SORT_2 [L179] input_106 = __VERIFIER_nondet_uchar() [L180] input_106 = input_106 & mask_SORT_1 [L181] input_108 = __VERIFIER_nondet_uchar() [L182] input_108 = input_108 & mask_SORT_1 [L183] input_110 = __VERIFIER_nondet_uchar() [L184] input_110 = input_110 & mask_SORT_1 [L185] input_112 = __VERIFIER_nondet_uchar() [L186] input_112 = input_112 & mask_SORT_1 [L187] input_114 = __VERIFIER_nondet_uchar() [L188] input_114 = input_114 & mask_SORT_1 [L189] input_116 = __VERIFIER_nondet_uchar() [L190] input_116 = input_116 & mask_SORT_1 [L191] input_118 = __VERIFIER_nondet_uchar() [L192] input_118 = input_118 & mask_SORT_1 [L193] input_120 = __VERIFIER_nondet_uchar() [L194] input_120 = input_120 & mask_SORT_1 [L195] input_122 = __VERIFIER_nondet_uchar() [L196] input_122 = input_122 & mask_SORT_1 [L197] input_124 = __VERIFIER_nondet_uchar() [L198] input_124 = input_124 & mask_SORT_1 [L199] input_126 = __VERIFIER_nondet_uchar() [L200] input_126 = input_126 & mask_SORT_1 [L201] input_128 = __VERIFIER_nondet_uchar() [L202] input_128 = input_128 & mask_SORT_1 [L203] input_130 = __VERIFIER_nondet_uchar() [L204] input_130 = input_130 & mask_SORT_1 [L205] input_132 = __VERIFIER_nondet_uchar() [L206] input_132 = input_132 & mask_SORT_1 [L207] input_134 = __VERIFIER_nondet_uchar() [L208] input_134 = input_134 & mask_SORT_1 [L209] input_136 = __VERIFIER_nondet_uchar() [L210] input_136 = input_136 & mask_SORT_1 [L211] input_138 = __VERIFIER_nondet_uchar() [L212] input_138 = input_138 & mask_SORT_1 [L213] input_142 = __VERIFIER_nondet_uchar() [L214] input_142 = input_142 & mask_SORT_1 [L215] input_149 = __VERIFIER_nondet_uchar() [L216] input_149 = input_149 & mask_SORT_1 [L217] input_155 = __VERIFIER_nondet_uchar() [L218] input_159 = __VERIFIER_nondet_uchar() [L219] input_162 = __VERIFIER_nondet_uchar() [L220] input_167 = __VERIFIER_nondet_uchar() [L221] input_175 = __VERIFIER_nondet_uchar() [L222] input_179 = __VERIFIER_nondet_uchar() [L223] input_182 = __VERIFIER_nondet_uchar() [L224] input_182 = input_182 & mask_SORT_1 [L225] input_187 = __VERIFIER_nondet_uchar() [L226] input_187 = input_187 & mask_SORT_1 [L227] input_193 = __VERIFIER_nondet_uchar() [L228] input_193 = input_193 & mask_SORT_1 [L229] input_199 = __VERIFIER_nondet_uchar() [L230] input_199 = input_199 & mask_SORT_1 [L231] input_205 = __VERIFIER_nondet_uchar() [L232] input_205 = input_205 & mask_SORT_1 [L235] SORT_1 var_59_arg_0 = state_21; [L236] SORT_1 var_59_arg_1 = ~state_23; [L237] var_59_arg_1 = var_59_arg_1 & mask_SORT_1 [L238] SORT_1 var_59 = var_59_arg_0 & var_59_arg_1; [L239] SORT_1 var_60_arg_0 = var_59; [L240] SORT_1 var_60_arg_1 = ~state_25; [L241] var_60_arg_1 = var_60_arg_1 & mask_SORT_1 [L242] SORT_1 var_60 = var_60_arg_0 & var_60_arg_1; [L243] SORT_1 var_61_arg_0 = var_60; [L244] SORT_1 var_61_arg_1 = state_27; [L245] SORT_1 var_61 = var_61_arg_0 & var_61_arg_1; [L246] SORT_1 var_62_arg_0 = var_61; [L247] SORT_1 var_62_arg_1 = ~state_29; [L248] var_62_arg_1 = var_62_arg_1 & mask_SORT_1 [L249] SORT_1 var_62 = var_62_arg_0 & var_62_arg_1; [L250] SORT_1 var_63_arg_0 = var_62; [L251] SORT_1 var_63_arg_1 = ~state_31; [L252] var_63_arg_1 = var_63_arg_1 & mask_SORT_1 [L253] SORT_1 var_63 = var_63_arg_0 & var_63_arg_1; [L254] SORT_1 var_64_arg_0 = var_63; [L255] SORT_1 var_64_arg_1 = state_33; [L256] SORT_1 var_64 = var_64_arg_0 & var_64_arg_1; [L257] SORT_1 var_65_arg_0 = var_64; [L258] SORT_1 var_65_arg_1 = ~state_35; [L259] var_65_arg_1 = var_65_arg_1 & mask_SORT_1 [L260] SORT_1 var_65 = var_65_arg_0 & var_65_arg_1; [L261] SORT_1 var_66_arg_0 = var_65; [L262] SORT_1 var_66_arg_1 = ~state_37; [L263] var_66_arg_1 = var_66_arg_1 & mask_SORT_1 [L264] SORT_1 var_66 = var_66_arg_0 & var_66_arg_1; [L265] SORT_1 var_67_arg_0 = var_66; [L266] SORT_1 var_67_arg_1 = state_39; [L267] SORT_1 var_67 = var_67_arg_0 & var_67_arg_1; [L268] SORT_1 var_68_arg_0 = var_67; [L269] SORT_1 var_68_arg_1 = ~state_41; [L270] var_68_arg_1 = var_68_arg_1 & mask_SORT_1 [L271] SORT_1 var_68 = var_68_arg_0 & var_68_arg_1; [L272] SORT_1 var_69_arg_0 = var_68; [L273] SORT_1 var_69_arg_1 = ~state_43; [L274] var_69_arg_1 = var_69_arg_1 & mask_SORT_1 [L275] SORT_1 var_69 = var_69_arg_0 & var_69_arg_1; [L276] SORT_1 var_70_arg_0 = var_69; [L277] SORT_1 var_70_arg_1 = ~state_45; [L278] var_70_arg_1 = var_70_arg_1 & mask_SORT_1 [L279] SORT_1 var_70 = var_70_arg_0 & var_70_arg_1; [L280] SORT_1 var_71_arg_0 = var_70; [L281] SORT_1 var_71_arg_1 = state_47; [L282] SORT_1 var_71 = var_71_arg_0 & var_71_arg_1; [L283] SORT_1 var_72_arg_0 = var_71; [L284] SORT_1 var_72_arg_1 = ~state_49; [L285] var_72_arg_1 = var_72_arg_1 & mask_SORT_1 [L286] SORT_1 var_72 = var_72_arg_0 & var_72_arg_1; [L287] SORT_1 var_73_arg_0 = var_72; [L288] SORT_1 var_73_arg_1 = state_51; [L289] SORT_1 var_73 = var_73_arg_0 & var_73_arg_1; [L290] SORT_1 var_74_arg_0 = var_73; [L291] SORT_1 var_74_arg_1 = ~state_53; [L292] var_74_arg_1 = var_74_arg_1 & mask_SORT_1 [L293] SORT_1 var_74 = var_74_arg_0 & var_74_arg_1; [L294] SORT_2 var_76_arg_0 = var_75; [L295] SORT_2 var_76_arg_1 = state_6; [L296] SORT_1 var_76 = var_76_arg_0 == var_76_arg_1; [L297] SORT_1 var_77_arg_0 = var_74; [L298] SORT_1 var_77_arg_1 = var_76; [L299] SORT_1 var_77 = var_77_arg_0 & var_77_arg_1; [L300] SORT_2 var_78_arg_0 = var_75; [L301] SORT_2 var_78_arg_1 = state_8; [L302] SORT_1 var_78 = var_78_arg_0 == var_78_arg_1; [L303] SORT_1 var_79_arg_0 = var_77; [L304] SORT_1 var_79_arg_1 = var_78; [L305] SORT_1 var_79 = var_79_arg_0 & var_79_arg_1; [L306] SORT_2 var_80_arg_0 = var_75; [L307] SORT_2 var_80_arg_1 = state_10; [L308] SORT_1 var_80 = var_80_arg_0 == var_80_arg_1; [L309] SORT_1 var_81_arg_0 = var_79; [L310] SORT_1 var_81_arg_1 = var_80; [L311] SORT_1 var_81 = var_81_arg_0 & var_81_arg_1; [L312] SORT_2 var_82_arg_0 = var_75; [L313] SORT_2 var_82_arg_1 = state_12; [L314] SORT_1 var_82 = var_82_arg_0 == var_82_arg_1; [L315] SORT_1 var_83_arg_0 = var_81; [L316] SORT_1 var_83_arg_1 = var_82; [L317] SORT_1 var_83 = var_83_arg_0 & var_83_arg_1; [L318] SORT_2 var_84_arg_0 = var_75; [L319] SORT_2 var_84_arg_1 = state_14; [L320] SORT_1 var_84 = var_84_arg_0 == var_84_arg_1; [L321] SORT_1 var_85_arg_0 = var_83; [L322] SORT_1 var_85_arg_1 = var_84; [L323] SORT_1 var_85 = var_85_arg_0 & var_85_arg_1; [L324] SORT_2 var_86_arg_0 = var_75; [L325] SORT_2 var_86_arg_1 = state_16; [L326] SORT_1 var_86 = var_86_arg_0 == var_86_arg_1; [L327] SORT_1 var_87_arg_0 = var_85; [L328] SORT_1 var_87_arg_1 = var_86; [L329] SORT_1 var_87 = var_87_arg_0 & var_87_arg_1; [L330] SORT_2 var_88_arg_0 = var_75; [L331] SORT_2 var_88_arg_1 = state_18; [L332] SORT_1 var_88 = var_88_arg_0 == var_88_arg_1; [L333] SORT_1 var_89_arg_0 = var_87; [L334] SORT_1 var_89_arg_1 = var_88; [L335] SORT_1 var_89 = var_89_arg_0 & var_89_arg_1; [L336] SORT_1 var_90_arg_0 = state_57; [L337] SORT_1 var_90_arg_1 = var_89; [L338] SORT_1 var_90 = var_90_arg_0 & var_90_arg_1; [L339] var_90 = var_90 & mask_SORT_1 [L340] SORT_1 bad_91_arg_0 = var_90; [L341] CALL __VERIFIER_assert(!(bad_91_arg_0)) [L20] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L341] RET __VERIFIER_assert(!(bad_91_arg_0)) [L343] SORT_2 next_93_arg_1 = input_92; [L344] SORT_2 next_95_arg_1 = input_94; [L345] SORT_2 next_97_arg_1 = input_96; [L346] SORT_2 next_99_arg_1 = input_98; [L347] SORT_2 next_101_arg_1 = input_100; [L348] SORT_2 next_103_arg_1 = input_102; [L349] SORT_2 next_105_arg_1 = input_104; [L350] SORT_1 next_107_arg_1 = input_106; [L351] SORT_1 next_109_arg_1 = input_108; [L352] SORT_1 next_111_arg_1 = input_110; [L353] SORT_1 next_113_arg_1 = input_112; [L354] SORT_1 next_115_arg_1 = input_114; [L355] SORT_1 next_117_arg_1 = input_116; [L356] SORT_1 next_119_arg_1 = input_118; [L357] SORT_1 next_121_arg_1 = input_120; [L358] SORT_1 next_123_arg_1 = input_122; [L359] SORT_1 next_125_arg_1 = input_124; [L360] SORT_1 next_127_arg_1 = input_126; [L361] SORT_1 next_129_arg_1 = input_128; [L362] SORT_1 next_131_arg_1 = input_130; [L363] SORT_1 next_133_arg_1 = input_132; [L364] SORT_1 next_135_arg_1 = input_134; [L365] SORT_1 next_137_arg_1 = input_136; [L366] SORT_1 next_139_arg_1 = input_138; [L367] SORT_1 next_141_arg_1 = var_140; [L368] SORT_3 var_145_arg_0 = var_144; [L369] SORT_2 var_145_arg_1 = input_94; [L370] SORT_4 var_145 = ((SORT_4)var_145_arg_0 << 8) | var_145_arg_1; [L371] var_145 = var_145 & mask_SORT_4 [L372] SORT_4 var_146_arg_0 = var_143; [L373] SORT_4 var_146_arg_1 = var_145; [L374] SORT_1 var_146 = var_146_arg_0 <= var_146_arg_1; [L375] SORT_1 var_147_arg_0 = input_108; [L376] SORT_1 var_147_arg_1 = ~var_146; [L377] var_147_arg_1 = var_147_arg_1 & mask_SORT_1 [L378] SORT_1 var_147 = var_147_arg_0 & var_147_arg_1; [L379] SORT_1 var_148_arg_0 = ~input_142; [L380] var_148_arg_0 = var_148_arg_0 & mask_SORT_1 [L381] SORT_1 var_148_arg_1 = var_147; [L382] SORT_1 var_148 = var_148_arg_0 | var_148_arg_1; [L383] SORT_3 var_150_arg_0 = var_144; [L384] SORT_2 var_150_arg_1 = input_98; [L385] SORT_4 var_150 = ((SORT_4)var_150_arg_0 << 8) | var_150_arg_1; [L386] var_150 = var_150 & mask_SORT_4 [L387] SORT_4 var_151_arg_0 = var_143; [L388] SORT_4 var_151_arg_1 = var_150; [L389] SORT_1 var_151 = var_151_arg_0 <= var_151_arg_1; [L390] SORT_1 var_152_arg_0 = input_114; [L391] SORT_1 var_152_arg_1 = ~var_151; [L392] var_152_arg_1 = var_152_arg_1 & mask_SORT_1 [L393] SORT_1 var_152 = var_152_arg_0 & var_152_arg_1; [L394] SORT_1 var_153_arg_0 = ~input_149; [L395] var_153_arg_0 = var_153_arg_0 & mask_SORT_1 [L396] SORT_1 var_153_arg_1 = var_152; [L397] SORT_1 var_153 = var_153_arg_0 | var_153_arg_1; [L398] SORT_1 var_154_arg_0 = var_148; [L399] SORT_1 var_154_arg_1 = var_153; [L400] SORT_1 var_154 = var_154_arg_0 & var_154_arg_1; [L401] SORT_1 var_156_arg_0 = input_118; [L402] SORT_1 var_156_arg_1 = ~input_155; [L403] var_156_arg_1 = var_156_arg_1 & mask_SORT_1 [L404] SORT_1 var_156 = var_156_arg_0 | var_156_arg_1; [L405] SORT_1 var_157_arg_0 = var_154; [L406] SORT_1 var_157_arg_1 = var_156; [L407] SORT_1 var_157 = var_157_arg_0 & var_157_arg_1; [L408] SORT_1 var_158_arg_0 = input_118; [L409] SORT_1 var_158_arg_1 = ~input_155; [L410] var_158_arg_1 = var_158_arg_1 & mask_SORT_1 [L411] SORT_1 var_158 = var_158_arg_0 & var_158_arg_1; [L412] SORT_1 var_160_arg_0 = var_158; [L413] SORT_1 var_160_arg_1 = ~input_159; [L414] var_160_arg_1 = var_160_arg_1 & mask_SORT_1 [L415] SORT_1 var_160 = var_160_arg_0 | var_160_arg_1; [L416] SORT_1 var_161_arg_0 = var_157; [L417] SORT_1 var_161_arg_1 = var_160; [L418] SORT_1 var_161 = var_161_arg_0 & var_161_arg_1; [L419] SORT_2 var_163_arg_0 = var_75; [L420] SORT_2 var_163_arg_1 = input_100; [L421] SORT_1 var_163 = var_163_arg_0 == var_163_arg_1; [L422] SORT_1 var_164_arg_0 = input_126; [L423] SORT_1 var_164_arg_1 = var_163; [L424] SORT_1 var_164 = var_164_arg_0 & var_164_arg_1; [L425] SORT_1 var_165_arg_0 = ~input_162; [L426] var_165_arg_0 = var_165_arg_0 & mask_SORT_1 [L427] SORT_1 var_165_arg_1 = var_164; [L428] SORT_1 var_165 = var_165_arg_0 | var_165_arg_1; [L429] SORT_1 var_166_arg_0 = var_161; [L430] SORT_1 var_166_arg_1 = var_165; [L431] SORT_1 var_166 = var_166_arg_0 & var_166_arg_1; [L432] SORT_1 var_168_arg_0 = input_126; [L433] SORT_1 var_168_arg_1 = ~input_162; [L434] var_168_arg_1 = var_168_arg_1 & mask_SORT_1 [L435] SORT_1 var_168 = var_168_arg_0 & var_168_arg_1; [L436] SORT_2 var_170_arg_0 = var_169; [L437] SORT_2 var_170_arg_1 = input_100; [L438] SORT_1 var_170 = var_170_arg_0 == var_170_arg_1; [L439] SORT_1 var_171_arg_0 = var_168; [L440] SORT_1 var_171_arg_1 = var_170; [L441] SORT_1 var_171 = var_171_arg_0 & var_171_arg_1; [L442] SORT_1 var_172_arg_0 = ~input_167; [L443] var_172_arg_0 = var_172_arg_0 & mask_SORT_1 [L444] SORT_1 var_172_arg_1 = var_171; [L445] SORT_1 var_172 = var_172_arg_0 | var_172_arg_1; [L446] SORT_1 var_173_arg_0 = var_166; [L447] SORT_1 var_173_arg_1 = var_172; [L448] SORT_1 var_173 = var_173_arg_0 & var_173_arg_1; [L449] SORT_1 var_174_arg_0 = input_128; [L450] SORT_1 var_174_arg_1 = input_162; [L451] SORT_1 var_174 = var_174_arg_0 | var_174_arg_1; [L452] SORT_1 var_176_arg_0 = var_174; [L453] SORT_1 var_176_arg_1 = ~input_175; [L454] var_176_arg_1 = var_176_arg_1 & mask_SORT_1 [L455] SORT_1 var_176 = var_176_arg_0 | var_176_arg_1; [L456] SORT_1 var_177_arg_0 = var_173; [L457] SORT_1 var_177_arg_1 = var_176; [L458] SORT_1 var_177 = var_177_arg_0 & var_177_arg_1; [L459] SORT_1 var_178_arg_0 = input_130; [L460] SORT_1 var_178_arg_1 = input_167; [L461] SORT_1 var_178 = var_178_arg_0 | var_178_arg_1; [L462] SORT_1 var_180_arg_0 = var_178; [L463] SORT_1 var_180_arg_1 = ~input_179; [L464] var_180_arg_1 = var_180_arg_1 & mask_SORT_1 [L465] SORT_1 var_180 = var_180_arg_0 | var_180_arg_1; [L466] SORT_1 var_181_arg_0 = var_177; [L467] SORT_1 var_181_arg_1 = var_180; [L468] SORT_1 var_181 = var_181_arg_0 & var_181_arg_1; [L469] SORT_1 var_183_arg_0 = input_106; [L470] SORT_1 var_183_arg_1 = input_142; [L471] SORT_1 var_183 = var_183_arg_0 | var_183_arg_1; [L472] SORT_1 var_184_arg_0 = input_134; [L473] SORT_1 var_184_arg_1 = var_183; [L474] SORT_1 var_184 = var_184_arg_0 & var_184_arg_1; [L475] SORT_1 var_185_arg_0 = ~input_182; [L476] var_185_arg_0 = var_185_arg_0 & mask_SORT_1 [L477] SORT_1 var_185_arg_1 = var_184; [L478] SORT_1 var_185 = var_185_arg_0 | var_185_arg_1; [L479] SORT_1 var_186_arg_0 = var_181; [L480] SORT_1 var_186_arg_1 = var_185; [L481] SORT_1 var_186 = var_186_arg_0 & var_186_arg_1; [L482] SORT_1 var_188_arg_0 = input_108; [L483] SORT_1 var_188_arg_1 = ~input_142; [L484] var_188_arg_1 = var_188_arg_1 & mask_SORT_1 [L485] SORT_1 var_188 = var_188_arg_0 & var_188_arg_1; [L486] SORT_1 var_189_arg_0 = var_188; [L487] SORT_1 var_189_arg_1 = input_182; [L488] SORT_1 var_189 = var_189_arg_0 | var_189_arg_1; [L489] SORT_1 var_190_arg_0 = input_136; [L490] SORT_1 var_190_arg_1 = var_189; [L491] SORT_1 var_190 = var_190_arg_0 & var_190_arg_1; [L492] SORT_1 var_191_arg_0 = ~input_187; [L493] var_191_arg_0 = var_191_arg_0 & mask_SORT_1 [L494] SORT_1 var_191_arg_1 = var_190; [L495] SORT_1 var_191 = var_191_arg_0 | var_191_arg_1; [L496] SORT_1 var_192_arg_0 = var_186; [L497] SORT_1 var_192_arg_1 = var_191; [L498] SORT_1 var_192 = var_192_arg_0 & var_192_arg_1; [L499] SORT_1 var_194_arg_0 = input_120; [L500] SORT_1 var_194_arg_1 = input_155; [L501] SORT_1 var_194 = var_194_arg_0 | var_194_arg_1; [L502] SORT_1 var_195_arg_0 = input_132; [L503] SORT_1 var_195_arg_1 = input_182; [L504] SORT_1 var_195 = var_195_arg_0 | var_195_arg_1; [L505] SORT_1 var_196_arg_0 = var_194; [L506] SORT_1 var_196_arg_1 = var_195; [L507] SORT_1 var_196 = var_196_arg_0 & var_196_arg_1; [L508] SORT_1 var_197_arg_0 = ~input_193; [L509] var_197_arg_0 = var_197_arg_0 & mask_SORT_1 [L510] SORT_1 var_197_arg_1 = var_196; [L511] SORT_1 var_197 = var_197_arg_0 | var_197_arg_1; [L512] SORT_1 var_198_arg_0 = var_192; [L513] SORT_1 var_198_arg_1 = var_197; [L514] SORT_1 var_198 = var_198_arg_0 & var_198_arg_1; [L515] SORT_1 var_200_arg_0 = input_122; [L516] SORT_1 var_200_arg_1 = input_159; [L517] SORT_1 var_200 = var_200_arg_0 | var_200_arg_1; [L518] SORT_1 var_201_arg_0 = var_195; [L519] SORT_1 var_201_arg_1 = ~input_193; [L520] var_201_arg_1 = var_201_arg_1 & mask_SORT_1 [L521] SORT_1 var_201 = var_201_arg_0 & var_201_arg_1; [L522] SORT_1 var_202_arg_0 = var_200; [L523] SORT_1 var_202_arg_1 = var_201; [L524] SORT_1 var_202 = var_202_arg_0 & var_202_arg_1; [L525] SORT_1 var_203_arg_0 = ~input_199; [L526] var_203_arg_0 = var_203_arg_0 & mask_SORT_1 [L527] SORT_1 var_203_arg_1 = var_202; [L528] SORT_1 var_203 = var_203_arg_0 | var_203_arg_1; [L529] SORT_1 var_204_arg_0 = var_198; [L530] SORT_1 var_204_arg_1 = var_203; [L531] SORT_1 var_204 = var_204_arg_0 & var_204_arg_1; [L532] SORT_1 var_206_arg_0 = input_124; [L533] SORT_1 var_206_arg_1 = input_175; [L534] SORT_1 var_206 = var_206_arg_0 | var_206_arg_1; [L535] SORT_1 var_207_arg_0 = var_206; [L536] SORT_1 var_207_arg_1 = input_179; [L537] SORT_1 var_207 = var_207_arg_0 | var_207_arg_1; [L538] SORT_1 var_208_arg_0 = input_138; [L539] SORT_1 var_208_arg_1 = input_187; [L540] SORT_1 var_208 = var_208_arg_0 | var_208_arg_1; [L541] SORT_1 var_209_arg_0 = var_207; [L542] SORT_1 var_209_arg_1 = var_208; [L543] SORT_1 var_209 = var_209_arg_0 & var_209_arg_1; [L544] SORT_1 var_210_arg_0 = ~input_205; [L545] var_210_arg_0 = var_210_arg_0 & mask_SORT_1 [L546] SORT_1 var_210_arg_1 = var_209; [L547] SORT_1 var_210 = var_210_arg_0 | var_210_arg_1; [L548] SORT_1 var_211_arg_0 = var_204; [L549] SORT_1 var_211_arg_1 = var_210; [L550] SORT_1 var_211 = var_211_arg_0 & var_211_arg_1; [L551] SORT_1 var_212_arg_0 = input_142; [L552] SORT_1 var_212_arg_1 = input_149; [L553] SORT_1 var_212 = var_212_arg_0 | var_212_arg_1; [L554] SORT_1 var_213_arg_0 = input_155; [L555] SORT_1 var_213_arg_1 = var_212; [L556] SORT_1 var_213 = var_213_arg_0 | var_213_arg_1; [L557] SORT_1 var_214_arg_0 = input_159; [L558] SORT_1 var_214_arg_1 = var_213; [L559] SORT_1 var_214 = var_214_arg_0 | var_214_arg_1; [L560] SORT_1 var_215_arg_0 = input_162; [L561] SORT_1 var_215_arg_1 = var_214; [L562] SORT_1 var_215 = var_215_arg_0 | var_215_arg_1; [L563] SORT_1 var_216_arg_0 = input_167; [L564] SORT_1 var_216_arg_1 = var_215; [L565] SORT_1 var_216 = var_216_arg_0 | var_216_arg_1; [L566] SORT_1 var_217_arg_0 = input_175; [L567] SORT_1 var_217_arg_1 = var_216; [L568] SORT_1 var_217 = var_217_arg_0 | var_217_arg_1; [L569] SORT_1 var_218_arg_0 = input_179; [L570] SORT_1 var_218_arg_1 = var_217; [L571] SORT_1 var_218 = var_218_arg_0 | var_218_arg_1; [L572] SORT_1 var_219_arg_0 = input_182; [L573] SORT_1 var_219_arg_1 = var_218; [L574] SORT_1 var_219 = var_219_arg_0 | var_219_arg_1; [L575] SORT_1 var_220_arg_0 = input_187; [L576] SORT_1 var_220_arg_1 = var_219; [L577] SORT_1 var_220 = var_220_arg_0 | var_220_arg_1; [L578] SORT_1 var_221_arg_0 = input_193; [L579] SORT_1 var_221_arg_1 = var_220; [L580] SORT_1 var_221 = var_221_arg_0 | var_221_arg_1; [L581] SORT_1 var_222_arg_0 = input_199; [L582] SORT_1 var_222_arg_1 = var_221; [L583] SORT_1 var_222 = var_222_arg_0 | var_222_arg_1; [L584] SORT_1 var_223_arg_0 = input_205; [L585] SORT_1 var_223_arg_1 = var_222; [L586] SORT_1 var_223 = var_223_arg_0 | var_223_arg_1; [L587] SORT_1 var_224_arg_0 = var_211; [L588] SORT_1 var_224_arg_1 = var_223; [L589] SORT_1 var_224 = var_224_arg_0 & var_224_arg_1; [L590] SORT_1 var_225_arg_0 = input_106; [L591] SORT_1 var_225_arg_1 = input_108; [L592] SORT_1 var_225 = var_225_arg_0 & var_225_arg_1; [L593] SORT_1 var_226_arg_0 = input_106; [L594] SORT_1 var_226_arg_1 = input_108; [L595] SORT_1 var_226 = var_226_arg_0 | var_226_arg_1; [L596] SORT_1 var_227_arg_0 = input_110; [L597] SORT_1 var_227_arg_1 = var_226; [L598] SORT_1 var_227 = var_227_arg_0 & var_227_arg_1; [L599] SORT_1 var_228_arg_0 = var_225; [L600] SORT_1 var_228_arg_1 = var_227; [L601] SORT_1 var_228 = var_228_arg_0 | var_228_arg_1; [L602] SORT_1 var_229_arg_0 = input_110; [L603] SORT_1 var_229_arg_1 = var_226; [L604] SORT_1 var_229 = var_229_arg_0 | var_229_arg_1; [L605] SORT_1 var_230_arg_0 = ~var_228; [L606] var_230_arg_0 = var_230_arg_0 & mask_SORT_1 [L607] SORT_1 var_230_arg_1 = var_229; [L608] SORT_1 var_230 = var_230_arg_0 & var_230_arg_1; [L609] SORT_1 var_231_arg_0 = input_112; [L610] SORT_1 var_231_arg_1 = input_114; [L611] SORT_1 var_231 = var_231_arg_0 & var_231_arg_1; [L612] SORT_1 var_232_arg_0 = input_112; [L613] SORT_1 var_232_arg_1 = input_114; [L614] SORT_1 var_232 = var_232_arg_0 | var_232_arg_1; [L615] SORT_1 var_233_arg_0 = input_116; [L616] SORT_1 var_233_arg_1 = var_232; [L617] SORT_1 var_233 = var_233_arg_0 & var_233_arg_1; [L618] SORT_1 var_234_arg_0 = var_231; [L619] SORT_1 var_234_arg_1 = var_233; [L620] SORT_1 var_234 = var_234_arg_0 | var_234_arg_1; [L621] SORT_1 var_235_arg_0 = var_230; [L622] SORT_1 var_235_arg_1 = ~var_234; [L623] var_235_arg_1 = var_235_arg_1 & mask_SORT_1 [L624] SORT_1 var_235 = var_235_arg_0 & var_235_arg_1; [L625] SORT_1 var_236_arg_0 = input_116; [L626] SORT_1 var_236_arg_1 = var_232; [L627] SORT_1 var_236 = var_236_arg_0 | var_236_arg_1; [L628] SORT_1 var_237_arg_0 = var_235; [L629] SORT_1 var_237_arg_1 = var_236; [L630] SORT_1 var_237 = var_237_arg_0 & var_237_arg_1; [L631] SORT_1 var_238_arg_0 = input_118; [L632] SORT_1 var_238_arg_1 = input_120; [L633] SORT_1 var_238 = var_238_arg_0 & var_238_arg_1; [L634] SORT_1 var_239_arg_0 = input_118; [L635] SORT_1 var_239_arg_1 = input_120; [L636] SORT_1 var_239 = var_239_arg_0 | var_239_arg_1; [L637] SORT_1 var_240_arg_0 = input_122; [L638] SORT_1 var_240_arg_1 = var_239; [L639] SORT_1 var_240 = var_240_arg_0 & var_240_arg_1; [L640] SORT_1 var_241_arg_0 = var_238; [L641] SORT_1 var_241_arg_1 = var_240; [L642] SORT_1 var_241 = var_241_arg_0 | var_241_arg_1; [L643] SORT_1 var_242_arg_0 = var_237; [L644] SORT_1 var_242_arg_1 = ~var_241; [L645] var_242_arg_1 = var_242_arg_1 & mask_SORT_1 [L646] SORT_1 var_242 = var_242_arg_0 & var_242_arg_1; [L647] SORT_1 var_243_arg_0 = input_122; [L648] SORT_1 var_243_arg_1 = var_239; [L649] SORT_1 var_243 = var_243_arg_0 | var_243_arg_1; [L650] SORT_1 var_244_arg_0 = var_242; [L651] SORT_1 var_244_arg_1 = var_243; [L652] SORT_1 var_244 = var_244_arg_0 & var_244_arg_1; [L653] SORT_1 var_245_arg_0 = input_124; [L654] SORT_1 var_245_arg_1 = input_126; [L655] SORT_1 var_245 = var_245_arg_0 & var_245_arg_1; [L656] SORT_1 var_246_arg_0 = input_124; [L657] SORT_1 var_246_arg_1 = input_126; [L658] SORT_1 var_246 = var_246_arg_0 | var_246_arg_1; [L659] SORT_1 var_247_arg_0 = input_128; [L660] SORT_1 var_247_arg_1 = var_246; [L661] SORT_1 var_247 = var_247_arg_0 & var_247_arg_1; [L662] SORT_1 var_248_arg_0 = var_245; [L663] SORT_1 var_248_arg_1 = var_247; [L664] SORT_1 var_248 = var_248_arg_0 | var_248_arg_1; [L665] SORT_1 var_249_arg_0 = input_128; [L666] SORT_1 var_249_arg_1 = var_246; [L667] SORT_1 var_249 = var_249_arg_0 | var_249_arg_1; [L668] SORT_1 var_250_arg_0 = input_130; [L669] SORT_1 var_250_arg_1 = var_249; [L670] SORT_1 var_250 = var_250_arg_0 & var_250_arg_1; [L671] SORT_1 var_251_arg_0 = var_248; [L672] SORT_1 var_251_arg_1 = var_250; [L673] SORT_1 var_251 = var_251_arg_0 | var_251_arg_1; [L674] SORT_1 var_252_arg_0 = var_244; [L675] SORT_1 var_252_arg_1 = ~var_251; [L676] var_252_arg_1 = var_252_arg_1 & mask_SORT_1 [L677] SORT_1 var_252 = var_252_arg_0 & var_252_arg_1; [L678] SORT_1 var_253_arg_0 = input_130; [L679] SORT_1 var_253_arg_1 = var_249; [L680] SORT_1 var_253 = var_253_arg_0 | var_253_arg_1; [L681] SORT_1 var_254_arg_0 = var_252; [L682] SORT_1 var_254_arg_1 = var_253; [L683] SORT_1 var_254 = var_254_arg_0 & var_254_arg_1; [L684] SORT_1 var_255_arg_0 = input_132; [L685] SORT_1 var_255_arg_1 = input_134; [L686] SORT_1 var_255 = var_255_arg_0 & var_255_arg_1; [L687] SORT_1 var_256_arg_0 = var_254; [L688] SORT_1 var_256_arg_1 = ~var_255; [L689] var_256_arg_1 = var_256_arg_1 & mask_SORT_1 [L690] SORT_1 var_256 = var_256_arg_0 & var_256_arg_1; [L691] SORT_1 var_257_arg_0 = input_132; [L692] SORT_1 var_257_arg_1 = input_134; [L693] SORT_1 var_257 = var_257_arg_0 | var_257_arg_1; [L694] SORT_1 var_258_arg_0 = var_256; [L695] SORT_1 var_258_arg_1 = var_257; [L696] SORT_1 var_258 = var_258_arg_0 & var_258_arg_1; [L697] SORT_1 var_259_arg_0 = input_136; [L698] SORT_1 var_259_arg_1 = input_138; [L699] SORT_1 var_259 = var_259_arg_0 & var_259_arg_1; [L700] SORT_1 var_260_arg_0 = var_258; [L701] SORT_1 var_260_arg_1 = ~var_259; [L702] var_260_arg_1 = var_260_arg_1 & mask_SORT_1 [L703] SORT_1 var_260 = var_260_arg_0 & var_260_arg_1; [L704] SORT_1 var_261_arg_0 = input_136; [L705] SORT_1 var_261_arg_1 = input_138; [L706] SORT_1 var_261 = var_261_arg_0 | var_261_arg_1; [L707] SORT_1 var_262_arg_0 = var_260; [L708] SORT_1 var_262_arg_1 = var_261; [L709] SORT_1 var_262 = var_262_arg_0 & var_262_arg_1; [L710] SORT_1 var_263_arg_0 = var_224; [L711] SORT_1 var_263_arg_1 = var_262; [L712] SORT_1 var_263 = var_263_arg_0 & var_263_arg_1; [L713] SORT_1 var_264_arg_0 = var_183; [L714] SORT_1 var_264_arg_1 = ~input_182; [L715] var_264_arg_1 = var_264_arg_1 & mask_SORT_1 [L716] SORT_1 var_264 = var_264_arg_0 & var_264_arg_1; [L717] SORT_1 var_265_arg_0 = var_264; [L718] SORT_1 var_265_arg_1 = input_187; [L719] SORT_1 var_265 = var_265_arg_0 | var_265_arg_1; [L720] var_265 = var_265 & mask_SORT_1 [L721] SORT_1 var_266_arg_0 = var_189; [L722] SORT_1 var_266_arg_1 = ~input_187; [L723] var_266_arg_1 = var_266_arg_1 & mask_SORT_1 [L724] SORT_1 var_266 = var_266_arg_0 & var_266_arg_1; [L725] var_266 = var_266 & mask_SORT_1 [L726] SORT_1 var_267_arg_0 = var_265; [L727] SORT_1 var_267_arg_1 = var_266; [L728] SORT_1 var_267 = var_267_arg_0 & var_267_arg_1; [L729] SORT_1 var_268_arg_0 = var_265; [L730] SORT_1 var_268_arg_1 = var_266; [L731] SORT_1 var_268 = var_268_arg_0 | var_268_arg_1; [L732] SORT_1 var_269_arg_0 = input_110; [L733] SORT_1 var_269_arg_1 = var_268; [L734] SORT_1 var_269 = var_269_arg_0 & var_269_arg_1; [L735] SORT_1 var_270_arg_0 = var_267; [L736] SORT_1 var_270_arg_1 = var_269; [L737] SORT_1 var_270 = var_270_arg_0 | var_270_arg_1; [L738] SORT_1 var_271_arg_0 = input_110; [L739] SORT_1 var_271_arg_1 = var_268; [L740] SORT_1 var_271 = var_271_arg_0 | var_271_arg_1; [L741] SORT_1 var_272_arg_0 = ~var_270; [L742] var_272_arg_0 = var_272_arg_0 & mask_SORT_1 [L743] SORT_1 var_272_arg_1 = var_271; [L744] SORT_1 var_272 = var_272_arg_0 & var_272_arg_1; [L745] SORT_1 var_273_arg_0 = input_112; [L746] SORT_1 var_273_arg_1 = input_149; [L747] SORT_1 var_273 = var_273_arg_0 | var_273_arg_1; [L748] var_273 = var_273 & mask_SORT_1 [L749] SORT_1 var_274_arg_0 = input_114; [L750] SORT_1 var_274_arg_1 = ~input_149; [L751] var_274_arg_1 = var_274_arg_1 & mask_SORT_1 [L752] SORT_1 var_274 = var_274_arg_0 & var_274_arg_1; [L753] var_274 = var_274 & mask_SORT_1 [L754] SORT_1 var_275_arg_0 = var_273; [L755] SORT_1 var_275_arg_1 = var_274; [L756] SORT_1 var_275 = var_275_arg_0 & var_275_arg_1; [L757] SORT_1 var_276_arg_0 = var_273; [L758] SORT_1 var_276_arg_1 = var_274; [L759] SORT_1 var_276 = var_276_arg_0 | var_276_arg_1; [L760] SORT_1 var_277_arg_0 = input_116; [L761] SORT_1 var_277_arg_1 = var_276; [L762] SORT_1 var_277 = var_277_arg_0 & var_277_arg_1; [L763] SORT_1 var_278_arg_0 = var_275; [L764] SORT_1 var_278_arg_1 = var_277; [L765] SORT_1 var_278 = var_278_arg_0 | var_278_arg_1; [L766] SORT_1 var_279_arg_0 = var_272; [L767] SORT_1 var_279_arg_1 = ~var_278; [L768] var_279_arg_1 = var_279_arg_1 & mask_SORT_1 [L769] SORT_1 var_279 = var_279_arg_0 & var_279_arg_1; [L770] SORT_1 var_280_arg_0 = input_116; [L771] SORT_1 var_280_arg_1 = var_276; [L772] SORT_1 var_280 = var_280_arg_0 | var_280_arg_1; [L773] SORT_1 var_281_arg_0 = var_279; [L774] SORT_1 var_281_arg_1 = var_280; [L775] SORT_1 var_281 = var_281_arg_0 & var_281_arg_1; [L776] SORT_1 var_282_arg_0 = var_194; [L777] SORT_1 var_282_arg_1 = ~input_193; [L778] var_282_arg_1 = var_282_arg_1 & mask_SORT_1 [L779] SORT_1 var_282 = var_282_arg_0 & var_282_arg_1; [L780] var_282 = var_282 & mask_SORT_1 [L781] SORT_1 var_283_arg_0 = var_158; [L782] SORT_1 var_283_arg_1 = ~input_159; [L783] var_283_arg_1 = var_283_arg_1 & mask_SORT_1 [L784] SORT_1 var_283 = var_283_arg_0 & var_283_arg_1; [L785] SORT_1 var_284_arg_0 = var_283; [L786] SORT_1 var_284_arg_1 = input_193; [L787] SORT_1 var_284 = var_284_arg_0 | var_284_arg_1; [L788] SORT_1 var_285_arg_0 = var_284; [L789] SORT_1 var_285_arg_1 = input_199; [L790] SORT_1 var_285 = var_285_arg_0 | var_285_arg_1; [L791] var_285 = var_285 & mask_SORT_1 [L792] SORT_1 var_286_arg_0 = var_282; [L793] SORT_1 var_286_arg_1 = var_285; [L794] SORT_1 var_286 = var_286_arg_0 & var_286_arg_1; [L795] SORT_1 var_287_arg_0 = var_200; [L796] SORT_1 var_287_arg_1 = ~input_199; [L797] var_287_arg_1 = var_287_arg_1 & mask_SORT_1 [L798] SORT_1 var_287 = var_287_arg_0 & var_287_arg_1; [L799] var_287 = var_287 & mask_SORT_1 [L800] SORT_1 var_288_arg_0 = var_282; [L801] SORT_1 var_288_arg_1 = var_285; [L802] SORT_1 var_288 = var_288_arg_0 | var_288_arg_1; [L803] SORT_1 var_289_arg_0 = var_287; [L804] SORT_1 var_289_arg_1 = var_288; [L805] SORT_1 var_289 = var_289_arg_0 & var_289_arg_1; [L806] SORT_1 var_290_arg_0 = var_286; [L807] SORT_1 var_290_arg_1 = var_289; [L808] SORT_1 var_290 = var_290_arg_0 | var_290_arg_1; [L809] SORT_1 var_291_arg_0 = var_281; [L810] SORT_1 var_291_arg_1 = ~var_290; [L811] var_291_arg_1 = var_291_arg_1 & mask_SORT_1 [L812] SORT_1 var_291 = var_291_arg_0 & var_291_arg_1; [L813] SORT_1 var_292_arg_0 = var_287; [L814] SORT_1 var_292_arg_1 = var_288; [L815] SORT_1 var_292 = var_292_arg_0 | var_292_arg_1; [L816] SORT_1 var_293_arg_0 = var_291; [L817] SORT_1 var_293_arg_1 = var_292; [L818] SORT_1 var_293 = var_293_arg_0 & var_293_arg_1; [L819] SORT_1 var_294_arg_0 = var_207; [L820] SORT_1 var_294_arg_1 = ~input_205; [L821] var_294_arg_1 = var_294_arg_1 & mask_SORT_1 [L822] SORT_1 var_294 = var_294_arg_0 & var_294_arg_1; [L823] var_294 = var_294 & mask_SORT_1 [L824] SORT_1 var_295_arg_0 = var_168; [L825] SORT_1 var_295_arg_1 = ~input_167; [L826] var_295_arg_1 = var_295_arg_1 & mask_SORT_1 [L827] SORT_1 var_295 = var_295_arg_0 & var_295_arg_1; [L828] SORT_1 var_296_arg_0 = var_295; [L829] SORT_1 var_296_arg_1 = input_205; [L830] SORT_1 var_296 = var_296_arg_0 | var_296_arg_1; [L831] var_296 = var_296 & mask_SORT_1 [L832] SORT_1 var_297_arg_0 = var_294; [L833] SORT_1 var_297_arg_1 = var_296; [L834] SORT_1 var_297 = var_297_arg_0 & var_297_arg_1; [L835] SORT_1 var_298_arg_0 = var_174; [L836] SORT_1 var_298_arg_1 = ~input_175; [L837] var_298_arg_1 = var_298_arg_1 & mask_SORT_1 [L838] SORT_1 var_298 = var_298_arg_0 & var_298_arg_1; [L839] var_298 = var_298 & mask_SORT_1 [L840] SORT_1 var_299_arg_0 = var_294; [L841] SORT_1 var_299_arg_1 = var_296; [L842] SORT_1 var_299 = var_299_arg_0 | var_299_arg_1; [L843] SORT_1 var_300_arg_0 = var_298; [L844] SORT_1 var_300_arg_1 = var_299; [L845] SORT_1 var_300 = var_300_arg_0 & var_300_arg_1; [L846] SORT_1 var_301_arg_0 = var_297; [L847] SORT_1 var_301_arg_1 = var_300; [L848] SORT_1 var_301 = var_301_arg_0 | var_301_arg_1; [L849] SORT_1 var_302_arg_0 = var_178; [L850] SORT_1 var_302_arg_1 = ~input_179; [L851] var_302_arg_1 = var_302_arg_1 & mask_SORT_1 [L852] SORT_1 var_302 = var_302_arg_0 & var_302_arg_1; [L853] var_302 = var_302 & mask_SORT_1 [L854] SORT_1 var_303_arg_0 = var_298; [L855] SORT_1 var_303_arg_1 = var_299; [L856] SORT_1 var_303 = var_303_arg_0 | var_303_arg_1; [L857] SORT_1 var_304_arg_0 = var_302; [L858] SORT_1 var_304_arg_1 = var_303; [L859] SORT_1 var_304 = var_304_arg_0 & var_304_arg_1; [L860] SORT_1 var_305_arg_0 = var_301; [L861] SORT_1 var_305_arg_1 = var_304; [L862] SORT_1 var_305 = var_305_arg_0 | var_305_arg_1; [L863] SORT_1 var_306_arg_0 = var_293; [L864] SORT_1 var_306_arg_1 = ~var_305; [L865] var_306_arg_1 = var_306_arg_1 & mask_SORT_1 [L866] SORT_1 var_306 = var_306_arg_0 & var_306_arg_1; [L867] SORT_1 var_307_arg_0 = var_302; [L868] SORT_1 var_307_arg_1 = var_303; [L869] SORT_1 var_307 = var_307_arg_0 | var_307_arg_1; [L870] SORT_1 var_308_arg_0 = var_306; [L871] SORT_1 var_308_arg_1 = var_307; [L872] SORT_1 var_308 = var_308_arg_0 & var_308_arg_1; [L873] SORT_1 var_309_arg_0 = var_201; [L874] SORT_1 var_309_arg_1 = ~input_199; [L875] var_309_arg_1 = var_309_arg_1 & mask_SORT_1 [L876] SORT_1 var_309 = var_309_arg_0 & var_309_arg_1; [L877] var_309 = var_309 & mask_SORT_1 [L878] SORT_1 var_310_arg_0 = input_134; [L879] SORT_1 var_310_arg_1 = ~input_182; [L880] var_310_arg_1 = var_310_arg_1 & mask_SORT_1 [L881] SORT_1 var_310 = var_310_arg_0 & var_310_arg_1; [L882] SORT_1 var_311_arg_0 = var_310; [L883] SORT_1 var_311_arg_1 = input_193; [L884] SORT_1 var_311 = var_311_arg_0 | var_311_arg_1; [L885] SORT_1 var_312_arg_0 = var_311; [L886] SORT_1 var_312_arg_1 = input_199; [L887] SORT_1 var_312 = var_312_arg_0 | var_312_arg_1; [L888] var_312 = var_312 & mask_SORT_1 [L889] SORT_1 var_313_arg_0 = var_309; [L890] SORT_1 var_313_arg_1 = var_312; [L891] SORT_1 var_313 = var_313_arg_0 & var_313_arg_1; [L892] SORT_1 var_314_arg_0 = var_308; [L893] SORT_1 var_314_arg_1 = ~var_313; [L894] var_314_arg_1 = var_314_arg_1 & mask_SORT_1 [L895] SORT_1 var_314 = var_314_arg_0 & var_314_arg_1; [L896] SORT_1 var_315_arg_0 = var_309; [L897] SORT_1 var_315_arg_1 = var_312; [L898] SORT_1 var_315 = var_315_arg_0 | var_315_arg_1; [L899] SORT_1 var_316_arg_0 = var_314; [L900] SORT_1 var_316_arg_1 = var_315; [L901] SORT_1 var_316 = var_316_arg_0 & var_316_arg_1; [L902] SORT_1 var_317_arg_0 = input_136; [L903] SORT_1 var_317_arg_1 = ~input_187; [L904] var_317_arg_1 = var_317_arg_1 & mask_SORT_1 [L905] SORT_1 var_317 = var_317_arg_0 & var_317_arg_1; [L906] SORT_1 var_318_arg_0 = var_317; [L907] SORT_1 var_318_arg_1 = input_205; [L908] SORT_1 var_318 = var_318_arg_0 | var_318_arg_1; [L909] var_318 = var_318 & mask_SORT_1 [L910] SORT_1 var_319_arg_0 = var_208; [L911] SORT_1 var_319_arg_1 = ~input_205; [L912] var_319_arg_1 = var_319_arg_1 & mask_SORT_1 [L913] SORT_1 var_319 = var_319_arg_0 & var_319_arg_1; [L914] var_319 = var_319 & mask_SORT_1 [L915] SORT_1 var_320_arg_0 = var_318; [L916] SORT_1 var_320_arg_1 = var_319; [L917] SORT_1 var_320 = var_320_arg_0 & var_320_arg_1; [L918] SORT_1 var_321_arg_0 = var_316; [L919] SORT_1 var_321_arg_1 = ~var_320; [L920] var_321_arg_1 = var_321_arg_1 & mask_SORT_1 [L921] SORT_1 var_321 = var_321_arg_0 & var_321_arg_1; [L922] SORT_1 var_322_arg_0 = var_318; [L923] SORT_1 var_322_arg_1 = var_319; [L924] SORT_1 var_322 = var_322_arg_0 | var_322_arg_1; [L925] SORT_1 var_323_arg_0 = var_321; [L926] SORT_1 var_323_arg_1 = var_322; [L927] SORT_1 var_323 = var_323_arg_0 & var_323_arg_1; [L928] SORT_1 var_324_arg_0 = var_263; [L929] SORT_1 var_324_arg_1 = var_323; [L930] SORT_1 var_324 = var_324_arg_0 & var_324_arg_1; [L931] SORT_1 var_325_arg_0 = input_182; [L932] SORT_2 var_325_arg_1 = input_102; [L933] SORT_2 var_325_arg_2 = input_92; [L934] EXPR var_325_arg_0 ? var_325_arg_1 : var_325_arg_2 [L934] SORT_2 var_325 = var_325_arg_0 ? var_325_arg_1 : var_325_arg_2; [L935] var_325 = var_325 & mask_SORT_2 [L936] SORT_2 var_326_arg_0 = var_325; [L937] SORT_2 var_326_arg_1 = state_6; [L938] SORT_1 var_326 = var_326_arg_0 == var_326_arg_1; [L939] SORT_1 var_327_arg_0 = var_324; [L940] SORT_1 var_327_arg_1 = var_326; [L941] SORT_1 var_327 = var_327_arg_0 & var_327_arg_1; [L942] SORT_4 var_329_arg_0 = var_328; [L943] SORT_4 var_329_arg_1 = var_145; [L944] SORT_4 var_329 = var_329_arg_0 + var_329_arg_1; [L945] SORT_4 var_330_arg_0 = var_329; [L946] SORT_2 var_330 = var_330_arg_0 >> 0; [L947] SORT_1 var_331_arg_0 = input_142; [L948] SORT_2 var_331_arg_1 = var_330; [L949] SORT_2 var_331_arg_2 = input_94; [L950] EXPR var_331_arg_0 ? var_331_arg_1 : var_331_arg_2 [L950] SORT_2 var_331 = var_331_arg_0 ? var_331_arg_1 : var_331_arg_2; [L951] SORT_1 var_332_arg_0 = input_187; [L952] SORT_2 var_332_arg_1 = var_75; [L953] SORT_2 var_332_arg_2 = var_331; [L954] EXPR var_332_arg_0 ? var_332_arg_1 : var_332_arg_2 [L954] SORT_2 var_332 = var_332_arg_0 ? var_332_arg_1 : var_332_arg_2; [L955] var_332 = var_332 & mask_SORT_2 [L956] SORT_2 var_333_arg_0 = var_332; [L957] SORT_2 var_333_arg_1 = state_8; [L958] SORT_1 var_333 = var_333_arg_0 == var_333_arg_1; [L959] SORT_1 var_334_arg_0 = var_327; [L960] SORT_1 var_334_arg_1 = var_333; [L961] SORT_1 var_334 = var_334_arg_0 & var_334_arg_1; [L962] SORT_2 var_335_arg_0 = input_96; [L963] SORT_2 var_335_arg_1 = state_10; [L964] SORT_1 var_335 = var_335_arg_0 == var_335_arg_1; [L965] SORT_1 var_336_arg_0 = var_334; [L966] SORT_1 var_336_arg_1 = var_335; [L967] SORT_1 var_336 = var_336_arg_0 & var_336_arg_1; [L968] SORT_4 var_337_arg_0 = var_328; [L969] SORT_4 var_337_arg_1 = var_150; [L970] SORT_4 var_337 = var_337_arg_0 + var_337_arg_1; [L971] SORT_4 var_338_arg_0 = var_337; [L972] SORT_2 var_338 = var_338_arg_0 >> 0; [L973] SORT_1 var_339_arg_0 = input_149; [L974] SORT_2 var_339_arg_1 = var_338; [L975] SORT_2 var_339_arg_2 = input_98; [L976] EXPR var_339_arg_0 ? var_339_arg_1 : var_339_arg_2 [L976] SORT_2 var_339 = var_339_arg_0 ? var_339_arg_1 : var_339_arg_2; [L977] var_339 = var_339 & mask_SORT_2 [L978] SORT_2 var_340_arg_0 = var_339; [L979] SORT_2 var_340_arg_1 = state_12; [L980] SORT_1 var_340 = var_340_arg_0 == var_340_arg_1; [L981] SORT_1 var_341_arg_0 = var_336; [L982] SORT_1 var_341_arg_1 = var_340; [L983] SORT_1 var_341 = var_341_arg_0 & var_341_arg_1; [L984] SORT_1 var_342_arg_0 = input_187; [L985] SORT_2 var_342_arg_1 = var_325; [L986] SORT_2 var_342_arg_2 = input_104; [L987] EXPR var_342_arg_0 ? var_342_arg_1 : var_342_arg_2 [L987] SORT_2 var_342 = var_342_arg_0 ? var_342_arg_1 : var_342_arg_2; [L988] var_342 = var_342 & mask_SORT_2 [L989] SORT_1 var_343_arg_0 = input_205; [L990] SORT_2 var_343_arg_1 = var_342; [L991] SORT_2 var_343_arg_2 = input_100; [L992] EXPR var_343_arg_0 ? var_343_arg_1 : var_343_arg_2 [L992] SORT_2 var_343 = var_343_arg_0 ? var_343_arg_1 : var_343_arg_2; [L993] var_343 = var_343 & mask_SORT_2 [L994] SORT_2 var_344_arg_0 = var_343; [L995] SORT_2 var_344_arg_1 = state_14; [L996] SORT_1 var_344 = var_344_arg_0 == var_344_arg_1; [L997] SORT_1 var_345_arg_0 = var_341; [L998] SORT_1 var_345_arg_1 = var_344; [L999] SORT_1 var_345 = var_345_arg_0 & var_345_arg_1; [L1000] SORT_1 var_346_arg_0 = input_193; [L1001] SORT_2 var_346_arg_1 = var_75; [L1002] SORT_2 var_346_arg_2 = input_102; [L1003] EXPR var_346_arg_0 ? var_346_arg_1 : var_346_arg_2 [L1003] SORT_2 var_346 = var_346_arg_0 ? var_346_arg_1 : var_346_arg_2; [L1004] SORT_1 var_347_arg_0 = input_199; [L1005] SORT_2 var_347_arg_1 = var_169; [L1006] SORT_2 var_347_arg_2 = var_346; [L1007] EXPR var_347_arg_0 ? var_347_arg_1 : var_347_arg_2 [L1007] SORT_2 var_347 = var_347_arg_0 ? var_347_arg_1 : var_347_arg_2; [L1008] var_347 = var_347 & mask_SORT_2 [L1009] SORT_2 var_348_arg_0 = var_347; [L1010] SORT_2 var_348_arg_1 = state_16; [L1011] SORT_1 var_348 = var_348_arg_0 == var_348_arg_1; [L1012] SORT_1 var_349_arg_0 = var_345; [L1013] SORT_1 var_349_arg_1 = var_348; [L1014] SORT_1 var_349 = var_349_arg_0 & var_349_arg_1; [L1015] SORT_2 var_350_arg_0 = var_342; [L1016] SORT_2 var_350_arg_1 = state_18; [L1017] SORT_1 var_350 = var_350_arg_0 == var_350_arg_1; [L1018] SORT_1 var_351_arg_0 = var_349; [L1019] SORT_1 var_351_arg_1 = var_350; [L1020] SORT_1 var_351 = var_351_arg_0 & var_351_arg_1; [L1021] SORT_1 var_352_arg_0 = var_265; [L1022] SORT_1 var_352_arg_1 = state_21; [L1023] SORT_1 var_352 = var_352_arg_0 == var_352_arg_1; [L1024] SORT_1 var_353_arg_0 = var_351; [L1025] SORT_1 var_353_arg_1 = var_352; [L1026] SORT_1 var_353 = var_353_arg_0 & var_353_arg_1; [L1027] SORT_1 var_354_arg_0 = var_266; [L1028] SORT_1 var_354_arg_1 = state_23; [L1029] SORT_1 var_354 = var_354_arg_0 == var_354_arg_1; [L1030] SORT_1 var_355_arg_0 = var_353; [L1031] SORT_1 var_355_arg_1 = var_354; [L1032] SORT_1 var_355 = var_355_arg_0 & var_355_arg_1; [L1033] SORT_1 var_356_arg_0 = input_110; [L1034] SORT_1 var_356_arg_1 = state_25; [L1035] SORT_1 var_356 = var_356_arg_0 == var_356_arg_1; [L1036] SORT_1 var_357_arg_0 = var_355; [L1037] SORT_1 var_357_arg_1 = var_356; [L1038] SORT_1 var_357 = var_357_arg_0 & var_357_arg_1; [L1039] SORT_1 var_358_arg_0 = var_273; [L1040] SORT_1 var_358_arg_1 = state_27; [L1041] SORT_1 var_358 = var_358_arg_0 == var_358_arg_1; [L1042] SORT_1 var_359_arg_0 = var_357; [L1043] SORT_1 var_359_arg_1 = var_358; [L1044] SORT_1 var_359 = var_359_arg_0 & var_359_arg_1; [L1045] SORT_1 var_360_arg_0 = var_274; [L1046] SORT_1 var_360_arg_1 = state_29; [L1047] SORT_1 var_360 = var_360_arg_0 == var_360_arg_1; [L1048] SORT_1 var_361_arg_0 = var_359; [L1049] SORT_1 var_361_arg_1 = var_360; [L1050] SORT_1 var_361 = var_361_arg_0 & var_361_arg_1; [L1051] SORT_1 var_362_arg_0 = input_116; [L1052] SORT_1 var_362_arg_1 = state_31; [L1053] SORT_1 var_362 = var_362_arg_0 == var_362_arg_1; [L1054] SORT_1 var_363_arg_0 = var_361; [L1055] SORT_1 var_363_arg_1 = var_362; [L1056] SORT_1 var_363 = var_363_arg_0 & var_363_arg_1; [L1057] SORT_1 var_364_arg_0 = var_285; [L1058] SORT_1 var_364_arg_1 = state_33; [L1059] SORT_1 var_364 = var_364_arg_0 == var_364_arg_1; [L1060] SORT_1 var_365_arg_0 = var_363; [L1061] SORT_1 var_365_arg_1 = var_364; [L1062] SORT_1 var_365 = var_365_arg_0 & var_365_arg_1; [L1063] SORT_1 var_366_arg_0 = var_282; [L1064] SORT_1 var_366_arg_1 = state_35; [L1065] SORT_1 var_366 = var_366_arg_0 == var_366_arg_1; [L1066] SORT_1 var_367_arg_0 = var_365; [L1067] SORT_1 var_367_arg_1 = var_366; [L1068] SORT_1 var_367 = var_367_arg_0 & var_367_arg_1; [L1069] SORT_1 var_368_arg_0 = var_287; [L1070] SORT_1 var_368_arg_1 = state_37; [L1071] SORT_1 var_368 = var_368_arg_0 == var_368_arg_1; [L1072] SORT_1 var_369_arg_0 = var_367; [L1073] SORT_1 var_369_arg_1 = var_368; [L1074] SORT_1 var_369 = var_369_arg_0 & var_369_arg_1; [L1075] SORT_1 var_370_arg_0 = var_294; [L1076] SORT_1 var_370_arg_1 = state_39; [L1077] SORT_1 var_370 = var_370_arg_0 == var_370_arg_1; [L1078] SORT_1 var_371_arg_0 = var_369; [L1079] SORT_1 var_371_arg_1 = var_370; [L1080] SORT_1 var_371 = var_371_arg_0 & var_371_arg_1; [L1081] SORT_1 var_372_arg_0 = var_296; [L1082] SORT_1 var_372_arg_1 = state_41; [L1083] SORT_1 var_372 = var_372_arg_0 == var_372_arg_1; [L1084] SORT_1 var_373_arg_0 = var_371; [L1085] SORT_1 var_373_arg_1 = var_372; [L1086] SORT_1 var_373 = var_373_arg_0 & var_373_arg_1; [L1087] SORT_1 var_374_arg_0 = var_298; [L1088] SORT_1 var_374_arg_1 = state_43; [L1089] SORT_1 var_374 = var_374_arg_0 == var_374_arg_1; [L1090] SORT_1 var_375_arg_0 = var_373; [L1091] SORT_1 var_375_arg_1 = var_374; [L1092] SORT_1 var_375 = var_375_arg_0 & var_375_arg_1; [L1093] SORT_1 var_376_arg_0 = var_302; [L1094] SORT_1 var_376_arg_1 = state_45; [L1095] SORT_1 var_376 = var_376_arg_0 == var_376_arg_1; [L1096] SORT_1 var_377_arg_0 = var_375; [L1097] SORT_1 var_377_arg_1 = var_376; [L1098] SORT_1 var_377 = var_377_arg_0 & var_377_arg_1; [L1099] SORT_1 var_378_arg_0 = var_309; [L1100] SORT_1 var_378_arg_1 = state_47; [L1101] SORT_1 var_378 = var_378_arg_0 == var_378_arg_1; [L1102] SORT_1 var_379_arg_0 = var_377; [L1103] SORT_1 var_379_arg_1 = var_378; [L1104] SORT_1 var_379 = var_379_arg_0 & var_379_arg_1; [L1105] SORT_1 var_380_arg_0 = var_312; [L1106] SORT_1 var_380_arg_1 = state_49; [L1107] SORT_1 var_380 = var_380_arg_0 == var_380_arg_1; [L1108] SORT_1 var_381_arg_0 = var_379; [L1109] SORT_1 var_381_arg_1 = var_380; [L1110] SORT_1 var_381 = var_381_arg_0 & var_381_arg_1; [L1111] SORT_1 var_382_arg_0 = var_318; [L1112] SORT_1 var_382_arg_1 = state_51; [L1113] SORT_1 var_382 = var_382_arg_0 == var_382_arg_1; [L1114] SORT_1 var_383_arg_0 = var_381; [L1115] SORT_1 var_383_arg_1 = var_382; [L1116] SORT_1 var_383 = var_383_arg_0 & var_383_arg_1; [L1117] SORT_1 var_384_arg_0 = var_319; [L1118] SORT_1 var_384_arg_1 = state_53; [L1119] SORT_1 var_384 = var_384_arg_0 == var_384_arg_1; [L1120] SORT_1 var_385_arg_0 = var_383; [L1121] SORT_1 var_385_arg_1 = var_384; [L1122] SORT_1 var_385 = var_385_arg_0 & var_385_arg_1; [L1123] SORT_1 var_386_arg_0 = var_385; [L1124] SORT_1 var_386_arg_1 = state_57; [L1125] SORT_1 var_386 = var_386_arg_0 & var_386_arg_1; [L1126] SORT_1 var_387_arg_0 = input_128; [L1127] SORT_1 var_387_arg_1 = input_130; [L1128] SORT_1 var_387 = var_387_arg_0 | var_387_arg_1; [L1129] SORT_1 var_388_arg_0 = state_55; [L1130] SORT_1 var_388_arg_1 = var_386; [L1131] SORT_1 var_388_arg_2 = var_387; [L1132] EXPR var_388_arg_0 ? var_388_arg_1 : var_388_arg_2 [L1132] SORT_1 var_388 = var_388_arg_0 ? var_388_arg_1 : var_388_arg_2; [L1133] SORT_1 next_389_arg_1 = var_388; [L1135] state_6 = next_93_arg_1 [L1136] state_8 = next_95_arg_1 [L1137] state_10 = next_97_arg_1 [L1138] state_12 = next_99_arg_1 [L1139] state_14 = next_101_arg_1 [L1140] state_16 = next_103_arg_1 [L1141] state_18 = next_105_arg_1 [L1142] state_21 = next_107_arg_1 [L1143] state_23 = next_109_arg_1 [L1144] state_25 = next_111_arg_1 [L1145] state_27 = next_113_arg_1 [L1146] state_29 = next_115_arg_1 [L1147] state_31 = next_117_arg_1 [L1148] state_33 = next_119_arg_1 [L1149] state_35 = next_121_arg_1 [L1150] state_37 = next_123_arg_1 [L1151] state_39 = next_125_arg_1 [L1152] state_41 = next_127_arg_1 [L1153] state_43 = next_129_arg_1 [L1154] state_45 = next_131_arg_1 [L1155] state_47 = next_133_arg_1 [L1156] state_49 = next_135_arg_1 [L1157] state_51 = next_137_arg_1 [L1158] state_53 = next_139_arg_1 [L1159] state_55 = next_141_arg_1 [L1160] state_57 = next_389_arg_1 VAL [bad_91_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_15_arg_1=0, init_17_arg_1=0, init_19_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_28_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, init_44_arg_1=0, init_46_arg_1=0, init_48_arg_1=0, init_50_arg_1=0, init_52_arg_1=0, init_54_arg_1=0, init_56_arg_1=0, init_58_arg_1=0, init_7_arg_1=0, init_9_arg_1=0, input_100=0, input_102=0, input_104=0, input_106=1, input_108=0, input_110=1, input_112=1, input_114=1, input_116=0, input_118=1, input_120=1, input_122=0, input_124=1, input_126=0, input_128=1, input_130=0, input_132=1, input_134=1, input_136=1, input_138=0, input_142=0, input_149=1, input_155=3, input_159=253, input_162=255, input_167=44, input_175=0, input_179=254, input_182=1, input_187=0, input_193=0, input_199=0, input_205=1, input_92=0, input_94=0, input_96=0, input_98=0, mask_SORT_1=1, mask_SORT_2=255, mask_SORT_3=4294967295, mask_SORT_4=4294967295, msb_SORT_1=1, msb_SORT_2=128, msb_SORT_3=8388608, msb_SORT_4=2147483648, next_101_arg_1=0, next_103_arg_1=0, next_105_arg_1=0, next_107_arg_1=1, next_109_arg_1=0, next_111_arg_1=1, next_113_arg_1=1, next_115_arg_1=1, next_117_arg_1=0, next_119_arg_1=1, next_121_arg_1=1, next_123_arg_1=0, next_125_arg_1=1, next_127_arg_1=0, next_129_arg_1=1, next_131_arg_1=0, next_133_arg_1=1, next_135_arg_1=1, next_137_arg_1=1, next_139_arg_1=0, next_141_arg_1=1, next_389_arg_1=1, next_93_arg_1=0, next_95_arg_1=0, next_97_arg_1=0, next_99_arg_1=0, state_10=0, state_12=0, state_14=0, state_16=0, state_18=0, state_21=1, state_23=0, state_25=1, state_27=1, state_29=1, state_31=0, state_33=1, state_35=1, state_37=0, state_39=1, state_41=0, state_43=1, state_45=0, state_47=1, state_49=1, state_51=1, state_53=0, state_55=1, state_57=1, state_6=0, state_8=0, var_140=1, var_143=3, var_144=0, var_145=0, var_145_arg_0=0, var_145_arg_1=0, var_146=0, var_146_arg_0=3, var_146_arg_1=0, var_147=0, var_147_arg_0=0, var_147_arg_1=1, var_148=1, var_148_arg_0=1, var_148_arg_1=0, var_150=0, var_150_arg_0=0, var_150_arg_1=0, var_151=0, var_151_arg_0=3, var_151_arg_1=0, var_152=0, var_152_arg_0=1, var_152_arg_1=0, var_153=0, var_153_arg_0=0, var_153_arg_1=0, var_154=0, var_154_arg_0=1, var_154_arg_1=0, var_156=1, var_156_arg_0=1, var_156_arg_1=1, var_157=0, var_157_arg_0=0, var_157_arg_1=1, var_158=0, var_158_arg_0=1, var_158_arg_1=0, var_160=0, var_160_arg_0=0, var_160_arg_1=0, var_161=0, var_161_arg_0=0, var_161_arg_1=0, var_163=1, var_163_arg_0=0, var_163_arg_1=0, var_164=0, var_164_arg_0=0, var_164_arg_1=1, var_165=1, var_165_arg_0=1, var_165_arg_1=0, var_166=0, var_166_arg_0=0, var_166_arg_1=1, var_168=0, var_168_arg_0=0, var_168_arg_1=0, var_169=1, var_170=0, var_170_arg_0=1, var_170_arg_1=0, var_171=0, var_171_arg_0=0, var_171_arg_1=0, var_172=0, var_172_arg_0=0, var_172_arg_1=0, var_173=0, var_173_arg_0=0, var_173_arg_1=0, var_174=1, var_174_arg_0=1, var_174_arg_1=255, var_176=1, var_176_arg_0=1, var_176_arg_1=1, var_177=0, var_177_arg_0=0, var_177_arg_1=1, var_178=4, var_178_arg_0=0, var_178_arg_1=44, var_180=1, var_180_arg_0=4, var_180_arg_1=0, var_181=0, var_181_arg_0=0, var_181_arg_1=1, var_183=1, var_183_arg_0=1, var_183_arg_1=0, var_184=1, var_184_arg_0=1, var_184_arg_1=1, var_185=1, var_185_arg_0=1, var_185_arg_1=1, var_186=0, var_186_arg_0=0, var_186_arg_1=1, var_188=0, var_188_arg_0=0, var_188_arg_1=1, var_189=1, var_189_arg_0=0, var_189_arg_1=1, var_190=1, var_190_arg_0=1, var_190_arg_1=1, var_191=1, var_191_arg_0=0, var_191_arg_1=1, var_192=0, var_192_arg_0=0, var_192_arg_1=1, var_194=1, var_194_arg_0=1, var_194_arg_1=3, var_195=1, var_195_arg_0=1, var_195_arg_1=1, var_196=1, var_196_arg_0=1, var_196_arg_1=1, var_197=1, var_197_arg_0=1, var_197_arg_1=1, var_198=0, var_198_arg_0=0, var_198_arg_1=1, var_20=0, var_200=0, var_200_arg_0=0, var_200_arg_1=253, var_201=1, var_201_arg_0=1, var_201_arg_1=1, var_202=0, var_202_arg_0=0, var_202_arg_1=1, var_203=0, var_203_arg_0=0, var_203_arg_1=0, var_204=0, var_204_arg_0=0, var_204_arg_1=0, var_206=1, var_206_arg_0=1, var_206_arg_1=0, var_207=0, var_207_arg_0=1, var_207_arg_1=254, var_208=0, var_208_arg_0=0, var_208_arg_1=0, var_209=0, var_209_arg_0=0, var_209_arg_1=0, var_210=1, var_210_arg_0=1, var_210_arg_1=0, var_211=0, var_211_arg_0=0, var_211_arg_1=1, var_212=1, var_212_arg_0=0, var_212_arg_1=1, var_213=0, var_213_arg_0=3, var_213_arg_1=1, var_214=1, var_214_arg_0=253, var_214_arg_1=0, var_215=0, var_215_arg_0=255, var_215_arg_1=1, var_216=44, var_216_arg_0=44, var_216_arg_1=0, var_217=3, var_217_arg_0=0, var_217_arg_1=44, var_218=3, var_218_arg_0=254, var_218_arg_1=3, var_219=3, var_219_arg_0=1, var_219_arg_1=3, var_220=3, var_220_arg_0=0, var_220_arg_1=3, var_221=3, var_221_arg_0=0, var_221_arg_1=3, var_222=5, var_222_arg_0=0, var_222_arg_1=3, var_223=1, var_223_arg_0=1, var_223_arg_1=5, var_224=0, var_224_arg_0=0, var_224_arg_1=1, var_225=0, var_225_arg_0=1, var_225_arg_1=0, var_226=1, var_226_arg_0=1, var_226_arg_1=0, var_227=1, var_227_arg_0=1, var_227_arg_1=1, var_228=1, var_228_arg_0=0, var_228_arg_1=1, var_229=1, var_229_arg_0=1, var_229_arg_1=1, var_230=1, var_230_arg_0=1, var_230_arg_1=1, var_231=1, var_231_arg_0=1, var_231_arg_1=1, var_232=1, var_232_arg_0=1, var_232_arg_1=1, var_233=0, var_233_arg_0=0, var_233_arg_1=1, var_234=1, var_234_arg_0=1, var_234_arg_1=0, var_235=0, var_235_arg_0=1, var_235_arg_1=0, var_236=1, var_236_arg_0=0, var_236_arg_1=1, var_237=0, var_237_arg_0=0, var_237_arg_1=1, var_238=1, var_238_arg_0=1, var_238_arg_1=1, var_239=1, var_239_arg_0=1, var_239_arg_1=1, var_240=0, var_240_arg_0=0, var_240_arg_1=1, var_241=1, var_241_arg_0=1, var_241_arg_1=0, var_242=0, var_242_arg_0=0, var_242_arg_1=1, var_243=1, var_243_arg_0=0, var_243_arg_1=1, var_244=0, var_244_arg_0=0, var_244_arg_1=1, var_245=0, var_245_arg_0=1, var_245_arg_1=0, var_246=1, var_246_arg_0=1, var_246_arg_1=0, var_247=1, var_247_arg_0=1, var_247_arg_1=1, var_248=1, var_248_arg_0=0, var_248_arg_1=1, var_249=1, var_249_arg_0=1, var_249_arg_1=1, var_250=0, var_250_arg_0=0, var_250_arg_1=1, var_251=1, var_251_arg_0=1, var_251_arg_1=0, var_252=0, var_252_arg_0=0, var_252_arg_1=0, var_253=1, var_253_arg_0=0, var_253_arg_1=1, var_254=0, var_254_arg_0=0, var_254_arg_1=1, var_255=1, var_255_arg_0=1, var_255_arg_1=1, var_256=0, var_256_arg_0=0, var_256_arg_1=1, var_257=1, var_257_arg_0=1, var_257_arg_1=1, var_258=0, var_258_arg_0=0, var_258_arg_1=1, var_259=0, var_259_arg_0=1, var_259_arg_1=0, var_260=0, var_260_arg_0=0, var_260_arg_1=0, var_261=1, var_261_arg_0=1, var_261_arg_1=0, var_262=0, var_262_arg_0=0, var_262_arg_1=1, var_263=0, var_263_arg_0=0, var_263_arg_1=0, var_264=1, var_264_arg_0=1, var_264_arg_1=1, var_265=1, var_265_arg_0=1, var_265_arg_1=0, var_266=1, var_266_arg_0=1, var_266_arg_1=1, var_267=1, var_267_arg_0=1, var_267_arg_1=1, var_268=1, var_268_arg_0=1, var_268_arg_1=1, var_269=1, var_269_arg_0=1, var_269_arg_1=1, var_270=1, var_270_arg_0=1, var_270_arg_1=1, var_271=1, var_271_arg_0=1, var_271_arg_1=1, var_272=0, var_272_arg_0=0, var_272_arg_1=1, var_273=1, var_273_arg_0=1, var_273_arg_1=1, var_274=1, var_274_arg_0=1, var_274_arg_1=1, var_275=1, var_275_arg_0=1, var_275_arg_1=1, var_276=1, var_276_arg_0=1, var_276_arg_1=1, var_277=0, var_277_arg_0=0, var_277_arg_1=1, var_278=1, var_278_arg_0=1, var_278_arg_1=0, var_279=0, var_279_arg_0=0, var_279_arg_1=1, var_280=1, var_280_arg_0=0, var_280_arg_1=1, var_281=0, var_281_arg_0=0, var_281_arg_1=1, var_282=1, var_282_arg_0=1, var_282_arg_1=1, var_283=0, var_283_arg_0=0, var_283_arg_1=0, var_284=0, var_284_arg_0=0, var_284_arg_1=0, var_285=0, var_285_arg_0=0, var_285_arg_1=0, var_286=0, var_286_arg_0=1, var_286_arg_1=0, var_287=0, var_287_arg_0=0, var_287_arg_1=0, var_288=1, var_288_arg_0=1, var_288_arg_1=0, var_289=0, var_289_arg_0=0, var_289_arg_1=1, var_290=0, var_290_arg_0=0, var_290_arg_1=0, var_291=0, var_291_arg_0=0, var_291_arg_1=0, var_292=1, var_292_arg_0=0, var_292_arg_1=1, var_293=0, var_293_arg_0=0, var_293_arg_1=1, var_294=0, var_294_arg_0=0, var_294_arg_1=1, var_295=0, var_295_arg_0=0, var_295_arg_1=1, var_296=1, var_296_arg_0=0, var_296_arg_1=1, var_297=0, var_297_arg_0=0, var_297_arg_1=1, var_298=0, var_298_arg_0=1, var_298_arg_1=0, var_299=1, var_299_arg_0=0, var_299_arg_1=1, var_300=0, var_300_arg_0=0, var_300_arg_1=1, var_301=0, var_301_arg_0=0, var_301_arg_1=0, var_302=0, var_302_arg_0=4, var_302_arg_1=0, var_303=1, var_303_arg_0=0, var_303_arg_1=1, var_304=0, var_304_arg_0=0, var_304_arg_1=1, var_305=0, var_305_arg_0=0, var_305_arg_1=0, var_306=0, var_306_arg_0=0, var_306_arg_1=1, var_307=1, var_307_arg_0=0, var_307_arg_1=1, var_308=0, var_308_arg_0=0, var_308_arg_1=1, var_309=1, var_309_arg_0=1, var_309_arg_1=1, var_310=1, var_310_arg_0=1, var_310_arg_1=1, var_311=1, var_311_arg_0=1, var_311_arg_1=0, var_312=1, var_312_arg_0=1, var_312_arg_1=0, var_313=1, var_313_arg_0=1, var_313_arg_1=1, var_314=0, var_314_arg_0=0, var_314_arg_1=1, var_315=1, var_315_arg_0=1, var_315_arg_1=1, var_316=0, var_316_arg_0=0, var_316_arg_1=1, var_317=0, var_317_arg_0=1, var_317_arg_1=0, var_318=1, var_318_arg_0=0, var_318_arg_1=1, var_319=0, var_319_arg_0=0, var_319_arg_1=1, var_320=0, var_320_arg_0=1, var_320_arg_1=0, var_321=0, var_321_arg_0=0, var_321_arg_1=0, var_322=1, var_322_arg_0=1, var_322_arg_1=0, var_323=0, var_323_arg_0=0, var_323_arg_1=1, var_324=0, var_324_arg_0=0, var_324_arg_1=0, var_325=0, var_325_arg_0=1, var_325_arg_1=0, var_325_arg_2=0, var_326=1, var_326_arg_0=0, var_326_arg_1=0, var_327=0, var_327_arg_0=0, var_327_arg_1=1, var_328=1, var_329=1, var_329_arg_0=1, var_329_arg_1=0, var_330=1, var_330_arg_0=1, var_331=0, var_331_arg_0=0, var_331_arg_1=1, var_331_arg_2=0, var_332=0, var_332_arg_0=0, var_332_arg_1=0, var_332_arg_2=0, var_333=1, var_333_arg_0=0, var_333_arg_1=0, var_334=0, var_334_arg_0=0, var_334_arg_1=1, var_335=1, var_335_arg_0=0, var_335_arg_1=0, var_336=0, var_336_arg_0=0, var_336_arg_1=1, var_337=1, var_337_arg_0=1, var_337_arg_1=0, var_338=1, var_338_arg_0=1, var_339=1, var_339_arg_0=1, var_339_arg_1=1, var_339_arg_2=0, var_340=0, var_340_arg_0=1, var_340_arg_1=0, var_341=0, var_341_arg_0=0, var_341_arg_1=0, var_342=0, var_342_arg_0=0, var_342_arg_1=0, var_342_arg_2=0, var_343=0, var_343_arg_0=1, var_343_arg_1=0, var_343_arg_2=0, var_344=1, var_344_arg_0=0, var_344_arg_1=0, var_345=0, var_345_arg_0=0, var_345_arg_1=1, var_346=0, var_346_arg_0=0, var_346_arg_1=0, var_346_arg_2=0, var_347=0, var_347_arg_0=0, var_347_arg_1=1, var_347_arg_2=0, var_348=1, var_348_arg_0=0, var_348_arg_1=0, var_349=0, var_349_arg_0=0, var_349_arg_1=1, var_350=1, var_350_arg_0=0, var_350_arg_1=0, var_351=0, var_351_arg_0=0, var_351_arg_1=1, var_352=0, var_352_arg_0=1, var_352_arg_1=0, var_353=0, var_353_arg_0=0, var_353_arg_1=0, var_354=0, var_354_arg_0=1, var_354_arg_1=0, var_355=0, var_355_arg_0=0, var_355_arg_1=0, var_356=0, var_356_arg_0=1, var_356_arg_1=0, var_357=0, var_357_arg_0=0, var_357_arg_1=0, var_358=0, var_358_arg_0=1, var_358_arg_1=0, var_359=0, var_359_arg_0=0, var_359_arg_1=0, var_360=0, var_360_arg_0=1, var_360_arg_1=0, var_361=0, var_361_arg_0=0, var_361_arg_1=0, var_362=1, var_362_arg_0=0, var_362_arg_1=0, var_363=0, var_363_arg_0=0, var_363_arg_1=1, var_364=1, var_364_arg_0=0, var_364_arg_1=0, var_365=0, var_365_arg_0=0, var_365_arg_1=1, var_366=0, var_366_arg_0=1, var_366_arg_1=0, var_367=0, var_367_arg_0=0, var_367_arg_1=0, var_368=1, var_368_arg_0=0, var_368_arg_1=0, var_369=0, var_369_arg_0=0, var_369_arg_1=1, var_370=1, var_370_arg_0=0, var_370_arg_1=0, var_371=0, var_371_arg_0=0, var_371_arg_1=1, var_372=0, var_372_arg_0=1, var_372_arg_1=0, var_373=0, var_373_arg_0=0, var_373_arg_1=0, var_374=1, var_374_arg_0=0, var_374_arg_1=0, var_375=0, var_375_arg_0=0, var_375_arg_1=1, var_376=1, var_376_arg_0=0, var_376_arg_1=0, var_377=0, var_377_arg_0=0, var_377_arg_1=1, var_378=0, var_378_arg_0=1, var_378_arg_1=0, var_379=0, var_379_arg_0=0, var_379_arg_1=0, var_380=0, var_380_arg_0=1, var_380_arg_1=0, var_381=0, var_381_arg_0=0, var_381_arg_1=0, var_382=0, var_382_arg_0=1, var_382_arg_1=0, var_383=0, var_383_arg_0=0, var_383_arg_1=0, var_384=1, var_384_arg_0=0, var_384_arg_1=0, var_385=0, var_385_arg_0=0, var_385_arg_1=1, var_386=0, var_386_arg_0=0, var_386_arg_1=0, var_387=1, var_387_arg_0=1, var_387_arg_1=0, var_388=1, var_388_arg_0=0, var_388_arg_1=0, var_388_arg_2=1, var_5=0, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=0, var_61=0, var_61_arg_0=0, var_61_arg_1=0, var_62=0, var_62_arg_0=0, var_62_arg_1=1, var_63=0, var_63_arg_0=0, var_63_arg_1=0, var_64=0, var_64_arg_0=0, var_64_arg_1=0, var_65=0, var_65_arg_0=0, var_65_arg_1=0, var_66=0, var_66_arg_0=0, var_66_arg_1=0, var_67=0, var_67_arg_0=0, var_67_arg_1=0, var_68=0, var_68_arg_0=0, var_68_arg_1=1, var_69=0, var_69_arg_0=0, var_69_arg_1=0, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_72=0, var_72_arg_0=0, var_72_arg_1=1, var_73=0, var_73_arg_0=0, var_73_arg_1=0, var_74=0, var_74_arg_0=0, var_74_arg_1=0, var_75=0, var_76=1, var_76_arg_0=0, var_76_arg_1=0, var_77=0, var_77_arg_0=0, var_77_arg_1=1, var_78=1, var_78_arg_0=0, var_78_arg_1=0, var_79=0, var_79_arg_0=0, var_79_arg_1=1, var_80=1, var_80_arg_0=0, var_80_arg_1=0, var_81=0, var_81_arg_0=0, var_81_arg_1=1, var_82=1, var_82_arg_0=0, var_82_arg_1=0, var_83=0, var_83_arg_0=0, var_83_arg_1=1, var_84=1, var_84_arg_0=0, var_84_arg_1=0, var_85=0, var_85_arg_0=0, var_85_arg_1=1, var_86=1, var_86_arg_0=0, var_86_arg_1=0, var_87=0, var_87_arg_0=0, var_87_arg_1=1, var_88=1, var_88_arg_0=0, var_88_arg_1=0, var_89=0, var_89_arg_0=0, var_89_arg_1=1, var_90=0, var_90_arg_0=0, var_90_arg_1=0] [L165] input_92 = __VERIFIER_nondet_uchar() [L166] input_92 = input_92 & mask_SORT_2 [L167] input_94 = __VERIFIER_nondet_uchar() [L168] input_94 = input_94 & mask_SORT_2 [L169] input_96 = __VERIFIER_nondet_uchar() [L170] input_96 = input_96 & mask_SORT_2 [L171] input_98 = __VERIFIER_nondet_uchar() [L172] input_98 = input_98 & mask_SORT_2 [L173] input_100 = __VERIFIER_nondet_uchar() [L174] input_100 = input_100 & mask_SORT_2 [L175] input_102 = __VERIFIER_nondet_uchar() [L176] input_102 = input_102 & mask_SORT_2 [L177] input_104 = __VERIFIER_nondet_uchar() [L178] input_104 = input_104 & mask_SORT_2 [L179] input_106 = __VERIFIER_nondet_uchar() [L180] input_106 = input_106 & mask_SORT_1 [L181] input_108 = __VERIFIER_nondet_uchar() [L182] input_108 = input_108 & mask_SORT_1 [L183] input_110 = __VERIFIER_nondet_uchar() [L184] input_110 = input_110 & mask_SORT_1 [L185] input_112 = __VERIFIER_nondet_uchar() [L186] input_112 = input_112 & mask_SORT_1 [L187] input_114 = __VERIFIER_nondet_uchar() [L188] input_114 = input_114 & mask_SORT_1 [L189] input_116 = __VERIFIER_nondet_uchar() [L190] input_116 = input_116 & mask_SORT_1 [L191] input_118 = __VERIFIER_nondet_uchar() [L192] input_118 = input_118 & mask_SORT_1 [L193] input_120 = __VERIFIER_nondet_uchar() [L194] input_120 = input_120 & mask_SORT_1 [L195] input_122 = __VERIFIER_nondet_uchar() [L196] input_122 = input_122 & mask_SORT_1 [L197] input_124 = __VERIFIER_nondet_uchar() [L198] input_124 = input_124 & mask_SORT_1 [L199] input_126 = __VERIFIER_nondet_uchar() [L200] input_126 = input_126 & mask_SORT_1 [L201] input_128 = __VERIFIER_nondet_uchar() [L202] input_128 = input_128 & mask_SORT_1 [L203] input_130 = __VERIFIER_nondet_uchar() [L204] input_130 = input_130 & mask_SORT_1 [L205] input_132 = __VERIFIER_nondet_uchar() [L206] input_132 = input_132 & mask_SORT_1 [L207] input_134 = __VERIFIER_nondet_uchar() [L208] input_134 = input_134 & mask_SORT_1 [L209] input_136 = __VERIFIER_nondet_uchar() [L210] input_136 = input_136 & mask_SORT_1 [L211] input_138 = __VERIFIER_nondet_uchar() [L212] input_138 = input_138 & mask_SORT_1 [L213] input_142 = __VERIFIER_nondet_uchar() [L214] input_142 = input_142 & mask_SORT_1 [L215] input_149 = __VERIFIER_nondet_uchar() [L216] input_149 = input_149 & mask_SORT_1 [L217] input_155 = __VERIFIER_nondet_uchar() [L218] input_159 = __VERIFIER_nondet_uchar() [L219] input_162 = __VERIFIER_nondet_uchar() [L220] input_167 = __VERIFIER_nondet_uchar() [L221] input_175 = __VERIFIER_nondet_uchar() [L222] input_179 = __VERIFIER_nondet_uchar() [L223] input_182 = __VERIFIER_nondet_uchar() [L224] input_182 = input_182 & mask_SORT_1 [L225] input_187 = __VERIFIER_nondet_uchar() [L226] input_187 = input_187 & mask_SORT_1 [L227] input_193 = __VERIFIER_nondet_uchar() [L228] input_193 = input_193 & mask_SORT_1 [L229] input_199 = __VERIFIER_nondet_uchar() [L230] input_199 = input_199 & mask_SORT_1 [L231] input_205 = __VERIFIER_nondet_uchar() [L232] input_205 = input_205 & mask_SORT_1 [L235] SORT_1 var_59_arg_0 = state_21; [L236] SORT_1 var_59_arg_1 = ~state_23; [L237] var_59_arg_1 = var_59_arg_1 & mask_SORT_1 [L238] SORT_1 var_59 = var_59_arg_0 & var_59_arg_1; [L239] SORT_1 var_60_arg_0 = var_59; [L240] SORT_1 var_60_arg_1 = ~state_25; [L241] var_60_arg_1 = var_60_arg_1 & mask_SORT_1 [L242] SORT_1 var_60 = var_60_arg_0 & var_60_arg_1; [L243] SORT_1 var_61_arg_0 = var_60; [L244] SORT_1 var_61_arg_1 = state_27; [L245] SORT_1 var_61 = var_61_arg_0 & var_61_arg_1; [L246] SORT_1 var_62_arg_0 = var_61; [L247] SORT_1 var_62_arg_1 = ~state_29; [L248] var_62_arg_1 = var_62_arg_1 & mask_SORT_1 [L249] SORT_1 var_62 = var_62_arg_0 & var_62_arg_1; [L250] SORT_1 var_63_arg_0 = var_62; [L251] SORT_1 var_63_arg_1 = ~state_31; [L252] var_63_arg_1 = var_63_arg_1 & mask_SORT_1 [L253] SORT_1 var_63 = var_63_arg_0 & var_63_arg_1; [L254] SORT_1 var_64_arg_0 = var_63; [L255] SORT_1 var_64_arg_1 = state_33; [L256] SORT_1 var_64 = var_64_arg_0 & var_64_arg_1; [L257] SORT_1 var_65_arg_0 = var_64; [L258] SORT_1 var_65_arg_1 = ~state_35; [L259] var_65_arg_1 = var_65_arg_1 & mask_SORT_1 [L260] SORT_1 var_65 = var_65_arg_0 & var_65_arg_1; [L261] SORT_1 var_66_arg_0 = var_65; [L262] SORT_1 var_66_arg_1 = ~state_37; [L263] var_66_arg_1 = var_66_arg_1 & mask_SORT_1 [L264] SORT_1 var_66 = var_66_arg_0 & var_66_arg_1; [L265] SORT_1 var_67_arg_0 = var_66; [L266] SORT_1 var_67_arg_1 = state_39; [L267] SORT_1 var_67 = var_67_arg_0 & var_67_arg_1; [L268] SORT_1 var_68_arg_0 = var_67; [L269] SORT_1 var_68_arg_1 = ~state_41; [L270] var_68_arg_1 = var_68_arg_1 & mask_SORT_1 [L271] SORT_1 var_68 = var_68_arg_0 & var_68_arg_1; [L272] SORT_1 var_69_arg_0 = var_68; [L273] SORT_1 var_69_arg_1 = ~state_43; [L274] var_69_arg_1 = var_69_arg_1 & mask_SORT_1 [L275] SORT_1 var_69 = var_69_arg_0 & var_69_arg_1; [L276] SORT_1 var_70_arg_0 = var_69; [L277] SORT_1 var_70_arg_1 = ~state_45; [L278] var_70_arg_1 = var_70_arg_1 & mask_SORT_1 [L279] SORT_1 var_70 = var_70_arg_0 & var_70_arg_1; [L280] SORT_1 var_71_arg_0 = var_70; [L281] SORT_1 var_71_arg_1 = state_47; [L282] SORT_1 var_71 = var_71_arg_0 & var_71_arg_1; [L283] SORT_1 var_72_arg_0 = var_71; [L284] SORT_1 var_72_arg_1 = ~state_49; [L285] var_72_arg_1 = var_72_arg_1 & mask_SORT_1 [L286] SORT_1 var_72 = var_72_arg_0 & var_72_arg_1; [L287] SORT_1 var_73_arg_0 = var_72; [L288] SORT_1 var_73_arg_1 = state_51; [L289] SORT_1 var_73 = var_73_arg_0 & var_73_arg_1; [L290] SORT_1 var_74_arg_0 = var_73; [L291] SORT_1 var_74_arg_1 = ~state_53; [L292] var_74_arg_1 = var_74_arg_1 & mask_SORT_1 [L293] SORT_1 var_74 = var_74_arg_0 & var_74_arg_1; [L294] SORT_2 var_76_arg_0 = var_75; [L295] SORT_2 var_76_arg_1 = state_6; [L296] SORT_1 var_76 = var_76_arg_0 == var_76_arg_1; [L297] SORT_1 var_77_arg_0 = var_74; [L298] SORT_1 var_77_arg_1 = var_76; [L299] SORT_1 var_77 = var_77_arg_0 & var_77_arg_1; [L300] SORT_2 var_78_arg_0 = var_75; [L301] SORT_2 var_78_arg_1 = state_8; [L302] SORT_1 var_78 = var_78_arg_0 == var_78_arg_1; [L303] SORT_1 var_79_arg_0 = var_77; [L304] SORT_1 var_79_arg_1 = var_78; [L305] SORT_1 var_79 = var_79_arg_0 & var_79_arg_1; [L306] SORT_2 var_80_arg_0 = var_75; [L307] SORT_2 var_80_arg_1 = state_10; [L308] SORT_1 var_80 = var_80_arg_0 == var_80_arg_1; [L309] SORT_1 var_81_arg_0 = var_79; [L310] SORT_1 var_81_arg_1 = var_80; [L311] SORT_1 var_81 = var_81_arg_0 & var_81_arg_1; [L312] SORT_2 var_82_arg_0 = var_75; [L313] SORT_2 var_82_arg_1 = state_12; [L314] SORT_1 var_82 = var_82_arg_0 == var_82_arg_1; [L315] SORT_1 var_83_arg_0 = var_81; [L316] SORT_1 var_83_arg_1 = var_82; [L317] SORT_1 var_83 = var_83_arg_0 & var_83_arg_1; [L318] SORT_2 var_84_arg_0 = var_75; [L319] SORT_2 var_84_arg_1 = state_14; [L320] SORT_1 var_84 = var_84_arg_0 == var_84_arg_1; [L321] SORT_1 var_85_arg_0 = var_83; [L322] SORT_1 var_85_arg_1 = var_84; [L323] SORT_1 var_85 = var_85_arg_0 & var_85_arg_1; [L324] SORT_2 var_86_arg_0 = var_75; [L325] SORT_2 var_86_arg_1 = state_16; [L326] SORT_1 var_86 = var_86_arg_0 == var_86_arg_1; [L327] SORT_1 var_87_arg_0 = var_85; [L328] SORT_1 var_87_arg_1 = var_86; [L329] SORT_1 var_87 = var_87_arg_0 & var_87_arg_1; [L330] SORT_2 var_88_arg_0 = var_75; [L331] SORT_2 var_88_arg_1 = state_18; [L332] SORT_1 var_88 = var_88_arg_0 == var_88_arg_1; [L333] SORT_1 var_89_arg_0 = var_87; [L334] SORT_1 var_89_arg_1 = var_88; [L335] SORT_1 var_89 = var_89_arg_0 & var_89_arg_1; [L336] SORT_1 var_90_arg_0 = state_57; [L337] SORT_1 var_90_arg_1 = var_89; [L338] SORT_1 var_90 = var_90_arg_0 & var_90_arg_1; [L339] var_90 = var_90 & mask_SORT_1 [L340] SORT_1 bad_91_arg_0 = var_90; [L341] CALL __VERIFIER_assert(!(bad_91_arg_0)) [L20] COND TRUE !(cond) VAL [\old(cond)=0, cond=0] [L20] reach_error() VAL [\old(cond)=0, cond=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 7 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 216.0s, OverallIterations: 2, TraceHistogramMax: 2, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 3.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 1 mSolverCounterUnknown, 3 SdHoareTripleChecker+Valid, 3.2s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 3 mSDsluCounter, 6 SdHoareTripleChecker+Invalid, 3.2s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 5 mSDsCounter, 1 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 7 IncrementalHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 1 mSolverCounterUnsat, 2 mSDtfsCounter, 7 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=8occurred in iteration=1, InterpolantAutomatonStates: 5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 1 MinimizatonAttempts, 1 StatesRemovedByMinimization, 1 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 93.9s SatisfiabilityAnalysisTime, 4.8s InterpolantComputationTime, 11 NumberOfCodeBlocks, 11 NumberOfCodeBlocksAsserted, 2 NumberOfCheckSat, 3 ConstructedInterpolants, 0 QuantifiedInterpolants, 8 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 1 InterpolantComputations, 1 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2022-11-03 02:40:52,978 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.protocols.1.prop1-back-serstep.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash ccd52863c81af6b9363b3cb9123948c48a201f89c1fc65f79eb7e0f4a69bd04e --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-5e519f3 [2022-11-03 02:40:55,755 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-03 02:40:55,757 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-03 02:40:55,804 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-03 02:40:55,804 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-03 02:40:55,810 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-03 02:40:55,813 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-03 02:40:55,819 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-03 02:40:55,827 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-03 02:40:55,829 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-03 02:40:55,831 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-03 02:40:55,832 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-03 02:40:55,834 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-03 02:40:55,838 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-03 02:40:55,840 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-03 02:40:55,842 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-03 02:40:55,844 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-03 02:40:55,852 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-03 02:40:55,854 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-03 02:40:55,860 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-03 02:40:55,862 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-03 02:40:55,872 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-03 02:40:55,873 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-03 02:40:55,875 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-03 02:40:55,879 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-03 02:40:55,882 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-03 02:40:55,883 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-03 02:40:55,884 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-03 02:40:55,885 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-03 02:40:55,888 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-03 02:40:55,889 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-03 02:40:55,890 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-03 02:40:55,892 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-03 02:40:55,894 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-03 02:40:55,895 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-03 02:40:55,895 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-03 02:40:55,896 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-03 02:40:55,897 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-03 02:40:55,897 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-03 02:40:55,899 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-03 02:40:55,900 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-03 02:40:55,901 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Bitvector.epf [2022-11-03 02:40:55,945 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-03 02:40:55,946 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-03 02:40:55,946 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-03 02:40:55,946 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-03 02:40:55,947 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-03 02:40:55,947 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-03 02:40:55,948 INFO L138 SettingsManager]: * User list type=DISABLED [2022-11-03 02:40:55,948 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-11-03 02:40:55,948 INFO L138 SettingsManager]: * Explicit value domain=true [2022-11-03 02:40:55,948 INFO L138 SettingsManager]: * Octagon Domain=false [2022-11-03 02:40:55,949 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-11-03 02:40:55,949 INFO L138 SettingsManager]: * Interval Domain=false [2022-11-03 02:40:55,950 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-03 02:40:55,950 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-03 02:40:55,950 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-03 02:40:55,950 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-03 02:40:55,951 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-03 02:40:55,951 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-11-03 02:40:55,951 INFO L138 SettingsManager]: * Use bitvectors instead of ints=true [2022-11-03 02:40:55,951 INFO L138 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2022-11-03 02:40:55,952 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-03 02:40:55,952 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-03 02:40:55,952 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-03 02:40:55,952 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-03 02:40:55,953 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-03 02:40:55,953 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-03 02:40:55,953 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 02:40:55,953 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-03 02:40:55,953 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-03 02:40:55,954 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-03 02:40:55,954 INFO L138 SettingsManager]: * Trace refinement strategy=WALRUS [2022-11-03 02:40:55,954 INFO L138 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2022-11-03 02:40:55,954 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-03 02:40:55,955 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-11-03 02:40:55,955 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-11-03 02:40:55,955 INFO L138 SettingsManager]: * Logic for external solver=AUFBV WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> ccd52863c81af6b9363b3cb9123948c48a201f89c1fc65f79eb7e0f4a69bd04e [2022-11-03 02:40:56,424 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-03 02:40:56,462 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-03 02:40:56,466 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-03 02:40:56,468 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-03 02:40:56,468 INFO L275 PluginConnector]: CDTParser initialized [2022-11-03 02:40:56,470 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.protocols.1.prop1-back-serstep.c [2022-11-03 02:40:56,551 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/data/5057e3771/8b068c973d79419c8866f70767f99f5a/FLAG4dba2b624 [2022-11-03 02:40:57,338 INFO L306 CDTParser]: Found 1 translation units. [2022-11-03 02:40:57,339 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.protocols.1.prop1-back-serstep.c [2022-11-03 02:40:57,352 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/data/5057e3771/8b068c973d79419c8866f70767f99f5a/FLAG4dba2b624 [2022-11-03 02:40:57,539 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/data/5057e3771/8b068c973d79419c8866f70767f99f5a [2022-11-03 02:40:57,542 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-03 02:40:57,544 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-03 02:40:57,546 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-03 02:40:57,546 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-03 02:40:57,552 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-03 02:40:57,553 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 02:40:57" (1/1) ... [2022-11-03 02:40:57,555 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7aa6919c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:40:57, skipping insertion in model container [2022-11-03 02:40:57,556 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 02:40:57" (1/1) ... [2022-11-03 02:40:57,568 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-03 02:40:57,626 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-03 02:40:57,810 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.protocols.1.prop1-back-serstep.c[1014,1027] [2022-11-03 02:40:58,208 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 02:40:58,217 INFO L203 MainTranslator]: Completed pre-run [2022-11-03 02:40:58,232 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.protocols.1.prop1-back-serstep.c[1014,1027] [2022-11-03 02:40:58,430 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 02:40:58,457 INFO L208 MainTranslator]: Completed translation [2022-11-03 02:40:58,458 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:40:58 WrapperNode [2022-11-03 02:40:58,458 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-03 02:40:58,459 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-03 02:40:58,459 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-03 02:40:58,460 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-03 02:40:58,467 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:40:58" (1/1) ... [2022-11-03 02:40:58,492 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:40:58" (1/1) ... [2022-11-03 02:40:58,556 INFO L138 Inliner]: procedures = 11, calls = 3, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1235 [2022-11-03 02:40:58,557 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-03 02:40:58,558 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-03 02:40:58,558 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-03 02:40:58,558 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-03 02:40:58,569 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:40:58" (1/1) ... [2022-11-03 02:40:58,570 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:40:58" (1/1) ... [2022-11-03 02:40:58,581 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:40:58" (1/1) ... [2022-11-03 02:40:58,581 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:40:58" (1/1) ... [2022-11-03 02:40:58,649 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:40:58" (1/1) ... [2022-11-03 02:40:58,665 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:40:58" (1/1) ... [2022-11-03 02:40:58,670 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:40:58" (1/1) ... [2022-11-03 02:40:58,675 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:40:58" (1/1) ... [2022-11-03 02:40:58,685 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-03 02:40:58,686 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-03 02:40:58,686 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-03 02:40:58,687 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-03 02:40:58,688 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:40:58" (1/1) ... [2022-11-03 02:40:58,720 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 02:40:58,733 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:40:58,758 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-03 02:40:58,788 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-03 02:40:58,811 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-03 02:40:58,812 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-03 02:40:59,182 INFO L235 CfgBuilder]: Building ICFG [2022-11-03 02:40:59,185 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-03 02:41:00,745 INFO L276 CfgBuilder]: Performing block encoding [2022-11-03 02:41:00,755 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-03 02:41:00,757 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-03 02:41:00,759 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 02:41:00 BoogieIcfgContainer [2022-11-03 02:41:00,760 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-03 02:41:00,773 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-03 02:41:00,773 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-03 02:41:00,776 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-03 02:41:00,777 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 03.11 02:40:57" (1/3) ... [2022-11-03 02:41:00,778 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1358c978 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 02:41:00, skipping insertion in model container [2022-11-03 02:41:00,778 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:40:58" (2/3) ... [2022-11-03 02:41:00,779 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1358c978 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 02:41:00, skipping insertion in model container [2022-11-03 02:41:00,779 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 02:41:00" (3/3) ... [2022-11-03 02:41:00,781 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.protocols.1.prop1-back-serstep.c [2022-11-03 02:41:00,810 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-03 02:41:00,811 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-03 02:41:00,907 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-03 02:41:00,917 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@f7b0d6f, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-03 02:41:00,918 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-03 02:41:00,922 INFO L276 IsEmpty]: Start isEmpty. Operand has 29 states, 27 states have (on average 1.4814814814814814) internal successors, (40), 28 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:41:00,928 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2022-11-03 02:41:00,929 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:41:00,929 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2022-11-03 02:41:00,930 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:41:00,937 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:41:00,938 INFO L85 PathProgramCache]: Analyzing trace with hash 28698761, now seen corresponding path program 1 times [2022-11-03 02:41:00,954 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:41:00,955 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1834248340] [2022-11-03 02:41:00,955 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:41:00,956 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:41:00,956 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:41:00,960 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:41:00,999 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (2)] Waiting until timeout for monitored process [2022-11-03 02:41:01,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:41:01,343 INFO L263 TraceCheckSpWp]: Trace formula consists of 206 conjuncts, 10 conjunts are in the unsatisfiable core [2022-11-03 02:41:01,354 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:41:01,477 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:41:01,477 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:41:01,478 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:41:01,478 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1834248340] [2022-11-03 02:41:01,479 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1834248340] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:41:01,479 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:41:01,479 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-03 02:41:01,481 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1918238334] [2022-11-03 02:41:01,482 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:41:01,489 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 02:41:01,489 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:41:01,525 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 02:41:01,526 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 02:41:01,529 INFO L87 Difference]: Start difference. First operand has 29 states, 27 states have (on average 1.4814814814814814) internal successors, (40), 28 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:41:01,851 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:41:01,852 INFO L93 Difference]: Finished difference Result 74 states and 111 transitions. [2022-11-03 02:41:01,855 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-03 02:41:01,857 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 5 [2022-11-03 02:41:01,857 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:41:01,867 INFO L225 Difference]: With dead ends: 74 [2022-11-03 02:41:01,867 INFO L226 Difference]: Without dead ends: 47 [2022-11-03 02:41:01,871 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-03 02:41:01,875 INFO L413 NwaCegarLoop]: 31 mSDtfsCounter, 58 mSDsluCounter, 60 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 58 SdHoareTripleChecker+Valid, 91 SdHoareTripleChecker+Invalid, 11 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-03 02:41:01,877 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [58 Valid, 91 Invalid, 11 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-11-03 02:41:01,900 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2022-11-03 02:41:01,915 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 27. [2022-11-03 02:41:01,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 26 states have (on average 1.3846153846153846) internal successors, (36), 26 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:41:01,917 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 36 transitions. [2022-11-03 02:41:01,919 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 36 transitions. Word has length 5 [2022-11-03 02:41:01,919 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:41:01,920 INFO L495 AbstractCegarLoop]: Abstraction has 27 states and 36 transitions. [2022-11-03 02:41:01,920 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:41:01,922 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 36 transitions. [2022-11-03 02:41:01,923 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-11-03 02:41:01,923 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:41:01,924 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:41:01,942 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (2)] Forceful destruction successful, exit code 0 [2022-11-03 02:41:02,136 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:41:02,137 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:41:02,138 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:41:02,138 INFO L85 PathProgramCache]: Analyzing trace with hash -446791645, now seen corresponding path program 1 times [2022-11-03 02:41:02,141 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:41:02,141 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1746385776] [2022-11-03 02:41:02,141 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:41:02,142 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:41:02,142 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:41:02,144 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:41:02,151 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (3)] Waiting until timeout for monitored process [2022-11-03 02:41:02,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:41:02,859 INFO L263 TraceCheckSpWp]: Trace formula consists of 1107 conjuncts, 47 conjunts are in the unsatisfiable core [2022-11-03 02:41:02,879 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:41:03,296 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:41:03,296 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:41:04,269 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:41:04,270 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:41:04,270 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1746385776] [2022-11-03 02:41:04,271 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1746385776] provided 1 perfect and 1 imperfect interpolant sequences [2022-11-03 02:41:04,271 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-03 02:41:04,271 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [8] total 13 [2022-11-03 02:41:04,271 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1396259320] [2022-11-03 02:41:04,272 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:41:04,273 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-03 02:41:04,273 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:41:04,274 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-03 02:41:04,275 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=124, Unknown=0, NotChecked=0, Total=156 [2022-11-03 02:41:04,275 INFO L87 Difference]: Start difference. First operand 27 states and 36 transitions. Second operand has 7 states, 7 states have (on average 3.7142857142857144) internal successors, (26), 7 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:41:04,644 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:41:04,644 INFO L93 Difference]: Finished difference Result 49 states and 66 transitions. [2022-11-03 02:41:04,645 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-03 02:41:04,645 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 3.7142857142857144) internal successors, (26), 7 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 26 [2022-11-03 02:41:04,646 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:41:04,646 INFO L225 Difference]: With dead ends: 49 [2022-11-03 02:41:04,647 INFO L226 Difference]: Without dead ends: 47 [2022-11-03 02:41:04,648 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 47 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=47, Invalid=193, Unknown=0, NotChecked=0, Total=240 [2022-11-03 02:41:04,649 INFO L413 NwaCegarLoop]: 54 mSDtfsCounter, 59 mSDsluCounter, 137 mSDsCounter, 0 mSdLazyCounter, 2 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 59 SdHoareTripleChecker+Valid, 191 SdHoareTripleChecker+Invalid, 29 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 2 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 26 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 02:41:04,650 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [59 Valid, 191 Invalid, 29 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 2 Invalid, 0 Unknown, 26 Unchecked, 0.0s Time] [2022-11-03 02:41:04,652 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2022-11-03 02:41:04,656 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 28. [2022-11-03 02:41:04,657 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 27 states have (on average 1.3703703703703705) internal successors, (37), 27 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:41:04,658 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 37 transitions. [2022-11-03 02:41:04,658 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 37 transitions. Word has length 26 [2022-11-03 02:41:04,658 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:41:04,659 INFO L495 AbstractCegarLoop]: Abstraction has 28 states and 37 transitions. [2022-11-03 02:41:04,659 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 3.7142857142857144) internal successors, (26), 7 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:41:04,659 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 37 transitions. [2022-11-03 02:41:04,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-11-03 02:41:04,660 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:41:04,660 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:41:04,685 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (3)] Forceful destruction successful, exit code 0 [2022-11-03 02:41:04,874 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:41:04,874 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:41:04,875 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:41:04,875 INFO L85 PathProgramCache]: Analyzing trace with hash -448638687, now seen corresponding path program 1 times [2022-11-03 02:41:04,877 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:41:04,878 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1005078156] [2022-11-03 02:41:04,878 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:41:04,878 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:41:04,878 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:41:04,880 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:41:04,891 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (4)] Waiting until timeout for monitored process [2022-11-03 02:41:05,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:41:05,579 INFO L263 TraceCheckSpWp]: Trace formula consists of 1107 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-03 02:41:05,587 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:41:05,659 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:41:05,659 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:41:05,660 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:41:05,660 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1005078156] [2022-11-03 02:41:05,660 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1005078156] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:41:05,660 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:41:05,661 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-03 02:41:05,661 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [40336923] [2022-11-03 02:41:05,661 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:41:05,662 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 02:41:05,662 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:41:05,663 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 02:41:05,663 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 02:41:05,663 INFO L87 Difference]: Start difference. First operand 28 states and 37 transitions. Second operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 4 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:41:05,729 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:41:05,729 INFO L93 Difference]: Finished difference Result 92 states and 127 transitions. [2022-11-03 02:41:05,730 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-03 02:41:05,730 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 4 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 26 [2022-11-03 02:41:05,731 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:41:05,731 INFO L225 Difference]: With dead ends: 92 [2022-11-03 02:41:05,731 INFO L226 Difference]: Without dead ends: 66 [2022-11-03 02:41:05,732 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-03 02:41:05,733 INFO L413 NwaCegarLoop]: 59 mSDtfsCounter, 39 mSDsluCounter, 61 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 39 SdHoareTripleChecker+Valid, 120 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 02:41:05,734 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [39 Valid, 120 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-03 02:41:05,735 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states. [2022-11-03 02:41:05,740 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 48. [2022-11-03 02:41:05,741 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 48 states, 47 states have (on average 1.3829787234042554) internal successors, (65), 47 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:41:05,742 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 65 transitions. [2022-11-03 02:41:05,742 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 65 transitions. Word has length 26 [2022-11-03 02:41:05,742 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:41:05,743 INFO L495 AbstractCegarLoop]: Abstraction has 48 states and 65 transitions. [2022-11-03 02:41:05,743 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 4 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:41:05,743 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 65 transitions. [2022-11-03 02:41:05,744 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2022-11-03 02:41:05,744 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:41:05,744 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2022-11-03 02:41:05,770 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (4)] Forceful destruction successful, exit code 0 [2022-11-03 02:41:05,964 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:41:05,965 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:41:05,965 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:41:05,965 INFO L85 PathProgramCache]: Analyzing trace with hash 673209799, now seen corresponding path program 1 times [2022-11-03 02:41:05,969 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:41:05,970 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1062800673] [2022-11-03 02:41:05,970 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:41:05,970 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:41:05,971 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:41:05,972 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:41:05,988 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (5)] Waiting until timeout for monitored process [2022-11-03 02:41:06,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:41:06,985 INFO L263 TraceCheckSpWp]: Trace formula consists of 2008 conjuncts, 85 conjunts are in the unsatisfiable core [2022-11-03 02:41:07,004 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:41:11,511 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 22 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 02:41:11,511 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:41:20,895 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 02:41:20,896 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:41:20,896 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1062800673] [2022-11-03 02:41:20,896 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1062800673] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:41:20,897 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [800098306] [2022-11-03 02:41:20,897 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:41:20,897 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:41:20,897 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:41:20,901 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:41:20,905 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (6)] Waiting until timeout for monitored process [2022-11-03 02:41:22,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:41:22,484 INFO L263 TraceCheckSpWp]: Trace formula consists of 2008 conjuncts, 85 conjunts are in the unsatisfiable core [2022-11-03 02:41:22,497 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:41:23,312 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 22 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 02:41:23,312 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:41:28,938 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 02:41:28,939 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [800098306] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:41:28,944 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [680346334] [2022-11-03 02:41:28,944 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:41:28,944 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:41:28,944 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:41:28,948 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:41:28,969 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-11-03 02:41:29,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:41:29,688 INFO L263 TraceCheckSpWp]: Trace formula consists of 2008 conjuncts, 88 conjunts are in the unsatisfiable core [2022-11-03 02:41:29,700 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:41:30,780 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 21 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 02:41:30,780 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:41:45,933 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 24 refuted. 1 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:41:45,933 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [680346334] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:41:45,933 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:41:45,934 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 17, 18] total 33 [2022-11-03 02:41:45,936 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [209996777] [2022-11-03 02:41:45,936 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:41:45,937 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 33 states [2022-11-03 02:41:45,937 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:41:45,938 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2022-11-03 02:41:45,939 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=148, Invalid=904, Unknown=4, NotChecked=0, Total=1056 [2022-11-03 02:41:45,939 INFO L87 Difference]: Start difference. First operand 48 states and 65 transitions. Second operand has 33 states, 33 states have (on average 2.9393939393939394) internal successors, (97), 33 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:41:46,997 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:41:46,998 INFO L93 Difference]: Finished difference Result 78 states and 105 transitions. [2022-11-03 02:41:47,000 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-11-03 02:41:47,001 INFO L78 Accepts]: Start accepts. Automaton has has 33 states, 33 states have (on average 2.9393939393939394) internal successors, (97), 33 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 47 [2022-11-03 02:41:47,001 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:41:47,002 INFO L225 Difference]: With dead ends: 78 [2022-11-03 02:41:47,002 INFO L226 Difference]: Without dead ends: 76 [2022-11-03 02:41:47,003 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 278 GetRequests, 229 SyntacticMatches, 16 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 754 ImplicationChecksByTransitivity, 28.3s TimeCoverageRelationStatistics Valid=171, Invalid=1015, Unknown=4, NotChecked=0, Total=1190 [2022-11-03 02:41:47,004 INFO L413 NwaCegarLoop]: 20 mSDtfsCounter, 61 mSDsluCounter, 307 mSDsCounter, 0 mSdLazyCounter, 4 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 61 SdHoareTripleChecker+Valid, 327 SdHoareTripleChecker+Invalid, 54 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 4 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 50 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 02:41:47,004 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [61 Valid, 327 Invalid, 54 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 4 Invalid, 0 Unknown, 50 Unchecked, 0.0s Time] [2022-11-03 02:41:47,005 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. [2022-11-03 02:41:47,013 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 73. [2022-11-03 02:41:47,014 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 73 states, 72 states have (on average 1.3888888888888888) internal successors, (100), 72 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:41:47,015 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 100 transitions. [2022-11-03 02:41:47,015 INFO L78 Accepts]: Start accepts. Automaton has 73 states and 100 transitions. Word has length 47 [2022-11-03 02:41:47,016 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:41:47,016 INFO L495 AbstractCegarLoop]: Abstraction has 73 states and 100 transitions. [2022-11-03 02:41:47,016 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 33 states, 33 states have (on average 2.9393939393939394) internal successors, (97), 33 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:41:47,017 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 100 transitions. [2022-11-03 02:41:47,018 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2022-11-03 02:41:47,018 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:41:47,018 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:41:47,060 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2022-11-03 02:41:47,252 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (6)] Forceful destruction successful, exit code 0 [2022-11-03 02:41:47,452 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (5)] Forceful destruction successful, exit code 0 [2022-11-03 02:41:47,635 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:41:47,635 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:41:47,636 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:41:47,636 INFO L85 PathProgramCache]: Analyzing trace with hash -1846750135, now seen corresponding path program 1 times [2022-11-03 02:41:47,637 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:41:47,637 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1195517645] [2022-11-03 02:41:47,637 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:41:47,638 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:41:47,638 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:41:47,639 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:41:47,643 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (8)] Waiting until timeout for monitored process [2022-11-03 02:41:48,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:41:48,478 INFO L263 TraceCheckSpWp]: Trace formula consists of 2008 conjuncts, 109 conjunts are in the unsatisfiable core [2022-11-03 02:41:48,489 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:41:55,822 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 22 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 02:41:55,822 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:42:02,966 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 02:42:02,967 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:42:02,967 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1195517645] [2022-11-03 02:42:02,967 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1195517645] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:42:02,967 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [608832156] [2022-11-03 02:42:02,967 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:42:02,968 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:42:02,968 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:42:02,973 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:42:03,004 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (9)] Waiting until timeout for monitored process [2022-11-03 02:42:04,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:42:04,492 INFO L263 TraceCheckSpWp]: Trace formula consists of 2008 conjuncts, 109 conjunts are in the unsatisfiable core [2022-11-03 02:42:04,502 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:42:05,360 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 22 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 02:42:05,361 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:42:10,547 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 02:42:10,547 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [608832156] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:42:10,547 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1578891934] [2022-11-03 02:42:10,547 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:42:10,547 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:42:10,548 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:42:10,548 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:42:10,549 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-11-03 02:42:11,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:42:11,199 INFO L263 TraceCheckSpWp]: Trace formula consists of 2008 conjuncts, 112 conjunts are in the unsatisfiable core [2022-11-03 02:42:11,205 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:42:12,261 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 21 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 02:42:12,262 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:42:21,786 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 24 refuted. 1 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:42:21,787 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1578891934] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:42:21,787 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:42:21,787 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 15, 16] total 29 [2022-11-03 02:42:21,787 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [458176269] [2022-11-03 02:42:21,788 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:42:21,788 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2022-11-03 02:42:21,789 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:42:21,789 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2022-11-03 02:42:21,790 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=118, Invalid=691, Unknown=3, NotChecked=0, Total=812 [2022-11-03 02:42:21,790 INFO L87 Difference]: Start difference. First operand 73 states and 100 transitions. Second operand has 29 states, 29 states have (on average 3.3448275862068964) internal successors, (97), 29 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:42:23,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:42:23,016 INFO L93 Difference]: Finished difference Result 143 states and 196 transitions. [2022-11-03 02:42:23,017 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-11-03 02:42:23,017 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 29 states have (on average 3.3448275862068964) internal successors, (97), 29 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 47 [2022-11-03 02:42:23,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:42:23,018 INFO L225 Difference]: With dead ends: 143 [2022-11-03 02:42:23,018 INFO L226 Difference]: Without dead ends: 141 [2022-11-03 02:42:23,019 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 278 GetRequests, 233 SyntacticMatches, 16 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 567 ImplicationChecksByTransitivity, 23.3s TimeCoverageRelationStatistics Valid=141, Invalid=786, Unknown=3, NotChecked=0, Total=930 [2022-11-03 02:42:23,020 INFO L413 NwaCegarLoop]: 22 mSDtfsCounter, 44 mSDsluCounter, 400 mSDsCounter, 0 mSdLazyCounter, 6 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 44 SdHoareTripleChecker+Valid, 422 SdHoareTripleChecker+Invalid, 58 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 6 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 52 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:42:23,020 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [44 Valid, 422 Invalid, 58 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 6 Invalid, 0 Unknown, 52 Unchecked, 0.1s Time] [2022-11-03 02:42:23,021 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2022-11-03 02:42:23,036 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 135. [2022-11-03 02:42:23,036 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 135 states, 134 states have (on average 1.4029850746268657) internal successors, (188), 134 states have internal predecessors, (188), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:42:23,038 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 188 transitions. [2022-11-03 02:42:23,038 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 188 transitions. Word has length 47 [2022-11-03 02:42:23,038 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:42:23,039 INFO L495 AbstractCegarLoop]: Abstraction has 135 states and 188 transitions. [2022-11-03 02:42:23,039 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 29 states have (on average 3.3448275862068964) internal successors, (97), 29 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:42:23,039 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 188 transitions. [2022-11-03 02:42:23,040 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2022-11-03 02:42:23,041 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:42:23,041 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:42:23,059 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (8)] Ended with exit code 0 [2022-11-03 02:42:23,253 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (9)] Ended with exit code 0 [2022-11-03 02:42:23,470 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-11-03 02:42:23,645 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:42:23,645 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:42:23,646 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:42:23,646 INFO L85 PathProgramCache]: Analyzing trace with hash -1424048309, now seen corresponding path program 1 times [2022-11-03 02:42:23,647 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:42:23,647 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1596891692] [2022-11-03 02:42:23,647 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:42:23,648 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:42:23,648 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:42:23,650 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:42:23,652 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (11)] Waiting until timeout for monitored process [2022-11-03 02:42:24,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:42:24,364 INFO L263 TraceCheckSpWp]: Trace formula consists of 2008 conjuncts, 140 conjunts are in the unsatisfiable core [2022-11-03 02:42:24,371 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:42:33,833 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 22 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 02:42:33,833 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:42:46,112 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 02:42:46,112 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:42:46,112 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1596891692] [2022-11-03 02:42:46,112 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1596891692] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:42:46,112 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1041250661] [2022-11-03 02:42:46,112 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:42:46,112 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:42:46,113 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:42:46,113 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:42:46,115 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (12)] Waiting until timeout for monitored process [2022-11-03 02:42:47,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:42:47,625 INFO L263 TraceCheckSpWp]: Trace formula consists of 2008 conjuncts, 140 conjunts are in the unsatisfiable core [2022-11-03 02:42:47,637 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:42:48,510 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 22 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 02:42:48,511 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:42:55,719 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 02:42:55,720 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1041250661] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:42:55,720 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1703788390] [2022-11-03 02:42:55,720 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:42:55,721 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:42:55,721 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:42:55,722 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:42:55,723 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-11-03 02:42:56,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:42:56,368 INFO L263 TraceCheckSpWp]: Trace formula consists of 2008 conjuncts, 144 conjunts are in the unsatisfiable core [2022-11-03 02:42:56,378 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:42:59,365 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 21 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 02:42:59,365 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:43:10,248 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 02:43:10,249 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1703788390] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:43:10,249 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:43:10,249 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 17, 17] total 35 [2022-11-03 02:43:10,250 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1084017729] [2022-11-03 02:43:10,250 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:43:10,250 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 35 states [2022-11-03 02:43:10,250 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:43:10,251 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2022-11-03 02:43:10,252 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=161, Invalid=1026, Unknown=3, NotChecked=0, Total=1190 [2022-11-03 02:43:10,252 INFO L87 Difference]: Start difference. First operand 135 states and 188 transitions. Second operand has 35 states, 35 states have (on average 2.8857142857142857) internal successors, (101), 35 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:43:22,903 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:43:22,903 INFO L93 Difference]: Finished difference Result 225 states and 312 transitions. [2022-11-03 02:43:22,903 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-11-03 02:43:22,904 INFO L78 Accepts]: Start accepts. Automaton has has 35 states, 35 states have (on average 2.8857142857142857) internal successors, (101), 35 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 47 [2022-11-03 02:43:22,904 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:43:22,905 INFO L225 Difference]: With dead ends: 225 [2022-11-03 02:43:22,906 INFO L226 Difference]: Without dead ends: 223 [2022-11-03 02:43:22,907 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 290 GetRequests, 228 SyntacticMatches, 17 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 910 ImplicationChecksByTransitivity, 44.7s TimeCoverageRelationStatistics Valid=435, Invalid=1724, Unknown=3, NotChecked=0, Total=2162 [2022-11-03 02:43:22,908 INFO L413 NwaCegarLoop]: 43 mSDtfsCounter, 250 mSDsluCounter, 590 mSDsCounter, 0 mSdLazyCounter, 4 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 250 SdHoareTripleChecker+Valid, 633 SdHoareTripleChecker+Invalid, 265 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 4 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 261 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 02:43:22,908 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [250 Valid, 633 Invalid, 265 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 4 Invalid, 0 Unknown, 261 Unchecked, 0.0s Time] [2022-11-03 02:43:22,909 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 223 states. [2022-11-03 02:43:22,935 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 223 to 165. [2022-11-03 02:43:22,936 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 165 states, 164 states have (on average 1.420731707317073) internal successors, (233), 164 states have internal predecessors, (233), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:43:22,937 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 233 transitions. [2022-11-03 02:43:22,938 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 233 transitions. Word has length 47 [2022-11-03 02:43:22,938 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:43:22,938 INFO L495 AbstractCegarLoop]: Abstraction has 165 states and 233 transitions. [2022-11-03 02:43:22,938 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 35 states, 35 states have (on average 2.8857142857142857) internal successors, (101), 35 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:43:22,939 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 233 transitions. [2022-11-03 02:43:22,940 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2022-11-03 02:43:22,940 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:43:22,941 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:43:22,975 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (11)] Forceful destruction successful, exit code 0 [2022-11-03 02:43:23,174 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (12)] Forceful destruction successful, exit code 0 [2022-11-03 02:43:23,391 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2022-11-03 02:43:23,565 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:43:23,566 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:43:23,566 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:43:23,566 INFO L85 PathProgramCache]: Analyzing trace with hash 1282571085, now seen corresponding path program 1 times [2022-11-03 02:43:23,567 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:43:23,567 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1512579196] [2022-11-03 02:43:23,567 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:43:23,568 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:43:23,568 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:43:23,569 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:43:23,570 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (14)] Waiting until timeout for monitored process [2022-11-03 02:43:24,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:43:24,263 INFO L263 TraceCheckSpWp]: Trace formula consists of 2008 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-03 02:43:24,269 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:43:24,372 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 13 proven. 11 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 02:43:24,372 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:43:24,394 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-11-03 02:43:24,394 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:43:24,395 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1512579196] [2022-11-03 02:43:24,395 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1512579196] provided 1 perfect and 1 imperfect interpolant sequences [2022-11-03 02:43:24,395 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-03 02:43:24,395 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [7] total 8 [2022-11-03 02:43:24,395 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [100584780] [2022-11-03 02:43:24,395 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:43:24,396 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-03 02:43:24,396 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:43:24,397 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-03 02:43:24,397 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-11-03 02:43:24,397 INFO L87 Difference]: Start difference. First operand 165 states and 233 transitions. Second operand has 5 states, 5 states have (on average 8.4) internal successors, (42), 5 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:43:24,610 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:43:24,610 INFO L93 Difference]: Finished difference Result 547 states and 767 transitions. [2022-11-03 02:43:24,611 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-03 02:43:24,611 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 8.4) internal successors, (42), 5 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 47 [2022-11-03 02:43:24,611 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:43:24,614 INFO L225 Difference]: With dead ends: 547 [2022-11-03 02:43:24,614 INFO L226 Difference]: Without dead ends: 404 [2022-11-03 02:43:24,615 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 88 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2022-11-03 02:43:24,616 INFO L413 NwaCegarLoop]: 77 mSDtfsCounter, 66 mSDsluCounter, 81 mSDsCounter, 0 mSdLazyCounter, 28 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 66 SdHoareTripleChecker+Valid, 158 SdHoareTripleChecker+Invalid, 29 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 28 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-03 02:43:24,617 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [66 Valid, 158 Invalid, 29 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 28 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-03 02:43:24,622 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 404 states. [2022-11-03 02:43:24,647 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 404 to 189. [2022-11-03 02:43:24,648 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 189 states, 188 states have (on average 1.398936170212766) internal successors, (263), 188 states have internal predecessors, (263), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:43:24,649 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 189 states to 189 states and 263 transitions. [2022-11-03 02:43:24,649 INFO L78 Accepts]: Start accepts. Automaton has 189 states and 263 transitions. Word has length 47 [2022-11-03 02:43:24,650 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:43:24,650 INFO L495 AbstractCegarLoop]: Abstraction has 189 states and 263 transitions. [2022-11-03 02:43:24,650 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 8.4) internal successors, (42), 5 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:43:24,650 INFO L276 IsEmpty]: Start isEmpty. Operand 189 states and 263 transitions. [2022-11-03 02:43:24,657 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2022-11-03 02:43:24,663 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:43:24,664 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:43:24,685 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (14)] Forceful destruction successful, exit code 0 [2022-11-03 02:43:24,876 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:43:24,877 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:43:24,877 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:43:24,877 INFO L85 PathProgramCache]: Analyzing trace with hash 695765071, now seen corresponding path program 1 times [2022-11-03 02:43:24,879 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:43:24,879 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1817547805] [2022-11-03 02:43:24,879 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:43:24,879 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:43:24,879 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:43:24,880 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:43:24,882 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (15)] Waiting until timeout for monitored process [2022-11-03 02:43:25,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:43:25,581 INFO L263 TraceCheckSpWp]: Trace formula consists of 2008 conjuncts, 102 conjunts are in the unsatisfiable core [2022-11-03 02:43:25,587 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:43:36,320 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 22 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 02:43:36,320 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:43:44,097 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 02:43:44,097 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:43:44,097 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1817547805] [2022-11-03 02:43:44,097 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1817547805] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:43:44,097 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1514219498] [2022-11-03 02:43:44,097 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:43:44,097 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:43:44,098 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:43:44,098 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:43:44,101 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (16)] Waiting until timeout for monitored process [2022-11-03 02:43:45,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:43:45,581 INFO L263 TraceCheckSpWp]: Trace formula consists of 2008 conjuncts, 102 conjunts are in the unsatisfiable core [2022-11-03 02:43:45,591 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:43:46,145 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 22 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 02:43:46,145 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:43:50,715 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 02:43:50,716 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1514219498] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:43:50,716 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [277111763] [2022-11-03 02:43:50,716 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:43:50,716 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:43:50,716 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:43:50,721 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:43:50,729 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-11-03 02:43:51,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:43:51,346 INFO L263 TraceCheckSpWp]: Trace formula consists of 2008 conjuncts, 105 conjunts are in the unsatisfiable core [2022-11-03 02:43:51,355 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:43:52,350 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 21 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 02:43:52,350 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:43:59,304 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 02:43:59,304 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [277111763] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:43:59,304 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:43:59,304 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 18, 18] total 34 [2022-11-03 02:43:59,305 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1317961804] [2022-11-03 02:43:59,305 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:43:59,312 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 34 states [2022-11-03 02:43:59,313 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:43:59,313 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2022-11-03 02:43:59,314 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=146, Invalid=972, Unknown=4, NotChecked=0, Total=1122 [2022-11-03 02:43:59,314 INFO L87 Difference]: Start difference. First operand 189 states and 263 transitions. Second operand has 34 states, 34 states have (on average 2.823529411764706) internal successors, (96), 34 states have internal predecessors, (96), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:43:59,756 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:43:59,756 INFO L93 Difference]: Finished difference Result 263 states and 361 transitions. [2022-11-03 02:43:59,756 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-11-03 02:43:59,756 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 34 states have (on average 2.823529411764706) internal successors, (96), 34 states have internal predecessors, (96), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 47 [2022-11-03 02:43:59,756 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:43:59,758 INFO L225 Difference]: With dead ends: 263 [2022-11-03 02:43:59,758 INFO L226 Difference]: Without dead ends: 261 [2022-11-03 02:43:59,758 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 278 GetRequests, 227 SyntacticMatches, 17 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 864 ImplicationChecksByTransitivity, 25.0s TimeCoverageRelationStatistics Valid=165, Invalid=1091, Unknown=4, NotChecked=0, Total=1260 [2022-11-03 02:43:59,759 INFO L413 NwaCegarLoop]: 35 mSDtfsCounter, 39 mSDsluCounter, 466 mSDsCounter, 0 mSdLazyCounter, 4 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 39 SdHoareTripleChecker+Valid, 501 SdHoareTripleChecker+Invalid, 81 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 4 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 77 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 02:43:59,760 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [39 Valid, 501 Invalid, 81 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 4 Invalid, 0 Unknown, 77 Unchecked, 0.0s Time] [2022-11-03 02:43:59,760 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 261 states. [2022-11-03 02:43:59,781 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 261 to 193. [2022-11-03 02:43:59,782 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 193 states, 192 states have (on average 1.4010416666666667) internal successors, (269), 192 states have internal predecessors, (269), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:43:59,783 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 193 states to 193 states and 269 transitions. [2022-11-03 02:43:59,783 INFO L78 Accepts]: Start accepts. Automaton has 193 states and 269 transitions. Word has length 47 [2022-11-03 02:43:59,783 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:43:59,784 INFO L495 AbstractCegarLoop]: Abstraction has 193 states and 269 transitions. [2022-11-03 02:43:59,784 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 34 states, 34 states have (on average 2.823529411764706) internal successors, (96), 34 states have internal predecessors, (96), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:43:59,784 INFO L276 IsEmpty]: Start isEmpty. Operand 193 states and 269 transitions. [2022-11-03 02:43:59,785 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2022-11-03 02:43:59,785 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:43:59,785 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:43:59,827 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2022-11-03 02:44:00,010 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (16)] Forceful destruction successful, exit code 0 [2022-11-03 02:44:00,218 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (15)] Forceful destruction successful, exit code 0 [2022-11-03 02:44:00,401 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,16 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,15 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:44:00,401 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:44:00,402 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:44:00,402 INFO L85 PathProgramCache]: Analyzing trace with hash 1396829649, now seen corresponding path program 1 times [2022-11-03 02:44:00,403 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:44:00,403 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1928350351] [2022-11-03 02:44:00,403 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:44:00,403 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:44:00,403 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:44:00,404 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:44:00,412 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (18)] Waiting until timeout for monitored process [2022-11-03 02:44:01,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:44:01,127 INFO L263 TraceCheckSpWp]: Trace formula consists of 2008 conjuncts, 143 conjunts are in the unsatisfiable core [2022-11-03 02:44:01,133 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:44:13,403 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 22 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 02:44:13,403 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:44:24,208 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 02:44:24,209 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:44:24,209 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1928350351] [2022-11-03 02:44:24,209 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1928350351] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:44:24,209 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1421486955] [2022-11-03 02:44:24,209 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:44:24,209 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:44:24,209 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:44:24,210 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:44:24,212 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (19)] Waiting until timeout for monitored process [2022-11-03 02:44:25,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:44:25,707 INFO L263 TraceCheckSpWp]: Trace formula consists of 2008 conjuncts, 143 conjunts are in the unsatisfiable core [2022-11-03 02:44:25,716 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:44:26,763 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 22 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 02:44:26,764 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:44:34,074 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 02:44:34,074 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1421486955] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:44:34,074 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [572227664] [2022-11-03 02:44:34,074 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:44:34,074 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:44:34,074 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:44:34,075 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:44:34,077 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2022-11-03 02:44:34,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:44:34,694 INFO L263 TraceCheckSpWp]: Trace formula consists of 2008 conjuncts, 146 conjunts are in the unsatisfiable core [2022-11-03 02:44:34,700 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:44:36,116 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 21 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 02:44:36,116 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:44:47,968 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 02:44:47,968 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [572227664] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:44:47,968 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:44:47,968 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 15, 15] total 28 [2022-11-03 02:44:47,969 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [709481033] [2022-11-03 02:44:47,969 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:44:47,969 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 28 states [2022-11-03 02:44:47,970 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:44:47,970 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2022-11-03 02:44:47,970 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=106, Invalid=646, Unknown=4, NotChecked=0, Total=756 [2022-11-03 02:44:47,971 INFO L87 Difference]: Start difference. First operand 193 states and 269 transitions. Second operand has 28 states, 28 states have (on average 3.4285714285714284) internal successors, (96), 28 states have internal predecessors, (96), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:44:48,605 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:44:48,605 INFO L93 Difference]: Finished difference Result 376 states and 519 transitions. [2022-11-03 02:44:48,605 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-11-03 02:44:48,606 INFO L78 Accepts]: Start accepts. Automaton has has 28 states, 28 states have (on average 3.4285714285714284) internal successors, (96), 28 states have internal predecessors, (96), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 47 [2022-11-03 02:44:48,606 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:44:48,608 INFO L225 Difference]: With dead ends: 376 [2022-11-03 02:44:48,608 INFO L226 Difference]: Without dead ends: 374 [2022-11-03 02:44:48,608 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 278 GetRequests, 233 SyntacticMatches, 17 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 587 ImplicationChecksByTransitivity, 33.9s TimeCoverageRelationStatistics Valid=125, Invalid=741, Unknown=4, NotChecked=0, Total=870 [2022-11-03 02:44:48,609 INFO L413 NwaCegarLoop]: 22 mSDtfsCounter, 39 mSDsluCounter, 382 mSDsCounter, 0 mSdLazyCounter, 6 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 39 SdHoareTripleChecker+Valid, 404 SdHoareTripleChecker+Invalid, 40 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 6 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 34 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 02:44:48,609 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [39 Valid, 404 Invalid, 40 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 6 Invalid, 0 Unknown, 34 Unchecked, 0.0s Time] [2022-11-03 02:44:48,610 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 374 states. [2022-11-03 02:44:48,648 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 374 to 337. [2022-11-03 02:44:48,648 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 337 states, 336 states have (on average 1.3958333333333333) internal successors, (469), 336 states have internal predecessors, (469), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:44:48,649 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 337 states to 337 states and 469 transitions. [2022-11-03 02:44:48,649 INFO L78 Accepts]: Start accepts. Automaton has 337 states and 469 transitions. Word has length 47 [2022-11-03 02:44:48,650 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:44:48,650 INFO L495 AbstractCegarLoop]: Abstraction has 337 states and 469 transitions. [2022-11-03 02:44:48,650 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 28 states, 28 states have (on average 3.4285714285714284) internal successors, (96), 28 states have internal predecessors, (96), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:44:48,651 INFO L276 IsEmpty]: Start isEmpty. Operand 337 states and 469 transitions. [2022-11-03 02:44:48,651 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2022-11-03 02:44:48,651 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:44:48,652 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:44:48,667 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (19)] Forceful destruction successful, exit code 0 [2022-11-03 02:44:48,883 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Forceful destruction successful, exit code 0 [2022-11-03 02:44:49,075 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (18)] Forceful destruction successful, exit code 0 [2022-11-03 02:44:49,257 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 19 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,20 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,18 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:44:49,257 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:44:49,257 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:44:49,258 INFO L85 PathProgramCache]: Analyzing trace with hash 116965971, now seen corresponding path program 1 times [2022-11-03 02:44:49,259 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:44:49,260 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1829153437] [2022-11-03 02:44:49,260 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:44:49,260 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:44:49,260 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:44:49,261 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:44:49,262 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (21)] Waiting until timeout for monitored process [2022-11-03 02:44:49,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:44:49,956 INFO L263 TraceCheckSpWp]: Trace formula consists of 2008 conjuncts, 154 conjunts are in the unsatisfiable core [2022-11-03 02:44:49,962 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:45:01,029 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 4 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:45:01,029 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:45:13,041 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 5 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:45:13,041 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:45:13,041 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1829153437] [2022-11-03 02:45:13,042 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1829153437] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:45:13,042 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1328079850] [2022-11-03 02:45:13,042 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:45:13,042 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:45:13,042 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:45:13,045 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:45:13,072 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ea9439da-c6a4-48d2-91d1-8440bee7c8f5/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (22)] Waiting until timeout for monitored process [2022-11-03 02:45:14,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:45:14,573 INFO L263 TraceCheckSpWp]: Trace formula consists of 2008 conjuncts, 154 conjunts are in the unsatisfiable core [2022-11-03 02:45:14,580 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:45:15,582 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 4 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:45:15,582 INFO L328 TraceCheckSpWp]: Computing backward predicates...