./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.resistance.1.prop1-func-interl.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 5e519f3a Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.resistance.1.prop1-func-interl.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 5f70da2e50a3ed8a99bab61db3775414c1460add675af1a2dc662b0da6abf1d0 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-5e519f3 [2022-11-03 01:54:14,073 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-03 01:54:14,075 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-03 01:54:14,114 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-03 01:54:14,115 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-03 01:54:14,118 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-03 01:54:14,121 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-03 01:54:14,125 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-03 01:54:14,128 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-03 01:54:14,137 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-03 01:54:14,138 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-03 01:54:14,140 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-03 01:54:14,141 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-03 01:54:14,143 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-03 01:54:14,146 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-03 01:54:14,149 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-03 01:54:14,151 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-03 01:54:14,152 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-03 01:54:14,153 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-03 01:54:14,161 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-03 01:54:14,163 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-03 01:54:14,165 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-03 01:54:14,166 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-03 01:54:14,167 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-03 01:54:14,170 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-03 01:54:14,171 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-03 01:54:14,171 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-03 01:54:14,172 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-03 01:54:14,172 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-03 01:54:14,173 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-03 01:54:14,174 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-03 01:54:14,175 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-03 01:54:14,175 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-03 01:54:14,176 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-03 01:54:14,177 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-03 01:54:14,178 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-03 01:54:14,179 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-03 01:54:14,179 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-03 01:54:14,179 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-03 01:54:14,180 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-03 01:54:14,181 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-03 01:54:14,182 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Default.epf [2022-11-03 01:54:14,221 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-03 01:54:14,222 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-03 01:54:14,222 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-03 01:54:14,222 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-03 01:54:14,223 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-03 01:54:14,223 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-03 01:54:14,223 INFO L138 SettingsManager]: * User list type=DISABLED [2022-11-03 01:54:14,224 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-11-03 01:54:14,224 INFO L138 SettingsManager]: * Explicit value domain=true [2022-11-03 01:54:14,224 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2022-11-03 01:54:14,224 INFO L138 SettingsManager]: * Octagon Domain=false [2022-11-03 01:54:14,224 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-11-03 01:54:14,224 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2022-11-03 01:54:14,225 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2022-11-03 01:54:14,225 INFO L138 SettingsManager]: * Interval Domain=false [2022-11-03 01:54:14,225 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2022-11-03 01:54:14,225 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2022-11-03 01:54:14,225 INFO L138 SettingsManager]: * Simplification Technique=POLY_PAC [2022-11-03 01:54:14,226 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-03 01:54:14,226 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-03 01:54:14,226 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-03 01:54:14,227 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-03 01:54:14,227 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-03 01:54:14,227 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-03 01:54:14,227 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-03 01:54:14,228 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-03 01:54:14,228 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-03 01:54:14,228 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-03 01:54:14,228 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-03 01:54:14,228 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 01:54:14,229 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-03 01:54:14,229 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2022-11-03 01:54:14,229 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-03 01:54:14,229 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-03 01:54:14,230 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2022-11-03 01:54:14,230 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-11-03 01:54:14,230 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-03 01:54:14,230 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-11-03 01:54:14,231 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 5f70da2e50a3ed8a99bab61db3775414c1460add675af1a2dc662b0da6abf1d0 [2022-11-03 01:54:14,504 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-03 01:54:14,528 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-03 01:54:14,533 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-03 01:54:14,535 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-03 01:54:14,535 INFO L275 PluginConnector]: CDTParser initialized [2022-11-03 01:54:14,537 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.resistance.1.prop1-func-interl.c [2022-11-03 01:54:14,607 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/data/7dad18b23/6739e39fbf7d4f77910b96ddbe17c911/FLAG32dcf31dc [2022-11-03 01:54:15,276 INFO L306 CDTParser]: Found 1 translation units. [2022-11-03 01:54:15,276 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.resistance.1.prop1-func-interl.c [2022-11-03 01:54:15,292 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/data/7dad18b23/6739e39fbf7d4f77910b96ddbe17c911/FLAG32dcf31dc [2022-11-03 01:54:15,555 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/data/7dad18b23/6739e39fbf7d4f77910b96ddbe17c911 [2022-11-03 01:54:15,558 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-03 01:54:15,559 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-03 01:54:15,561 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-03 01:54:15,561 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-03 01:54:15,565 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-03 01:54:15,566 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 01:54:15" (1/1) ... [2022-11-03 01:54:15,567 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@48f4a15e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:54:15, skipping insertion in model container [2022-11-03 01:54:15,567 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 01:54:15" (1/1) ... [2022-11-03 01:54:15,574 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-03 01:54:15,629 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-03 01:54:15,883 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.resistance.1.prop1-func-interl.c[1014,1027] [2022-11-03 01:54:16,253 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 01:54:16,261 INFO L203 MainTranslator]: Completed pre-run [2022-11-03 01:54:16,272 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.resistance.1.prop1-func-interl.c[1014,1027] [2022-11-03 01:54:16,465 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 01:54:16,477 INFO L208 MainTranslator]: Completed translation [2022-11-03 01:54:16,477 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:54:16 WrapperNode [2022-11-03 01:54:16,478 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-03 01:54:16,479 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-03 01:54:16,479 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-03 01:54:16,479 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-03 01:54:16,486 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:54:16" (1/1) ... [2022-11-03 01:54:16,530 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:54:16" (1/1) ... [2022-11-03 01:54:16,737 INFO L138 Inliner]: procedures = 11, calls = 3, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1526 [2022-11-03 01:54:16,737 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-03 01:54:16,738 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-03 01:54:16,739 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-03 01:54:16,739 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-03 01:54:16,749 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:54:16" (1/1) ... [2022-11-03 01:54:16,749 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:54:16" (1/1) ... [2022-11-03 01:54:16,806 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:54:16" (1/1) ... [2022-11-03 01:54:16,806 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:54:16" (1/1) ... [2022-11-03 01:54:16,890 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:54:16" (1/1) ... [2022-11-03 01:54:16,909 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:54:16" (1/1) ... [2022-11-03 01:54:16,938 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:54:16" (1/1) ... [2022-11-03 01:54:16,950 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:54:16" (1/1) ... [2022-11-03 01:54:16,983 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-03 01:54:16,987 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-03 01:54:16,987 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-03 01:54:16,987 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-03 01:54:16,990 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:54:16" (1/1) ... [2022-11-03 01:54:16,997 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 01:54:17,053 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 01:54:17,072 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-03 01:54:17,094 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-03 01:54:17,113 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-03 01:54:17,113 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-03 01:54:17,542 INFO L235 CfgBuilder]: Building ICFG [2022-11-03 01:54:17,544 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-03 01:57:17,624 INFO L276 CfgBuilder]: Performing block encoding [2022-11-03 01:57:28,259 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-03 01:57:28,259 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-03 01:57:28,261 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 01:57:28 BoogieIcfgContainer [2022-11-03 01:57:28,261 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-03 01:57:28,263 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-03 01:57:28,263 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-03 01:57:28,266 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-03 01:57:28,267 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 03.11 01:54:15" (1/3) ... [2022-11-03 01:57:28,267 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@70ad8d40 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 01:57:28, skipping insertion in model container [2022-11-03 01:57:28,268 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:54:16" (2/3) ... [2022-11-03 01:57:28,268 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@70ad8d40 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 01:57:28, skipping insertion in model container [2022-11-03 01:57:28,268 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 01:57:28" (3/3) ... [2022-11-03 01:57:28,269 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.resistance.1.prop1-func-interl.c [2022-11-03 01:57:28,285 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-03 01:57:28,285 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-03 01:57:28,330 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-03 01:57:28,338 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@1226bdc4, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-03 01:57:28,338 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-03 01:57:28,342 INFO L276 IsEmpty]: Start isEmpty. Operand has 7 states, 5 states have (on average 1.6) internal successors, (8), 6 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:57:28,349 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2022-11-03 01:57:28,350 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 01:57:28,350 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1] [2022-11-03 01:57:28,351 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 01:57:28,357 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 01:57:28,357 INFO L85 PathProgramCache]: Analyzing trace with hash 6204345, now seen corresponding path program 1 times [2022-11-03 01:57:28,370 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-03 01:57:28,371 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1037320605] [2022-11-03 01:57:28,371 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 01:57:28,372 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-03 01:57:29,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 01:57:32,878 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:57:32,879 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-03 01:57:32,879 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1037320605] [2022-11-03 01:57:32,880 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1037320605] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 01:57:32,880 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 01:57:32,881 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-03 01:57:32,883 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1169253029] [2022-11-03 01:57:32,883 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 01:57:32,888 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 01:57:32,889 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-03 01:57:32,919 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 01:57:32,920 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 01:57:32,923 INFO L87 Difference]: Start difference. First operand has 7 states, 5 states have (on average 1.6) internal successors, (8), 6 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 1.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:57:35,339 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.19s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-11-03 01:57:35,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 01:57:35,487 INFO L93 Difference]: Finished difference Result 15 states and 20 transitions. [2022-11-03 01:57:35,488 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-03 01:57:35,490 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 4 [2022-11-03 01:57:35,490 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 01:57:35,497 INFO L225 Difference]: With dead ends: 15 [2022-11-03 01:57:35,497 INFO L226 Difference]: Without dead ends: 9 [2022-11-03 01:57:35,499 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-03 01:57:35,503 INFO L413 NwaCegarLoop]: 2 mSDtfsCounter, 3 mSDsluCounter, 5 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 1 mSolverCounterUnsat, 1 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 6 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 1 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.5s IncrementalHoareTripleChecker+Time [2022-11-03 01:57:35,504 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 6 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 7 Invalid, 1 Unknown, 0 Unchecked, 2.5s Time] [2022-11-03 01:57:35,520 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9 states. [2022-11-03 01:57:35,531 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9 to 8. [2022-11-03 01:57:35,532 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 7 states have (on average 1.1428571428571428) internal successors, (8), 7 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:57:35,533 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 8 transitions. [2022-11-03 01:57:35,534 INFO L78 Accepts]: Start accepts. Automaton has 8 states and 8 transitions. Word has length 4 [2022-11-03 01:57:35,534 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 01:57:35,535 INFO L495 AbstractCegarLoop]: Abstraction has 8 states and 8 transitions. [2022-11-03 01:57:35,535 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 1.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:57:35,535 INFO L276 IsEmpty]: Start isEmpty. Operand 8 states and 8 transitions. [2022-11-03 01:57:35,535 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2022-11-03 01:57:35,536 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 01:57:35,536 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1] [2022-11-03 01:57:35,536 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-11-03 01:57:35,536 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 01:57:35,537 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 01:57:35,537 INFO L85 PathProgramCache]: Analyzing trace with hash 160750953, now seen corresponding path program 1 times [2022-11-03 01:57:35,537 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-03 01:57:35,538 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2062355210] [2022-11-03 01:57:35,538 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 01:57:35,538 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-03 01:59:36,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-03 01:59:36,078 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-03 02:01:16,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-03 02:01:16,293 INFO L130 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2022-11-03 02:01:16,293 INFO L359 BasicCegarLoop]: Counterexample is feasible [2022-11-03 02:01:16,296 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-11-03 02:01:16,298 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-11-03 02:01:16,308 INFO L444 BasicCegarLoop]: Path program histogram: [1, 1] [2022-11-03 02:01:16,314 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-03 02:01:16,448 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 02:01:16,457 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 02:01:16,523 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 03.11 02:01:16 BoogieIcfgContainer [2022-11-03 02:01:16,527 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-03 02:01:16,529 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-03 02:01:16,530 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-03 02:01:16,530 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-03 02:01:16,531 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 01:57:28" (3/4) ... [2022-11-03 02:01:16,534 INFO L140 WitnessPrinter]: No result that supports witness generation found [2022-11-03 02:01:16,534 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-03 02:01:16,535 INFO L158 Benchmark]: Toolchain (without parser) took 420975.11ms. Allocated memory was 96.5MB in the beginning and 2.6GB in the end (delta: 2.5GB). Free memory was 55.0MB in the beginning and 1.8GB in the end (delta: -1.8GB). Peak memory consumption was 736.3MB. Max. memory is 16.1GB. [2022-11-03 02:01:16,535 INFO L158 Benchmark]: CDTParser took 0.32ms. Allocated memory is still 96.5MB. Free memory is still 73.7MB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-03 02:01:16,536 INFO L158 Benchmark]: CACSL2BoogieTranslator took 916.91ms. Allocated memory is still 96.5MB. Free memory was 54.7MB in the beginning and 59.1MB in the end (delta: -4.4MB). Peak memory consumption was 27.8MB. Max. memory is 16.1GB. [2022-11-03 02:01:16,536 INFO L158 Benchmark]: Boogie Procedure Inliner took 258.86ms. Allocated memory was 96.5MB in the beginning and 127.9MB in the end (delta: 31.5MB). Free memory was 59.1MB in the beginning and 68.9MB in the end (delta: -9.8MB). Peak memory consumption was 38.3MB. Max. memory is 16.1GB. [2022-11-03 02:01:16,537 INFO L158 Benchmark]: Boogie Preprocessor took 247.48ms. Allocated memory is still 127.9MB. Free memory was 68.9MB in the beginning and 50.5MB in the end (delta: 18.4MB). Peak memory consumption was 18.9MB. Max. memory is 16.1GB. [2022-11-03 02:01:16,538 INFO L158 Benchmark]: RCFGBuilder took 191274.72ms. Allocated memory was 127.9MB in the beginning and 1.9GB in the end (delta: 1.8GB). Free memory was 50.5MB in the beginning and 1.1GB in the end (delta: -1.0GB). Peak memory consumption was 773.6MB. Max. memory is 16.1GB. [2022-11-03 02:01:16,538 INFO L158 Benchmark]: TraceAbstraction took 228263.92ms. Allocated memory was 1.9GB in the beginning and 2.6GB in the end (delta: 698.4MB). Free memory was 1.1GB in the beginning and 1.8GB in the end (delta: -766.0MB). Peak memory consumption was 859.2MB. Max. memory is 16.1GB. [2022-11-03 02:01:16,539 INFO L158 Benchmark]: Witness Printer took 5.36ms. Allocated memory is still 2.6GB. Free memory is still 1.8GB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-03 02:01:16,542 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.32ms. Allocated memory is still 96.5MB. Free memory is still 73.7MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 916.91ms. Allocated memory is still 96.5MB. Free memory was 54.7MB in the beginning and 59.1MB in the end (delta: -4.4MB). Peak memory consumption was 27.8MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 258.86ms. Allocated memory was 96.5MB in the beginning and 127.9MB in the end (delta: 31.5MB). Free memory was 59.1MB in the beginning and 68.9MB in the end (delta: -9.8MB). Peak memory consumption was 38.3MB. Max. memory is 16.1GB. * Boogie Preprocessor took 247.48ms. Allocated memory is still 127.9MB. Free memory was 68.9MB in the beginning and 50.5MB in the end (delta: 18.4MB). Peak memory consumption was 18.9MB. Max. memory is 16.1GB. * RCFGBuilder took 191274.72ms. Allocated memory was 127.9MB in the beginning and 1.9GB in the end (delta: 1.8GB). Free memory was 50.5MB in the beginning and 1.1GB in the end (delta: -1.0GB). Peak memory consumption was 773.6MB. Max. memory is 16.1GB. * TraceAbstraction took 228263.92ms. Allocated memory was 1.9GB in the beginning and 2.6GB in the end (delta: 698.4MB). Free memory was 1.1GB in the beginning and 1.8GB in the end (delta: -766.0MB). Peak memory consumption was 859.2MB. Max. memory is 16.1GB. * Witness Printer took 5.36ms. Allocated memory is still 2.6GB. Free memory is still 1.8GB. There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 20]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: overapproximation of bitwiseOr at line 199, overapproximation of shiftRight at line 203, overapproximation of bitwiseAnd at line 159, overapproximation of bitwiseComplement at line 201. Possible FailurePath: [L25] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L26] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L28] const SORT_2 mask_SORT_2 = (SORT_2)-1 >> (sizeof(SORT_2) * 8 - 5); [L29] const SORT_2 msb_SORT_2 = (SORT_2)1 << (5 - 1); [L31] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 16); [L32] const SORT_3 msb_SORT_3 = (SORT_3)1 << (16 - 1); [L34] const SORT_4 mask_SORT_4 = (SORT_4)-1 >> (sizeof(SORT_4) * 8 - 32); [L35] const SORT_4 msb_SORT_4 = (SORT_4)1 << (32 - 1); [L37] const SORT_3 var_5 = 0; [L38] const SORT_1 var_14 = 0; [L39] const SORT_4 var_57 = 1; [L40] const SORT_3 var_58 = 0; [L41] const SORT_4 var_60 = 16; [L42] const SORT_4 var_63 = 0; [L43] const SORT_3 var_70 = 1; [L44] const SORT_3 var_73 = 0; [L45] const SORT_3 var_99 = 3; [L46] const SORT_4 var_207 = 6200; [L47] const SORT_4 var_223 = 999; [L48] const SORT_4 var_225 = 5999; [L49] const SORT_4 var_231 = 1000; [L50] const SORT_4 var_236 = 5800; [L51] const SORT_4 var_245 = 5; [L53] SORT_1 input_69; [L54] SORT_1 input_71; [L55] SORT_1 input_72; [L56] SORT_1 input_74; [L57] SORT_1 input_80; [L58] SORT_1 input_81; [L59] SORT_1 input_82; [L60] SORT_1 input_87; [L61] SORT_1 input_98; [L62] SORT_1 input_100; [L63] SORT_1 input_105; [L64] SORT_1 input_112; [L65] SORT_1 input_117; [L66] SORT_1 input_121; [L67] SORT_1 input_134; [L68] SORT_1 input_144; [L69] SORT_1 input_148; [L70] SORT_1 input_153; [L71] SORT_1 input_155; [L72] SORT_1 input_159; [L73] SORT_1 input_163; [L74] SORT_1 input_167; [L75] SORT_1 input_176; [L76] SORT_1 input_183; [L77] SORT_1 input_185; [L78] SORT_1 input_191; [L80] SORT_3 state_6 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L81] SORT_3 state_8 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L82] SORT_3 state_10 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L83] SORT_3 state_12 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L84] SORT_1 state_15 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L85] SORT_1 state_17 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L86] SORT_1 state_19 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L87] SORT_1 state_21 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L88] SORT_1 state_23 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L89] SORT_1 state_25 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L90] SORT_1 state_27 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L91] SORT_1 state_29 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L92] SORT_1 state_31 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L93] SORT_1 state_33 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L94] SORT_1 state_35 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L95] SORT_1 state_37 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L96] SORT_1 state_39 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L97] SORT_1 state_41 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L98] SORT_1 state_43 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L99] SORT_1 state_45 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L100] SORT_1 state_47 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L101] SORT_1 state_49 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L102] SORT_1 state_51 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L103] SORT_1 state_53 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L104] SORT_1 state_55 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L106] SORT_3 init_7_arg_1 = var_5; [L107] state_6 = init_7_arg_1 [L108] SORT_3 init_9_arg_1 = var_5; [L109] state_8 = init_9_arg_1 [L110] SORT_3 init_11_arg_1 = var_5; [L111] state_10 = init_11_arg_1 [L112] SORT_3 init_13_arg_1 = var_5; [L113] state_12 = init_13_arg_1 [L114] SORT_1 init_16_arg_1 = var_14; [L115] state_15 = init_16_arg_1 [L116] SORT_1 init_18_arg_1 = var_14; [L117] state_17 = init_18_arg_1 [L118] SORT_1 init_20_arg_1 = var_14; [L119] state_19 = init_20_arg_1 [L120] SORT_1 init_22_arg_1 = var_14; [L121] state_21 = init_22_arg_1 [L122] SORT_1 init_24_arg_1 = var_14; [L123] state_23 = init_24_arg_1 [L124] SORT_1 init_26_arg_1 = var_14; [L125] state_25 = init_26_arg_1 [L126] SORT_1 init_28_arg_1 = var_14; [L127] state_27 = init_28_arg_1 [L128] SORT_1 init_30_arg_1 = var_14; [L129] state_29 = init_30_arg_1 [L130] SORT_1 init_32_arg_1 = var_14; [L131] state_31 = init_32_arg_1 [L132] SORT_1 init_34_arg_1 = var_14; [L133] state_33 = init_34_arg_1 [L134] SORT_1 init_36_arg_1 = var_14; [L135] state_35 = init_36_arg_1 [L136] SORT_1 init_38_arg_1 = var_14; [L137] state_37 = init_38_arg_1 [L138] SORT_1 init_40_arg_1 = var_14; [L139] state_39 = init_40_arg_1 [L140] SORT_1 init_42_arg_1 = var_14; [L141] state_41 = init_42_arg_1 [L142] SORT_1 init_44_arg_1 = var_14; [L143] state_43 = init_44_arg_1 [L144] SORT_1 init_46_arg_1 = var_14; [L145] state_45 = init_46_arg_1 [L146] SORT_1 init_48_arg_1 = var_14; [L147] state_47 = init_48_arg_1 [L148] SORT_1 init_50_arg_1 = var_14; [L149] state_49 = init_50_arg_1 [L150] SORT_1 init_52_arg_1 = var_14; [L151] state_51 = init_52_arg_1 [L152] SORT_1 init_54_arg_1 = var_14; [L153] state_53 = init_54_arg_1 [L154] SORT_1 init_56_arg_1 = var_14; [L155] state_55 = init_56_arg_1 VAL [init_11_arg_1=0, init_13_arg_1=0, init_16_arg_1=0, init_18_arg_1=0, init_20_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_28_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, init_44_arg_1=0, init_46_arg_1=0, init_48_arg_1=0, init_50_arg_1=0, init_52_arg_1=0, init_54_arg_1=0, init_56_arg_1=0, init_7_arg_1=0, init_9_arg_1=0, mask_SORT_1=1, mask_SORT_2=31, mask_SORT_3=65535, mask_SORT_4=4294967295, msb_SORT_1=1, msb_SORT_2=16, msb_SORT_3=32768, msb_SORT_4=2147483648, state_10=0, state_12=0, state_15=0, state_17=0, state_19=0, state_21=0, state_23=0, state_25=0, state_27=0, state_29=0, state_31=0, state_33=0, state_35=0, state_37=0, state_39=0, state_41=0, state_43=0, state_45=0, state_47=0, state_49=0, state_51=0, state_53=0, state_55=0, state_6=0, state_8=0, var_14=0, var_207=6200, var_223=999, var_225=5999, var_231=1000, var_236=5800, var_245=5, var_5=0, var_57=1, var_58=0, var_60=16, var_63=0, var_70=1, var_73=0, var_99=3] [L158] input_69 = __VERIFIER_nondet_uchar() [L159] input_69 = input_69 & mask_SORT_1 [L160] input_71 = __VERIFIER_nondet_uchar() [L161] input_71 = input_71 & mask_SORT_1 [L162] input_72 = __VERIFIER_nondet_uchar() [L163] input_72 = input_72 & mask_SORT_1 [L164] input_74 = __VERIFIER_nondet_uchar() [L165] input_74 = input_74 & mask_SORT_1 [L166] input_80 = __VERIFIER_nondet_uchar() [L167] input_80 = input_80 & mask_SORT_1 [L168] input_81 = __VERIFIER_nondet_uchar() [L169] input_81 = input_81 & mask_SORT_1 [L170] input_82 = __VERIFIER_nondet_uchar() [L171] input_82 = input_82 & mask_SORT_1 [L172] input_87 = __VERIFIER_nondet_uchar() [L173] input_87 = input_87 & mask_SORT_1 [L174] input_98 = __VERIFIER_nondet_uchar() [L175] input_98 = input_98 & mask_SORT_1 [L176] input_100 = __VERIFIER_nondet_uchar() [L177] input_100 = input_100 & mask_SORT_1 [L178] input_105 = __VERIFIER_nondet_uchar() [L179] input_105 = input_105 & mask_SORT_1 [L180] input_112 = __VERIFIER_nondet_uchar() [L181] input_117 = __VERIFIER_nondet_uchar() [L182] input_121 = __VERIFIER_nondet_uchar() [L183] input_134 = __VERIFIER_nondet_uchar() [L184] input_144 = __VERIFIER_nondet_uchar() [L185] input_148 = __VERIFIER_nondet_uchar() [L186] input_153 = __VERIFIER_nondet_uchar() [L187] input_155 = __VERIFIER_nondet_uchar() [L188] input_159 = __VERIFIER_nondet_uchar() [L189] input_163 = __VERIFIER_nondet_uchar() [L190] input_167 = __VERIFIER_nondet_uchar() [L191] input_176 = __VERIFIER_nondet_uchar() [L192] input_183 = __VERIFIER_nondet_uchar() [L193] input_185 = __VERIFIER_nondet_uchar() [L194] input_191 = __VERIFIER_nondet_uchar() [L197] SORT_3 var_59_arg_0 = state_6; [L198] SORT_3 var_59_arg_1 = var_58; [L199] SORT_4 var_59 = ((SORT_4)var_59_arg_0 << 16) | var_59_arg_1; [L200] SORT_4 var_61_arg_0 = var_59; [L201] EXPR (var_61_arg_0 & msb_SORT_4) ? (var_61_arg_0 | ~mask_SORT_4) : (var_61_arg_0 & mask_SORT_4) [L201] var_61_arg_0 = (var_61_arg_0 & msb_SORT_4) ? (var_61_arg_0 | ~mask_SORT_4) : (var_61_arg_0 & mask_SORT_4) [L202] SORT_4 var_61_arg_1 = var_60; [L203] SORT_4 var_61 = (int)var_61_arg_0 >> var_61_arg_1; [L204] EXPR (var_61_arg_0 & msb_SORT_4) ? (var_61 | ~(mask_SORT_4 >> var_61_arg_1)) : var_61 [L204] var_61 = (var_61_arg_0 & msb_SORT_4) ? (var_61 | ~(mask_SORT_4 >> var_61_arg_1)) : var_61 [L205] var_61 = var_61 & mask_SORT_4 [L206] SORT_4 var_62_arg_0 = var_57; [L207] SORT_4 var_62_arg_1 = var_61; [L208] SORT_1 var_62 = var_62_arg_0 == var_62_arg_1; [L209] SORT_1 var_64_arg_0 = state_15; [L210] SORT_4 var_64_arg_1 = var_57; [L211] SORT_4 var_64_arg_2 = var_63; [L212] EXPR var_64_arg_0 ? var_64_arg_1 : var_64_arg_2 [L212] SORT_4 var_64 = var_64_arg_0 ? var_64_arg_1 : var_64_arg_2; [L213] var_64 = var_64 & mask_SORT_4 [L214] SORT_4 var_65_arg_0 = var_57; [L215] SORT_4 var_65_arg_1 = var_64; [L216] SORT_1 var_65 = var_65_arg_0 == var_65_arg_1; [L217] SORT_1 var_66_arg_0 = ~var_62; [L218] var_66_arg_0 = var_66_arg_0 & mask_SORT_1 [L219] SORT_1 var_66_arg_1 = var_65; [L220] SORT_1 var_66 = var_66_arg_0 & var_66_arg_1; [L221] SORT_1 var_67_arg_0 = ~state_55; [L222] var_67_arg_0 = var_67_arg_0 & mask_SORT_1 [L223] SORT_1 var_67_arg_1 = var_66; [L224] SORT_1 var_67 = var_67_arg_0 & var_67_arg_1; [L225] var_67 = var_67 & mask_SORT_1 [L226] SORT_1 bad_68_arg_0 = var_67; [L227] CALL __VERIFIER_assert(!(bad_68_arg_0)) [L20] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L227] RET __VERIFIER_assert(!(bad_68_arg_0)) [L229] SORT_1 var_75_arg_0 = input_74; [L230] SORT_3 var_75_arg_1 = var_70; [L231] SORT_3 var_75_arg_2 = state_6; [L232] EXPR var_75_arg_0 ? var_75_arg_1 : var_75_arg_2 [L232] SORT_3 var_75 = var_75_arg_0 ? var_75_arg_1 : var_75_arg_2; [L233] SORT_1 var_76_arg_0 = input_72; [L234] SORT_3 var_76_arg_1 = var_73; [L235] SORT_3 var_76_arg_2 = var_75; [L236] EXPR var_76_arg_0 ? var_76_arg_1 : var_76_arg_2 [L236] SORT_3 var_76 = var_76_arg_0 ? var_76_arg_1 : var_76_arg_2; [L237] SORT_1 var_77_arg_0 = input_71; [L238] SORT_3 var_77_arg_1 = var_70; [L239] SORT_3 var_77_arg_2 = var_76; [L240] EXPR var_77_arg_0 ? var_77_arg_1 : var_77_arg_2 [L240] SORT_3 var_77 = var_77_arg_0 ? var_77_arg_1 : var_77_arg_2; [L241] SORT_1 var_78_arg_0 = input_69; [L242] SORT_3 var_78_arg_1 = var_70; [L243] SORT_3 var_78_arg_2 = var_77; [L244] EXPR var_78_arg_0 ? var_78_arg_1 : var_78_arg_2 [L244] SORT_3 var_78 = var_78_arg_0 ? var_78_arg_1 : var_78_arg_2; [L245] SORT_3 next_79_arg_1 = var_78; [L246] SORT_3 var_83_arg_0 = state_8; [L247] SORT_3 var_83_arg_1 = var_58; [L248] SORT_4 var_83 = ((SORT_4)var_83_arg_0 << 16) | var_83_arg_1; [L249] SORT_4 var_84_arg_0 = var_83; [L250] EXPR (var_84_arg_0 & msb_SORT_4) ? (var_84_arg_0 | ~mask_SORT_4) : (var_84_arg_0 & mask_SORT_4) [L250] var_84_arg_0 = (var_84_arg_0 & msb_SORT_4) ? (var_84_arg_0 | ~mask_SORT_4) : (var_84_arg_0 & mask_SORT_4) [L251] SORT_4 var_84_arg_1 = var_60; [L252] SORT_4 var_84 = (int)var_84_arg_0 >> var_84_arg_1; [L253] EXPR (var_84_arg_0 & msb_SORT_4) ? (var_84 | ~(mask_SORT_4 >> var_84_arg_1)) : var_84 [L253] var_84 = (var_84_arg_0 & msb_SORT_4) ? (var_84 | ~(mask_SORT_4 >> var_84_arg_1)) : var_84 [L254] var_84 = var_84 & mask_SORT_4 [L255] SORT_4 var_85_arg_0 = var_84; [L256] SORT_4 var_85_arg_1 = var_57; [L257] SORT_4 var_85 = var_85_arg_0 - var_85_arg_1; [L258] SORT_4 var_86_arg_0 = var_85; [L259] SORT_3 var_86 = var_86_arg_0 >> 0; [L260] SORT_4 var_88_arg_0 = var_57; [L261] SORT_4 var_88_arg_1 = var_84; [L262] SORT_4 var_88 = var_88_arg_0 + var_88_arg_1; [L263] SORT_4 var_89_arg_0 = var_88; [L264] SORT_3 var_89 = var_89_arg_0 >> 0; [L265] SORT_1 var_90_arg_0 = input_87; [L266] SORT_3 var_90_arg_1 = var_89; [L267] SORT_3 var_90_arg_2 = state_8; [L268] EXPR var_90_arg_0 ? var_90_arg_1 : var_90_arg_2 [L268] SORT_3 var_90 = var_90_arg_0 ? var_90_arg_1 : var_90_arg_2; [L269] SORT_1 var_91_arg_0 = input_74; [L270] SORT_3 var_91_arg_1 = var_86; [L271] SORT_3 var_91_arg_2 = var_90; [L272] EXPR var_91_arg_0 ? var_91_arg_1 : var_91_arg_2 [L272] SORT_3 var_91 = var_91_arg_0 ? var_91_arg_1 : var_91_arg_2; [L273] SORT_1 var_92_arg_0 = input_72; [L274] SORT_3 var_92_arg_1 = var_86; [L275] SORT_3 var_92_arg_2 = var_91; [L276] EXPR var_92_arg_0 ? var_92_arg_1 : var_92_arg_2 [L276] SORT_3 var_92 = var_92_arg_0 ? var_92_arg_1 : var_92_arg_2; [L277] SORT_1 var_93_arg_0 = input_82; [L278] SORT_3 var_93_arg_1 = var_73; [L279] SORT_3 var_93_arg_2 = var_92; [L280] EXPR var_93_arg_0 ? var_93_arg_1 : var_93_arg_2 [L280] SORT_3 var_93 = var_93_arg_0 ? var_93_arg_1 : var_93_arg_2; [L281] SORT_1 var_94_arg_0 = input_81; [L282] SORT_3 var_94_arg_1 = var_73; [L283] SORT_3 var_94_arg_2 = var_93; [L284] EXPR var_94_arg_0 ? var_94_arg_1 : var_94_arg_2 [L284] SORT_3 var_94 = var_94_arg_0 ? var_94_arg_1 : var_94_arg_2; [L285] SORT_1 var_95_arg_0 = input_80; [L286] SORT_3 var_95_arg_1 = var_73; [L287] SORT_3 var_95_arg_2 = var_94; [L288] EXPR var_95_arg_0 ? var_95_arg_1 : var_95_arg_2 [L288] SORT_3 var_95 = var_95_arg_0 ? var_95_arg_1 : var_95_arg_2; [L289] SORT_3 next_96_arg_1 = var_95; [L290] SORT_3 next_97_arg_1 = state_10; [L291] SORT_3 var_101_arg_0 = state_12; [L292] SORT_3 var_101_arg_1 = var_58; [L293] SORT_4 var_101 = ((SORT_4)var_101_arg_0 << 16) | var_101_arg_1; [L294] SORT_4 var_102_arg_0 = var_101; [L295] EXPR (var_102_arg_0 & msb_SORT_4) ? (var_102_arg_0 | ~mask_SORT_4) : (var_102_arg_0 & mask_SORT_4) [L295] var_102_arg_0 = (var_102_arg_0 & msb_SORT_4) ? (var_102_arg_0 | ~mask_SORT_4) : (var_102_arg_0 & mask_SORT_4) [L296] SORT_4 var_102_arg_1 = var_60; [L297] SORT_4 var_102 = (int)var_102_arg_0 >> var_102_arg_1; [L298] EXPR (var_102_arg_0 & msb_SORT_4) ? (var_102 | ~(mask_SORT_4 >> var_102_arg_1)) : var_102 [L298] var_102 = (var_102_arg_0 & msb_SORT_4) ? (var_102 | ~(mask_SORT_4 >> var_102_arg_1)) : var_102 [L299] var_102 = var_102 & mask_SORT_4 [L300] SORT_4 var_103_arg_0 = var_57; [L301] SORT_4 var_103_arg_1 = var_102; [L302] SORT_4 var_103 = var_103_arg_0 + var_103_arg_1; [L303] SORT_4 var_104_arg_0 = var_103; [L304] SORT_3 var_104 = var_104_arg_0 >> 0; [L305] SORT_4 var_106_arg_0 = var_102; [L306] SORT_4 var_106_arg_1 = var_57; [L307] SORT_4 var_106 = var_106_arg_0 - var_106_arg_1; [L308] SORT_4 var_107_arg_0 = var_106; [L309] SORT_3 var_107 = var_107_arg_0 >> 0; [L310] SORT_1 var_108_arg_0 = input_105; [L311] SORT_3 var_108_arg_1 = var_107; [L312] SORT_3 var_108_arg_2 = state_12; [L313] EXPR var_108_arg_0 ? var_108_arg_1 : var_108_arg_2 [L313] SORT_3 var_108 = var_108_arg_0 ? var_108_arg_1 : var_108_arg_2; [L314] SORT_1 var_109_arg_0 = input_100; [L315] SORT_3 var_109_arg_1 = var_104; [L316] SORT_3 var_109_arg_2 = var_108; [L317] EXPR var_109_arg_0 ? var_109_arg_1 : var_109_arg_2 [L317] SORT_3 var_109 = var_109_arg_0 ? var_109_arg_1 : var_109_arg_2; [L318] SORT_1 var_110_arg_0 = input_98; [L319] SORT_3 var_110_arg_1 = var_99; [L320] SORT_3 var_110_arg_2 = var_109; [L321] EXPR var_110_arg_0 ? var_110_arg_1 : var_110_arg_2 [L321] SORT_3 var_110 = var_110_arg_0 ? var_110_arg_1 : var_110_arg_2; [L322] SORT_3 next_111_arg_1 = var_110; [L323] SORT_1 var_113_arg_0 = state_15; [L324] SORT_1 var_113_arg_1 = input_112; [L325] SORT_1 var_113 = var_113_arg_0 | var_113_arg_1; [L326] SORT_1 var_114_arg_0 = var_113; [L327] SORT_1 var_114_arg_1 = input_74; [L328] SORT_1 var_114 = var_114_arg_0 | var_114_arg_1; [L329] SORT_1 var_115_arg_0 = var_114; [L330] SORT_1 var_115_arg_1 = ~input_72; [L331] var_115_arg_1 = var_115_arg_1 & mask_SORT_1 [L332] SORT_1 var_115 = var_115_arg_0 & var_115_arg_1; [L333] SORT_1 var_116_arg_0 = var_115; [L334] SORT_1 var_116_arg_1 = input_71; [L335] SORT_1 var_116 = var_116_arg_0 | var_116_arg_1; [L336] SORT_1 var_118_arg_0 = var_116; [L337] SORT_1 var_118_arg_1 = ~input_117; [L338] var_118_arg_1 = var_118_arg_1 & mask_SORT_1 [L339] SORT_1 var_118 = var_118_arg_0 & var_118_arg_1; [L340] var_118 = var_118 & mask_SORT_1 [L341] SORT_1 next_119_arg_1 = var_118; [L342] SORT_1 var_120_arg_0 = state_17; [L343] SORT_1 var_120_arg_1 = ~input_112; [L344] var_120_arg_1 = var_120_arg_1 & mask_SORT_1 [L345] SORT_1 var_120 = var_120_arg_0 & var_120_arg_1; [L346] SORT_1 var_122_arg_0 = var_120; [L347] SORT_1 var_122_arg_1 = ~input_121; [L348] var_122_arg_1 = var_122_arg_1 & mask_SORT_1 [L349] SORT_1 var_122 = var_122_arg_0 & var_122_arg_1; [L350] SORT_1 var_123_arg_0 = var_122; [L351] SORT_1 var_123_arg_1 = input_117; [L352] SORT_1 var_123 = var_123_arg_0 | var_123_arg_1; [L353] SORT_1 next_124_arg_1 = var_123; [L354] SORT_1 var_125_arg_0 = state_19; [L355] SORT_1 var_125_arg_1 = ~input_74; [L356] var_125_arg_1 = var_125_arg_1 & mask_SORT_1 [L357] SORT_1 var_125 = var_125_arg_0 & var_125_arg_1; [L358] SORT_1 var_126_arg_0 = var_125; [L359] SORT_1 var_126_arg_1 = input_72; [L360] SORT_1 var_126 = var_126_arg_0 | var_126_arg_1; [L361] SORT_1 var_127_arg_0 = var_126; [L362] SORT_1 var_127_arg_1 = input_121; [L363] SORT_1 var_127 = var_127_arg_0 | var_127_arg_1; [L364] SORT_1 next_128_arg_1 = var_127; [L365] SORT_1 var_129_arg_0 = ~state_21; [L366] var_129_arg_0 = var_129_arg_0 & mask_SORT_1 [L367] SORT_1 var_129_arg_1 = ~input_71; [L368] var_129_arg_1 = var_129_arg_1 & mask_SORT_1 [L369] SORT_1 var_129 = var_129_arg_0 & var_129_arg_1; [L370] SORT_1 next_130_arg_1 = ~var_129; [L371] next_130_arg_1 = next_130_arg_1 & mask_SORT_1 [L372] SORT_1 var_131_arg_0 = state_23; [L373] SORT_1 var_131_arg_1 = ~input_82; [L374] var_131_arg_1 = var_131_arg_1 & mask_SORT_1 [L375] SORT_1 var_131 = var_131_arg_0 & var_131_arg_1; [L376] SORT_1 var_132_arg_0 = var_131; [L377] SORT_1 var_132_arg_1 = ~input_81; [L378] var_132_arg_1 = var_132_arg_1 & mask_SORT_1 [L379] SORT_1 var_132 = var_132_arg_0 & var_132_arg_1; [L380] SORT_1 var_133_arg_0 = var_132; [L381] SORT_1 var_133_arg_1 = ~input_80; [L382] var_133_arg_1 = var_133_arg_1 & mask_SORT_1 [L383] SORT_1 var_133 = var_133_arg_0 & var_133_arg_1; [L384] SORT_1 var_135_arg_0 = var_133; [L385] SORT_1 var_135_arg_1 = input_134; [L386] SORT_1 var_135 = var_135_arg_0 | var_135_arg_1; [L387] SORT_1 next_136_arg_1 = var_135; [L388] SORT_1 var_137_arg_0 = state_25; [L389] SORT_1 var_137_arg_1 = input_105; [L390] SORT_1 var_137 = var_137_arg_0 | var_137_arg_1; [L391] SORT_1 var_138_arg_0 = var_137; [L392] SORT_1 var_138_arg_1 = input_100; [L393] SORT_1 var_138 = var_138_arg_0 | var_138_arg_1; [L394] SORT_1 var_139_arg_0 = var_138; [L395] SORT_1 var_139_arg_1 = input_98; [L396] SORT_1 var_139 = var_139_arg_0 | var_139_arg_1; [L397] SORT_1 var_140_arg_0 = var_139; [L398] SORT_1 var_140_arg_1 = ~input_117; [L399] var_140_arg_1 = var_140_arg_1 & mask_SORT_1 [L400] SORT_1 var_140 = var_140_arg_0 & var_140_arg_1; [L401] SORT_1 next_141_arg_1 = var_140; [L402] SORT_1 var_142_arg_0 = state_27; [L403] SORT_1 var_142_arg_1 = input_81; [L404] SORT_1 var_142 = var_142_arg_0 | var_142_arg_1; [L405] SORT_1 var_143_arg_0 = var_142; [L406] SORT_1 var_143_arg_1 = ~input_105; [L407] var_143_arg_1 = var_143_arg_1 & mask_SORT_1 [L408] SORT_1 var_143 = var_143_arg_0 & var_143_arg_1; [L409] SORT_1 var_145_arg_0 = var_143; [L410] SORT_1 var_145_arg_1 = ~input_144; [L411] var_145_arg_1 = var_145_arg_1 & mask_SORT_1 [L412] SORT_1 var_145 = var_145_arg_0 & var_145_arg_1; [L413] SORT_1 next_146_arg_1 = var_145; [L414] SORT_1 var_147_arg_0 = state_29; [L415] SORT_1 var_147_arg_1 = input_82; [L416] SORT_1 var_147 = var_147_arg_0 | var_147_arg_1; [L417] SORT_1 var_149_arg_0 = var_147; [L418] SORT_1 var_149_arg_1 = ~input_148; [L419] var_149_arg_1 = var_149_arg_1 & mask_SORT_1 [L420] SORT_1 var_149 = var_149_arg_0 & var_149_arg_1; [L421] SORT_1 next_150_arg_1 = var_149; [L422] SORT_1 var_151_arg_0 = state_31; [L423] SORT_1 var_151_arg_1 = input_80; [L424] SORT_1 var_151 = var_151_arg_0 | var_151_arg_1; [L425] SORT_1 var_152_arg_0 = var_151; [L426] SORT_1 var_152_arg_1 = ~input_100; [L427] var_152_arg_1 = var_152_arg_1 & mask_SORT_1 [L428] SORT_1 var_152 = var_152_arg_0 & var_152_arg_1; [L429] SORT_1 var_154_arg_0 = var_152; [L430] SORT_1 var_154_arg_1 = ~input_153; [L431] var_154_arg_1 = var_154_arg_1 & mask_SORT_1 [L432] SORT_1 var_154 = var_154_arg_0 & var_154_arg_1; [L433] SORT_1 var_156_arg_0 = var_154; [L434] SORT_1 var_156_arg_1 = input_155; [L435] SORT_1 var_156 = var_156_arg_0 | var_156_arg_1; [L436] SORT_1 next_157_arg_1 = var_156; [L437] SORT_1 var_158_arg_0 = state_33; [L438] SORT_1 var_158_arg_1 = input_144; [L439] SORT_1 var_158 = var_158_arg_0 | var_158_arg_1; [L440] SORT_1 var_160_arg_0 = var_158; [L441] SORT_1 var_160_arg_1 = ~input_159; [L442] var_160_arg_1 = var_160_arg_1 & mask_SORT_1 [L443] SORT_1 var_160 = var_160_arg_0 & var_160_arg_1; [L444] SORT_1 next_161_arg_1 = var_160; [L445] SORT_1 var_162_arg_0 = state_35; [L446] SORT_1 var_162_arg_1 = input_153; [L447] SORT_1 var_162 = var_162_arg_0 | var_162_arg_1; [L448] SORT_1 var_164_arg_0 = var_162; [L449] SORT_1 var_164_arg_1 = ~input_163; [L450] var_164_arg_1 = var_164_arg_1 & mask_SORT_1 [L451] SORT_1 var_164 = var_164_arg_0 & var_164_arg_1; [L452] SORT_1 next_165_arg_1 = var_164; [L453] SORT_1 var_166_arg_0 = ~state_37; [L454] var_166_arg_0 = var_166_arg_0 & mask_SORT_1 [L455] SORT_1 var_166_arg_1 = ~input_98; [L456] var_166_arg_1 = var_166_arg_1 & mask_SORT_1 [L457] SORT_1 var_166 = var_166_arg_0 & var_166_arg_1; [L458] SORT_1 var_168_arg_0 = var_166; [L459] SORT_1 var_168_arg_1 = input_167; [L460] SORT_1 var_168 = var_168_arg_0 | var_168_arg_1; [L461] SORT_1 next_169_arg_1 = ~var_168; [L462] next_169_arg_1 = next_169_arg_1 & mask_SORT_1 [L463] SORT_1 var_170_arg_0 = state_39; [L464] SORT_1 var_170_arg_1 = input_159; [L465] SORT_1 var_170 = var_170_arg_0 | var_170_arg_1; [L466] SORT_1 var_171_arg_0 = var_170; [L467] SORT_1 var_171_arg_1 = input_163; [L468] SORT_1 var_171 = var_171_arg_0 | var_171_arg_1; [L469] SORT_1 var_172_arg_0 = var_171; [L470] SORT_1 var_172_arg_1 = input_148; [L471] SORT_1 var_172 = var_172_arg_0 | var_172_arg_1; [L472] SORT_1 var_173_arg_0 = var_172; [L473] SORT_1 var_173_arg_1 = ~input_167; [L474] var_173_arg_1 = var_173_arg_1 & mask_SORT_1 [L475] SORT_1 var_173 = var_173_arg_0 & var_173_arg_1; [L476] SORT_1 next_174_arg_1 = var_173; [L477] SORT_1 var_175_arg_0 = state_41; [L478] SORT_1 var_175_arg_1 = input_117; [L479] SORT_1 var_175 = var_175_arg_0 | var_175_arg_1; [L480] SORT_1 var_177_arg_0 = var_175; [L481] SORT_1 var_177_arg_1 = ~input_176; [L482] var_177_arg_1 = var_177_arg_1 & mask_SORT_1 [L483] SORT_1 var_177 = var_177_arg_0 & var_177_arg_1; [L484] SORT_1 next_178_arg_1 = var_177; [L485] SORT_1 var_179_arg_0 = state_43; [L486] SORT_1 var_179_arg_1 = input_176; [L487] SORT_1 var_179 = var_179_arg_0 | var_179_arg_1; [L488] SORT_1 var_180_arg_0 = var_179; [L489] SORT_1 var_180_arg_1 = ~input_134; [L490] var_180_arg_1 = var_180_arg_1 & mask_SORT_1 [L491] SORT_1 var_180 = var_180_arg_0 & var_180_arg_1; [L492] SORT_1 var_181_arg_0 = var_180; [L493] SORT_1 var_181_arg_1 = ~input_155; [L494] var_181_arg_1 = var_181_arg_1 & mask_SORT_1 [L495] SORT_1 var_181 = var_181_arg_0 & var_181_arg_1; [L496] SORT_1 next_182_arg_1 = var_181; [L497] SORT_1 var_184_arg_0 = state_45; [L498] SORT_1 var_184_arg_1 = ~input_183; [L499] var_184_arg_1 = var_184_arg_1 & mask_SORT_1 [L500] SORT_1 var_184 = var_184_arg_0 & var_184_arg_1; [L501] SORT_1 var_186_arg_0 = var_184; [L502] SORT_1 var_186_arg_1 = ~input_185; [L503] var_186_arg_1 = var_186_arg_1 & mask_SORT_1 [L504] SORT_1 var_186 = var_186_arg_0 & var_186_arg_1; [L505] SORT_1 var_187_arg_0 = var_186; [L506] SORT_1 var_187_arg_1 = input_176; [L507] SORT_1 var_187 = var_187_arg_0 | var_187_arg_1; [L508] SORT_1 next_188_arg_1 = var_187; [L509] SORT_1 var_189_arg_0 = state_47; [L510] SORT_1 var_189_arg_1 = input_183; [L511] SORT_1 var_189 = var_189_arg_0 | var_189_arg_1; [L512] SORT_1 var_190_arg_0 = var_189; [L513] SORT_1 var_190_arg_1 = ~input_69; [L514] var_190_arg_1 = var_190_arg_1 & mask_SORT_1 [L515] SORT_1 var_190 = var_190_arg_0 & var_190_arg_1; [L516] SORT_1 var_192_arg_0 = var_190; [L517] SORT_1 var_192_arg_1 = ~input_191; [L518] var_192_arg_1 = var_192_arg_1 & mask_SORT_1 [L519] SORT_1 var_192 = var_192_arg_0 & var_192_arg_1; [L520] SORT_1 next_193_arg_1 = var_192; [L521] SORT_1 var_194_arg_0 = state_49; [L522] SORT_1 var_194_arg_1 = input_185; [L523] SORT_1 var_194 = var_194_arg_0 | var_194_arg_1; [L524] SORT_1 var_195_arg_0 = var_194; [L525] SORT_1 var_195_arg_1 = input_191; [L526] SORT_1 var_195 = var_195_arg_0 | var_195_arg_1; [L527] SORT_1 var_196_arg_0 = var_195; [L528] SORT_1 var_196_arg_1 = ~input_155; [L529] var_196_arg_1 = var_196_arg_1 & mask_SORT_1 [L530] SORT_1 var_196 = var_196_arg_0 & var_196_arg_1; [L531] SORT_1 next_197_arg_1 = var_196; [L532] SORT_1 var_198_arg_0 = ~state_51; [L533] var_198_arg_0 = var_198_arg_0 & mask_SORT_1 [L534] SORT_1 var_198_arg_1 = ~input_176; [L535] var_198_arg_1 = var_198_arg_1 & mask_SORT_1 [L536] SORT_1 var_198 = var_198_arg_0 & var_198_arg_1; [L537] SORT_1 var_199_arg_0 = var_198; [L538] SORT_1 var_199_arg_1 = input_134; [L539] SORT_1 var_199 = var_199_arg_0 | var_199_arg_1; [L540] SORT_1 var_200_arg_0 = var_199; [L541] SORT_1 var_200_arg_1 = input_155; [L542] SORT_1 var_200 = var_200_arg_0 | var_200_arg_1; [L543] SORT_1 next_201_arg_1 = ~var_200; [L544] next_201_arg_1 = next_201_arg_1 & mask_SORT_1 [L545] SORT_1 var_202_arg_0 = state_53; [L546] SORT_1 var_202_arg_1 = input_69; [L547] SORT_1 var_202 = var_202_arg_0 | var_202_arg_1; [L548] SORT_1 var_203_arg_0 = var_202; [L549] SORT_1 var_203_arg_1 = ~input_134; [L550] var_203_arg_1 = var_203_arg_1 & mask_SORT_1 [L551] SORT_1 var_203 = var_203_arg_0 & var_203_arg_1; [L552] SORT_1 next_204_arg_1 = var_203; [L553] SORT_1 var_205_arg_0 = state_17; [L554] SORT_1 var_205_arg_1 = var_62; [L555] SORT_1 var_205 = var_205_arg_0 & var_205_arg_1; [L556] SORT_1 var_206_arg_0 = ~input_112; [L557] var_206_arg_0 = var_206_arg_0 & mask_SORT_1 [L558] SORT_1 var_206_arg_1 = var_205; [L559] SORT_1 var_206 = var_206_arg_0 | var_206_arg_1; [L560] SORT_4 var_208_arg_0 = var_207; [L561] SORT_4 var_208_arg_1 = var_84; [L562] SORT_1 var_208 = var_208_arg_0 <= var_208_arg_1; [L563] SORT_1 var_209_arg_0 = var_62; [L564] SORT_1 var_209_arg_1 = ~var_208; [L565] var_209_arg_1 = var_209_arg_1 & mask_SORT_1 [L566] SORT_1 var_209 = var_209_arg_0 & var_209_arg_1; [L567] SORT_1 var_210_arg_0 = state_15; [L568] SORT_1 var_210_arg_1 = var_209; [L569] SORT_1 var_210 = var_210_arg_0 & var_210_arg_1; [L570] SORT_1 var_211_arg_0 = ~input_87; [L571] var_211_arg_0 = var_211_arg_0 & mask_SORT_1 [L572] SORT_1 var_211_arg_1 = var_210; [L573] SORT_1 var_211 = var_211_arg_0 | var_211_arg_1; [L574] SORT_1 var_212_arg_0 = var_206; [L575] SORT_1 var_212_arg_1 = var_211; [L576] SORT_1 var_212 = var_212_arg_0 & var_212_arg_1; [L577] SORT_1 var_213_arg_0 = state_19; [L578] SORT_1 var_213_arg_1 = ~input_74; [L579] var_213_arg_1 = var_213_arg_1 & mask_SORT_1 [L580] SORT_1 var_213 = var_213_arg_0 | var_213_arg_1; [L581] SORT_1 var_214_arg_0 = var_212; [L582] SORT_1 var_214_arg_1 = var_213; [L583] SORT_1 var_214 = var_214_arg_0 & var_214_arg_1; [L584] SORT_1 var_215_arg_0 = state_15; [L585] SORT_1 var_215_arg_1 = ~input_72; [L586] var_215_arg_1 = var_215_arg_1 & mask_SORT_1 [L587] SORT_1 var_215 = var_215_arg_0 | var_215_arg_1; [L588] SORT_1 var_216_arg_0 = var_214; [L589] SORT_1 var_216_arg_1 = var_215; [L590] SORT_1 var_216 = var_216_arg_0 & var_216_arg_1; [L591] SORT_4 var_217_arg_0 = var_63; [L592] SORT_4 var_217_arg_1 = var_61; [L593] SORT_1 var_217 = var_217_arg_0 == var_217_arg_1; [L594] SORT_1 var_218_arg_0 = state_17; [L595] SORT_1 var_218_arg_1 = var_217; [L596] SORT_1 var_218 = var_218_arg_0 & var_218_arg_1; [L597] SORT_1 var_219_arg_0 = ~input_121; [L598] var_219_arg_0 = var_219_arg_0 & mask_SORT_1 [L599] SORT_1 var_219_arg_1 = var_218; [L600] SORT_1 var_219 = var_219_arg_0 | var_219_arg_1; [L601] SORT_1 var_220_arg_0 = var_216; [L602] SORT_1 var_220_arg_1 = var_219; [L603] SORT_1 var_220 = var_220_arg_0 & var_220_arg_1; [L604] SORT_1 var_221_arg_0 = ~state_21; [L605] var_221_arg_0 = var_221_arg_0 & mask_SORT_1 [L606] SORT_1 var_221_arg_1 = ~input_71; [L607] var_221_arg_1 = var_221_arg_1 & mask_SORT_1 [L608] SORT_1 var_221 = var_221_arg_0 | var_221_arg_1; [L609] SORT_1 var_222_arg_0 = var_220; [L610] SORT_1 var_222_arg_1 = var_221; [L611] SORT_1 var_222 = var_222_arg_0 & var_222_arg_1; [L612] SORT_4 var_224_arg_0 = var_84; [L613] SORT_4 var_224_arg_1 = var_223; [L614] SORT_1 var_224 = var_224_arg_0 <= var_224_arg_1; [L615] SORT_4 var_226_arg_0 = var_225; [L616] SORT_4 var_226_arg_1 = var_84; [L617] SORT_1 var_226 = var_226_arg_0 <= var_226_arg_1; [L618] SORT_1 var_227_arg_0 = ~var_224; [L619] var_227_arg_0 = var_227_arg_0 & mask_SORT_1 [L620] SORT_1 var_227_arg_1 = ~var_226; [L621] var_227_arg_1 = var_227_arg_1 & mask_SORT_1 [L622] SORT_1 var_227 = var_227_arg_0 & var_227_arg_1; [L623] SORT_1 var_228_arg_0 = state_23; [L624] SORT_1 var_228_arg_1 = var_227; [L625] SORT_1 var_228 = var_228_arg_0 & var_228_arg_1; [L626] SORT_1 var_229_arg_0 = ~input_82; [L627] var_229_arg_0 = var_229_arg_0 & mask_SORT_1 [L628] SORT_1 var_229_arg_1 = var_228; [L629] SORT_1 var_229 = var_229_arg_0 | var_229_arg_1; [L630] SORT_1 var_230_arg_0 = var_222; [L631] SORT_1 var_230_arg_1 = var_229; [L632] SORT_1 var_230 = var_230_arg_0 & var_230_arg_1; [L633] SORT_4 var_232_arg_0 = var_231; [L634] SORT_4 var_232_arg_1 = var_84; [L635] SORT_1 var_232 = var_232_arg_0 <= var_232_arg_1; [L636] SORT_1 var_233_arg_0 = state_23; [L637] SORT_1 var_233_arg_1 = ~var_232; [L638] var_233_arg_1 = var_233_arg_1 & mask_SORT_1 [L639] SORT_1 var_233 = var_233_arg_0 & var_233_arg_1; [L640] SORT_1 var_234_arg_0 = ~input_81; [L641] var_234_arg_0 = var_234_arg_0 & mask_SORT_1 [L642] SORT_1 var_234_arg_1 = var_233; [L643] SORT_1 var_234 = var_234_arg_0 | var_234_arg_1; [L644] SORT_1 var_235_arg_0 = var_230; [L645] SORT_1 var_235_arg_1 = var_234; [L646] SORT_1 var_235 = var_235_arg_0 & var_235_arg_1; [L647] SORT_4 var_237_arg_0 = var_84; [L648] SORT_4 var_237_arg_1 = var_236; [L649] SORT_1 var_237 = var_237_arg_0 <= var_237_arg_1; [L650] SORT_1 var_238_arg_0 = state_23; [L651] SORT_1 var_238_arg_1 = ~var_237; [L652] var_238_arg_1 = var_238_arg_1 & mask_SORT_1 [L653] SORT_1 var_238 = var_238_arg_0 & var_238_arg_1; [L654] SORT_1 var_239_arg_0 = ~input_80; [L655] var_239_arg_0 = var_239_arg_0 & mask_SORT_1 [L656] SORT_1 var_239_arg_1 = var_238; [L657] SORT_1 var_239 = var_239_arg_0 | var_239_arg_1; [L658] SORT_1 var_240_arg_0 = var_235; [L659] SORT_1 var_240_arg_1 = var_239; [L660] SORT_1 var_240 = var_240_arg_0 & var_240_arg_1; [L661] SORT_4 var_241_arg_0 = var_102; [L662] SORT_4 var_241_arg_1 = var_63; [L663] SORT_1 var_241 = var_241_arg_0 <= var_241_arg_1; [L664] SORT_1 var_242_arg_0 = state_27; [L665] SORT_1 var_242_arg_1 = ~var_241; [L666] var_242_arg_1 = var_242_arg_1 & mask_SORT_1 [L667] SORT_1 var_242 = var_242_arg_0 & var_242_arg_1; [L668] SORT_1 var_243_arg_0 = ~input_105; [L669] var_243_arg_0 = var_243_arg_0 & mask_SORT_1 [L670] SORT_1 var_243_arg_1 = var_242; [L671] SORT_1 var_243 = var_243_arg_0 | var_243_arg_1; [L672] SORT_1 var_244_arg_0 = var_240; [L673] SORT_1 var_244_arg_1 = var_243; [L674] SORT_1 var_244 = var_244_arg_0 & var_244_arg_1; [L675] SORT_4 var_246_arg_0 = var_245; [L676] SORT_4 var_246_arg_1 = var_102; [L677] SORT_1 var_246 = var_246_arg_0 <= var_246_arg_1; [L678] SORT_1 var_247_arg_0 = state_31; [L679] SORT_1 var_247_arg_1 = ~var_246; [L680] var_247_arg_1 = var_247_arg_1 & mask_SORT_1 [L681] SORT_1 var_247 = var_247_arg_0 & var_247_arg_1; [L682] SORT_1 var_248_arg_0 = ~input_100; [L683] var_248_arg_0 = var_248_arg_0 & mask_SORT_1 [L684] SORT_1 var_248_arg_1 = var_247; [L685] SORT_1 var_248 = var_248_arg_0 | var_248_arg_1; [L686] SORT_1 var_249_arg_0 = var_244; [L687] SORT_1 var_249_arg_1 = var_248; [L688] SORT_1 var_249 = var_249_arg_0 & var_249_arg_1; [L689] SORT_1 var_250_arg_0 = ~state_37; [L690] var_250_arg_0 = var_250_arg_0 & mask_SORT_1 [L691] SORT_1 var_250_arg_1 = ~input_98; [L692] var_250_arg_1 = var_250_arg_1 & mask_SORT_1 [L693] SORT_1 var_250 = var_250_arg_0 | var_250_arg_1; [L694] SORT_1 var_251_arg_0 = var_249; [L695] SORT_1 var_251_arg_1 = var_250; [L696] SORT_1 var_251 = var_251_arg_0 & var_251_arg_1; [L697] SORT_4 var_252_arg_0 = var_63; [L698] SORT_4 var_252_arg_1 = var_102; [L699] SORT_1 var_252 = var_252_arg_0 == var_252_arg_1; [L700] SORT_1 var_253_arg_0 = state_27; [L701] SORT_1 var_253_arg_1 = var_252; [L702] SORT_1 var_253 = var_253_arg_0 & var_253_arg_1; [L703] SORT_1 var_254_arg_0 = ~input_144; [L704] var_254_arg_0 = var_254_arg_0 & mask_SORT_1 [L705] SORT_1 var_254_arg_1 = var_253; [L706] SORT_1 var_254 = var_254_arg_0 | var_254_arg_1; [L707] SORT_1 var_255_arg_0 = var_251; [L708] SORT_1 var_255_arg_1 = var_254; [L709] SORT_1 var_255 = var_255_arg_0 & var_255_arg_1; [L710] SORT_4 var_256_arg_0 = var_245; [L711] SORT_4 var_256_arg_1 = var_102; [L712] SORT_1 var_256 = var_256_arg_0 == var_256_arg_1; [L713] SORT_1 var_257_arg_0 = state_31; [L714] SORT_1 var_257_arg_1 = var_256; [L715] SORT_1 var_257 = var_257_arg_0 & var_257_arg_1; [L716] SORT_1 var_258_arg_0 = ~input_153; [L717] var_258_arg_0 = var_258_arg_0 & mask_SORT_1 [L718] SORT_1 var_258_arg_1 = var_257; [L719] SORT_1 var_258 = var_258_arg_0 | var_258_arg_1; [L720] SORT_1 var_259_arg_0 = var_255; [L721] SORT_1 var_259_arg_1 = var_258; [L722] SORT_1 var_259 = var_259_arg_0 & var_259_arg_1; [L723] SORT_1 var_260_arg_0 = state_33; [L724] SORT_1 var_260_arg_1 = ~input_159; [L725] var_260_arg_1 = var_260_arg_1 & mask_SORT_1 [L726] SORT_1 var_260 = var_260_arg_0 | var_260_arg_1; [L727] SORT_1 var_261_arg_0 = var_259; [L728] SORT_1 var_261_arg_1 = var_260; [L729] SORT_1 var_261 = var_261_arg_0 & var_261_arg_1; [L730] SORT_1 var_262_arg_0 = state_35; [L731] SORT_1 var_262_arg_1 = ~input_163; [L732] var_262_arg_1 = var_262_arg_1 & mask_SORT_1 [L733] SORT_1 var_262 = var_262_arg_0 | var_262_arg_1; [L734] SORT_1 var_263_arg_0 = var_261; [L735] SORT_1 var_263_arg_1 = var_262; [L736] SORT_1 var_263 = var_263_arg_0 & var_263_arg_1; [L737] SORT_1 var_264_arg_0 = state_29; [L738] SORT_1 var_264_arg_1 = ~input_148; [L739] var_264_arg_1 = var_264_arg_1 & mask_SORT_1 [L740] SORT_1 var_264 = var_264_arg_0 | var_264_arg_1; [L741] SORT_1 var_265_arg_0 = var_263; [L742] SORT_1 var_265_arg_1 = var_264; [L743] SORT_1 var_265 = var_265_arg_0 & var_265_arg_1; [L744] SORT_1 var_266_arg_0 = state_39; [L745] SORT_1 var_266_arg_1 = ~input_167; [L746] var_266_arg_1 = var_266_arg_1 & mask_SORT_1 [L747] SORT_1 var_266 = var_266_arg_0 | var_266_arg_1; [L748] SORT_1 var_267_arg_0 = var_265; [L749] SORT_1 var_267_arg_1 = var_266; [L750] SORT_1 var_267 = var_267_arg_0 & var_267_arg_1; [L751] SORT_1 var_268_arg_0 = state_45; [L752] SORT_1 var_268_arg_1 = ~input_183; [L753] var_268_arg_1 = var_268_arg_1 & mask_SORT_1 [L754] SORT_1 var_268 = var_268_arg_0 | var_268_arg_1; [L755] SORT_1 var_269_arg_0 = var_267; [L756] SORT_1 var_269_arg_1 = var_268; [L757] SORT_1 var_269 = var_269_arg_0 & var_269_arg_1; [L758] SORT_1 var_270_arg_0 = state_45; [L759] SORT_1 var_270_arg_1 = ~input_185; [L760] var_270_arg_1 = var_270_arg_1 & mask_SORT_1 [L761] SORT_1 var_270 = var_270_arg_0 | var_270_arg_1; [L762] SORT_1 var_271_arg_0 = var_269; [L763] SORT_1 var_271_arg_1 = var_270; [L764] SORT_1 var_271 = var_271_arg_0 & var_271_arg_1; [L765] SORT_1 var_272_arg_0 = state_47; [L766] SORT_1 var_272_arg_1 = ~input_69; [L767] var_272_arg_1 = var_272_arg_1 & mask_SORT_1 [L768] SORT_1 var_272 = var_272_arg_0 | var_272_arg_1; [L769] SORT_1 var_273_arg_0 = var_271; [L770] SORT_1 var_273_arg_1 = var_272; [L771] SORT_1 var_273 = var_273_arg_0 & var_273_arg_1; [L772] SORT_1 var_274_arg_0 = state_47; [L773] SORT_1 var_274_arg_1 = ~input_191; [L774] var_274_arg_1 = var_274_arg_1 & mask_SORT_1 [L775] SORT_1 var_274 = var_274_arg_0 | var_274_arg_1; [L776] SORT_1 var_275_arg_0 = var_273; [L777] SORT_1 var_275_arg_1 = var_274; [L778] SORT_1 var_275 = var_275_arg_0 & var_275_arg_1; [L779] SORT_1 var_276_arg_0 = state_15; [L780] SORT_1 var_276_arg_1 = state_25; [L781] SORT_1 var_276 = var_276_arg_0 & var_276_arg_1; [L782] SORT_1 var_277_arg_0 = var_276; [L783] SORT_1 var_277_arg_1 = var_62; [L784] SORT_1 var_277 = var_277_arg_0 & var_277_arg_1; [L785] SORT_1 var_278_arg_0 = ~input_117; [L786] var_278_arg_0 = var_278_arg_0 & mask_SORT_1 [L787] SORT_1 var_278_arg_1 = var_277; [L788] SORT_1 var_278 = var_278_arg_0 | var_278_arg_1; [L789] SORT_1 var_279_arg_0 = var_275; [L790] SORT_1 var_279_arg_1 = var_278; [L791] SORT_1 var_279 = var_279_arg_0 & var_279_arg_1; [L792] SORT_1 var_280_arg_0 = state_41; [L793] SORT_1 var_280_arg_1 = ~state_51; [L794] var_280_arg_1 = var_280_arg_1 & mask_SORT_1 [L795] SORT_1 var_280 = var_280_arg_0 & var_280_arg_1; [L796] SORT_1 var_281_arg_0 = ~input_176; [L797] var_281_arg_0 = var_281_arg_0 & mask_SORT_1 [L798] SORT_1 var_281_arg_1 = var_280; [L799] SORT_1 var_281 = var_281_arg_0 | var_281_arg_1; [L800] SORT_1 var_282_arg_0 = var_279; [L801] SORT_1 var_282_arg_1 = var_281; [L802] SORT_1 var_282 = var_282_arg_0 & var_282_arg_1; [L803] SORT_1 var_283_arg_0 = state_43; [L804] SORT_1 var_283_arg_1 = state_53; [L805] SORT_1 var_283 = var_283_arg_0 & var_283_arg_1; [L806] SORT_1 var_284_arg_0 = ~input_134; [L807] var_284_arg_0 = var_284_arg_0 & mask_SORT_1 [L808] SORT_1 var_284_arg_1 = var_283; [L809] SORT_1 var_284 = var_284_arg_0 | var_284_arg_1; [L810] SORT_1 var_285_arg_0 = var_282; [L811] SORT_1 var_285_arg_1 = var_284; [L812] SORT_1 var_285 = var_285_arg_0 & var_285_arg_1; [L813] SORT_1 var_286_arg_0 = state_43; [L814] SORT_1 var_286_arg_1 = state_49; [L815] SORT_1 var_286 = var_286_arg_0 & var_286_arg_1; [L816] SORT_1 var_287_arg_0 = ~input_155; [L817] var_287_arg_0 = var_287_arg_0 & mask_SORT_1 [L818] SORT_1 var_287_arg_1 = var_286; [L819] SORT_1 var_287 = var_287_arg_0 | var_287_arg_1; [L820] SORT_1 var_288_arg_0 = var_285; [L821] SORT_1 var_288_arg_1 = var_287; [L822] SORT_1 var_288 = var_288_arg_0 & var_288_arg_1; [L823] SORT_1 var_289_arg_0 = input_112; [L824] SORT_1 var_289_arg_1 = input_87; [L825] SORT_1 var_289 = var_289_arg_0 | var_289_arg_1; [L826] SORT_1 var_290_arg_0 = input_74; [L827] SORT_1 var_290_arg_1 = var_289; [L828] SORT_1 var_290 = var_290_arg_0 | var_290_arg_1; [L829] SORT_1 var_291_arg_0 = input_72; [L830] SORT_1 var_291_arg_1 = var_290; [L831] SORT_1 var_291 = var_291_arg_0 | var_291_arg_1; [L832] SORT_1 var_292_arg_0 = input_121; [L833] SORT_1 var_292_arg_1 = var_291; [L834] SORT_1 var_292 = var_292_arg_0 | var_292_arg_1; [L835] SORT_1 var_293_arg_0 = input_71; [L836] SORT_1 var_293_arg_1 = var_292; [L837] SORT_1 var_293 = var_293_arg_0 | var_293_arg_1; [L838] SORT_1 var_294_arg_0 = input_82; [L839] SORT_1 var_294_arg_1 = var_293; [L840] SORT_1 var_294 = var_294_arg_0 | var_294_arg_1; [L841] SORT_1 var_295_arg_0 = input_81; [L842] SORT_1 var_295_arg_1 = var_294; [L843] SORT_1 var_295 = var_295_arg_0 | var_295_arg_1; [L844] SORT_1 var_296_arg_0 = input_80; [L845] SORT_1 var_296_arg_1 = var_295; [L846] SORT_1 var_296 = var_296_arg_0 | var_296_arg_1; [L847] SORT_1 var_297_arg_0 = input_105; [L848] SORT_1 var_297_arg_1 = var_296; [L849] SORT_1 var_297 = var_297_arg_0 | var_297_arg_1; [L850] SORT_1 var_298_arg_0 = input_100; [L851] SORT_1 var_298_arg_1 = var_297; [L852] SORT_1 var_298 = var_298_arg_0 | var_298_arg_1; [L853] SORT_1 var_299_arg_0 = input_98; [L854] SORT_1 var_299_arg_1 = var_298; [L855] SORT_1 var_299 = var_299_arg_0 | var_299_arg_1; [L856] SORT_1 var_300_arg_0 = input_144; [L857] SORT_1 var_300_arg_1 = var_299; [L858] SORT_1 var_300 = var_300_arg_0 | var_300_arg_1; [L859] SORT_1 var_301_arg_0 = input_153; [L860] SORT_1 var_301_arg_1 = var_300; [L861] SORT_1 var_301 = var_301_arg_0 | var_301_arg_1; [L862] SORT_1 var_302_arg_0 = input_159; [L863] SORT_1 var_302_arg_1 = var_301; [L864] SORT_1 var_302 = var_302_arg_0 | var_302_arg_1; [L865] SORT_1 var_303_arg_0 = input_163; [L866] SORT_1 var_303_arg_1 = var_302; [L867] SORT_1 var_303 = var_303_arg_0 | var_303_arg_1; [L868] SORT_1 var_304_arg_0 = input_148; [L869] SORT_1 var_304_arg_1 = var_303; [L870] SORT_1 var_304 = var_304_arg_0 | var_304_arg_1; [L871] SORT_1 var_305_arg_0 = input_167; [L872] SORT_1 var_305_arg_1 = var_304; [L873] SORT_1 var_305 = var_305_arg_0 | var_305_arg_1; [L874] SORT_1 var_306_arg_0 = input_183; [L875] SORT_1 var_306_arg_1 = var_305; [L876] SORT_1 var_306 = var_306_arg_0 | var_306_arg_1; [L877] SORT_1 var_307_arg_0 = input_185; [L878] SORT_1 var_307_arg_1 = var_306; [L879] SORT_1 var_307 = var_307_arg_0 | var_307_arg_1; [L880] SORT_1 var_308_arg_0 = input_69; [L881] SORT_1 var_308_arg_1 = var_307; [L882] SORT_1 var_308 = var_308_arg_0 | var_308_arg_1; [L883] SORT_1 var_309_arg_0 = input_191; [L884] SORT_1 var_309_arg_1 = var_308; [L885] SORT_1 var_309 = var_309_arg_0 | var_309_arg_1; [L886] SORT_1 var_310_arg_0 = input_117; [L887] SORT_1 var_310_arg_1 = var_309; [L888] SORT_1 var_310 = var_310_arg_0 | var_310_arg_1; [L889] SORT_1 var_311_arg_0 = input_176; [L890] SORT_1 var_311_arg_1 = var_310; [L891] SORT_1 var_311 = var_311_arg_0 | var_311_arg_1; [L892] SORT_1 var_312_arg_0 = input_134; [L893] SORT_1 var_312_arg_1 = var_311; [L894] SORT_1 var_312 = var_312_arg_0 | var_312_arg_1; [L895] SORT_1 var_313_arg_0 = input_155; [L896] SORT_1 var_313_arg_1 = var_312; [L897] SORT_1 var_313 = var_313_arg_0 | var_313_arg_1; [L898] SORT_1 var_314_arg_0 = var_288; [L899] SORT_1 var_314_arg_1 = var_313; [L900] SORT_1 var_314 = var_314_arg_0 & var_314_arg_1; [L901] SORT_1 var_315_arg_0 = input_112; [L902] SORT_1 var_315_arg_1 = input_87; [L903] SORT_1 var_315 = var_315_arg_0 & var_315_arg_1; [L904] SORT_1 var_316_arg_0 = input_74; [L905] SORT_1 var_316_arg_1 = var_289; [L906] SORT_1 var_316 = var_316_arg_0 & var_316_arg_1; [L907] SORT_1 var_317_arg_0 = var_315; [L908] SORT_1 var_317_arg_1 = var_316; [L909] SORT_1 var_317 = var_317_arg_0 | var_317_arg_1; [L910] SORT_1 var_318_arg_0 = input_72; [L911] SORT_1 var_318_arg_1 = var_290; [L912] SORT_1 var_318 = var_318_arg_0 & var_318_arg_1; [L913] SORT_1 var_319_arg_0 = var_317; [L914] SORT_1 var_319_arg_1 = var_318; [L915] SORT_1 var_319 = var_319_arg_0 | var_319_arg_1; [L916] SORT_1 var_320_arg_0 = input_121; [L917] SORT_1 var_320_arg_1 = var_291; [L918] SORT_1 var_320 = var_320_arg_0 & var_320_arg_1; [L919] SORT_1 var_321_arg_0 = var_319; [L920] SORT_1 var_321_arg_1 = var_320; [L921] SORT_1 var_321 = var_321_arg_0 | var_321_arg_1; [L922] SORT_1 var_322_arg_0 = input_71; [L923] SORT_1 var_322_arg_1 = var_292; [L924] SORT_1 var_322 = var_322_arg_0 & var_322_arg_1; [L925] SORT_1 var_323_arg_0 = var_321; [L926] SORT_1 var_323_arg_1 = var_322; [L927] SORT_1 var_323 = var_323_arg_0 | var_323_arg_1; [L928] SORT_1 var_324_arg_0 = input_82; [L929] SORT_1 var_324_arg_1 = var_293; [L930] SORT_1 var_324 = var_324_arg_0 & var_324_arg_1; [L931] SORT_1 var_325_arg_0 = var_323; [L932] SORT_1 var_325_arg_1 = var_324; [L933] SORT_1 var_325 = var_325_arg_0 | var_325_arg_1; [L934] SORT_1 var_326_arg_0 = input_81; [L935] SORT_1 var_326_arg_1 = var_294; [L936] SORT_1 var_326 = var_326_arg_0 & var_326_arg_1; [L937] SORT_1 var_327_arg_0 = var_325; [L938] SORT_1 var_327_arg_1 = var_326; [L939] SORT_1 var_327 = var_327_arg_0 | var_327_arg_1; [L940] SORT_1 var_328_arg_0 = input_80; [L941] SORT_1 var_328_arg_1 = var_295; [L942] SORT_1 var_328 = var_328_arg_0 & var_328_arg_1; [L943] SORT_1 var_329_arg_0 = var_327; [L944] SORT_1 var_329_arg_1 = var_328; [L945] SORT_1 var_329 = var_329_arg_0 | var_329_arg_1; [L946] SORT_1 var_330_arg_0 = input_105; [L947] SORT_1 var_330_arg_1 = var_296; [L948] SORT_1 var_330 = var_330_arg_0 & var_330_arg_1; [L949] SORT_1 var_331_arg_0 = var_329; [L950] SORT_1 var_331_arg_1 = var_330; [L951] SORT_1 var_331 = var_331_arg_0 | var_331_arg_1; [L952] SORT_1 var_332_arg_0 = input_100; [L953] SORT_1 var_332_arg_1 = var_297; [L954] SORT_1 var_332 = var_332_arg_0 & var_332_arg_1; [L955] SORT_1 var_333_arg_0 = var_331; [L956] SORT_1 var_333_arg_1 = var_332; [L957] SORT_1 var_333 = var_333_arg_0 | var_333_arg_1; [L958] SORT_1 var_334_arg_0 = input_98; [L959] SORT_1 var_334_arg_1 = var_298; [L960] SORT_1 var_334 = var_334_arg_0 & var_334_arg_1; [L961] SORT_1 var_335_arg_0 = var_333; [L962] SORT_1 var_335_arg_1 = var_334; [L963] SORT_1 var_335 = var_335_arg_0 | var_335_arg_1; [L964] SORT_1 var_336_arg_0 = input_144; [L965] SORT_1 var_336_arg_1 = var_299; [L966] SORT_1 var_336 = var_336_arg_0 & var_336_arg_1; [L967] SORT_1 var_337_arg_0 = var_335; [L968] SORT_1 var_337_arg_1 = var_336; [L969] SORT_1 var_337 = var_337_arg_0 | var_337_arg_1; [L970] SORT_1 var_338_arg_0 = input_153; [L971] SORT_1 var_338_arg_1 = var_300; [L972] SORT_1 var_338 = var_338_arg_0 & var_338_arg_1; [L973] SORT_1 var_339_arg_0 = var_337; [L974] SORT_1 var_339_arg_1 = var_338; [L975] SORT_1 var_339 = var_339_arg_0 | var_339_arg_1; [L976] SORT_1 var_340_arg_0 = input_159; [L977] SORT_1 var_340_arg_1 = var_301; [L978] SORT_1 var_340 = var_340_arg_0 & var_340_arg_1; [L979] SORT_1 var_341_arg_0 = var_339; [L980] SORT_1 var_341_arg_1 = var_340; [L981] SORT_1 var_341 = var_341_arg_0 | var_341_arg_1; [L982] SORT_1 var_342_arg_0 = input_163; [L983] SORT_1 var_342_arg_1 = var_302; [L984] SORT_1 var_342 = var_342_arg_0 & var_342_arg_1; [L985] SORT_1 var_343_arg_0 = var_341; [L986] SORT_1 var_343_arg_1 = var_342; [L987] SORT_1 var_343 = var_343_arg_0 | var_343_arg_1; [L988] SORT_1 var_344_arg_0 = input_148; [L989] SORT_1 var_344_arg_1 = var_303; [L990] SORT_1 var_344 = var_344_arg_0 & var_344_arg_1; [L991] SORT_1 var_345_arg_0 = var_343; [L992] SORT_1 var_345_arg_1 = var_344; [L993] SORT_1 var_345 = var_345_arg_0 | var_345_arg_1; [L994] SORT_1 var_346_arg_0 = input_167; [L995] SORT_1 var_346_arg_1 = var_304; [L996] SORT_1 var_346 = var_346_arg_0 & var_346_arg_1; [L997] SORT_1 var_347_arg_0 = var_345; [L998] SORT_1 var_347_arg_1 = var_346; [L999] SORT_1 var_347 = var_347_arg_0 | var_347_arg_1; [L1000] SORT_1 var_348_arg_0 = input_183; [L1001] SORT_1 var_348_arg_1 = var_305; [L1002] SORT_1 var_348 = var_348_arg_0 & var_348_arg_1; [L1003] SORT_1 var_349_arg_0 = var_347; [L1004] SORT_1 var_349_arg_1 = var_348; [L1005] SORT_1 var_349 = var_349_arg_0 | var_349_arg_1; [L1006] SORT_1 var_350_arg_0 = input_185; [L1007] SORT_1 var_350_arg_1 = var_306; [L1008] SORT_1 var_350 = var_350_arg_0 & var_350_arg_1; [L1009] SORT_1 var_351_arg_0 = var_349; [L1010] SORT_1 var_351_arg_1 = var_350; [L1011] SORT_1 var_351 = var_351_arg_0 | var_351_arg_1; [L1012] SORT_1 var_352_arg_0 = input_69; [L1013] SORT_1 var_352_arg_1 = var_307; [L1014] SORT_1 var_352 = var_352_arg_0 & var_352_arg_1; [L1015] SORT_1 var_353_arg_0 = var_351; [L1016] SORT_1 var_353_arg_1 = var_352; [L1017] SORT_1 var_353 = var_353_arg_0 | var_353_arg_1; [L1018] SORT_1 var_354_arg_0 = input_191; [L1019] SORT_1 var_354_arg_1 = var_308; [L1020] SORT_1 var_354 = var_354_arg_0 & var_354_arg_1; [L1021] SORT_1 var_355_arg_0 = var_353; [L1022] SORT_1 var_355_arg_1 = var_354; [L1023] SORT_1 var_355 = var_355_arg_0 | var_355_arg_1; [L1024] SORT_1 var_356_arg_0 = input_117; [L1025] SORT_1 var_356_arg_1 = var_309; [L1026] SORT_1 var_356 = var_356_arg_0 & var_356_arg_1; [L1027] SORT_1 var_357_arg_0 = var_355; [L1028] SORT_1 var_357_arg_1 = var_356; [L1029] SORT_1 var_357 = var_357_arg_0 | var_357_arg_1; [L1030] SORT_1 var_358_arg_0 = input_176; [L1031] SORT_1 var_358_arg_1 = var_310; [L1032] SORT_1 var_358 = var_358_arg_0 & var_358_arg_1; [L1033] SORT_1 var_359_arg_0 = var_357; [L1034] SORT_1 var_359_arg_1 = var_358; [L1035] SORT_1 var_359 = var_359_arg_0 | var_359_arg_1; [L1036] SORT_1 var_360_arg_0 = input_134; [L1037] SORT_1 var_360_arg_1 = var_311; [L1038] SORT_1 var_360 = var_360_arg_0 & var_360_arg_1; [L1039] SORT_1 var_361_arg_0 = var_359; [L1040] SORT_1 var_361_arg_1 = var_360; [L1041] SORT_1 var_361 = var_361_arg_0 | var_361_arg_1; [L1042] SORT_1 var_362_arg_0 = input_155; [L1043] SORT_1 var_362_arg_1 = var_312; [L1044] SORT_1 var_362 = var_362_arg_0 & var_362_arg_1; [L1045] SORT_1 var_363_arg_0 = var_361; [L1046] SORT_1 var_363_arg_1 = var_362; [L1047] SORT_1 var_363 = var_363_arg_0 | var_363_arg_1; [L1048] SORT_1 var_364_arg_0 = var_314; [L1049] SORT_1 var_364_arg_1 = ~var_363; [L1050] var_364_arg_1 = var_364_arg_1 & mask_SORT_1 [L1051] SORT_1 var_364 = var_364_arg_0 & var_364_arg_1; [L1052] SORT_1 var_365_arg_0 = state_15; [L1053] SORT_1 var_365_arg_1 = state_17; [L1054] SORT_1 var_365 = var_365_arg_0 & var_365_arg_1; [L1055] SORT_1 var_366_arg_0 = state_15; [L1056] SORT_1 var_366_arg_1 = state_17; [L1057] SORT_1 var_366 = var_366_arg_0 | var_366_arg_1; [L1058] SORT_1 var_367_arg_0 = state_19; [L1059] SORT_1 var_367_arg_1 = var_366; [L1060] SORT_1 var_367 = var_367_arg_0 & var_367_arg_1; [L1061] SORT_1 var_368_arg_0 = var_365; [L1062] SORT_1 var_368_arg_1 = var_367; [L1063] SORT_1 var_368 = var_368_arg_0 | var_368_arg_1; [L1064] SORT_1 var_369_arg_0 = state_19; [L1065] SORT_1 var_369_arg_1 = var_366; [L1066] SORT_1 var_369 = var_369_arg_0 | var_369_arg_1; [L1067] SORT_1 var_370_arg_0 = ~state_21; [L1068] var_370_arg_0 = var_370_arg_0 & mask_SORT_1 [L1069] SORT_1 var_370_arg_1 = var_369; [L1070] SORT_1 var_370 = var_370_arg_0 & var_370_arg_1; [L1071] SORT_1 var_371_arg_0 = var_368; [L1072] SORT_1 var_371_arg_1 = var_370; [L1073] SORT_1 var_371 = var_371_arg_0 | var_371_arg_1; [L1074] SORT_1 var_372_arg_0 = ~state_21; [L1075] var_372_arg_0 = var_372_arg_0 & mask_SORT_1 [L1076] SORT_1 var_372_arg_1 = var_369; [L1077] SORT_1 var_372 = var_372_arg_0 | var_372_arg_1; [L1078] SORT_1 var_373_arg_0 = ~var_371; [L1079] var_373_arg_0 = var_373_arg_0 & mask_SORT_1 [L1080] SORT_1 var_373_arg_1 = var_372; [L1081] SORT_1 var_373 = var_373_arg_0 & var_373_arg_1; [L1082] SORT_1 var_374_arg_0 = state_23; [L1083] SORT_1 var_374_arg_1 = state_25; [L1084] SORT_1 var_374 = var_374_arg_0 & var_374_arg_1; [L1085] SORT_1 var_375_arg_0 = state_23; [L1086] SORT_1 var_375_arg_1 = state_25; [L1087] SORT_1 var_375 = var_375_arg_0 | var_375_arg_1; [L1088] SORT_1 var_376_arg_0 = state_27; [L1089] SORT_1 var_376_arg_1 = var_375; [L1090] SORT_1 var_376 = var_376_arg_0 & var_376_arg_1; [L1091] SORT_1 var_377_arg_0 = var_374; [L1092] SORT_1 var_377_arg_1 = var_376; [L1093] SORT_1 var_377 = var_377_arg_0 | var_377_arg_1; [L1094] SORT_1 var_378_arg_0 = state_27; [L1095] SORT_1 var_378_arg_1 = var_375; [L1096] SORT_1 var_378 = var_378_arg_0 | var_378_arg_1; [L1097] SORT_1 var_379_arg_0 = state_29; [L1098] SORT_1 var_379_arg_1 = var_378; [L1099] SORT_1 var_379 = var_379_arg_0 & var_379_arg_1; [L1100] SORT_1 var_380_arg_0 = var_377; [L1101] SORT_1 var_380_arg_1 = var_379; [L1102] SORT_1 var_380 = var_380_arg_0 | var_380_arg_1; [L1103] SORT_1 var_381_arg_0 = state_29; [L1104] SORT_1 var_381_arg_1 = var_378; [L1105] SORT_1 var_381 = var_381_arg_0 | var_381_arg_1; [L1106] SORT_1 var_382_arg_0 = state_31; [L1107] SORT_1 var_382_arg_1 = var_381; [L1108] SORT_1 var_382 = var_382_arg_0 & var_382_arg_1; [L1109] SORT_1 var_383_arg_0 = var_380; [L1110] SORT_1 var_383_arg_1 = var_382; [L1111] SORT_1 var_383 = var_383_arg_0 | var_383_arg_1; [L1112] SORT_1 var_384_arg_0 = state_31; [L1113] SORT_1 var_384_arg_1 = var_381; [L1114] SORT_1 var_384 = var_384_arg_0 | var_384_arg_1; [L1115] SORT_1 var_385_arg_0 = state_33; [L1116] SORT_1 var_385_arg_1 = var_384; [L1117] SORT_1 var_385 = var_385_arg_0 & var_385_arg_1; [L1118] SORT_1 var_386_arg_0 = var_383; [L1119] SORT_1 var_386_arg_1 = var_385; [L1120] SORT_1 var_386 = var_386_arg_0 | var_386_arg_1; [L1121] SORT_1 var_387_arg_0 = state_33; [L1122] SORT_1 var_387_arg_1 = var_384; [L1123] SORT_1 var_387 = var_387_arg_0 | var_387_arg_1; [L1124] SORT_1 var_388_arg_0 = state_35; [L1125] SORT_1 var_388_arg_1 = var_387; [L1126] SORT_1 var_388 = var_388_arg_0 & var_388_arg_1; [L1127] SORT_1 var_389_arg_0 = var_386; [L1128] SORT_1 var_389_arg_1 = var_388; [L1129] SORT_1 var_389 = var_389_arg_0 | var_389_arg_1; [L1130] SORT_1 var_390_arg_0 = state_35; [L1131] SORT_1 var_390_arg_1 = var_387; [L1132] SORT_1 var_390 = var_390_arg_0 | var_390_arg_1; [L1133] SORT_1 var_391_arg_0 = ~state_37; [L1134] var_391_arg_0 = var_391_arg_0 & mask_SORT_1 [L1135] SORT_1 var_391_arg_1 = var_390; [L1136] SORT_1 var_391 = var_391_arg_0 & var_391_arg_1; [L1137] SORT_1 var_392_arg_0 = var_389; [L1138] SORT_1 var_392_arg_1 = var_391; [L1139] SORT_1 var_392 = var_392_arg_0 | var_392_arg_1; [L1140] SORT_1 var_393_arg_0 = ~state_37; [L1141] var_393_arg_0 = var_393_arg_0 & mask_SORT_1 [L1142] SORT_1 var_393_arg_1 = var_390; [L1143] SORT_1 var_393 = var_393_arg_0 | var_393_arg_1; [L1144] SORT_1 var_394_arg_0 = state_39; [L1145] SORT_1 var_394_arg_1 = var_393; [L1146] SORT_1 var_394 = var_394_arg_0 & var_394_arg_1; [L1147] SORT_1 var_395_arg_0 = var_392; [L1148] SORT_1 var_395_arg_1 = var_394; [L1149] SORT_1 var_395 = var_395_arg_0 | var_395_arg_1; [L1150] SORT_1 var_396_arg_0 = state_39; [L1151] SORT_1 var_396_arg_1 = var_393; [L1152] SORT_1 var_396 = var_396_arg_0 | var_396_arg_1; [L1153] SORT_1 var_397_arg_0 = state_41; [L1154] SORT_1 var_397_arg_1 = var_396; [L1155] SORT_1 var_397 = var_397_arg_0 & var_397_arg_1; [L1156] SORT_1 var_398_arg_0 = var_395; [L1157] SORT_1 var_398_arg_1 = var_397; [L1158] SORT_1 var_398 = var_398_arg_0 | var_398_arg_1; [L1159] SORT_1 var_399_arg_0 = state_41; [L1160] SORT_1 var_399_arg_1 = var_396; [L1161] SORT_1 var_399 = var_399_arg_0 | var_399_arg_1; [L1162] SORT_1 var_400_arg_0 = state_43; [L1163] SORT_1 var_400_arg_1 = var_399; [L1164] SORT_1 var_400 = var_400_arg_0 & var_400_arg_1; [L1165] SORT_1 var_401_arg_0 = var_398; [L1166] SORT_1 var_401_arg_1 = var_400; [L1167] SORT_1 var_401 = var_401_arg_0 | var_401_arg_1; [L1168] SORT_1 var_402_arg_0 = var_373; [L1169] SORT_1 var_402_arg_1 = ~var_401; [L1170] var_402_arg_1 = var_402_arg_1 & mask_SORT_1 [L1171] SORT_1 var_402 = var_402_arg_0 & var_402_arg_1; [L1172] SORT_1 var_403_arg_0 = state_43; [L1173] SORT_1 var_403_arg_1 = var_399; [L1174] SORT_1 var_403 = var_403_arg_0 | var_403_arg_1; [L1175] SORT_1 var_404_arg_0 = var_402; [L1176] SORT_1 var_404_arg_1 = var_403; [L1177] SORT_1 var_404 = var_404_arg_0 & var_404_arg_1; [L1178] SORT_1 var_405_arg_0 = state_45; [L1179] SORT_1 var_405_arg_1 = state_47; [L1180] SORT_1 var_405 = var_405_arg_0 & var_405_arg_1; [L1181] SORT_1 var_406_arg_0 = state_45; [L1182] SORT_1 var_406_arg_1 = state_47; [L1183] SORT_1 var_406 = var_406_arg_0 | var_406_arg_1; [L1184] SORT_1 var_407_arg_0 = state_49; [L1185] SORT_1 var_407_arg_1 = var_406; [L1186] SORT_1 var_407 = var_407_arg_0 & var_407_arg_1; [L1187] SORT_1 var_408_arg_0 = var_405; [L1188] SORT_1 var_408_arg_1 = var_407; [L1189] SORT_1 var_408 = var_408_arg_0 | var_408_arg_1; [L1190] SORT_1 var_409_arg_0 = state_49; [L1191] SORT_1 var_409_arg_1 = var_406; [L1192] SORT_1 var_409 = var_409_arg_0 | var_409_arg_1; [L1193] SORT_1 var_410_arg_0 = ~state_51; [L1194] var_410_arg_0 = var_410_arg_0 & mask_SORT_1 [L1195] SORT_1 var_410_arg_1 = var_409; [L1196] SORT_1 var_410 = var_410_arg_0 & var_410_arg_1; [L1197] SORT_1 var_411_arg_0 = var_408; [L1198] SORT_1 var_411_arg_1 = var_410; [L1199] SORT_1 var_411 = var_411_arg_0 | var_411_arg_1; [L1200] SORT_1 var_412_arg_0 = ~state_51; [L1201] var_412_arg_0 = var_412_arg_0 & mask_SORT_1 [L1202] SORT_1 var_412_arg_1 = var_409; [L1203] SORT_1 var_412 = var_412_arg_0 | var_412_arg_1; [L1204] SORT_1 var_413_arg_0 = state_53; [L1205] SORT_1 var_413_arg_1 = var_412; [L1206] SORT_1 var_413 = var_413_arg_0 & var_413_arg_1; [L1207] SORT_1 var_414_arg_0 = var_411; [L1208] SORT_1 var_414_arg_1 = var_413; [L1209] SORT_1 var_414 = var_414_arg_0 | var_414_arg_1; [L1210] SORT_1 var_415_arg_0 = var_404; [L1211] SORT_1 var_415_arg_1 = ~var_414; [L1212] var_415_arg_1 = var_415_arg_1 & mask_SORT_1 [L1213] SORT_1 var_415 = var_415_arg_0 & var_415_arg_1; [L1214] SORT_1 var_416_arg_0 = state_53; [L1215] SORT_1 var_416_arg_1 = var_412; [L1216] SORT_1 var_416 = var_416_arg_0 | var_416_arg_1; [L1217] SORT_1 var_417_arg_0 = var_415; [L1218] SORT_1 var_417_arg_1 = var_416; [L1219] SORT_1 var_417 = var_417_arg_0 & var_417_arg_1; [L1220] SORT_1 var_418_arg_0 = var_364; [L1221] SORT_1 var_418_arg_1 = var_417; [L1222] SORT_1 var_418 = var_418_arg_0 & var_418_arg_1; [L1223] SORT_1 var_419_arg_0 = var_118; [L1224] SORT_1 var_419_arg_1 = var_123; [L1225] SORT_1 var_419 = var_419_arg_0 & var_419_arg_1; [L1226] SORT_1 var_420_arg_0 = var_118; [L1227] SORT_1 var_420_arg_1 = var_123; [L1228] SORT_1 var_420 = var_420_arg_0 | var_420_arg_1; [L1229] SORT_1 var_421_arg_0 = var_127; [L1230] SORT_1 var_421_arg_1 = var_420; [L1231] SORT_1 var_421 = var_421_arg_0 & var_421_arg_1; [L1232] SORT_1 var_422_arg_0 = var_419; [L1233] SORT_1 var_422_arg_1 = var_421; [L1234] SORT_1 var_422 = var_422_arg_0 | var_422_arg_1; [L1235] SORT_1 var_423_arg_0 = var_127; [L1236] SORT_1 var_423_arg_1 = var_420; [L1237] SORT_1 var_423 = var_423_arg_0 | var_423_arg_1; [L1238] SORT_1 var_424_arg_0 = var_129; [L1239] SORT_1 var_424_arg_1 = var_423; [L1240] SORT_1 var_424 = var_424_arg_0 & var_424_arg_1; [L1241] SORT_1 var_425_arg_0 = var_422; [L1242] SORT_1 var_425_arg_1 = var_424; [L1243] SORT_1 var_425 = var_425_arg_0 | var_425_arg_1; [L1244] SORT_1 var_426_arg_0 = var_129; [L1245] SORT_1 var_426_arg_1 = var_423; [L1246] SORT_1 var_426 = var_426_arg_0 | var_426_arg_1; [L1247] SORT_1 var_427_arg_0 = ~var_425; [L1248] var_427_arg_0 = var_427_arg_0 & mask_SORT_1 [L1249] SORT_1 var_427_arg_1 = var_426; [L1250] SORT_1 var_427 = var_427_arg_0 & var_427_arg_1; [L1251] SORT_1 var_428_arg_0 = var_140; [L1252] SORT_1 var_428_arg_1 = var_135; [L1253] SORT_1 var_428 = var_428_arg_0 & var_428_arg_1; [L1254] SORT_1 var_429_arg_0 = var_140; [L1255] SORT_1 var_429_arg_1 = var_135; [L1256] SORT_1 var_429 = var_429_arg_0 | var_429_arg_1; [L1257] SORT_1 var_430_arg_0 = var_145; [L1258] SORT_1 var_430_arg_1 = var_429; [L1259] SORT_1 var_430 = var_430_arg_0 & var_430_arg_1; [L1260] SORT_1 var_431_arg_0 = var_428; [L1261] SORT_1 var_431_arg_1 = var_430; [L1262] SORT_1 var_431 = var_431_arg_0 | var_431_arg_1; [L1263] SORT_1 var_432_arg_0 = var_145; [L1264] SORT_1 var_432_arg_1 = var_429; [L1265] SORT_1 var_432 = var_432_arg_0 | var_432_arg_1; [L1266] SORT_1 var_433_arg_0 = var_149; [L1267] SORT_1 var_433_arg_1 = var_432; [L1268] SORT_1 var_433 = var_433_arg_0 & var_433_arg_1; [L1269] SORT_1 var_434_arg_0 = var_431; [L1270] SORT_1 var_434_arg_1 = var_433; [L1271] SORT_1 var_434 = var_434_arg_0 | var_434_arg_1; [L1272] SORT_1 var_435_arg_0 = var_149; [L1273] SORT_1 var_435_arg_1 = var_432; [L1274] SORT_1 var_435 = var_435_arg_0 | var_435_arg_1; [L1275] SORT_1 var_436_arg_0 = var_156; [L1276] SORT_1 var_436_arg_1 = var_435; [L1277] SORT_1 var_436 = var_436_arg_0 & var_436_arg_1; [L1278] SORT_1 var_437_arg_0 = var_434; [L1279] SORT_1 var_437_arg_1 = var_436; [L1280] SORT_1 var_437 = var_437_arg_0 | var_437_arg_1; [L1281] SORT_1 var_438_arg_0 = var_156; [L1282] SORT_1 var_438_arg_1 = var_435; [L1283] SORT_1 var_438 = var_438_arg_0 | var_438_arg_1; [L1284] SORT_1 var_439_arg_0 = var_160; [L1285] SORT_1 var_439_arg_1 = var_438; [L1286] SORT_1 var_439 = var_439_arg_0 & var_439_arg_1; [L1287] SORT_1 var_440_arg_0 = var_437; [L1288] SORT_1 var_440_arg_1 = var_439; [L1289] SORT_1 var_440 = var_440_arg_0 | var_440_arg_1; [L1290] SORT_1 var_441_arg_0 = var_160; [L1291] SORT_1 var_441_arg_1 = var_438; [L1292] SORT_1 var_441 = var_441_arg_0 | var_441_arg_1; [L1293] SORT_1 var_442_arg_0 = var_164; [L1294] SORT_1 var_442_arg_1 = var_441; [L1295] SORT_1 var_442 = var_442_arg_0 & var_442_arg_1; [L1296] SORT_1 var_443_arg_0 = var_440; [L1297] SORT_1 var_443_arg_1 = var_442; [L1298] SORT_1 var_443 = var_443_arg_0 | var_443_arg_1; [L1299] SORT_1 var_444_arg_0 = var_164; [L1300] SORT_1 var_444_arg_1 = var_441; [L1301] SORT_1 var_444 = var_444_arg_0 | var_444_arg_1; [L1302] SORT_1 var_445_arg_0 = var_168; [L1303] SORT_1 var_445_arg_1 = var_444; [L1304] SORT_1 var_445 = var_445_arg_0 & var_445_arg_1; [L1305] SORT_1 var_446_arg_0 = var_443; [L1306] SORT_1 var_446_arg_1 = var_445; [L1307] SORT_1 var_446 = var_446_arg_0 | var_446_arg_1; [L1308] SORT_1 var_447_arg_0 = var_168; [L1309] SORT_1 var_447_arg_1 = var_444; [L1310] SORT_1 var_447 = var_447_arg_0 | var_447_arg_1; [L1311] SORT_1 var_448_arg_0 = var_173; [L1312] SORT_1 var_448_arg_1 = var_447; [L1313] SORT_1 var_448 = var_448_arg_0 & var_448_arg_1; [L1314] SORT_1 var_449_arg_0 = var_446; [L1315] SORT_1 var_449_arg_1 = var_448; [L1316] SORT_1 var_449 = var_449_arg_0 | var_449_arg_1; [L1317] SORT_1 var_450_arg_0 = var_173; [L1318] SORT_1 var_450_arg_1 = var_447; [L1319] SORT_1 var_450 = var_450_arg_0 | var_450_arg_1; [L1320] SORT_1 var_451_arg_0 = var_177; [L1321] SORT_1 var_451_arg_1 = var_450; [L1322] SORT_1 var_451 = var_451_arg_0 & var_451_arg_1; [L1323] SORT_1 var_452_arg_0 = var_449; [L1324] SORT_1 var_452_arg_1 = var_451; [L1325] SORT_1 var_452 = var_452_arg_0 | var_452_arg_1; [L1326] SORT_1 var_453_arg_0 = var_177; [L1327] SORT_1 var_453_arg_1 = var_450; [L1328] SORT_1 var_453 = var_453_arg_0 | var_453_arg_1; [L1329] SORT_1 var_454_arg_0 = var_181; [L1330] SORT_1 var_454_arg_1 = var_453; [L1331] SORT_1 var_454 = var_454_arg_0 & var_454_arg_1; [L1332] SORT_1 var_455_arg_0 = var_452; [L1333] SORT_1 var_455_arg_1 = var_454; [L1334] SORT_1 var_455 = var_455_arg_0 | var_455_arg_1; [L1335] SORT_1 var_456_arg_0 = var_427; [L1336] SORT_1 var_456_arg_1 = ~var_455; [L1337] var_456_arg_1 = var_456_arg_1 & mask_SORT_1 [L1338] SORT_1 var_456 = var_456_arg_0 & var_456_arg_1; [L1339] SORT_1 var_457_arg_0 = var_181; [L1340] SORT_1 var_457_arg_1 = var_453; [L1341] SORT_1 var_457 = var_457_arg_0 | var_457_arg_1; [L1342] SORT_1 var_458_arg_0 = var_456; [L1343] SORT_1 var_458_arg_1 = var_457; [L1344] SORT_1 var_458 = var_458_arg_0 & var_458_arg_1; [L1345] SORT_1 var_459_arg_0 = var_192; [L1346] SORT_1 var_459_arg_1 = var_187; [L1347] SORT_1 var_459 = var_459_arg_0 & var_459_arg_1; [L1348] SORT_1 var_460_arg_0 = var_192; [L1349] SORT_1 var_460_arg_1 = var_187; [L1350] SORT_1 var_460 = var_460_arg_0 | var_460_arg_1; [L1351] SORT_1 var_461_arg_0 = var_196; [L1352] SORT_1 var_461_arg_1 = var_460; [L1353] SORT_1 var_461 = var_461_arg_0 & var_461_arg_1; [L1354] SORT_1 var_462_arg_0 = var_459; [L1355] SORT_1 var_462_arg_1 = var_461; [L1356] SORT_1 var_462 = var_462_arg_0 | var_462_arg_1; [L1357] SORT_1 var_463_arg_0 = var_196; [L1358] SORT_1 var_463_arg_1 = var_460; [L1359] SORT_1 var_463 = var_463_arg_0 | var_463_arg_1; [L1360] SORT_1 var_464_arg_0 = var_200; [L1361] SORT_1 var_464_arg_1 = var_463; [L1362] SORT_1 var_464 = var_464_arg_0 & var_464_arg_1; [L1363] SORT_1 var_465_arg_0 = var_462; [L1364] SORT_1 var_465_arg_1 = var_464; [L1365] SORT_1 var_465 = var_465_arg_0 | var_465_arg_1; [L1366] SORT_1 var_466_arg_0 = var_200; [L1367] SORT_1 var_466_arg_1 = var_463; [L1368] SORT_1 var_466 = var_466_arg_0 | var_466_arg_1; [L1369] SORT_1 var_467_arg_0 = var_203; [L1370] SORT_1 var_467_arg_1 = var_466; [L1371] SORT_1 var_467 = var_467_arg_0 & var_467_arg_1; [L1372] SORT_1 var_468_arg_0 = var_465; [L1373] SORT_1 var_468_arg_1 = var_467; [L1374] SORT_1 var_468 = var_468_arg_0 | var_468_arg_1; [L1375] SORT_1 var_469_arg_0 = var_458; [L1376] SORT_1 var_469_arg_1 = ~var_468; [L1377] var_469_arg_1 = var_469_arg_1 & mask_SORT_1 [L1378] SORT_1 var_469 = var_469_arg_0 & var_469_arg_1; [L1379] SORT_1 var_470_arg_0 = var_203; [L1380] SORT_1 var_470_arg_1 = var_466; [L1381] SORT_1 var_470 = var_470_arg_0 | var_470_arg_1; [L1382] SORT_1 var_471_arg_0 = var_469; [L1383] SORT_1 var_471_arg_1 = var_470; [L1384] SORT_1 var_471 = var_471_arg_0 & var_471_arg_1; [L1385] SORT_1 var_472_arg_0 = var_418; [L1386] SORT_1 var_472_arg_1 = var_471; [L1387] SORT_1 var_472 = var_472_arg_0 & var_472_arg_1; [L1388] SORT_1 var_473_arg_0 = var_472; [L1389] SORT_1 var_473_arg_1 = ~state_55; [L1390] var_473_arg_1 = var_473_arg_1 & mask_SORT_1 [L1391] SORT_1 var_473 = var_473_arg_0 & var_473_arg_1; [L1392] SORT_1 next_474_arg_1 = ~var_473; [L1393] next_474_arg_1 = next_474_arg_1 & mask_SORT_1 [L1395] state_6 = next_79_arg_1 [L1396] state_8 = next_96_arg_1 [L1397] state_10 = next_97_arg_1 [L1398] state_12 = next_111_arg_1 [L1399] state_15 = next_119_arg_1 [L1400] state_17 = next_124_arg_1 [L1401] state_19 = next_128_arg_1 [L1402] state_21 = next_130_arg_1 [L1403] state_23 = next_136_arg_1 [L1404] state_25 = next_141_arg_1 [L1405] state_27 = next_146_arg_1 [L1406] state_29 = next_150_arg_1 [L1407] state_31 = next_157_arg_1 [L1408] state_33 = next_161_arg_1 [L1409] state_35 = next_165_arg_1 [L1410] state_37 = next_169_arg_1 [L1411] state_39 = next_174_arg_1 [L1412] state_41 = next_178_arg_1 [L1413] state_43 = next_182_arg_1 [L1414] state_45 = next_188_arg_1 [L1415] state_47 = next_193_arg_1 [L1416] state_49 = next_197_arg_1 [L1417] state_51 = next_201_arg_1 [L1418] state_53 = next_204_arg_1 [L1419] state_55 = next_474_arg_1 VAL [bad_68_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_16_arg_1=0, init_18_arg_1=0, init_20_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_28_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, init_44_arg_1=0, init_46_arg_1=0, init_48_arg_1=0, init_50_arg_1=0, init_52_arg_1=0, init_54_arg_1=0, init_56_arg_1=0, init_7_arg_1=0, init_9_arg_1=0, input_100=1, input_105=0, input_112=19, input_117=244, input_121=18, input_134=2, input_144=3, input_148=12, input_153=252, input_155=2, input_159=2, input_163=1, input_167=2, input_176=0, input_183=1, input_185=240, input_191=1, input_69=1, input_71=1, input_72=1, input_74=1, input_80=1, input_81=1, input_82=1, input_87=1, input_98=1, mask_SORT_1=1, mask_SORT_2=31, mask_SORT_3=65535, mask_SORT_4=4294967295, msb_SORT_1=1, msb_SORT_2=16, msb_SORT_3=32768, msb_SORT_4=2147483648, next_111_arg_1=3, next_119_arg_1=1, next_124_arg_1=243, next_128_arg_1=2, next_130_arg_1=0, next_136_arg_1=1, next_141_arg_1=1, next_146_arg_1=1, next_150_arg_1=1, next_157_arg_1=254, next_161_arg_1=1, next_165_arg_1=1, next_169_arg_1=0, next_174_arg_1=1, next_178_arg_1=1, next_182_arg_1=0, next_188_arg_1=0, next_193_arg_1=0, next_197_arg_1=1, next_201_arg_1=1, next_204_arg_1=1, next_474_arg_1=0, next_79_arg_1=1, next_96_arg_1=0, next_97_arg_1=0, state_10=0, state_12=3, state_15=1, state_17=243, state_19=2, state_21=0, state_23=1, state_25=1, state_27=1, state_29=1, state_31=254, state_33=1, state_35=1, state_37=0, state_39=1, state_41=1, state_43=0, state_45=0, state_47=0, state_49=1, state_51=1, state_53=1, state_55=0, state_6=1, state_8=0, var_101=0, var_101_arg_0=0, var_101_arg_1=0, var_102=0, var_102_arg_0=0, var_102_arg_1=16, var_103=1, var_103_arg_0=1, var_103_arg_1=0, var_104=1, var_104_arg_0=1, var_106=4294967295, var_106_arg_0=0, var_106_arg_1=1, var_107=65535, var_107_arg_0=4294967295, var_108=0, var_108_arg_0=0, var_108_arg_1=65535, var_108_arg_2=0, var_109=1, var_109_arg_0=1, var_109_arg_1=1, var_109_arg_2=0, var_110=3, var_110_arg_0=1, var_110_arg_1=3, var_110_arg_2=1, var_113=0, var_113_arg_0=0, var_113_arg_1=19, var_114=1, var_114_arg_0=0, var_114_arg_1=1, var_115=1, var_115_arg_0=1, var_115_arg_1=1, var_116=1, var_116_arg_0=1, var_116_arg_1=1, var_118=1, var_118_arg_0=1, var_118_arg_1=1, var_120=0, var_120_arg_0=0, var_120_arg_1=1, var_122=0, var_122_arg_0=0, var_122_arg_1=0, var_123=243, var_123_arg_0=0, var_123_arg_1=244, var_125=0, var_125_arg_0=0, var_125_arg_1=0, var_126=1, var_126_arg_0=0, var_126_arg_1=1, var_127=2, var_127_arg_0=1, var_127_arg_1=18, var_129=1, var_129_arg_0=1, var_129_arg_1=1, var_131=0, var_131_arg_0=0, var_131_arg_1=1, var_132=0, var_132_arg_0=0, var_132_arg_1=0, var_133=0, var_133_arg_0=0, var_133_arg_1=0, var_135=1, var_135_arg_0=0, var_135_arg_1=2, var_137=0, var_137_arg_0=0, var_137_arg_1=0, var_138=1, var_138_arg_0=0, var_138_arg_1=1, var_139=1, var_139_arg_0=1, var_139_arg_1=1, var_14=0, var_140=1, var_140_arg_0=1, var_140_arg_1=1, var_142=1, var_142_arg_0=0, var_142_arg_1=1, var_143=1, var_143_arg_0=1, var_143_arg_1=1, var_145=1, var_145_arg_0=1, var_145_arg_1=1, var_147=1, var_147_arg_0=0, var_147_arg_1=1, var_149=1, var_149_arg_0=1, var_149_arg_1=1, var_151=1, var_151_arg_0=0, var_151_arg_1=1, var_152=1, var_152_arg_0=1, var_152_arg_1=1, var_154=1, var_154_arg_0=1, var_154_arg_1=1, var_156=254, var_156_arg_0=1, var_156_arg_1=2, var_158=1, var_158_arg_0=0, var_158_arg_1=3, var_160=1, var_160_arg_0=1, var_160_arg_1=1, var_162=1, var_162_arg_0=0, var_162_arg_1=252, var_164=1, var_164_arg_0=1, var_164_arg_1=1, var_166=0, var_166_arg_0=0, var_166_arg_1=1, var_168=0, var_168_arg_0=0, var_168_arg_1=2, var_170=2, var_170_arg_0=0, var_170_arg_1=2, var_171=0, var_171_arg_0=2, var_171_arg_1=1, var_172=1, var_172_arg_0=0, var_172_arg_1=12, var_173=1, var_173_arg_0=1, var_173_arg_1=1, var_175=1, var_175_arg_0=0, var_175_arg_1=244, var_177=1, var_177_arg_0=1, var_177_arg_1=1, var_179=0, var_179_arg_0=0, var_179_arg_1=0, var_180=0, var_180_arg_0=0, var_180_arg_1=0, var_181=0, var_181_arg_0=0, var_181_arg_1=1, var_184=0, var_184_arg_0=0, var_184_arg_1=0, var_186=0, var_186_arg_0=0, var_186_arg_1=1, var_187=0, var_187_arg_0=0, var_187_arg_1=0, var_189=1, var_189_arg_0=0, var_189_arg_1=1, var_190=0, var_190_arg_0=1, var_190_arg_1=0, var_192=0, var_192_arg_0=0, var_192_arg_1=0, var_194=0, var_194_arg_0=0, var_194_arg_1=240, var_195=1, var_195_arg_0=0, var_195_arg_1=1, var_196=1, var_196_arg_0=1, var_196_arg_1=1, var_198=0, var_198_arg_0=0, var_198_arg_1=0, var_199=0, var_199_arg_0=0, var_199_arg_1=2, var_200=2, var_200_arg_0=0, var_200_arg_1=2, var_202=1, var_202_arg_0=0, var_202_arg_1=1, var_203=1, var_203_arg_0=1, var_203_arg_1=1, var_205=0, var_205_arg_0=0, var_205_arg_1=1, var_206=1, var_206_arg_0=1, var_206_arg_1=0, var_207=6200, var_208=1, var_208_arg_0=6200, var_208_arg_1=65537, var_209=0, var_209_arg_0=1, var_209_arg_1=0, var_210=0, var_210_arg_0=0, var_210_arg_1=0, var_211=1, var_211_arg_0=1, var_211_arg_1=0, var_212=1, var_212_arg_0=1, var_212_arg_1=1, var_213=0, var_213_arg_0=0, var_213_arg_1=0, var_214=0, var_214_arg_0=1, var_214_arg_1=0, var_215=0, var_215_arg_0=0, var_215_arg_1=0, var_216=0, var_216_arg_0=0, var_216_arg_1=0, var_217=0, var_217_arg_0=0, var_217_arg_1=1, var_218=0, var_218_arg_0=0, var_218_arg_1=0, var_219=0, var_219_arg_0=0, var_219_arg_1=0, var_220=0, var_220_arg_0=0, var_220_arg_1=0, var_221=1, var_221_arg_0=1, var_221_arg_1=0, var_222=0, var_222_arg_0=0, var_222_arg_1=1, var_223=999, var_224=0, var_224_arg_0=65537, var_224_arg_1=999, var_225=5999, var_226=1, var_226_arg_0=5999, var_226_arg_1=65537, var_227=0, var_227_arg_0=0, var_227_arg_1=0, var_228=0, var_228_arg_0=0, var_228_arg_1=0, var_229=0, var_229_arg_0=0, var_229_arg_1=0, var_230=0, var_230_arg_0=0, var_230_arg_1=0, var_231=1000, var_232=1, var_232_arg_0=1000, var_232_arg_1=65537, var_233=0, var_233_arg_0=0, var_233_arg_1=1, var_234=0, var_234_arg_0=0, var_234_arg_1=0, var_235=0, var_235_arg_0=0, var_235_arg_1=0, var_236=5800, var_237=0, var_237_arg_0=65537, var_237_arg_1=5800, var_238=0, var_238_arg_0=0, var_238_arg_1=1, var_239=0, var_239_arg_0=0, var_239_arg_1=0, var_240=0, var_240_arg_0=0, var_240_arg_1=0, var_241=1, var_241_arg_0=0, var_241_arg_1=0, var_242=0, var_242_arg_0=0, var_242_arg_1=0, var_243=0, var_243_arg_0=0, var_243_arg_1=0, var_244=0, var_244_arg_0=0, var_244_arg_1=0, var_245=5, var_246=0, var_246_arg_0=5, var_246_arg_1=0, var_247=0, var_247_arg_0=0, var_247_arg_1=0, var_248=1, var_248_arg_0=1, var_248_arg_1=0, var_249=0, var_249_arg_0=0, var_249_arg_1=1, var_250=1, var_250_arg_0=1, var_250_arg_1=1, var_251=0, var_251_arg_0=0, var_251_arg_1=1, var_252=1, var_252_arg_0=0, var_252_arg_1=0, var_253=0, var_253_arg_0=0, var_253_arg_1=1, var_254=1, var_254_arg_0=1, var_254_arg_1=0, var_255=0, var_255_arg_0=0, var_255_arg_1=1, var_256=0, var_256_arg_0=5, var_256_arg_1=0, var_257=0, var_257_arg_0=0, var_257_arg_1=0, var_258=1, var_258_arg_0=1, var_258_arg_1=0, var_259=0, var_259_arg_0=0, var_259_arg_1=1, var_260=1, var_260_arg_0=0, var_260_arg_1=1, var_261=0, var_261_arg_0=0, var_261_arg_1=1, var_262=0, var_262_arg_0=0, var_262_arg_1=0, var_263=0, var_263_arg_0=0, var_263_arg_1=0, var_264=1, var_264_arg_0=0, var_264_arg_1=1, var_265=0, var_265_arg_0=0, var_265_arg_1=1, var_266=1, var_266_arg_0=0, var_266_arg_1=1, var_267=0, var_267_arg_0=0, var_267_arg_1=1, var_268=0, var_268_arg_0=0, var_268_arg_1=0, var_269=0, var_269_arg_0=0, var_269_arg_1=0, var_270=0, var_270_arg_0=0, var_270_arg_1=0, var_271=0, var_271_arg_0=0, var_271_arg_1=0, var_272=0, var_272_arg_0=0, var_272_arg_1=0, var_273=0, var_273_arg_0=0, var_273_arg_1=0, var_274=0, var_274_arg_0=0, var_274_arg_1=0, var_275=0, var_275_arg_0=0, var_275_arg_1=0, var_276=0, var_276_arg_0=0, var_276_arg_1=0, var_277=0, var_277_arg_0=0, var_277_arg_1=1, var_278=0, var_278_arg_0=0, var_278_arg_1=0, var_279=0, var_279_arg_0=0, var_279_arg_1=0, var_280=0, var_280_arg_0=0, var_280_arg_1=0, var_281=1, var_281_arg_0=1, var_281_arg_1=0, var_282=0, var_282_arg_0=0, var_282_arg_1=1, var_283=0, var_283_arg_0=0, var_283_arg_1=0, var_284=1, var_284_arg_0=1, var_284_arg_1=0, var_285=0, var_285_arg_0=0, var_285_arg_1=1, var_286=0, var_286_arg_0=0, var_286_arg_1=0, var_287=1, var_287_arg_0=1, var_287_arg_1=0, var_288=0, var_288_arg_0=0, var_288_arg_1=1, var_289=17, var_289_arg_0=19, var_289_arg_1=1, var_290=1, var_290_arg_0=1, var_290_arg_1=17, var_291=1, var_291_arg_0=1, var_291_arg_1=1, var_292=3, var_292_arg_0=18, var_292_arg_1=1, var_293=3, var_293_arg_0=1, var_293_arg_1=3, var_294=39, var_294_arg_0=1, var_294_arg_1=3, var_295=242, var_295_arg_0=1, var_295_arg_1=39, var_296=0, var_296_arg_0=1, var_296_arg_1=242, var_297=0, var_297_arg_0=0, var_297_arg_1=0, var_298=1, var_298_arg_0=1, var_298_arg_1=0, var_299=1, var_299_arg_0=1, var_299_arg_1=1, var_300=1, var_300_arg_0=3, var_300_arg_1=1, var_301=2, var_301_arg_0=252, var_301_arg_1=1, var_302=22, var_302_arg_0=2, var_302_arg_1=2, var_303=35, var_303_arg_0=1, var_303_arg_1=22, var_304=1, var_304_arg_0=12, var_304_arg_1=35, var_305=1, var_305_arg_0=2, var_305_arg_1=1, var_306=1, var_306_arg_0=1, var_306_arg_1=1, var_307=248, var_307_arg_0=240, var_307_arg_1=1, var_308=0, var_308_arg_0=1, var_308_arg_1=248, var_309=1, var_309_arg_0=1, var_309_arg_1=0, var_310=1, var_310_arg_0=244, var_310_arg_1=1, var_311=1, var_311_arg_0=0, var_311_arg_1=1, var_312=0, var_312_arg_0=2, var_312_arg_1=1, var_313=0, var_313_arg_0=2, var_313_arg_1=0, var_314=0, var_314_arg_0=0, var_314_arg_1=0, var_315=1, var_315_arg_0=19, var_315_arg_1=1, var_316=1, var_316_arg_0=1, var_316_arg_1=17, var_317=1, var_317_arg_0=1, var_317_arg_1=1, var_318=1, var_318_arg_0=1, var_318_arg_1=1, var_319=1, var_319_arg_0=1, var_319_arg_1=1, var_320=0, var_320_arg_0=18, var_320_arg_1=1, var_321=1, var_321_arg_0=1, var_321_arg_1=0, var_322=1, var_322_arg_0=1, var_322_arg_1=3, var_323=1, var_323_arg_0=1, var_323_arg_1=1, var_324=1, var_324_arg_0=1, var_324_arg_1=3, var_325=1, var_325_arg_0=1, var_325_arg_1=1, var_326=1, var_326_arg_0=1, var_326_arg_1=39, var_327=1, var_327_arg_0=1, var_327_arg_1=1, var_328=0, var_328_arg_0=1, var_328_arg_1=242, var_329=1, var_329_arg_0=1, var_329_arg_1=0, var_330=0, var_330_arg_0=0, var_330_arg_1=0, var_331=1, var_331_arg_0=1, var_331_arg_1=0, var_332=0, var_332_arg_0=1, var_332_arg_1=0, var_333=1, var_333_arg_0=1, var_333_arg_1=0, var_334=1, var_334_arg_0=1, var_334_arg_1=1, var_335=1, var_335_arg_0=1, var_335_arg_1=1, var_336=1, var_336_arg_0=3, var_336_arg_1=1, var_337=1, var_337_arg_0=1, var_337_arg_1=1, var_338=0, var_338_arg_0=252, var_338_arg_1=1, var_339=1, var_339_arg_0=1, var_339_arg_1=0, var_340=4, var_340_arg_0=2, var_340_arg_1=2, var_341=0, var_341_arg_0=1, var_341_arg_1=4, var_342=0, var_342_arg_0=1, var_342_arg_1=22, var_343=0, var_343_arg_0=0, var_343_arg_1=0, var_344=11, var_344_arg_0=12, var_344_arg_1=35, var_345=255, var_345_arg_0=0, var_345_arg_1=11, var_346=0, var_346_arg_0=2, var_346_arg_1=1, var_347=255, var_347_arg_0=255, var_347_arg_1=0, var_348=1, var_348_arg_0=1, var_348_arg_1=1, var_349=255, var_349_arg_0=255, var_349_arg_1=1, var_350=0, var_350_arg_0=240, var_350_arg_1=1, var_351=255, var_351_arg_0=255, var_351_arg_1=0, var_352=0, var_352_arg_0=1, var_352_arg_1=248, var_353=2, var_353_arg_0=255, var_353_arg_1=0, var_354=0, var_354_arg_0=1, var_354_arg_1=0, var_355=2, var_355_arg_0=2, var_355_arg_1=0, var_356=0, var_356_arg_0=244, var_356_arg_1=1, var_357=2, var_357_arg_0=2, var_357_arg_1=0, var_358=0, var_358_arg_0=0, var_358_arg_1=1, var_359=9, var_359_arg_0=2, var_359_arg_1=0, var_360=0, var_360_arg_0=2, var_360_arg_1=1, var_361=1, var_361_arg_0=9, var_361_arg_1=0, var_362=0, var_362_arg_0=2, var_362_arg_1=0, var_363=1, var_363_arg_0=1, var_363_arg_1=0, var_364=0, var_364_arg_0=0, var_364_arg_1=0, var_365=0, var_365_arg_0=0, var_365_arg_1=0, var_366=0, var_366_arg_0=0, var_366_arg_1=0, var_367=0, var_367_arg_0=0, var_367_arg_1=0, var_368=0, var_368_arg_0=0, var_368_arg_1=0, var_369=0, var_369_arg_0=0, var_369_arg_1=0, var_370=0, var_370_arg_0=1, var_370_arg_1=0, var_371=0, var_371_arg_0=0, var_371_arg_1=0, var_372=0, var_372_arg_0=0, var_372_arg_1=0, var_373=0, var_373_arg_0=0, var_373_arg_1=0, var_374=0, var_374_arg_0=0, var_374_arg_1=0, var_375=0, var_375_arg_0=0, var_375_arg_1=0, var_376=0, var_376_arg_0=0, var_376_arg_1=0, var_377=0, var_377_arg_0=0, var_377_arg_1=0, var_378=0, var_378_arg_0=0, var_378_arg_1=0, var_379=0, var_379_arg_0=0, var_379_arg_1=0, var_380=0, var_380_arg_0=0, var_380_arg_1=0, var_381=0, var_381_arg_0=0, var_381_arg_1=0, var_382=0, var_382_arg_0=0, var_382_arg_1=0, var_383=0, var_383_arg_0=0, var_383_arg_1=0, var_384=0, var_384_arg_0=0, var_384_arg_1=0, var_385=0, var_385_arg_0=0, var_385_arg_1=0, var_386=0, var_386_arg_0=0, var_386_arg_1=0, var_387=0, var_387_arg_0=0, var_387_arg_1=0, var_388=0, var_388_arg_0=0, var_388_arg_1=0, var_389=0, var_389_arg_0=0, var_389_arg_1=0, var_390=0, var_390_arg_0=0, var_390_arg_1=0, var_391=0, var_391_arg_0=0, var_391_arg_1=0, var_392=0, var_392_arg_0=0, var_392_arg_1=0, var_393=0, var_393_arg_0=0, var_393_arg_1=0, var_394=0, var_394_arg_0=0, var_394_arg_1=0, var_395=0, var_395_arg_0=0, var_395_arg_1=0, var_396=0, var_396_arg_0=0, var_396_arg_1=0, var_397=0, var_397_arg_0=0, var_397_arg_1=0, var_398=0, var_398_arg_0=0, var_398_arg_1=0, var_399=0, var_399_arg_0=0, var_399_arg_1=0, var_400=0, var_400_arg_0=0, var_400_arg_1=0, var_401=0, var_401_arg_0=0, var_401_arg_1=0, var_402=0, var_402_arg_0=0, var_402_arg_1=1, var_403=0, var_403_arg_0=0, var_403_arg_1=0, var_404=0, var_404_arg_0=0, var_404_arg_1=0, var_405=0, var_405_arg_0=0, var_405_arg_1=0, var_406=0, var_406_arg_0=0, var_406_arg_1=0, var_407=0, var_407_arg_0=0, var_407_arg_1=0, var_408=0, var_408_arg_0=0, var_408_arg_1=0, var_409=0, var_409_arg_0=0, var_409_arg_1=0, var_410=0, var_410_arg_0=1, var_410_arg_1=0, var_411=0, var_411_arg_0=0, var_411_arg_1=0, var_412=1, var_412_arg_0=1, var_412_arg_1=0, var_413=0, var_413_arg_0=0, var_413_arg_1=1, var_414=0, var_414_arg_0=0, var_414_arg_1=0, var_415=0, var_415_arg_0=0, var_415_arg_1=1, var_416=1, var_416_arg_0=0, var_416_arg_1=1, var_417=0, var_417_arg_0=0, var_417_arg_1=1, var_418=0, var_418_arg_0=0, var_418_arg_1=0, var_419=1, var_419_arg_0=1, var_419_arg_1=243, var_420=1, var_420_arg_0=1, var_420_arg_1=243, var_421=0, var_421_arg_0=2, var_421_arg_1=1, var_422=1, var_422_arg_0=1, var_422_arg_1=0, var_423=10, var_423_arg_0=2, var_423_arg_1=1, var_424=0, var_424_arg_0=1, var_424_arg_1=10, var_425=1, var_425_arg_0=1, var_425_arg_1=0, var_426=0, var_426_arg_0=1, var_426_arg_1=10, var_427=0, var_427_arg_0=1, var_427_arg_1=0, var_428=1, var_428_arg_0=1, var_428_arg_1=1, var_429=1, var_429_arg_0=1, var_429_arg_1=1, var_430=1, var_430_arg_0=1, var_430_arg_1=1, var_431=1, var_431_arg_0=1, var_431_arg_1=1, var_432=1, var_432_arg_0=1, var_432_arg_1=1, var_433=1, var_433_arg_0=1, var_433_arg_1=1, var_434=1, var_434_arg_0=1, var_434_arg_1=1, var_435=1, var_435_arg_0=1, var_435_arg_1=1, var_436=0, var_436_arg_0=254, var_436_arg_1=1, var_437=1, var_437_arg_0=1, var_437_arg_1=0, var_438=37, var_438_arg_0=254, var_438_arg_1=1, var_439=1, var_439_arg_0=1, var_439_arg_1=37, var_440=1, var_440_arg_0=1, var_440_arg_1=1, var_441=8, var_441_arg_0=1, var_441_arg_1=37, var_442=0, var_442_arg_0=1, var_442_arg_1=8, var_443=1, var_443_arg_0=1, var_443_arg_1=0, var_444=251, var_444_arg_0=1, var_444_arg_1=8, var_445=0, var_445_arg_0=0, var_445_arg_1=251, var_446=1, var_446_arg_0=1, var_446_arg_1=0, var_447=246, var_447_arg_0=0, var_447_arg_1=251, var_448=0, var_448_arg_0=1, var_448_arg_1=246, var_449=1, var_449_arg_0=1, var_449_arg_1=0, var_450=0, var_450_arg_0=1, var_450_arg_1=246, var_451=0, var_451_arg_0=1, var_451_arg_1=0, var_452=1, var_452_arg_0=1, var_452_arg_1=0, var_453=1, var_453_arg_0=1, var_453_arg_1=0, var_454=0, var_454_arg_0=0, var_454_arg_1=1, var_455=1, var_455_arg_0=1, var_455_arg_1=0, var_456=0, var_456_arg_0=0, var_456_arg_1=1, var_457=1, var_457_arg_0=0, var_457_arg_1=1, var_458=0, var_458_arg_0=0, var_458_arg_1=1, var_459=0, var_459_arg_0=0, var_459_arg_1=0, var_460=0, var_460_arg_0=0, var_460_arg_1=0, var_461=0, var_461_arg_0=1, var_461_arg_1=0, var_462=0, var_462_arg_0=0, var_462_arg_1=0, var_463=1, var_463_arg_0=1, var_463_arg_1=0, var_464=0, var_464_arg_0=2, var_464_arg_1=1, var_465=0, var_465_arg_0=0, var_465_arg_1=0, var_466=0, var_466_arg_0=2, var_466_arg_1=1, var_467=0, var_467_arg_0=1, var_467_arg_1=0, var_468=0, var_468_arg_0=0, var_468_arg_1=0, var_469=0, var_469_arg_0=0, var_469_arg_1=0, var_470=1, var_470_arg_0=1, var_470_arg_1=0, var_471=0, var_471_arg_0=0, var_471_arg_1=1, var_472=0, var_472_arg_0=0, var_472_arg_1=0, var_473=0, var_473_arg_0=0, var_473_arg_1=1, var_5=0, var_57=1, var_58=0, var_59=0, var_59_arg_0=0, var_59_arg_1=0, var_60=16, var_61=1, var_61_arg_0=0, var_61_arg_1=16, var_62=1, var_62_arg_0=1, var_62_arg_1=1, var_63=0, var_64=0, var_64_arg_0=0, var_64_arg_1=1, var_64_arg_2=0, var_65=0, var_65_arg_0=1, var_65_arg_1=0, var_66=0, var_66_arg_0=1, var_66_arg_1=0, var_67=0, var_67_arg_0=1, var_67_arg_1=0, var_70=1, var_73=0, var_75=1, var_75_arg_0=1, var_75_arg_1=1, var_75_arg_2=0, var_76=0, var_76_arg_0=1, var_76_arg_1=0, var_76_arg_2=1, var_77=1, var_77_arg_0=1, var_77_arg_1=1, var_77_arg_2=0, var_78=1, var_78_arg_0=1, var_78_arg_1=1, var_78_arg_2=1, var_83=0, var_83_arg_0=0, var_83_arg_1=0, var_84=65537, var_84_arg_0=0, var_84_arg_1=16, var_85=65536, var_85_arg_0=65537, var_85_arg_1=1, var_86=0, var_86_arg_0=65536, var_88=65538, var_88_arg_0=1, var_88_arg_1=65537, var_89=2, var_89_arg_0=65538, var_90=2, var_90_arg_0=1, var_90_arg_1=2, var_90_arg_2=0, var_91=0, var_91_arg_0=1, var_91_arg_1=0, var_91_arg_2=2, var_92=0, var_92_arg_0=1, var_92_arg_1=0, var_92_arg_2=0, var_93=0, var_93_arg_0=1, var_93_arg_1=0, var_93_arg_2=0, var_94=0, var_94_arg_0=1, var_94_arg_1=0, var_94_arg_2=0, var_95=0, var_95_arg_0=1, var_95_arg_1=0, var_95_arg_2=0, var_99=3] [L158] input_69 = __VERIFIER_nondet_uchar() [L159] input_69 = input_69 & mask_SORT_1 [L160] input_71 = __VERIFIER_nondet_uchar() [L161] input_71 = input_71 & mask_SORT_1 [L162] input_72 = __VERIFIER_nondet_uchar() [L163] input_72 = input_72 & mask_SORT_1 [L164] input_74 = __VERIFIER_nondet_uchar() [L165] input_74 = input_74 & mask_SORT_1 [L166] input_80 = __VERIFIER_nondet_uchar() [L167] input_80 = input_80 & mask_SORT_1 [L168] input_81 = __VERIFIER_nondet_uchar() [L169] input_81 = input_81 & mask_SORT_1 [L170] input_82 = __VERIFIER_nondet_uchar() [L171] input_82 = input_82 & mask_SORT_1 [L172] input_87 = __VERIFIER_nondet_uchar() [L173] input_87 = input_87 & mask_SORT_1 [L174] input_98 = __VERIFIER_nondet_uchar() [L175] input_98 = input_98 & mask_SORT_1 [L176] input_100 = __VERIFIER_nondet_uchar() [L177] input_100 = input_100 & mask_SORT_1 [L178] input_105 = __VERIFIER_nondet_uchar() [L179] input_105 = input_105 & mask_SORT_1 [L180] input_112 = __VERIFIER_nondet_uchar() [L181] input_117 = __VERIFIER_nondet_uchar() [L182] input_121 = __VERIFIER_nondet_uchar() [L183] input_134 = __VERIFIER_nondet_uchar() [L184] input_144 = __VERIFIER_nondet_uchar() [L185] input_148 = __VERIFIER_nondet_uchar() [L186] input_153 = __VERIFIER_nondet_uchar() [L187] input_155 = __VERIFIER_nondet_uchar() [L188] input_159 = __VERIFIER_nondet_uchar() [L189] input_163 = __VERIFIER_nondet_uchar() [L190] input_167 = __VERIFIER_nondet_uchar() [L191] input_176 = __VERIFIER_nondet_uchar() [L192] input_183 = __VERIFIER_nondet_uchar() [L193] input_185 = __VERIFIER_nondet_uchar() [L194] input_191 = __VERIFIER_nondet_uchar() [L197] SORT_3 var_59_arg_0 = state_6; [L198] SORT_3 var_59_arg_1 = var_58; [L199] SORT_4 var_59 = ((SORT_4)var_59_arg_0 << 16) | var_59_arg_1; [L200] SORT_4 var_61_arg_0 = var_59; [L201] EXPR (var_61_arg_0 & msb_SORT_4) ? (var_61_arg_0 | ~mask_SORT_4) : (var_61_arg_0 & mask_SORT_4) [L201] var_61_arg_0 = (var_61_arg_0 & msb_SORT_4) ? (var_61_arg_0 | ~mask_SORT_4) : (var_61_arg_0 & mask_SORT_4) [L202] SORT_4 var_61_arg_1 = var_60; [L203] SORT_4 var_61 = (int)var_61_arg_0 >> var_61_arg_1; [L204] EXPR (var_61_arg_0 & msb_SORT_4) ? (var_61 | ~(mask_SORT_4 >> var_61_arg_1)) : var_61 [L204] var_61 = (var_61_arg_0 & msb_SORT_4) ? (var_61 | ~(mask_SORT_4 >> var_61_arg_1)) : var_61 [L205] var_61 = var_61 & mask_SORT_4 [L206] SORT_4 var_62_arg_0 = var_57; [L207] SORT_4 var_62_arg_1 = var_61; [L208] SORT_1 var_62 = var_62_arg_0 == var_62_arg_1; [L209] SORT_1 var_64_arg_0 = state_15; [L210] SORT_4 var_64_arg_1 = var_57; [L211] SORT_4 var_64_arg_2 = var_63; [L212] EXPR var_64_arg_0 ? var_64_arg_1 : var_64_arg_2 [L212] SORT_4 var_64 = var_64_arg_0 ? var_64_arg_1 : var_64_arg_2; [L213] var_64 = var_64 & mask_SORT_4 [L214] SORT_4 var_65_arg_0 = var_57; [L215] SORT_4 var_65_arg_1 = var_64; [L216] SORT_1 var_65 = var_65_arg_0 == var_65_arg_1; [L217] SORT_1 var_66_arg_0 = ~var_62; [L218] var_66_arg_0 = var_66_arg_0 & mask_SORT_1 [L219] SORT_1 var_66_arg_1 = var_65; [L220] SORT_1 var_66 = var_66_arg_0 & var_66_arg_1; [L221] SORT_1 var_67_arg_0 = ~state_55; [L222] var_67_arg_0 = var_67_arg_0 & mask_SORT_1 [L223] SORT_1 var_67_arg_1 = var_66; [L224] SORT_1 var_67 = var_67_arg_0 & var_67_arg_1; [L225] var_67 = var_67 & mask_SORT_1 [L226] SORT_1 bad_68_arg_0 = var_67; [L227] CALL __VERIFIER_assert(!(bad_68_arg_0)) [L20] COND TRUE !(cond) VAL [\old(cond)=0, cond=0] [L20] reach_error() VAL [\old(cond)=0, cond=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 7 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 228.0s, OverallIterations: 2, TraceHistogramMax: 2, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 2.6s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 1 mSolverCounterUnknown, 3 SdHoareTripleChecker+Valid, 2.5s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 3 mSDsluCounter, 6 SdHoareTripleChecker+Invalid, 2.4s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 5 mSDsCounter, 1 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 7 IncrementalHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 1 mSolverCounterUnsat, 2 mSDtfsCounter, 7 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=8occurred in iteration=1, InterpolantAutomatonStates: 5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 1 MinimizatonAttempts, 1 StatesRemovedByMinimization, 1 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 121.0s SatisfiabilityAnalysisTime, 3.7s InterpolantComputationTime, 11 NumberOfCodeBlocks, 11 NumberOfCodeBlocksAsserted, 2 NumberOfCheckSat, 3 ConstructedInterpolants, 0 QuantifiedInterpolants, 24 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 1 InterpolantComputations, 1 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2022-11-03 02:01:16,630 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.resistance.1.prop1-func-interl.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 5f70da2e50a3ed8a99bab61db3775414c1460add675af1a2dc662b0da6abf1d0 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-5e519f3 [2022-11-03 02:01:19,170 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-03 02:01:19,172 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-03 02:01:19,204 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-03 02:01:19,206 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-03 02:01:19,208 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-03 02:01:19,210 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-03 02:01:19,216 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-03 02:01:19,220 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-03 02:01:19,222 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-03 02:01:19,224 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-03 02:01:19,228 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-03 02:01:19,229 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-03 02:01:19,231 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-03 02:01:19,233 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-03 02:01:19,234 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-03 02:01:19,235 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-03 02:01:19,236 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-03 02:01:19,238 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-03 02:01:19,240 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-03 02:01:19,242 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-03 02:01:19,244 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-03 02:01:19,246 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-03 02:01:19,247 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-03 02:01:19,251 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-03 02:01:19,252 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-03 02:01:19,252 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-03 02:01:19,254 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-03 02:01:19,254 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-03 02:01:19,256 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-03 02:01:19,256 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-03 02:01:19,257 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-03 02:01:19,258 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-03 02:01:19,259 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-03 02:01:19,261 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-03 02:01:19,261 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-03 02:01:19,262 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-03 02:01:19,263 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-03 02:01:19,263 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-03 02:01:19,264 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-03 02:01:19,265 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-03 02:01:19,266 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Bitvector.epf [2022-11-03 02:01:19,292 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-03 02:01:19,293 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-03 02:01:19,293 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-03 02:01:19,294 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-03 02:01:19,294 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-03 02:01:19,295 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-03 02:01:19,295 INFO L138 SettingsManager]: * User list type=DISABLED [2022-11-03 02:01:19,296 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-11-03 02:01:19,296 INFO L138 SettingsManager]: * Explicit value domain=true [2022-11-03 02:01:19,296 INFO L138 SettingsManager]: * Octagon Domain=false [2022-11-03 02:01:19,297 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-11-03 02:01:19,297 INFO L138 SettingsManager]: * Interval Domain=false [2022-11-03 02:01:19,298 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-03 02:01:19,299 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-03 02:01:19,299 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-03 02:01:19,300 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-03 02:01:19,300 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-03 02:01:19,300 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-11-03 02:01:19,301 INFO L138 SettingsManager]: * Use bitvectors instead of ints=true [2022-11-03 02:01:19,301 INFO L138 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2022-11-03 02:01:19,301 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-03 02:01:19,302 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-03 02:01:19,302 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-03 02:01:19,302 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-03 02:01:19,303 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-03 02:01:19,303 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-03 02:01:19,303 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 02:01:19,304 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-03 02:01:19,304 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-03 02:01:19,304 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-03 02:01:19,305 INFO L138 SettingsManager]: * Trace refinement strategy=WALRUS [2022-11-03 02:01:19,305 INFO L138 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2022-11-03 02:01:19,305 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-03 02:01:19,306 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-11-03 02:01:19,306 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-11-03 02:01:19,306 INFO L138 SettingsManager]: * Logic for external solver=AUFBV WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 5f70da2e50a3ed8a99bab61db3775414c1460add675af1a2dc662b0da6abf1d0 [2022-11-03 02:01:19,684 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-03 02:01:19,719 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-03 02:01:19,722 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-03 02:01:19,724 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-03 02:01:19,726 INFO L275 PluginConnector]: CDTParser initialized [2022-11-03 02:01:19,733 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.resistance.1.prop1-func-interl.c [2022-11-03 02:01:19,817 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/data/e95919404/d2ab2e96d4134e0ea4f7203aa1625ce6/FLAG117f88111 [2022-11-03 02:01:20,608 INFO L306 CDTParser]: Found 1 translation units. [2022-11-03 02:01:20,609 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.resistance.1.prop1-func-interl.c [2022-11-03 02:01:20,622 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/data/e95919404/d2ab2e96d4134e0ea4f7203aa1625ce6/FLAG117f88111 [2022-11-03 02:01:20,788 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/data/e95919404/d2ab2e96d4134e0ea4f7203aa1625ce6 [2022-11-03 02:01:20,790 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-03 02:01:20,792 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-03 02:01:20,794 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-03 02:01:20,794 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-03 02:01:20,803 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-03 02:01:20,804 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 02:01:20" (1/1) ... [2022-11-03 02:01:20,805 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@732640c7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:01:20, skipping insertion in model container [2022-11-03 02:01:20,805 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 02:01:20" (1/1) ... [2022-11-03 02:01:20,816 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-03 02:01:20,913 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-03 02:01:21,110 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.resistance.1.prop1-func-interl.c[1014,1027] [2022-11-03 02:01:21,548 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 02:01:21,561 INFO L203 MainTranslator]: Completed pre-run [2022-11-03 02:01:21,572 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.resistance.1.prop1-func-interl.c[1014,1027] [2022-11-03 02:01:21,674 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 02:01:21,704 INFO L208 MainTranslator]: Completed translation [2022-11-03 02:01:21,705 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:01:21 WrapperNode [2022-11-03 02:01:21,705 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-03 02:01:21,707 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-03 02:01:21,707 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-03 02:01:21,707 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-03 02:01:21,715 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:01:21" (1/1) ... [2022-11-03 02:01:21,746 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:01:21" (1/1) ... [2022-11-03 02:01:21,826 INFO L138 Inliner]: procedures = 11, calls = 3, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1526 [2022-11-03 02:01:21,827 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-03 02:01:21,827 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-03 02:01:21,828 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-03 02:01:21,828 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-03 02:01:21,840 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:01:21" (1/1) ... [2022-11-03 02:01:21,840 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:01:21" (1/1) ... [2022-11-03 02:01:21,853 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:01:21" (1/1) ... [2022-11-03 02:01:21,853 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:01:21" (1/1) ... [2022-11-03 02:01:21,902 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:01:21" (1/1) ... [2022-11-03 02:01:21,910 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:01:21" (1/1) ... [2022-11-03 02:01:21,932 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:01:21" (1/1) ... [2022-11-03 02:01:21,939 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:01:21" (1/1) ... [2022-11-03 02:01:21,953 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-03 02:01:21,966 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-03 02:01:21,974 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-03 02:01:21,974 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-03 02:01:21,975 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:01:21" (1/1) ... [2022-11-03 02:01:21,985 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 02:01:22,025 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:01:22,044 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-03 02:01:22,082 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-03 02:01:22,107 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-03 02:01:22,107 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-03 02:01:22,553 INFO L235 CfgBuilder]: Building ICFG [2022-11-03 02:01:22,555 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-03 02:01:24,995 INFO L276 CfgBuilder]: Performing block encoding [2022-11-03 02:01:25,004 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-03 02:01:25,004 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-03 02:01:25,008 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 02:01:25 BoogieIcfgContainer [2022-11-03 02:01:25,008 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-03 02:01:25,014 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-03 02:01:25,014 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-03 02:01:25,018 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-03 02:01:25,019 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 03.11 02:01:20" (1/3) ... [2022-11-03 02:01:25,020 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@44a51fb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 02:01:25, skipping insertion in model container [2022-11-03 02:01:25,020 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:01:21" (2/3) ... [2022-11-03 02:01:25,021 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@44a51fb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 02:01:25, skipping insertion in model container [2022-11-03 02:01:25,022 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 02:01:25" (3/3) ... [2022-11-03 02:01:25,023 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.resistance.1.prop1-func-interl.c [2022-11-03 02:01:25,051 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-03 02:01:25,052 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-03 02:01:25,133 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-03 02:01:25,143 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@6e280c16, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-03 02:01:25,143 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-03 02:01:25,148 INFO L276 IsEmpty]: Start isEmpty. Operand has 51 states, 49 states have (on average 1.489795918367347) internal successors, (73), 50 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:01:25,156 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-11-03 02:01:25,156 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:01:25,157 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:01:25,158 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:01:25,166 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:01:25,166 INFO L85 PathProgramCache]: Analyzing trace with hash -1473645707, now seen corresponding path program 1 times [2022-11-03 02:01:25,184 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:01:25,184 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1718021295] [2022-11-03 02:01:25,185 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:01:25,185 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:01:25,185 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:01:25,190 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:01:25,229 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (2)] Waiting until timeout for monitored process [2022-11-03 02:01:25,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:01:25,664 INFO L263 TraceCheckSpWp]: Trace formula consists of 137 conjuncts, 8 conjunts are in the unsatisfiable core [2022-11-03 02:01:25,675 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:01:25,792 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:01:25,792 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:01:25,793 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:01:25,793 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1718021295] [2022-11-03 02:01:25,794 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1718021295] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:01:25,795 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:01:25,795 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-03 02:01:25,797 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [613126598] [2022-11-03 02:01:25,798 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:01:25,803 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 02:01:25,804 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:01:25,848 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 02:01:25,850 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 02:01:25,853 INFO L87 Difference]: Start difference. First operand has 51 states, 49 states have (on average 1.489795918367347) internal successors, (73), 50 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:01:26,184 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:01:26,184 INFO L93 Difference]: Finished difference Result 98 states and 146 transitions. [2022-11-03 02:01:26,188 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-03 02:01:26,189 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 11 [2022-11-03 02:01:26,190 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:01:26,205 INFO L225 Difference]: With dead ends: 98 [2022-11-03 02:01:26,206 INFO L226 Difference]: Without dead ends: 49 [2022-11-03 02:01:26,209 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-03 02:01:26,213 INFO L413 NwaCegarLoop]: 65 mSDtfsCounter, 1 mSDsluCounter, 103 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1 SdHoareTripleChecker+Valid, 168 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 15 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-03 02:01:26,217 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1 Valid, 168 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 15 Invalid, 0 Unknown, 15 Unchecked, 0.3s Time] [2022-11-03 02:01:26,236 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2022-11-03 02:01:26,259 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 49. [2022-11-03 02:01:26,261 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 49 states, 48 states have (on average 1.4375) internal successors, (69), 48 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:01:26,265 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 69 transitions. [2022-11-03 02:01:26,266 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 69 transitions. Word has length 11 [2022-11-03 02:01:26,267 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:01:26,268 INFO L495 AbstractCegarLoop]: Abstraction has 49 states and 69 transitions. [2022-11-03 02:01:26,268 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:01:26,268 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 69 transitions. [2022-11-03 02:01:26,270 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-11-03 02:01:26,270 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:01:26,271 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:01:26,291 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (2)] Forceful destruction successful, exit code 0 [2022-11-03 02:01:26,485 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:01:26,485 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:01:26,485 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:01:26,486 INFO L85 PathProgramCache]: Analyzing trace with hash 2011974963, now seen corresponding path program 1 times [2022-11-03 02:01:26,486 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:01:26,486 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1188572973] [2022-11-03 02:01:26,487 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:01:26,487 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:01:26,487 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:01:26,489 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:01:26,531 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (3)] Waiting until timeout for monitored process [2022-11-03 02:01:26,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:01:26,915 INFO L263 TraceCheckSpWp]: Trace formula consists of 137 conjuncts, 10 conjunts are in the unsatisfiable core [2022-11-03 02:01:26,922 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:01:27,046 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:01:27,046 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:01:27,046 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:01:27,047 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1188572973] [2022-11-03 02:01:27,047 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1188572973] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:01:27,047 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:01:27,048 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-03 02:01:27,048 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [12704312] [2022-11-03 02:01:27,048 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:01:27,049 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-03 02:01:27,050 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:01:27,050 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-03 02:01:27,051 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-03 02:01:27,051 INFO L87 Difference]: Start difference. First operand 49 states and 69 transitions. Second operand has 5 states, 5 states have (on average 2.2) internal successors, (11), 5 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:01:27,320 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:01:27,320 INFO L93 Difference]: Finished difference Result 96 states and 137 transitions. [2022-11-03 02:01:27,321 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-03 02:01:27,321 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.2) internal successors, (11), 5 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 11 [2022-11-03 02:01:27,322 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:01:27,323 INFO L225 Difference]: With dead ends: 96 [2022-11-03 02:01:27,323 INFO L226 Difference]: Without dead ends: 51 [2022-11-03 02:01:27,323 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 6 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2022-11-03 02:01:27,325 INFO L413 NwaCegarLoop]: 63 mSDtfsCounter, 1 mSDsluCounter, 155 mSDsCounter, 0 mSdLazyCounter, 14 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1 SdHoareTripleChecker+Valid, 218 SdHoareTripleChecker+Invalid, 41 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 14 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 27 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-03 02:01:27,325 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1 Valid, 218 Invalid, 41 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 14 Invalid, 0 Unknown, 27 Unchecked, 0.2s Time] [2022-11-03 02:01:27,327 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2022-11-03 02:01:27,332 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2022-11-03 02:01:27,332 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 51 states, 50 states have (on average 1.42) internal successors, (71), 50 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:01:27,334 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 71 transitions. [2022-11-03 02:01:27,334 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 71 transitions. Word has length 11 [2022-11-03 02:01:27,334 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:01:27,335 INFO L495 AbstractCegarLoop]: Abstraction has 51 states and 71 transitions. [2022-11-03 02:01:27,335 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 2.2) internal successors, (11), 5 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:01:27,335 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 71 transitions. [2022-11-03 02:01:27,336 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-11-03 02:01:27,336 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:01:27,336 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:01:27,358 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (3)] Forceful destruction successful, exit code 0 [2022-11-03 02:01:27,558 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:01:27,559 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:01:27,566 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:01:27,566 INFO L85 PathProgramCache]: Analyzing trace with hash 2069233265, now seen corresponding path program 1 times [2022-11-03 02:01:27,572 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:01:27,573 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [69771556] [2022-11-03 02:01:27,573 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:01:27,573 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:01:27,573 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:01:27,575 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:01:27,602 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (4)] Waiting until timeout for monitored process [2022-11-03 02:01:27,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:01:27,977 INFO L263 TraceCheckSpWp]: Trace formula consists of 137 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-03 02:01:27,982 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:01:28,033 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:01:28,034 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:01:28,035 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:01:28,035 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [69771556] [2022-11-03 02:01:28,035 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [69771556] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:01:28,036 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:01:28,041 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-03 02:01:28,041 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1857969471] [2022-11-03 02:01:28,041 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:01:28,042 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 02:01:28,042 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:01:28,043 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 02:01:28,043 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 02:01:28,044 INFO L87 Difference]: Start difference. First operand 51 states and 71 transitions. Second operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:01:28,294 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:01:28,300 INFO L93 Difference]: Finished difference Result 181 states and 258 transitions. [2022-11-03 02:01:28,300 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-03 02:01:28,301 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 11 [2022-11-03 02:01:28,301 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:01:28,302 INFO L225 Difference]: With dead ends: 181 [2022-11-03 02:01:28,303 INFO L226 Difference]: Without dead ends: 136 [2022-11-03 02:01:28,303 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-03 02:01:28,305 INFO L413 NwaCegarLoop]: 69 mSDtfsCounter, 175 mSDsluCounter, 182 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 175 SdHoareTripleChecker+Valid, 251 SdHoareTripleChecker+Invalid, 10 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-03 02:01:28,305 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [175 Valid, 251 Invalid, 10 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-03 02:01:28,307 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2022-11-03 02:01:28,312 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 53. [2022-11-03 02:01:28,313 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 53 states, 52 states have (on average 1.4038461538461537) internal successors, (73), 52 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:01:28,314 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 73 transitions. [2022-11-03 02:01:28,314 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 73 transitions. Word has length 11 [2022-11-03 02:01:28,314 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:01:28,315 INFO L495 AbstractCegarLoop]: Abstraction has 53 states and 73 transitions. [2022-11-03 02:01:28,315 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:01:28,315 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 73 transitions. [2022-11-03 02:01:28,316 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-11-03 02:01:28,316 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:01:28,316 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:01:28,337 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (4)] Forceful destruction successful, exit code 0 [2022-11-03 02:01:28,537 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:01:28,538 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:01:28,538 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:01:28,539 INFO L85 PathProgramCache]: Analyzing trace with hash 2069292847, now seen corresponding path program 1 times [2022-11-03 02:01:28,539 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:01:28,539 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1111946138] [2022-11-03 02:01:28,540 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:01:28,540 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:01:28,540 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:01:28,541 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:01:28,582 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (5)] Waiting until timeout for monitored process [2022-11-03 02:01:28,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:01:28,913 INFO L263 TraceCheckSpWp]: Trace formula consists of 137 conjuncts, 17 conjunts are in the unsatisfiable core [2022-11-03 02:01:28,918 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:01:29,117 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:01:29,117 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:01:29,117 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:01:29,118 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1111946138] [2022-11-03 02:01:29,118 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1111946138] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:01:29,118 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:01:29,119 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-11-03 02:01:29,119 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [470766110] [2022-11-03 02:01:29,119 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:01:29,120 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-03 02:01:29,120 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:01:29,121 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-03 02:01:29,121 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-11-03 02:01:29,121 INFO L87 Difference]: Start difference. First operand 53 states and 73 transitions. Second operand has 6 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 6 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:01:29,610 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:01:29,610 INFO L93 Difference]: Finished difference Result 100 states and 140 transitions. [2022-11-03 02:01:29,611 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-03 02:01:29,611 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 6 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 11 [2022-11-03 02:01:29,611 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:01:29,612 INFO L225 Difference]: With dead ends: 100 [2022-11-03 02:01:29,612 INFO L226 Difference]: Without dead ends: 98 [2022-11-03 02:01:29,613 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=34, Invalid=56, Unknown=0, NotChecked=0, Total=90 [2022-11-03 02:01:29,614 INFO L413 NwaCegarLoop]: 62 mSDtfsCounter, 302 mSDsluCounter, 126 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 302 SdHoareTripleChecker+Valid, 188 SdHoareTripleChecker+Invalid, 44 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-11-03 02:01:29,615 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [302 Valid, 188 Invalid, 44 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-11-03 02:01:29,616 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2022-11-03 02:01:29,622 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 55. [2022-11-03 02:01:29,623 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 55 states, 54 states have (on average 1.3888888888888888) internal successors, (75), 54 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:01:29,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 75 transitions. [2022-11-03 02:01:29,624 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 75 transitions. Word has length 11 [2022-11-03 02:01:29,624 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:01:29,624 INFO L495 AbstractCegarLoop]: Abstraction has 55 states and 75 transitions. [2022-11-03 02:01:29,625 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 6 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:01:29,625 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 75 transitions. [2022-11-03 02:01:29,626 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2022-11-03 02:01:29,627 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:01:29,627 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:01:29,648 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (5)] Forceful destruction successful, exit code 0 [2022-11-03 02:01:29,840 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:01:29,840 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:01:29,841 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:01:29,841 INFO L85 PathProgramCache]: Analyzing trace with hash 1586803945, now seen corresponding path program 1 times [2022-11-03 02:01:29,843 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:01:29,843 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [223522504] [2022-11-03 02:01:29,844 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:01:29,844 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:01:29,844 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:01:29,852 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:01:29,858 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (6)] Waiting until timeout for monitored process [2022-11-03 02:01:30,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:01:30,813 INFO L263 TraceCheckSpWp]: Trace formula consists of 1332 conjuncts, 8 conjunts are in the unsatisfiable core [2022-11-03 02:01:30,824 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:01:30,995 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:01:30,995 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:01:30,995 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:01:30,995 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [223522504] [2022-11-03 02:01:30,996 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [223522504] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:01:30,996 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:01:30,996 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-03 02:01:30,996 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [966708636] [2022-11-03 02:01:30,997 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:01:30,997 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 02:01:30,998 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:01:30,998 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 02:01:30,998 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 02:01:30,999 INFO L87 Difference]: Start difference. First operand 55 states and 75 transitions. Second operand has 4 states, 4 states have (on average 13.5) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:01:31,246 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:01:31,246 INFO L93 Difference]: Finished difference Result 114 states and 159 transitions. [2022-11-03 02:01:31,247 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-03 02:01:31,247 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 13.5) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2022-11-03 02:01:31,248 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:01:31,248 INFO L225 Difference]: With dead ends: 114 [2022-11-03 02:01:31,248 INFO L226 Difference]: Without dead ends: 67 [2022-11-03 02:01:31,249 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 51 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-03 02:01:31,250 INFO L413 NwaCegarLoop]: 63 mSDtfsCounter, 5 mSDsluCounter, 103 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5 SdHoareTripleChecker+Valid, 166 SdHoareTripleChecker+Invalid, 34 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 17 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-03 02:01:31,250 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [5 Valid, 166 Invalid, 34 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 17 Invalid, 0 Unknown, 17 Unchecked, 0.2s Time] [2022-11-03 02:01:31,251 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states. [2022-11-03 02:01:31,256 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 67. [2022-11-03 02:01:31,257 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 67 states, 66 states have (on average 1.378787878787879) internal successors, (91), 66 states have internal predecessors, (91), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:01:31,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 91 transitions. [2022-11-03 02:01:31,259 INFO L78 Accepts]: Start accepts. Automaton has 67 states and 91 transitions. Word has length 54 [2022-11-03 02:01:31,259 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:01:31,259 INFO L495 AbstractCegarLoop]: Abstraction has 67 states and 91 transitions. [2022-11-03 02:01:31,260 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 13.5) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:01:31,260 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 91 transitions. [2022-11-03 02:01:31,261 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2022-11-03 02:01:31,261 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:01:31,262 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:01:31,294 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (6)] Forceful destruction successful, exit code 0 [2022-11-03 02:01:31,486 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:01:31,486 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:01:31,487 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:01:31,487 INFO L85 PathProgramCache]: Analyzing trace with hash 742798443, now seen corresponding path program 1 times [2022-11-03 02:01:31,489 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:01:31,490 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1877473241] [2022-11-03 02:01:31,490 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:01:31,490 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:01:31,490 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:01:31,492 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:01:31,510 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (7)] Waiting until timeout for monitored process [2022-11-03 02:01:32,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:01:32,425 INFO L263 TraceCheckSpWp]: Trace formula consists of 1332 conjuncts, 8 conjunts are in the unsatisfiable core [2022-11-03 02:01:32,445 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:01:32,722 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:01:32,722 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:01:32,723 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:01:32,723 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1877473241] [2022-11-03 02:01:32,723 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1877473241] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:01:32,724 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:01:32,724 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-03 02:01:32,724 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1410114161] [2022-11-03 02:01:32,724 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:01:32,725 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 02:01:32,725 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:01:32,725 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 02:01:32,726 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 02:01:32,726 INFO L87 Difference]: Start difference. First operand 67 states and 91 transitions. Second operand has 4 states, 4 states have (on average 13.5) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:01:32,981 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:01:32,981 INFO L93 Difference]: Finished difference Result 130 states and 182 transitions. [2022-11-03 02:01:32,982 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-03 02:01:32,982 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 13.5) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2022-11-03 02:01:32,983 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:01:32,983 INFO L225 Difference]: With dead ends: 130 [2022-11-03 02:01:32,983 INFO L226 Difference]: Without dead ends: 83 [2022-11-03 02:01:32,984 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 51 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-03 02:01:32,985 INFO L413 NwaCegarLoop]: 60 mSDtfsCounter, 12 mSDsluCounter, 103 mSDsCounter, 0 mSdLazyCounter, 20 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 163 SdHoareTripleChecker+Invalid, 40 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 20 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 20 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-03 02:01:32,985 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [12 Valid, 163 Invalid, 40 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 20 Invalid, 0 Unknown, 20 Unchecked, 0.2s Time] [2022-11-03 02:01:32,986 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2022-11-03 02:01:32,991 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 83. [2022-11-03 02:01:32,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 83 states, 82 states have (on average 1.3902439024390243) internal successors, (114), 82 states have internal predecessors, (114), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:01:32,993 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 114 transitions. [2022-11-03 02:01:32,993 INFO L78 Accepts]: Start accepts. Automaton has 83 states and 114 transitions. Word has length 54 [2022-11-03 02:01:32,994 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:01:32,994 INFO L495 AbstractCegarLoop]: Abstraction has 83 states and 114 transitions. [2022-11-03 02:01:32,994 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 13.5) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:01:32,994 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 114 transitions. [2022-11-03 02:01:32,996 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2022-11-03 02:01:32,996 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:01:32,996 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:01:33,032 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (7)] Forceful destruction successful, exit code 0 [2022-11-03 02:01:33,209 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:01:33,210 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:01:33,210 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:01:33,210 INFO L85 PathProgramCache]: Analyzing trace with hash -946145299, now seen corresponding path program 1 times [2022-11-03 02:01:33,213 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:01:33,213 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1152084388] [2022-11-03 02:01:33,213 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:01:33,213 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:01:33,213 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:01:33,217 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:01:33,248 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (8)] Waiting until timeout for monitored process [2022-11-03 02:01:34,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:01:34,160 INFO L263 TraceCheckSpWp]: Trace formula consists of 1332 conjuncts, 10 conjunts are in the unsatisfiable core [2022-11-03 02:01:34,165 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:01:36,405 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:01:36,405 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:01:36,405 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:01:36,406 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1152084388] [2022-11-03 02:01:36,406 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1152084388] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:01:36,406 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:01:36,406 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-11-03 02:01:36,406 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1438140824] [2022-11-03 02:01:36,407 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:01:36,407 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-03 02:01:36,407 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:01:36,408 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-03 02:01:36,408 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=19, Unknown=1, NotChecked=0, Total=30 [2022-11-03 02:01:36,408 INFO L87 Difference]: Start difference. First operand 83 states and 114 transitions. Second operand has 6 states, 6 states have (on average 9.0) internal successors, (54), 6 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:01:36,685 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:01:36,685 INFO L93 Difference]: Finished difference Result 132 states and 184 transitions. [2022-11-03 02:01:36,685 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-03 02:01:36,686 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 9.0) internal successors, (54), 6 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2022-11-03 02:01:36,686 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:01:36,687 INFO L225 Difference]: With dead ends: 132 [2022-11-03 02:01:36,687 INFO L226 Difference]: Without dead ends: 85 [2022-11-03 02:01:36,687 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 49 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=15, Invalid=26, Unknown=1, NotChecked=0, Total=42 [2022-11-03 02:01:36,688 INFO L413 NwaCegarLoop]: 58 mSDtfsCounter, 12 mSDsluCounter, 206 mSDsCounter, 0 mSdLazyCounter, 19 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 264 SdHoareTripleChecker+Invalid, 46 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 19 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 27 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-03 02:01:36,689 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [12 Valid, 264 Invalid, 46 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 19 Invalid, 0 Unknown, 27 Unchecked, 0.2s Time] [2022-11-03 02:01:36,690 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2022-11-03 02:01:36,702 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 85. [2022-11-03 02:01:36,705 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 85 states, 84 states have (on average 1.380952380952381) internal successors, (116), 84 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:01:36,708 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85 states to 85 states and 116 transitions. [2022-11-03 02:01:36,708 INFO L78 Accepts]: Start accepts. Automaton has 85 states and 116 transitions. Word has length 54 [2022-11-03 02:01:36,714 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:01:36,714 INFO L495 AbstractCegarLoop]: Abstraction has 85 states and 116 transitions. [2022-11-03 02:01:36,715 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 9.0) internal successors, (54), 6 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:01:36,715 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 116 transitions. [2022-11-03 02:01:36,719 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2022-11-03 02:01:36,720 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:01:36,720 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:01:36,751 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (8)] Forceful destruction successful, exit code 0 [2022-11-03 02:01:36,946 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:01:36,946 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:01:36,946 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:01:36,946 INFO L85 PathProgramCache]: Analyzing trace with hash 1760474095, now seen corresponding path program 1 times [2022-11-03 02:01:36,948 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:01:36,948 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [2107331700] [2022-11-03 02:01:36,948 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:01:36,948 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:01:36,948 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:01:36,949 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:01:36,952 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (9)] Waiting until timeout for monitored process [2022-11-03 02:01:37,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:01:37,847 INFO L263 TraceCheckSpWp]: Trace formula consists of 1332 conjuncts, 11 conjunts are in the unsatisfiable core [2022-11-03 02:01:37,857 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:01:38,282 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:01:38,282 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:01:38,758 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:01:38,758 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:01:38,759 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [2107331700] [2022-11-03 02:01:38,759 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [2107331700] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:01:38,759 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [723723519] [2022-11-03 02:01:38,759 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:01:38,760 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:01:38,760 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:01:38,766 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:01:38,798 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (10)] Waiting until timeout for monitored process [2022-11-03 02:01:40,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:01:40,172 INFO L263 TraceCheckSpWp]: Trace formula consists of 1332 conjuncts, 11 conjunts are in the unsatisfiable core [2022-11-03 02:01:40,181 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:01:40,503 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:01:40,503 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:01:40,795 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:01:40,795 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [723723519] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:01:40,796 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [122771107] [2022-11-03 02:01:40,796 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:01:40,796 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:01:40,796 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:01:40,799 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:01:40,807 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-11-03 02:01:41,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:01:41,502 INFO L263 TraceCheckSpWp]: Trace formula consists of 1332 conjuncts, 11 conjunts are in the unsatisfiable core [2022-11-03 02:01:41,507 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:01:41,830 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:01:41,831 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:01:42,130 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:01:42,131 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [122771107] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:01:42,131 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:01:42,131 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8, 8] total 14 [2022-11-03 02:01:42,131 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [789291637] [2022-11-03 02:01:42,132 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:01:42,133 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-11-03 02:01:42,133 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:01:42,133 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-11-03 02:01:42,134 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2022-11-03 02:01:42,134 INFO L87 Difference]: Start difference. First operand 85 states and 116 transitions. Second operand has 14 states, 14 states have (on average 7.142857142857143) internal successors, (100), 14 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:01:42,864 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:01:42,864 INFO L93 Difference]: Finished difference Result 198 states and 275 transitions. [2022-11-03 02:01:42,865 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-03 02:01:42,865 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 7.142857142857143) internal successors, (100), 14 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2022-11-03 02:01:42,866 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:01:42,866 INFO L225 Difference]: With dead ends: 198 [2022-11-03 02:01:42,867 INFO L226 Difference]: Without dead ends: 151 [2022-11-03 02:01:42,867 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 323 GetRequests, 304 SyntacticMatches, 2 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=73, Invalid=269, Unknown=0, NotChecked=0, Total=342 [2022-11-03 02:01:42,868 INFO L413 NwaCegarLoop]: 96 mSDtfsCounter, 249 mSDsluCounter, 670 mSDsCounter, 0 mSdLazyCounter, 102 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 249 SdHoareTripleChecker+Valid, 766 SdHoareTripleChecker+Invalid, 253 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 102 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 150 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-11-03 02:01:42,868 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [249 Valid, 766 Invalid, 253 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 102 Invalid, 0 Unknown, 150 Unchecked, 0.6s Time] [2022-11-03 02:01:42,869 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2022-11-03 02:01:42,877 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 134. [2022-11-03 02:01:42,878 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 134 states, 133 states have (on average 1.3909774436090225) internal successors, (185), 133 states have internal predecessors, (185), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:01:42,879 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 185 transitions. [2022-11-03 02:01:42,880 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 185 transitions. Word has length 54 [2022-11-03 02:01:42,880 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:01:42,880 INFO L495 AbstractCegarLoop]: Abstraction has 134 states and 185 transitions. [2022-11-03 02:01:42,881 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 7.142857142857143) internal successors, (100), 14 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:01:42,881 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 185 transitions. [2022-11-03 02:01:42,882 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2022-11-03 02:01:42,882 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:01:42,883 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:01:42,905 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (9)] Forceful destruction successful, exit code 0 [2022-11-03 02:01:43,103 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (10)] Forceful destruction successful, exit code 0 [2022-11-03 02:01:43,323 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-11-03 02:01:43,494 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:01:43,495 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:01:43,495 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:01:43,495 INFO L85 PathProgramCache]: Analyzing trace with hash 951127469, now seen corresponding path program 1 times [2022-11-03 02:01:43,496 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:01:43,496 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [183768267] [2022-11-03 02:01:43,496 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:01:43,497 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:01:43,497 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:01:43,498 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:01:43,522 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (12)] Waiting until timeout for monitored process [2022-11-03 02:01:44,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:01:44,302 INFO L263 TraceCheckSpWp]: Trace formula consists of 1332 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 02:01:44,309 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:01:44,800 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 4 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:01:44,800 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:01:45,421 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 4 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:01:45,421 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:01:45,421 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [183768267] [2022-11-03 02:01:45,421 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [183768267] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:01:45,422 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [701282432] [2022-11-03 02:01:45,422 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:01:45,422 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:01:45,422 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:01:45,426 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:01:45,435 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (13)] Waiting until timeout for monitored process [2022-11-03 02:01:46,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:01:46,769 INFO L263 TraceCheckSpWp]: Trace formula consists of 1332 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 02:01:46,776 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:01:47,076 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 4 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:01:47,077 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:01:47,390 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 4 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:01:47,390 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [701282432] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:01:47,390 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [690148977] [2022-11-03 02:01:47,390 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:01:47,390 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:01:47,391 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:01:47,394 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:01:47,396 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-11-03 02:01:48,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:01:48,041 INFO L263 TraceCheckSpWp]: Trace formula consists of 1332 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 02:01:48,048 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:01:48,353 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 4 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:01:48,353 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:01:48,682 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 4 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:01:48,683 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [690148977] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:01:48,683 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:01:48,683 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 10, 9, 10, 9] total 17 [2022-11-03 02:01:48,684 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1979932481] [2022-11-03 02:01:48,684 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:01:48,685 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2022-11-03 02:01:48,685 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:01:48,685 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2022-11-03 02:01:48,686 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=232, Unknown=0, NotChecked=0, Total=272 [2022-11-03 02:01:48,686 INFO L87 Difference]: Start difference. First operand 134 states and 185 transitions. Second operand has 17 states, 17 states have (on average 6.0) internal successors, (102), 17 states have internal predecessors, (102), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:01:50,531 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:01:50,531 INFO L93 Difference]: Finished difference Result 321 states and 449 transitions. [2022-11-03 02:01:50,531 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-11-03 02:01:50,532 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 6.0) internal successors, (102), 17 states have internal predecessors, (102), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2022-11-03 02:01:50,532 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:01:50,534 INFO L225 Difference]: With dead ends: 321 [2022-11-03 02:01:50,534 INFO L226 Difference]: Without dead ends: 245 [2022-11-03 02:01:50,535 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 332 GetRequests, 298 SyntacticMatches, 5 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 134 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=171, Invalid=759, Unknown=0, NotChecked=0, Total=930 [2022-11-03 02:01:50,536 INFO L413 NwaCegarLoop]: 109 mSDtfsCounter, 439 mSDsluCounter, 998 mSDsCounter, 0 mSdLazyCounter, 241 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 439 SdHoareTripleChecker+Valid, 1107 SdHoareTripleChecker+Invalid, 533 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 241 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 284 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:01:50,536 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [439 Valid, 1107 Invalid, 533 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 241 Invalid, 0 Unknown, 284 Unchecked, 1.1s Time] [2022-11-03 02:01:50,537 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 245 states. [2022-11-03 02:01:50,547 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 245 to 136. [2022-11-03 02:01:50,547 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 136 states, 135 states have (on average 1.385185185185185) internal successors, (187), 135 states have internal predecessors, (187), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:01:50,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 187 transitions. [2022-11-03 02:01:50,556 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 187 transitions. Word has length 54 [2022-11-03 02:01:50,556 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:01:50,556 INFO L495 AbstractCegarLoop]: Abstraction has 136 states and 187 transitions. [2022-11-03 02:01:50,557 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 6.0) internal successors, (102), 17 states have internal predecessors, (102), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:01:50,557 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 187 transitions. [2022-11-03 02:01:50,558 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2022-11-03 02:01:50,558 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:01:50,558 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:01:50,583 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (12)] Forceful destruction successful, exit code 0 [2022-11-03 02:01:50,782 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (13)] Forceful destruction successful, exit code 0 [2022-11-03 02:01:51,002 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Ended with exit code 0 [2022-11-03 02:01:51,174 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:01:51,175 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:01:51,175 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:01:51,175 INFO L85 PathProgramCache]: Analyzing trace with hash 1008385771, now seen corresponding path program 1 times [2022-11-03 02:01:51,177 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:01:51,177 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [699838244] [2022-11-03 02:01:51,177 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:01:51,177 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:01:51,177 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:01:51,178 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:01:51,180 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (15)] Waiting until timeout for monitored process [2022-11-03 02:01:51,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:01:51,924 INFO L263 TraceCheckSpWp]: Trace formula consists of 1332 conjuncts, 40 conjunts are in the unsatisfiable core [2022-11-03 02:01:51,933 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:01:52,950 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:01:52,950 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:01:58,512 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:01:58,512 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:01:58,513 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [699838244] [2022-11-03 02:01:58,513 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [699838244] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:01:58,513 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [621762819] [2022-11-03 02:01:58,513 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:01:58,513 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:01:58,514 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:01:58,528 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:01:58,530 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (16)] Waiting until timeout for monitored process [2022-11-03 02:01:59,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:01:59,920 INFO L263 TraceCheckSpWp]: Trace formula consists of 1332 conjuncts, 40 conjunts are in the unsatisfiable core [2022-11-03 02:01:59,928 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:02:00,749 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:02:00,750 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:02:01,569 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:02:01,570 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [621762819] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:02:01,570 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1639357703] [2022-11-03 02:02:01,570 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:02:01,570 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:02:01,570 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:02:01,571 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:02:01,578 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-11-03 02:02:02,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:02:02,160 INFO L263 TraceCheckSpWp]: Trace formula consists of 1332 conjuncts, 35 conjunts are in the unsatisfiable core [2022-11-03 02:02:02,167 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:02:04,265 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:02:04,266 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:02:08,900 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:02:08,901 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1639357703] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:02:08,901 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:02:08,901 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 14, 14] total 36 [2022-11-03 02:02:08,902 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1979319877] [2022-11-03 02:02:08,902 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:02:08,902 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 36 states [2022-11-03 02:02:08,903 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:02:08,903 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2022-11-03 02:02:08,904 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=103, Invalid=1156, Unknown=1, NotChecked=0, Total=1260 [2022-11-03 02:02:08,904 INFO L87 Difference]: Start difference. First operand 136 states and 187 transitions. Second operand has 36 states, 36 states have (on average 5.777777777777778) internal successors, (208), 36 states have internal predecessors, (208), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:02:11,102 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:02:11,102 INFO L93 Difference]: Finished difference Result 181 states and 246 transitions. [2022-11-03 02:02:11,102 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-11-03 02:02:11,103 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 36 states have (on average 5.777777777777778) internal successors, (208), 36 states have internal predecessors, (208), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2022-11-03 02:02:11,103 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:02:11,104 INFO L225 Difference]: With dead ends: 181 [2022-11-03 02:02:11,104 INFO L226 Difference]: Without dead ends: 179 [2022-11-03 02:02:11,105 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 333 GetRequests, 284 SyntacticMatches, 3 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 430 ImplicationChecksByTransitivity, 11.2s TimeCoverageRelationStatistics Valid=200, Invalid=2055, Unknown=1, NotChecked=0, Total=2256 [2022-11-03 02:02:11,106 INFO L413 NwaCegarLoop]: 57 mSDtfsCounter, 147 mSDsluCounter, 1241 mSDsCounter, 0 mSdLazyCounter, 49 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 147 SdHoareTripleChecker+Valid, 1298 SdHoareTripleChecker+Invalid, 181 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 49 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 131 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:02:11,106 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [147 Valid, 1298 Invalid, 181 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 49 Invalid, 0 Unknown, 131 Unchecked, 0.1s Time] [2022-11-03 02:02:11,107 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2022-11-03 02:02:11,114 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 165. [2022-11-03 02:02:11,115 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 165 states, 164 states have (on average 1.3780487804878048) internal successors, (226), 164 states have internal predecessors, (226), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:02:11,116 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 226 transitions. [2022-11-03 02:02:11,116 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 226 transitions. Word has length 54 [2022-11-03 02:02:11,116 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:02:11,116 INFO L495 AbstractCegarLoop]: Abstraction has 165 states and 226 transitions. [2022-11-03 02:02:11,117 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 36 states, 36 states have (on average 5.777777777777778) internal successors, (208), 36 states have internal predecessors, (208), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:02:11,117 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 226 transitions. [2022-11-03 02:02:11,118 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2022-11-03 02:02:11,118 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:02:11,118 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:02:11,129 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (16)] Forceful destruction successful, exit code 0 [2022-11-03 02:02:11,345 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (15)] Forceful destruction successful, exit code 0 [2022-11-03 02:02:11,555 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2022-11-03 02:02:11,728 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,15 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,17 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:02:11,729 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:02:11,729 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:02:11,729 INFO L85 PathProgramCache]: Analyzing trace with hash 1080772329, now seen corresponding path program 1 times [2022-11-03 02:02:11,730 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:02:11,730 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1387173381] [2022-11-03 02:02:11,731 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:02:11,731 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:02:11,731 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:02:11,732 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:02:11,734 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (18)] Waiting until timeout for monitored process [2022-11-03 02:02:12,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:02:12,427 INFO L263 TraceCheckSpWp]: Trace formula consists of 1332 conjuncts, 10 conjunts are in the unsatisfiable core [2022-11-03 02:02:12,434 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:02:14,561 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:02:14,562 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:02:14,562 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:02:14,562 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1387173381] [2022-11-03 02:02:14,562 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1387173381] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:02:14,562 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:02:14,563 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-11-03 02:02:14,563 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [286954286] [2022-11-03 02:02:14,563 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:02:14,563 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-03 02:02:14,564 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:02:14,564 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-03 02:02:14,564 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=19, Unknown=1, NotChecked=0, Total=30 [2022-11-03 02:02:14,564 INFO L87 Difference]: Start difference. First operand 165 states and 226 transitions. Second operand has 6 states, 6 states have (on average 9.0) internal successors, (54), 6 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:02:14,756 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:02:14,757 INFO L93 Difference]: Finished difference Result 259 states and 359 transitions. [2022-11-03 02:02:14,757 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-03 02:02:14,758 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 9.0) internal successors, (54), 6 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2022-11-03 02:02:14,758 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:02:14,758 INFO L225 Difference]: With dead ends: 259 [2022-11-03 02:02:14,759 INFO L226 Difference]: Without dead ends: 149 [2022-11-03 02:02:14,759 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 49 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=15, Invalid=26, Unknown=1, NotChecked=0, Total=42 [2022-11-03 02:02:14,760 INFO L413 NwaCegarLoop]: 61 mSDtfsCounter, 5 mSDsluCounter, 207 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5 SdHoareTripleChecker+Valid, 268 SdHoareTripleChecker+Invalid, 48 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 32 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-03 02:02:14,760 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [5 Valid, 268 Invalid, 48 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 32 Unchecked, 0.2s Time] [2022-11-03 02:02:14,761 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2022-11-03 02:02:14,767 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 149. [2022-11-03 02:02:14,768 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 149 states, 148 states have (on average 1.364864864864865) internal successors, (202), 148 states have internal predecessors, (202), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:02:14,769 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 202 transitions. [2022-11-03 02:02:14,769 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 202 transitions. Word has length 54 [2022-11-03 02:02:14,769 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:02:14,770 INFO L495 AbstractCegarLoop]: Abstraction has 149 states and 202 transitions. [2022-11-03 02:02:14,770 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 9.0) internal successors, (54), 6 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:02:14,770 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 202 transitions. [2022-11-03 02:02:14,771 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2022-11-03 02:02:14,771 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:02:14,772 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:02:14,803 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (18)] Forceful destruction successful, exit code 0 [2022-11-03 02:02:14,995 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 18 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:02:14,995 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:02:14,995 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:02:14,995 INFO L85 PathProgramCache]: Analyzing trace with hash -1874961679, now seen corresponding path program 1 times [2022-11-03 02:02:14,996 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:02:14,996 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [882167308] [2022-11-03 02:02:14,996 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:02:14,997 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:02:14,997 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:02:14,998 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:02:15,011 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (19)] Waiting until timeout for monitored process [2022-11-03 02:02:15,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:02:15,660 INFO L263 TraceCheckSpWp]: Trace formula consists of 1332 conjuncts, 14 conjunts are in the unsatisfiable core [2022-11-03 02:02:15,664 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:02:16,053 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:02:16,053 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:02:16,642 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:02:16,642 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:02:16,642 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [882167308] [2022-11-03 02:02:16,642 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [882167308] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:02:16,643 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [283997339] [2022-11-03 02:02:16,643 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:02:16,643 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:02:16,643 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:02:16,644 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:02:16,685 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (20)] Waiting until timeout for monitored process [2022-11-03 02:02:17,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:02:17,969 INFO L263 TraceCheckSpWp]: Trace formula consists of 1332 conjuncts, 14 conjunts are in the unsatisfiable core [2022-11-03 02:02:17,974 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:02:18,233 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:02:18,233 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:02:18,509 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:02:18,510 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [283997339] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:02:18,510 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1610871069] [2022-11-03 02:02:18,510 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:02:18,511 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:02:18,511 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:02:18,512 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:02:18,518 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2022-11-03 02:02:19,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:02:19,072 INFO L263 TraceCheckSpWp]: Trace formula consists of 1332 conjuncts, 14 conjunts are in the unsatisfiable core [2022-11-03 02:02:19,078 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:02:19,345 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:02:19,346 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:02:19,593 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:02:19,594 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1610871069] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:02:19,594 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:02:19,594 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10, 10] total 18 [2022-11-03 02:02:19,598 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1992318874] [2022-11-03 02:02:19,598 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:02:19,599 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-11-03 02:02:19,599 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:02:19,600 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-11-03 02:02:19,600 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=265, Unknown=0, NotChecked=0, Total=306 [2022-11-03 02:02:19,600 INFO L87 Difference]: Start difference. First operand 149 states and 202 transitions. Second operand has 18 states, 18 states have (on average 5.555555555555555) internal successors, (100), 18 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:02:20,926 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:02:20,926 INFO L93 Difference]: Finished difference Result 466 states and 654 transitions. [2022-11-03 02:02:20,935 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-11-03 02:02:20,935 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 5.555555555555555) internal successors, (100), 18 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2022-11-03 02:02:20,935 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:02:20,940 INFO L225 Difference]: With dead ends: 466 [2022-11-03 02:02:20,940 INFO L226 Difference]: Without dead ends: 388 [2022-11-03 02:02:20,941 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 330 GetRequests, 300 SyntacticMatches, 2 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 89 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=200, Invalid=670, Unknown=0, NotChecked=0, Total=870 [2022-11-03 02:02:20,942 INFO L413 NwaCegarLoop]: 166 mSDtfsCounter, 433 mSDsluCounter, 1455 mSDsCounter, 0 mSdLazyCounter, 251 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 433 SdHoareTripleChecker+Valid, 1621 SdHoareTripleChecker+Invalid, 504 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 251 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 247 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-11-03 02:02:20,943 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [433 Valid, 1621 Invalid, 504 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 251 Invalid, 0 Unknown, 247 Unchecked, 0.9s Time] [2022-11-03 02:02:20,945 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 388 states. [2022-11-03 02:02:20,954 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 388 to 173. [2022-11-03 02:02:20,954 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 173 states, 172 states have (on average 1.3604651162790697) internal successors, (234), 172 states have internal predecessors, (234), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:02:20,955 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173 states to 173 states and 234 transitions. [2022-11-03 02:02:20,955 INFO L78 Accepts]: Start accepts. Automaton has 173 states and 234 transitions. Word has length 54 [2022-11-03 02:02:20,955 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:02:20,956 INFO L495 AbstractCegarLoop]: Abstraction has 173 states and 234 transitions. [2022-11-03 02:02:20,956 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 5.555555555555555) internal successors, (100), 18 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:02:20,956 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 234 transitions. [2022-11-03 02:02:20,957 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2022-11-03 02:02:20,957 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:02:20,958 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:02:20,988 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Forceful destruction successful, exit code 0 [2022-11-03 02:02:21,174 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (20)] Ended with exit code 0 [2022-11-03 02:02:21,384 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (19)] Forceful destruction successful, exit code 0 [2022-11-03 02:02:21,566 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 21 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,20 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,19 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:02:21,567 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:02:21,567 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:02:21,567 INFO L85 PathProgramCache]: Analyzing trace with hash 1667917293, now seen corresponding path program 1 times [2022-11-03 02:02:21,568 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:02:21,568 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1210845025] [2022-11-03 02:02:21,568 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:02:21,568 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:02:21,568 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:02:21,569 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:02:21,571 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (22)] Waiting until timeout for monitored process [2022-11-03 02:02:22,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:02:22,251 INFO L263 TraceCheckSpWp]: Trace formula consists of 1332 conjuncts, 58 conjunts are in the unsatisfiable core [2022-11-03 02:02:22,256 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:02:23,400 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 1 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:02:23,400 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:02:31,612 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:02:31,612 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:02:31,612 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1210845025] [2022-11-03 02:02:31,613 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1210845025] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:02:31,613 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [965562480] [2022-11-03 02:02:31,613 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:02:31,613 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:02:31,613 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:02:31,614 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:02:31,634 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (23)] Waiting until timeout for monitored process [2022-11-03 02:02:32,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:02:32,883 INFO L263 TraceCheckSpWp]: Trace formula consists of 1332 conjuncts, 58 conjunts are in the unsatisfiable core [2022-11-03 02:02:32,889 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:02:33,873 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 1 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:02:33,873 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:03:34,280 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:03:34,281 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [965562480] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:03:34,281 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [850926623] [2022-11-03 02:03:34,281 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:03:34,281 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:03:34,281 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:03:34,283 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:03:34,283 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2022-11-03 02:03:34,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:03:34,822 INFO L263 TraceCheckSpWp]: Trace formula consists of 1332 conjuncts, 38 conjunts are in the unsatisfiable core [2022-11-03 02:03:34,828 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:03:38,531 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:03:38,531 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:03:45,659 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:03:45,659 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [850926623] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:03:45,659 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:03:45,659 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 16, 16] total 50 [2022-11-03 02:03:45,660 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [959438116] [2022-11-03 02:03:45,660 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:03:45,661 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 50 states [2022-11-03 02:03:45,661 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:03:45,661 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2022-11-03 02:03:45,663 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=225, Invalid=2197, Unknown=28, NotChecked=0, Total=2450 [2022-11-03 02:03:45,663 INFO L87 Difference]: Start difference. First operand 173 states and 234 transitions. Second operand has 50 states, 50 states have (on average 5.04) internal successors, (252), 50 states have internal predecessors, (252), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:03:52,553 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:03:52,553 INFO L93 Difference]: Finished difference Result 279 states and 380 transitions. [2022-11-03 02:03:52,554 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2022-11-03 02:03:52,554 INFO L78 Accepts]: Start accepts. Automaton has has 50 states, 50 states have (on average 5.04) internal successors, (252), 50 states have internal predecessors, (252), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2022-11-03 02:03:52,554 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:03:52,556 INFO L225 Difference]: With dead ends: 279 [2022-11-03 02:03:52,556 INFO L226 Difference]: Without dead ends: 277 [2022-11-03 02:03:52,558 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 345 GetRequests, 276 SyntacticMatches, 2 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1192 ImplicationChecksByTransitivity, 81.5s TimeCoverageRelationStatistics Valid=468, Invalid=4196, Unknown=28, NotChecked=0, Total=4692 [2022-11-03 02:03:52,559 INFO L413 NwaCegarLoop]: 78 mSDtfsCounter, 168 mSDsluCounter, 2099 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 168 SdHoareTripleChecker+Valid, 2177 SdHoareTripleChecker+Invalid, 704 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 683 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:03:52,559 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [168 Valid, 2177 Invalid, 704 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 21 Invalid, 0 Unknown, 683 Unchecked, 0.1s Time] [2022-11-03 02:03:52,560 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 277 states. [2022-11-03 02:03:52,571 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 277 to 251. [2022-11-03 02:03:52,571 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 251 states, 250 states have (on average 1.388) internal successors, (347), 250 states have internal predecessors, (347), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:03:52,572 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 251 states to 251 states and 347 transitions. [2022-11-03 02:03:52,573 INFO L78 Accepts]: Start accepts. Automaton has 251 states and 347 transitions. Word has length 54 [2022-11-03 02:03:52,573 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:03:52,573 INFO L495 AbstractCegarLoop]: Abstraction has 251 states and 347 transitions. [2022-11-03 02:03:52,574 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 50 states, 50 states have (on average 5.04) internal successors, (252), 50 states have internal predecessors, (252), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:03:52,574 INFO L276 IsEmpty]: Start isEmpty. Operand 251 states and 347 transitions. [2022-11-03 02:03:52,575 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2022-11-03 02:03:52,575 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:03:52,575 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:03:52,603 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (22)] Ended with exit code 0 [2022-11-03 02:03:52,798 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (23)] Forceful destruction successful, exit code 0 [2022-11-03 02:03:53,017 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Forceful destruction successful, exit code 0 [2022-11-03 02:03:53,192 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 22 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,23 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,24 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:03:53,192 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:03:53,192 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:03:53,192 INFO L85 PathProgramCache]: Analyzing trace with hash -1925985425, now seen corresponding path program 1 times [2022-11-03 02:03:53,193 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:03:53,193 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [2023291705] [2022-11-03 02:03:53,193 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:03:53,194 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:03:53,194 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:03:53,194 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:03:53,196 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (25)] Waiting until timeout for monitored process [2022-11-03 02:03:53,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:03:53,803 INFO L263 TraceCheckSpWp]: Trace formula consists of 1332 conjuncts, 62 conjunts are in the unsatisfiable core [2022-11-03 02:03:53,807 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:03:54,982 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 1 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:03:54,982 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:04:01,035 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:04:01,036 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:04:01,036 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [2023291705] [2022-11-03 02:04:01,036 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [2023291705] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:04:01,036 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [347509948] [2022-11-03 02:04:01,036 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:04:01,036 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:04:01,036 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:04:01,038 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:04:01,039 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (26)] Waiting until timeout for monitored process [2022-11-03 02:04:02,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:04:02,151 INFO L263 TraceCheckSpWp]: Trace formula consists of 1332 conjuncts, 62 conjunts are in the unsatisfiable core [2022-11-03 02:04:02,155 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:04:03,037 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 1 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:04:03,038 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:05:09,285 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:05:09,285 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [347509948] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:05:09,285 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [283979732] [2022-11-03 02:05:09,285 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:05:09,286 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:05:09,286 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:05:09,291 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:05:09,295 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Waiting until timeout for monitored process [2022-11-03 02:05:09,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:05:09,798 INFO L263 TraceCheckSpWp]: Trace formula consists of 1332 conjuncts, 38 conjunts are in the unsatisfiable core [2022-11-03 02:05:09,802 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:05:14,038 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:05:14,038 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:05:22,082 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:05:22,083 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [283979732] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:05:22,083 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:05:22,083 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 16, 16] total 50 [2022-11-03 02:05:22,084 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [470026238] [2022-11-03 02:05:22,084 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:05:22,085 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 50 states [2022-11-03 02:05:22,085 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:05:22,085 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2022-11-03 02:05:22,086 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=225, Invalid=2198, Unknown=27, NotChecked=0, Total=2450 [2022-11-03 02:05:22,086 INFO L87 Difference]: Start difference. First operand 251 states and 347 transitions. Second operand has 50 states, 50 states have (on average 5.04) internal successors, (252), 50 states have internal predecessors, (252), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:05:31,112 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:05:31,113 INFO L93 Difference]: Finished difference Result 457 states and 630 transitions. [2022-11-03 02:05:31,113 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2022-11-03 02:05:31,113 INFO L78 Accepts]: Start accepts. Automaton has has 50 states, 50 states have (on average 5.04) internal successors, (252), 50 states have internal predecessors, (252), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2022-11-03 02:05:31,114 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:05:31,116 INFO L225 Difference]: With dead ends: 457 [2022-11-03 02:05:31,116 INFO L226 Difference]: Without dead ends: 455 [2022-11-03 02:05:31,117 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 350 GetRequests, 280 SyntacticMatches, 2 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1217 ImplicationChecksByTransitivity, 88.7s TimeCoverageRelationStatistics Valid=477, Invalid=4326, Unknown=27, NotChecked=0, Total=4830 [2022-11-03 02:05:31,118 INFO L413 NwaCegarLoop]: 78 mSDtfsCounter, 179 mSDsluCounter, 1873 mSDsCounter, 0 mSdLazyCounter, 13 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 179 SdHoareTripleChecker+Valid, 1951 SdHoareTripleChecker+Invalid, 597 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 13 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 584 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 02:05:31,119 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [179 Valid, 1951 Invalid, 597 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 13 Invalid, 0 Unknown, 584 Unchecked, 0.0s Time] [2022-11-03 02:05:31,119 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 455 states. [2022-11-03 02:05:31,139 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 455 to 419. [2022-11-03 02:05:31,140 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 419 states, 418 states have (on average 1.3995215311004785) internal successors, (585), 418 states have internal predecessors, (585), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:05:31,142 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 419 states to 419 states and 585 transitions. [2022-11-03 02:05:31,142 INFO L78 Accepts]: Start accepts. Automaton has 419 states and 585 transitions. Word has length 54 [2022-11-03 02:05:31,143 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:05:31,143 INFO L495 AbstractCegarLoop]: Abstraction has 419 states and 585 transitions. [2022-11-03 02:05:31,143 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 50 states, 50 states have (on average 5.04) internal successors, (252), 50 states have internal predecessors, (252), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:05:31,144 INFO L276 IsEmpty]: Start isEmpty. Operand 419 states and 585 transitions. [2022-11-03 02:05:31,144 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2022-11-03 02:05:31,144 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:05:31,145 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:05:31,168 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (25)] Forceful destruction successful, exit code 0 [2022-11-03 02:05:31,384 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Forceful destruction successful, exit code 0 [2022-11-03 02:05:31,565 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (26)] Forceful destruction successful, exit code 0 [2022-11-03 02:05:31,758 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 25 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,27 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,26 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt [2022-11-03 02:05:31,758 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:05:31,759 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:05:31,759 INFO L85 PathProgramCache]: Analyzing trace with hash 1081111279, now seen corresponding path program 1 times [2022-11-03 02:05:31,760 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:05:31,760 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [976397170] [2022-11-03 02:05:31,760 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:05:31,760 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:05:31,760 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:05:31,761 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:05:31,762 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (28)] Waiting until timeout for monitored process [2022-11-03 02:05:32,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:05:32,342 INFO L263 TraceCheckSpWp]: Trace formula consists of 1332 conjuncts, 62 conjunts are in the unsatisfiable core [2022-11-03 02:05:32,345 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:05:33,651 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 1 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:05:33,652 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:05:45,242 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:05:45,242 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:05:45,242 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [976397170] [2022-11-03 02:05:45,242 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [976397170] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:05:45,242 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1321473337] [2022-11-03 02:05:45,242 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:05:45,243 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:05:45,243 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:05:45,244 INFO L229 MonitoredProcess]: Starting monitored process 29 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:05:45,245 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (29)] Waiting until timeout for monitored process [2022-11-03 02:05:46,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:05:46,371 INFO L263 TraceCheckSpWp]: Trace formula consists of 1332 conjuncts, 62 conjunts are in the unsatisfiable core [2022-11-03 02:05:46,376 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:05:47,497 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 1 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:05:47,497 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:07:06,926 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:07:06,927 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1321473337] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:07:06,927 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [297097487] [2022-11-03 02:07:06,927 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:07:06,927 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:07:06,927 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:07:06,929 INFO L229 MonitoredProcess]: Starting monitored process 30 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:07:06,929 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Waiting until timeout for monitored process [2022-11-03 02:07:07,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:07:07,469 INFO L263 TraceCheckSpWp]: Trace formula consists of 1332 conjuncts, 38 conjunts are in the unsatisfiable core [2022-11-03 02:07:07,472 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:07:12,309 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:07:12,310 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:07:20,908 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:07:20,908 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [297097487] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:07:20,908 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:07:20,909 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 16, 16] total 50 [2022-11-03 02:07:20,909 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [97082443] [2022-11-03 02:07:20,909 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:07:20,910 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 50 states [2022-11-03 02:07:20,910 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:07:20,910 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2022-11-03 02:07:20,911 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=225, Invalid=2195, Unknown=30, NotChecked=0, Total=2450 [2022-11-03 02:07:20,911 INFO L87 Difference]: Start difference. First operand 419 states and 585 transitions. Second operand has 50 states, 50 states have (on average 5.04) internal successors, (252), 50 states have internal predecessors, (252), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:07:30,284 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:07:30,284 INFO L93 Difference]: Finished difference Result 535 states and 743 transitions. [2022-11-03 02:07:30,284 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2022-11-03 02:07:30,285 INFO L78 Accepts]: Start accepts. Automaton has has 50 states, 50 states have (on average 5.04) internal successors, (252), 50 states have internal predecessors, (252), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2022-11-03 02:07:30,285 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:07:30,287 INFO L225 Difference]: With dead ends: 535 [2022-11-03 02:07:30,287 INFO L226 Difference]: Without dead ends: 533 [2022-11-03 02:07:30,288 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 347 GetRequests, 278 SyntacticMatches, 2 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1193 ImplicationChecksByTransitivity, 108.3s TimeCoverageRelationStatistics Valid=473, Invalid=4189, Unknown=30, NotChecked=0, Total=4692 [2022-11-03 02:07:30,289 INFO L413 NwaCegarLoop]: 75 mSDtfsCounter, 148 mSDsluCounter, 2027 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 148 SdHoareTripleChecker+Valid, 2102 SdHoareTripleChecker+Invalid, 723 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 706 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:07:30,289 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [148 Valid, 2102 Invalid, 723 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 17 Invalid, 0 Unknown, 706 Unchecked, 0.1s Time] [2022-11-03 02:07:30,290 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 533 states. [2022-11-03 02:07:30,325 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 533 to 497. [2022-11-03 02:07:30,326 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 497 states, 496 states have (on average 1.407258064516129) internal successors, (698), 496 states have internal predecessors, (698), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:07:30,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 497 states to 497 states and 698 transitions. [2022-11-03 02:07:30,328 INFO L78 Accepts]: Start accepts. Automaton has 497 states and 698 transitions. Word has length 54 [2022-11-03 02:07:30,328 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:07:30,328 INFO L495 AbstractCegarLoop]: Abstraction has 497 states and 698 transitions. [2022-11-03 02:07:30,329 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 50 states, 50 states have (on average 5.04) internal successors, (252), 50 states have internal predecessors, (252), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:07:30,329 INFO L276 IsEmpty]: Start isEmpty. Operand 497 states and 698 transitions. [2022-11-03 02:07:30,330 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2022-11-03 02:07:30,330 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:07:30,330 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:07:30,350 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (28)] Forceful destruction successful, exit code 0 [2022-11-03 02:07:30,553 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (29)] Forceful destruction successful, exit code 0 [2022-11-03 02:07:30,771 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Forceful destruction successful, exit code 0 [2022-11-03 02:07:30,946 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 28 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,29 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,30 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:07:30,947 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:07:30,947 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:07:30,947 INFO L85 PathProgramCache]: Analyzing trace with hash 1782175857, now seen corresponding path program 1 times [2022-11-03 02:07:30,948 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:07:30,948 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [649111092] [2022-11-03 02:07:30,948 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:07:30,948 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:07:30,948 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:07:30,949 INFO L229 MonitoredProcess]: Starting monitored process 31 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:07:30,950 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (31)] Waiting until timeout for monitored process [2022-11-03 02:07:31,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:07:31,632 INFO L263 TraceCheckSpWp]: Trace formula consists of 1332 conjuncts, 66 conjunts are in the unsatisfiable core [2022-11-03 02:07:31,636 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:07:33,365 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 1 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:07:33,365 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:07:58,148 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:07:58,149 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:07:58,149 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [649111092] [2022-11-03 02:07:58,149 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [649111092] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:07:58,149 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1821960408] [2022-11-03 02:07:58,149 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:07:58,149 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:07:58,149 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:07:58,150 INFO L229 MonitoredProcess]: Starting monitored process 32 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:07:58,152 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d119c220-53f6-4325-a64c-8eb245017cf8/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (32)] Waiting until timeout for monitored process [2022-11-03 02:07:59,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:07:59,256 INFO L263 TraceCheckSpWp]: Trace formula consists of 1332 conjuncts, 66 conjunts are in the unsatisfiable core [2022-11-03 02:07:59,260 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:08:00,499 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 1 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:08:00,499 INFO L328 TraceCheckSpWp]: Computing backward predicates...