./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.resistance.2.prop3-func-interl.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 5e519f3a Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.resistance.2.prop3-func-interl.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 607e8e28a2e5d35754fe33162723eb929cf7678ee7656fa904ae1326ff2b5e8c --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-5e519f3 [2022-11-03 03:46:37,670 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-03 03:46:37,672 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-03 03:46:37,714 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-03 03:46:37,715 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-03 03:46:37,719 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-03 03:46:37,721 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-03 03:46:37,725 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-03 03:46:37,727 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-03 03:46:37,732 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-03 03:46:37,733 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-03 03:46:37,736 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-03 03:46:37,736 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-03 03:46:37,739 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-03 03:46:37,740 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-03 03:46:37,742 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-03 03:46:37,744 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-03 03:46:37,745 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-03 03:46:37,746 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-03 03:46:37,755 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-03 03:46:37,757 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-03 03:46:37,758 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-03 03:46:37,761 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-03 03:46:37,762 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-03 03:46:37,770 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-03 03:46:37,771 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-03 03:46:37,771 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-03 03:46:37,773 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-03 03:46:37,773 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-03 03:46:37,774 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-03 03:46:37,775 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-03 03:46:37,776 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-03 03:46:37,779 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-03 03:46:37,781 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-03 03:46:37,782 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-03 03:46:37,782 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-03 03:46:37,783 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-03 03:46:37,783 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-03 03:46:37,783 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-03 03:46:37,784 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-03 03:46:37,785 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-03 03:46:37,786 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Default.epf [2022-11-03 03:46:37,830 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-03 03:46:37,831 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-03 03:46:37,832 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-03 03:46:37,832 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-03 03:46:37,833 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-03 03:46:37,833 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-03 03:46:37,833 INFO L138 SettingsManager]: * User list type=DISABLED [2022-11-03 03:46:37,834 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-11-03 03:46:37,834 INFO L138 SettingsManager]: * Explicit value domain=true [2022-11-03 03:46:37,834 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2022-11-03 03:46:37,835 INFO L138 SettingsManager]: * Octagon Domain=false [2022-11-03 03:46:37,835 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-11-03 03:46:37,836 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2022-11-03 03:46:37,836 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2022-11-03 03:46:37,836 INFO L138 SettingsManager]: * Interval Domain=false [2022-11-03 03:46:37,836 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2022-11-03 03:46:37,837 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2022-11-03 03:46:37,837 INFO L138 SettingsManager]: * Simplification Technique=POLY_PAC [2022-11-03 03:46:37,838 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-03 03:46:37,838 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-03 03:46:37,838 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-03 03:46:37,838 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-03 03:46:37,838 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-03 03:46:37,839 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-03 03:46:37,839 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-03 03:46:37,839 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-03 03:46:37,839 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-03 03:46:37,840 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-03 03:46:37,840 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-03 03:46:37,840 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 03:46:37,840 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-03 03:46:37,841 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2022-11-03 03:46:37,841 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-03 03:46:37,841 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-03 03:46:37,841 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2022-11-03 03:46:37,842 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-11-03 03:46:37,842 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-03 03:46:37,842 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-11-03 03:46:37,842 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 607e8e28a2e5d35754fe33162723eb929cf7678ee7656fa904ae1326ff2b5e8c [2022-11-03 03:46:38,130 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-03 03:46:38,167 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-03 03:46:38,169 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-03 03:46:38,170 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-03 03:46:38,171 INFO L275 PluginConnector]: CDTParser initialized [2022-11-03 03:46:38,172 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.resistance.2.prop3-func-interl.c [2022-11-03 03:46:38,240 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/data/308196df8/615f86a71b7141cf88871c44d69a4b3d/FLAG0a58ee905 [2022-11-03 03:46:38,891 INFO L306 CDTParser]: Found 1 translation units. [2022-11-03 03:46:38,892 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.resistance.2.prop3-func-interl.c [2022-11-03 03:46:38,909 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/data/308196df8/615f86a71b7141cf88871c44d69a4b3d/FLAG0a58ee905 [2022-11-03 03:46:39,099 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/data/308196df8/615f86a71b7141cf88871c44d69a4b3d [2022-11-03 03:46:39,103 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-03 03:46:39,105 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-03 03:46:39,108 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-03 03:46:39,109 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-03 03:46:39,112 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-03 03:46:39,114 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 03:46:39" (1/1) ... [2022-11-03 03:46:39,116 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@bf92605 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:46:39, skipping insertion in model container [2022-11-03 03:46:39,116 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 03:46:39" (1/1) ... [2022-11-03 03:46:39,124 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-03 03:46:39,189 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-03 03:46:39,436 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.resistance.2.prop3-func-interl.c[1014,1027] [2022-11-03 03:46:39,788 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 03:46:39,791 INFO L203 MainTranslator]: Completed pre-run [2022-11-03 03:46:39,802 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.resistance.2.prop3-func-interl.c[1014,1027] [2022-11-03 03:46:39,995 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 03:46:40,007 INFO L208 MainTranslator]: Completed translation [2022-11-03 03:46:40,008 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:46:40 WrapperNode [2022-11-03 03:46:40,008 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-03 03:46:40,009 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-03 03:46:40,009 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-03 03:46:40,009 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-03 03:46:40,017 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:46:40" (1/1) ... [2022-11-03 03:46:40,099 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:46:40" (1/1) ... [2022-11-03 03:46:40,400 INFO L138 Inliner]: procedures = 11, calls = 3, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1866 [2022-11-03 03:46:40,401 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-03 03:46:40,402 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-03 03:46:40,402 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-03 03:46:40,403 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-03 03:46:40,412 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:46:40" (1/1) ... [2022-11-03 03:46:40,412 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:46:40" (1/1) ... [2022-11-03 03:46:40,445 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:46:40" (1/1) ... [2022-11-03 03:46:40,445 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:46:40" (1/1) ... [2022-11-03 03:46:40,529 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:46:40" (1/1) ... [2022-11-03 03:46:40,535 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:46:40" (1/1) ... [2022-11-03 03:46:40,557 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:46:40" (1/1) ... [2022-11-03 03:46:40,570 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:46:40" (1/1) ... [2022-11-03 03:46:40,605 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-03 03:46:40,607 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-03 03:46:40,607 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-03 03:46:40,607 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-03 03:46:40,608 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:46:40" (1/1) ... [2022-11-03 03:46:40,614 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 03:46:40,625 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:46:40,639 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-03 03:46:40,666 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-03 03:46:40,733 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-03 03:46:40,733 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-03 03:46:41,223 INFO L235 CfgBuilder]: Building ICFG [2022-11-03 03:46:41,227 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-03 03:49:16,893 INFO L276 CfgBuilder]: Performing block encoding [2022-11-03 03:49:41,098 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-03 03:49:41,098 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-03 03:49:41,101 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 03:49:41 BoogieIcfgContainer [2022-11-03 03:49:41,101 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-03 03:49:41,103 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-03 03:49:41,104 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-03 03:49:41,109 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-03 03:49:41,109 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 03.11 03:46:39" (1/3) ... [2022-11-03 03:49:41,110 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@53f12d78 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 03:49:41, skipping insertion in model container [2022-11-03 03:49:41,110 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:46:40" (2/3) ... [2022-11-03 03:49:41,111 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@53f12d78 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 03:49:41, skipping insertion in model container [2022-11-03 03:49:41,111 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 03:49:41" (3/3) ... [2022-11-03 03:49:41,112 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.resistance.2.prop3-func-interl.c [2022-11-03 03:49:41,131 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-03 03:49:41,132 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-03 03:49:41,192 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-03 03:49:41,201 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@70680383, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-03 03:49:41,201 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-03 03:49:41,207 INFO L276 IsEmpty]: Start isEmpty. Operand has 7 states, 5 states have (on average 1.6) internal successors, (8), 6 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:49:41,212 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2022-11-03 03:49:41,213 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:49:41,213 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1] [2022-11-03 03:49:41,214 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:49:41,221 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:49:41,222 INFO L85 PathProgramCache]: Analyzing trace with hash 7513227, now seen corresponding path program 1 times [2022-11-03 03:49:41,231 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-03 03:49:41,232 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [42391273] [2022-11-03 03:49:41,232 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:49:41,233 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-03 03:49:42,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:49:44,504 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:49:44,504 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-03 03:49:44,505 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [42391273] [2022-11-03 03:49:44,505 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [42391273] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:49:44,505 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:49:44,506 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-03 03:49:44,507 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [99025699] [2022-11-03 03:49:44,522 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:49:44,526 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 03:49:44,535 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-03 03:49:44,585 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 03:49:44,586 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 03:49:44,588 INFO L87 Difference]: Start difference. First operand has 7 states, 5 states have (on average 1.6) internal successors, (8), 6 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 1.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:49:46,986 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.25s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-11-03 03:49:47,170 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:49:47,171 INFO L93 Difference]: Finished difference Result 15 states and 20 transitions. [2022-11-03 03:49:47,172 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-03 03:49:47,173 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 4 [2022-11-03 03:49:47,173 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:49:47,180 INFO L225 Difference]: With dead ends: 15 [2022-11-03 03:49:47,180 INFO L226 Difference]: Without dead ends: 9 [2022-11-03 03:49:47,182 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-03 03:49:47,185 INFO L413 NwaCegarLoop]: 2 mSDtfsCounter, 3 mSDsluCounter, 5 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 1 mSolverCounterUnsat, 1 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 6 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 1 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.5s IncrementalHoareTripleChecker+Time [2022-11-03 03:49:47,186 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 6 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 7 Invalid, 1 Unknown, 0 Unchecked, 2.5s Time] [2022-11-03 03:49:47,203 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9 states. [2022-11-03 03:49:47,213 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9 to 8. [2022-11-03 03:49:47,214 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 7 states have (on average 1.1428571428571428) internal successors, (8), 7 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:49:47,214 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 8 transitions. [2022-11-03 03:49:47,216 INFO L78 Accepts]: Start accepts. Automaton has 8 states and 8 transitions. Word has length 4 [2022-11-03 03:49:47,216 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:49:47,216 INFO L495 AbstractCegarLoop]: Abstraction has 8 states and 8 transitions. [2022-11-03 03:49:47,216 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 1.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:49:47,217 INFO L276 IsEmpty]: Start isEmpty. Operand 8 states and 8 transitions. [2022-11-03 03:49:47,217 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2022-11-03 03:49:47,217 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:49:47,217 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1] [2022-11-03 03:49:47,218 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-11-03 03:49:47,218 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:49:47,218 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:49:47,219 INFO L85 PathProgramCache]: Analyzing trace with hash 500794071, now seen corresponding path program 1 times [2022-11-03 03:49:47,219 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-03 03:49:47,219 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1024708258] [2022-11-03 03:49:47,219 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:49:47,220 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-03 03:52:39,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-03 03:52:39,371 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-03 03:55:04,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-03 03:55:05,073 INFO L130 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2022-11-03 03:55:05,073 INFO L359 BasicCegarLoop]: Counterexample is feasible [2022-11-03 03:55:05,075 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-11-03 03:55:05,077 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-11-03 03:55:05,084 INFO L444 BasicCegarLoop]: Path program histogram: [1, 1] [2022-11-03 03:55:05,088 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-03 03:55:05,230 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:55:05,230 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:55:05,318 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 03.11 03:55:05 BoogieIcfgContainer [2022-11-03 03:55:05,318 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-03 03:55:05,318 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-03 03:55:05,319 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-03 03:55:05,319 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-03 03:55:05,319 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 03:49:41" (3/4) ... [2022-11-03 03:55:05,322 INFO L140 WitnessPrinter]: No result that supports witness generation found [2022-11-03 03:55:05,322 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-03 03:55:05,323 INFO L158 Benchmark]: Toolchain (without parser) took 506218.04ms. Allocated memory was 119.5MB in the beginning and 3.8GB in the end (delta: 3.7GB). Free memory was 88.4MB in the beginning and 2.9GB in the end (delta: -2.9GB). Peak memory consumption was 816.7MB. Max. memory is 16.1GB. [2022-11-03 03:55:05,324 INFO L158 Benchmark]: CDTParser took 0.18ms. Allocated memory is still 119.5MB. Free memory is still 75.6MB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-03 03:55:05,324 INFO L158 Benchmark]: CACSL2BoogieTranslator took 899.91ms. Allocated memory was 119.5MB in the beginning and 163.6MB in the end (delta: 44.0MB). Free memory was 88.1MB in the beginning and 115.0MB in the end (delta: -26.9MB). Peak memory consumption was 44.1MB. Max. memory is 16.1GB. [2022-11-03 03:55:05,325 INFO L158 Benchmark]: Boogie Procedure Inliner took 391.98ms. Allocated memory is still 163.6MB. Free memory was 115.0MB in the beginning and 96.0MB in the end (delta: 19.0MB). Peak memory consumption was 53.3MB. Max. memory is 16.1GB. [2022-11-03 03:55:05,326 INFO L158 Benchmark]: Boogie Preprocessor took 204.23ms. Allocated memory is still 163.6MB. Free memory was 96.0MB in the beginning and 75.0MB in the end (delta: 21.0MB). Peak memory consumption was 21.0MB. Max. memory is 16.1GB. [2022-11-03 03:55:05,326 INFO L158 Benchmark]: RCFGBuilder took 180494.33ms. Allocated memory was 163.6MB in the beginning and 3.3GB in the end (delta: 3.1GB). Free memory was 75.0MB in the beginning and 2.5GB in the end (delta: -2.4GB). Peak memory consumption was 1.8GB. Max. memory is 16.1GB. [2022-11-03 03:55:05,327 INFO L158 Benchmark]: TraceAbstraction took 324214.60ms. Allocated memory was 3.3GB in the beginning and 3.8GB in the end (delta: 513.8MB). Free memory was 2.5GB in the beginning and 2.9GB in the end (delta: -466.1MB). Peak memory consumption was 1.5GB. Max. memory is 16.1GB. [2022-11-03 03:55:05,327 INFO L158 Benchmark]: Witness Printer took 4.21ms. Allocated memory is still 3.8GB. Free memory was 2.9GB in the beginning and 2.9GB in the end (delta: 1.1MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-11-03 03:55:05,331 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18ms. Allocated memory is still 119.5MB. Free memory is still 75.6MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 899.91ms. Allocated memory was 119.5MB in the beginning and 163.6MB in the end (delta: 44.0MB). Free memory was 88.1MB in the beginning and 115.0MB in the end (delta: -26.9MB). Peak memory consumption was 44.1MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 391.98ms. Allocated memory is still 163.6MB. Free memory was 115.0MB in the beginning and 96.0MB in the end (delta: 19.0MB). Peak memory consumption was 53.3MB. Max. memory is 16.1GB. * Boogie Preprocessor took 204.23ms. Allocated memory is still 163.6MB. Free memory was 96.0MB in the beginning and 75.0MB in the end (delta: 21.0MB). Peak memory consumption was 21.0MB. Max. memory is 16.1GB. * RCFGBuilder took 180494.33ms. Allocated memory was 163.6MB in the beginning and 3.3GB in the end (delta: 3.1GB). Free memory was 75.0MB in the beginning and 2.5GB in the end (delta: -2.4GB). Peak memory consumption was 1.8GB. Max. memory is 16.1GB. * TraceAbstraction took 324214.60ms. Allocated memory was 3.3GB in the beginning and 3.8GB in the end (delta: 513.8MB). Free memory was 2.5GB in the beginning and 2.9GB in the end (delta: -466.1MB). Peak memory consumption was 1.5GB. Max. memory is 16.1GB. * Witness Printer took 4.21ms. Allocated memory is still 3.8GB. Free memory was 2.9GB in the beginning and 2.9GB in the end (delta: 1.1MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 20]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: overapproximation of bitwiseOr at line 229, overapproximation of shiftRight at line 233, overapproximation of bitwiseAnd at line 178, overapproximation of bitwiseComplement at line 231. Possible FailurePath: [L25] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L26] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L28] const SORT_2 mask_SORT_2 = (SORT_2)-1 >> (sizeof(SORT_2) * 8 - 5); [L29] const SORT_2 msb_SORT_2 = (SORT_2)1 << (5 - 1); [L31] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 16); [L32] const SORT_3 msb_SORT_3 = (SORT_3)1 << (16 - 1); [L34] const SORT_4 mask_SORT_4 = (SORT_4)-1 >> (sizeof(SORT_4) * 8 - 32); [L35] const SORT_4 msb_SORT_4 = (SORT_4)1 << (32 - 1); [L37] const SORT_3 var_5 = 0; [L38] const SORT_1 var_14 = 0; [L39] const SORT_4 var_65 = 5; [L40] const SORT_3 var_66 = 0; [L41] const SORT_4 var_68 = 16; [L42] const SORT_4 var_71 = 1; [L43] const SORT_4 var_72 = 0; [L44] const SORT_3 var_79 = 1; [L45] const SORT_3 var_82 = 0; [L46] const SORT_3 var_118 = 3; [L47] const SORT_4 var_248 = 6200; [L48] const SORT_4 var_279 = 999; [L49] const SORT_4 var_281 = 5999; [L50] const SORT_4 var_287 = 1000; [L51] const SORT_4 var_292 = 5800; [L53] SORT_1 input_78; [L54] SORT_1 input_80; [L55] SORT_1 input_81; [L56] SORT_1 input_83; [L57] SORT_1 input_84; [L58] SORT_1 input_85; [L59] SORT_1 input_86; [L60] SORT_1 input_95; [L61] SORT_1 input_96; [L62] SORT_1 input_97; [L63] SORT_1 input_102; [L64] SORT_1 input_105; [L65] SORT_1 input_117; [L66] SORT_1 input_119; [L67] SORT_1 input_122; [L68] SORT_1 input_129; [L69] SORT_1 input_134; [L70] SORT_1 input_138; [L71] SORT_1 input_148; [L72] SORT_1 input_153; [L73] SORT_1 input_157; [L74] SORT_1 input_170; [L75] SORT_1 input_181; [L76] SORT_1 input_185; [L77] SORT_1 input_190; [L78] SORT_1 input_192; [L79] SORT_1 input_196; [L80] SORT_1 input_200; [L81] SORT_1 input_204; [L82] SORT_1 input_214; [L83] SORT_1 input_221; [L84] SORT_1 input_223; [L85] SORT_1 input_229; [L87] SORT_3 state_6 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L88] SORT_3 state_8 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L89] SORT_3 state_10 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L90] SORT_3 state_12 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L91] SORT_1 state_15 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L92] SORT_1 state_17 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L93] SORT_1 state_19 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L94] SORT_1 state_21 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L95] SORT_1 state_23 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L96] SORT_1 state_25 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L97] SORT_1 state_27 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L98] SORT_1 state_29 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L99] SORT_1 state_31 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L100] SORT_1 state_33 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L101] SORT_1 state_35 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L102] SORT_1 state_37 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L103] SORT_1 state_39 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L104] SORT_1 state_41 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L105] SORT_1 state_43 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L106] SORT_1 state_45 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L107] SORT_1 state_47 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L108] SORT_1 state_49 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L109] SORT_1 state_51 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L110] SORT_1 state_53 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L111] SORT_1 state_55 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L112] SORT_1 state_57 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L113] SORT_1 state_59 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L114] SORT_1 state_61 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L115] SORT_1 state_63 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L117] SORT_3 init_7_arg_1 = var_5; [L118] state_6 = init_7_arg_1 [L119] SORT_3 init_9_arg_1 = var_5; [L120] state_8 = init_9_arg_1 [L121] SORT_3 init_11_arg_1 = var_5; [L122] state_10 = init_11_arg_1 [L123] SORT_3 init_13_arg_1 = var_5; [L124] state_12 = init_13_arg_1 [L125] SORT_1 init_16_arg_1 = var_14; [L126] state_15 = init_16_arg_1 [L127] SORT_1 init_18_arg_1 = var_14; [L128] state_17 = init_18_arg_1 [L129] SORT_1 init_20_arg_1 = var_14; [L130] state_19 = init_20_arg_1 [L131] SORT_1 init_22_arg_1 = var_14; [L132] state_21 = init_22_arg_1 [L133] SORT_1 init_24_arg_1 = var_14; [L134] state_23 = init_24_arg_1 [L135] SORT_1 init_26_arg_1 = var_14; [L136] state_25 = init_26_arg_1 [L137] SORT_1 init_28_arg_1 = var_14; [L138] state_27 = init_28_arg_1 [L139] SORT_1 init_30_arg_1 = var_14; [L140] state_29 = init_30_arg_1 [L141] SORT_1 init_32_arg_1 = var_14; [L142] state_31 = init_32_arg_1 [L143] SORT_1 init_34_arg_1 = var_14; [L144] state_33 = init_34_arg_1 [L145] SORT_1 init_36_arg_1 = var_14; [L146] state_35 = init_36_arg_1 [L147] SORT_1 init_38_arg_1 = var_14; [L148] state_37 = init_38_arg_1 [L149] SORT_1 init_40_arg_1 = var_14; [L150] state_39 = init_40_arg_1 [L151] SORT_1 init_42_arg_1 = var_14; [L152] state_41 = init_42_arg_1 [L153] SORT_1 init_44_arg_1 = var_14; [L154] state_43 = init_44_arg_1 [L155] SORT_1 init_46_arg_1 = var_14; [L156] state_45 = init_46_arg_1 [L157] SORT_1 init_48_arg_1 = var_14; [L158] state_47 = init_48_arg_1 [L159] SORT_1 init_50_arg_1 = var_14; [L160] state_49 = init_50_arg_1 [L161] SORT_1 init_52_arg_1 = var_14; [L162] state_51 = init_52_arg_1 [L163] SORT_1 init_54_arg_1 = var_14; [L164] state_53 = init_54_arg_1 [L165] SORT_1 init_56_arg_1 = var_14; [L166] state_55 = init_56_arg_1 [L167] SORT_1 init_58_arg_1 = var_14; [L168] state_57 = init_58_arg_1 [L169] SORT_1 init_60_arg_1 = var_14; [L170] state_59 = init_60_arg_1 [L171] SORT_1 init_62_arg_1 = var_14; [L172] state_61 = init_62_arg_1 [L173] SORT_1 init_64_arg_1 = var_14; [L174] state_63 = init_64_arg_1 VAL [init_11_arg_1=0, init_13_arg_1=0, init_16_arg_1=0, init_18_arg_1=0, init_20_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_28_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, init_44_arg_1=0, init_46_arg_1=0, init_48_arg_1=0, init_50_arg_1=0, init_52_arg_1=0, init_54_arg_1=0, init_56_arg_1=0, init_58_arg_1=0, init_60_arg_1=0, init_62_arg_1=0, init_64_arg_1=0, init_7_arg_1=0, init_9_arg_1=0, mask_SORT_1=1, mask_SORT_2=31, mask_SORT_3=65535, mask_SORT_4=4294967295, msb_SORT_1=1, msb_SORT_2=16, msb_SORT_3=32768, msb_SORT_4=2147483648, state_10=0, state_12=0, state_15=0, state_17=0, state_19=0, state_21=0, state_23=0, state_25=0, state_27=0, state_29=0, state_31=0, state_33=0, state_35=0, state_37=0, state_39=0, state_41=0, state_43=0, state_45=0, state_47=0, state_49=0, state_51=0, state_53=0, state_55=0, state_57=0, state_59=0, state_6=0, state_61=0, state_63=0, state_8=0, var_118=3, var_14=0, var_248=6200, var_279=999, var_281=5999, var_287=1000, var_292=5800, var_5=0, var_65=5, var_66=0, var_68=16, var_71=1, var_72=0, var_79=1, var_82=0] [L177] input_78 = __VERIFIER_nondet_uchar() [L178] input_78 = input_78 & mask_SORT_1 [L179] input_80 = __VERIFIER_nondet_uchar() [L180] input_80 = input_80 & mask_SORT_1 [L181] input_81 = __VERIFIER_nondet_uchar() [L182] input_81 = input_81 & mask_SORT_1 [L183] input_83 = __VERIFIER_nondet_uchar() [L184] input_83 = input_83 & mask_SORT_1 [L185] input_84 = __VERIFIER_nondet_uchar() [L186] input_84 = input_84 & mask_SORT_1 [L187] input_85 = __VERIFIER_nondet_uchar() [L188] input_85 = input_85 & mask_SORT_1 [L189] input_86 = __VERIFIER_nondet_uchar() [L190] input_86 = input_86 & mask_SORT_1 [L191] input_95 = __VERIFIER_nondet_uchar() [L192] input_95 = input_95 & mask_SORT_1 [L193] input_96 = __VERIFIER_nondet_uchar() [L194] input_96 = input_96 & mask_SORT_1 [L195] input_97 = __VERIFIER_nondet_uchar() [L196] input_97 = input_97 & mask_SORT_1 [L197] input_102 = __VERIFIER_nondet_uchar() [L198] input_102 = input_102 & mask_SORT_1 [L199] input_105 = __VERIFIER_nondet_uchar() [L200] input_105 = input_105 & mask_SORT_1 [L201] input_117 = __VERIFIER_nondet_uchar() [L202] input_117 = input_117 & mask_SORT_1 [L203] input_119 = __VERIFIER_nondet_uchar() [L204] input_119 = input_119 & mask_SORT_1 [L205] input_122 = __VERIFIER_nondet_uchar() [L206] input_122 = input_122 & mask_SORT_1 [L207] input_129 = __VERIFIER_nondet_uchar() [L208] input_134 = __VERIFIER_nondet_uchar() [L209] input_138 = __VERIFIER_nondet_uchar() [L210] input_148 = __VERIFIER_nondet_uchar() [L211] input_153 = __VERIFIER_nondet_uchar() [L212] input_157 = __VERIFIER_nondet_uchar() [L213] input_170 = __VERIFIER_nondet_uchar() [L214] input_181 = __VERIFIER_nondet_uchar() [L215] input_185 = __VERIFIER_nondet_uchar() [L216] input_190 = __VERIFIER_nondet_uchar() [L217] input_192 = __VERIFIER_nondet_uchar() [L218] input_196 = __VERIFIER_nondet_uchar() [L219] input_200 = __VERIFIER_nondet_uchar() [L220] input_204 = __VERIFIER_nondet_uchar() [L221] input_214 = __VERIFIER_nondet_uchar() [L222] input_221 = __VERIFIER_nondet_uchar() [L223] input_223 = __VERIFIER_nondet_uchar() [L224] input_229 = __VERIFIER_nondet_uchar() [L227] SORT_3 var_67_arg_0 = state_12; [L228] SORT_3 var_67_arg_1 = var_66; [L229] SORT_4 var_67 = ((SORT_4)var_67_arg_0 << 16) | var_67_arg_1; [L230] SORT_4 var_69_arg_0 = var_67; [L231] EXPR (var_69_arg_0 & msb_SORT_4) ? (var_69_arg_0 | ~mask_SORT_4) : (var_69_arg_0 & mask_SORT_4) [L231] var_69_arg_0 = (var_69_arg_0 & msb_SORT_4) ? (var_69_arg_0 | ~mask_SORT_4) : (var_69_arg_0 & mask_SORT_4) [L232] SORT_4 var_69_arg_1 = var_68; [L233] SORT_4 var_69 = (int)var_69_arg_0 >> var_69_arg_1; [L234] EXPR (var_69_arg_0 & msb_SORT_4) ? (var_69 | ~(mask_SORT_4 >> var_69_arg_1)) : var_69 [L234] var_69 = (var_69_arg_0 & msb_SORT_4) ? (var_69 | ~(mask_SORT_4 >> var_69_arg_1)) : var_69 [L235] var_69 = var_69 & mask_SORT_4 [L236] SORT_4 var_70_arg_0 = var_65; [L237] SORT_4 var_70_arg_1 = var_69; [L238] SORT_1 var_70 = var_70_arg_0 == var_70_arg_1; [L239] SORT_1 var_73_arg_0 = state_43; [L240] SORT_4 var_73_arg_1 = var_71; [L241] SORT_4 var_73_arg_2 = var_72; [L242] EXPR var_73_arg_0 ? var_73_arg_1 : var_73_arg_2 [L242] SORT_4 var_73 = var_73_arg_0 ? var_73_arg_1 : var_73_arg_2; [L243] var_73 = var_73 & mask_SORT_4 [L244] SORT_4 var_74_arg_0 = var_71; [L245] SORT_4 var_74_arg_1 = var_73; [L246] SORT_1 var_74 = var_74_arg_0 == var_74_arg_1; [L247] SORT_1 var_75_arg_0 = ~var_70; [L248] var_75_arg_0 = var_75_arg_0 & mask_SORT_1 [L249] SORT_1 var_75_arg_1 = var_74; [L250] SORT_1 var_75 = var_75_arg_0 & var_75_arg_1; [L251] SORT_1 var_76_arg_0 = ~state_63; [L252] var_76_arg_0 = var_76_arg_0 & mask_SORT_1 [L253] SORT_1 var_76_arg_1 = var_75; [L254] SORT_1 var_76 = var_76_arg_0 & var_76_arg_1; [L255] var_76 = var_76 & mask_SORT_1 [L256] SORT_1 bad_77_arg_0 = var_76; [L257] CALL __VERIFIER_assert(!(bad_77_arg_0)) [L20] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L257] RET __VERIFIER_assert(!(bad_77_arg_0)) [L259] SORT_1 var_87_arg_0 = input_86; [L260] SORT_3 var_87_arg_1 = var_79; [L261] SORT_3 var_87_arg_2 = state_6; [L262] EXPR var_87_arg_0 ? var_87_arg_1 : var_87_arg_2 [L262] SORT_3 var_87 = var_87_arg_0 ? var_87_arg_1 : var_87_arg_2; [L263] SORT_1 var_88_arg_0 = input_85; [L264] SORT_3 var_88_arg_1 = var_82; [L265] SORT_3 var_88_arg_2 = var_87; [L266] EXPR var_88_arg_0 ? var_88_arg_1 : var_88_arg_2 [L266] SORT_3 var_88 = var_88_arg_0 ? var_88_arg_1 : var_88_arg_2; [L267] SORT_1 var_89_arg_0 = input_84; [L268] SORT_3 var_89_arg_1 = var_79; [L269] SORT_3 var_89_arg_2 = var_88; [L270] EXPR var_89_arg_0 ? var_89_arg_1 : var_89_arg_2 [L270] SORT_3 var_89 = var_89_arg_0 ? var_89_arg_1 : var_89_arg_2; [L271] SORT_1 var_90_arg_0 = input_83; [L272] SORT_3 var_90_arg_1 = var_79; [L273] SORT_3 var_90_arg_2 = var_89; [L274] EXPR var_90_arg_0 ? var_90_arg_1 : var_90_arg_2 [L274] SORT_3 var_90 = var_90_arg_0 ? var_90_arg_1 : var_90_arg_2; [L275] SORT_1 var_91_arg_0 = input_81; [L276] SORT_3 var_91_arg_1 = var_82; [L277] SORT_3 var_91_arg_2 = var_90; [L278] EXPR var_91_arg_0 ? var_91_arg_1 : var_91_arg_2 [L278] SORT_3 var_91 = var_91_arg_0 ? var_91_arg_1 : var_91_arg_2; [L279] SORT_1 var_92_arg_0 = input_80; [L280] SORT_3 var_92_arg_1 = var_79; [L281] SORT_3 var_92_arg_2 = var_91; [L282] EXPR var_92_arg_0 ? var_92_arg_1 : var_92_arg_2 [L282] SORT_3 var_92 = var_92_arg_0 ? var_92_arg_1 : var_92_arg_2; [L283] SORT_1 var_93_arg_0 = input_78; [L284] SORT_3 var_93_arg_1 = var_79; [L285] SORT_3 var_93_arg_2 = var_92; [L286] EXPR var_93_arg_0 ? var_93_arg_1 : var_93_arg_2 [L286] SORT_3 var_93 = var_93_arg_0 ? var_93_arg_1 : var_93_arg_2; [L287] SORT_3 next_94_arg_1 = var_93; [L288] SORT_3 var_98_arg_0 = state_8; [L289] SORT_3 var_98_arg_1 = var_66; [L290] SORT_4 var_98 = ((SORT_4)var_98_arg_0 << 16) | var_98_arg_1; [L291] SORT_4 var_99_arg_0 = var_98; [L292] EXPR (var_99_arg_0 & msb_SORT_4) ? (var_99_arg_0 | ~mask_SORT_4) : (var_99_arg_0 & mask_SORT_4) [L292] var_99_arg_0 = (var_99_arg_0 & msb_SORT_4) ? (var_99_arg_0 | ~mask_SORT_4) : (var_99_arg_0 & mask_SORT_4) [L293] SORT_4 var_99_arg_1 = var_68; [L294] SORT_4 var_99 = (int)var_99_arg_0 >> var_99_arg_1; [L295] EXPR (var_99_arg_0 & msb_SORT_4) ? (var_99 | ~(mask_SORT_4 >> var_99_arg_1)) : var_99 [L295] var_99 = (var_99_arg_0 & msb_SORT_4) ? (var_99 | ~(mask_SORT_4 >> var_99_arg_1)) : var_99 [L296] var_99 = var_99 & mask_SORT_4 [L297] SORT_4 var_100_arg_0 = var_99; [L298] SORT_4 var_100_arg_1 = var_71; [L299] SORT_4 var_100 = var_100_arg_0 - var_100_arg_1; [L300] SORT_4 var_101_arg_0 = var_100; [L301] SORT_3 var_101 = var_101_arg_0 >> 0; [L302] SORT_4 var_103_arg_0 = var_71; [L303] SORT_4 var_103_arg_1 = var_99; [L304] SORT_4 var_103 = var_103_arg_0 + var_103_arg_1; [L305] SORT_4 var_104_arg_0 = var_103; [L306] SORT_3 var_104 = var_104_arg_0 >> 0; [L307] SORT_1 var_106_arg_0 = input_105; [L308] SORT_3 var_106_arg_1 = var_104; [L309] SORT_3 var_106_arg_2 = state_8; [L310] EXPR var_106_arg_0 ? var_106_arg_1 : var_106_arg_2 [L310] SORT_3 var_106 = var_106_arg_0 ? var_106_arg_1 : var_106_arg_2; [L311] SORT_1 var_107_arg_0 = input_86; [L312] SORT_3 var_107_arg_1 = var_101; [L313] SORT_3 var_107_arg_2 = var_106; [L314] EXPR var_107_arg_0 ? var_107_arg_1 : var_107_arg_2 [L314] SORT_3 var_107 = var_107_arg_0 ? var_107_arg_1 : var_107_arg_2; [L315] SORT_1 var_108_arg_0 = input_85; [L316] SORT_3 var_108_arg_1 = var_101; [L317] SORT_3 var_108_arg_2 = var_107; [L318] EXPR var_108_arg_0 ? var_108_arg_1 : var_108_arg_2 [L318] SORT_3 var_108 = var_108_arg_0 ? var_108_arg_1 : var_108_arg_2; [L319] SORT_1 var_109_arg_0 = input_102; [L320] SORT_3 var_109_arg_1 = var_104; [L321] SORT_3 var_109_arg_2 = var_108; [L322] EXPR var_109_arg_0 ? var_109_arg_1 : var_109_arg_2 [L322] SORT_3 var_109 = var_109_arg_0 ? var_109_arg_1 : var_109_arg_2; [L323] SORT_1 var_110_arg_0 = input_83; [L324] SORT_3 var_110_arg_1 = var_101; [L325] SORT_3 var_110_arg_2 = var_109; [L326] EXPR var_110_arg_0 ? var_110_arg_1 : var_110_arg_2 [L326] SORT_3 var_110 = var_110_arg_0 ? var_110_arg_1 : var_110_arg_2; [L327] SORT_1 var_111_arg_0 = input_81; [L328] SORT_3 var_111_arg_1 = var_101; [L329] SORT_3 var_111_arg_2 = var_110; [L330] EXPR var_111_arg_0 ? var_111_arg_1 : var_111_arg_2 [L330] SORT_3 var_111 = var_111_arg_0 ? var_111_arg_1 : var_111_arg_2; [L331] SORT_1 var_112_arg_0 = input_97; [L332] SORT_3 var_112_arg_1 = var_82; [L333] SORT_3 var_112_arg_2 = var_111; [L334] EXPR var_112_arg_0 ? var_112_arg_1 : var_112_arg_2 [L334] SORT_3 var_112 = var_112_arg_0 ? var_112_arg_1 : var_112_arg_2; [L335] SORT_1 var_113_arg_0 = input_96; [L336] SORT_3 var_113_arg_1 = var_82; [L337] SORT_3 var_113_arg_2 = var_112; [L338] EXPR var_113_arg_0 ? var_113_arg_1 : var_113_arg_2 [L338] SORT_3 var_113 = var_113_arg_0 ? var_113_arg_1 : var_113_arg_2; [L339] SORT_1 var_114_arg_0 = input_95; [L340] SORT_3 var_114_arg_1 = var_82; [L341] SORT_3 var_114_arg_2 = var_113; [L342] EXPR var_114_arg_0 ? var_114_arg_1 : var_114_arg_2 [L342] SORT_3 var_114 = var_114_arg_0 ? var_114_arg_1 : var_114_arg_2; [L343] SORT_3 next_115_arg_1 = var_114; [L344] SORT_3 next_116_arg_1 = state_10; [L345] SORT_4 var_120_arg_0 = var_71; [L346] SORT_4 var_120_arg_1 = var_69; [L347] SORT_4 var_120 = var_120_arg_0 + var_120_arg_1; [L348] SORT_4 var_121_arg_0 = var_120; [L349] SORT_3 var_121 = var_121_arg_0 >> 0; [L350] SORT_4 var_123_arg_0 = var_69; [L351] SORT_4 var_123_arg_1 = var_71; [L352] SORT_4 var_123 = var_123_arg_0 - var_123_arg_1; [L353] SORT_4 var_124_arg_0 = var_123; [L354] SORT_3 var_124 = var_124_arg_0 >> 0; [L355] SORT_1 var_125_arg_0 = input_122; [L356] SORT_3 var_125_arg_1 = var_124; [L357] SORT_3 var_125_arg_2 = state_12; [L358] EXPR var_125_arg_0 ? var_125_arg_1 : var_125_arg_2 [L358] SORT_3 var_125 = var_125_arg_0 ? var_125_arg_1 : var_125_arg_2; [L359] SORT_1 var_126_arg_0 = input_119; [L360] SORT_3 var_126_arg_1 = var_121; [L361] SORT_3 var_126_arg_2 = var_125; [L362] EXPR var_126_arg_0 ? var_126_arg_1 : var_126_arg_2 [L362] SORT_3 var_126 = var_126_arg_0 ? var_126_arg_1 : var_126_arg_2; [L363] SORT_1 var_127_arg_0 = input_117; [L364] SORT_3 var_127_arg_1 = var_118; [L365] SORT_3 var_127_arg_2 = var_126; [L366] EXPR var_127_arg_0 ? var_127_arg_1 : var_127_arg_2 [L366] SORT_3 var_127 = var_127_arg_0 ? var_127_arg_1 : var_127_arg_2; [L367] SORT_3 next_128_arg_1 = var_127; [L368] SORT_1 var_130_arg_0 = state_15; [L369] SORT_1 var_130_arg_1 = input_129; [L370] SORT_1 var_130 = var_130_arg_0 | var_130_arg_1; [L371] SORT_1 var_131_arg_0 = var_130; [L372] SORT_1 var_131_arg_1 = input_86; [L373] SORT_1 var_131 = var_131_arg_0 | var_131_arg_1; [L374] SORT_1 var_132_arg_0 = var_131; [L375] SORT_1 var_132_arg_1 = ~input_85; [L376] var_132_arg_1 = var_132_arg_1 & mask_SORT_1 [L377] SORT_1 var_132 = var_132_arg_0 & var_132_arg_1; [L378] SORT_1 var_133_arg_0 = var_132; [L379] SORT_1 var_133_arg_1 = input_84; [L380] SORT_1 var_133 = var_133_arg_0 | var_133_arg_1; [L381] SORT_1 var_135_arg_0 = var_133; [L382] SORT_1 var_135_arg_1 = ~input_134; [L383] var_135_arg_1 = var_135_arg_1 & mask_SORT_1 [L384] SORT_1 var_135 = var_135_arg_0 & var_135_arg_1; [L385] SORT_1 next_136_arg_1 = var_135; [L386] SORT_1 var_137_arg_0 = state_17; [L387] SORT_1 var_137_arg_1 = ~input_129; [L388] var_137_arg_1 = var_137_arg_1 & mask_SORT_1 [L389] SORT_1 var_137 = var_137_arg_0 & var_137_arg_1; [L390] SORT_1 var_139_arg_0 = var_137; [L391] SORT_1 var_139_arg_1 = ~input_138; [L392] var_139_arg_1 = var_139_arg_1 & mask_SORT_1 [L393] SORT_1 var_139 = var_139_arg_0 & var_139_arg_1; [L394] SORT_1 var_140_arg_0 = var_139; [L395] SORT_1 var_140_arg_1 = input_134; [L396] SORT_1 var_140 = var_140_arg_0 | var_140_arg_1; [L397] SORT_1 next_141_arg_1 = var_140; [L398] SORT_1 var_142_arg_0 = state_19; [L399] SORT_1 var_142_arg_1 = ~input_86; [L400] var_142_arg_1 = var_142_arg_1 & mask_SORT_1 [L401] SORT_1 var_142 = var_142_arg_0 & var_142_arg_1; [L402] SORT_1 var_143_arg_0 = var_142; [L403] SORT_1 var_143_arg_1 = input_85; [L404] SORT_1 var_143 = var_143_arg_0 | var_143_arg_1; [L405] SORT_1 var_144_arg_0 = var_143; [L406] SORT_1 var_144_arg_1 = input_138; [L407] SORT_1 var_144 = var_144_arg_0 | var_144_arg_1; [L408] SORT_1 next_145_arg_1 = var_144; [L409] SORT_1 var_146_arg_0 = ~state_21; [L410] var_146_arg_0 = var_146_arg_0 & mask_SORT_1 [L411] SORT_1 var_146_arg_1 = ~input_84; [L412] var_146_arg_1 = var_146_arg_1 & mask_SORT_1 [L413] SORT_1 var_146 = var_146_arg_0 & var_146_arg_1; [L414] SORT_1 next_147_arg_1 = ~var_146; [L415] next_147_arg_1 = next_147_arg_1 & mask_SORT_1 [L416] SORT_1 var_149_arg_0 = state_23; [L417] SORT_1 var_149_arg_1 = input_148; [L418] SORT_1 var_149 = var_149_arg_0 | var_149_arg_1; [L419] SORT_1 var_150_arg_0 = var_149; [L420] SORT_1 var_150_arg_1 = input_83; [L421] SORT_1 var_150 = var_150_arg_0 | var_150_arg_1; [L422] SORT_1 var_151_arg_0 = var_150; [L423] SORT_1 var_151_arg_1 = ~input_81; [L424] var_151_arg_1 = var_151_arg_1 & mask_SORT_1 [L425] SORT_1 var_151 = var_151_arg_0 & var_151_arg_1; [L426] SORT_1 var_152_arg_0 = var_151; [L427] SORT_1 var_152_arg_1 = input_80; [L428] SORT_1 var_152 = var_152_arg_0 | var_152_arg_1; [L429] SORT_1 var_154_arg_0 = var_152; [L430] SORT_1 var_154_arg_1 = ~input_153; [L431] var_154_arg_1 = var_154_arg_1 & mask_SORT_1 [L432] SORT_1 var_154 = var_154_arg_0 & var_154_arg_1; [L433] SORT_1 next_155_arg_1 = var_154; [L434] SORT_1 var_156_arg_0 = state_25; [L435] SORT_1 var_156_arg_1 = ~input_148; [L436] var_156_arg_1 = var_156_arg_1 & mask_SORT_1 [L437] SORT_1 var_156 = var_156_arg_0 & var_156_arg_1; [L438] SORT_1 var_158_arg_0 = var_156; [L439] SORT_1 var_158_arg_1 = ~input_157; [L440] var_158_arg_1 = var_158_arg_1 & mask_SORT_1 [L441] SORT_1 var_158 = var_158_arg_0 & var_158_arg_1; [L442] SORT_1 var_159_arg_0 = var_158; [L443] SORT_1 var_159_arg_1 = input_153; [L444] SORT_1 var_159 = var_159_arg_0 | var_159_arg_1; [L445] SORT_1 next_160_arg_1 = var_159; [L446] SORT_1 var_161_arg_0 = state_27; [L447] SORT_1 var_161_arg_1 = ~input_83; [L448] var_161_arg_1 = var_161_arg_1 & mask_SORT_1 [L449] SORT_1 var_161 = var_161_arg_0 & var_161_arg_1; [L450] SORT_1 var_162_arg_0 = var_161; [L451] SORT_1 var_162_arg_1 = input_81; [L452] SORT_1 var_162 = var_162_arg_0 | var_162_arg_1; [L453] SORT_1 var_163_arg_0 = var_162; [L454] SORT_1 var_163_arg_1 = input_157; [L455] SORT_1 var_163 = var_163_arg_0 | var_163_arg_1; [L456] SORT_1 next_164_arg_1 = var_163; [L457] SORT_1 var_165_arg_0 = ~state_29; [L458] var_165_arg_0 = var_165_arg_0 & mask_SORT_1 [L459] SORT_1 var_165_arg_1 = ~input_80; [L460] var_165_arg_1 = var_165_arg_1 & mask_SORT_1 [L461] SORT_1 var_165 = var_165_arg_0 & var_165_arg_1; [L462] SORT_1 next_166_arg_1 = ~var_165; [L463] next_166_arg_1 = next_166_arg_1 & mask_SORT_1 [L464] SORT_1 var_167_arg_0 = state_31; [L465] SORT_1 var_167_arg_1 = ~input_97; [L466] var_167_arg_1 = var_167_arg_1 & mask_SORT_1 [L467] SORT_1 var_167 = var_167_arg_0 & var_167_arg_1; [L468] SORT_1 var_168_arg_0 = var_167; [L469] SORT_1 var_168_arg_1 = ~input_96; [L470] var_168_arg_1 = var_168_arg_1 & mask_SORT_1 [L471] SORT_1 var_168 = var_168_arg_0 & var_168_arg_1; [L472] SORT_1 var_169_arg_0 = var_168; [L473] SORT_1 var_169_arg_1 = ~input_95; [L474] var_169_arg_1 = var_169_arg_1 & mask_SORT_1 [L475] SORT_1 var_169 = var_169_arg_0 & var_169_arg_1; [L476] SORT_1 var_171_arg_0 = var_169; [L477] SORT_1 var_171_arg_1 = input_170; [L478] SORT_1 var_171 = var_171_arg_0 | var_171_arg_1; [L479] SORT_1 next_172_arg_1 = var_171; [L480] SORT_1 var_173_arg_0 = state_33; [L481] SORT_1 var_173_arg_1 = input_122; [L482] SORT_1 var_173 = var_173_arg_0 | var_173_arg_1; [L483] SORT_1 var_174_arg_0 = var_173; [L484] SORT_1 var_174_arg_1 = input_119; [L485] SORT_1 var_174 = var_174_arg_0 | var_174_arg_1; [L486] SORT_1 var_175_arg_0 = var_174; [L487] SORT_1 var_175_arg_1 = input_117; [L488] SORT_1 var_175 = var_175_arg_0 | var_175_arg_1; [L489] SORT_1 var_176_arg_0 = var_175; [L490] SORT_1 var_176_arg_1 = ~input_134; [L491] var_176_arg_1 = var_176_arg_1 & mask_SORT_1 [L492] SORT_1 var_176 = var_176_arg_0 & var_176_arg_1; [L493] SORT_1 var_177_arg_0 = var_176; [L494] SORT_1 var_177_arg_1 = ~input_153; [L495] var_177_arg_1 = var_177_arg_1 & mask_SORT_1 [L496] SORT_1 var_177 = var_177_arg_0 & var_177_arg_1; [L497] SORT_1 next_178_arg_1 = var_177; [L498] SORT_1 var_179_arg_0 = state_35; [L499] SORT_1 var_179_arg_1 = input_96; [L500] SORT_1 var_179 = var_179_arg_0 | var_179_arg_1; [L501] SORT_1 var_180_arg_0 = var_179; [L502] SORT_1 var_180_arg_1 = ~input_122; [L503] var_180_arg_1 = var_180_arg_1 & mask_SORT_1 [L504] SORT_1 var_180 = var_180_arg_0 & var_180_arg_1; [L505] SORT_1 var_182_arg_0 = var_180; [L506] SORT_1 var_182_arg_1 = ~input_181; [L507] var_182_arg_1 = var_182_arg_1 & mask_SORT_1 [L508] SORT_1 var_182 = var_182_arg_0 & var_182_arg_1; [L509] SORT_1 next_183_arg_1 = var_182; [L510] SORT_1 var_184_arg_0 = state_37; [L511] SORT_1 var_184_arg_1 = input_97; [L512] SORT_1 var_184 = var_184_arg_0 | var_184_arg_1; [L513] SORT_1 var_186_arg_0 = var_184; [L514] SORT_1 var_186_arg_1 = ~input_185; [L515] var_186_arg_1 = var_186_arg_1 & mask_SORT_1 [L516] SORT_1 var_186 = var_186_arg_0 & var_186_arg_1; [L517] SORT_1 next_187_arg_1 = var_186; [L518] SORT_1 var_188_arg_0 = state_39; [L519] SORT_1 var_188_arg_1 = input_95; [L520] SORT_1 var_188 = var_188_arg_0 | var_188_arg_1; [L521] SORT_1 var_189_arg_0 = var_188; [L522] SORT_1 var_189_arg_1 = ~input_119; [L523] var_189_arg_1 = var_189_arg_1 & mask_SORT_1 [L524] SORT_1 var_189 = var_189_arg_0 & var_189_arg_1; [L525] SORT_1 var_191_arg_0 = var_189; [L526] SORT_1 var_191_arg_1 = ~input_190; [L527] var_191_arg_1 = var_191_arg_1 & mask_SORT_1 [L528] SORT_1 var_191 = var_191_arg_0 & var_191_arg_1; [L529] SORT_1 var_193_arg_0 = var_191; [L530] SORT_1 var_193_arg_1 = input_192; [L531] SORT_1 var_193 = var_193_arg_0 | var_193_arg_1; [L532] SORT_1 next_194_arg_1 = var_193; [L533] SORT_1 var_195_arg_0 = state_41; [L534] SORT_1 var_195_arg_1 = input_181; [L535] SORT_1 var_195 = var_195_arg_0 | var_195_arg_1; [L536] SORT_1 var_197_arg_0 = var_195; [L537] SORT_1 var_197_arg_1 = ~input_196; [L538] var_197_arg_1 = var_197_arg_1 & mask_SORT_1 [L539] SORT_1 var_197 = var_197_arg_0 & var_197_arg_1; [L540] SORT_1 next_198_arg_1 = var_197; [L541] SORT_1 var_199_arg_0 = state_43; [L542] SORT_1 var_199_arg_1 = input_190; [L543] SORT_1 var_199 = var_199_arg_0 | var_199_arg_1; [L544] SORT_1 var_201_arg_0 = var_199; [L545] SORT_1 var_201_arg_1 = ~input_200; [L546] var_201_arg_1 = var_201_arg_1 & mask_SORT_1 [L547] SORT_1 var_201 = var_201_arg_0 & var_201_arg_1; [L548] var_201 = var_201 & mask_SORT_1 [L549] SORT_1 next_202_arg_1 = var_201; [L550] SORT_1 var_203_arg_0 = ~state_45; [L551] var_203_arg_0 = var_203_arg_0 & mask_SORT_1 [L552] SORT_1 var_203_arg_1 = ~input_117; [L553] var_203_arg_1 = var_203_arg_1 & mask_SORT_1 [L554] SORT_1 var_203 = var_203_arg_0 & var_203_arg_1; [L555] SORT_1 var_205_arg_0 = var_203; [L556] SORT_1 var_205_arg_1 = input_204; [L557] SORT_1 var_205 = var_205_arg_0 | var_205_arg_1; [L558] SORT_1 next_206_arg_1 = ~var_205; [L559] next_206_arg_1 = next_206_arg_1 & mask_SORT_1 [L560] SORT_1 var_207_arg_0 = state_47; [L561] SORT_1 var_207_arg_1 = input_196; [L562] SORT_1 var_207 = var_207_arg_0 | var_207_arg_1; [L563] SORT_1 var_208_arg_0 = var_207; [L564] SORT_1 var_208_arg_1 = input_200; [L565] SORT_1 var_208 = var_208_arg_0 | var_208_arg_1; [L566] SORT_1 var_209_arg_0 = var_208; [L567] SORT_1 var_209_arg_1 = input_185; [L568] SORT_1 var_209 = var_209_arg_0 | var_209_arg_1; [L569] SORT_1 var_210_arg_0 = var_209; [L570] SORT_1 var_210_arg_1 = ~input_204; [L571] var_210_arg_1 = var_210_arg_1 & mask_SORT_1 [L572] SORT_1 var_210 = var_210_arg_0 & var_210_arg_1; [L573] SORT_1 next_211_arg_1 = var_210; [L574] SORT_1 var_212_arg_0 = state_49; [L575] SORT_1 var_212_arg_1 = input_134; [L576] SORT_1 var_212 = var_212_arg_0 | var_212_arg_1; [L577] SORT_1 var_213_arg_0 = var_212; [L578] SORT_1 var_213_arg_1 = input_153; [L579] SORT_1 var_213 = var_213_arg_0 | var_213_arg_1; [L580] SORT_1 var_215_arg_0 = var_213; [L581] SORT_1 var_215_arg_1 = ~input_214; [L582] var_215_arg_1 = var_215_arg_1 & mask_SORT_1 [L583] SORT_1 var_215 = var_215_arg_0 & var_215_arg_1; [L584] SORT_1 next_216_arg_1 = var_215; [L585] SORT_1 var_217_arg_0 = state_51; [L586] SORT_1 var_217_arg_1 = input_214; [L587] SORT_1 var_217 = var_217_arg_0 | var_217_arg_1; [L588] SORT_1 var_218_arg_0 = var_217; [L589] SORT_1 var_218_arg_1 = ~input_170; [L590] var_218_arg_1 = var_218_arg_1 & mask_SORT_1 [L591] SORT_1 var_218 = var_218_arg_0 & var_218_arg_1; [L592] SORT_1 var_219_arg_0 = var_218; [L593] SORT_1 var_219_arg_1 = ~input_192; [L594] var_219_arg_1 = var_219_arg_1 & mask_SORT_1 [L595] SORT_1 var_219 = var_219_arg_0 & var_219_arg_1; [L596] SORT_1 next_220_arg_1 = var_219; [L597] SORT_1 var_222_arg_0 = state_53; [L598] SORT_1 var_222_arg_1 = ~input_221; [L599] var_222_arg_1 = var_222_arg_1 & mask_SORT_1 [L600] SORT_1 var_222 = var_222_arg_0 & var_222_arg_1; [L601] SORT_1 var_224_arg_0 = var_222; [L602] SORT_1 var_224_arg_1 = ~input_223; [L603] var_224_arg_1 = var_224_arg_1 & mask_SORT_1 [L604] SORT_1 var_224 = var_224_arg_0 & var_224_arg_1; [L605] SORT_1 var_225_arg_0 = var_224; [L606] SORT_1 var_225_arg_1 = input_214; [L607] SORT_1 var_225 = var_225_arg_0 | var_225_arg_1; [L608] SORT_1 next_226_arg_1 = var_225; [L609] SORT_1 var_227_arg_0 = state_55; [L610] SORT_1 var_227_arg_1 = input_221; [L611] SORT_1 var_227 = var_227_arg_0 | var_227_arg_1; [L612] SORT_1 var_228_arg_0 = var_227; [L613] SORT_1 var_228_arg_1 = ~input_78; [L614] var_228_arg_1 = var_228_arg_1 & mask_SORT_1 [L615] SORT_1 var_228 = var_228_arg_0 & var_228_arg_1; [L616] SORT_1 var_230_arg_0 = var_228; [L617] SORT_1 var_230_arg_1 = ~input_229; [L618] var_230_arg_1 = var_230_arg_1 & mask_SORT_1 [L619] SORT_1 var_230 = var_230_arg_0 & var_230_arg_1; [L620] SORT_1 next_231_arg_1 = var_230; [L621] SORT_1 var_232_arg_0 = state_57; [L622] SORT_1 var_232_arg_1 = input_223; [L623] SORT_1 var_232 = var_232_arg_0 | var_232_arg_1; [L624] SORT_1 var_233_arg_0 = var_232; [L625] SORT_1 var_233_arg_1 = input_229; [L626] SORT_1 var_233 = var_233_arg_0 | var_233_arg_1; [L627] SORT_1 var_234_arg_0 = var_233; [L628] SORT_1 var_234_arg_1 = ~input_192; [L629] var_234_arg_1 = var_234_arg_1 & mask_SORT_1 [L630] SORT_1 var_234 = var_234_arg_0 & var_234_arg_1; [L631] SORT_1 next_235_arg_1 = var_234; [L632] SORT_1 var_236_arg_0 = ~state_59; [L633] var_236_arg_0 = var_236_arg_0 & mask_SORT_1 [L634] SORT_1 var_236_arg_1 = ~input_214; [L635] var_236_arg_1 = var_236_arg_1 & mask_SORT_1 [L636] SORT_1 var_236 = var_236_arg_0 & var_236_arg_1; [L637] SORT_1 var_237_arg_0 = var_236; [L638] SORT_1 var_237_arg_1 = input_170; [L639] SORT_1 var_237 = var_237_arg_0 | var_237_arg_1; [L640] SORT_1 var_238_arg_0 = var_237; [L641] SORT_1 var_238_arg_1 = input_192; [L642] SORT_1 var_238 = var_238_arg_0 | var_238_arg_1; [L643] SORT_1 next_239_arg_1 = ~var_238; [L644] next_239_arg_1 = next_239_arg_1 & mask_SORT_1 [L645] SORT_1 var_240_arg_0 = state_61; [L646] SORT_1 var_240_arg_1 = input_78; [L647] SORT_1 var_240 = var_240_arg_0 | var_240_arg_1; [L648] SORT_1 var_241_arg_0 = var_240; [L649] SORT_1 var_241_arg_1 = ~input_170; [L650] var_241_arg_1 = var_241_arg_1 & mask_SORT_1 [L651] SORT_1 var_241 = var_241_arg_0 & var_241_arg_1; [L652] SORT_1 next_242_arg_1 = var_241; [L653] SORT_3 var_243_arg_0 = state_6; [L654] SORT_3 var_243_arg_1 = var_66; [L655] SORT_4 var_243 = ((SORT_4)var_243_arg_0 << 16) | var_243_arg_1; [L656] SORT_4 var_244_arg_0 = var_243; [L657] EXPR (var_244_arg_0 & msb_SORT_4) ? (var_244_arg_0 | ~mask_SORT_4) : (var_244_arg_0 & mask_SORT_4) [L657] var_244_arg_0 = (var_244_arg_0 & msb_SORT_4) ? (var_244_arg_0 | ~mask_SORT_4) : (var_244_arg_0 & mask_SORT_4) [L658] SORT_4 var_244_arg_1 = var_68; [L659] SORT_4 var_244 = (int)var_244_arg_0 >> var_244_arg_1; [L660] EXPR (var_244_arg_0 & msb_SORT_4) ? (var_244 | ~(mask_SORT_4 >> var_244_arg_1)) : var_244 [L660] var_244 = (var_244_arg_0 & msb_SORT_4) ? (var_244 | ~(mask_SORT_4 >> var_244_arg_1)) : var_244 [L661] var_244 = var_244 & mask_SORT_4 [L662] SORT_4 var_245_arg_0 = var_71; [L663] SORT_4 var_245_arg_1 = var_244; [L664] SORT_1 var_245 = var_245_arg_0 == var_245_arg_1; [L665] SORT_1 var_246_arg_0 = state_17; [L666] SORT_1 var_246_arg_1 = var_245; [L667] SORT_1 var_246 = var_246_arg_0 & var_246_arg_1; [L668] SORT_1 var_247_arg_0 = ~input_129; [L669] var_247_arg_0 = var_247_arg_0 & mask_SORT_1 [L670] SORT_1 var_247_arg_1 = var_246; [L671] SORT_1 var_247 = var_247_arg_0 | var_247_arg_1; [L672] SORT_4 var_249_arg_0 = var_248; [L673] SORT_4 var_249_arg_1 = var_99; [L674] SORT_1 var_249 = var_249_arg_0 <= var_249_arg_1; [L675] SORT_1 var_250_arg_0 = var_245; [L676] SORT_1 var_250_arg_1 = ~var_249; [L677] var_250_arg_1 = var_250_arg_1 & mask_SORT_1 [L678] SORT_1 var_250 = var_250_arg_0 & var_250_arg_1; [L679] SORT_1 var_251_arg_0 = state_15; [L680] SORT_1 var_251_arg_1 = var_250; [L681] SORT_1 var_251 = var_251_arg_0 & var_251_arg_1; [L682] SORT_1 var_252_arg_0 = ~input_105; [L683] var_252_arg_0 = var_252_arg_0 & mask_SORT_1 [L684] SORT_1 var_252_arg_1 = var_251; [L685] SORT_1 var_252 = var_252_arg_0 | var_252_arg_1; [L686] SORT_1 var_253_arg_0 = var_247; [L687] SORT_1 var_253_arg_1 = var_252; [L688] SORT_1 var_253 = var_253_arg_0 & var_253_arg_1; [L689] SORT_1 var_254_arg_0 = state_19; [L690] SORT_1 var_254_arg_1 = ~input_86; [L691] var_254_arg_1 = var_254_arg_1 & mask_SORT_1 [L692] SORT_1 var_254 = var_254_arg_0 | var_254_arg_1; [L693] SORT_1 var_255_arg_0 = var_253; [L694] SORT_1 var_255_arg_1 = var_254; [L695] SORT_1 var_255 = var_255_arg_0 & var_255_arg_1; [L696] SORT_1 var_256_arg_0 = state_15; [L697] SORT_1 var_256_arg_1 = ~input_85; [L698] var_256_arg_1 = var_256_arg_1 & mask_SORT_1 [L699] SORT_1 var_256 = var_256_arg_0 | var_256_arg_1; [L700] SORT_1 var_257_arg_0 = var_255; [L701] SORT_1 var_257_arg_1 = var_256; [L702] SORT_1 var_257 = var_257_arg_0 & var_257_arg_1; [L703] SORT_4 var_258_arg_0 = var_72; [L704] SORT_4 var_258_arg_1 = var_244; [L705] SORT_1 var_258 = var_258_arg_0 == var_258_arg_1; [L706] SORT_1 var_259_arg_0 = state_17; [L707] SORT_1 var_259_arg_1 = var_258; [L708] SORT_1 var_259 = var_259_arg_0 & var_259_arg_1; [L709] SORT_1 var_260_arg_0 = ~input_138; [L710] var_260_arg_0 = var_260_arg_0 & mask_SORT_1 [L711] SORT_1 var_260_arg_1 = var_259; [L712] SORT_1 var_260 = var_260_arg_0 | var_260_arg_1; [L713] SORT_1 var_261_arg_0 = var_257; [L714] SORT_1 var_261_arg_1 = var_260; [L715] SORT_1 var_261 = var_261_arg_0 & var_261_arg_1; [L716] SORT_1 var_262_arg_0 = ~state_21; [L717] var_262_arg_0 = var_262_arg_0 & mask_SORT_1 [L718] SORT_1 var_262_arg_1 = ~input_84; [L719] var_262_arg_1 = var_262_arg_1 & mask_SORT_1 [L720] SORT_1 var_262 = var_262_arg_0 | var_262_arg_1; [L721] SORT_1 var_263_arg_0 = var_261; [L722] SORT_1 var_263_arg_1 = var_262; [L723] SORT_1 var_263 = var_263_arg_0 & var_263_arg_1; [L724] SORT_1 var_264_arg_0 = state_25; [L725] SORT_1 var_264_arg_1 = var_245; [L726] SORT_1 var_264 = var_264_arg_0 & var_264_arg_1; [L727] SORT_1 var_265_arg_0 = ~input_148; [L728] var_265_arg_0 = var_265_arg_0 & mask_SORT_1 [L729] SORT_1 var_265_arg_1 = var_264; [L730] SORT_1 var_265 = var_265_arg_0 | var_265_arg_1; [L731] SORT_1 var_266_arg_0 = var_263; [L732] SORT_1 var_266_arg_1 = var_265; [L733] SORT_1 var_266 = var_266_arg_0 & var_266_arg_1; [L734] SORT_1 var_267_arg_0 = state_23; [L735] SORT_1 var_267_arg_1 = var_250; [L736] SORT_1 var_267 = var_267_arg_0 & var_267_arg_1; [L737] SORT_1 var_268_arg_0 = ~input_102; [L738] var_268_arg_0 = var_268_arg_0 & mask_SORT_1 [L739] SORT_1 var_268_arg_1 = var_267; [L740] SORT_1 var_268 = var_268_arg_0 | var_268_arg_1; [L741] SORT_1 var_269_arg_0 = var_266; [L742] SORT_1 var_269_arg_1 = var_268; [L743] SORT_1 var_269 = var_269_arg_0 & var_269_arg_1; [L744] SORT_1 var_270_arg_0 = state_27; [L745] SORT_1 var_270_arg_1 = ~input_83; [L746] var_270_arg_1 = var_270_arg_1 & mask_SORT_1 [L747] SORT_1 var_270 = var_270_arg_0 | var_270_arg_1; [L748] SORT_1 var_271_arg_0 = var_269; [L749] SORT_1 var_271_arg_1 = var_270; [L750] SORT_1 var_271 = var_271_arg_0 & var_271_arg_1; [L751] SORT_1 var_272_arg_0 = state_23; [L752] SORT_1 var_272_arg_1 = ~input_81; [L753] var_272_arg_1 = var_272_arg_1 & mask_SORT_1 [L754] SORT_1 var_272 = var_272_arg_0 | var_272_arg_1; [L755] SORT_1 var_273_arg_0 = var_271; [L756] SORT_1 var_273_arg_1 = var_272; [L757] SORT_1 var_273 = var_273_arg_0 & var_273_arg_1; [L758] SORT_1 var_274_arg_0 = state_25; [L759] SORT_1 var_274_arg_1 = var_258; [L760] SORT_1 var_274 = var_274_arg_0 & var_274_arg_1; [L761] SORT_1 var_275_arg_0 = ~input_157; [L762] var_275_arg_0 = var_275_arg_0 & mask_SORT_1 [L763] SORT_1 var_275_arg_1 = var_274; [L764] SORT_1 var_275 = var_275_arg_0 | var_275_arg_1; [L765] SORT_1 var_276_arg_0 = var_273; [L766] SORT_1 var_276_arg_1 = var_275; [L767] SORT_1 var_276 = var_276_arg_0 & var_276_arg_1; [L768] SORT_1 var_277_arg_0 = ~state_29; [L769] var_277_arg_0 = var_277_arg_0 & mask_SORT_1 [L770] SORT_1 var_277_arg_1 = ~input_80; [L771] var_277_arg_1 = var_277_arg_1 & mask_SORT_1 [L772] SORT_1 var_277 = var_277_arg_0 | var_277_arg_1; [L773] SORT_1 var_278_arg_0 = var_276; [L774] SORT_1 var_278_arg_1 = var_277; [L775] SORT_1 var_278 = var_278_arg_0 & var_278_arg_1; [L776] SORT_4 var_280_arg_0 = var_99; [L777] SORT_4 var_280_arg_1 = var_279; [L778] SORT_1 var_280 = var_280_arg_0 <= var_280_arg_1; [L779] SORT_4 var_282_arg_0 = var_281; [L780] SORT_4 var_282_arg_1 = var_99; [L781] SORT_1 var_282 = var_282_arg_0 <= var_282_arg_1; [L782] SORT_1 var_283_arg_0 = ~var_280; [L783] var_283_arg_0 = var_283_arg_0 & mask_SORT_1 [L784] SORT_1 var_283_arg_1 = ~var_282; [L785] var_283_arg_1 = var_283_arg_1 & mask_SORT_1 [L786] SORT_1 var_283 = var_283_arg_0 & var_283_arg_1; [L787] SORT_1 var_284_arg_0 = state_31; [L788] SORT_1 var_284_arg_1 = var_283; [L789] SORT_1 var_284 = var_284_arg_0 & var_284_arg_1; [L790] SORT_1 var_285_arg_0 = ~input_97; [L791] var_285_arg_0 = var_285_arg_0 & mask_SORT_1 [L792] SORT_1 var_285_arg_1 = var_284; [L793] SORT_1 var_285 = var_285_arg_0 | var_285_arg_1; [L794] SORT_1 var_286_arg_0 = var_278; [L795] SORT_1 var_286_arg_1 = var_285; [L796] SORT_1 var_286 = var_286_arg_0 & var_286_arg_1; [L797] SORT_4 var_288_arg_0 = var_287; [L798] SORT_4 var_288_arg_1 = var_99; [L799] SORT_1 var_288 = var_288_arg_0 <= var_288_arg_1; [L800] SORT_1 var_289_arg_0 = state_31; [L801] SORT_1 var_289_arg_1 = ~var_288; [L802] var_289_arg_1 = var_289_arg_1 & mask_SORT_1 [L803] SORT_1 var_289 = var_289_arg_0 & var_289_arg_1; [L804] SORT_1 var_290_arg_0 = ~input_96; [L805] var_290_arg_0 = var_290_arg_0 & mask_SORT_1 [L806] SORT_1 var_290_arg_1 = var_289; [L807] SORT_1 var_290 = var_290_arg_0 | var_290_arg_1; [L808] SORT_1 var_291_arg_0 = var_286; [L809] SORT_1 var_291_arg_1 = var_290; [L810] SORT_1 var_291 = var_291_arg_0 & var_291_arg_1; [L811] SORT_4 var_293_arg_0 = var_99; [L812] SORT_4 var_293_arg_1 = var_292; [L813] SORT_1 var_293 = var_293_arg_0 <= var_293_arg_1; [L814] SORT_1 var_294_arg_0 = state_31; [L815] SORT_1 var_294_arg_1 = ~var_293; [L816] var_294_arg_1 = var_294_arg_1 & mask_SORT_1 [L817] SORT_1 var_294 = var_294_arg_0 & var_294_arg_1; [L818] SORT_1 var_295_arg_0 = ~input_95; [L819] var_295_arg_0 = var_295_arg_0 & mask_SORT_1 [L820] SORT_1 var_295_arg_1 = var_294; [L821] SORT_1 var_295 = var_295_arg_0 | var_295_arg_1; [L822] SORT_1 var_296_arg_0 = var_291; [L823] SORT_1 var_296_arg_1 = var_295; [L824] SORT_1 var_296 = var_296_arg_0 & var_296_arg_1; [L825] SORT_4 var_297_arg_0 = var_69; [L826] SORT_4 var_297_arg_1 = var_72; [L827] SORT_1 var_297 = var_297_arg_0 <= var_297_arg_1; [L828] SORT_1 var_298_arg_0 = state_35; [L829] SORT_1 var_298_arg_1 = ~var_297; [L830] var_298_arg_1 = var_298_arg_1 & mask_SORT_1 [L831] SORT_1 var_298 = var_298_arg_0 & var_298_arg_1; [L832] SORT_1 var_299_arg_0 = ~input_122; [L833] var_299_arg_0 = var_299_arg_0 & mask_SORT_1 [L834] SORT_1 var_299_arg_1 = var_298; [L835] SORT_1 var_299 = var_299_arg_0 | var_299_arg_1; [L836] SORT_1 var_300_arg_0 = var_296; [L837] SORT_1 var_300_arg_1 = var_299; [L838] SORT_1 var_300 = var_300_arg_0 & var_300_arg_1; [L839] SORT_4 var_301_arg_0 = var_65; [L840] SORT_4 var_301_arg_1 = var_69; [L841] SORT_1 var_301 = var_301_arg_0 <= var_301_arg_1; [L842] SORT_1 var_302_arg_0 = state_39; [L843] SORT_1 var_302_arg_1 = ~var_301; [L844] var_302_arg_1 = var_302_arg_1 & mask_SORT_1 [L845] SORT_1 var_302 = var_302_arg_0 & var_302_arg_1; [L846] SORT_1 var_303_arg_0 = ~input_119; [L847] var_303_arg_0 = var_303_arg_0 & mask_SORT_1 [L848] SORT_1 var_303_arg_1 = var_302; [L849] SORT_1 var_303 = var_303_arg_0 | var_303_arg_1; [L850] SORT_1 var_304_arg_0 = var_300; [L851] SORT_1 var_304_arg_1 = var_303; [L852] SORT_1 var_304 = var_304_arg_0 & var_304_arg_1; [L853] SORT_1 var_305_arg_0 = ~state_45; [L854] var_305_arg_0 = var_305_arg_0 & mask_SORT_1 [L855] SORT_1 var_305_arg_1 = ~input_117; [L856] var_305_arg_1 = var_305_arg_1 & mask_SORT_1 [L857] SORT_1 var_305 = var_305_arg_0 | var_305_arg_1; [L858] SORT_1 var_306_arg_0 = var_304; [L859] SORT_1 var_306_arg_1 = var_305; [L860] SORT_1 var_306 = var_306_arg_0 & var_306_arg_1; [L861] SORT_4 var_307_arg_0 = var_72; [L862] SORT_4 var_307_arg_1 = var_69; [L863] SORT_1 var_307 = var_307_arg_0 == var_307_arg_1; [L864] SORT_1 var_308_arg_0 = state_35; [L865] SORT_1 var_308_arg_1 = var_307; [L866] SORT_1 var_308 = var_308_arg_0 & var_308_arg_1; [L867] SORT_1 var_309_arg_0 = ~input_181; [L868] var_309_arg_0 = var_309_arg_0 & mask_SORT_1 [L869] SORT_1 var_309_arg_1 = var_308; [L870] SORT_1 var_309 = var_309_arg_0 | var_309_arg_1; [L871] SORT_1 var_310_arg_0 = var_306; [L872] SORT_1 var_310_arg_1 = var_309; [L873] SORT_1 var_310 = var_310_arg_0 & var_310_arg_1; [L874] SORT_1 var_311_arg_0 = state_39; [L875] SORT_1 var_311_arg_1 = var_70; [L876] SORT_1 var_311 = var_311_arg_0 & var_311_arg_1; [L877] SORT_1 var_312_arg_0 = ~input_190; [L878] var_312_arg_0 = var_312_arg_0 & mask_SORT_1 [L879] SORT_1 var_312_arg_1 = var_311; [L880] SORT_1 var_312 = var_312_arg_0 | var_312_arg_1; [L881] SORT_1 var_313_arg_0 = var_310; [L882] SORT_1 var_313_arg_1 = var_312; [L883] SORT_1 var_313 = var_313_arg_0 & var_313_arg_1; [L884] SORT_1 var_314_arg_0 = state_41; [L885] SORT_1 var_314_arg_1 = ~input_196; [L886] var_314_arg_1 = var_314_arg_1 & mask_SORT_1 [L887] SORT_1 var_314 = var_314_arg_0 | var_314_arg_1; [L888] SORT_1 var_315_arg_0 = var_313; [L889] SORT_1 var_315_arg_1 = var_314; [L890] SORT_1 var_315 = var_315_arg_0 & var_315_arg_1; [L891] SORT_1 var_316_arg_0 = state_43; [L892] SORT_1 var_316_arg_1 = ~input_200; [L893] var_316_arg_1 = var_316_arg_1 & mask_SORT_1 [L894] SORT_1 var_316 = var_316_arg_0 | var_316_arg_1; [L895] SORT_1 var_317_arg_0 = var_315; [L896] SORT_1 var_317_arg_1 = var_316; [L897] SORT_1 var_317 = var_317_arg_0 & var_317_arg_1; [L898] SORT_1 var_318_arg_0 = state_37; [L899] SORT_1 var_318_arg_1 = ~input_185; [L900] var_318_arg_1 = var_318_arg_1 & mask_SORT_1 [L901] SORT_1 var_318 = var_318_arg_0 | var_318_arg_1; [L902] SORT_1 var_319_arg_0 = var_317; [L903] SORT_1 var_319_arg_1 = var_318; [L904] SORT_1 var_319 = var_319_arg_0 & var_319_arg_1; [L905] SORT_1 var_320_arg_0 = state_47; [L906] SORT_1 var_320_arg_1 = ~input_204; [L907] var_320_arg_1 = var_320_arg_1 & mask_SORT_1 [L908] SORT_1 var_320 = var_320_arg_0 | var_320_arg_1; [L909] SORT_1 var_321_arg_0 = var_319; [L910] SORT_1 var_321_arg_1 = var_320; [L911] SORT_1 var_321 = var_321_arg_0 & var_321_arg_1; [L912] SORT_1 var_322_arg_0 = state_53; [L913] SORT_1 var_322_arg_1 = ~input_221; [L914] var_322_arg_1 = var_322_arg_1 & mask_SORT_1 [L915] SORT_1 var_322 = var_322_arg_0 | var_322_arg_1; [L916] SORT_1 var_323_arg_0 = var_321; [L917] SORT_1 var_323_arg_1 = var_322; [L918] SORT_1 var_323 = var_323_arg_0 & var_323_arg_1; [L919] SORT_1 var_324_arg_0 = state_53; [L920] SORT_1 var_324_arg_1 = ~input_223; [L921] var_324_arg_1 = var_324_arg_1 & mask_SORT_1 [L922] SORT_1 var_324 = var_324_arg_0 | var_324_arg_1; [L923] SORT_1 var_325_arg_0 = var_323; [L924] SORT_1 var_325_arg_1 = var_324; [L925] SORT_1 var_325 = var_325_arg_0 & var_325_arg_1; [L926] SORT_1 var_326_arg_0 = state_55; [L927] SORT_1 var_326_arg_1 = ~input_78; [L928] var_326_arg_1 = var_326_arg_1 & mask_SORT_1 [L929] SORT_1 var_326 = var_326_arg_0 | var_326_arg_1; [L930] SORT_1 var_327_arg_0 = var_325; [L931] SORT_1 var_327_arg_1 = var_326; [L932] SORT_1 var_327 = var_327_arg_0 & var_327_arg_1; [L933] SORT_1 var_328_arg_0 = state_55; [L934] SORT_1 var_328_arg_1 = ~input_229; [L935] var_328_arg_1 = var_328_arg_1 & mask_SORT_1 [L936] SORT_1 var_328 = var_328_arg_0 | var_328_arg_1; [L937] SORT_1 var_329_arg_0 = var_327; [L938] SORT_1 var_329_arg_1 = var_328; [L939] SORT_1 var_329 = var_329_arg_0 & var_329_arg_1; [L940] SORT_1 var_330_arg_0 = state_15; [L941] SORT_1 var_330_arg_1 = state_33; [L942] SORT_1 var_330 = var_330_arg_0 & var_330_arg_1; [L943] SORT_1 var_331_arg_0 = var_330; [L944] SORT_1 var_331_arg_1 = var_245; [L945] SORT_1 var_331 = var_331_arg_0 & var_331_arg_1; [L946] SORT_1 var_332_arg_0 = ~input_134; [L947] var_332_arg_0 = var_332_arg_0 & mask_SORT_1 [L948] SORT_1 var_332_arg_1 = var_331; [L949] SORT_1 var_332 = var_332_arg_0 | var_332_arg_1; [L950] SORT_1 var_333_arg_0 = var_329; [L951] SORT_1 var_333_arg_1 = var_332; [L952] SORT_1 var_333 = var_333_arg_0 & var_333_arg_1; [L953] SORT_1 var_334_arg_0 = state_23; [L954] SORT_1 var_334_arg_1 = state_33; [L955] SORT_1 var_334 = var_334_arg_0 & var_334_arg_1; [L956] SORT_1 var_335_arg_0 = var_334; [L957] SORT_1 var_335_arg_1 = var_245; [L958] SORT_1 var_335 = var_335_arg_0 & var_335_arg_1; [L959] SORT_1 var_336_arg_0 = ~input_153; [L960] var_336_arg_0 = var_336_arg_0 & mask_SORT_1 [L961] SORT_1 var_336_arg_1 = var_335; [L962] SORT_1 var_336 = var_336_arg_0 | var_336_arg_1; [L963] SORT_1 var_337_arg_0 = var_333; [L964] SORT_1 var_337_arg_1 = var_336; [L965] SORT_1 var_337 = var_337_arg_0 & var_337_arg_1; [L966] SORT_1 var_338_arg_0 = state_49; [L967] SORT_1 var_338_arg_1 = ~state_59; [L968] var_338_arg_1 = var_338_arg_1 & mask_SORT_1 [L969] SORT_1 var_338 = var_338_arg_0 & var_338_arg_1; [L970] SORT_1 var_339_arg_0 = ~input_214; [L971] var_339_arg_0 = var_339_arg_0 & mask_SORT_1 [L972] SORT_1 var_339_arg_1 = var_338; [L973] SORT_1 var_339 = var_339_arg_0 | var_339_arg_1; [L974] SORT_1 var_340_arg_0 = var_337; [L975] SORT_1 var_340_arg_1 = var_339; [L976] SORT_1 var_340 = var_340_arg_0 & var_340_arg_1; [L977] SORT_1 var_341_arg_0 = state_51; [L978] SORT_1 var_341_arg_1 = state_61; [L979] SORT_1 var_341 = var_341_arg_0 & var_341_arg_1; [L980] SORT_1 var_342_arg_0 = ~input_170; [L981] var_342_arg_0 = var_342_arg_0 & mask_SORT_1 [L982] SORT_1 var_342_arg_1 = var_341; [L983] SORT_1 var_342 = var_342_arg_0 | var_342_arg_1; [L984] SORT_1 var_343_arg_0 = var_340; [L985] SORT_1 var_343_arg_1 = var_342; [L986] SORT_1 var_343 = var_343_arg_0 & var_343_arg_1; [L987] SORT_1 var_344_arg_0 = state_51; [L988] SORT_1 var_344_arg_1 = state_57; [L989] SORT_1 var_344 = var_344_arg_0 & var_344_arg_1; [L990] SORT_1 var_345_arg_0 = ~input_192; [L991] var_345_arg_0 = var_345_arg_0 & mask_SORT_1 [L992] SORT_1 var_345_arg_1 = var_344; [L993] SORT_1 var_345 = var_345_arg_0 | var_345_arg_1; [L994] SORT_1 var_346_arg_0 = var_343; [L995] SORT_1 var_346_arg_1 = var_345; [L996] SORT_1 var_346 = var_346_arg_0 & var_346_arg_1; [L997] SORT_1 var_347_arg_0 = input_129; [L998] SORT_1 var_347_arg_1 = input_105; [L999] SORT_1 var_347 = var_347_arg_0 | var_347_arg_1; [L1000] SORT_1 var_348_arg_0 = input_86; [L1001] SORT_1 var_348_arg_1 = var_347; [L1002] SORT_1 var_348 = var_348_arg_0 | var_348_arg_1; [L1003] SORT_1 var_349_arg_0 = input_85; [L1004] SORT_1 var_349_arg_1 = var_348; [L1005] SORT_1 var_349 = var_349_arg_0 | var_349_arg_1; [L1006] SORT_1 var_350_arg_0 = input_138; [L1007] SORT_1 var_350_arg_1 = var_349; [L1008] SORT_1 var_350 = var_350_arg_0 | var_350_arg_1; [L1009] SORT_1 var_351_arg_0 = input_84; [L1010] SORT_1 var_351_arg_1 = var_350; [L1011] SORT_1 var_351 = var_351_arg_0 | var_351_arg_1; [L1012] SORT_1 var_352_arg_0 = input_148; [L1013] SORT_1 var_352_arg_1 = var_351; [L1014] SORT_1 var_352 = var_352_arg_0 | var_352_arg_1; [L1015] SORT_1 var_353_arg_0 = input_102; [L1016] SORT_1 var_353_arg_1 = var_352; [L1017] SORT_1 var_353 = var_353_arg_0 | var_353_arg_1; [L1018] SORT_1 var_354_arg_0 = input_83; [L1019] SORT_1 var_354_arg_1 = var_353; [L1020] SORT_1 var_354 = var_354_arg_0 | var_354_arg_1; [L1021] SORT_1 var_355_arg_0 = input_81; [L1022] SORT_1 var_355_arg_1 = var_354; [L1023] SORT_1 var_355 = var_355_arg_0 | var_355_arg_1; [L1024] SORT_1 var_356_arg_0 = input_157; [L1025] SORT_1 var_356_arg_1 = var_355; [L1026] SORT_1 var_356 = var_356_arg_0 | var_356_arg_1; [L1027] SORT_1 var_357_arg_0 = input_80; [L1028] SORT_1 var_357_arg_1 = var_356; [L1029] SORT_1 var_357 = var_357_arg_0 | var_357_arg_1; [L1030] SORT_1 var_358_arg_0 = input_97; [L1031] SORT_1 var_358_arg_1 = var_357; [L1032] SORT_1 var_358 = var_358_arg_0 | var_358_arg_1; [L1033] SORT_1 var_359_arg_0 = input_96; [L1034] SORT_1 var_359_arg_1 = var_358; [L1035] SORT_1 var_359 = var_359_arg_0 | var_359_arg_1; [L1036] SORT_1 var_360_arg_0 = input_95; [L1037] SORT_1 var_360_arg_1 = var_359; [L1038] SORT_1 var_360 = var_360_arg_0 | var_360_arg_1; [L1039] SORT_1 var_361_arg_0 = input_122; [L1040] SORT_1 var_361_arg_1 = var_360; [L1041] SORT_1 var_361 = var_361_arg_0 | var_361_arg_1; [L1042] SORT_1 var_362_arg_0 = input_119; [L1043] SORT_1 var_362_arg_1 = var_361; [L1044] SORT_1 var_362 = var_362_arg_0 | var_362_arg_1; [L1045] SORT_1 var_363_arg_0 = input_117; [L1046] SORT_1 var_363_arg_1 = var_362; [L1047] SORT_1 var_363 = var_363_arg_0 | var_363_arg_1; [L1048] SORT_1 var_364_arg_0 = input_181; [L1049] SORT_1 var_364_arg_1 = var_363; [L1050] SORT_1 var_364 = var_364_arg_0 | var_364_arg_1; [L1051] SORT_1 var_365_arg_0 = input_190; [L1052] SORT_1 var_365_arg_1 = var_364; [L1053] SORT_1 var_365 = var_365_arg_0 | var_365_arg_1; [L1054] SORT_1 var_366_arg_0 = input_196; [L1055] SORT_1 var_366_arg_1 = var_365; [L1056] SORT_1 var_366 = var_366_arg_0 | var_366_arg_1; [L1057] SORT_1 var_367_arg_0 = input_200; [L1058] SORT_1 var_367_arg_1 = var_366; [L1059] SORT_1 var_367 = var_367_arg_0 | var_367_arg_1; [L1060] SORT_1 var_368_arg_0 = input_185; [L1061] SORT_1 var_368_arg_1 = var_367; [L1062] SORT_1 var_368 = var_368_arg_0 | var_368_arg_1; [L1063] SORT_1 var_369_arg_0 = input_204; [L1064] SORT_1 var_369_arg_1 = var_368; [L1065] SORT_1 var_369 = var_369_arg_0 | var_369_arg_1; [L1066] SORT_1 var_370_arg_0 = input_221; [L1067] SORT_1 var_370_arg_1 = var_369; [L1068] SORT_1 var_370 = var_370_arg_0 | var_370_arg_1; [L1069] SORT_1 var_371_arg_0 = input_223; [L1070] SORT_1 var_371_arg_1 = var_370; [L1071] SORT_1 var_371 = var_371_arg_0 | var_371_arg_1; [L1072] SORT_1 var_372_arg_0 = input_78; [L1073] SORT_1 var_372_arg_1 = var_371; [L1074] SORT_1 var_372 = var_372_arg_0 | var_372_arg_1; [L1075] SORT_1 var_373_arg_0 = input_229; [L1076] SORT_1 var_373_arg_1 = var_372; [L1077] SORT_1 var_373 = var_373_arg_0 | var_373_arg_1; [L1078] SORT_1 var_374_arg_0 = input_134; [L1079] SORT_1 var_374_arg_1 = var_373; [L1080] SORT_1 var_374 = var_374_arg_0 | var_374_arg_1; [L1081] SORT_1 var_375_arg_0 = input_153; [L1082] SORT_1 var_375_arg_1 = var_374; [L1083] SORT_1 var_375 = var_375_arg_0 | var_375_arg_1; [L1084] SORT_1 var_376_arg_0 = input_214; [L1085] SORT_1 var_376_arg_1 = var_375; [L1086] SORT_1 var_376 = var_376_arg_0 | var_376_arg_1; [L1087] SORT_1 var_377_arg_0 = input_170; [L1088] SORT_1 var_377_arg_1 = var_376; [L1089] SORT_1 var_377 = var_377_arg_0 | var_377_arg_1; [L1090] SORT_1 var_378_arg_0 = input_192; [L1091] SORT_1 var_378_arg_1 = var_377; [L1092] SORT_1 var_378 = var_378_arg_0 | var_378_arg_1; [L1093] SORT_1 var_379_arg_0 = var_346; [L1094] SORT_1 var_379_arg_1 = var_378; [L1095] SORT_1 var_379 = var_379_arg_0 & var_379_arg_1; [L1096] SORT_1 var_380_arg_0 = input_129; [L1097] SORT_1 var_380_arg_1 = input_105; [L1098] SORT_1 var_380 = var_380_arg_0 & var_380_arg_1; [L1099] SORT_1 var_381_arg_0 = input_86; [L1100] SORT_1 var_381_arg_1 = var_347; [L1101] SORT_1 var_381 = var_381_arg_0 & var_381_arg_1; [L1102] SORT_1 var_382_arg_0 = var_380; [L1103] SORT_1 var_382_arg_1 = var_381; [L1104] SORT_1 var_382 = var_382_arg_0 | var_382_arg_1; [L1105] SORT_1 var_383_arg_0 = input_85; [L1106] SORT_1 var_383_arg_1 = var_348; [L1107] SORT_1 var_383 = var_383_arg_0 & var_383_arg_1; [L1108] SORT_1 var_384_arg_0 = var_382; [L1109] SORT_1 var_384_arg_1 = var_383; [L1110] SORT_1 var_384 = var_384_arg_0 | var_384_arg_1; [L1111] SORT_1 var_385_arg_0 = input_138; [L1112] SORT_1 var_385_arg_1 = var_349; [L1113] SORT_1 var_385 = var_385_arg_0 & var_385_arg_1; [L1114] SORT_1 var_386_arg_0 = var_384; [L1115] SORT_1 var_386_arg_1 = var_385; [L1116] SORT_1 var_386 = var_386_arg_0 | var_386_arg_1; [L1117] SORT_1 var_387_arg_0 = input_84; [L1118] SORT_1 var_387_arg_1 = var_350; [L1119] SORT_1 var_387 = var_387_arg_0 & var_387_arg_1; [L1120] SORT_1 var_388_arg_0 = var_386; [L1121] SORT_1 var_388_arg_1 = var_387; [L1122] SORT_1 var_388 = var_388_arg_0 | var_388_arg_1; [L1123] SORT_1 var_389_arg_0 = input_148; [L1124] SORT_1 var_389_arg_1 = var_351; [L1125] SORT_1 var_389 = var_389_arg_0 & var_389_arg_1; [L1126] SORT_1 var_390_arg_0 = var_388; [L1127] SORT_1 var_390_arg_1 = var_389; [L1128] SORT_1 var_390 = var_390_arg_0 | var_390_arg_1; [L1129] SORT_1 var_391_arg_0 = input_102; [L1130] SORT_1 var_391_arg_1 = var_352; [L1131] SORT_1 var_391 = var_391_arg_0 & var_391_arg_1; [L1132] SORT_1 var_392_arg_0 = var_390; [L1133] SORT_1 var_392_arg_1 = var_391; [L1134] SORT_1 var_392 = var_392_arg_0 | var_392_arg_1; [L1135] SORT_1 var_393_arg_0 = input_83; [L1136] SORT_1 var_393_arg_1 = var_353; [L1137] SORT_1 var_393 = var_393_arg_0 & var_393_arg_1; [L1138] SORT_1 var_394_arg_0 = var_392; [L1139] SORT_1 var_394_arg_1 = var_393; [L1140] SORT_1 var_394 = var_394_arg_0 | var_394_arg_1; [L1141] SORT_1 var_395_arg_0 = input_81; [L1142] SORT_1 var_395_arg_1 = var_354; [L1143] SORT_1 var_395 = var_395_arg_0 & var_395_arg_1; [L1144] SORT_1 var_396_arg_0 = var_394; [L1145] SORT_1 var_396_arg_1 = var_395; [L1146] SORT_1 var_396 = var_396_arg_0 | var_396_arg_1; [L1147] SORT_1 var_397_arg_0 = input_157; [L1148] SORT_1 var_397_arg_1 = var_355; [L1149] SORT_1 var_397 = var_397_arg_0 & var_397_arg_1; [L1150] SORT_1 var_398_arg_0 = var_396; [L1151] SORT_1 var_398_arg_1 = var_397; [L1152] SORT_1 var_398 = var_398_arg_0 | var_398_arg_1; [L1153] SORT_1 var_399_arg_0 = input_80; [L1154] SORT_1 var_399_arg_1 = var_356; [L1155] SORT_1 var_399 = var_399_arg_0 & var_399_arg_1; [L1156] SORT_1 var_400_arg_0 = var_398; [L1157] SORT_1 var_400_arg_1 = var_399; [L1158] SORT_1 var_400 = var_400_arg_0 | var_400_arg_1; [L1159] SORT_1 var_401_arg_0 = input_97; [L1160] SORT_1 var_401_arg_1 = var_357; [L1161] SORT_1 var_401 = var_401_arg_0 & var_401_arg_1; [L1162] SORT_1 var_402_arg_0 = var_400; [L1163] SORT_1 var_402_arg_1 = var_401; [L1164] SORT_1 var_402 = var_402_arg_0 | var_402_arg_1; [L1165] SORT_1 var_403_arg_0 = input_96; [L1166] SORT_1 var_403_arg_1 = var_358; [L1167] SORT_1 var_403 = var_403_arg_0 & var_403_arg_1; [L1168] SORT_1 var_404_arg_0 = var_402; [L1169] SORT_1 var_404_arg_1 = var_403; [L1170] SORT_1 var_404 = var_404_arg_0 | var_404_arg_1; [L1171] SORT_1 var_405_arg_0 = input_95; [L1172] SORT_1 var_405_arg_1 = var_359; [L1173] SORT_1 var_405 = var_405_arg_0 & var_405_arg_1; [L1174] SORT_1 var_406_arg_0 = var_404; [L1175] SORT_1 var_406_arg_1 = var_405; [L1176] SORT_1 var_406 = var_406_arg_0 | var_406_arg_1; [L1177] SORT_1 var_407_arg_0 = input_122; [L1178] SORT_1 var_407_arg_1 = var_360; [L1179] SORT_1 var_407 = var_407_arg_0 & var_407_arg_1; [L1180] SORT_1 var_408_arg_0 = var_406; [L1181] SORT_1 var_408_arg_1 = var_407; [L1182] SORT_1 var_408 = var_408_arg_0 | var_408_arg_1; [L1183] SORT_1 var_409_arg_0 = input_119; [L1184] SORT_1 var_409_arg_1 = var_361; [L1185] SORT_1 var_409 = var_409_arg_0 & var_409_arg_1; [L1186] SORT_1 var_410_arg_0 = var_408; [L1187] SORT_1 var_410_arg_1 = var_409; [L1188] SORT_1 var_410 = var_410_arg_0 | var_410_arg_1; [L1189] SORT_1 var_411_arg_0 = input_117; [L1190] SORT_1 var_411_arg_1 = var_362; [L1191] SORT_1 var_411 = var_411_arg_0 & var_411_arg_1; [L1192] SORT_1 var_412_arg_0 = var_410; [L1193] SORT_1 var_412_arg_1 = var_411; [L1194] SORT_1 var_412 = var_412_arg_0 | var_412_arg_1; [L1195] SORT_1 var_413_arg_0 = input_181; [L1196] SORT_1 var_413_arg_1 = var_363; [L1197] SORT_1 var_413 = var_413_arg_0 & var_413_arg_1; [L1198] SORT_1 var_414_arg_0 = var_412; [L1199] SORT_1 var_414_arg_1 = var_413; [L1200] SORT_1 var_414 = var_414_arg_0 | var_414_arg_1; [L1201] SORT_1 var_415_arg_0 = input_190; [L1202] SORT_1 var_415_arg_1 = var_364; [L1203] SORT_1 var_415 = var_415_arg_0 & var_415_arg_1; [L1204] SORT_1 var_416_arg_0 = var_414; [L1205] SORT_1 var_416_arg_1 = var_415; [L1206] SORT_1 var_416 = var_416_arg_0 | var_416_arg_1; [L1207] SORT_1 var_417_arg_0 = input_196; [L1208] SORT_1 var_417_arg_1 = var_365; [L1209] SORT_1 var_417 = var_417_arg_0 & var_417_arg_1; [L1210] SORT_1 var_418_arg_0 = var_416; [L1211] SORT_1 var_418_arg_1 = var_417; [L1212] SORT_1 var_418 = var_418_arg_0 | var_418_arg_1; [L1213] SORT_1 var_419_arg_0 = input_200; [L1214] SORT_1 var_419_arg_1 = var_366; [L1215] SORT_1 var_419 = var_419_arg_0 & var_419_arg_1; [L1216] SORT_1 var_420_arg_0 = var_418; [L1217] SORT_1 var_420_arg_1 = var_419; [L1218] SORT_1 var_420 = var_420_arg_0 | var_420_arg_1; [L1219] SORT_1 var_421_arg_0 = input_185; [L1220] SORT_1 var_421_arg_1 = var_367; [L1221] SORT_1 var_421 = var_421_arg_0 & var_421_arg_1; [L1222] SORT_1 var_422_arg_0 = var_420; [L1223] SORT_1 var_422_arg_1 = var_421; [L1224] SORT_1 var_422 = var_422_arg_0 | var_422_arg_1; [L1225] SORT_1 var_423_arg_0 = input_204; [L1226] SORT_1 var_423_arg_1 = var_368; [L1227] SORT_1 var_423 = var_423_arg_0 & var_423_arg_1; [L1228] SORT_1 var_424_arg_0 = var_422; [L1229] SORT_1 var_424_arg_1 = var_423; [L1230] SORT_1 var_424 = var_424_arg_0 | var_424_arg_1; [L1231] SORT_1 var_425_arg_0 = input_221; [L1232] SORT_1 var_425_arg_1 = var_369; [L1233] SORT_1 var_425 = var_425_arg_0 & var_425_arg_1; [L1234] SORT_1 var_426_arg_0 = var_424; [L1235] SORT_1 var_426_arg_1 = var_425; [L1236] SORT_1 var_426 = var_426_arg_0 | var_426_arg_1; [L1237] SORT_1 var_427_arg_0 = input_223; [L1238] SORT_1 var_427_arg_1 = var_370; [L1239] SORT_1 var_427 = var_427_arg_0 & var_427_arg_1; [L1240] SORT_1 var_428_arg_0 = var_426; [L1241] SORT_1 var_428_arg_1 = var_427; [L1242] SORT_1 var_428 = var_428_arg_0 | var_428_arg_1; [L1243] SORT_1 var_429_arg_0 = input_78; [L1244] SORT_1 var_429_arg_1 = var_371; [L1245] SORT_1 var_429 = var_429_arg_0 & var_429_arg_1; [L1246] SORT_1 var_430_arg_0 = var_428; [L1247] SORT_1 var_430_arg_1 = var_429; [L1248] SORT_1 var_430 = var_430_arg_0 | var_430_arg_1; [L1249] SORT_1 var_431_arg_0 = input_229; [L1250] SORT_1 var_431_arg_1 = var_372; [L1251] SORT_1 var_431 = var_431_arg_0 & var_431_arg_1; [L1252] SORT_1 var_432_arg_0 = var_430; [L1253] SORT_1 var_432_arg_1 = var_431; [L1254] SORT_1 var_432 = var_432_arg_0 | var_432_arg_1; [L1255] SORT_1 var_433_arg_0 = input_134; [L1256] SORT_1 var_433_arg_1 = var_373; [L1257] SORT_1 var_433 = var_433_arg_0 & var_433_arg_1; [L1258] SORT_1 var_434_arg_0 = var_432; [L1259] SORT_1 var_434_arg_1 = var_433; [L1260] SORT_1 var_434 = var_434_arg_0 | var_434_arg_1; [L1261] SORT_1 var_435_arg_0 = input_153; [L1262] SORT_1 var_435_arg_1 = var_374; [L1263] SORT_1 var_435 = var_435_arg_0 & var_435_arg_1; [L1264] SORT_1 var_436_arg_0 = var_434; [L1265] SORT_1 var_436_arg_1 = var_435; [L1266] SORT_1 var_436 = var_436_arg_0 | var_436_arg_1; [L1267] SORT_1 var_437_arg_0 = input_214; [L1268] SORT_1 var_437_arg_1 = var_375; [L1269] SORT_1 var_437 = var_437_arg_0 & var_437_arg_1; [L1270] SORT_1 var_438_arg_0 = var_436; [L1271] SORT_1 var_438_arg_1 = var_437; [L1272] SORT_1 var_438 = var_438_arg_0 | var_438_arg_1; [L1273] SORT_1 var_439_arg_0 = input_170; [L1274] SORT_1 var_439_arg_1 = var_376; [L1275] SORT_1 var_439 = var_439_arg_0 & var_439_arg_1; [L1276] SORT_1 var_440_arg_0 = var_438; [L1277] SORT_1 var_440_arg_1 = var_439; [L1278] SORT_1 var_440 = var_440_arg_0 | var_440_arg_1; [L1279] SORT_1 var_441_arg_0 = input_192; [L1280] SORT_1 var_441_arg_1 = var_377; [L1281] SORT_1 var_441 = var_441_arg_0 & var_441_arg_1; [L1282] SORT_1 var_442_arg_0 = var_440; [L1283] SORT_1 var_442_arg_1 = var_441; [L1284] SORT_1 var_442 = var_442_arg_0 | var_442_arg_1; [L1285] SORT_1 var_443_arg_0 = var_379; [L1286] SORT_1 var_443_arg_1 = ~var_442; [L1287] var_443_arg_1 = var_443_arg_1 & mask_SORT_1 [L1288] SORT_1 var_443 = var_443_arg_0 & var_443_arg_1; [L1289] SORT_1 var_444_arg_0 = state_15; [L1290] SORT_1 var_444_arg_1 = state_17; [L1291] SORT_1 var_444 = var_444_arg_0 & var_444_arg_1; [L1292] SORT_1 var_445_arg_0 = state_15; [L1293] SORT_1 var_445_arg_1 = state_17; [L1294] SORT_1 var_445 = var_445_arg_0 | var_445_arg_1; [L1295] SORT_1 var_446_arg_0 = state_19; [L1296] SORT_1 var_446_arg_1 = var_445; [L1297] SORT_1 var_446 = var_446_arg_0 & var_446_arg_1; [L1298] SORT_1 var_447_arg_0 = var_444; [L1299] SORT_1 var_447_arg_1 = var_446; [L1300] SORT_1 var_447 = var_447_arg_0 | var_447_arg_1; [L1301] SORT_1 var_448_arg_0 = state_19; [L1302] SORT_1 var_448_arg_1 = var_445; [L1303] SORT_1 var_448 = var_448_arg_0 | var_448_arg_1; [L1304] SORT_1 var_449_arg_0 = ~state_21; [L1305] var_449_arg_0 = var_449_arg_0 & mask_SORT_1 [L1306] SORT_1 var_449_arg_1 = var_448; [L1307] SORT_1 var_449 = var_449_arg_0 & var_449_arg_1; [L1308] SORT_1 var_450_arg_0 = var_447; [L1309] SORT_1 var_450_arg_1 = var_449; [L1310] SORT_1 var_450 = var_450_arg_0 | var_450_arg_1; [L1311] SORT_1 var_451_arg_0 = ~state_21; [L1312] var_451_arg_0 = var_451_arg_0 & mask_SORT_1 [L1313] SORT_1 var_451_arg_1 = var_448; [L1314] SORT_1 var_451 = var_451_arg_0 | var_451_arg_1; [L1315] SORT_1 var_452_arg_0 = ~var_450; [L1316] var_452_arg_0 = var_452_arg_0 & mask_SORT_1 [L1317] SORT_1 var_452_arg_1 = var_451; [L1318] SORT_1 var_452 = var_452_arg_0 & var_452_arg_1; [L1319] SORT_1 var_453_arg_0 = state_23; [L1320] SORT_1 var_453_arg_1 = state_25; [L1321] SORT_1 var_453 = var_453_arg_0 & var_453_arg_1; [L1322] SORT_1 var_454_arg_0 = state_23; [L1323] SORT_1 var_454_arg_1 = state_25; [L1324] SORT_1 var_454 = var_454_arg_0 | var_454_arg_1; [L1325] SORT_1 var_455_arg_0 = state_27; [L1326] SORT_1 var_455_arg_1 = var_454; [L1327] SORT_1 var_455 = var_455_arg_0 & var_455_arg_1; [L1328] SORT_1 var_456_arg_0 = var_453; [L1329] SORT_1 var_456_arg_1 = var_455; [L1330] SORT_1 var_456 = var_456_arg_0 | var_456_arg_1; [L1331] SORT_1 var_457_arg_0 = state_27; [L1332] SORT_1 var_457_arg_1 = var_454; [L1333] SORT_1 var_457 = var_457_arg_0 | var_457_arg_1; [L1334] SORT_1 var_458_arg_0 = ~state_29; [L1335] var_458_arg_0 = var_458_arg_0 & mask_SORT_1 [L1336] SORT_1 var_458_arg_1 = var_457; [L1337] SORT_1 var_458 = var_458_arg_0 & var_458_arg_1; [L1338] SORT_1 var_459_arg_0 = var_456; [L1339] SORT_1 var_459_arg_1 = var_458; [L1340] SORT_1 var_459 = var_459_arg_0 | var_459_arg_1; [L1341] SORT_1 var_460_arg_0 = var_452; [L1342] SORT_1 var_460_arg_1 = ~var_459; [L1343] var_460_arg_1 = var_460_arg_1 & mask_SORT_1 [L1344] SORT_1 var_460 = var_460_arg_0 & var_460_arg_1; [L1345] SORT_1 var_461_arg_0 = ~state_29; [L1346] var_461_arg_0 = var_461_arg_0 & mask_SORT_1 [L1347] SORT_1 var_461_arg_1 = var_457; [L1348] SORT_1 var_461 = var_461_arg_0 | var_461_arg_1; [L1349] SORT_1 var_462_arg_0 = var_460; [L1350] SORT_1 var_462_arg_1 = var_461; [L1351] SORT_1 var_462 = var_462_arg_0 & var_462_arg_1; [L1352] SORT_1 var_463_arg_0 = state_31; [L1353] SORT_1 var_463_arg_1 = state_33; [L1354] SORT_1 var_463 = var_463_arg_0 & var_463_arg_1; [L1355] SORT_1 var_464_arg_0 = state_31; [L1356] SORT_1 var_464_arg_1 = state_33; [L1357] SORT_1 var_464 = var_464_arg_0 | var_464_arg_1; [L1358] SORT_1 var_465_arg_0 = state_35; [L1359] SORT_1 var_465_arg_1 = var_464; [L1360] SORT_1 var_465 = var_465_arg_0 & var_465_arg_1; [L1361] SORT_1 var_466_arg_0 = var_463; [L1362] SORT_1 var_466_arg_1 = var_465; [L1363] SORT_1 var_466 = var_466_arg_0 | var_466_arg_1; [L1364] SORT_1 var_467_arg_0 = state_35; [L1365] SORT_1 var_467_arg_1 = var_464; [L1366] SORT_1 var_467 = var_467_arg_0 | var_467_arg_1; [L1367] SORT_1 var_468_arg_0 = state_37; [L1368] SORT_1 var_468_arg_1 = var_467; [L1369] SORT_1 var_468 = var_468_arg_0 & var_468_arg_1; [L1370] SORT_1 var_469_arg_0 = var_466; [L1371] SORT_1 var_469_arg_1 = var_468; [L1372] SORT_1 var_469 = var_469_arg_0 | var_469_arg_1; [L1373] SORT_1 var_470_arg_0 = state_37; [L1374] SORT_1 var_470_arg_1 = var_467; [L1375] SORT_1 var_470 = var_470_arg_0 | var_470_arg_1; [L1376] SORT_1 var_471_arg_0 = state_39; [L1377] SORT_1 var_471_arg_1 = var_470; [L1378] SORT_1 var_471 = var_471_arg_0 & var_471_arg_1; [L1379] SORT_1 var_472_arg_0 = var_469; [L1380] SORT_1 var_472_arg_1 = var_471; [L1381] SORT_1 var_472 = var_472_arg_0 | var_472_arg_1; [L1382] SORT_1 var_473_arg_0 = state_39; [L1383] SORT_1 var_473_arg_1 = var_470; [L1384] SORT_1 var_473 = var_473_arg_0 | var_473_arg_1; [L1385] SORT_1 var_474_arg_0 = state_41; [L1386] SORT_1 var_474_arg_1 = var_473; [L1387] SORT_1 var_474 = var_474_arg_0 & var_474_arg_1; [L1388] SORT_1 var_475_arg_0 = var_472; [L1389] SORT_1 var_475_arg_1 = var_474; [L1390] SORT_1 var_475 = var_475_arg_0 | var_475_arg_1; [L1391] SORT_1 var_476_arg_0 = state_41; [L1392] SORT_1 var_476_arg_1 = var_473; [L1393] SORT_1 var_476 = var_476_arg_0 | var_476_arg_1; [L1394] SORT_1 var_477_arg_0 = state_43; [L1395] SORT_1 var_477_arg_1 = var_476; [L1396] SORT_1 var_477 = var_477_arg_0 & var_477_arg_1; [L1397] SORT_1 var_478_arg_0 = var_475; [L1398] SORT_1 var_478_arg_1 = var_477; [L1399] SORT_1 var_478 = var_478_arg_0 | var_478_arg_1; [L1400] SORT_1 var_479_arg_0 = state_43; [L1401] SORT_1 var_479_arg_1 = var_476; [L1402] SORT_1 var_479 = var_479_arg_0 | var_479_arg_1; [L1403] SORT_1 var_480_arg_0 = ~state_45; [L1404] var_480_arg_0 = var_480_arg_0 & mask_SORT_1 [L1405] SORT_1 var_480_arg_1 = var_479; [L1406] SORT_1 var_480 = var_480_arg_0 & var_480_arg_1; [L1407] SORT_1 var_481_arg_0 = var_478; [L1408] SORT_1 var_481_arg_1 = var_480; [L1409] SORT_1 var_481 = var_481_arg_0 | var_481_arg_1; [L1410] SORT_1 var_482_arg_0 = ~state_45; [L1411] var_482_arg_0 = var_482_arg_0 & mask_SORT_1 [L1412] SORT_1 var_482_arg_1 = var_479; [L1413] SORT_1 var_482 = var_482_arg_0 | var_482_arg_1; [L1414] SORT_1 var_483_arg_0 = state_47; [L1415] SORT_1 var_483_arg_1 = var_482; [L1416] SORT_1 var_483 = var_483_arg_0 & var_483_arg_1; [L1417] SORT_1 var_484_arg_0 = var_481; [L1418] SORT_1 var_484_arg_1 = var_483; [L1419] SORT_1 var_484 = var_484_arg_0 | var_484_arg_1; [L1420] SORT_1 var_485_arg_0 = state_47; [L1421] SORT_1 var_485_arg_1 = var_482; [L1422] SORT_1 var_485 = var_485_arg_0 | var_485_arg_1; [L1423] SORT_1 var_486_arg_0 = state_49; [L1424] SORT_1 var_486_arg_1 = var_485; [L1425] SORT_1 var_486 = var_486_arg_0 & var_486_arg_1; [L1426] SORT_1 var_487_arg_0 = var_484; [L1427] SORT_1 var_487_arg_1 = var_486; [L1428] SORT_1 var_487 = var_487_arg_0 | var_487_arg_1; [L1429] SORT_1 var_488_arg_0 = state_49; [L1430] SORT_1 var_488_arg_1 = var_485; [L1431] SORT_1 var_488 = var_488_arg_0 | var_488_arg_1; [L1432] SORT_1 var_489_arg_0 = state_51; [L1433] SORT_1 var_489_arg_1 = var_488; [L1434] SORT_1 var_489 = var_489_arg_0 & var_489_arg_1; [L1435] SORT_1 var_490_arg_0 = var_487; [L1436] SORT_1 var_490_arg_1 = var_489; [L1437] SORT_1 var_490 = var_490_arg_0 | var_490_arg_1; [L1438] SORT_1 var_491_arg_0 = var_462; [L1439] SORT_1 var_491_arg_1 = ~var_490; [L1440] var_491_arg_1 = var_491_arg_1 & mask_SORT_1 [L1441] SORT_1 var_491 = var_491_arg_0 & var_491_arg_1; [L1442] SORT_1 var_492_arg_0 = state_51; [L1443] SORT_1 var_492_arg_1 = var_488; [L1444] SORT_1 var_492 = var_492_arg_0 | var_492_arg_1; [L1445] SORT_1 var_493_arg_0 = var_491; [L1446] SORT_1 var_493_arg_1 = var_492; [L1447] SORT_1 var_493 = var_493_arg_0 & var_493_arg_1; [L1448] SORT_1 var_494_arg_0 = state_53; [L1449] SORT_1 var_494_arg_1 = state_55; [L1450] SORT_1 var_494 = var_494_arg_0 & var_494_arg_1; [L1451] SORT_1 var_495_arg_0 = state_53; [L1452] SORT_1 var_495_arg_1 = state_55; [L1453] SORT_1 var_495 = var_495_arg_0 | var_495_arg_1; [L1454] SORT_1 var_496_arg_0 = state_57; [L1455] SORT_1 var_496_arg_1 = var_495; [L1456] SORT_1 var_496 = var_496_arg_0 & var_496_arg_1; [L1457] SORT_1 var_497_arg_0 = var_494; [L1458] SORT_1 var_497_arg_1 = var_496; [L1459] SORT_1 var_497 = var_497_arg_0 | var_497_arg_1; [L1460] SORT_1 var_498_arg_0 = state_57; [L1461] SORT_1 var_498_arg_1 = var_495; [L1462] SORT_1 var_498 = var_498_arg_0 | var_498_arg_1; [L1463] SORT_1 var_499_arg_0 = ~state_59; [L1464] var_499_arg_0 = var_499_arg_0 & mask_SORT_1 [L1465] SORT_1 var_499_arg_1 = var_498; [L1466] SORT_1 var_499 = var_499_arg_0 & var_499_arg_1; [L1467] SORT_1 var_500_arg_0 = var_497; [L1468] SORT_1 var_500_arg_1 = var_499; [L1469] SORT_1 var_500 = var_500_arg_0 | var_500_arg_1; [L1470] SORT_1 var_501_arg_0 = ~state_59; [L1471] var_501_arg_0 = var_501_arg_0 & mask_SORT_1 [L1472] SORT_1 var_501_arg_1 = var_498; [L1473] SORT_1 var_501 = var_501_arg_0 | var_501_arg_1; [L1474] SORT_1 var_502_arg_0 = state_61; [L1475] SORT_1 var_502_arg_1 = var_501; [L1476] SORT_1 var_502 = var_502_arg_0 & var_502_arg_1; [L1477] SORT_1 var_503_arg_0 = var_500; [L1478] SORT_1 var_503_arg_1 = var_502; [L1479] SORT_1 var_503 = var_503_arg_0 | var_503_arg_1; [L1480] SORT_1 var_504_arg_0 = var_493; [L1481] SORT_1 var_504_arg_1 = ~var_503; [L1482] var_504_arg_1 = var_504_arg_1 & mask_SORT_1 [L1483] SORT_1 var_504 = var_504_arg_0 & var_504_arg_1; [L1484] SORT_1 var_505_arg_0 = state_61; [L1485] SORT_1 var_505_arg_1 = var_501; [L1486] SORT_1 var_505 = var_505_arg_0 | var_505_arg_1; [L1487] SORT_1 var_506_arg_0 = var_504; [L1488] SORT_1 var_506_arg_1 = var_505; [L1489] SORT_1 var_506 = var_506_arg_0 & var_506_arg_1; [L1490] SORT_1 var_507_arg_0 = var_443; [L1491] SORT_1 var_507_arg_1 = var_506; [L1492] SORT_1 var_507 = var_507_arg_0 & var_507_arg_1; [L1493] SORT_1 var_508_arg_0 = var_135; [L1494] SORT_1 var_508_arg_1 = var_140; [L1495] SORT_1 var_508 = var_508_arg_0 & var_508_arg_1; [L1496] SORT_1 var_509_arg_0 = var_135; [L1497] SORT_1 var_509_arg_1 = var_140; [L1498] SORT_1 var_509 = var_509_arg_0 | var_509_arg_1; [L1499] SORT_1 var_510_arg_0 = var_144; [L1500] SORT_1 var_510_arg_1 = var_509; [L1501] SORT_1 var_510 = var_510_arg_0 & var_510_arg_1; [L1502] SORT_1 var_511_arg_0 = var_508; [L1503] SORT_1 var_511_arg_1 = var_510; [L1504] SORT_1 var_511 = var_511_arg_0 | var_511_arg_1; [L1505] SORT_1 var_512_arg_0 = var_144; [L1506] SORT_1 var_512_arg_1 = var_509; [L1507] SORT_1 var_512 = var_512_arg_0 | var_512_arg_1; [L1508] SORT_1 var_513_arg_0 = var_146; [L1509] SORT_1 var_513_arg_1 = var_512; [L1510] SORT_1 var_513 = var_513_arg_0 & var_513_arg_1; [L1511] SORT_1 var_514_arg_0 = var_511; [L1512] SORT_1 var_514_arg_1 = var_513; [L1513] SORT_1 var_514 = var_514_arg_0 | var_514_arg_1; [L1514] SORT_1 var_515_arg_0 = var_146; [L1515] SORT_1 var_515_arg_1 = var_512; [L1516] SORT_1 var_515 = var_515_arg_0 | var_515_arg_1; [L1517] SORT_1 var_516_arg_0 = ~var_514; [L1518] var_516_arg_0 = var_516_arg_0 & mask_SORT_1 [L1519] SORT_1 var_516_arg_1 = var_515; [L1520] SORT_1 var_516 = var_516_arg_0 & var_516_arg_1; [L1521] SORT_1 var_517_arg_0 = var_154; [L1522] SORT_1 var_517_arg_1 = var_159; [L1523] SORT_1 var_517 = var_517_arg_0 & var_517_arg_1; [L1524] SORT_1 var_518_arg_0 = var_154; [L1525] SORT_1 var_518_arg_1 = var_159; [L1526] SORT_1 var_518 = var_518_arg_0 | var_518_arg_1; [L1527] SORT_1 var_519_arg_0 = var_163; [L1528] SORT_1 var_519_arg_1 = var_518; [L1529] SORT_1 var_519 = var_519_arg_0 & var_519_arg_1; [L1530] SORT_1 var_520_arg_0 = var_517; [L1531] SORT_1 var_520_arg_1 = var_519; [L1532] SORT_1 var_520 = var_520_arg_0 | var_520_arg_1; [L1533] SORT_1 var_521_arg_0 = var_163; [L1534] SORT_1 var_521_arg_1 = var_518; [L1535] SORT_1 var_521 = var_521_arg_0 | var_521_arg_1; [L1536] SORT_1 var_522_arg_0 = var_165; [L1537] SORT_1 var_522_arg_1 = var_521; [L1538] SORT_1 var_522 = var_522_arg_0 & var_522_arg_1; [L1539] SORT_1 var_523_arg_0 = var_520; [L1540] SORT_1 var_523_arg_1 = var_522; [L1541] SORT_1 var_523 = var_523_arg_0 | var_523_arg_1; [L1542] SORT_1 var_524_arg_0 = var_516; [L1543] SORT_1 var_524_arg_1 = ~var_523; [L1544] var_524_arg_1 = var_524_arg_1 & mask_SORT_1 [L1545] SORT_1 var_524 = var_524_arg_0 & var_524_arg_1; [L1546] SORT_1 var_525_arg_0 = var_165; [L1547] SORT_1 var_525_arg_1 = var_521; [L1548] SORT_1 var_525 = var_525_arg_0 | var_525_arg_1; [L1549] SORT_1 var_526_arg_0 = var_524; [L1550] SORT_1 var_526_arg_1 = var_525; [L1551] SORT_1 var_526 = var_526_arg_0 & var_526_arg_1; [L1552] SORT_1 var_527_arg_0 = var_177; [L1553] SORT_1 var_527_arg_1 = var_171; [L1554] SORT_1 var_527 = var_527_arg_0 & var_527_arg_1; [L1555] SORT_1 var_528_arg_0 = var_177; [L1556] SORT_1 var_528_arg_1 = var_171; [L1557] SORT_1 var_528 = var_528_arg_0 | var_528_arg_1; [L1558] SORT_1 var_529_arg_0 = var_182; [L1559] SORT_1 var_529_arg_1 = var_528; [L1560] SORT_1 var_529 = var_529_arg_0 & var_529_arg_1; [L1561] SORT_1 var_530_arg_0 = var_527; [L1562] SORT_1 var_530_arg_1 = var_529; [L1563] SORT_1 var_530 = var_530_arg_0 | var_530_arg_1; [L1564] SORT_1 var_531_arg_0 = var_182; [L1565] SORT_1 var_531_arg_1 = var_528; [L1566] SORT_1 var_531 = var_531_arg_0 | var_531_arg_1; [L1567] SORT_1 var_532_arg_0 = var_186; [L1568] SORT_1 var_532_arg_1 = var_531; [L1569] SORT_1 var_532 = var_532_arg_0 & var_532_arg_1; [L1570] SORT_1 var_533_arg_0 = var_530; [L1571] SORT_1 var_533_arg_1 = var_532; [L1572] SORT_1 var_533 = var_533_arg_0 | var_533_arg_1; [L1573] SORT_1 var_534_arg_0 = var_186; [L1574] SORT_1 var_534_arg_1 = var_531; [L1575] SORT_1 var_534 = var_534_arg_0 | var_534_arg_1; [L1576] SORT_1 var_535_arg_0 = var_193; [L1577] SORT_1 var_535_arg_1 = var_534; [L1578] SORT_1 var_535 = var_535_arg_0 & var_535_arg_1; [L1579] SORT_1 var_536_arg_0 = var_533; [L1580] SORT_1 var_536_arg_1 = var_535; [L1581] SORT_1 var_536 = var_536_arg_0 | var_536_arg_1; [L1582] SORT_1 var_537_arg_0 = var_193; [L1583] SORT_1 var_537_arg_1 = var_534; [L1584] SORT_1 var_537 = var_537_arg_0 | var_537_arg_1; [L1585] SORT_1 var_538_arg_0 = var_197; [L1586] SORT_1 var_538_arg_1 = var_537; [L1587] SORT_1 var_538 = var_538_arg_0 & var_538_arg_1; [L1588] SORT_1 var_539_arg_0 = var_536; [L1589] SORT_1 var_539_arg_1 = var_538; [L1590] SORT_1 var_539 = var_539_arg_0 | var_539_arg_1; [L1591] SORT_1 var_540_arg_0 = var_197; [L1592] SORT_1 var_540_arg_1 = var_537; [L1593] SORT_1 var_540 = var_540_arg_0 | var_540_arg_1; [L1594] SORT_1 var_541_arg_0 = var_201; [L1595] SORT_1 var_541_arg_1 = var_540; [L1596] SORT_1 var_541 = var_541_arg_0 & var_541_arg_1; [L1597] SORT_1 var_542_arg_0 = var_539; [L1598] SORT_1 var_542_arg_1 = var_541; [L1599] SORT_1 var_542 = var_542_arg_0 | var_542_arg_1; [L1600] SORT_1 var_543_arg_0 = var_201; [L1601] SORT_1 var_543_arg_1 = var_540; [L1602] SORT_1 var_543 = var_543_arg_0 | var_543_arg_1; [L1603] SORT_1 var_544_arg_0 = var_205; [L1604] SORT_1 var_544_arg_1 = var_543; [L1605] SORT_1 var_544 = var_544_arg_0 & var_544_arg_1; [L1606] SORT_1 var_545_arg_0 = var_542; [L1607] SORT_1 var_545_arg_1 = var_544; [L1608] SORT_1 var_545 = var_545_arg_0 | var_545_arg_1; [L1609] SORT_1 var_546_arg_0 = var_205; [L1610] SORT_1 var_546_arg_1 = var_543; [L1611] SORT_1 var_546 = var_546_arg_0 | var_546_arg_1; [L1612] SORT_1 var_547_arg_0 = var_210; [L1613] SORT_1 var_547_arg_1 = var_546; [L1614] SORT_1 var_547 = var_547_arg_0 & var_547_arg_1; [L1615] SORT_1 var_548_arg_0 = var_545; [L1616] SORT_1 var_548_arg_1 = var_547; [L1617] SORT_1 var_548 = var_548_arg_0 | var_548_arg_1; [L1618] SORT_1 var_549_arg_0 = var_210; [L1619] SORT_1 var_549_arg_1 = var_546; [L1620] SORT_1 var_549 = var_549_arg_0 | var_549_arg_1; [L1621] SORT_1 var_550_arg_0 = var_215; [L1622] SORT_1 var_550_arg_1 = var_549; [L1623] SORT_1 var_550 = var_550_arg_0 & var_550_arg_1; [L1624] SORT_1 var_551_arg_0 = var_548; [L1625] SORT_1 var_551_arg_1 = var_550; [L1626] SORT_1 var_551 = var_551_arg_0 | var_551_arg_1; [L1627] SORT_1 var_552_arg_0 = var_215; [L1628] SORT_1 var_552_arg_1 = var_549; [L1629] SORT_1 var_552 = var_552_arg_0 | var_552_arg_1; [L1630] SORT_1 var_553_arg_0 = var_219; [L1631] SORT_1 var_553_arg_1 = var_552; [L1632] SORT_1 var_553 = var_553_arg_0 & var_553_arg_1; [L1633] SORT_1 var_554_arg_0 = var_551; [L1634] SORT_1 var_554_arg_1 = var_553; [L1635] SORT_1 var_554 = var_554_arg_0 | var_554_arg_1; [L1636] SORT_1 var_555_arg_0 = var_526; [L1637] SORT_1 var_555_arg_1 = ~var_554; [L1638] var_555_arg_1 = var_555_arg_1 & mask_SORT_1 [L1639] SORT_1 var_555 = var_555_arg_0 & var_555_arg_1; [L1640] SORT_1 var_556_arg_0 = var_219; [L1641] SORT_1 var_556_arg_1 = var_552; [L1642] SORT_1 var_556 = var_556_arg_0 | var_556_arg_1; [L1643] SORT_1 var_557_arg_0 = var_555; [L1644] SORT_1 var_557_arg_1 = var_556; [L1645] SORT_1 var_557 = var_557_arg_0 & var_557_arg_1; [L1646] SORT_1 var_558_arg_0 = var_230; [L1647] SORT_1 var_558_arg_1 = var_225; [L1648] SORT_1 var_558 = var_558_arg_0 & var_558_arg_1; [L1649] SORT_1 var_559_arg_0 = var_230; [L1650] SORT_1 var_559_arg_1 = var_225; [L1651] SORT_1 var_559 = var_559_arg_0 | var_559_arg_1; [L1652] SORT_1 var_560_arg_0 = var_234; [L1653] SORT_1 var_560_arg_1 = var_559; [L1654] SORT_1 var_560 = var_560_arg_0 & var_560_arg_1; [L1655] SORT_1 var_561_arg_0 = var_558; [L1656] SORT_1 var_561_arg_1 = var_560; [L1657] SORT_1 var_561 = var_561_arg_0 | var_561_arg_1; [L1658] SORT_1 var_562_arg_0 = var_234; [L1659] SORT_1 var_562_arg_1 = var_559; [L1660] SORT_1 var_562 = var_562_arg_0 | var_562_arg_1; [L1661] SORT_1 var_563_arg_0 = var_238; [L1662] SORT_1 var_563_arg_1 = var_562; [L1663] SORT_1 var_563 = var_563_arg_0 & var_563_arg_1; [L1664] SORT_1 var_564_arg_0 = var_561; [L1665] SORT_1 var_564_arg_1 = var_563; [L1666] SORT_1 var_564 = var_564_arg_0 | var_564_arg_1; [L1667] SORT_1 var_565_arg_0 = var_238; [L1668] SORT_1 var_565_arg_1 = var_562; [L1669] SORT_1 var_565 = var_565_arg_0 | var_565_arg_1; [L1670] SORT_1 var_566_arg_0 = var_241; [L1671] SORT_1 var_566_arg_1 = var_565; [L1672] SORT_1 var_566 = var_566_arg_0 & var_566_arg_1; [L1673] SORT_1 var_567_arg_0 = var_564; [L1674] SORT_1 var_567_arg_1 = var_566; [L1675] SORT_1 var_567 = var_567_arg_0 | var_567_arg_1; [L1676] SORT_1 var_568_arg_0 = var_557; [L1677] SORT_1 var_568_arg_1 = ~var_567; [L1678] var_568_arg_1 = var_568_arg_1 & mask_SORT_1 [L1679] SORT_1 var_568 = var_568_arg_0 & var_568_arg_1; [L1680] SORT_1 var_569_arg_0 = var_241; [L1681] SORT_1 var_569_arg_1 = var_565; [L1682] SORT_1 var_569 = var_569_arg_0 | var_569_arg_1; [L1683] SORT_1 var_570_arg_0 = var_568; [L1684] SORT_1 var_570_arg_1 = var_569; [L1685] SORT_1 var_570 = var_570_arg_0 & var_570_arg_1; [L1686] SORT_1 var_571_arg_0 = var_507; [L1687] SORT_1 var_571_arg_1 = var_570; [L1688] SORT_1 var_571 = var_571_arg_0 & var_571_arg_1; [L1689] SORT_1 var_572_arg_0 = var_571; [L1690] SORT_1 var_572_arg_1 = ~state_63; [L1691] var_572_arg_1 = var_572_arg_1 & mask_SORT_1 [L1692] SORT_1 var_572 = var_572_arg_0 & var_572_arg_1; [L1693] SORT_1 next_573_arg_1 = ~var_572; [L1694] next_573_arg_1 = next_573_arg_1 & mask_SORT_1 [L1696] state_6 = next_94_arg_1 [L1697] state_8 = next_115_arg_1 [L1698] state_10 = next_116_arg_1 [L1699] state_12 = next_128_arg_1 [L1700] state_15 = next_136_arg_1 [L1701] state_17 = next_141_arg_1 [L1702] state_19 = next_145_arg_1 [L1703] state_21 = next_147_arg_1 [L1704] state_23 = next_155_arg_1 [L1705] state_25 = next_160_arg_1 [L1706] state_27 = next_164_arg_1 [L1707] state_29 = next_166_arg_1 [L1708] state_31 = next_172_arg_1 [L1709] state_33 = next_178_arg_1 [L1710] state_35 = next_183_arg_1 [L1711] state_37 = next_187_arg_1 [L1712] state_39 = next_194_arg_1 [L1713] state_41 = next_198_arg_1 [L1714] state_43 = next_202_arg_1 [L1715] state_45 = next_206_arg_1 [L1716] state_47 = next_211_arg_1 [L1717] state_49 = next_216_arg_1 [L1718] state_51 = next_220_arg_1 [L1719] state_53 = next_226_arg_1 [L1720] state_55 = next_231_arg_1 [L1721] state_57 = next_235_arg_1 [L1722] state_59 = next_239_arg_1 [L1723] state_61 = next_242_arg_1 [L1724] state_63 = next_573_arg_1 VAL [bad_77_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_16_arg_1=0, init_18_arg_1=0, init_20_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_28_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, init_44_arg_1=0, init_46_arg_1=0, init_48_arg_1=0, init_50_arg_1=0, init_52_arg_1=0, init_54_arg_1=0, init_56_arg_1=0, init_58_arg_1=0, init_60_arg_1=0, init_62_arg_1=0, init_64_arg_1=0, init_7_arg_1=0, init_9_arg_1=0, input_102=0, input_105=0, input_117=1, input_119=1, input_122=0, input_129=2, input_134=1, input_138=38, input_148=0, input_153=255, input_157=1, input_170=11, input_181=246, input_185=59, input_190=1, input_192=2, input_196=40, input_200=63, input_204=248, input_214=2, input_221=35, input_223=1, input_229=244, input_78=0, input_80=1, input_81=1, input_83=0, input_84=0, input_85=1, input_86=1, input_95=0, input_96=1, input_97=1, mask_SORT_1=1, mask_SORT_2=31, mask_SORT_3=65535, mask_SORT_4=4294967295, msb_SORT_1=1, msb_SORT_2=16, msb_SORT_3=32768, msb_SORT_4=2147483648, next_115_arg_1=0, next_116_arg_1=0, next_128_arg_1=3, next_136_arg_1=0, next_141_arg_1=1, next_145_arg_1=1, next_147_arg_1=0, next_155_arg_1=0, next_160_arg_1=24, next_164_arg_1=1, next_166_arg_1=0, next_172_arg_1=67, next_178_arg_1=1, next_183_arg_1=1, next_187_arg_1=0, next_194_arg_1=2, next_198_arg_1=1, next_202_arg_1=1, next_206_arg_1=0, next_211_arg_1=0, next_216_arg_1=0, next_220_arg_1=1, next_226_arg_1=1, next_231_arg_1=0, next_235_arg_1=0, next_239_arg_1=1, next_242_arg_1=0, next_573_arg_1=1, next_94_arg_1=1, state_10=0, state_12=3, state_15=0, state_17=1, state_19=1, state_21=0, state_23=0, state_25=24, state_27=1, state_29=0, state_31=67, state_33=1, state_35=1, state_37=0, state_39=2, state_41=1, state_43=1, state_45=0, state_47=0, state_49=0, state_51=1, state_53=1, state_55=0, state_57=0, state_59=1, state_6=1, state_61=0, state_63=1, state_8=0, var_100=48, var_100_arg_0=49, var_100_arg_1=1, var_101=48, var_101_arg_0=48, var_103=50, var_103_arg_0=1, var_103_arg_1=49, var_104=50, var_104_arg_0=50, var_106=0, var_106_arg_0=0, var_106_arg_1=50, var_106_arg_2=0, var_107=48, var_107_arg_0=1, var_107_arg_1=48, var_107_arg_2=0, var_108=48, var_108_arg_0=1, var_108_arg_1=48, var_108_arg_2=48, var_109=48, var_109_arg_0=0, var_109_arg_1=50, var_109_arg_2=48, var_110=48, var_110_arg_0=0, var_110_arg_1=48, var_110_arg_2=48, var_111=48, var_111_arg_0=1, var_111_arg_1=48, var_111_arg_2=48, var_112=0, var_112_arg_0=1, var_112_arg_1=0, var_112_arg_2=48, var_113=0, var_113_arg_0=1, var_113_arg_1=0, var_113_arg_2=0, var_114=0, var_114_arg_0=0, var_114_arg_1=0, var_114_arg_2=0, var_118=3, var_120=65538, var_120_arg_0=1, var_120_arg_1=65537, var_121=2, var_121_arg_0=65538, var_123=65536, var_123_arg_0=65537, var_123_arg_1=1, var_124=0, var_124_arg_0=65536, var_125=0, var_125_arg_0=0, var_125_arg_1=0, var_125_arg_2=0, var_126=2, var_126_arg_0=1, var_126_arg_1=2, var_126_arg_2=0, var_127=3, var_127_arg_0=1, var_127_arg_1=3, var_127_arg_2=2, var_130=0, var_130_arg_0=0, var_130_arg_1=2, var_131=1, var_131_arg_0=0, var_131_arg_1=1, var_132=1, var_132_arg_0=1, var_132_arg_1=1, var_133=1, var_133_arg_0=1, var_133_arg_1=0, var_135=0, var_135_arg_0=1, var_135_arg_1=0, var_137=0, var_137_arg_0=0, var_137_arg_1=0, var_139=0, var_139_arg_0=0, var_139_arg_1=1, var_14=0, var_140=1, var_140_arg_0=0, var_140_arg_1=1, var_142=0, var_142_arg_0=0, var_142_arg_1=0, var_143=1, var_143_arg_0=0, var_143_arg_1=1, var_144=1, var_144_arg_0=1, var_144_arg_1=38, var_146=0, var_146_arg_0=0, var_146_arg_1=1, var_149=0, var_149_arg_0=0, var_149_arg_1=0, var_150=0, var_150_arg_0=0, var_150_arg_1=0, var_151=0, var_151_arg_0=0, var_151_arg_1=0, var_152=1, var_152_arg_0=0, var_152_arg_1=1, var_154=0, var_154_arg_0=1, var_154_arg_1=0, var_156=0, var_156_arg_0=0, var_156_arg_1=1, var_158=0, var_158_arg_0=0, var_158_arg_1=0, var_159=24, var_159_arg_0=0, var_159_arg_1=255, var_161=0, var_161_arg_0=0, var_161_arg_1=1, var_162=1, var_162_arg_0=0, var_162_arg_1=1, var_163=1, var_163_arg_0=1, var_163_arg_1=1, var_165=0, var_165_arg_0=0, var_165_arg_1=1, var_167=0, var_167_arg_0=0, var_167_arg_1=0, var_168=0, var_168_arg_0=0, var_168_arg_1=0, var_169=0, var_169_arg_0=0, var_169_arg_1=0, var_171=67, var_171_arg_0=0, var_171_arg_1=11, var_173=0, var_173_arg_0=0, var_173_arg_1=0, var_174=1, var_174_arg_0=0, var_174_arg_1=1, var_175=1, var_175_arg_0=1, var_175_arg_1=1, var_176=1, var_176_arg_0=1, var_176_arg_1=1, var_177=1, var_177_arg_0=1, var_177_arg_1=1, var_179=1, var_179_arg_0=0, var_179_arg_1=1, var_180=1, var_180_arg_0=1, var_180_arg_1=1, var_182=1, var_182_arg_0=1, var_182_arg_1=1, var_184=1, var_184_arg_0=0, var_184_arg_1=1, var_186=0, var_186_arg_0=1, var_186_arg_1=0, var_188=0, var_188_arg_0=0, var_188_arg_1=0, var_189=0, var_189_arg_0=0, var_189_arg_1=0, var_191=0, var_191_arg_0=0, var_191_arg_1=1, var_193=2, var_193_arg_0=0, var_193_arg_1=2, var_195=1, var_195_arg_0=0, var_195_arg_1=246, var_197=1, var_197_arg_0=1, var_197_arg_1=1, var_199=1, var_199_arg_0=0, var_199_arg_1=1, var_201=1, var_201_arg_0=1, var_201_arg_1=1, var_203=1, var_203_arg_0=1, var_203_arg_1=1, var_205=253, var_205_arg_0=1, var_205_arg_1=248, var_207=1, var_207_arg_0=0, var_207_arg_1=40, var_208=1, var_208_arg_0=1, var_208_arg_1=63, var_209=1, var_209_arg_0=1, var_209_arg_1=59, var_210=0, var_210_arg_0=1, var_210_arg_1=0, var_212=1, var_212_arg_0=0, var_212_arg_1=1, var_213=0, var_213_arg_0=1, var_213_arg_1=255, var_215=0, var_215_arg_0=0, var_215_arg_1=0, var_217=45, var_217_arg_0=0, var_217_arg_1=2, var_218=1, var_218_arg_0=45, var_218_arg_1=1, var_219=1, var_219_arg_0=1, var_219_arg_1=1, var_222=0, var_222_arg_0=0, var_222_arg_1=0, var_224=0, var_224_arg_0=0, var_224_arg_1=1, var_225=1, var_225_arg_0=0, var_225_arg_1=2, var_227=50, var_227_arg_0=0, var_227_arg_1=35, var_228=0, var_228_arg_0=50, var_228_arg_1=1, var_230=0, var_230_arg_0=0, var_230_arg_1=1, var_232=1, var_232_arg_0=0, var_232_arg_1=1, var_233=2, var_233_arg_0=1, var_233_arg_1=244, var_234=0, var_234_arg_0=2, var_234_arg_1=1, var_236=0, var_236_arg_0=1, var_236_arg_1=0, var_237=0, var_237_arg_0=0, var_237_arg_1=11, var_238=57, var_238_arg_0=0, var_238_arg_1=2, var_240=0, var_240_arg_0=0, var_240_arg_1=0, var_241=0, var_241_arg_0=0, var_241_arg_1=1, var_243=0, var_243_arg_0=0, var_243_arg_1=0, var_244=0, var_244_arg_0=0, var_244_arg_1=16, var_245=0, var_245_arg_0=1, var_245_arg_1=0, var_246=0, var_246_arg_0=0, var_246_arg_1=0, var_247=0, var_247_arg_0=0, var_247_arg_1=0, var_248=6200, var_249=0, var_249_arg_0=6200, var_249_arg_1=49, var_250=0, var_250_arg_0=0, var_250_arg_1=0, var_251=0, var_251_arg_0=0, var_251_arg_1=0, var_252=1, var_252_arg_0=1, var_252_arg_1=0, var_253=0, var_253_arg_0=0, var_253_arg_1=1, var_254=1, var_254_arg_0=0, var_254_arg_1=1, var_255=0, var_255_arg_0=0, var_255_arg_1=1, var_256=1, var_256_arg_0=0, var_256_arg_1=1, var_257=0, var_257_arg_0=0, var_257_arg_1=1, var_258=1, var_258_arg_0=0, var_258_arg_1=0, var_259=0, var_259_arg_0=0, var_259_arg_1=1, var_260=0, var_260_arg_0=0, var_260_arg_1=0, var_261=0, var_261_arg_0=0, var_261_arg_1=0, var_262=1, var_262_arg_0=1, var_262_arg_1=1, var_263=0, var_263_arg_0=0, var_263_arg_1=1, var_264=0, var_264_arg_0=0, var_264_arg_1=0, var_265=0, var_265_arg_0=0, var_265_arg_1=0, var_266=0, var_266_arg_0=0, var_266_arg_1=0, var_267=0, var_267_arg_0=0, var_267_arg_1=0, var_268=1, var_268_arg_0=1, var_268_arg_1=0, var_269=0, var_269_arg_0=0, var_269_arg_1=1, var_270=0, var_270_arg_0=0, var_270_arg_1=0, var_271=0, var_271_arg_0=0, var_271_arg_1=0, var_272=0, var_272_arg_0=0, var_272_arg_1=0, var_273=0, var_273_arg_0=0, var_273_arg_1=0, var_274=0, var_274_arg_0=0, var_274_arg_1=1, var_275=1, var_275_arg_0=1, var_275_arg_1=0, var_276=0, var_276_arg_0=0, var_276_arg_1=1, var_277=1, var_277_arg_0=0, var_277_arg_1=1, var_278=0, var_278_arg_0=0, var_278_arg_1=1, var_279=999, var_280=1, var_280_arg_0=49, var_280_arg_1=999, var_281=5999, var_282=0, var_282_arg_0=5999, var_282_arg_1=49, var_283=0, var_283_arg_0=0, var_283_arg_1=0, var_284=0, var_284_arg_0=0, var_284_arg_1=0, var_285=1, var_285_arg_0=1, var_285_arg_1=0, var_286=0, var_286_arg_0=0, var_286_arg_1=1, var_287=1000, var_288=0, var_288_arg_0=1000, var_288_arg_1=49, var_289=0, var_289_arg_0=0, var_289_arg_1=0, var_290=0, var_290_arg_0=0, var_290_arg_1=0, var_291=0, var_291_arg_0=0, var_291_arg_1=0, var_292=5800, var_293=1, var_293_arg_0=49, var_293_arg_1=5800, var_294=0, var_294_arg_0=0, var_294_arg_1=0, var_295=0, var_295_arg_0=0, var_295_arg_1=0, var_296=0, var_296_arg_0=0, var_296_arg_1=0, var_297=0, var_297_arg_0=65537, var_297_arg_1=0, var_298=0, var_298_arg_0=0, var_298_arg_1=0, var_299=0, var_299_arg_0=0, var_299_arg_1=0, var_300=0, var_300_arg_0=0, var_300_arg_1=0, var_301=1, var_301_arg_0=5, var_301_arg_1=65537, var_302=0, var_302_arg_0=0, var_302_arg_1=0, var_303=0, var_303_arg_0=0, var_303_arg_1=0, var_304=0, var_304_arg_0=0, var_304_arg_1=0, var_305=1, var_305_arg_0=1, var_305_arg_1=0, var_306=0, var_306_arg_0=0, var_306_arg_1=1, var_307=0, var_307_arg_0=0, var_307_arg_1=65537, var_308=0, var_308_arg_0=0, var_308_arg_1=0, var_309=1, var_309_arg_0=1, var_309_arg_1=0, var_310=0, var_310_arg_0=0, var_310_arg_1=1, var_311=0, var_311_arg_0=0, var_311_arg_1=0, var_312=1, var_312_arg_0=1, var_312_arg_1=0, var_313=0, var_313_arg_0=0, var_313_arg_1=1, var_314=1, var_314_arg_0=0, var_314_arg_1=1, var_315=0, var_315_arg_0=0, var_315_arg_1=1, var_316=0, var_316_arg_0=0, var_316_arg_1=0, var_317=0, var_317_arg_0=0, var_317_arg_1=0, var_318=0, var_318_arg_0=0, var_318_arg_1=0, var_319=0, var_319_arg_0=0, var_319_arg_1=0, var_320=0, var_320_arg_0=0, var_320_arg_1=0, var_321=0, var_321_arg_0=0, var_321_arg_1=0, var_322=1, var_322_arg_0=0, var_322_arg_1=1, var_323=0, var_323_arg_0=0, var_323_arg_1=1, var_324=0, var_324_arg_0=0, var_324_arg_1=0, var_325=0, var_325_arg_0=0, var_325_arg_1=0, var_326=0, var_326_arg_0=0, var_326_arg_1=0, var_327=0, var_327_arg_0=0, var_327_arg_1=0, var_328=0, var_328_arg_0=0, var_328_arg_1=0, var_329=0, var_329_arg_0=0, var_329_arg_1=0, var_330=0, var_330_arg_0=0, var_330_arg_1=0, var_331=0, var_331_arg_0=0, var_331_arg_1=0, var_332=1, var_332_arg_0=1, var_332_arg_1=0, var_333=0, var_333_arg_0=0, var_333_arg_1=1, var_334=0, var_334_arg_0=0, var_334_arg_1=0, var_335=0, var_335_arg_0=0, var_335_arg_1=0, var_336=0, var_336_arg_0=0, var_336_arg_1=0, var_337=0, var_337_arg_0=0, var_337_arg_1=0, var_338=0, var_338_arg_0=0, var_338_arg_1=0, var_339=1, var_339_arg_0=1, var_339_arg_1=0, var_340=0, var_340_arg_0=0, var_340_arg_1=1, var_341=0, var_341_arg_0=0, var_341_arg_1=0, var_342=0, var_342_arg_0=0, var_342_arg_1=0, var_343=0, var_343_arg_0=0, var_343_arg_1=0, var_344=0, var_344_arg_0=0, var_344_arg_1=0, var_345=1, var_345_arg_0=1, var_345_arg_1=0, var_346=0, var_346_arg_0=0, var_346_arg_1=1, var_347=2, var_347_arg_0=2, var_347_arg_1=0, var_348=250, var_348_arg_0=1, var_348_arg_1=2, var_349=9, var_349_arg_0=1, var_349_arg_1=250, var_350=14, var_350_arg_0=38, var_350_arg_1=9, var_351=2, var_351_arg_0=0, var_351_arg_1=14, var_352=2, var_352_arg_0=0, var_352_arg_1=2, var_353=2, var_353_arg_0=0, var_353_arg_1=2, var_354=251, var_354_arg_0=0, var_354_arg_1=2, var_355=255, var_355_arg_0=1, var_355_arg_1=251, var_356=22, var_356_arg_0=1, var_356_arg_1=255, var_357=1, var_357_arg_0=1, var_357_arg_1=22, var_358=1, var_358_arg_0=1, var_358_arg_1=1, var_359=1, var_359_arg_0=1, var_359_arg_1=1, var_360=1, var_360_arg_0=0, var_360_arg_1=1, var_361=1, var_361_arg_0=0, var_361_arg_1=1, var_362=1, var_362_arg_0=1, var_362_arg_1=1, var_363=1, var_363_arg_0=1, var_363_arg_1=1, var_364=51, var_364_arg_0=246, var_364_arg_1=1, var_365=0, var_365_arg_0=1, var_365_arg_1=51, var_366=2, var_366_arg_0=40, var_366_arg_1=0, var_367=1, var_367_arg_0=63, var_367_arg_1=2, var_368=1, var_368_arg_0=59, var_368_arg_1=1, var_369=1, var_369_arg_0=248, var_369_arg_1=1, var_370=247, var_370_arg_0=35, var_370_arg_1=1, var_371=1, var_371_arg_0=1, var_371_arg_1=247, var_372=1, var_372_arg_0=0, var_372_arg_1=1, var_373=3, var_373_arg_0=244, var_373_arg_1=1, var_374=1, var_374_arg_0=1, var_374_arg_1=3, var_375=3, var_375_arg_0=255, var_375_arg_1=1, var_376=3, var_376_arg_0=2, var_376_arg_1=3, var_377=0, var_377_arg_0=11, var_377_arg_1=3, var_378=55, var_378_arg_0=2, var_378_arg_1=0, var_379=0, var_379_arg_0=0, var_379_arg_1=55, var_380=0, var_380_arg_0=2, var_380_arg_1=0, var_381=0, var_381_arg_0=1, var_381_arg_1=2, var_382=0, var_382_arg_0=0, var_382_arg_1=0, var_383=0, var_383_arg_0=1, var_383_arg_1=250, var_384=0, var_384_arg_0=0, var_384_arg_1=0, var_385=38, var_385_arg_0=38, var_385_arg_1=9, var_386=1, var_386_arg_0=0, var_386_arg_1=38, var_387=0, var_387_arg_0=0, var_387_arg_1=14, var_388=1, var_388_arg_0=1, var_388_arg_1=0, var_389=0, var_389_arg_0=0, var_389_arg_1=2, var_390=1, var_390_arg_0=1, var_390_arg_1=0, var_391=0, var_391_arg_0=0, var_391_arg_1=2, var_392=1, var_392_arg_0=1, var_392_arg_1=0, var_393=0, var_393_arg_0=0, var_393_arg_1=2, var_394=1, var_394_arg_0=1, var_394_arg_1=0, var_395=1, var_395_arg_0=1, var_395_arg_1=251, var_396=1, var_396_arg_0=1, var_396_arg_1=1, var_397=1, var_397_arg_0=1, var_397_arg_1=255, var_398=1, var_398_arg_0=1, var_398_arg_1=1, var_399=0, var_399_arg_0=1, var_399_arg_1=22, var_400=1, var_400_arg_0=1, var_400_arg_1=0, var_401=1, var_401_arg_0=1, var_401_arg_1=1, var_402=1, var_402_arg_0=1, var_402_arg_1=1, var_403=1, var_403_arg_0=1, var_403_arg_1=1, var_404=1, var_404_arg_0=1, var_404_arg_1=1, var_405=0, var_405_arg_0=0, var_405_arg_1=1, var_406=1, var_406_arg_0=1, var_406_arg_1=0, var_407=0, var_407_arg_0=0, var_407_arg_1=1, var_408=1, var_408_arg_0=1, var_408_arg_1=0, var_409=1, var_409_arg_0=1, var_409_arg_1=1, var_410=1, var_410_arg_0=1, var_410_arg_1=1, var_411=1, var_411_arg_0=1, var_411_arg_1=1, var_412=1, var_412_arg_0=1, var_412_arg_1=1, var_413=0, var_413_arg_0=246, var_413_arg_1=1, var_414=1, var_414_arg_0=1, var_414_arg_1=0, var_415=1, var_415_arg_0=1, var_415_arg_1=51, var_416=1, var_416_arg_0=1, var_416_arg_1=1, var_417=0, var_417_arg_0=40, var_417_arg_1=0, var_418=1, var_418_arg_0=1, var_418_arg_1=0, var_419=2, var_419_arg_0=63, var_419_arg_1=2, var_420=2, var_420_arg_0=1, var_420_arg_1=2, var_421=1, var_421_arg_0=59, var_421_arg_1=1, var_422=36, var_422_arg_0=2, var_422_arg_1=1, var_423=0, var_423_arg_0=248, var_423_arg_1=1, var_424=36, var_424_arg_0=36, var_424_arg_1=0, var_425=1, var_425_arg_0=35, var_425_arg_1=1, var_426=2, var_426_arg_0=36, var_426_arg_1=1, var_427=1, var_427_arg_0=1, var_427_arg_1=247, var_428=107, var_428_arg_0=2, var_428_arg_1=1, var_429=0, var_429_arg_0=0, var_429_arg_1=1, var_430=249, var_430_arg_0=107, var_430_arg_1=0, var_431=0, var_431_arg_0=244, var_431_arg_1=1, var_432=249, var_432_arg_0=249, var_432_arg_1=0, var_433=1, var_433_arg_0=1, var_433_arg_1=3, var_434=13, var_434_arg_0=249, var_434_arg_1=1, var_435=1, var_435_arg_0=255, var_435_arg_1=1, var_436=7, var_436_arg_0=13, var_436_arg_1=1, var_437=1, var_437_arg_0=2, var_437_arg_1=3, var_438=1, var_438_arg_0=7, var_438_arg_1=1, var_439=12, var_439_arg_0=11, var_439_arg_1=3, var_440=1, var_440_arg_0=1, var_440_arg_1=12, var_441=0, var_441_arg_0=2, var_441_arg_1=0, var_442=1, var_442_arg_0=1, var_442_arg_1=0, var_443=0, var_443_arg_0=0, var_443_arg_1=1, var_444=0, var_444_arg_0=0, var_444_arg_1=0, var_445=0, var_445_arg_0=0, var_445_arg_1=0, var_446=0, var_446_arg_0=0, var_446_arg_1=0, var_447=0, var_447_arg_0=0, var_447_arg_1=0, var_448=0, var_448_arg_0=0, var_448_arg_1=0, var_449=0, var_449_arg_0=0, var_449_arg_1=0, var_450=0, var_450_arg_0=0, var_450_arg_1=0, var_451=0, var_451_arg_0=0, var_451_arg_1=0, var_452=0, var_452_arg_0=0, var_452_arg_1=0, var_453=0, var_453_arg_0=0, var_453_arg_1=0, var_454=0, var_454_arg_0=0, var_454_arg_1=0, var_455=0, var_455_arg_0=0, var_455_arg_1=0, var_456=0, var_456_arg_0=0, var_456_arg_1=0, var_457=0, var_457_arg_0=0, var_457_arg_1=0, var_458=0, var_458_arg_0=0, var_458_arg_1=0, var_459=0, var_459_arg_0=0, var_459_arg_1=0, var_460=0, var_460_arg_0=0, var_460_arg_1=0, var_461=0, var_461_arg_0=0, var_461_arg_1=0, var_462=0, var_462_arg_0=0, var_462_arg_1=0, var_463=0, var_463_arg_0=0, var_463_arg_1=0, var_464=0, var_464_arg_0=0, var_464_arg_1=0, var_465=0, var_465_arg_0=0, var_465_arg_1=0, var_466=0, var_466_arg_0=0, var_466_arg_1=0, var_467=0, var_467_arg_0=0, var_467_arg_1=0, var_468=0, var_468_arg_0=0, var_468_arg_1=0, var_469=0, var_469_arg_0=0, var_469_arg_1=0, var_470=0, var_470_arg_0=0, var_470_arg_1=0, var_471=0, var_471_arg_0=0, var_471_arg_1=0, var_472=0, var_472_arg_0=0, var_472_arg_1=0, var_473=0, var_473_arg_0=0, var_473_arg_1=0, var_474=0, var_474_arg_0=0, var_474_arg_1=0, var_475=0, var_475_arg_0=0, var_475_arg_1=0, var_476=0, var_476_arg_0=0, var_476_arg_1=0, var_477=0, var_477_arg_0=0, var_477_arg_1=0, var_478=0, var_478_arg_0=0, var_478_arg_1=0, var_479=0, var_479_arg_0=0, var_479_arg_1=0, var_480=0, var_480_arg_0=0, var_480_arg_1=0, var_481=0, var_481_arg_0=0, var_481_arg_1=0, var_482=1, var_482_arg_0=1, var_482_arg_1=0, var_483=0, var_483_arg_0=0, var_483_arg_1=1, var_484=0, var_484_arg_0=0, var_484_arg_1=0, var_485=1, var_485_arg_0=0, var_485_arg_1=1, var_486=0, var_486_arg_0=0, var_486_arg_1=1, var_487=0, var_487_arg_0=0, var_487_arg_1=0, var_488=1, var_488_arg_0=0, var_488_arg_1=1, var_489=0, var_489_arg_0=0, var_489_arg_1=1, var_490=0, var_490_arg_0=0, var_490_arg_1=0, var_491=0, var_491_arg_0=0, var_491_arg_1=0, var_492=1, var_492_arg_0=0, var_492_arg_1=1, var_493=0, var_493_arg_0=0, var_493_arg_1=1, var_494=0, var_494_arg_0=0, var_494_arg_1=0, var_495=0, var_495_arg_0=0, var_495_arg_1=0, var_496=0, var_496_arg_0=0, var_496_arg_1=0, var_497=0, var_497_arg_0=0, var_497_arg_1=0, var_498=0, var_498_arg_0=0, var_498_arg_1=0, var_499=0, var_499_arg_0=0, var_499_arg_1=0, var_5=0, var_500=0, var_500_arg_0=0, var_500_arg_1=0, var_501=0, var_501_arg_0=0, var_501_arg_1=0, var_502=0, var_502_arg_0=0, var_502_arg_1=0, var_503=0, var_503_arg_0=0, var_503_arg_1=0, var_504=0, var_504_arg_0=0, var_504_arg_1=0, var_505=0, var_505_arg_0=0, var_505_arg_1=0, var_506=0, var_506_arg_0=0, var_506_arg_1=0, var_507=0, var_507_arg_0=0, var_507_arg_1=0, var_508=0, var_508_arg_0=0, var_508_arg_1=1, var_509=1, var_509_arg_0=0, var_509_arg_1=1, var_510=1, var_510_arg_0=1, var_510_arg_1=1, var_511=1, var_511_arg_0=0, var_511_arg_1=1, var_512=1, var_512_arg_0=1, var_512_arg_1=1, var_513=0, var_513_arg_0=0, var_513_arg_1=1, var_514=1, var_514_arg_0=1, var_514_arg_1=0, var_515=1, var_515_arg_0=0, var_515_arg_1=1, var_516=1, var_516_arg_0=1, var_516_arg_1=1, var_517=0, var_517_arg_0=0, var_517_arg_1=24, var_518=254, var_518_arg_0=0, var_518_arg_1=24, var_519=0, var_519_arg_0=1, var_519_arg_1=254, var_520=0, var_520_arg_0=0, var_520_arg_1=0, var_521=4, var_521_arg_0=1, var_521_arg_1=254, var_522=0, var_522_arg_0=0, var_522_arg_1=4, var_523=0, var_523_arg_0=0, var_523_arg_1=0, var_524=1, var_524_arg_0=1, var_524_arg_1=1, var_525=252, var_525_arg_0=0, var_525_arg_1=4, var_526=0, var_526_arg_0=1, var_526_arg_1=252, var_527=1, var_527_arg_0=1, var_527_arg_1=67, var_528=2, var_528_arg_0=1, var_528_arg_1=67, var_529=0, var_529_arg_0=1, var_529_arg_1=2, var_530=1, var_530_arg_0=1, var_530_arg_1=0, var_531=0, var_531_arg_0=1, var_531_arg_1=2, var_532=0, var_532_arg_0=0, var_532_arg_1=0, var_533=1, var_533_arg_0=1, var_533_arg_1=0, var_534=0, var_534_arg_0=0, var_534_arg_1=0, var_535=0, var_535_arg_0=2, var_535_arg_1=0, var_536=1, var_536_arg_0=1, var_536_arg_1=0, var_537=21, var_537_arg_0=2, var_537_arg_1=0, var_538=1, var_538_arg_0=1, var_538_arg_1=21, var_539=1, var_539_arg_0=1, var_539_arg_1=1, var_540=20, var_540_arg_0=1, var_540_arg_1=21, var_541=0, var_541_arg_0=1, var_541_arg_1=20, var_542=1, var_542_arg_0=1, var_542_arg_1=0, var_543=42, var_543_arg_0=1, var_543_arg_1=20, var_544=5, var_544_arg_0=253, var_544_arg_1=42, var_545=0, var_545_arg_0=1, var_545_arg_1=5, var_546=2, var_546_arg_0=253, var_546_arg_1=42, var_547=0, var_547_arg_0=0, var_547_arg_1=2, var_548=0, var_548_arg_0=0, var_548_arg_1=0, var_549=23, var_549_arg_0=0, var_549_arg_1=2, var_550=0, var_550_arg_0=0, var_550_arg_1=23, var_551=0, var_551_arg_0=0, var_551_arg_1=0, var_552=1, var_552_arg_0=0, var_552_arg_1=23, var_553=1, var_553_arg_0=1, var_553_arg_1=1, var_554=1, var_554_arg_0=0, var_554_arg_1=1, var_555=0, var_555_arg_0=0, var_555_arg_1=0, var_556=1, var_556_arg_0=1, var_556_arg_1=1, var_557=0, var_557_arg_0=0, var_557_arg_1=1, var_558=0, var_558_arg_0=0, var_558_arg_1=1, var_559=1, var_559_arg_0=0, var_559_arg_1=1, var_560=0, var_560_arg_0=0, var_560_arg_1=1, var_561=0, var_561_arg_0=0, var_561_arg_1=0, var_562=1, var_562_arg_0=0, var_562_arg_1=1, var_563=1, var_563_arg_0=57, var_563_arg_1=1, var_564=1, var_564_arg_0=0, var_564_arg_1=1, var_565=0, var_565_arg_0=57, var_565_arg_1=1, var_566=0, var_566_arg_0=0, var_566_arg_1=0, var_567=1, var_567_arg_0=1, var_567_arg_1=0, var_568=0, var_568_arg_0=0, var_568_arg_1=0, var_569=0, var_569_arg_0=0, var_569_arg_1=0, var_570=0, var_570_arg_0=0, var_570_arg_1=0, var_571=0, var_571_arg_0=0, var_571_arg_1=0, var_572=0, var_572_arg_0=0, var_572_arg_1=1, var_65=5, var_66=0, var_67=0, var_67_arg_0=0, var_67_arg_1=0, var_68=16, var_69=65537, var_69_arg_0=0, var_69_arg_1=16, var_70=0, var_70_arg_0=5, var_70_arg_1=65537, var_71=1, var_72=0, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_73_arg_2=0, var_74=0, var_74_arg_0=1, var_74_arg_1=0, var_75=0, var_75_arg_0=0, var_75_arg_1=0, var_76=0, var_76_arg_0=0, var_76_arg_1=0, var_79=1, var_82=0, var_87=1, var_87_arg_0=1, var_87_arg_1=1, var_87_arg_2=0, var_88=0, var_88_arg_0=1, var_88_arg_1=0, var_88_arg_2=1, var_89=0, var_89_arg_0=0, var_89_arg_1=1, var_89_arg_2=0, var_90=0, var_90_arg_0=0, var_90_arg_1=1, var_90_arg_2=0, var_91=0, var_91_arg_0=1, var_91_arg_1=0, var_91_arg_2=0, var_92=1, var_92_arg_0=1, var_92_arg_1=1, var_92_arg_2=0, var_93=1, var_93_arg_0=0, var_93_arg_1=1, var_93_arg_2=1, var_98=0, var_98_arg_0=0, var_98_arg_1=0, var_99=49, var_99_arg_0=0, var_99_arg_1=16] [L177] input_78 = __VERIFIER_nondet_uchar() [L178] input_78 = input_78 & mask_SORT_1 [L179] input_80 = __VERIFIER_nondet_uchar() [L180] input_80 = input_80 & mask_SORT_1 [L181] input_81 = __VERIFIER_nondet_uchar() [L182] input_81 = input_81 & mask_SORT_1 [L183] input_83 = __VERIFIER_nondet_uchar() [L184] input_83 = input_83 & mask_SORT_1 [L185] input_84 = __VERIFIER_nondet_uchar() [L186] input_84 = input_84 & mask_SORT_1 [L187] input_85 = __VERIFIER_nondet_uchar() [L188] input_85 = input_85 & mask_SORT_1 [L189] input_86 = __VERIFIER_nondet_uchar() [L190] input_86 = input_86 & mask_SORT_1 [L191] input_95 = __VERIFIER_nondet_uchar() [L192] input_95 = input_95 & mask_SORT_1 [L193] input_96 = __VERIFIER_nondet_uchar() [L194] input_96 = input_96 & mask_SORT_1 [L195] input_97 = __VERIFIER_nondet_uchar() [L196] input_97 = input_97 & mask_SORT_1 [L197] input_102 = __VERIFIER_nondet_uchar() [L198] input_102 = input_102 & mask_SORT_1 [L199] input_105 = __VERIFIER_nondet_uchar() [L200] input_105 = input_105 & mask_SORT_1 [L201] input_117 = __VERIFIER_nondet_uchar() [L202] input_117 = input_117 & mask_SORT_1 [L203] input_119 = __VERIFIER_nondet_uchar() [L204] input_119 = input_119 & mask_SORT_1 [L205] input_122 = __VERIFIER_nondet_uchar() [L206] input_122 = input_122 & mask_SORT_1 [L207] input_129 = __VERIFIER_nondet_uchar() [L208] input_134 = __VERIFIER_nondet_uchar() [L209] input_138 = __VERIFIER_nondet_uchar() [L210] input_148 = __VERIFIER_nondet_uchar() [L211] input_153 = __VERIFIER_nondet_uchar() [L212] input_157 = __VERIFIER_nondet_uchar() [L213] input_170 = __VERIFIER_nondet_uchar() [L214] input_181 = __VERIFIER_nondet_uchar() [L215] input_185 = __VERIFIER_nondet_uchar() [L216] input_190 = __VERIFIER_nondet_uchar() [L217] input_192 = __VERIFIER_nondet_uchar() [L218] input_196 = __VERIFIER_nondet_uchar() [L219] input_200 = __VERIFIER_nondet_uchar() [L220] input_204 = __VERIFIER_nondet_uchar() [L221] input_214 = __VERIFIER_nondet_uchar() [L222] input_221 = __VERIFIER_nondet_uchar() [L223] input_223 = __VERIFIER_nondet_uchar() [L224] input_229 = __VERIFIER_nondet_uchar() [L227] SORT_3 var_67_arg_0 = state_12; [L228] SORT_3 var_67_arg_1 = var_66; [L229] SORT_4 var_67 = ((SORT_4)var_67_arg_0 << 16) | var_67_arg_1; [L230] SORT_4 var_69_arg_0 = var_67; [L231] EXPR (var_69_arg_0 & msb_SORT_4) ? (var_69_arg_0 | ~mask_SORT_4) : (var_69_arg_0 & mask_SORT_4) [L231] var_69_arg_0 = (var_69_arg_0 & msb_SORT_4) ? (var_69_arg_0 | ~mask_SORT_4) : (var_69_arg_0 & mask_SORT_4) [L232] SORT_4 var_69_arg_1 = var_68; [L233] SORT_4 var_69 = (int)var_69_arg_0 >> var_69_arg_1; [L234] EXPR (var_69_arg_0 & msb_SORT_4) ? (var_69 | ~(mask_SORT_4 >> var_69_arg_1)) : var_69 [L234] var_69 = (var_69_arg_0 & msb_SORT_4) ? (var_69 | ~(mask_SORT_4 >> var_69_arg_1)) : var_69 [L235] var_69 = var_69 & mask_SORT_4 [L236] SORT_4 var_70_arg_0 = var_65; [L237] SORT_4 var_70_arg_1 = var_69; [L238] SORT_1 var_70 = var_70_arg_0 == var_70_arg_1; [L239] SORT_1 var_73_arg_0 = state_43; [L240] SORT_4 var_73_arg_1 = var_71; [L241] SORT_4 var_73_arg_2 = var_72; [L242] EXPR var_73_arg_0 ? var_73_arg_1 : var_73_arg_2 [L242] SORT_4 var_73 = var_73_arg_0 ? var_73_arg_1 : var_73_arg_2; [L243] var_73 = var_73 & mask_SORT_4 [L244] SORT_4 var_74_arg_0 = var_71; [L245] SORT_4 var_74_arg_1 = var_73; [L246] SORT_1 var_74 = var_74_arg_0 == var_74_arg_1; [L247] SORT_1 var_75_arg_0 = ~var_70; [L248] var_75_arg_0 = var_75_arg_0 & mask_SORT_1 [L249] SORT_1 var_75_arg_1 = var_74; [L250] SORT_1 var_75 = var_75_arg_0 & var_75_arg_1; [L251] SORT_1 var_76_arg_0 = ~state_63; [L252] var_76_arg_0 = var_76_arg_0 & mask_SORT_1 [L253] SORT_1 var_76_arg_1 = var_75; [L254] SORT_1 var_76 = var_76_arg_0 & var_76_arg_1; [L255] var_76 = var_76 & mask_SORT_1 [L256] SORT_1 bad_77_arg_0 = var_76; [L257] CALL __VERIFIER_assert(!(bad_77_arg_0)) [L20] COND TRUE !(cond) VAL [\old(cond)=0, cond=0] [L20] reach_error() VAL [\old(cond)=0, cond=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 7 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 323.9s, OverallIterations: 2, TraceHistogramMax: 2, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 2.7s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 1 mSolverCounterUnknown, 3 SdHoareTripleChecker+Valid, 2.5s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 3 mSDsluCounter, 6 SdHoareTripleChecker+Invalid, 2.5s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 5 mSDsCounter, 1 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 7 IncrementalHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 1 mSolverCounterUnsat, 2 mSDtfsCounter, 7 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=8occurred in iteration=1, InterpolantAutomatonStates: 5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 1 MinimizatonAttempts, 1 StatesRemovedByMinimization, 1 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 172.6s SatisfiabilityAnalysisTime, 2.5s InterpolantComputationTime, 11 NumberOfCodeBlocks, 11 NumberOfCodeBlocksAsserted, 2 NumberOfCheckSat, 3 ConstructedInterpolants, 0 QuantifiedInterpolants, 21 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 1 InterpolantComputations, 1 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2022-11-03 03:55:05,398 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.resistance.2.prop3-func-interl.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 607e8e28a2e5d35754fe33162723eb929cf7678ee7656fa904ae1326ff2b5e8c --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-5e519f3 [2022-11-03 03:55:07,834 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-03 03:55:07,838 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-03 03:55:07,886 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-03 03:55:07,886 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-03 03:55:07,890 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-03 03:55:07,892 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-03 03:55:07,897 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-03 03:55:07,902 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-03 03:55:07,907 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-03 03:55:07,908 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-03 03:55:07,910 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-03 03:55:07,911 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-03 03:55:07,913 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-03 03:55:07,915 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-03 03:55:07,917 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-03 03:55:07,918 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-03 03:55:07,919 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-03 03:55:07,923 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-03 03:55:07,928 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-03 03:55:07,932 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-03 03:55:07,933 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-03 03:55:07,935 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-03 03:55:07,936 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-03 03:55:07,943 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-03 03:55:07,947 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-03 03:55:07,947 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-03 03:55:07,949 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-03 03:55:07,950 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-03 03:55:07,951 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-03 03:55:07,951 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-03 03:55:07,952 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-03 03:55:07,953 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-03 03:55:07,955 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-03 03:55:07,956 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-03 03:55:07,956 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-03 03:55:07,957 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-03 03:55:07,958 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-03 03:55:07,958 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-03 03:55:07,959 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-03 03:55:07,960 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-03 03:55:07,961 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Bitvector.epf [2022-11-03 03:55:08,002 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-03 03:55:08,003 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-03 03:55:08,004 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-03 03:55:08,004 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-03 03:55:08,005 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-03 03:55:08,005 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-03 03:55:08,005 INFO L138 SettingsManager]: * User list type=DISABLED [2022-11-03 03:55:08,005 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-11-03 03:55:08,006 INFO L138 SettingsManager]: * Explicit value domain=true [2022-11-03 03:55:08,006 INFO L138 SettingsManager]: * Octagon Domain=false [2022-11-03 03:55:08,007 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-11-03 03:55:08,007 INFO L138 SettingsManager]: * Interval Domain=false [2022-11-03 03:55:08,008 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-03 03:55:08,009 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-03 03:55:08,009 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-03 03:55:08,009 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-03 03:55:08,009 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-03 03:55:08,009 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-11-03 03:55:08,010 INFO L138 SettingsManager]: * Use bitvectors instead of ints=true [2022-11-03 03:55:08,010 INFO L138 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2022-11-03 03:55:08,010 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-03 03:55:08,010 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-03 03:55:08,011 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-03 03:55:08,011 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-03 03:55:08,011 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-03 03:55:08,011 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-03 03:55:08,011 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 03:55:08,012 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-03 03:55:08,012 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-03 03:55:08,012 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-03 03:55:08,012 INFO L138 SettingsManager]: * Trace refinement strategy=WALRUS [2022-11-03 03:55:08,012 INFO L138 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2022-11-03 03:55:08,013 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-03 03:55:08,013 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-11-03 03:55:08,013 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-11-03 03:55:08,014 INFO L138 SettingsManager]: * Logic for external solver=AUFBV WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 607e8e28a2e5d35754fe33162723eb929cf7678ee7656fa904ae1326ff2b5e8c [2022-11-03 03:55:08,394 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-03 03:55:08,425 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-03 03:55:08,429 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-03 03:55:08,431 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-03 03:55:08,431 INFO L275 PluginConnector]: CDTParser initialized [2022-11-03 03:55:08,433 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.resistance.2.prop3-func-interl.c [2022-11-03 03:55:08,506 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/data/4db4a7e1e/5f0e39b2a2f8408fb251ee4d1bdedeca/FLAGdb1329995 [2022-11-03 03:55:09,217 INFO L306 CDTParser]: Found 1 translation units. [2022-11-03 03:55:09,217 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.resistance.2.prop3-func-interl.c [2022-11-03 03:55:09,239 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/data/4db4a7e1e/5f0e39b2a2f8408fb251ee4d1bdedeca/FLAGdb1329995 [2022-11-03 03:55:09,425 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/data/4db4a7e1e/5f0e39b2a2f8408fb251ee4d1bdedeca [2022-11-03 03:55:09,427 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-03 03:55:09,428 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-03 03:55:09,433 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-03 03:55:09,433 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-03 03:55:09,437 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-03 03:55:09,438 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 03:55:09" (1/1) ... [2022-11-03 03:55:09,439 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@39e967f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:55:09, skipping insertion in model container [2022-11-03 03:55:09,439 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 03:55:09" (1/1) ... [2022-11-03 03:55:09,447 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-03 03:55:09,545 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-03 03:55:09,699 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.resistance.2.prop3-func-interl.c[1014,1027] [2022-11-03 03:55:10,064 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 03:55:10,088 INFO L203 MainTranslator]: Completed pre-run [2022-11-03 03:55:10,098 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.resistance.2.prop3-func-interl.c[1014,1027] [2022-11-03 03:55:10,268 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 03:55:10,281 INFO L208 MainTranslator]: Completed translation [2022-11-03 03:55:10,282 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:55:10 WrapperNode [2022-11-03 03:55:10,282 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-03 03:55:10,283 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-03 03:55:10,283 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-03 03:55:10,284 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-03 03:55:10,291 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:55:10" (1/1) ... [2022-11-03 03:55:10,331 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:55:10" (1/1) ... [2022-11-03 03:55:10,431 INFO L138 Inliner]: procedures = 11, calls = 3, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1866 [2022-11-03 03:55:10,431 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-03 03:55:10,432 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-03 03:55:10,432 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-03 03:55:10,432 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-03 03:55:10,441 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:55:10" (1/1) ... [2022-11-03 03:55:10,441 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:55:10" (1/1) ... [2022-11-03 03:55:10,450 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:55:10" (1/1) ... [2022-11-03 03:55:10,451 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:55:10" (1/1) ... [2022-11-03 03:55:10,506 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:55:10" (1/1) ... [2022-11-03 03:55:10,513 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:55:10" (1/1) ... [2022-11-03 03:55:10,521 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:55:10" (1/1) ... [2022-11-03 03:55:10,528 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:55:10" (1/1) ... [2022-11-03 03:55:10,544 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-03 03:55:10,545 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-03 03:55:10,545 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-03 03:55:10,545 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-03 03:55:10,546 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:55:10" (1/1) ... [2022-11-03 03:55:10,567 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 03:55:10,579 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:55:10,602 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-03 03:55:10,610 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-03 03:55:10,646 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-03 03:55:10,647 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-03 03:55:11,142 INFO L235 CfgBuilder]: Building ICFG [2022-11-03 03:55:11,144 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-03 03:55:13,388 INFO L276 CfgBuilder]: Performing block encoding [2022-11-03 03:55:13,399 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-03 03:55:13,399 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-03 03:55:13,402 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 03:55:13 BoogieIcfgContainer [2022-11-03 03:55:13,402 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-03 03:55:13,405 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-03 03:55:13,405 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-03 03:55:13,408 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-03 03:55:13,408 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 03.11 03:55:09" (1/3) ... [2022-11-03 03:55:13,409 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3a2b8aa4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 03:55:13, skipping insertion in model container [2022-11-03 03:55:13,409 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:55:10" (2/3) ... [2022-11-03 03:55:13,409 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3a2b8aa4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 03:55:13, skipping insertion in model container [2022-11-03 03:55:13,410 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 03:55:13" (3/3) ... [2022-11-03 03:55:13,411 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.resistance.2.prop3-func-interl.c [2022-11-03 03:55:13,432 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-03 03:55:13,432 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-03 03:55:13,507 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-03 03:55:13,515 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@78a13de0, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-03 03:55:13,516 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-03 03:55:13,520 INFO L276 IsEmpty]: Start isEmpty. Operand has 63 states, 61 states have (on average 1.4918032786885247) internal successors, (91), 62 states have internal predecessors, (91), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:55:13,526 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-11-03 03:55:13,527 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:55:13,527 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:55:13,528 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:55:13,534 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:55:13,535 INFO L85 PathProgramCache]: Analyzing trace with hash -1473645707, now seen corresponding path program 1 times [2022-11-03 03:55:13,550 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:55:13,550 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1269978520] [2022-11-03 03:55:13,551 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:55:13,551 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:55:13,551 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:55:13,558 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:55:13,566 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (2)] Waiting until timeout for monitored process [2022-11-03 03:55:14,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:55:14,044 INFO L263 TraceCheckSpWp]: Trace formula consists of 152 conjuncts, 8 conjunts are in the unsatisfiable core [2022-11-03 03:55:14,055 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:55:14,199 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:55:14,200 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:55:14,201 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:55:14,201 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1269978520] [2022-11-03 03:55:14,202 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1269978520] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:55:14,202 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:55:14,202 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-03 03:55:14,204 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1502672125] [2022-11-03 03:55:14,205 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:55:14,210 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 03:55:14,211 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:55:14,256 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 03:55:14,257 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 03:55:14,260 INFO L87 Difference]: Start difference. First operand has 63 states, 61 states have (on average 1.4918032786885247) internal successors, (91), 62 states have internal predecessors, (91), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:55:14,562 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:55:14,562 INFO L93 Difference]: Finished difference Result 122 states and 182 transitions. [2022-11-03 03:55:14,565 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-03 03:55:14,567 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 11 [2022-11-03 03:55:14,567 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:55:14,575 INFO L225 Difference]: With dead ends: 122 [2022-11-03 03:55:14,575 INFO L226 Difference]: Without dead ends: 61 [2022-11-03 03:55:14,578 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-03 03:55:14,581 INFO L413 NwaCegarLoop]: 83 mSDtfsCounter, 1 mSDsluCounter, 139 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1 SdHoareTripleChecker+Valid, 222 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 15 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-03 03:55:14,583 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1 Valid, 222 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 15 Invalid, 0 Unknown, 15 Unchecked, 0.2s Time] [2022-11-03 03:55:14,599 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61 states. [2022-11-03 03:55:14,613 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61 to 61. [2022-11-03 03:55:14,615 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 61 states, 60 states have (on average 1.45) internal successors, (87), 60 states have internal predecessors, (87), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:55:14,616 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 87 transitions. [2022-11-03 03:55:14,618 INFO L78 Accepts]: Start accepts. Automaton has 61 states and 87 transitions. Word has length 11 [2022-11-03 03:55:14,618 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:55:14,618 INFO L495 AbstractCegarLoop]: Abstraction has 61 states and 87 transitions. [2022-11-03 03:55:14,618 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:55:14,619 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 87 transitions. [2022-11-03 03:55:14,619 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-11-03 03:55:14,619 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:55:14,619 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:55:14,635 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (2)] Forceful destruction successful, exit code 0 [2022-11-03 03:55:14,832 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:55:14,832 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:55:14,833 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:55:14,833 INFO L85 PathProgramCache]: Analyzing trace with hash 2011974963, now seen corresponding path program 1 times [2022-11-03 03:55:14,833 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:55:14,834 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1060952129] [2022-11-03 03:55:14,834 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:55:14,834 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:55:14,834 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:55:14,835 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:55:14,837 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (3)] Waiting until timeout for monitored process [2022-11-03 03:55:15,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:55:15,216 INFO L263 TraceCheckSpWp]: Trace formula consists of 152 conjuncts, 10 conjunts are in the unsatisfiable core [2022-11-03 03:55:15,221 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:55:15,326 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:55:15,326 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:55:15,326 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:55:15,327 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1060952129] [2022-11-03 03:55:15,327 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1060952129] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:55:15,327 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:55:15,327 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-03 03:55:15,328 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [638181873] [2022-11-03 03:55:15,328 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:55:15,329 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-03 03:55:15,329 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:55:15,330 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-03 03:55:15,330 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-03 03:55:15,330 INFO L87 Difference]: Start difference. First operand 61 states and 87 transitions. Second operand has 5 states, 5 states have (on average 2.2) internal successors, (11), 5 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:55:15,576 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:55:15,577 INFO L93 Difference]: Finished difference Result 120 states and 173 transitions. [2022-11-03 03:55:15,577 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-03 03:55:15,578 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.2) internal successors, (11), 5 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 11 [2022-11-03 03:55:15,578 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:55:15,578 INFO L225 Difference]: With dead ends: 120 [2022-11-03 03:55:15,578 INFO L226 Difference]: Without dead ends: 63 [2022-11-03 03:55:15,579 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 6 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2022-11-03 03:55:15,580 INFO L413 NwaCegarLoop]: 81 mSDtfsCounter, 1 mSDsluCounter, 209 mSDsCounter, 0 mSdLazyCounter, 14 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1 SdHoareTripleChecker+Valid, 290 SdHoareTripleChecker+Invalid, 41 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 14 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 27 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-03 03:55:15,581 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1 Valid, 290 Invalid, 41 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 14 Invalid, 0 Unknown, 27 Unchecked, 0.2s Time] [2022-11-03 03:55:15,581 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states. [2022-11-03 03:55:15,586 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 63. [2022-11-03 03:55:15,586 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 63 states, 62 states have (on average 1.435483870967742) internal successors, (89), 62 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:55:15,587 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 89 transitions. [2022-11-03 03:55:15,588 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 89 transitions. Word has length 11 [2022-11-03 03:55:15,588 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:55:15,588 INFO L495 AbstractCegarLoop]: Abstraction has 63 states and 89 transitions. [2022-11-03 03:55:15,588 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 2.2) internal successors, (11), 5 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:55:15,589 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 89 transitions. [2022-11-03 03:55:15,589 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-11-03 03:55:15,589 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:55:15,589 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:55:15,606 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (3)] Forceful destruction successful, exit code 0 [2022-11-03 03:55:15,802 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:55:15,802 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:55:15,802 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:55:15,803 INFO L85 PathProgramCache]: Analyzing trace with hash 2069233265, now seen corresponding path program 1 times [2022-11-03 03:55:15,803 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:55:15,803 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1990721885] [2022-11-03 03:55:15,804 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:55:15,804 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:55:15,804 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:55:15,805 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:55:15,828 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (4)] Waiting until timeout for monitored process [2022-11-03 03:55:16,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:55:16,170 INFO L263 TraceCheckSpWp]: Trace formula consists of 152 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-03 03:55:16,175 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:55:16,204 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:55:16,205 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:55:16,205 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:55:16,205 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1990721885] [2022-11-03 03:55:16,206 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1990721885] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:55:16,209 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:55:16,210 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-03 03:55:16,210 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [327562441] [2022-11-03 03:55:16,210 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:55:16,210 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 03:55:16,211 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:55:16,211 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 03:55:16,211 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 03:55:16,212 INFO L87 Difference]: Start difference. First operand 63 states and 89 transitions. Second operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:55:16,510 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:55:16,510 INFO L93 Difference]: Finished difference Result 229 states and 330 transitions. [2022-11-03 03:55:16,513 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-03 03:55:16,513 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 11 [2022-11-03 03:55:16,513 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:55:16,514 INFO L225 Difference]: With dead ends: 229 [2022-11-03 03:55:16,514 INFO L226 Difference]: Without dead ends: 172 [2022-11-03 03:55:16,515 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-03 03:55:16,516 INFO L413 NwaCegarLoop]: 86 mSDtfsCounter, 229 mSDsluCounter, 234 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 229 SdHoareTripleChecker+Valid, 320 SdHoareTripleChecker+Invalid, 13 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-03 03:55:16,516 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [229 Valid, 320 Invalid, 13 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-11-03 03:55:16,517 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172 states. [2022-11-03 03:55:16,523 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172 to 65. [2022-11-03 03:55:16,523 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 65 states, 64 states have (on average 1.421875) internal successors, (91), 64 states have internal predecessors, (91), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:55:16,524 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 91 transitions. [2022-11-03 03:55:16,524 INFO L78 Accepts]: Start accepts. Automaton has 65 states and 91 transitions. Word has length 11 [2022-11-03 03:55:16,525 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:55:16,525 INFO L495 AbstractCegarLoop]: Abstraction has 65 states and 91 transitions. [2022-11-03 03:55:16,525 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:55:16,525 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 91 transitions. [2022-11-03 03:55:16,526 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-11-03 03:55:16,526 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:55:16,526 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:55:16,542 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (4)] Forceful destruction successful, exit code 0 [2022-11-03 03:55:16,739 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:55:16,739 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:55:16,740 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:55:16,740 INFO L85 PathProgramCache]: Analyzing trace with hash 2069292847, now seen corresponding path program 1 times [2022-11-03 03:55:16,740 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:55:16,741 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [2020155572] [2022-11-03 03:55:16,741 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:55:16,741 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:55:16,741 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:55:16,742 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:55:16,752 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (5)] Waiting until timeout for monitored process [2022-11-03 03:55:17,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:55:17,134 INFO L263 TraceCheckSpWp]: Trace formula consists of 152 conjuncts, 17 conjunts are in the unsatisfiable core [2022-11-03 03:55:17,140 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:55:17,288 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:55:17,288 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:55:17,289 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:55:17,289 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [2020155572] [2022-11-03 03:55:17,289 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [2020155572] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:55:17,289 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:55:17,289 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-11-03 03:55:17,290 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1107353651] [2022-11-03 03:55:17,290 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:55:17,290 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-03 03:55:17,291 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:55:17,291 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-03 03:55:17,291 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-11-03 03:55:17,291 INFO L87 Difference]: Start difference. First operand 65 states and 91 transitions. Second operand has 6 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 6 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:55:17,769 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:55:17,769 INFO L93 Difference]: Finished difference Result 124 states and 176 transitions. [2022-11-03 03:55:17,770 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-03 03:55:17,770 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 6 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 11 [2022-11-03 03:55:17,770 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:55:17,771 INFO L225 Difference]: With dead ends: 124 [2022-11-03 03:55:17,771 INFO L226 Difference]: Without dead ends: 122 [2022-11-03 03:55:17,771 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=34, Invalid=56, Unknown=0, NotChecked=0, Total=90 [2022-11-03 03:55:17,772 INFO L413 NwaCegarLoop]: 79 mSDtfsCounter, 392 mSDsluCounter, 160 mSDsCounter, 0 mSdLazyCounter, 42 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 392 SdHoareTripleChecker+Valid, 239 SdHoareTripleChecker+Invalid, 47 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 42 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-11-03 03:55:17,773 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [392 Valid, 239 Invalid, 47 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 42 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-11-03 03:55:17,774 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2022-11-03 03:55:17,779 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 67. [2022-11-03 03:55:17,779 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 67 states, 66 states have (on average 1.4090909090909092) internal successors, (93), 66 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:55:17,780 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 93 transitions. [2022-11-03 03:55:17,780 INFO L78 Accepts]: Start accepts. Automaton has 67 states and 93 transitions. Word has length 11 [2022-11-03 03:55:17,780 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:55:17,780 INFO L495 AbstractCegarLoop]: Abstraction has 67 states and 93 transitions. [2022-11-03 03:55:17,781 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 6 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:55:17,781 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 93 transitions. [2022-11-03 03:55:17,782 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-11-03 03:55:17,782 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:55:17,783 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:55:17,799 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (5)] Ended with exit code 0 [2022-11-03 03:55:17,999 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:55:18,000 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:55:18,000 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:55:18,000 INFO L85 PathProgramCache]: Analyzing trace with hash -1610770701, now seen corresponding path program 1 times [2022-11-03 03:55:18,003 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:55:18,004 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1747692463] [2022-11-03 03:55:18,004 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:55:18,004 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:55:18,004 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:55:18,005 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:55:18,009 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (6)] Waiting until timeout for monitored process [2022-11-03 03:55:18,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:55:18,898 INFO L263 TraceCheckSpWp]: Trace formula consists of 1620 conjuncts, 8 conjunts are in the unsatisfiable core [2022-11-03 03:55:18,910 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:55:19,088 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:55:19,088 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:55:19,089 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:55:19,089 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1747692463] [2022-11-03 03:55:19,089 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1747692463] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:55:19,089 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:55:19,089 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-03 03:55:19,090 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [947111350] [2022-11-03 03:55:19,090 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:55:19,090 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 03:55:19,090 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:55:19,091 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 03:55:19,091 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 03:55:19,091 INFO L87 Difference]: Start difference. First operand 67 states and 93 transitions. Second operand has 4 states, 4 states have (on average 16.5) internal successors, (66), 4 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:55:19,305 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:55:19,305 INFO L93 Difference]: Finished difference Result 144 states and 204 transitions. [2022-11-03 03:55:19,306 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-03 03:55:19,307 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 16.5) internal successors, (66), 4 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2022-11-03 03:55:19,307 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:55:19,307 INFO L225 Difference]: With dead ends: 144 [2022-11-03 03:55:19,307 INFO L226 Difference]: Without dead ends: 85 [2022-11-03 03:55:19,308 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 63 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-03 03:55:19,309 INFO L413 NwaCegarLoop]: 81 mSDtfsCounter, 8 mSDsluCounter, 139 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 8 SdHoareTripleChecker+Valid, 220 SdHoareTripleChecker+Invalid, 34 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 17 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-03 03:55:19,309 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [8 Valid, 220 Invalid, 34 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 17 Invalid, 0 Unknown, 17 Unchecked, 0.2s Time] [2022-11-03 03:55:19,310 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2022-11-03 03:55:19,318 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 85. [2022-11-03 03:55:19,319 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 85 states, 84 states have (on average 1.4047619047619047) internal successors, (118), 84 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:55:19,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85 states to 85 states and 118 transitions. [2022-11-03 03:55:19,320 INFO L78 Accepts]: Start accepts. Automaton has 85 states and 118 transitions. Word has length 66 [2022-11-03 03:55:19,320 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:55:19,320 INFO L495 AbstractCegarLoop]: Abstraction has 85 states and 118 transitions. [2022-11-03 03:55:19,321 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 16.5) internal successors, (66), 4 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:55:19,321 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 118 transitions. [2022-11-03 03:55:19,322 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-11-03 03:55:19,322 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:55:19,322 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:55:19,353 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (6)] Forceful destruction successful, exit code 0 [2022-11-03 03:55:19,523 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:55:19,523 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:55:19,524 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:55:19,524 INFO L85 PathProgramCache]: Analyzing trace with hash -1187123979, now seen corresponding path program 1 times [2022-11-03 03:55:19,526 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:55:19,527 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [2046983447] [2022-11-03 03:55:19,527 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:55:19,527 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:55:19,527 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:55:19,528 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:55:19,566 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (7)] Waiting until timeout for monitored process [2022-11-03 03:55:20,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:55:20,441 INFO L263 TraceCheckSpWp]: Trace formula consists of 1620 conjuncts, 10 conjunts are in the unsatisfiable core [2022-11-03 03:55:20,452 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:55:20,703 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:55:20,704 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:55:20,704 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:55:20,704 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [2046983447] [2022-11-03 03:55:20,704 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [2046983447] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:55:20,704 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:55:20,705 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-03 03:55:20,705 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1281713350] [2022-11-03 03:55:20,705 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:55:20,705 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-03 03:55:20,706 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:55:20,706 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-03 03:55:20,706 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-03 03:55:20,707 INFO L87 Difference]: Start difference. First operand 85 states and 118 transitions. Second operand has 5 states, 5 states have (on average 13.2) internal successors, (66), 5 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:55:20,916 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:55:20,916 INFO L93 Difference]: Finished difference Result 146 states and 206 transitions. [2022-11-03 03:55:20,917 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-03 03:55:20,917 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 13.2) internal successors, (66), 5 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2022-11-03 03:55:20,917 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:55:20,917 INFO L225 Difference]: With dead ends: 146 [2022-11-03 03:55:20,918 INFO L226 Difference]: Without dead ends: 87 [2022-11-03 03:55:20,918 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 61 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2022-11-03 03:55:20,919 INFO L413 NwaCegarLoop]: 79 mSDtfsCounter, 8 mSDsluCounter, 208 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 8 SdHoareTripleChecker+Valid, 287 SdHoareTripleChecker+Invalid, 43 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 27 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-03 03:55:20,919 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [8 Valid, 287 Invalid, 43 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 27 Unchecked, 0.2s Time] [2022-11-03 03:55:20,920 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states. [2022-11-03 03:55:20,924 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 87. [2022-11-03 03:55:20,924 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 87 states, 86 states have (on average 1.3953488372093024) internal successors, (120), 86 states have internal predecessors, (120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:55:20,925 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 120 transitions. [2022-11-03 03:55:20,925 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 120 transitions. Word has length 66 [2022-11-03 03:55:20,925 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:55:20,925 INFO L495 AbstractCegarLoop]: Abstraction has 87 states and 120 transitions. [2022-11-03 03:55:20,926 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 13.2) internal successors, (66), 5 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:55:20,926 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 120 transitions. [2022-11-03 03:55:20,927 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-11-03 03:55:20,927 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:55:20,928 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:55:20,956 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (7)] Forceful destruction successful, exit code 0 [2022-11-03 03:55:21,142 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:55:21,142 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:55:21,142 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:55:21,142 INFO L85 PathProgramCache]: Analyzing trace with hash 1262476151, now seen corresponding path program 1 times [2022-11-03 03:55:21,144 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:55:21,144 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [296858338] [2022-11-03 03:55:21,144 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:55:21,144 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:55:21,144 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:55:21,145 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:55:21,148 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (8)] Waiting until timeout for monitored process [2022-11-03 03:55:21,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:55:21,946 INFO L263 TraceCheckSpWp]: Trace formula consists of 1620 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-03 03:55:21,955 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:55:22,271 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:55:22,271 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:55:22,272 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:55:22,272 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [296858338] [2022-11-03 03:55:22,272 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [296858338] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:55:22,272 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:55:22,272 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-11-03 03:55:22,272 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1243073577] [2022-11-03 03:55:22,272 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:55:22,273 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-03 03:55:22,273 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:55:22,273 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-03 03:55:22,273 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-11-03 03:55:22,274 INFO L87 Difference]: Start difference. First operand 87 states and 120 transitions. Second operand has 7 states, 7 states have (on average 9.428571428571429) internal successors, (66), 7 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:55:22,461 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:55:22,461 INFO L93 Difference]: Finished difference Result 166 states and 233 transitions. [2022-11-03 03:55:22,462 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-03 03:55:22,462 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 9.428571428571429) internal successors, (66), 7 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2022-11-03 03:55:22,463 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:55:22,463 INFO L225 Difference]: With dead ends: 166 [2022-11-03 03:55:22,463 INFO L226 Difference]: Without dead ends: 107 [2022-11-03 03:55:22,464 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 60 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-11-03 03:55:22,465 INFO L413 NwaCegarLoop]: 78 mSDtfsCounter, 42 mSDsluCounter, 288 mSDsCounter, 0 mSdLazyCounter, 4 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 42 SdHoareTripleChecker+Valid, 366 SdHoareTripleChecker+Invalid, 19 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 4 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 15 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-03 03:55:22,465 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [42 Valid, 366 Invalid, 19 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 4 Invalid, 0 Unknown, 15 Unchecked, 0.2s Time] [2022-11-03 03:55:22,466 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107 states. [2022-11-03 03:55:22,471 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107 to 107. [2022-11-03 03:55:22,472 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 107 states, 106 states have (on average 1.3867924528301887) internal successors, (147), 106 states have internal predecessors, (147), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:55:22,472 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107 states to 107 states and 147 transitions. [2022-11-03 03:55:22,473 INFO L78 Accepts]: Start accepts. Automaton has 107 states and 147 transitions. Word has length 66 [2022-11-03 03:55:22,473 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:55:22,473 INFO L495 AbstractCegarLoop]: Abstraction has 107 states and 147 transitions. [2022-11-03 03:55:22,474 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 9.428571428571429) internal successors, (66), 7 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:55:22,474 INFO L276 IsEmpty]: Start isEmpty. Operand 107 states and 147 transitions. [2022-11-03 03:55:22,475 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-11-03 03:55:22,475 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:55:22,475 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:55:22,504 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (8)] Forceful destruction successful, exit code 0 [2022-11-03 03:55:22,690 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:55:22,690 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:55:22,690 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:55:22,691 INFO L85 PathProgramCache]: Analyzing trace with hash -660751883, now seen corresponding path program 1 times [2022-11-03 03:55:22,692 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:55:22,692 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1044791677] [2022-11-03 03:55:22,692 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:55:22,692 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:55:22,693 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:55:22,694 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:55:22,706 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (9)] Waiting until timeout for monitored process [2022-11-03 03:55:23,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:55:23,567 INFO L263 TraceCheckSpWp]: Trace formula consists of 1620 conjuncts, 10 conjunts are in the unsatisfiable core [2022-11-03 03:55:23,575 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:55:23,936 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:55:23,936 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:55:23,936 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:55:23,936 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1044791677] [2022-11-03 03:55:23,937 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1044791677] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:55:23,937 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:55:23,937 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-03 03:55:23,937 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1265585228] [2022-11-03 03:55:23,937 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:55:23,937 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-03 03:55:23,938 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:55:23,938 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-03 03:55:23,938 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-03 03:55:23,938 INFO L87 Difference]: Start difference. First operand 107 states and 147 transitions. Second operand has 5 states, 5 states have (on average 13.2) internal successors, (66), 5 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:55:24,205 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:55:24,205 INFO L93 Difference]: Finished difference Result 194 states and 274 transitions. [2022-11-03 03:55:24,208 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-03 03:55:24,208 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 13.2) internal successors, (66), 5 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2022-11-03 03:55:24,208 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:55:24,209 INFO L225 Difference]: With dead ends: 194 [2022-11-03 03:55:24,209 INFO L226 Difference]: Without dead ends: 135 [2022-11-03 03:55:24,209 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 61 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2022-11-03 03:55:24,210 INFO L413 NwaCegarLoop]: 75 mSDtfsCounter, 20 mSDsluCounter, 206 mSDsCounter, 0 mSdLazyCounter, 18 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 20 SdHoareTripleChecker+Valid, 281 SdHoareTripleChecker+Invalid, 46 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 18 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 28 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-03 03:55:24,210 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [20 Valid, 281 Invalid, 46 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 18 Invalid, 0 Unknown, 28 Unchecked, 0.2s Time] [2022-11-03 03:55:24,211 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2022-11-03 03:55:24,216 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 135. [2022-11-03 03:55:24,217 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 135 states, 134 states have (on average 1.4029850746268657) internal successors, (188), 134 states have internal predecessors, (188), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:55:24,218 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 188 transitions. [2022-11-03 03:55:24,218 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 188 transitions. Word has length 66 [2022-11-03 03:55:24,218 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:55:24,218 INFO L495 AbstractCegarLoop]: Abstraction has 135 states and 188 transitions. [2022-11-03 03:55:24,219 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 13.2) internal successors, (66), 5 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:55:24,219 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 188 transitions. [2022-11-03 03:55:24,220 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-11-03 03:55:24,220 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:55:24,220 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:55:24,246 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (9)] Forceful destruction successful, exit code 0 [2022-11-03 03:55:24,433 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:55:24,434 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:55:24,434 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:55:24,434 INFO L85 PathProgramCache]: Analyzing trace with hash 40312695, now seen corresponding path program 1 times [2022-11-03 03:55:24,436 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:55:24,436 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1002971302] [2022-11-03 03:55:24,436 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:55:24,436 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:55:24,436 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:55:24,437 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:55:24,440 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (10)] Waiting until timeout for monitored process [2022-11-03 03:55:25,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:55:25,218 INFO L263 TraceCheckSpWp]: Trace formula consists of 1620 conjuncts, 11 conjunts are in the unsatisfiable core [2022-11-03 03:55:25,227 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:55:25,619 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:55:25,619 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:55:26,106 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:55:26,106 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:55:26,106 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1002971302] [2022-11-03 03:55:26,107 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1002971302] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:55:26,107 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [457322845] [2022-11-03 03:55:26,107 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:55:26,107 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 03:55:26,108 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 03:55:26,110 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 03:55:26,114 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (11)] Waiting until timeout for monitored process [2022-11-03 03:55:27,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:55:27,561 INFO L263 TraceCheckSpWp]: Trace formula consists of 1620 conjuncts, 11 conjunts are in the unsatisfiable core [2022-11-03 03:55:27,568 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:55:27,883 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:55:27,883 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:55:28,179 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:55:28,179 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [457322845] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:55:28,180 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1311349405] [2022-11-03 03:55:28,180 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:55:28,180 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:55:28,180 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:55:28,186 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:55:28,206 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-11-03 03:55:28,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:55:28,904 INFO L263 TraceCheckSpWp]: Trace formula consists of 1620 conjuncts, 11 conjunts are in the unsatisfiable core [2022-11-03 03:55:28,911 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:55:29,196 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:55:29,196 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:55:29,476 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:55:29,476 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1311349405] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:55:29,476 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 03:55:29,476 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8, 8] total 14 [2022-11-03 03:55:29,477 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1894956913] [2022-11-03 03:55:29,477 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 03:55:29,478 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-11-03 03:55:29,478 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:55:29,478 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-11-03 03:55:29,479 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2022-11-03 03:55:29,479 INFO L87 Difference]: Start difference. First operand 135 states and 188 transitions. Second operand has 14 states, 14 states have (on average 8.857142857142858) internal successors, (124), 14 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:55:30,044 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:55:30,044 INFO L93 Difference]: Finished difference Result 259 states and 365 transitions. [2022-11-03 03:55:30,045 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-03 03:55:30,045 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 8.857142857142858) internal successors, (124), 14 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2022-11-03 03:55:30,045 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:55:30,047 INFO L225 Difference]: With dead ends: 259 [2022-11-03 03:55:30,047 INFO L226 Difference]: Without dead ends: 200 [2022-11-03 03:55:30,047 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 396 GetRequests, 376 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=75, Invalid=305, Unknown=0, NotChecked=0, Total=380 [2022-11-03 03:55:30,048 INFO L413 NwaCegarLoop]: 76 mSDtfsCounter, 198 mSDsluCounter, 633 mSDsCounter, 0 mSdLazyCounter, 59 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 198 SdHoareTripleChecker+Valid, 709 SdHoareTripleChecker+Invalid, 208 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 59 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 144 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-11-03 03:55:30,049 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [198 Valid, 709 Invalid, 208 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 59 Invalid, 0 Unknown, 144 Unchecked, 0.4s Time] [2022-11-03 03:55:30,050 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 200 states. [2022-11-03 03:55:30,055 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 200 to 144. [2022-11-03 03:55:30,055 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 144 states, 143 states have (on average 1.3916083916083917) internal successors, (199), 143 states have internal predecessors, (199), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:55:30,056 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 199 transitions. [2022-11-03 03:55:30,056 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 199 transitions. Word has length 66 [2022-11-03 03:55:30,057 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:55:30,057 INFO L495 AbstractCegarLoop]: Abstraction has 144 states and 199 transitions. [2022-11-03 03:55:30,057 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 8.857142857142858) internal successors, (124), 14 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:55:30,057 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 199 transitions. [2022-11-03 03:55:30,058 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-11-03 03:55:30,058 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:55:30,059 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:55:30,098 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-11-03 03:55:30,283 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (11)] Forceful destruction successful, exit code 0 [2022-11-03 03:55:30,490 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (10)] Forceful destruction successful, exit code 0 [2022-11-03 03:55:30,674 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:55:30,674 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:55:30,675 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:55:30,675 INFO L85 PathProgramCache]: Analyzing trace with hash -769033931, now seen corresponding path program 1 times [2022-11-03 03:55:30,676 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:55:30,676 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [914783887] [2022-11-03 03:55:30,676 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:55:30,676 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:55:30,676 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:55:30,677 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:55:30,678 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (13)] Waiting until timeout for monitored process [2022-11-03 03:55:31,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:55:31,460 INFO L263 TraceCheckSpWp]: Trace formula consists of 1620 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:55:31,466 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:55:31,864 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 4 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:55:31,865 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:55:32,431 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 4 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:55:32,431 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:55:32,432 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [914783887] [2022-11-03 03:55:32,432 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [914783887] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:55:32,432 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1584100486] [2022-11-03 03:55:32,432 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:55:32,432 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 03:55:32,432 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 03:55:32,436 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 03:55:32,458 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (14)] Waiting until timeout for monitored process [2022-11-03 03:55:33,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:55:33,795 INFO L263 TraceCheckSpWp]: Trace formula consists of 1620 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:55:33,800 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:55:34,059 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 4 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:55:34,059 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:55:34,388 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 4 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:55:34,389 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1584100486] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:55:34,389 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1757667988] [2022-11-03 03:55:34,389 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:55:34,389 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:55:34,389 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:55:34,390 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:55:34,413 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-11-03 03:55:35,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:55:35,065 INFO L263 TraceCheckSpWp]: Trace formula consists of 1620 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 03:55:35,069 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:55:35,330 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 4 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:55:35,330 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:55:35,645 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 4 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:55:35,645 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1757667988] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:55:35,645 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 03:55:35,646 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 10, 9, 10, 9] total 17 [2022-11-03 03:55:35,646 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1396579362] [2022-11-03 03:55:35,646 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 03:55:35,647 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2022-11-03 03:55:35,647 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:55:35,647 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2022-11-03 03:55:35,648 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=232, Unknown=0, NotChecked=0, Total=272 [2022-11-03 03:55:35,648 INFO L87 Difference]: Start difference. First operand 144 states and 199 transitions. Second operand has 17 states, 17 states have (on average 7.411764705882353) internal successors, (126), 17 states have internal predecessors, (126), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:55:36,847 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:55:36,847 INFO L93 Difference]: Finished difference Result 560 states and 794 transitions. [2022-11-03 03:55:36,847 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2022-11-03 03:55:36,847 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 7.411764705882353) internal successors, (126), 17 states have internal predecessors, (126), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2022-11-03 03:55:36,848 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:55:36,850 INFO L225 Difference]: With dead ends: 560 [2022-11-03 03:55:36,850 INFO L226 Difference]: Without dead ends: 501 [2022-11-03 03:55:36,851 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 406 GetRequests, 370 SyntacticMatches, 5 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 163 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=171, Invalid=885, Unknown=0, NotChecked=0, Total=1056 [2022-11-03 03:55:36,851 INFO L413 NwaCegarLoop]: 208 mSDtfsCounter, 684 mSDsluCounter, 1982 mSDsCounter, 0 mSdLazyCounter, 159 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 684 SdHoareTripleChecker+Valid, 2190 SdHoareTripleChecker+Invalid, 553 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 159 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 389 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-11-03 03:55:36,852 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [684 Valid, 2190 Invalid, 553 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 159 Invalid, 0 Unknown, 389 Unchecked, 0.6s Time] [2022-11-03 03:55:36,853 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 501 states. [2022-11-03 03:55:36,864 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 501 to 260. [2022-11-03 03:55:36,865 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 260 states, 259 states have (on average 1.4247104247104247) internal successors, (369), 259 states have internal predecessors, (369), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:55:36,866 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 260 states to 260 states and 369 transitions. [2022-11-03 03:55:36,866 INFO L78 Accepts]: Start accepts. Automaton has 260 states and 369 transitions. Word has length 66 [2022-11-03 03:55:36,866 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:55:36,866 INFO L495 AbstractCegarLoop]: Abstraction has 260 states and 369 transitions. [2022-11-03 03:55:36,867 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 7.411764705882353) internal successors, (126), 17 states have internal predecessors, (126), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:55:36,867 INFO L276 IsEmpty]: Start isEmpty. Operand 260 states and 369 transitions. [2022-11-03 03:55:36,868 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-11-03 03:55:36,868 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:55:36,868 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:55:36,886 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (14)] Forceful destruction successful, exit code 0 [2022-11-03 03:55:37,095 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (13)] Forceful destruction successful, exit code 0 [2022-11-03 03:55:37,304 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Forceful destruction successful, exit code 0 [2022-11-03 03:55:37,480 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,15 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:55:37,480 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:55:37,480 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:55:37,481 INFO L85 PathProgramCache]: Analyzing trace with hash -711775629, now seen corresponding path program 1 times [2022-11-03 03:55:37,482 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:55:37,482 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [628225919] [2022-11-03 03:55:37,482 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:55:37,482 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:55:37,483 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:55:37,484 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:55:37,502 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (16)] Waiting until timeout for monitored process [2022-11-03 03:55:38,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:55:38,179 INFO L263 TraceCheckSpWp]: Trace formula consists of 1620 conjuncts, 64 conjunts are in the unsatisfiable core [2022-11-03 03:55:38,187 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:55:39,666 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 1 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:55:39,666 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:55:48,900 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:55:48,900 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:55:48,900 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [628225919] [2022-11-03 03:55:48,900 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [628225919] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:55:48,901 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1595518928] [2022-11-03 03:55:48,901 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:55:48,901 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 03:55:48,901 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 03:55:48,905 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 03:55:48,910 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (17)] Waiting until timeout for monitored process [2022-11-03 03:55:50,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:55:50,226 INFO L263 TraceCheckSpWp]: Trace formula consists of 1620 conjuncts, 64 conjunts are in the unsatisfiable core [2022-11-03 03:55:50,234 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:55:51,242 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 1 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:55:51,243 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:56:57,652 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:56:57,652 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1595518928] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:56:57,652 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1160275351] [2022-11-03 03:56:57,653 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:56:57,653 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:56:57,653 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:56:57,654 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:56:57,655 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-11-03 03:56:58,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:56:58,274 INFO L263 TraceCheckSpWp]: Trace formula consists of 1620 conjuncts, 45 conjunts are in the unsatisfiable core [2022-11-03 03:56:58,282 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:57:00,379 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:57:00,380 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:57:11,824 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:57:11,824 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1160275351] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:57:11,824 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 03:57:11,824 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 9, 9] total 34 [2022-11-03 03:57:11,825 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [549462024] [2022-11-03 03:57:11,825 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 03:57:11,825 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 34 states [2022-11-03 03:57:11,825 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:57:11,826 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2022-11-03 03:57:11,826 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=179, Invalid=909, Unknown=34, NotChecked=0, Total=1122 [2022-11-03 03:57:11,827 INFO L87 Difference]: Start difference. First operand 260 states and 369 transitions. Second operand has 34 states, 34 states have (on average 8.764705882352942) internal successors, (298), 34 states have internal predecessors, (298), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:57:13,432 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:57:13,432 INFO L93 Difference]: Finished difference Result 495 states and 705 transitions. [2022-11-03 03:57:13,433 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-11-03 03:57:13,433 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 34 states have (on average 8.764705882352942) internal successors, (298), 34 states have internal predecessors, (298), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2022-11-03 03:57:13,434 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:57:13,435 INFO L225 Difference]: With dead ends: 495 [2022-11-03 03:57:13,435 INFO L226 Difference]: Without dead ends: 493 [2022-11-03 03:57:13,436 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 406 GetRequests, 360 SyntacticMatches, 4 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 529 ImplicationChecksByTransitivity, 86.1s TimeCoverageRelationStatistics Valid=360, Invalid=1498, Unknown=34, NotChecked=0, Total=1892 [2022-11-03 03:57:13,437 INFO L413 NwaCegarLoop]: 76 mSDtfsCounter, 604 mSDsluCounter, 1745 mSDsCounter, 0 mSdLazyCounter, 5 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 604 SdHoareTripleChecker+Valid, 1821 SdHoareTripleChecker+Invalid, 36 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 5 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 31 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 03:57:13,437 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [604 Valid, 1821 Invalid, 36 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 5 Invalid, 0 Unknown, 31 Unchecked, 0.0s Time] [2022-11-03 03:57:13,438 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 493 states. [2022-11-03 03:57:13,455 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 493 to 484. [2022-11-03 03:57:13,456 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 484 states, 483 states have (on average 1.4306418219461698) internal successors, (691), 483 states have internal predecessors, (691), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:57:13,458 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 484 states to 484 states and 691 transitions. [2022-11-03 03:57:13,458 INFO L78 Accepts]: Start accepts. Automaton has 484 states and 691 transitions. Word has length 66 [2022-11-03 03:57:13,458 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:57:13,458 INFO L495 AbstractCegarLoop]: Abstraction has 484 states and 691 transitions. [2022-11-03 03:57:13,458 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 34 states, 34 states have (on average 8.764705882352942) internal successors, (298), 34 states have internal predecessors, (298), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:57:13,459 INFO L276 IsEmpty]: Start isEmpty. Operand 484 states and 691 transitions. [2022-11-03 03:57:13,460 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-11-03 03:57:13,460 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:57:13,460 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:57:13,500 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Forceful destruction successful, exit code 0 [2022-11-03 03:57:13,683 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (17)] Forceful destruction successful, exit code 0 [2022-11-03 03:57:13,891 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (16)] Forceful destruction successful, exit code 0 [2022-11-03 03:57:14,076 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 18 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,17 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,16 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:57:14,076 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:57:14,076 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:57:14,076 INFO L85 PathProgramCache]: Analyzing trace with hash 1994843765, now seen corresponding path program 1 times [2022-11-03 03:57:14,078 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:57:14,078 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1287954666] [2022-11-03 03:57:14,078 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:57:14,078 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:57:14,078 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:57:14,079 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:57:14,080 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (19)] Waiting until timeout for monitored process [2022-11-03 03:57:14,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:57:14,775 INFO L263 TraceCheckSpWp]: Trace formula consists of 1620 conjuncts, 66 conjunts are in the unsatisfiable core [2022-11-03 03:57:14,782 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:57:16,137 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 1 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:57:16,137 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:57:24,528 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:57:24,528 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:57:24,528 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1287954666] [2022-11-03 03:57:24,529 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1287954666] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:57:24,529 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1448390973] [2022-11-03 03:57:24,529 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:57:24,529 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 03:57:24,529 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 03:57:24,530 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 03:57:24,534 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (20)] Waiting until timeout for monitored process [2022-11-03 03:57:25,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:57:25,844 INFO L263 TraceCheckSpWp]: Trace formula consists of 1620 conjuncts, 66 conjunts are in the unsatisfiable core [2022-11-03 03:57:25,849 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:57:26,722 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 1 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:57:26,722 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:58:32,774 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:58:32,775 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1448390973] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:58:32,775 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2042397314] [2022-11-03 03:58:32,775 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:58:32,775 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:58:32,775 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:58:32,777 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:58:32,779 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2022-11-03 03:58:33,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:58:33,390 INFO L263 TraceCheckSpWp]: Trace formula consists of 1620 conjuncts, 45 conjunts are in the unsatisfiable core [2022-11-03 03:58:33,395 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:58:35,398 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:58:35,398 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:58:48,786 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:58:48,787 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2042397314] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:58:48,787 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 03:58:48,787 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 9, 9] total 34 [2022-11-03 03:58:48,787 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1832930698] [2022-11-03 03:58:48,787 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 03:58:48,788 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 34 states [2022-11-03 03:58:48,788 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:58:48,789 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2022-11-03 03:58:48,789 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=178, Invalid=910, Unknown=34, NotChecked=0, Total=1122 [2022-11-03 03:58:48,790 INFO L87 Difference]: Start difference. First operand 484 states and 691 transitions. Second operand has 34 states, 34 states have (on average 8.764705882352942) internal successors, (298), 34 states have internal predecessors, (298), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:58:50,508 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:58:50,509 INFO L93 Difference]: Finished difference Result 868 states and 1246 transitions. [2022-11-03 03:58:50,509 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-11-03 03:58:50,509 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 34 states have (on average 8.764705882352942) internal successors, (298), 34 states have internal predecessors, (298), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2022-11-03 03:58:50,510 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:58:50,514 INFO L225 Difference]: With dead ends: 868 [2022-11-03 03:58:50,514 INFO L226 Difference]: Without dead ends: 866 [2022-11-03 03:58:50,515 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 405 GetRequests, 359 SyntacticMatches, 4 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 529 ImplicationChecksByTransitivity, 86.8s TimeCoverageRelationStatistics Valid=359, Invalid=1499, Unknown=34, NotChecked=0, Total=1892 [2022-11-03 03:58:50,516 INFO L413 NwaCegarLoop]: 76 mSDtfsCounter, 363 mSDsluCounter, 1812 mSDsCounter, 0 mSdLazyCounter, 5 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 363 SdHoareTripleChecker+Valid, 1888 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 5 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 27 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 03:58:50,516 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [363 Valid, 1888 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 5 Invalid, 0 Unknown, 27 Unchecked, 0.0s Time] [2022-11-03 03:58:50,517 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 866 states. [2022-11-03 03:58:50,551 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 866 to 854. [2022-11-03 03:58:50,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 854 states, 853 states have (on average 1.4396248534583822) internal successors, (1228), 853 states have internal predecessors, (1228), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:58:50,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 854 states to 854 states and 1228 transitions. [2022-11-03 03:58:50,556 INFO L78 Accepts]: Start accepts. Automaton has 854 states and 1228 transitions. Word has length 66 [2022-11-03 03:58:50,557 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:58:50,557 INFO L495 AbstractCegarLoop]: Abstraction has 854 states and 1228 transitions. [2022-11-03 03:58:50,557 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 34 states, 34 states have (on average 8.764705882352942) internal successors, (298), 34 states have internal predecessors, (298), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:58:50,557 INFO L276 IsEmpty]: Start isEmpty. Operand 854 states and 1228 transitions. [2022-11-03 03:58:50,558 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-11-03 03:58:50,558 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:58:50,559 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:58:50,604 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Forceful destruction successful, exit code 0 [2022-11-03 03:58:50,788 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (19)] Forceful destruction successful, exit code 0 [2022-11-03 03:58:50,980 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (20)] Forceful destruction successful, exit code 0 [2022-11-03 03:58:51,172 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 21 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,19 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,20 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt [2022-11-03 03:58:51,173 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:58:51,173 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:58:51,173 INFO L85 PathProgramCache]: Analyzing trace with hash -289073803, now seen corresponding path program 1 times [2022-11-03 03:58:51,174 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:58:51,174 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1486487343] [2022-11-03 03:58:51,175 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:58:51,175 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:58:51,175 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:58:51,175 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:58:51,178 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (22)] Waiting until timeout for monitored process [2022-11-03 03:58:51,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:58:51,869 INFO L263 TraceCheckSpWp]: Trace formula consists of 1620 conjuncts, 66 conjunts are in the unsatisfiable core [2022-11-03 03:58:51,875 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:58:53,342 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 1 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:58:53,343 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:59:05,751 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:59:05,752 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:59:05,752 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1486487343] [2022-11-03 03:59:05,752 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1486487343] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:59:05,752 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1782817294] [2022-11-03 03:59:05,752 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:59:05,753 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 03:59:05,753 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 03:59:05,754 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 03:59:05,790 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (23)] Waiting until timeout for monitored process [2022-11-03 03:59:07,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:59:07,179 INFO L263 TraceCheckSpWp]: Trace formula consists of 1620 conjuncts, 66 conjunts are in the unsatisfiable core [2022-11-03 03:59:07,185 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:59:08,294 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 1 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:59:08,295 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 04:00:08,218 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 04:00:08,219 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1782817294] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 04:00:08,219 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [538534667] [2022-11-03 04:00:08,219 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 04:00:08,219 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 04:00:08,219 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 04:00:08,221 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 04:00:08,222 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2022-11-03 04:00:08,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 04:00:08,866 INFO L263 TraceCheckSpWp]: Trace formula consists of 1620 conjuncts, 45 conjunts are in the unsatisfiable core [2022-11-03 04:00:08,871 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 04:00:11,160 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 04:00:11,160 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 04:00:26,031 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 04:00:26,031 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [538534667] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 04:00:26,032 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 04:00:26,032 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 9, 9] total 34 [2022-11-03 04:00:26,032 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [231937772] [2022-11-03 04:00:26,032 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 04:00:26,032 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 34 states [2022-11-03 04:00:26,033 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 04:00:26,033 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2022-11-03 04:00:26,034 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=180, Invalid=911, Unknown=31, NotChecked=0, Total=1122 [2022-11-03 04:00:26,034 INFO L87 Difference]: Start difference. First operand 854 states and 1228 transitions. Second operand has 34 states, 34 states have (on average 8.764705882352942) internal successors, (298), 34 states have internal predecessors, (298), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 04:00:27,974 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 04:00:27,974 INFO L93 Difference]: Finished difference Result 1054 states and 1516 transitions. [2022-11-03 04:00:27,974 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-11-03 04:00:27,975 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 34 states have (on average 8.764705882352942) internal successors, (298), 34 states have internal predecessors, (298), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2022-11-03 04:00:27,975 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 04:00:27,979 INFO L225 Difference]: With dead ends: 1054 [2022-11-03 04:00:27,979 INFO L226 Difference]: Without dead ends: 1052 [2022-11-03 04:00:27,980 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 406 GetRequests, 360 SyntacticMatches, 4 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 530 ImplicationChecksByTransitivity, 86.3s TimeCoverageRelationStatistics Valid=361, Invalid=1500, Unknown=31, NotChecked=0, Total=1892 [2022-11-03 04:00:27,981 INFO L413 NwaCegarLoop]: 76 mSDtfsCounter, 524 mSDsluCounter, 1852 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 524 SdHoareTripleChecker+Valid, 1928 SdHoareTripleChecker+Invalid, 45 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 42 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 04:00:27,981 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [524 Valid, 1928 Invalid, 45 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 3 Invalid, 0 Unknown, 42 Unchecked, 0.0s Time] [2022-11-03 04:00:27,982 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1052 states. [2022-11-03 04:00:28,022 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1052 to 1040. [2022-11-03 04:00:28,023 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1040 states, 1039 states have (on average 1.4417709335899904) internal successors, (1498), 1039 states have internal predecessors, (1498), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 04:00:28,027 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1040 states to 1040 states and 1498 transitions. [2022-11-03 04:00:28,027 INFO L78 Accepts]: Start accepts. Automaton has 1040 states and 1498 transitions. Word has length 66 [2022-11-03 04:00:28,027 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 04:00:28,028 INFO L495 AbstractCegarLoop]: Abstraction has 1040 states and 1498 transitions. [2022-11-03 04:00:28,028 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 34 states, 34 states have (on average 8.764705882352942) internal successors, (298), 34 states have internal predecessors, (298), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 04:00:28,028 INFO L276 IsEmpty]: Start isEmpty. Operand 1040 states and 1498 transitions. [2022-11-03 04:00:28,029 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-11-03 04:00:28,030 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 04:00:28,030 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 04:00:28,054 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (22)] Forceful destruction successful, exit code 0 [2022-11-03 04:00:28,272 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Forceful destruction successful, exit code 0 [2022-11-03 04:00:28,456 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (23)] Forceful destruction successful, exit code 0 [2022-11-03 04:00:28,646 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 22 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,24 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,23 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt [2022-11-03 04:00:28,646 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 04:00:28,647 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 04:00:28,647 INFO L85 PathProgramCache]: Analyzing trace with hash -1877421705, now seen corresponding path program 1 times [2022-11-03 04:00:28,648 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 04:00:28,648 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1314423776] [2022-11-03 04:00:28,648 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 04:00:28,648 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 04:00:28,648 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 04:00:28,649 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 04:00:28,651 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (25)] Waiting until timeout for monitored process [2022-11-03 04:00:29,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 04:00:29,362 INFO L263 TraceCheckSpWp]: Trace formula consists of 1620 conjuncts, 66 conjunts are in the unsatisfiable core [2022-11-03 04:00:29,366 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 04:00:30,944 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 1 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 04:00:30,944 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 04:00:40,385 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 04:00:40,385 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 04:00:40,385 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1314423776] [2022-11-03 04:00:40,386 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1314423776] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 04:00:40,386 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [259042467] [2022-11-03 04:00:40,386 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 04:00:40,386 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 04:00:40,386 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 04:00:40,387 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 04:00:40,392 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_035c6d7d-db93-4010-8f82-62c42eddd13c/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (26)] Waiting until timeout for monitored process [2022-11-03 04:00:41,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 04:00:41,771 INFO L263 TraceCheckSpWp]: Trace formula consists of 1620 conjuncts, 66 conjunts are in the unsatisfiable core [2022-11-03 04:00:41,776 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 04:00:42,883 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 1 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 04:00:42,883 INFO L328 TraceCheckSpWp]: Computing backward predicates...