./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.sw_loop_v.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 5e519f3a Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.sw_loop_v.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 19f6395c4ae8060ccaae4c72a4fb1648974175c0b145c9e17ae6b3ed3f5f936e --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-5e519f3 [2022-11-03 01:52:03,997 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-03 01:52:04,001 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-03 01:52:04,063 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-03 01:52:04,063 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-03 01:52:04,068 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-03 01:52:04,071 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-03 01:52:04,076 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-03 01:52:04,078 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-03 01:52:04,085 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-03 01:52:04,086 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-03 01:52:04,091 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-03 01:52:04,093 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-03 01:52:04,096 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-03 01:52:04,097 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-03 01:52:04,100 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-03 01:52:04,102 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-03 01:52:04,104 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-03 01:52:04,106 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-03 01:52:04,115 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-03 01:52:04,117 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-03 01:52:04,119 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-03 01:52:04,124 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-03 01:52:04,125 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-03 01:52:04,135 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-03 01:52:04,136 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-03 01:52:04,136 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-03 01:52:04,139 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-03 01:52:04,139 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-03 01:52:04,140 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-03 01:52:04,142 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-03 01:52:04,144 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-03 01:52:04,146 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-03 01:52:04,148 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-03 01:52:04,150 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-03 01:52:04,150 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-03 01:52:04,151 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-03 01:52:04,151 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-03 01:52:04,152 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-03 01:52:04,153 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-03 01:52:04,154 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-03 01:52:04,155 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Default.epf [2022-11-03 01:52:04,208 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-03 01:52:04,208 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-03 01:52:04,209 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-03 01:52:04,209 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-03 01:52:04,210 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-03 01:52:04,210 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-03 01:52:04,210 INFO L138 SettingsManager]: * User list type=DISABLED [2022-11-03 01:52:04,211 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-11-03 01:52:04,211 INFO L138 SettingsManager]: * Explicit value domain=true [2022-11-03 01:52:04,211 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2022-11-03 01:52:04,211 INFO L138 SettingsManager]: * Octagon Domain=false [2022-11-03 01:52:04,212 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-11-03 01:52:04,212 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2022-11-03 01:52:04,212 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2022-11-03 01:52:04,213 INFO L138 SettingsManager]: * Interval Domain=false [2022-11-03 01:52:04,213 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2022-11-03 01:52:04,213 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2022-11-03 01:52:04,213 INFO L138 SettingsManager]: * Simplification Technique=POLY_PAC [2022-11-03 01:52:04,214 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-03 01:52:04,215 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-03 01:52:04,215 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-03 01:52:04,215 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-03 01:52:04,215 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-03 01:52:04,216 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-03 01:52:04,216 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-03 01:52:04,216 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-03 01:52:04,216 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-03 01:52:04,217 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-03 01:52:04,217 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-03 01:52:04,217 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 01:52:04,218 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-03 01:52:04,218 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2022-11-03 01:52:04,218 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-03 01:52:04,219 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-03 01:52:04,219 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2022-11-03 01:52:04,219 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-11-03 01:52:04,219 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-03 01:52:04,220 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-11-03 01:52:04,220 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 19f6395c4ae8060ccaae4c72a4fb1648974175c0b145c9e17ae6b3ed3f5f936e [2022-11-03 01:52:04,582 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-03 01:52:04,622 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-03 01:52:04,625 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-03 01:52:04,628 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-03 01:52:04,629 INFO L275 PluginConnector]: CDTParser initialized [2022-11-03 01:52:04,630 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.sw_loop_v.c [2022-11-03 01:52:04,715 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/data/d689fb184/1109cc997b864fd5a7c0991bf6faf74a/FLAG5b0309767 [2022-11-03 01:52:05,374 INFO L306 CDTParser]: Found 1 translation units. [2022-11-03 01:52:05,375 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.sw_loop_v.c [2022-11-03 01:52:05,387 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/data/d689fb184/1109cc997b864fd5a7c0991bf6faf74a/FLAG5b0309767 [2022-11-03 01:52:05,659 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/data/d689fb184/1109cc997b864fd5a7c0991bf6faf74a [2022-11-03 01:52:05,662 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-03 01:52:05,663 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-03 01:52:05,665 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-03 01:52:05,666 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-03 01:52:05,673 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-03 01:52:05,674 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 01:52:05" (1/1) ... [2022-11-03 01:52:05,675 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@66d885ae and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:52:05, skipping insertion in model container [2022-11-03 01:52:05,676 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 01:52:05" (1/1) ... [2022-11-03 01:52:05,690 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-03 01:52:05,752 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-03 01:52:05,973 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.sw_loop_v.c[1107,1120] [2022-11-03 01:52:06,135 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 01:52:06,139 INFO L203 MainTranslator]: Completed pre-run [2022-11-03 01:52:06,153 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.sw_loop_v.c[1107,1120] [2022-11-03 01:52:06,259 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 01:52:06,286 INFO L208 MainTranslator]: Completed translation [2022-11-03 01:52:06,287 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:52:06 WrapperNode [2022-11-03 01:52:06,287 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-03 01:52:06,288 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-03 01:52:06,288 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-03 01:52:06,288 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-03 01:52:06,297 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:52:06" (1/1) ... [2022-11-03 01:52:06,320 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:52:06" (1/1) ... [2022-11-03 01:52:06,398 INFO L138 Inliner]: procedures = 11, calls = 3, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 461 [2022-11-03 01:52:06,399 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-03 01:52:06,399 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-03 01:52:06,400 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-03 01:52:06,400 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-03 01:52:06,410 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:52:06" (1/1) ... [2022-11-03 01:52:06,411 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:52:06" (1/1) ... [2022-11-03 01:52:06,421 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:52:06" (1/1) ... [2022-11-03 01:52:06,421 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:52:06" (1/1) ... [2022-11-03 01:52:06,447 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:52:06" (1/1) ... [2022-11-03 01:52:06,453 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:52:06" (1/1) ... [2022-11-03 01:52:06,457 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:52:06" (1/1) ... [2022-11-03 01:52:06,462 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:52:06" (1/1) ... [2022-11-03 01:52:06,474 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-03 01:52:06,478 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-03 01:52:06,478 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-03 01:52:06,478 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-03 01:52:06,479 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:52:06" (1/1) ... [2022-11-03 01:52:06,486 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 01:52:06,500 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 01:52:06,514 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-03 01:52:06,552 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-03 01:52:06,582 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-03 01:52:06,583 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-03 01:52:06,828 INFO L235 CfgBuilder]: Building ICFG [2022-11-03 01:52:06,830 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-03 01:52:09,505 INFO L276 CfgBuilder]: Performing block encoding [2022-11-03 01:52:10,330 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-03 01:52:10,331 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-03 01:52:10,334 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 01:52:10 BoogieIcfgContainer [2022-11-03 01:52:10,334 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-03 01:52:10,337 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-03 01:52:10,338 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-03 01:52:10,343 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-03 01:52:10,343 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 03.11 01:52:05" (1/3) ... [2022-11-03 01:52:10,344 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6ce85a62 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 01:52:10, skipping insertion in model container [2022-11-03 01:52:10,344 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:52:06" (2/3) ... [2022-11-03 01:52:10,345 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6ce85a62 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 01:52:10, skipping insertion in model container [2022-11-03 01:52:10,345 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 01:52:10" (3/3) ... [2022-11-03 01:52:10,347 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.sw_loop_v.c [2022-11-03 01:52:10,376 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-03 01:52:10,377 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-03 01:52:10,453 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-03 01:52:10,469 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@69047bd9, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-03 01:52:10,469 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-03 01:52:10,475 INFO L276 IsEmpty]: Start isEmpty. Operand has 7 states, 5 states have (on average 1.6) internal successors, (8), 6 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:52:10,497 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2022-11-03 01:52:10,501 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 01:52:10,502 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1] [2022-11-03 01:52:10,503 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 01:52:10,510 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 01:52:10,511 INFO L85 PathProgramCache]: Analyzing trace with hash 3912649, now seen corresponding path program 1 times [2022-11-03 01:52:10,525 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-03 01:52:10,526 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [860001008] [2022-11-03 01:52:10,527 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 01:52:10,527 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-03 01:52:10,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-03 01:52:10,688 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-03 01:52:10,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-03 01:52:10,767 INFO L130 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2022-11-03 01:52:10,769 INFO L359 BasicCegarLoop]: Counterexample is feasible [2022-11-03 01:52:10,770 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-11-03 01:52:10,772 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-11-03 01:52:10,777 INFO L444 BasicCegarLoop]: Path program histogram: [1] [2022-11-03 01:52:10,781 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-03 01:52:10,801 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 01:52:10,808 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 03.11 01:52:10 BoogieIcfgContainer [2022-11-03 01:52:10,809 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-03 01:52:10,809 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-03 01:52:10,809 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-03 01:52:10,810 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-03 01:52:10,810 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 01:52:10" (3/4) ... [2022-11-03 01:52:10,814 INFO L140 WitnessPrinter]: No result that supports witness generation found [2022-11-03 01:52:10,814 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-03 01:52:10,815 INFO L158 Benchmark]: Toolchain (without parser) took 5151.89ms. Allocated memory was 104.9MB in the beginning and 159.4MB in the end (delta: 54.5MB). Free memory was 68.2MB in the beginning and 61.5MB in the end (delta: 6.7MB). Peak memory consumption was 62.8MB. Max. memory is 16.1GB. [2022-11-03 01:52:10,816 INFO L158 Benchmark]: CDTParser took 0.38ms. Allocated memory is still 104.9MB. Free memory is still 85.2MB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-03 01:52:10,817 INFO L158 Benchmark]: CACSL2BoogieTranslator took 622.01ms. Allocated memory is still 104.9MB. Free memory was 68.0MB in the beginning and 70.2MB in the end (delta: -2.2MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. [2022-11-03 01:52:10,817 INFO L158 Benchmark]: Boogie Procedure Inliner took 110.67ms. Allocated memory is still 104.9MB. Free memory was 70.2MB in the beginning and 61.8MB in the end (delta: 8.4MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2022-11-03 01:52:10,818 INFO L158 Benchmark]: Boogie Preprocessor took 77.35ms. Allocated memory is still 104.9MB. Free memory was 61.8MB in the beginning and 57.1MB in the end (delta: 4.7MB). Peak memory consumption was 6.3MB. Max. memory is 16.1GB. [2022-11-03 01:52:10,819 INFO L158 Benchmark]: RCFGBuilder took 3857.05ms. Allocated memory was 104.9MB in the beginning and 159.4MB in the end (delta: 54.5MB). Free memory was 57.1MB in the beginning and 83.6MB in the end (delta: -26.4MB). Peak memory consumption was 79.9MB. Max. memory is 16.1GB. [2022-11-03 01:52:10,820 INFO L158 Benchmark]: TraceAbstraction took 471.33ms. Allocated memory is still 159.4MB. Free memory was 83.6MB in the beginning and 62.6MB in the end (delta: 21.0MB). Peak memory consumption was 21.0MB. Max. memory is 16.1GB. [2022-11-03 01:52:10,820 INFO L158 Benchmark]: Witness Printer took 4.89ms. Allocated memory is still 159.4MB. Free memory was 61.5MB in the beginning and 61.5MB in the end (delta: 2.0kB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-11-03 01:52:10,824 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.38ms. Allocated memory is still 104.9MB. Free memory is still 85.2MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 622.01ms. Allocated memory is still 104.9MB. Free memory was 68.0MB in the beginning and 70.2MB in the end (delta: -2.2MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 110.67ms. Allocated memory is still 104.9MB. Free memory was 70.2MB in the beginning and 61.8MB in the end (delta: 8.4MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Preprocessor took 77.35ms. Allocated memory is still 104.9MB. Free memory was 61.8MB in the beginning and 57.1MB in the end (delta: 4.7MB). Peak memory consumption was 6.3MB. Max. memory is 16.1GB. * RCFGBuilder took 3857.05ms. Allocated memory was 104.9MB in the beginning and 159.4MB in the end (delta: 54.5MB). Free memory was 57.1MB in the beginning and 83.6MB in the end (delta: -26.4MB). Peak memory consumption was 79.9MB. Max. memory is 16.1GB. * TraceAbstraction took 471.33ms. Allocated memory is still 159.4MB. Free memory was 83.6MB in the beginning and 62.6MB in the end (delta: 21.0MB). Peak memory consumption was 21.0MB. Max. memory is 16.1GB. * Witness Printer took 4.89ms. Allocated memory is still 159.4MB. Free memory was 61.5MB in the beginning and 61.5MB in the end (delta: 2.0kB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 20]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: overapproximation of bitwiseComplement at line 74, overapproximation of bitwiseAnd at line 79. Possible FailurePath: [L25] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L26] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L28] const SORT_27 mask_SORT_27 = (SORT_27)-1 >> (sizeof(SORT_27) * 8 - 6); [L29] const SORT_27 msb_SORT_27 = (SORT_27)1 << (6 - 1); [L31] const SORT_1 var_3 = 0; [L32] const SORT_1 var_9 = 1; [L33] const SORT_27 var_28 = 1; [L34] const SORT_27 var_32 = 19; [L35] const SORT_27 var_45 = 17; [L36] const SORT_27 var_158 = 3; [L38] SORT_1 input_2; [L40] SORT_1 state_4 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L41] SORT_1 state_13 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L42] SORT_1 state_15 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L43] SORT_1 state_17 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L44] SORT_1 state_19 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L45] SORT_1 state_21 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L46] SORT_1 state_23 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L47] SORT_1 state_25 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L48] SORT_27 state_29 = __VERIFIER_nondet_uchar() & mask_SORT_27; [L50] SORT_1 init_5_arg_1 = var_3; [L51] state_4 = init_5_arg_1 [L52] SORT_1 init_14_arg_1 = var_9; [L53] state_13 = init_14_arg_1 [L54] SORT_1 init_16_arg_1 = var_3; [L55] state_15 = init_16_arg_1 [L56] SORT_1 init_18_arg_1 = var_3; [L57] state_17 = init_18_arg_1 [L58] SORT_1 init_20_arg_1 = var_3; [L59] state_19 = init_20_arg_1 [L60] SORT_1 init_22_arg_1 = var_3; [L61] state_21 = init_22_arg_1 [L62] SORT_1 init_24_arg_1 = var_3; [L63] state_23 = init_24_arg_1 [L64] SORT_1 init_26_arg_1 = var_9; [L65] state_25 = init_26_arg_1 [L66] SORT_27 init_30_arg_1 = var_28; [L67] state_29 = init_30_arg_1 VAL [init_14_arg_1=1, init_16_arg_1=0, init_18_arg_1=0, init_20_arg_1=0, init_22_arg_1=0, init_24_arg_1=0, init_26_arg_1=1, init_30_arg_1=1, init_5_arg_1=0, mask_SORT_1=1, mask_SORT_27=63, msb_SORT_1=1, msb_SORT_27=32, state_13=1, state_15=0, state_17=0, state_19=0, state_21=0, state_23=0, state_25=1, state_29=1, state_4=0, var_158=3, var_28=1, var_3=0, var_32=19, var_45=17, var_9=1] [L70] input_2 = __VERIFIER_nondet_uchar() [L73] SORT_1 var_6_arg_0 = state_4; [L74] SORT_1 var_6 = ~var_6_arg_0; [L75] SORT_1 var_10_arg_0 = var_6; [L76] SORT_1 var_10 = ~var_10_arg_0; [L77] SORT_1 var_11_arg_0 = var_9; [L78] SORT_1 var_11_arg_1 = var_10; [L79] SORT_1 var_11 = var_11_arg_0 & var_11_arg_1; [L80] var_11 = var_11 & mask_SORT_1 [L81] SORT_1 bad_12_arg_0 = var_11; [L82] CALL __VERIFIER_assert(!(bad_12_arg_0)) [L20] COND TRUE !(cond) VAL [\old(cond)=0, cond=0] [L20] reach_error() VAL [\old(cond)=0, cond=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 7 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 0.3s, OverallIterations: 1, TraceHistogramMax: 1, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: , PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=7occurred in iteration=0, InterpolantAutomatonStates: 0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.1s SatisfiabilityAnalysisTime, 0.0s InterpolantComputationTime, 4 NumberOfCodeBlocks, 4 NumberOfCodeBlocksAsserted, 1 NumberOfCheckSat, 0 ConstructedInterpolants, 0 QuantifiedInterpolants, 0 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 0 InterpolantComputations, 0 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2022-11-03 01:52:10,850 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.sw_loop_v.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 19f6395c4ae8060ccaae4c72a4fb1648974175c0b145c9e17ae6b3ed3f5f936e --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-5e519f3 [2022-11-03 01:52:13,849 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-03 01:52:13,852 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-03 01:52:13,885 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-03 01:52:13,886 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-03 01:52:13,888 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-03 01:52:13,889 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-03 01:52:13,892 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-03 01:52:13,894 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-03 01:52:13,895 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-03 01:52:13,897 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-03 01:52:13,898 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-03 01:52:13,899 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-03 01:52:13,900 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-03 01:52:13,902 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-03 01:52:13,903 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-03 01:52:13,905 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-03 01:52:13,906 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-03 01:52:13,908 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-03 01:52:13,913 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-03 01:52:13,915 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-03 01:52:13,916 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-03 01:52:13,918 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-03 01:52:13,924 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-03 01:52:13,928 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-03 01:52:13,935 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-03 01:52:13,935 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-03 01:52:13,937 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-03 01:52:13,938 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-03 01:52:13,939 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-03 01:52:13,939 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-03 01:52:13,941 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-03 01:52:13,947 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-03 01:52:13,948 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-03 01:52:13,949 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-03 01:52:13,950 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-03 01:52:13,952 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-03 01:52:13,953 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-03 01:52:13,954 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-03 01:52:13,955 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-03 01:52:13,958 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-03 01:52:13,959 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Bitvector.epf [2022-11-03 01:52:14,011 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-03 01:52:14,011 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-03 01:52:14,012 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-03 01:52:14,012 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-03 01:52:14,013 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-03 01:52:14,014 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-03 01:52:14,014 INFO L138 SettingsManager]: * User list type=DISABLED [2022-11-03 01:52:14,014 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-11-03 01:52:14,015 INFO L138 SettingsManager]: * Explicit value domain=true [2022-11-03 01:52:14,015 INFO L138 SettingsManager]: * Octagon Domain=false [2022-11-03 01:52:14,016 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-11-03 01:52:14,016 INFO L138 SettingsManager]: * Interval Domain=false [2022-11-03 01:52:14,017 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-03 01:52:14,017 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-03 01:52:14,018 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-03 01:52:14,018 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-03 01:52:14,018 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-03 01:52:14,019 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-11-03 01:52:14,019 INFO L138 SettingsManager]: * Use bitvectors instead of ints=true [2022-11-03 01:52:14,020 INFO L138 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2022-11-03 01:52:14,020 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-03 01:52:14,020 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-03 01:52:14,021 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-03 01:52:14,021 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-03 01:52:14,021 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-03 01:52:14,022 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-03 01:52:14,022 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 01:52:14,023 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-03 01:52:14,023 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-03 01:52:14,023 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-03 01:52:14,024 INFO L138 SettingsManager]: * Trace refinement strategy=WALRUS [2022-11-03 01:52:14,024 INFO L138 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2022-11-03 01:52:14,024 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-03 01:52:14,025 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-11-03 01:52:14,025 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-11-03 01:52:14,026 INFO L138 SettingsManager]: * Logic for external solver=AUFBV WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 19f6395c4ae8060ccaae4c72a4fb1648974175c0b145c9e17ae6b3ed3f5f936e [2022-11-03 01:52:14,478 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-03 01:52:14,518 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-03 01:52:14,523 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-03 01:52:14,525 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-03 01:52:14,526 INFO L275 PluginConnector]: CDTParser initialized [2022-11-03 01:52:14,528 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.sw_loop_v.c [2022-11-03 01:52:14,621 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/data/36e71dc2e/ccea1a6cbead4f20a2dd38ab949d43b6/FLAG46120be74 [2022-11-03 01:52:15,402 INFO L306 CDTParser]: Found 1 translation units. [2022-11-03 01:52:15,407 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.sw_loop_v.c [2022-11-03 01:52:15,420 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/data/36e71dc2e/ccea1a6cbead4f20a2dd38ab949d43b6/FLAG46120be74 [2022-11-03 01:52:15,442 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/data/36e71dc2e/ccea1a6cbead4f20a2dd38ab949d43b6 [2022-11-03 01:52:15,445 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-03 01:52:15,449 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-03 01:52:15,450 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-03 01:52:15,451 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-03 01:52:15,456 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-03 01:52:15,457 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 01:52:15" (1/1) ... [2022-11-03 01:52:15,459 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3469a5c4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:52:15, skipping insertion in model container [2022-11-03 01:52:15,459 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 01:52:15" (1/1) ... [2022-11-03 01:52:15,468 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-03 01:52:15,527 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-03 01:52:15,751 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.sw_loop_v.c[1107,1120] [2022-11-03 01:52:16,035 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 01:52:16,039 INFO L203 MainTranslator]: Completed pre-run [2022-11-03 01:52:16,063 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.sw_loop_v.c[1107,1120] [2022-11-03 01:52:16,162 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 01:52:16,178 INFO L208 MainTranslator]: Completed translation [2022-11-03 01:52:16,178 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:52:16 WrapperNode [2022-11-03 01:52:16,179 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-03 01:52:16,180 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-03 01:52:16,180 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-03 01:52:16,181 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-03 01:52:16,189 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:52:16" (1/1) ... [2022-11-03 01:52:16,208 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:52:16" (1/1) ... [2022-11-03 01:52:16,268 INFO L138 Inliner]: procedures = 11, calls = 3, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 461 [2022-11-03 01:52:16,269 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-03 01:52:16,270 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-03 01:52:16,270 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-03 01:52:16,270 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-03 01:52:16,282 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:52:16" (1/1) ... [2022-11-03 01:52:16,282 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:52:16" (1/1) ... [2022-11-03 01:52:16,294 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:52:16" (1/1) ... [2022-11-03 01:52:16,294 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:52:16" (1/1) ... [2022-11-03 01:52:16,324 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:52:16" (1/1) ... [2022-11-03 01:52:16,337 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:52:16" (1/1) ... [2022-11-03 01:52:16,345 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:52:16" (1/1) ... [2022-11-03 01:52:16,355 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:52:16" (1/1) ... [2022-11-03 01:52:16,361 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-03 01:52:16,370 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-03 01:52:16,371 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-03 01:52:16,371 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-03 01:52:16,372 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:52:16" (1/1) ... [2022-11-03 01:52:16,379 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 01:52:16,391 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 01:52:16,408 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-03 01:52:16,438 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-03 01:52:16,465 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-03 01:52:16,465 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-03 01:52:16,653 INFO L235 CfgBuilder]: Building ICFG [2022-11-03 01:52:16,656 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-03 01:52:17,389 INFO L276 CfgBuilder]: Performing block encoding [2022-11-03 01:52:17,398 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-03 01:52:17,398 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-03 01:52:17,401 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 01:52:17 BoogieIcfgContainer [2022-11-03 01:52:17,401 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-03 01:52:17,424 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-03 01:52:17,425 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-03 01:52:17,429 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-03 01:52:17,442 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 03.11 01:52:15" (1/3) ... [2022-11-03 01:52:17,443 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@14987590 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 01:52:17, skipping insertion in model container [2022-11-03 01:52:17,444 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:52:16" (2/3) ... [2022-11-03 01:52:17,444 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@14987590 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 01:52:17, skipping insertion in model container [2022-11-03 01:52:17,444 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 01:52:17" (3/3) ... [2022-11-03 01:52:17,446 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.sw_loop_v.c [2022-11-03 01:52:17,471 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-03 01:52:17,471 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-03 01:52:17,562 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-03 01:52:17,580 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@5d729912, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-03 01:52:17,581 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-03 01:52:17,591 INFO L276 IsEmpty]: Start isEmpty. Operand has 31 states, 29 states have (on average 1.4827586206896552) internal successors, (43), 30 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:52:17,602 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2022-11-03 01:52:17,603 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 01:52:17,604 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2022-11-03 01:52:17,605 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 01:52:17,618 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 01:52:17,619 INFO L85 PathProgramCache]: Analyzing trace with hash 28698761, now seen corresponding path program 1 times [2022-11-03 01:52:17,637 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 01:52:17,639 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [76893567] [2022-11-03 01:52:17,639 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 01:52:17,640 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 01:52:17,641 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 01:52:17,646 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 01:52:17,678 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (2)] Waiting until timeout for monitored process [2022-11-03 01:52:17,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 01:52:17,892 INFO L263 TraceCheckSpWp]: Trace formula consists of 44 conjuncts, 14 conjunts are in the unsatisfiable core [2022-11-03 01:52:17,903 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 01:52:18,085 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:52:18,086 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 01:52:18,087 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 01:52:18,087 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [76893567] [2022-11-03 01:52:18,088 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [76893567] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 01:52:18,088 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 01:52:18,089 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-03 01:52:18,091 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1167521577] [2022-11-03 01:52:18,092 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 01:52:18,100 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 01:52:18,100 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 01:52:18,147 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 01:52:18,149 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 01:52:18,151 INFO L87 Difference]: Start difference. First operand has 31 states, 29 states have (on average 1.4827586206896552) internal successors, (43), 30 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:52:18,319 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 01:52:18,320 INFO L93 Difference]: Finished difference Result 80 states and 120 transitions. [2022-11-03 01:52:18,324 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-03 01:52:18,325 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 5 [2022-11-03 01:52:18,326 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 01:52:18,343 INFO L225 Difference]: With dead ends: 80 [2022-11-03 01:52:18,343 INFO L226 Difference]: Without dead ends: 51 [2022-11-03 01:52:18,348 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-03 01:52:18,354 INFO L413 NwaCegarLoop]: 33 mSDtfsCounter, 64 mSDsluCounter, 65 mSDsCounter, 0 mSdLazyCounter, 13 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 64 SdHoareTripleChecker+Valid, 98 SdHoareTripleChecker+Invalid, 13 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 13 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 01:52:18,357 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [64 Valid, 98 Invalid, 13 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 13 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 01:52:18,381 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2022-11-03 01:52:18,403 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 29. [2022-11-03 01:52:18,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 28 states have (on average 1.3928571428571428) internal successors, (39), 28 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:52:18,407 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 39 transitions. [2022-11-03 01:52:18,408 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 39 transitions. Word has length 5 [2022-11-03 01:52:18,409 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 01:52:18,409 INFO L495 AbstractCegarLoop]: Abstraction has 29 states and 39 transitions. [2022-11-03 01:52:18,423 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:52:18,424 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 39 transitions. [2022-11-03 01:52:18,426 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-11-03 01:52:18,427 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 01:52:18,428 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 01:52:18,450 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (2)] Ended with exit code 0 [2022-11-03 01:52:18,648 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 01:52:18,648 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 01:52:18,649 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 01:52:18,649 INFO L85 PathProgramCache]: Analyzing trace with hash 202435871, now seen corresponding path program 1 times [2022-11-03 01:52:18,652 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 01:52:18,652 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [325055360] [2022-11-03 01:52:18,653 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 01:52:18,653 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 01:52:18,653 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 01:52:18,662 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 01:52:18,670 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (3)] Waiting until timeout for monitored process [2022-11-03 01:52:19,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 01:52:19,025 INFO L263 TraceCheckSpWp]: Trace formula consists of 422 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-03 01:52:19,030 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 01:52:19,069 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:52:19,069 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 01:52:19,070 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 01:52:19,070 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [325055360] [2022-11-03 01:52:19,071 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [325055360] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 01:52:19,071 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 01:52:19,071 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-03 01:52:19,071 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [7542995] [2022-11-03 01:52:19,072 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 01:52:19,073 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 01:52:19,074 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 01:52:19,074 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 01:52:19,075 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 01:52:19,075 INFO L87 Difference]: Start difference. First operand 29 states and 39 transitions. Second operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 4 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:52:19,162 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 01:52:19,163 INFO L93 Difference]: Finished difference Result 82 states and 113 transitions. [2022-11-03 01:52:19,164 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-03 01:52:19,164 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 4 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 28 [2022-11-03 01:52:19,165 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 01:52:19,166 INFO L225 Difference]: With dead ends: 82 [2022-11-03 01:52:19,167 INFO L226 Difference]: Without dead ends: 57 [2022-11-03 01:52:19,168 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-03 01:52:19,171 INFO L413 NwaCegarLoop]: 34 mSDtfsCounter, 60 mSDsluCounter, 59 mSDsCounter, 0 mSdLazyCounter, 23 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 60 SdHoareTripleChecker+Valid, 93 SdHoareTripleChecker+Invalid, 23 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 23 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 01:52:19,174 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [60 Valid, 93 Invalid, 23 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 23 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 01:52:19,177 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states. [2022-11-03 01:52:19,183 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 33. [2022-11-03 01:52:19,185 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 32 states have (on average 1.375) internal successors, (44), 32 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:52:19,189 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 44 transitions. [2022-11-03 01:52:19,190 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 44 transitions. Word has length 28 [2022-11-03 01:52:19,190 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 01:52:19,191 INFO L495 AbstractCegarLoop]: Abstraction has 33 states and 44 transitions. [2022-11-03 01:52:19,191 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 4 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:52:19,196 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 44 transitions. [2022-11-03 01:52:19,197 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-11-03 01:52:19,197 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 01:52:19,198 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 01:52:19,222 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (3)] Forceful destruction successful, exit code 0 [2022-11-03 01:52:19,421 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 01:52:19,422 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 01:52:19,422 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 01:52:19,422 INFO L85 PathProgramCache]: Analyzing trace with hash -220265955, now seen corresponding path program 1 times [2022-11-03 01:52:19,423 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 01:52:19,424 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1569242241] [2022-11-03 01:52:19,424 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 01:52:19,424 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 01:52:19,424 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 01:52:19,426 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 01:52:19,461 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (4)] Waiting until timeout for monitored process [2022-11-03 01:52:19,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 01:52:19,786 INFO L263 TraceCheckSpWp]: Trace formula consists of 422 conjuncts, 33 conjunts are in the unsatisfiable core [2022-11-03 01:52:19,792 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 01:52:20,189 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:52:20,189 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 01:52:20,678 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:52:20,679 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 01:52:20,679 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1569242241] [2022-11-03 01:52:20,680 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1569242241] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 01:52:20,685 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [245292152] [2022-11-03 01:52:20,685 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 01:52:20,686 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 01:52:20,686 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 01:52:20,693 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 01:52:20,718 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (5)] Waiting until timeout for monitored process [2022-11-03 01:52:21,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 01:52:21,193 INFO L263 TraceCheckSpWp]: Trace formula consists of 422 conjuncts, 33 conjunts are in the unsatisfiable core [2022-11-03 01:52:21,200 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 01:52:21,432 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:52:21,433 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 01:52:21,705 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:52:21,707 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [245292152] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 01:52:21,707 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [6956903] [2022-11-03 01:52:21,707 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 01:52:21,708 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 01:52:21,708 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 01:52:21,712 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 01:52:21,733 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-11-03 01:52:21,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 01:52:21,990 INFO L263 TraceCheckSpWp]: Trace formula consists of 422 conjuncts, 36 conjunts are in the unsatisfiable core [2022-11-03 01:52:21,996 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 01:52:22,235 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:52:22,236 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 01:52:22,574 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:52:22,574 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [6956903] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 01:52:22,575 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 01:52:22,575 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 9, 9] total 16 [2022-11-03 01:52:22,575 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1592516064] [2022-11-03 01:52:22,575 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 01:52:22,577 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-11-03 01:52:22,577 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 01:52:22,578 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-11-03 01:52:22,579 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=195, Unknown=0, NotChecked=0, Total=240 [2022-11-03 01:52:22,581 INFO L87 Difference]: Start difference. First operand 33 states and 44 transitions. Second operand has 16 states, 16 states have (on average 3.625) internal successors, (58), 16 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:52:23,116 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 01:52:23,116 INFO L93 Difference]: Finished difference Result 100 states and 137 transitions. [2022-11-03 01:52:23,117 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-11-03 01:52:23,117 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 3.625) internal successors, (58), 16 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 28 [2022-11-03 01:52:23,117 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 01:52:23,118 INFO L225 Difference]: With dead ends: 100 [2022-11-03 01:52:23,119 INFO L226 Difference]: Without dead ends: 98 [2022-11-03 01:52:23,119 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 170 GetRequests, 144 SyntacticMatches, 4 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 100 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=142, Invalid=410, Unknown=0, NotChecked=0, Total=552 [2022-11-03 01:52:23,121 INFO L413 NwaCegarLoop]: 25 mSDtfsCounter, 279 mSDsluCounter, 288 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 279 SdHoareTripleChecker+Valid, 313 SdHoareTripleChecker+Invalid, 152 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 81 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-03 01:52:23,121 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [279 Valid, 313 Invalid, 152 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 58 Invalid, 0 Unknown, 81 Unchecked, 0.2s Time] [2022-11-03 01:52:23,122 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2022-11-03 01:52:23,130 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 54. [2022-11-03 01:52:23,131 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 54 states, 53 states have (on average 1.3773584905660377) internal successors, (73), 53 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:52:23,132 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 73 transitions. [2022-11-03 01:52:23,132 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 73 transitions. Word has length 28 [2022-11-03 01:52:23,132 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 01:52:23,132 INFO L495 AbstractCegarLoop]: Abstraction has 54 states and 73 transitions. [2022-11-03 01:52:23,133 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 3.625) internal successors, (58), 16 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:52:23,133 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 73 transitions. [2022-11-03 01:52:23,134 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-11-03 01:52:23,134 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 01:52:23,135 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 01:52:23,160 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (4)] Forceful destruction successful, exit code 0 [2022-11-03 01:52:23,376 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-11-03 01:52:23,552 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (5)] Forceful destruction successful, exit code 0 [2022-11-03 01:52:23,748 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt [2022-11-03 01:52:23,749 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 01:52:23,749 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 01:52:23,749 INFO L85 PathProgramCache]: Analyzing trace with hash -2025704289, now seen corresponding path program 1 times [2022-11-03 01:52:23,750 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 01:52:23,751 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1954759890] [2022-11-03 01:52:23,751 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 01:52:23,751 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 01:52:23,751 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 01:52:23,753 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 01:52:23,757 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (7)] Waiting until timeout for monitored process [2022-11-03 01:52:24,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 01:52:24,061 INFO L263 TraceCheckSpWp]: Trace formula consists of 422 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-03 01:52:24,065 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 01:52:24,095 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:52:24,095 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 01:52:24,095 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 01:52:24,095 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1954759890] [2022-11-03 01:52:24,096 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1954759890] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 01:52:24,096 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 01:52:24,096 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-03 01:52:24,096 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [751318424] [2022-11-03 01:52:24,097 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 01:52:24,097 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 01:52:24,097 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 01:52:24,098 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 01:52:24,098 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 01:52:24,098 INFO L87 Difference]: Start difference. First operand 54 states and 73 transitions. Second operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 4 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:52:24,173 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 01:52:24,174 INFO L93 Difference]: Finished difference Result 80 states and 109 transitions. [2022-11-03 01:52:24,174 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-03 01:52:24,175 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 4 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 28 [2022-11-03 01:52:24,175 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 01:52:24,175 INFO L225 Difference]: With dead ends: 80 [2022-11-03 01:52:24,176 INFO L226 Difference]: Without dead ends: 53 [2022-11-03 01:52:24,176 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-03 01:52:24,177 INFO L413 NwaCegarLoop]: 31 mSDtfsCounter, 58 mSDsluCounter, 60 mSDsCounter, 0 mSdLazyCounter, 22 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 58 SdHoareTripleChecker+Valid, 91 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 22 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 01:52:24,178 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [58 Valid, 91 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 22 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 01:52:24,179 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2022-11-03 01:52:24,184 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 52. [2022-11-03 01:52:24,185 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 51 states have (on average 1.3725490196078431) internal successors, (70), 51 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:52:24,185 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 70 transitions. [2022-11-03 01:52:24,186 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 70 transitions. Word has length 28 [2022-11-03 01:52:24,186 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 01:52:24,186 INFO L495 AbstractCegarLoop]: Abstraction has 52 states and 70 transitions. [2022-11-03 01:52:24,187 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 4 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:52:24,187 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 70 transitions. [2022-11-03 01:52:24,188 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2022-11-03 01:52:24,188 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 01:52:24,189 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2022-11-03 01:52:24,211 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (7)] Forceful destruction successful, exit code 0 [2022-11-03 01:52:24,411 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 01:52:24,411 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 01:52:24,412 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 01:52:24,412 INFO L85 PathProgramCache]: Analyzing trace with hash -1264431861, now seen corresponding path program 1 times [2022-11-03 01:52:24,413 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 01:52:24,414 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1911488324] [2022-11-03 01:52:24,414 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 01:52:24,414 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 01:52:24,414 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 01:52:24,416 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 01:52:24,434 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (8)] Waiting until timeout for monitored process [2022-11-03 01:52:24,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 01:52:24,850 INFO L263 TraceCheckSpWp]: Trace formula consists of 800 conjuncts, 63 conjunts are in the unsatisfiable core [2022-11-03 01:52:24,863 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 01:52:25,657 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 21 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:52:25,657 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 01:52:26,054 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 21 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:52:26,055 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 01:52:26,055 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1911488324] [2022-11-03 01:52:26,055 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1911488324] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 01:52:26,056 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [747290027] [2022-11-03 01:52:26,056 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 01:52:26,056 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 01:52:26,057 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 01:52:26,058 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 01:52:26,073 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (9)] Waiting until timeout for monitored process [2022-11-03 01:52:26,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 01:52:26,659 INFO L263 TraceCheckSpWp]: Trace formula consists of 800 conjuncts, 4 conjunts are in the unsatisfiable core [2022-11-03 01:52:26,664 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 01:52:26,712 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 24 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 01:52:26,712 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 01:52:26,713 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [747290027] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 01:52:26,713 INFO L184 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2022-11-03 01:52:26,713 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [6, 6] total 11 [2022-11-03 01:52:26,714 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [945706669] [2022-11-03 01:52:26,714 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 01:52:26,716 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-03 01:52:26,716 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 01:52:26,717 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-03 01:52:26,717 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2022-11-03 01:52:26,718 INFO L87 Difference]: Start difference. First operand 52 states and 70 transitions. Second operand has 5 states, 5 states have (on average 9.8) internal successors, (49), 5 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:52:26,904 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 01:52:26,905 INFO L93 Difference]: Finished difference Result 121 states and 167 transitions. [2022-11-03 01:52:26,905 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-03 01:52:26,905 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.8) internal successors, (49), 5 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 51 [2022-11-03 01:52:26,906 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 01:52:26,906 INFO L225 Difference]: With dead ends: 121 [2022-11-03 01:52:26,907 INFO L226 Difference]: Without dead ends: 96 [2022-11-03 01:52:26,907 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 155 GetRequests, 143 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=38, Invalid=144, Unknown=0, NotChecked=0, Total=182 [2022-11-03 01:52:26,908 INFO L413 NwaCegarLoop]: 29 mSDtfsCounter, 145 mSDsluCounter, 74 mSDsCounter, 0 mSdLazyCounter, 43 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 145 SdHoareTripleChecker+Valid, 103 SdHoareTripleChecker+Invalid, 46 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 43 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 01:52:26,908 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [145 Valid, 103 Invalid, 46 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 43 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 01:52:26,909 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states. [2022-11-03 01:52:26,922 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 54. [2022-11-03 01:52:26,922 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 54 states, 53 states have (on average 1.3584905660377358) internal successors, (72), 53 states have internal predecessors, (72), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:52:26,924 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 72 transitions. [2022-11-03 01:52:26,926 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 72 transitions. Word has length 51 [2022-11-03 01:52:26,926 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 01:52:26,927 INFO L495 AbstractCegarLoop]: Abstraction has 54 states and 72 transitions. [2022-11-03 01:52:26,928 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 9.8) internal successors, (49), 5 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:52:26,930 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 72 transitions. [2022-11-03 01:52:26,932 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2022-11-03 01:52:26,934 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 01:52:26,935 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1] [2022-11-03 01:52:26,945 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (9)] Ended with exit code 0 [2022-11-03 01:52:27,151 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (8)] Forceful destruction successful, exit code 0 [2022-11-03 01:52:27,339 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 01:52:27,339 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 01:52:27,340 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 01:52:27,340 INFO L85 PathProgramCache]: Analyzing trace with hash -1687133687, now seen corresponding path program 2 times [2022-11-03 01:52:27,341 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 01:52:27,342 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1330739423] [2022-11-03 01:52:27,342 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-03 01:52:27,342 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 01:52:27,342 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 01:52:27,344 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 01:52:27,348 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (10)] Waiting until timeout for monitored process [2022-11-03 01:52:27,749 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-03 01:52:27,749 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 01:52:27,768 INFO L263 TraceCheckSpWp]: Trace formula consists of 800 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 01:52:27,773 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 01:52:28,015 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 7 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:52:28,015 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 01:52:28,271 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 7 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:52:28,272 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 01:52:28,272 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1330739423] [2022-11-03 01:52:28,272 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1330739423] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 01:52:28,272 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [538509891] [2022-11-03 01:52:28,273 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-03 01:52:28,273 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 01:52:28,273 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 01:52:28,274 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 01:52:28,294 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (11)] Waiting until timeout for monitored process [2022-11-03 01:52:29,043 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-03 01:52:29,043 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 01:52:29,096 INFO L263 TraceCheckSpWp]: Trace formula consists of 800 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 01:52:29,100 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 01:52:29,262 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 7 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:52:29,262 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 01:52:29,413 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 7 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:52:29,413 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [538509891] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 01:52:29,413 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [813715600] [2022-11-03 01:52:29,414 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-03 01:52:29,414 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 01:52:29,414 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 01:52:29,415 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 01:52:29,448 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-11-03 01:52:29,794 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-03 01:52:29,795 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 01:52:29,803 INFO L263 TraceCheckSpWp]: Trace formula consists of 800 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-03 01:52:29,807 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 01:52:29,996 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 7 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:52:29,996 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 01:52:30,162 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 7 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:52:30,162 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [813715600] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 01:52:30,162 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 01:52:30,163 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8, 8] total 14 [2022-11-03 01:52:30,163 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1783015785] [2022-11-03 01:52:30,163 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 01:52:30,164 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-11-03 01:52:30,164 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 01:52:30,165 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-11-03 01:52:30,165 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2022-11-03 01:52:30,166 INFO L87 Difference]: Start difference. First operand 54 states and 72 transitions. Second operand has 14 states, 14 states have (on average 6.785714285714286) internal successors, (95), 14 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:52:30,263 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 01:52:30,263 INFO L93 Difference]: Finished difference Result 118 states and 162 transitions. [2022-11-03 01:52:30,263 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-03 01:52:30,264 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 6.785714285714286) internal successors, (95), 14 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 51 [2022-11-03 01:52:30,264 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 01:52:30,265 INFO L225 Difference]: With dead ends: 118 [2022-11-03 01:52:30,265 INFO L226 Difference]: Without dead ends: 91 [2022-11-03 01:52:30,266 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 302 GetRequests, 286 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=43, Invalid=197, Unknown=0, NotChecked=0, Total=240 [2022-11-03 01:52:30,267 INFO L413 NwaCegarLoop]: 51 mSDtfsCounter, 20 mSDsluCounter, 378 mSDsCounter, 0 mSdLazyCounter, 28 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 20 SdHoareTripleChecker+Valid, 429 SdHoareTripleChecker+Invalid, 83 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 28 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 55 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 01:52:30,267 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [20 Valid, 429 Invalid, 83 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 28 Invalid, 0 Unknown, 55 Unchecked, 0.0s Time] [2022-11-03 01:52:30,268 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91 states. [2022-11-03 01:52:30,275 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91 to 91. [2022-11-03 01:52:30,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 91 states, 90 states have (on average 1.3777777777777778) internal successors, (124), 90 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:52:30,276 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 124 transitions. [2022-11-03 01:52:30,277 INFO L78 Accepts]: Start accepts. Automaton has 91 states and 124 transitions. Word has length 51 [2022-11-03 01:52:30,277 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 01:52:30,277 INFO L495 AbstractCegarLoop]: Abstraction has 91 states and 124 transitions. [2022-11-03 01:52:30,278 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 6.785714285714286) internal successors, (95), 14 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:52:30,278 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 124 transitions. [2022-11-03 01:52:30,279 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2022-11-03 01:52:30,280 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 01:52:30,280 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2022-11-03 01:52:30,289 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (11)] Forceful destruction successful, exit code 0 [2022-11-03 01:52:30,516 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-11-03 01:52:30,700 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (10)] Forceful destruction successful, exit code 0 [2022-11-03 01:52:30,887 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 01:52:30,888 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 01:52:30,888 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 01:52:30,888 INFO L85 PathProgramCache]: Analyzing trace with hash 832826247, now seen corresponding path program 1 times [2022-11-03 01:52:30,889 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 01:52:30,889 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1013676786] [2022-11-03 01:52:30,889 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 01:52:30,890 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 01:52:30,890 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 01:52:30,891 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 01:52:30,898 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (13)] Waiting until timeout for monitored process [2022-11-03 01:52:31,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 01:52:31,327 INFO L263 TraceCheckSpWp]: Trace formula consists of 800 conjuncts, 75 conjunts are in the unsatisfiable core [2022-11-03 01:52:31,336 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 01:52:32,745 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:52:32,745 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 01:52:39,311 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:52:39,312 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 01:52:39,312 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1013676786] [2022-11-03 01:52:39,312 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1013676786] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 01:52:39,312 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1988422588] [2022-11-03 01:52:39,313 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 01:52:39,313 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 01:52:39,313 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 01:52:39,314 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 01:52:39,342 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (14)] Waiting until timeout for monitored process [2022-11-03 01:52:40,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 01:52:40,093 INFO L263 TraceCheckSpWp]: Trace formula consists of 800 conjuncts, 75 conjunts are in the unsatisfiable core [2022-11-03 01:52:40,101 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 01:52:40,791 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:52:40,792 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 01:54:19,377 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:54:19,377 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1988422588] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 01:54:19,377 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1781024316] [2022-11-03 01:54:19,378 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 01:54:19,378 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 01:54:19,378 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 01:54:19,386 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 01:54:19,390 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-11-03 01:54:19,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 01:54:19,720 INFO L263 TraceCheckSpWp]: Trace formula consists of 800 conjuncts, 69 conjunts are in the unsatisfiable core [2022-11-03 01:54:19,726 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 01:54:21,342 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:54:21,342 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 01:55:07,834 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:55:07,834 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1781024316] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 01:55:07,835 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 01:55:07,835 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19, 19] total 72 [2022-11-03 01:55:07,835 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1206082874] [2022-11-03 01:55:07,836 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 01:55:07,837 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 72 states [2022-11-03 01:55:07,837 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 01:55:07,838 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 72 interpolants. [2022-11-03 01:55:07,840 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=254, Invalid=4797, Unknown=61, NotChecked=0, Total=5112 [2022-11-03 01:55:07,841 INFO L87 Difference]: Start difference. First operand 91 states and 124 transitions. Second operand has 72 states, 72 states have (on average 2.513888888888889) internal successors, (181), 72 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:55:12,056 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 01:55:12,056 INFO L93 Difference]: Finished difference Result 181 states and 244 transitions. [2022-11-03 01:55:12,062 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2022-11-03 01:55:12,063 INFO L78 Accepts]: Start accepts. Automaton has has 72 states, 72 states have (on average 2.513888888888889) internal successors, (181), 72 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 51 [2022-11-03 01:55:12,066 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 01:55:12,067 INFO L225 Difference]: With dead ends: 181 [2022-11-03 01:55:12,067 INFO L226 Difference]: Without dead ends: 179 [2022-11-03 01:55:12,071 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 325 GetRequests, 229 SyntacticMatches, 6 SemanticMatches, 90 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2771 ImplicationChecksByTransitivity, 154.4s TimeCoverageRelationStatistics Valid=718, Invalid=7593, Unknown=61, NotChecked=0, Total=8372 [2022-11-03 01:55:12,075 INFO L413 NwaCegarLoop]: 22 mSDtfsCounter, 413 mSDsluCounter, 1002 mSDsCounter, 0 mSdLazyCounter, 124 mSolverCounterSat, 34 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 413 SdHoareTripleChecker+Valid, 1024 SdHoareTripleChecker+Invalid, 1301 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 34 IncrementalHoareTripleChecker+Valid, 124 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 1143 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-11-03 01:55:12,075 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [413 Valid, 1024 Invalid, 1301 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [34 Valid, 124 Invalid, 0 Unknown, 1143 Unchecked, 0.4s Time] [2022-11-03 01:55:12,080 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2022-11-03 01:55:12,104 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 143. [2022-11-03 01:55:12,105 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 143 states, 142 states have (on average 1.380281690140845) internal successors, (196), 142 states have internal predecessors, (196), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:55:12,112 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 196 transitions. [2022-11-03 01:55:12,112 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 196 transitions. Word has length 51 [2022-11-03 01:55:12,115 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 01:55:12,115 INFO L495 AbstractCegarLoop]: Abstraction has 143 states and 196 transitions. [2022-11-03 01:55:12,115 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 72 states, 72 states have (on average 2.513888888888889) internal successors, (181), 72 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:55:12,116 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 196 transitions. [2022-11-03 01:55:12,118 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2022-11-03 01:55:12,123 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 01:55:12,123 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 01:55:12,148 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (13)] Forceful destruction successful, exit code 0 [2022-11-03 01:55:12,345 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (14)] Forceful destruction successful, exit code 0 [2022-11-03 01:55:12,567 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Forceful destruction successful, exit code 0 [2022-11-03 01:55:12,739 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,15 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 01:55:12,739 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 01:55:12,739 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 01:55:12,740 INFO L85 PathProgramCache]: Analyzing trace with hash -549910261, now seen corresponding path program 1 times [2022-11-03 01:55:12,741 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 01:55:12,741 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1615924577] [2022-11-03 01:55:12,741 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 01:55:12,741 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 01:55:12,741 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 01:55:12,742 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 01:55:12,746 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (16)] Waiting until timeout for monitored process [2022-11-03 01:55:13,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 01:55:13,105 INFO L263 TraceCheckSpWp]: Trace formula consists of 800 conjuncts, 63 conjunts are in the unsatisfiable core [2022-11-03 01:55:13,109 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 01:55:13,887 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 23 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:55:13,888 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 01:55:14,361 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 23 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:55:14,361 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 01:55:14,361 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1615924577] [2022-11-03 01:55:14,362 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1615924577] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 01:55:14,362 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [719122549] [2022-11-03 01:55:14,363 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 01:55:14,363 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 01:55:14,363 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 01:55:14,365 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 01:55:14,402 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (17)] Waiting until timeout for monitored process [2022-11-03 01:55:14,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 01:55:14,858 INFO L263 TraceCheckSpWp]: Trace formula consists of 800 conjuncts, 4 conjunts are in the unsatisfiable core [2022-11-03 01:55:14,860 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 01:55:14,953 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 24 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 01:55:14,954 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 01:55:14,954 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [719122549] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 01:55:14,954 INFO L184 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2022-11-03 01:55:14,954 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [6, 6] total 13 [2022-11-03 01:55:14,955 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [879013844] [2022-11-03 01:55:14,955 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 01:55:14,955 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-03 01:55:14,955 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 01:55:14,956 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-03 01:55:14,956 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=129, Unknown=0, NotChecked=0, Total=156 [2022-11-03 01:55:14,957 INFO L87 Difference]: Start difference. First operand 143 states and 196 transitions. Second operand has 5 states, 5 states have (on average 9.8) internal successors, (49), 5 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:55:15,182 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 01:55:15,182 INFO L93 Difference]: Finished difference Result 281 states and 389 transitions. [2022-11-03 01:55:15,183 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-03 01:55:15,183 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.8) internal successors, (49), 5 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 51 [2022-11-03 01:55:15,184 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 01:55:15,186 INFO L225 Difference]: With dead ends: 281 [2022-11-03 01:55:15,186 INFO L226 Difference]: Without dead ends: 242 [2022-11-03 01:55:15,187 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 142 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=42, Invalid=198, Unknown=0, NotChecked=0, Total=240 [2022-11-03 01:55:15,188 INFO L413 NwaCegarLoop]: 69 mSDtfsCounter, 85 mSDsluCounter, 76 mSDsCounter, 0 mSdLazyCounter, 67 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 85 SdHoareTripleChecker+Valid, 145 SdHoareTripleChecker+Invalid, 68 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 67 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 01:55:15,188 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [85 Valid, 145 Invalid, 68 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 67 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 01:55:15,189 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 242 states. [2022-11-03 01:55:15,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 242 to 147. [2022-11-03 01:55:15,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 147 states, 146 states have (on average 1.36986301369863) internal successors, (200), 146 states have internal predecessors, (200), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:55:15,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 200 transitions. [2022-11-03 01:55:15,202 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 200 transitions. Word has length 51 [2022-11-03 01:55:15,203 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 01:55:15,203 INFO L495 AbstractCegarLoop]: Abstraction has 147 states and 200 transitions. [2022-11-03 01:55:15,203 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 9.8) internal successors, (49), 5 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:55:15,203 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 200 transitions. [2022-11-03 01:55:15,204 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2022-11-03 01:55:15,205 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 01:55:15,205 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 01:55:15,214 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (17)] Forceful destruction successful, exit code 0 [2022-11-03 01:55:15,420 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (16)] Ended with exit code 0 [2022-11-03 01:55:15,609 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,16 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 01:55:15,609 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 01:55:15,609 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 01:55:15,609 INFO L85 PathProgramCache]: Analyzing trace with hash 2056113293, now seen corresponding path program 1 times [2022-11-03 01:55:15,610 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 01:55:15,610 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [241268191] [2022-11-03 01:55:15,610 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 01:55:15,611 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 01:55:15,611 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 01:55:15,612 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 01:55:15,614 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (18)] Waiting until timeout for monitored process [2022-11-03 01:55:15,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 01:55:15,936 INFO L263 TraceCheckSpWp]: Trace formula consists of 800 conjuncts, 63 conjunts are in the unsatisfiable core [2022-11-03 01:55:15,943 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 01:55:16,699 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 23 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:55:16,700 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 01:55:17,080 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 23 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:55:17,080 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 01:55:17,080 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [241268191] [2022-11-03 01:55:17,081 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [241268191] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 01:55:17,081 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1099010539] [2022-11-03 01:55:17,081 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 01:55:17,081 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 01:55:17,081 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 01:55:17,082 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 01:55:17,084 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (19)] Waiting until timeout for monitored process [2022-11-03 01:55:17,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 01:55:17,602 INFO L263 TraceCheckSpWp]: Trace formula consists of 800 conjuncts, 4 conjunts are in the unsatisfiable core [2022-11-03 01:55:17,605 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 01:55:17,701 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 24 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 01:55:17,701 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 01:55:17,702 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1099010539] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 01:55:17,702 INFO L184 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2022-11-03 01:55:17,702 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [6, 6] total 13 [2022-11-03 01:55:17,702 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [788198589] [2022-11-03 01:55:17,703 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 01:55:17,703 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-03 01:55:17,703 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 01:55:17,704 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-03 01:55:17,704 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=129, Unknown=0, NotChecked=0, Total=156 [2022-11-03 01:55:17,704 INFO L87 Difference]: Start difference. First operand 147 states and 200 transitions. Second operand has 5 states, 5 states have (on average 9.8) internal successors, (49), 5 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:55:17,930 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 01:55:17,930 INFO L93 Difference]: Finished difference Result 344 states and 469 transitions. [2022-11-03 01:55:17,930 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-03 01:55:17,931 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.8) internal successors, (49), 5 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 51 [2022-11-03 01:55:17,931 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 01:55:17,933 INFO L225 Difference]: With dead ends: 344 [2022-11-03 01:55:17,933 INFO L226 Difference]: Without dead ends: 305 [2022-11-03 01:55:17,933 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 142 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=42, Invalid=198, Unknown=0, NotChecked=0, Total=240 [2022-11-03 01:55:17,934 INFO L413 NwaCegarLoop]: 69 mSDtfsCounter, 82 mSDsluCounter, 77 mSDsCounter, 0 mSdLazyCounter, 69 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 82 SdHoareTripleChecker+Valid, 146 SdHoareTripleChecker+Invalid, 70 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 69 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 01:55:17,935 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [82 Valid, 146 Invalid, 70 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 69 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 01:55:17,936 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 305 states. [2022-11-03 01:55:17,949 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 305 to 151. [2022-11-03 01:55:17,958 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 151 states, 150 states have (on average 1.36) internal successors, (204), 150 states have internal predecessors, (204), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:55:17,959 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 204 transitions. [2022-11-03 01:55:17,962 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 204 transitions. Word has length 51 [2022-11-03 01:55:17,966 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 01:55:17,967 INFO L495 AbstractCegarLoop]: Abstraction has 151 states and 204 transitions. [2022-11-03 01:55:17,967 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 9.8) internal successors, (49), 5 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:55:17,967 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 204 transitions. [2022-11-03 01:55:17,968 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2022-11-03 01:55:17,968 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 01:55:17,969 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 01:55:17,986 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (18)] Forceful destruction successful, exit code 0 [2022-11-03 01:55:18,178 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (19)] Forceful destruction successful, exit code 0 [2022-11-03 01:55:18,375 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 18 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,19 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt [2022-11-03 01:55:18,375 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 01:55:18,375 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 01:55:18,375 INFO L85 PathProgramCache]: Analyzing trace with hash 467765391, now seen corresponding path program 1 times [2022-11-03 01:55:18,376 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 01:55:18,377 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1305550986] [2022-11-03 01:55:18,377 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 01:55:18,377 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 01:55:18,377 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 01:55:18,379 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 01:55:18,398 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (20)] Waiting until timeout for monitored process [2022-11-03 01:55:18,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 01:55:18,787 INFO L263 TraceCheckSpWp]: Trace formula consists of 800 conjuncts, 63 conjunts are in the unsatisfiable core [2022-11-03 01:55:18,791 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 01:55:19,458 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 23 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:55:19,458 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 01:55:19,824 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 23 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:55:19,824 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 01:55:19,825 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1305550986] [2022-11-03 01:55:19,825 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1305550986] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 01:55:19,825 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1114865701] [2022-11-03 01:55:19,825 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 01:55:19,825 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 01:55:19,825 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 01:55:19,826 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 01:55:19,829 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (21)] Waiting until timeout for monitored process [2022-11-03 01:55:20,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 01:55:20,374 INFO L263 TraceCheckSpWp]: Trace formula consists of 800 conjuncts, 4 conjunts are in the unsatisfiable core [2022-11-03 01:55:20,376 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 01:55:20,496 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 24 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 01:55:20,496 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 01:55:20,496 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1114865701] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 01:55:20,497 INFO L184 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2022-11-03 01:55:20,497 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [6, 6] total 13 [2022-11-03 01:55:20,497 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1594269080] [2022-11-03 01:55:20,497 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 01:55:20,498 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-03 01:55:20,498 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 01:55:20,498 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-03 01:55:20,499 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=129, Unknown=0, NotChecked=0, Total=156 [2022-11-03 01:55:20,499 INFO L87 Difference]: Start difference. First operand 151 states and 204 transitions. Second operand has 5 states, 5 states have (on average 9.8) internal successors, (49), 5 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:55:20,742 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 01:55:20,742 INFO L93 Difference]: Finished difference Result 344 states and 464 transitions. [2022-11-03 01:55:20,743 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-03 01:55:20,743 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.8) internal successors, (49), 5 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 51 [2022-11-03 01:55:20,744 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 01:55:20,745 INFO L225 Difference]: With dead ends: 344 [2022-11-03 01:55:20,745 INFO L226 Difference]: Without dead ends: 305 [2022-11-03 01:55:20,746 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 142 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=42, Invalid=198, Unknown=0, NotChecked=0, Total=240 [2022-11-03 01:55:20,747 INFO L413 NwaCegarLoop]: 69 mSDtfsCounter, 79 mSDsluCounter, 78 mSDsCounter, 0 mSdLazyCounter, 71 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 79 SdHoareTripleChecker+Valid, 147 SdHoareTripleChecker+Invalid, 72 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 71 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-03 01:55:20,748 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [79 Valid, 147 Invalid, 72 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 71 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-03 01:55:20,749 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 305 states. [2022-11-03 01:55:20,759 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 305 to 155. [2022-11-03 01:55:20,759 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 155 states, 154 states have (on average 1.3506493506493507) internal successors, (208), 154 states have internal predecessors, (208), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:55:20,760 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 208 transitions. [2022-11-03 01:55:20,761 INFO L78 Accepts]: Start accepts. Automaton has 155 states and 208 transitions. Word has length 51 [2022-11-03 01:55:20,761 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 01:55:20,761 INFO L495 AbstractCegarLoop]: Abstraction has 155 states and 208 transitions. [2022-11-03 01:55:20,761 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 9.8) internal successors, (49), 5 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:55:20,762 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 208 transitions. [2022-11-03 01:55:20,762 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2022-11-03 01:55:20,763 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 01:55:20,763 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 01:55:20,786 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (20)] Forceful destruction successful, exit code 0 [2022-11-03 01:55:20,986 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (21)] Forceful destruction successful, exit code 0 [2022-11-03 01:55:21,182 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 20 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,21 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt [2022-11-03 01:55:21,183 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 01:55:21,183 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 01:55:21,183 INFO L85 PathProgramCache]: Analyzing trace with hash -812098287, now seen corresponding path program 1 times [2022-11-03 01:55:21,184 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 01:55:21,185 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [709211396] [2022-11-03 01:55:21,185 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 01:55:21,185 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 01:55:21,185 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 01:55:21,186 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 01:55:21,188 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (22)] Waiting until timeout for monitored process [2022-11-03 01:55:21,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 01:55:21,539 INFO L263 TraceCheckSpWp]: Trace formula consists of 800 conjuncts, 63 conjunts are in the unsatisfiable core [2022-11-03 01:55:21,543 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 01:55:22,327 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 23 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:55:22,327 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 01:55:22,703 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 23 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:55:22,703 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 01:55:22,703 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [709211396] [2022-11-03 01:55:22,703 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [709211396] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 01:55:22,703 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1511577420] [2022-11-03 01:55:22,703 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 01:55:22,703 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 01:55:22,704 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 01:55:22,704 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 01:55:22,706 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (23)] Waiting until timeout for monitored process [2022-11-03 01:55:23,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 01:55:23,218 INFO L263 TraceCheckSpWp]: Trace formula consists of 800 conjuncts, 4 conjunts are in the unsatisfiable core [2022-11-03 01:55:23,221 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 01:55:23,327 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 24 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 01:55:23,328 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 01:55:23,328 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1511577420] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 01:55:23,328 INFO L184 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2022-11-03 01:55:23,328 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [6, 6] total 13 [2022-11-03 01:55:23,328 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1630487263] [2022-11-03 01:55:23,328 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 01:55:23,329 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-03 01:55:23,329 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 01:55:23,329 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-03 01:55:23,330 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=129, Unknown=0, NotChecked=0, Total=156 [2022-11-03 01:55:23,330 INFO L87 Difference]: Start difference. First operand 155 states and 208 transitions. Second operand has 5 states, 5 states have (on average 9.8) internal successors, (49), 5 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:55:23,554 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 01:55:23,555 INFO L93 Difference]: Finished difference Result 294 states and 390 transitions. [2022-11-03 01:55:23,555 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-03 01:55:23,555 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.8) internal successors, (49), 5 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 51 [2022-11-03 01:55:23,556 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 01:55:23,556 INFO L225 Difference]: With dead ends: 294 [2022-11-03 01:55:23,557 INFO L226 Difference]: Without dead ends: 255 [2022-11-03 01:55:23,557 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 142 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=42, Invalid=198, Unknown=0, NotChecked=0, Total=240 [2022-11-03 01:55:23,558 INFO L413 NwaCegarLoop]: 69 mSDtfsCounter, 76 mSDsluCounter, 79 mSDsCounter, 0 mSdLazyCounter, 73 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 76 SdHoareTripleChecker+Valid, 148 SdHoareTripleChecker+Invalid, 74 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 73 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 01:55:23,558 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [76 Valid, 148 Invalid, 74 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 73 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 01:55:23,559 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 255 states. [2022-11-03 01:55:23,569 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 255 to 159. [2022-11-03 01:55:23,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 159 states, 158 states have (on average 1.3417721518987342) internal successors, (212), 158 states have internal predecessors, (212), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:55:23,571 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 212 transitions. [2022-11-03 01:55:23,571 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 212 transitions. Word has length 51 [2022-11-03 01:55:23,571 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 01:55:23,572 INFO L495 AbstractCegarLoop]: Abstraction has 159 states and 212 transitions. [2022-11-03 01:55:23,572 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 9.8) internal successors, (49), 5 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:55:23,572 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 212 transitions. [2022-11-03 01:55:23,573 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2022-11-03 01:55:23,573 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 01:55:23,574 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 01:55:23,593 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (22)] Forceful destruction successful, exit code 0 [2022-11-03 01:55:23,790 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (23)] Forceful destruction successful, exit code 0 [2022-11-03 01:55:23,986 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 22 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,23 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt [2022-11-03 01:55:23,987 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 01:55:23,987 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 01:55:23,987 INFO L85 PathProgramCache]: Analyzing trace with hash -1398904301, now seen corresponding path program 1 times [2022-11-03 01:55:23,988 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 01:55:23,988 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1421358911] [2022-11-03 01:55:23,988 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 01:55:23,989 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 01:55:23,989 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 01:55:23,990 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 01:55:24,000 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (24)] Waiting until timeout for monitored process [2022-11-03 01:55:24,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 01:55:24,340 INFO L263 TraceCheckSpWp]: Trace formula consists of 800 conjuncts, 63 conjunts are in the unsatisfiable core [2022-11-03 01:55:24,344 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 01:55:25,027 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 23 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:55:25,028 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 01:55:25,431 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 23 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:55:25,432 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 01:55:25,432 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1421358911] [2022-11-03 01:55:25,432 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1421358911] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 01:55:25,432 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1452032090] [2022-11-03 01:55:25,432 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 01:55:25,433 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 01:55:25,433 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 01:55:25,434 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 01:55:25,443 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (25)] Waiting until timeout for monitored process [2022-11-03 01:55:25,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 01:55:25,964 INFO L263 TraceCheckSpWp]: Trace formula consists of 800 conjuncts, 4 conjunts are in the unsatisfiable core [2022-11-03 01:55:25,967 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 01:55:26,096 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 24 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 01:55:26,096 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 01:55:26,096 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1452032090] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 01:55:26,096 INFO L184 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2022-11-03 01:55:26,097 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [6, 6] total 13 [2022-11-03 01:55:26,097 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1406008696] [2022-11-03 01:55:26,097 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 01:55:26,097 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-03 01:55:26,097 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 01:55:26,098 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-03 01:55:26,098 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=129, Unknown=0, NotChecked=0, Total=156 [2022-11-03 01:55:26,098 INFO L87 Difference]: Start difference. First operand 159 states and 212 transitions. Second operand has 5 states, 5 states have (on average 9.8) internal successors, (49), 5 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:55:26,340 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 01:55:26,340 INFO L93 Difference]: Finished difference Result 342 states and 451 transitions. [2022-11-03 01:55:26,341 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-03 01:55:26,341 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.8) internal successors, (49), 5 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 51 [2022-11-03 01:55:26,341 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 01:55:26,343 INFO L225 Difference]: With dead ends: 342 [2022-11-03 01:55:26,343 INFO L226 Difference]: Without dead ends: 303 [2022-11-03 01:55:26,343 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 142 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=42, Invalid=198, Unknown=0, NotChecked=0, Total=240 [2022-11-03 01:55:26,344 INFO L413 NwaCegarLoop]: 69 mSDtfsCounter, 73 mSDsluCounter, 80 mSDsCounter, 0 mSdLazyCounter, 75 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 73 SdHoareTripleChecker+Valid, 149 SdHoareTripleChecker+Invalid, 76 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 75 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-03 01:55:26,344 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [73 Valid, 149 Invalid, 76 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 75 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-03 01:55:26,345 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 303 states. [2022-11-03 01:55:26,366 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 303 to 163. [2022-11-03 01:55:26,367 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 163 states, 162 states have (on average 1.3333333333333333) internal successors, (216), 162 states have internal predecessors, (216), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:55:26,368 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 216 transitions. [2022-11-03 01:55:26,369 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 216 transitions. Word has length 51 [2022-11-03 01:55:26,369 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 01:55:26,369 INFO L495 AbstractCegarLoop]: Abstraction has 163 states and 216 transitions. [2022-11-03 01:55:26,370 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 9.8) internal successors, (49), 5 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:55:26,370 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 216 transitions. [2022-11-03 01:55:26,371 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2022-11-03 01:55:26,372 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 01:55:26,372 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 01:55:26,390 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (24)] Forceful destruction successful, exit code 0 [2022-11-03 01:55:26,600 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (25)] Forceful destruction successful, exit code 0 [2022-11-03 01:55:26,790 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 24 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,25 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt [2022-11-03 01:55:26,790 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 01:55:26,790 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 01:55:26,791 INFO L85 PathProgramCache]: Analyzing trace with hash -697839723, now seen corresponding path program 1 times [2022-11-03 01:55:26,791 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 01:55:26,791 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [656833107] [2022-11-03 01:55:26,791 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 01:55:26,792 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 01:55:26,792 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 01:55:26,793 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 01:55:26,794 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (26)] Waiting until timeout for monitored process [2022-11-03 01:55:27,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 01:55:27,126 INFO L263 TraceCheckSpWp]: Trace formula consists of 800 conjuncts, 63 conjunts are in the unsatisfiable core [2022-11-03 01:55:27,131 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 01:55:27,830 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 23 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:55:27,831 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 01:55:28,186 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 23 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:55:28,187 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 01:55:28,187 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [656833107] [2022-11-03 01:55:28,187 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [656833107] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 01:55:28,187 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1984237885] [2022-11-03 01:55:28,187 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 01:55:28,188 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 01:55:28,188 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 01:55:28,191 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 01:55:28,216 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (27)] Waiting until timeout for monitored process [2022-11-03 01:55:28,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 01:55:28,724 INFO L263 TraceCheckSpWp]: Trace formula consists of 800 conjuncts, 4 conjunts are in the unsatisfiable core [2022-11-03 01:55:28,727 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 01:55:28,850 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 24 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 01:55:28,851 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 01:55:28,851 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1984237885] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 01:55:28,851 INFO L184 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2022-11-03 01:55:28,851 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [6, 6] total 13 [2022-11-03 01:55:28,852 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [376976783] [2022-11-03 01:55:28,852 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 01:55:28,852 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-03 01:55:28,852 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 01:55:28,853 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-03 01:55:28,853 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=129, Unknown=0, NotChecked=0, Total=156 [2022-11-03 01:55:28,853 INFO L87 Difference]: Start difference. First operand 163 states and 216 transitions. Second operand has 5 states, 5 states have (on average 9.8) internal successors, (49), 5 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:55:29,079 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 01:55:29,079 INFO L93 Difference]: Finished difference Result 292 states and 379 transitions. [2022-11-03 01:55:29,079 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-03 01:55:29,080 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.8) internal successors, (49), 5 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 51 [2022-11-03 01:55:29,080 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 01:55:29,081 INFO L225 Difference]: With dead ends: 292 [2022-11-03 01:55:29,081 INFO L226 Difference]: Without dead ends: 255 [2022-11-03 01:55:29,082 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 142 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=42, Invalid=198, Unknown=0, NotChecked=0, Total=240 [2022-11-03 01:55:29,082 INFO L413 NwaCegarLoop]: 75 mSDtfsCounter, 66 mSDsluCounter, 87 mSDsCounter, 0 mSdLazyCounter, 77 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 66 SdHoareTripleChecker+Valid, 162 SdHoareTripleChecker+Invalid, 78 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 77 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 01:55:29,083 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [66 Valid, 162 Invalid, 78 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 77 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 01:55:29,084 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 255 states. [2022-11-03 01:55:29,097 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 255 to 173. [2022-11-03 01:55:29,098 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 173 states, 172 states have (on average 1.3313953488372092) internal successors, (229), 172 states have internal predecessors, (229), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:55:29,099 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173 states to 173 states and 229 transitions. [2022-11-03 01:55:29,099 INFO L78 Accepts]: Start accepts. Automaton has 173 states and 229 transitions. Word has length 51 [2022-11-03 01:55:29,100 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 01:55:29,100 INFO L495 AbstractCegarLoop]: Abstraction has 173 states and 229 transitions. [2022-11-03 01:55:29,100 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 9.8) internal successors, (49), 5 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:55:29,100 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 229 transitions. [2022-11-03 01:55:29,101 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2022-11-03 01:55:29,101 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 01:55:29,102 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 01:55:29,107 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (27)] Ended with exit code 0 [2022-11-03 01:55:29,317 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (26)] Forceful destruction successful, exit code 0 [2022-11-03 01:55:29,505 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 27 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,26 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 01:55:29,506 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 01:55:29,506 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 01:55:29,506 INFO L85 PathProgramCache]: Analyzing trace with hash -695992681, now seen corresponding path program 1 times [2022-11-03 01:55:29,507 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 01:55:29,507 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1359556407] [2022-11-03 01:55:29,507 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 01:55:29,507 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 01:55:29,507 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 01:55:29,508 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 01:55:29,512 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (28)] Waiting until timeout for monitored process [2022-11-03 01:55:29,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 01:55:29,813 INFO L263 TraceCheckSpWp]: Trace formula consists of 800 conjuncts, 63 conjunts are in the unsatisfiable core [2022-11-03 01:55:29,817 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 01:55:30,495 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 23 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:55:30,495 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 01:55:30,848 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 23 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:55:30,848 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 01:55:30,848 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1359556407] [2022-11-03 01:55:30,848 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1359556407] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 01:55:30,848 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [2114749038] [2022-11-03 01:55:30,849 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 01:55:30,849 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 01:55:30,849 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 01:55:30,850 INFO L229 MonitoredProcess]: Starting monitored process 29 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 01:55:30,852 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (29)] Waiting until timeout for monitored process [2022-11-03 01:55:31,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 01:55:31,495 INFO L263 TraceCheckSpWp]: Trace formula consists of 800 conjuncts, 63 conjunts are in the unsatisfiable core [2022-11-03 01:55:31,499 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 01:55:32,091 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 23 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:55:32,091 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 01:55:32,474 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 23 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:55:32,474 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [2114749038] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 01:55:32,474 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [953151959] [2022-11-03 01:55:32,475 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 01:55:32,475 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 01:55:32,475 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 01:55:32,477 INFO L229 MonitoredProcess]: Starting monitored process 30 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 01:55:32,511 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Waiting until timeout for monitored process [2022-11-03 01:55:32,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 01:55:32,788 INFO L263 TraceCheckSpWp]: Trace formula consists of 800 conjuncts, 31 conjunts are in the unsatisfiable core [2022-11-03 01:55:32,791 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 01:55:33,760 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 01:55:33,760 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 01:55:35,203 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 01:55:35,203 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [953151959] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 01:55:35,204 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 01:55:35,204 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 10, 10] total 26 [2022-11-03 01:55:35,204 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [201637813] [2022-11-03 01:55:35,204 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 01:55:35,205 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-11-03 01:55:35,205 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 01:55:35,206 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-11-03 01:55:35,206 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=70, Invalid=580, Unknown=0, NotChecked=0, Total=650 [2022-11-03 01:55:35,207 INFO L87 Difference]: Start difference. First operand 173 states and 229 transitions. Second operand has 26 states, 26 states have (on average 6.8076923076923075) internal successors, (177), 26 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:55:37,467 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 01:55:37,467 INFO L93 Difference]: Finished difference Result 265 states and 352 transitions. [2022-11-03 01:55:37,470 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2022-11-03 01:55:37,470 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 6.8076923076923075) internal successors, (177), 26 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 51 [2022-11-03 01:55:37,470 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 01:55:37,472 INFO L225 Difference]: With dead ends: 265 [2022-11-03 01:55:37,472 INFO L226 Difference]: Without dead ends: 206 [2022-11-03 01:55:37,473 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 323 GetRequests, 274 SyntacticMatches, 5 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 336 ImplicationChecksByTransitivity, 3.7s TimeCoverageRelationStatistics Valid=353, Invalid=1717, Unknown=0, NotChecked=0, Total=2070 [2022-11-03 01:55:37,474 INFO L413 NwaCegarLoop]: 38 mSDtfsCounter, 532 mSDsluCounter, 710 mSDsCounter, 0 mSdLazyCounter, 97 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 532 SdHoareTripleChecker+Valid, 748 SdHoareTripleChecker+Invalid, 267 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 97 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 168 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-03 01:55:37,474 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [532 Valid, 748 Invalid, 267 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 97 Invalid, 0 Unknown, 168 Unchecked, 0.3s Time] [2022-11-03 01:55:37,475 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206 states. [2022-11-03 01:55:37,486 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206 to 170. [2022-11-03 01:55:37,486 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 170 states, 169 states have (on average 1.331360946745562) internal successors, (225), 169 states have internal predecessors, (225), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:55:37,487 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 170 states to 170 states and 225 transitions. [2022-11-03 01:55:37,487 INFO L78 Accepts]: Start accepts. Automaton has 170 states and 225 transitions. Word has length 51 [2022-11-03 01:55:37,487 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 01:55:37,487 INFO L495 AbstractCegarLoop]: Abstraction has 170 states and 225 transitions. [2022-11-03 01:55:37,488 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 6.8076923076923075) internal successors, (177), 26 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:55:37,488 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 225 transitions. [2022-11-03 01:55:37,489 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2022-11-03 01:55:37,489 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 01:55:37,489 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 01:55:37,520 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Forceful destruction successful, exit code 0 [2022-11-03 01:55:37,702 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (28)] Ended with exit code 0 [2022-11-03 01:55:37,899 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (29)] Ended with exit code 0 [2022-11-03 01:55:38,090 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 30 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,28 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,29 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt [2022-11-03 01:55:38,090 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 01:55:38,091 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 01:55:38,091 INFO L85 PathProgramCache]: Analyzing trace with hash 323353157, now seen corresponding path program 1 times [2022-11-03 01:55:38,091 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 01:55:38,091 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [574757554] [2022-11-03 01:55:38,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 01:55:38,091 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 01:55:38,092 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 01:55:38,092 INFO L229 MonitoredProcess]: Starting monitored process 31 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 01:55:38,094 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (31)] Waiting until timeout for monitored process [2022-11-03 01:55:38,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 01:55:38,389 INFO L263 TraceCheckSpWp]: Trace formula consists of 800 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-03 01:55:38,391 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 01:55:38,449 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 24 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 01:55:38,449 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 01:55:38,450 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 01:55:38,450 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [574757554] [2022-11-03 01:55:38,450 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [574757554] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 01:55:38,450 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 01:55:38,450 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-03 01:55:38,451 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1394706466] [2022-11-03 01:55:38,451 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 01:55:38,451 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 01:55:38,451 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 01:55:38,452 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 01:55:38,452 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 01:55:38,452 INFO L87 Difference]: Start difference. First operand 170 states and 225 transitions. Second operand has 4 states, 4 states have (on average 12.25) internal successors, (49), 4 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:55:38,540 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 01:55:38,540 INFO L93 Difference]: Finished difference Result 259 states and 339 transitions. [2022-11-03 01:55:38,541 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-03 01:55:38,541 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 12.25) internal successors, (49), 4 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 51 [2022-11-03 01:55:38,541 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 01:55:38,542 INFO L225 Difference]: With dead ends: 259 [2022-11-03 01:55:38,542 INFO L226 Difference]: Without dead ends: 187 [2022-11-03 01:55:38,543 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 48 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-03 01:55:38,543 INFO L413 NwaCegarLoop]: 56 mSDtfsCounter, 38 mSDsluCounter, 53 mSDsCounter, 0 mSdLazyCounter, 29 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 38 SdHoareTripleChecker+Valid, 109 SdHoareTripleChecker+Invalid, 29 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 29 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 01:55:38,544 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [38 Valid, 109 Invalid, 29 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 29 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 01:55:38,544 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187 states. [2022-11-03 01:55:38,552 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187 to 170. [2022-11-03 01:55:38,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 170 states, 169 states have (on average 1.3076923076923077) internal successors, (221), 169 states have internal predecessors, (221), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:55:38,553 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 170 states to 170 states and 221 transitions. [2022-11-03 01:55:38,553 INFO L78 Accepts]: Start accepts. Automaton has 170 states and 221 transitions. Word has length 51 [2022-11-03 01:55:38,553 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 01:55:38,553 INFO L495 AbstractCegarLoop]: Abstraction has 170 states and 221 transitions. [2022-11-03 01:55:38,554 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 12.25) internal successors, (49), 4 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:55:38,554 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 221 transitions. [2022-11-03 01:55:38,554 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2022-11-03 01:55:38,554 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 01:55:38,555 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1] [2022-11-03 01:55:38,567 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (31)] Forceful destruction successful, exit code 0 [2022-11-03 01:55:38,758 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 31 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 01:55:38,758 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 01:55:38,759 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 01:55:38,759 INFO L85 PathProgramCache]: Analyzing trace with hash 810193993, now seen corresponding path program 1 times [2022-11-03 01:55:38,759 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 01:55:38,760 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1059666027] [2022-11-03 01:55:38,760 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 01:55:38,760 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 01:55:38,760 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 01:55:38,761 INFO L229 MonitoredProcess]: Starting monitored process 32 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 01:55:38,762 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (32)] Waiting until timeout for monitored process [2022-11-03 01:55:39,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 01:55:39,069 INFO L263 TraceCheckSpWp]: Trace formula consists of 800 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-03 01:55:39,072 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 01:55:39,136 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2022-11-03 01:55:39,136 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 01:55:39,136 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 01:55:39,137 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1059666027] [2022-11-03 01:55:39,137 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1059666027] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 01:55:39,137 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 01:55:39,137 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-03 01:55:39,137 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1311314728] [2022-11-03 01:55:39,137 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 01:55:39,137 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 01:55:39,138 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 01:55:39,138 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 01:55:39,138 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 01:55:39,138 INFO L87 Difference]: Start difference. First operand 170 states and 221 transitions. Second operand has 4 states, 4 states have (on average 11.75) internal successors, (47), 4 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:55:39,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 01:55:39,245 INFO L93 Difference]: Finished difference Result 292 states and 372 transitions. [2022-11-03 01:55:39,245 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-03 01:55:39,245 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 11.75) internal successors, (47), 4 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 51 [2022-11-03 01:55:39,245 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 01:55:39,246 INFO L225 Difference]: With dead ends: 292 [2022-11-03 01:55:39,246 INFO L226 Difference]: Without dead ends: 216 [2022-11-03 01:55:39,247 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 48 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-03 01:55:39,248 INFO L413 NwaCegarLoop]: 61 mSDtfsCounter, 46 mSDsluCounter, 66 mSDsCounter, 0 mSdLazyCounter, 19 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 46 SdHoareTripleChecker+Valid, 127 SdHoareTripleChecker+Invalid, 20 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 19 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 01:55:39,248 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [46 Valid, 127 Invalid, 20 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 19 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 01:55:39,249 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216 states. [2022-11-03 01:55:39,258 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216 to 170. [2022-11-03 01:55:39,258 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 170 states, 169 states have (on average 1.2840236686390532) internal successors, (217), 169 states have internal predecessors, (217), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:55:39,259 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 170 states to 170 states and 217 transitions. [2022-11-03 01:55:39,259 INFO L78 Accepts]: Start accepts. Automaton has 170 states and 217 transitions. Word has length 51 [2022-11-03 01:55:39,259 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 01:55:39,259 INFO L495 AbstractCegarLoop]: Abstraction has 170 states and 217 transitions. [2022-11-03 01:55:39,259 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 11.75) internal successors, (47), 4 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:55:39,260 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 217 transitions. [2022-11-03 01:55:39,260 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2022-11-03 01:55:39,260 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 01:55:39,261 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 01:55:39,275 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (32)] Forceful destruction successful, exit code 0 [2022-11-03 01:55:39,470 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 32 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 01:55:39,470 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 01:55:39,471 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 01:55:39,471 INFO L85 PathProgramCache]: Analyzing trace with hash 438459461, now seen corresponding path program 1 times [2022-11-03 01:55:39,471 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 01:55:39,471 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1048691670] [2022-11-03 01:55:39,471 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 01:55:39,472 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 01:55:39,472 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 01:55:39,478 INFO L229 MonitoredProcess]: Starting monitored process 33 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 01:55:39,480 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (33)] Waiting until timeout for monitored process [2022-11-03 01:55:39,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 01:55:39,800 INFO L263 TraceCheckSpWp]: Trace formula consists of 800 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-03 01:55:39,802 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 01:55:39,845 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 16 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2022-11-03 01:55:39,846 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 01:55:39,846 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 01:55:39,846 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1048691670] [2022-11-03 01:55:39,846 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1048691670] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 01:55:39,846 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 01:55:39,846 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-03 01:55:39,847 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1811337004] [2022-11-03 01:55:39,847 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 01:55:39,847 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 01:55:39,847 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 01:55:39,848 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 01:55:39,848 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 01:55:39,848 INFO L87 Difference]: Start difference. First operand 170 states and 217 transitions. Second operand has 4 states, 4 states have (on average 10.5) internal successors, (42), 4 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:55:39,927 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 01:55:39,927 INFO L93 Difference]: Finished difference Result 216 states and 275 transitions. [2022-11-03 01:55:39,928 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-03 01:55:39,928 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 10.5) internal successors, (42), 4 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 51 [2022-11-03 01:55:39,928 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 01:55:39,929 INFO L225 Difference]: With dead ends: 216 [2022-11-03 01:55:39,929 INFO L226 Difference]: Without dead ends: 128 [2022-11-03 01:55:39,930 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 48 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-03 01:55:39,931 INFO L413 NwaCegarLoop]: 44 mSDtfsCounter, 42 mSDsluCounter, 55 mSDsCounter, 0 mSdLazyCounter, 27 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 42 SdHoareTripleChecker+Valid, 99 SdHoareTripleChecker+Invalid, 27 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 27 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 01:55:39,931 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [42 Valid, 99 Invalid, 27 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 27 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 01:55:39,932 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2022-11-03 01:55:39,941 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 128. [2022-11-03 01:55:39,941 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 128 states, 127 states have (on average 1.2834645669291338) internal successors, (163), 127 states have internal predecessors, (163), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:55:39,942 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 163 transitions. [2022-11-03 01:55:39,942 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 163 transitions. Word has length 51 [2022-11-03 01:55:39,942 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 01:55:39,943 INFO L495 AbstractCegarLoop]: Abstraction has 128 states and 163 transitions. [2022-11-03 01:55:39,943 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 10.5) internal successors, (42), 4 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:55:39,943 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 163 transitions. [2022-11-03 01:55:39,944 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2022-11-03 01:55:39,944 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 01:55:39,944 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1] [2022-11-03 01:55:39,959 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (33)] Forceful destruction successful, exit code 0 [2022-11-03 01:55:40,150 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 33 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 01:55:40,150 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 01:55:40,151 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 01:55:40,151 INFO L85 PathProgramCache]: Analyzing trace with hash -1009090209, now seen corresponding path program 2 times [2022-11-03 01:55:40,152 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 01:55:40,152 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [2145940866] [2022-11-03 01:55:40,152 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-03 01:55:40,152 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 01:55:40,153 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 01:55:40,153 INFO L229 MonitoredProcess]: Starting monitored process 34 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 01:55:40,155 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (34)] Waiting until timeout for monitored process [2022-11-03 01:55:40,552 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-03 01:55:40,552 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 01:55:40,573 INFO L263 TraceCheckSpWp]: Trace formula consists of 1178 conjuncts, 119 conjunts are in the unsatisfiable core [2022-11-03 01:55:40,578 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 01:55:44,396 INFO L134 CoverageAnalysis]: Checked inductivity of 75 backedges. 0 proven. 75 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:55:44,396 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 01:57:01,138 INFO L134 CoverageAnalysis]: Checked inductivity of 75 backedges. 0 proven. 75 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:57:01,138 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 01:57:01,138 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [2145940866] [2022-11-03 01:57:01,138 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [2145940866] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 01:57:01,139 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1491220713] [2022-11-03 01:57:01,139 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-03 01:57:01,139 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 01:57:01,139 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 01:57:01,141 INFO L229 MonitoredProcess]: Starting monitored process 35 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 01:57:01,142 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (35)] Waiting until timeout for monitored process [2022-11-03 01:57:01,985 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-03 01:57:01,985 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 01:57:02,028 INFO L263 TraceCheckSpWp]: Trace formula consists of 1178 conjuncts, 119 conjunts are in the unsatisfiable core [2022-11-03 01:57:02,037 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 01:57:03,535 INFO L134 CoverageAnalysis]: Checked inductivity of 75 backedges. 0 proven. 75 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:57:03,536 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:01:44,039 INFO L134 CoverageAnalysis]: Checked inductivity of 75 backedges. 0 proven. 75 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:01:44,039 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1491220713] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:01:44,040 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [528981968] [2022-11-03 02:01:44,040 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-03 02:01:44,040 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:01:44,040 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:01:44,043 INFO L229 MonitoredProcess]: Starting monitored process 36 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:01:44,044 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (36)] Waiting until timeout for monitored process [2022-11-03 02:01:44,423 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-03 02:01:44,423 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 02:01:44,433 INFO L263 TraceCheckSpWp]: Trace formula consists of 1178 conjuncts, 58 conjunts are in the unsatisfiable core [2022-11-03 02:01:44,437 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:01:49,023 INFO L134 CoverageAnalysis]: Checked inductivity of 75 backedges. 0 proven. 75 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:01:49,024 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:01:56,160 INFO L134 CoverageAnalysis]: Checked inductivity of 75 backedges. 0 proven. 75 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:01:56,161 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [528981968] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:01:56,161 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:01:56,161 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33, 33, 33, 21, 21] total 112 [2022-11-03 02:01:56,161 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1073562442] [2022-11-03 02:01:56,161 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:01:56,162 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 112 states [2022-11-03 02:01:56,162 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:01:56,163 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 112 interpolants. [2022-11-03 02:01:56,165 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=574, Invalid=11750, Unknown=108, NotChecked=0, Total=12432 [2022-11-03 02:01:56,166 INFO L87 Difference]: Start difference. First operand 128 states and 163 transitions. Second operand has 112 states, 112 states have (on average 2.7410714285714284) internal successors, (307), 112 states have internal predecessors, (307), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:02:09,894 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:02:09,894 INFO L93 Difference]: Finished difference Result 312 states and 407 transitions. [2022-11-03 02:02:09,894 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2022-11-03 02:02:09,895 INFO L78 Accepts]: Start accepts. Automaton has has 112 states, 112 states have (on average 2.7410714285714284) internal successors, (307), 112 states have internal predecessors, (307), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 74 [2022-11-03 02:02:09,895 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:02:09,896 INFO L225 Difference]: With dead ends: 312 [2022-11-03 02:02:09,897 INFO L226 Difference]: Without dead ends: 310 [2022-11-03 02:02:09,903 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 506 GetRequests, 341 SyntacticMatches, 12 SemanticMatches, 153 ConstructedPredicates, 0 IntricatePredicates, 1 DeprecatedPredicates, 7474 ImplicationChecksByTransitivity, 381.2s TimeCoverageRelationStatistics Valid=1369, Invalid=22393, Unknown=108, NotChecked=0, Total=23870 [2022-11-03 02:02:09,904 INFO L413 NwaCegarLoop]: 42 mSDtfsCounter, 456 mSDsluCounter, 2323 mSDsCounter, 0 mSdLazyCounter, 149 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 456 SdHoareTripleChecker+Valid, 2365 SdHoareTripleChecker+Invalid, 1105 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 149 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 948 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-03 02:02:09,904 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [456 Valid, 2365 Invalid, 1105 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 149 Invalid, 0 Unknown, 948 Unchecked, 0.3s Time] [2022-11-03 02:02:09,906 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 310 states. [2022-11-03 02:02:09,924 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 310 to 244. [2022-11-03 02:02:09,925 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 244 states, 243 states have (on average 1.308641975308642) internal successors, (318), 243 states have internal predecessors, (318), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:02:09,926 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 244 states to 244 states and 318 transitions. [2022-11-03 02:02:09,927 INFO L78 Accepts]: Start accepts. Automaton has 244 states and 318 transitions. Word has length 74 [2022-11-03 02:02:09,927 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:02:09,927 INFO L495 AbstractCegarLoop]: Abstraction has 244 states and 318 transitions. [2022-11-03 02:02:09,928 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 112 states, 112 states have (on average 2.7410714285714284) internal successors, (307), 112 states have internal predecessors, (307), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:02:09,928 INFO L276 IsEmpty]: Start isEmpty. Operand 244 states and 318 transitions. [2022-11-03 02:02:09,929 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2022-11-03 02:02:09,929 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:02:09,929 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1] [2022-11-03 02:02:09,938 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (35)] Forceful destruction successful, exit code 0 [2022-11-03 02:02:10,165 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (36)] Ended with exit code 0 [2022-11-03 02:02:10,351 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (34)] Ended with exit code 0 [2022-11-03 02:02:10,537 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 35 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,36 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,34 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:02:10,537 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:02:10,538 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:02:10,538 INFO L85 PathProgramCache]: Analyzing trace with hash -1403456995, now seen corresponding path program 2 times [2022-11-03 02:02:10,539 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:02:10,539 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1140692041] [2022-11-03 02:02:10,539 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-03 02:02:10,539 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:02:10,540 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:02:10,540 INFO L229 MonitoredProcess]: Starting monitored process 37 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:02:10,542 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (37)] Waiting until timeout for monitored process [2022-11-03 02:02:10,942 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-03 02:02:10,942 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 02:02:10,964 INFO L263 TraceCheckSpWp]: Trace formula consists of 1178 conjuncts, 63 conjunts are in the unsatisfiable core [2022-11-03 02:02:10,968 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:02:11,833 INFO L134 CoverageAnalysis]: Checked inductivity of 75 backedges. 50 proven. 14 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2022-11-03 02:02:11,833 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:02:12,218 INFO L134 CoverageAnalysis]: Checked inductivity of 75 backedges. 50 proven. 14 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2022-11-03 02:02:12,218 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:02:12,218 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1140692041] [2022-11-03 02:02:12,218 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1140692041] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:02:12,218 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1411971598] [2022-11-03 02:02:12,218 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-03 02:02:12,218 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:02:12,219 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:02:12,221 INFO L229 MonitoredProcess]: Starting monitored process 38 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:02:12,223 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (38)] Waiting until timeout for monitored process [2022-11-03 02:02:12,895 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-03 02:02:12,896 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 02:02:12,931 INFO L263 TraceCheckSpWp]: Trace formula consists of 1178 conjuncts, 4 conjunts are in the unsatisfiable core [2022-11-03 02:02:12,934 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:02:12,990 INFO L134 CoverageAnalysis]: Checked inductivity of 75 backedges. 61 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2022-11-03 02:02:12,990 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:02:12,990 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1411971598] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:02:12,990 INFO L184 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2022-11-03 02:02:12,990 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [6, 6] total 11 [2022-11-03 02:02:12,991 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1066214777] [2022-11-03 02:02:12,991 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:02:12,991 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-03 02:02:12,991 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:02:12,992 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-03 02:02:12,992 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2022-11-03 02:02:12,992 INFO L87 Difference]: Start difference. First operand 244 states and 318 transitions. Second operand has 5 states, 5 states have (on average 12.6) internal successors, (63), 5 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:02:13,187 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:02:13,187 INFO L93 Difference]: Finished difference Result 333 states and 433 transitions. [2022-11-03 02:02:13,188 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-03 02:02:13,188 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 12.6) internal successors, (63), 5 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 74 [2022-11-03 02:02:13,188 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:02:13,190 INFO L225 Difference]: With dead ends: 333 [2022-11-03 02:02:13,190 INFO L226 Difference]: Without dead ends: 267 [2022-11-03 02:02:13,191 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 225 GetRequests, 213 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=38, Invalid=144, Unknown=0, NotChecked=0, Total=182 [2022-11-03 02:02:13,191 INFO L413 NwaCegarLoop]: 36 mSDtfsCounter, 121 mSDsluCounter, 46 mSDsCounter, 0 mSdLazyCounter, 41 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 121 SdHoareTripleChecker+Valid, 82 SdHoareTripleChecker+Invalid, 43 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 41 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:02:13,192 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [121 Valid, 82 Invalid, 43 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 41 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 02:02:13,192 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 267 states. [2022-11-03 02:02:13,206 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 267 to 244. [2022-11-03 02:02:13,207 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 244 states, 243 states have (on average 1.2757201646090535) internal successors, (310), 243 states have internal predecessors, (310), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:02:13,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 244 states to 244 states and 310 transitions. [2022-11-03 02:02:13,208 INFO L78 Accepts]: Start accepts. Automaton has 244 states and 310 transitions. Word has length 74 [2022-11-03 02:02:13,208 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:02:13,208 INFO L495 AbstractCegarLoop]: Abstraction has 244 states and 310 transitions. [2022-11-03 02:02:13,208 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 12.6) internal successors, (63), 5 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:02:13,208 INFO L276 IsEmpty]: Start isEmpty. Operand 244 states and 310 transitions. [2022-11-03 02:02:13,209 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2022-11-03 02:02:13,209 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:02:13,210 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1] [2022-11-03 02:02:13,231 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (37)] Ended with exit code 0 [2022-11-03 02:02:13,426 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (38)] Forceful destruction successful, exit code 0 [2022-11-03 02:02:13,622 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 37 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,38 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt [2022-11-03 02:02:13,623 INFO L420 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:02:13,623 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:02:13,623 INFO L85 PathProgramCache]: Analyzing trace with hash 1759016219, now seen corresponding path program 1 times [2022-11-03 02:02:13,624 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:02:13,624 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [192553866] [2022-11-03 02:02:13,624 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:02:13,624 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:02:13,624 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:02:13,625 INFO L229 MonitoredProcess]: Starting monitored process 39 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:02:13,627 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (39)] Waiting until timeout for monitored process [2022-11-03 02:02:14,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:02:14,059 INFO L263 TraceCheckSpWp]: Trace formula consists of 1178 conjuncts, 63 conjunts are in the unsatisfiable core [2022-11-03 02:02:14,063 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:02:14,754 INFO L134 CoverageAnalysis]: Checked inductivity of 75 backedges. 50 proven. 8 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2022-11-03 02:02:14,755 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:02:15,108 INFO L134 CoverageAnalysis]: Checked inductivity of 75 backedges. 50 proven. 8 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2022-11-03 02:02:15,108 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:02:15,109 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [192553866] [2022-11-03 02:02:15,109 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [192553866] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:02:15,109 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [426130183] [2022-11-03 02:02:15,109 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:02:15,109 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:02:15,109 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:02:15,110 INFO L229 MonitoredProcess]: Starting monitored process 40 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:02:15,112 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (40)] Waiting until timeout for monitored process [2022-11-03 02:02:15,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:02:15,818 INFO L263 TraceCheckSpWp]: Trace formula consists of 1178 conjuncts, 4 conjunts are in the unsatisfiable core [2022-11-03 02:02:15,822 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:02:15,874 INFO L134 CoverageAnalysis]: Checked inductivity of 75 backedges. 55 proven. 0 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2022-11-03 02:02:15,874 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:02:15,874 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [426130183] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:02:15,874 INFO L184 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2022-11-03 02:02:15,874 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [6, 6] total 11 [2022-11-03 02:02:15,875 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [791067702] [2022-11-03 02:02:15,875 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:02:15,875 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-03 02:02:15,875 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:02:15,876 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-03 02:02:15,876 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2022-11-03 02:02:15,876 INFO L87 Difference]: Start difference. First operand 244 states and 310 transitions. Second operand has 5 states, 5 states have (on average 11.2) internal successors, (56), 5 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:02:16,081 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:02:16,081 INFO L93 Difference]: Finished difference Result 338 states and 430 transitions. [2022-11-03 02:02:16,082 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-03 02:02:16,082 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 11.2) internal successors, (56), 5 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 74 [2022-11-03 02:02:16,082 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:02:16,083 INFO L225 Difference]: With dead ends: 338 [2022-11-03 02:02:16,083 INFO L226 Difference]: Without dead ends: 158 [2022-11-03 02:02:16,083 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 224 GetRequests, 212 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=38, Invalid=144, Unknown=0, NotChecked=0, Total=182 [2022-11-03 02:02:16,084 INFO L413 NwaCegarLoop]: 30 mSDtfsCounter, 112 mSDsluCounter, 43 mSDsCounter, 0 mSdLazyCounter, 38 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 112 SdHoareTripleChecker+Valid, 73 SdHoareTripleChecker+Invalid, 40 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 38 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:02:16,084 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [112 Valid, 73 Invalid, 40 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 38 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 02:02:16,085 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states. [2022-11-03 02:02:16,096 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 147. [2022-11-03 02:02:16,096 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 147 states, 146 states have (on average 1.226027397260274) internal successors, (179), 146 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:02:16,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 179 transitions. [2022-11-03 02:02:16,097 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 179 transitions. Word has length 74 [2022-11-03 02:02:16,098 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:02:16,098 INFO L495 AbstractCegarLoop]: Abstraction has 147 states and 179 transitions. [2022-11-03 02:02:16,098 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 11.2) internal successors, (56), 5 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:02:16,098 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 179 transitions. [2022-11-03 02:02:16,099 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2022-11-03 02:02:16,099 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:02:16,100 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1] [2022-11-03 02:02:16,104 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (40)] Forceful destruction successful, exit code 0 [2022-11-03 02:02:16,317 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (39)] Forceful destruction successful, exit code 0 [2022-11-03 02:02:16,504 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 40 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,39 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:02:16,504 INFO L420 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:02:16,505 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:02:16,505 INFO L85 PathProgramCache]: Analyzing trace with hash 952484449, now seen corresponding path program 1 times [2022-11-03 02:02:16,506 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:02:16,506 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1906695823] [2022-11-03 02:02:16,506 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:02:16,506 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:02:16,507 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:02:16,507 INFO L229 MonitoredProcess]: Starting monitored process 41 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:02:16,509 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (41)] Waiting until timeout for monitored process [2022-11-03 02:02:16,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:02:16,945 INFO L263 TraceCheckSpWp]: Trace formula consists of 1178 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-03 02:02:16,948 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:02:17,006 INFO L134 CoverageAnalysis]: Checked inductivity of 75 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 49 trivial. 0 not checked. [2022-11-03 02:02:17,007 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:02:17,007 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:02:17,007 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1906695823] [2022-11-03 02:02:17,007 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1906695823] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:02:17,007 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:02:17,007 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-03 02:02:17,008 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [139414273] [2022-11-03 02:02:17,008 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:02:17,008 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 02:02:17,008 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:02:17,008 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 02:02:17,009 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 02:02:17,009 INFO L87 Difference]: Start difference. First operand 147 states and 179 transitions. Second operand has 4 states, 4 states have (on average 10.0) internal successors, (40), 4 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:02:17,108 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:02:17,108 INFO L93 Difference]: Finished difference Result 195 states and 238 transitions. [2022-11-03 02:02:17,109 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-03 02:02:17,109 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 10.0) internal successors, (40), 4 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 74 [2022-11-03 02:02:17,109 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:02:17,110 INFO L225 Difference]: With dead ends: 195 [2022-11-03 02:02:17,110 INFO L226 Difference]: Without dead ends: 116 [2022-11-03 02:02:17,111 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 71 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-03 02:02:17,112 INFO L413 NwaCegarLoop]: 40 mSDtfsCounter, 40 mSDsluCounter, 56 mSDsCounter, 0 mSdLazyCounter, 26 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 40 SdHoareTripleChecker+Valid, 96 SdHoareTripleChecker+Invalid, 26 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 26 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:02:17,112 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [40 Valid, 96 Invalid, 26 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 26 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 02:02:17,113 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states. [2022-11-03 02:02:17,121 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 116. [2022-11-03 02:02:17,122 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 116 states, 115 states have (on average 1.2260869565217392) internal successors, (141), 115 states have internal predecessors, (141), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:02:17,122 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 141 transitions. [2022-11-03 02:02:17,123 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 141 transitions. Word has length 74 [2022-11-03 02:02:17,123 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:02:17,123 INFO L495 AbstractCegarLoop]: Abstraction has 116 states and 141 transitions. [2022-11-03 02:02:17,123 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 10.0) internal successors, (40), 4 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:02:17,123 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 141 transitions. [2022-11-03 02:02:17,124 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2022-11-03 02:02:17,124 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:02:17,125 INFO L195 NwaCegarLoop]: trace histogram [5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 1, 1, 1, 1, 1] [2022-11-03 02:02:17,147 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (41)] Forceful destruction successful, exit code 0 [2022-11-03 02:02:17,338 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 41 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:02:17,338 INFO L420 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:02:17,339 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:02:17,339 INFO L85 PathProgramCache]: Analyzing trace with hash -1638082425, now seen corresponding path program 3 times [2022-11-03 02:02:17,340 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:02:17,341 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [525519881] [2022-11-03 02:02:17,341 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-03 02:02:17,341 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:02:17,341 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:02:17,343 INFO L229 MonitoredProcess]: Starting monitored process 42 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:02:17,382 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (42)] Waiting until timeout for monitored process [2022-11-03 02:02:17,801 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-11-03 02:02:17,801 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 02:02:17,817 INFO L263 TraceCheckSpWp]: Trace formula consists of 800 conjuncts, 51 conjunts are in the unsatisfiable core [2022-11-03 02:02:17,822 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:02:20,202 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 0 proven. 74 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2022-11-03 02:02:20,202 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:02:22,790 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 0 proven. 74 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2022-11-03 02:02:22,790 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:02:22,790 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [525519881] [2022-11-03 02:02:22,790 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [525519881] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:02:22,790 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1726020816] [2022-11-03 02:02:22,791 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-03 02:02:22,791 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:02:22,791 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:02:22,792 INFO L229 MonitoredProcess]: Starting monitored process 43 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:02:22,796 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (43)] Waiting until timeout for monitored process [2022-11-03 02:02:23,533 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-11-03 02:02:23,534 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 02:02:23,572 INFO L263 TraceCheckSpWp]: Trace formula consists of 800 conjuncts, 60 conjunts are in the unsatisfiable core [2022-11-03 02:02:23,577 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:02:27,240 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2022-11-03 02:02:27,240 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:02:29,509 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2022-11-03 02:02:29,510 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1726020816] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:02:29,510 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1669664222] [2022-11-03 02:02:29,510 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-03 02:02:29,510 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:02:29,511 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:02:29,512 INFO L229 MonitoredProcess]: Starting monitored process 44 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:02:29,513 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (44)] Waiting until timeout for monitored process [2022-11-03 02:02:29,871 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-11-03 02:02:29,871 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 02:02:29,880 INFO L263 TraceCheckSpWp]: Trace formula consists of 800 conjuncts, 82 conjunts are in the unsatisfiable core [2022-11-03 02:02:29,885 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:02:40,037 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 0 proven. 99 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2022-11-03 02:02:40,037 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:02:45,919 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 2 proven. 97 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2022-11-03 02:02:45,919 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1669664222] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:02:45,919 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:02:45,919 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 16, 15, 25, 25] total 68 [2022-11-03 02:02:45,919 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1087706307] [2022-11-03 02:02:45,920 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:02:45,920 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 68 states [2022-11-03 02:02:45,920 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:02:45,921 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 68 interpolants. [2022-11-03 02:02:45,924 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=465, Invalid=4091, Unknown=0, NotChecked=0, Total=4556 [2022-11-03 02:02:45,924 INFO L87 Difference]: Start difference. First operand 116 states and 141 transitions. Second operand has 68 states, 68 states have (on average 3.25) internal successors, (221), 68 states have internal predecessors, (221), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:02:58,034 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:02:58,034 INFO L93 Difference]: Finished difference Result 245 states and 301 transitions. [2022-11-03 02:02:58,034 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2022-11-03 02:02:58,035 INFO L78 Accepts]: Start accepts. Automaton has has 68 states, 68 states have (on average 3.25) internal successors, (221), 68 states have internal predecessors, (221), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 97 [2022-11-03 02:02:58,035 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:02:58,036 INFO L225 Difference]: With dead ends: 245 [2022-11-03 02:02:58,036 INFO L226 Difference]: Without dead ends: 243 [2022-11-03 02:02:58,038 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 634 GetRequests, 518 SyntacticMatches, 14 SemanticMatches, 102 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3139 ImplicationChecksByTransitivity, 29.4s TimeCoverageRelationStatistics Valid=1512, Invalid=9200, Unknown=0, NotChecked=0, Total=10712 [2022-11-03 02:02:58,039 INFO L413 NwaCegarLoop]: 26 mSDtfsCounter, 168 mSDsluCounter, 887 mSDsCounter, 0 mSdLazyCounter, 9 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 168 SdHoareTripleChecker+Valid, 913 SdHoareTripleChecker+Invalid, 149 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 9 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 138 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 02:02:58,039 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [168 Valid, 913 Invalid, 149 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 9 Invalid, 0 Unknown, 138 Unchecked, 0.0s Time] [2022-11-03 02:02:58,040 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 243 states. [2022-11-03 02:02:58,058 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 243 to 210. [2022-11-03 02:02:58,058 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 210 states, 209 states have (on average 1.2344497607655502) internal successors, (258), 209 states have internal predecessors, (258), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:02:58,059 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 210 states to 210 states and 258 transitions. [2022-11-03 02:02:58,059 INFO L78 Accepts]: Start accepts. Automaton has 210 states and 258 transitions. Word has length 97 [2022-11-03 02:02:58,060 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:02:58,060 INFO L495 AbstractCegarLoop]: Abstraction has 210 states and 258 transitions. [2022-11-03 02:02:58,060 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 68 states, 68 states have (on average 3.25) internal successors, (221), 68 states have internal predecessors, (221), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:02:58,061 INFO L276 IsEmpty]: Start isEmpty. Operand 210 states and 258 transitions. [2022-11-03 02:02:58,061 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2022-11-03 02:02:58,062 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:02:58,062 INFO L195 NwaCegarLoop]: trace histogram [5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 2, 2, 1, 1, 1, 1] [2022-11-03 02:02:58,074 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (43)] Forceful destruction successful, exit code 0 [2022-11-03 02:02:58,279 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (42)] Ended with exit code 0 [2022-11-03 02:02:58,496 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (44)] Ended with exit code 0 [2022-11-03 02:02:58,668 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 43 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,42 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,44 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:02:58,668 INFO L420 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:02:58,669 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:02:58,669 INFO L85 PathProgramCache]: Analyzing trace with hash 881877509, now seen corresponding path program 4 times [2022-11-03 02:02:58,670 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:02:58,671 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1178738481] [2022-11-03 02:02:58,671 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-03 02:02:58,671 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:02:58,671 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:02:58,672 INFO L229 MonitoredProcess]: Starting monitored process 45 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:02:58,676 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (45)] Waiting until timeout for monitored process [2022-11-03 02:02:59,183 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-03 02:02:59,183 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 02:02:59,211 INFO L263 TraceCheckSpWp]: Trace formula consists of 1556 conjuncts, 33 conjunts are in the unsatisfiable core [2022-11-03 02:02:59,215 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:03:00,348 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 17 proven. 129 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:03:00,348 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:03:01,699 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 17 proven. 129 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:03:01,699 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:03:01,699 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1178738481] [2022-11-03 02:03:01,699 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1178738481] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:03:01,699 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [539152351] [2022-11-03 02:03:01,699 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-03 02:03:01,699 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:03:01,700 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:03:01,701 INFO L229 MonitoredProcess]: Starting monitored process 46 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:03:01,702 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (46)] Waiting until timeout for monitored process [2022-11-03 02:03:02,702 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-03 02:03:02,702 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 02:03:02,743 INFO L263 TraceCheckSpWp]: Trace formula consists of 1556 conjuncts, 33 conjunts are in the unsatisfiable core [2022-11-03 02:03:02,747 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:03:03,250 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 17 proven. 129 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:03:03,250 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:03:03,710 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 17 proven. 129 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:03:03,710 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [539152351] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:03:03,710 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [651539386] [2022-11-03 02:03:03,710 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-03 02:03:03,711 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:03:03,711 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:03:03,712 INFO L229 MonitoredProcess]: Starting monitored process 47 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:03:03,713 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (47)] Waiting until timeout for monitored process [2022-11-03 02:03:04,162 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-03 02:03:04,162 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 02:03:04,174 INFO L263 TraceCheckSpWp]: Trace formula consists of 1556 conjuncts, 33 conjunts are in the unsatisfiable core [2022-11-03 02:03:04,178 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:03:04,668 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 17 proven. 129 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:03:04,668 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:03:05,103 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 17 proven. 129 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:03:05,103 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [651539386] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:03:05,103 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:03:05,103 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19, 19] total 33 [2022-11-03 02:03:05,103 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [407613538] [2022-11-03 02:03:05,104 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:03:05,104 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 33 states [2022-11-03 02:03:05,104 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:03:05,104 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2022-11-03 02:03:05,104 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=978, Unknown=0, NotChecked=0, Total=1056 [2022-11-03 02:03:05,105 INFO L87 Difference]: Start difference. First operand 210 states and 258 transitions. Second operand has 33 states, 33 states have (on average 4.636363636363637) internal successors, (153), 33 states have internal predecessors, (153), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:03:06,273 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:03:06,273 INFO L93 Difference]: Finished difference Result 569 states and 700 transitions. [2022-11-03 02:03:06,274 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2022-11-03 02:03:06,274 INFO L78 Accepts]: Start accepts. Automaton has has 33 states, 33 states have (on average 4.636363636363637) internal successors, (153), 33 states have internal predecessors, (153), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 97 [2022-11-03 02:03:06,274 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:03:06,276 INFO L225 Difference]: With dead ends: 569 [2022-11-03 02:03:06,276 INFO L226 Difference]: Without dead ends: 477 [2022-11-03 02:03:06,277 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 590 GetRequests, 541 SyntacticMatches, 5 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 238 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=164, Invalid=1906, Unknown=0, NotChecked=0, Total=2070 [2022-11-03 02:03:06,278 INFO L413 NwaCegarLoop]: 86 mSDtfsCounter, 194 mSDsluCounter, 1813 mSDsCounter, 0 mSdLazyCounter, 217 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 194 SdHoareTripleChecker+Valid, 1899 SdHoareTripleChecker+Invalid, 624 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 217 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 401 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-11-03 02:03:06,279 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [194 Valid, 1899 Invalid, 624 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 217 Invalid, 0 Unknown, 401 Unchecked, 0.5s Time] [2022-11-03 02:03:06,280 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 477 states. [2022-11-03 02:03:06,311 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 477 to 392. [2022-11-03 02:03:06,312 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 392 states, 391 states have (on average 1.227621483375959) internal successors, (480), 391 states have internal predecessors, (480), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:03:06,314 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 392 states to 392 states and 480 transitions. [2022-11-03 02:03:06,314 INFO L78 Accepts]: Start accepts. Automaton has 392 states and 480 transitions. Word has length 97 [2022-11-03 02:03:06,315 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:03:06,315 INFO L495 AbstractCegarLoop]: Abstraction has 392 states and 480 transitions. [2022-11-03 02:03:06,315 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 33 states, 33 states have (on average 4.636363636363637) internal successors, (153), 33 states have internal predecessors, (153), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:03:06,315 INFO L276 IsEmpty]: Start isEmpty. Operand 392 states and 480 transitions. [2022-11-03 02:03:06,316 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2022-11-03 02:03:06,316 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:03:06,317 INFO L195 NwaCegarLoop]: trace histogram [5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1] [2022-11-03 02:03:06,366 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (47)] Forceful destruction successful, exit code 0 [2022-11-03 02:03:06,546 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (46)] Forceful destruction successful, exit code 0 [2022-11-03 02:03:06,764 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (45)] Forceful destruction successful, exit code 0 [2022-11-03 02:03:06,934 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 47 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,46 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,45 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:03:06,934 INFO L420 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:03:06,935 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:03:06,935 INFO L85 PathProgramCache]: Analyzing trace with hash -958024055, now seen corresponding path program 1 times [2022-11-03 02:03:06,936 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:03:06,936 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1313795126] [2022-11-03 02:03:06,936 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:03:06,936 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:03:06,937 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:03:06,939 INFO L229 MonitoredProcess]: Starting monitored process 48 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:03:06,976 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (48)] Waiting until timeout for monitored process [2022-11-03 02:03:07,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:03:07,450 INFO L263 TraceCheckSpWp]: Trace formula consists of 1556 conjuncts, 41 conjunts are in the unsatisfiable core [2022-11-03 02:03:07,454 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:03:08,705 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 23 proven. 103 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2022-11-03 02:03:08,705 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:03:10,111 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 40 proven. 103 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 02:03:10,112 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:03:10,112 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1313795126] [2022-11-03 02:03:10,112 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1313795126] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:03:10,112 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1413790064] [2022-11-03 02:03:10,112 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:03:10,112 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:03:10,112 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:03:10,113 INFO L229 MonitoredProcess]: Starting monitored process 49 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:03:10,115 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (49)] Waiting until timeout for monitored process [2022-11-03 02:03:11,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:03:11,157 INFO L263 TraceCheckSpWp]: Trace formula consists of 1556 conjuncts, 41 conjunts are in the unsatisfiable core [2022-11-03 02:03:11,161 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:03:12,092 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 23 proven. 103 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2022-11-03 02:03:12,092 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:03:12,462 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 40 proven. 103 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 02:03:12,462 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1413790064] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:03:12,463 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1534059145] [2022-11-03 02:03:12,463 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:03:12,463 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:03:12,463 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:03:12,464 INFO L229 MonitoredProcess]: Starting monitored process 50 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:03:12,466 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (50)] Waiting until timeout for monitored process [2022-11-03 02:03:12,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:03:12,908 INFO L263 TraceCheckSpWp]: Trace formula consists of 1556 conjuncts, 51 conjunts are in the unsatisfiable core [2022-11-03 02:03:12,912 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:03:13,983 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 23 proven. 107 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-11-03 02:03:13,983 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:03:14,156 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 88 proven. 1 refuted. 0 times theorem prover too weak. 57 trivial. 0 not checked. [2022-11-03 02:03:14,156 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1534059145] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:03:14,156 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:03:14,157 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 18, 17, 18, 20, 10] total 37 [2022-11-03 02:03:14,157 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [648390676] [2022-11-03 02:03:14,157 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:03:14,158 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 37 states [2022-11-03 02:03:14,158 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:03:14,159 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2022-11-03 02:03:14,159 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=121, Invalid=1211, Unknown=0, NotChecked=0, Total=1332 [2022-11-03 02:03:14,159 INFO L87 Difference]: Start difference. First operand 392 states and 480 transitions. Second operand has 37 states, 37 states have (on average 5.378378378378378) internal successors, (199), 37 states have internal predecessors, (199), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:03:20,884 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:03:20,884 INFO L93 Difference]: Finished difference Result 1416 states and 1708 transitions. [2022-11-03 02:03:20,887 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 59 states. [2022-11-03 02:03:20,888 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 37 states have (on average 5.378378378378378) internal successors, (199), 37 states have internal predecessors, (199), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 97 [2022-11-03 02:03:20,888 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:03:20,891 INFO L225 Difference]: With dead ends: 1416 [2022-11-03 02:03:20,891 INFO L226 Difference]: Without dead ends: 1233 [2022-11-03 02:03:20,893 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 655 GetRequests, 557 SyntacticMatches, 8 SemanticMatches, 90 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2077 ImplicationChecksByTransitivity, 6.3s TimeCoverageRelationStatistics Valid=1450, Invalid=6922, Unknown=0, NotChecked=0, Total=8372 [2022-11-03 02:03:20,893 INFO L413 NwaCegarLoop]: 72 mSDtfsCounter, 2259 mSDsluCounter, 1708 mSDsCounter, 0 mSdLazyCounter, 1177 mSolverCounterSat, 302 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2259 SdHoareTripleChecker+Valid, 1780 SdHoareTripleChecker+Invalid, 1479 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 302 IncrementalHoareTripleChecker+Valid, 1177 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.2s IncrementalHoareTripleChecker+Time [2022-11-03 02:03:20,894 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [2259 Valid, 1780 Invalid, 1479 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [302 Valid, 1177 Invalid, 0 Unknown, 0 Unchecked, 2.2s Time] [2022-11-03 02:03:20,895 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1233 states. [2022-11-03 02:03:20,932 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1233 to 502. [2022-11-03 02:03:20,933 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 502 states, 501 states have (on average 1.215568862275449) internal successors, (609), 501 states have internal predecessors, (609), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:03:20,934 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 502 states to 502 states and 609 transitions. [2022-11-03 02:03:20,934 INFO L78 Accepts]: Start accepts. Automaton has 502 states and 609 transitions. Word has length 97 [2022-11-03 02:03:20,934 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:03:20,935 INFO L495 AbstractCegarLoop]: Abstraction has 502 states and 609 transitions. [2022-11-03 02:03:20,935 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 37 states, 37 states have (on average 5.378378378378378) internal successors, (199), 37 states have internal predecessors, (199), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:03:20,935 INFO L276 IsEmpty]: Start isEmpty. Operand 502 states and 609 transitions. [2022-11-03 02:03:20,936 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2022-11-03 02:03:20,936 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:03:20,936 INFO L195 NwaCegarLoop]: trace histogram [5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:03:20,946 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (49)] Forceful destruction successful, exit code 0 [2022-11-03 02:03:21,155 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (48)] Ended with exit code 0 [2022-11-03 02:03:21,365 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (50)] Ended with exit code 0 [2022-11-03 02:03:21,543 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 49 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,48 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,50 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:03:21,543 INFO L420 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:03:21,544 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:03:21,544 INFO L85 PathProgramCache]: Analyzing trace with hash -1467497145, now seen corresponding path program 1 times [2022-11-03 02:03:21,545 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:03:21,545 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [941251211] [2022-11-03 02:03:21,545 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:03:21,545 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:03:21,545 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:03:21,546 INFO L229 MonitoredProcess]: Starting monitored process 51 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:03:21,547 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (51)] Waiting until timeout for monitored process [2022-11-03 02:03:21,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:03:21,977 INFO L263 TraceCheckSpWp]: Trace formula consists of 1556 conjuncts, 119 conjunts are in the unsatisfiable core [2022-11-03 02:03:21,981 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:03:24,450 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 76 proven. 67 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 02:03:24,450 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:03:34,915 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 76 proven. 67 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 02:03:34,915 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:03:34,915 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [941251211] [2022-11-03 02:03:34,915 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [941251211] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:03:34,915 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [810950896] [2022-11-03 02:03:34,915 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:03:34,915 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:03:34,915 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:03:34,917 INFO L229 MonitoredProcess]: Starting monitored process 52 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:03:34,918 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (52)] Waiting until timeout for monitored process [2022-11-03 02:03:35,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:03:35,625 INFO L263 TraceCheckSpWp]: Trace formula consists of 1556 conjuncts, 4 conjunts are in the unsatisfiable core [2022-11-03 02:03:35,627 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:03:35,816 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2022-11-03 02:03:35,816 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:03:35,817 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [810950896] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:03:35,817 INFO L184 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2022-11-03 02:03:35,817 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [22, 22] total 43 [2022-11-03 02:03:35,817 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2110518626] [2022-11-03 02:03:35,817 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:03:35,817 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-03 02:03:35,818 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:03:35,818 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-03 02:03:35,818 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=103, Invalid=1701, Unknown=2, NotChecked=0, Total=1806 [2022-11-03 02:03:35,818 INFO L87 Difference]: Start difference. First operand 502 states and 609 transitions. Second operand has 5 states, 5 states have (on average 14.2) internal successors, (71), 5 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:03:36,309 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:03:36,309 INFO L93 Difference]: Finished difference Result 779 states and 946 transitions. [2022-11-03 02:03:36,310 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-03 02:03:36,310 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 14.2) internal successors, (71), 5 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 97 [2022-11-03 02:03:36,310 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:03:36,312 INFO L225 Difference]: With dead ends: 779 [2022-11-03 02:03:36,312 INFO L226 Difference]: Without dead ends: 452 [2022-11-03 02:03:36,313 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 294 GetRequests, 250 SyntacticMatches, 0 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 212 ImplicationChecksByTransitivity, 11.8s TimeCoverageRelationStatistics Valid=118, Invalid=1950, Unknown=2, NotChecked=0, Total=2070 [2022-11-03 02:03:36,314 INFO L413 NwaCegarLoop]: 42 mSDtfsCounter, 130 mSDsluCounter, 49 mSDsCounter, 0 mSdLazyCounter, 43 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 130 SdHoareTripleChecker+Valid, 91 SdHoareTripleChecker+Invalid, 45 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 43 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:03:36,314 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [130 Valid, 91 Invalid, 45 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 43 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 02:03:36,315 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 452 states. [2022-11-03 02:03:36,339 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 452 to 376. [2022-11-03 02:03:36,340 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 376 states, 375 states have (on average 1.176) internal successors, (441), 375 states have internal predecessors, (441), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:03:36,341 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 376 states to 376 states and 441 transitions. [2022-11-03 02:03:36,341 INFO L78 Accepts]: Start accepts. Automaton has 376 states and 441 transitions. Word has length 97 [2022-11-03 02:03:36,341 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:03:36,342 INFO L495 AbstractCegarLoop]: Abstraction has 376 states and 441 transitions. [2022-11-03 02:03:36,342 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 14.2) internal successors, (71), 5 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:03:36,342 INFO L276 IsEmpty]: Start isEmpty. Operand 376 states and 441 transitions. [2022-11-03 02:03:36,343 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2022-11-03 02:03:36,343 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:03:36,343 INFO L195 NwaCegarLoop]: trace histogram [5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:03:36,364 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (51)] Ended with exit code 0 [2022-11-03 02:03:36,562 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (52)] Ended with exit code 0 [2022-11-03 02:03:36,758 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 51 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,52 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt [2022-11-03 02:03:36,759 INFO L420 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:03:36,759 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:03:36,759 INFO L85 PathProgramCache]: Analyzing trace with hash -245113611, now seen corresponding path program 2 times [2022-11-03 02:03:36,760 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:03:36,760 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [348498618] [2022-11-03 02:03:36,760 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-03 02:03:36,760 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:03:36,760 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:03:36,761 INFO L229 MonitoredProcess]: Starting monitored process 53 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:03:36,762 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (53)] Waiting until timeout for monitored process [2022-11-03 02:03:37,219 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-03 02:03:37,219 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 02:03:37,243 INFO L263 TraceCheckSpWp]: Trace formula consists of 1556 conjuncts, 119 conjunts are in the unsatisfiable core [2022-11-03 02:03:37,247 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:03:39,858 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 94 proven. 31 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2022-11-03 02:03:39,858 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:03:50,789 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 94 proven. 31 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2022-11-03 02:03:50,789 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:03:50,789 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [348498618] [2022-11-03 02:03:50,790 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [348498618] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:03:50,790 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [511651461] [2022-11-03 02:03:50,790 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-03 02:03:50,790 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:03:50,790 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:03:50,795 INFO L229 MonitoredProcess]: Starting monitored process 54 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:03:50,821 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (54)] Waiting until timeout for monitored process [2022-11-03 02:03:51,707 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-03 02:03:51,708 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 02:03:51,754 INFO L263 TraceCheckSpWp]: Trace formula consists of 1556 conjuncts, 119 conjunts are in the unsatisfiable core [2022-11-03 02:03:51,759 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:03:53,002 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 94 proven. 31 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2022-11-03 02:03:53,003 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:03:55,801 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 94 proven. 31 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2022-11-03 02:03:55,801 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [511651461] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:03:55,801 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1727693494] [2022-11-03 02:03:55,801 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-03 02:03:55,802 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:03:55,802 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:03:55,810 INFO L229 MonitoredProcess]: Starting monitored process 55 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:03:55,827 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (55)] Waiting until timeout for monitored process [2022-11-03 02:03:56,202 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-03 02:03:56,202 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 02:03:56,213 INFO L263 TraceCheckSpWp]: Trace formula consists of 1556 conjuncts, 10 conjunts are in the unsatisfiable core [2022-11-03 02:03:56,216 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:03:57,809 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 21 proven. 88 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2022-11-03 02:03:57,810 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:03:58,614 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 96 proven. 13 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2022-11-03 02:03:58,615 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1727693494] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:03:58,615 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:03:58,615 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22, 22, 10, 9] total 54 [2022-11-03 02:03:58,615 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [691993736] [2022-11-03 02:03:58,615 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:03:58,616 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 54 states [2022-11-03 02:03:58,616 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:03:58,616 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 54 interpolants. [2022-11-03 02:03:58,617 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=163, Invalid=2697, Unknown=2, NotChecked=0, Total=2862 [2022-11-03 02:03:58,617 INFO L87 Difference]: Start difference. First operand 376 states and 441 transitions. Second operand has 54 states, 54 states have (on average 4.462962962962963) internal successors, (241), 54 states have internal predecessors, (241), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:02,713 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:04:02,713 INFO L93 Difference]: Finished difference Result 643 states and 760 transitions. [2022-11-03 02:04:02,713 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2022-11-03 02:04:02,714 INFO L78 Accepts]: Start accepts. Automaton has has 54 states, 54 states have (on average 4.462962962962963) internal successors, (241), 54 states have internal predecessors, (241), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 97 [2022-11-03 02:04:02,714 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:04:02,715 INFO L225 Difference]: With dead ends: 643 [2022-11-03 02:04:02,716 INFO L226 Difference]: Without dead ends: 481 [2022-11-03 02:04:02,716 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 608 GetRequests, 525 SyntacticMatches, 6 SemanticMatches, 77 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 852 ImplicationChecksByTransitivity, 20.3s TimeCoverageRelationStatistics Valid=335, Invalid=5825, Unknown=2, NotChecked=0, Total=6162 [2022-11-03 02:04:02,717 INFO L413 NwaCegarLoop]: 39 mSDtfsCounter, 56 mSDsluCounter, 1461 mSDsCounter, 0 mSdLazyCounter, 52 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 56 SdHoareTripleChecker+Valid, 1500 SdHoareTripleChecker+Invalid, 283 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 52 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 231 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:04:02,717 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [56 Valid, 1500 Invalid, 283 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 52 Invalid, 0 Unknown, 231 Unchecked, 0.1s Time] [2022-11-03 02:04:02,718 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 481 states. [2022-11-03 02:04:02,758 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 481 to 471. [2022-11-03 02:04:02,759 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 471 states, 470 states have (on average 1.1702127659574468) internal successors, (550), 470 states have internal predecessors, (550), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:02,760 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 471 states to 471 states and 550 transitions. [2022-11-03 02:04:02,760 INFO L78 Accepts]: Start accepts. Automaton has 471 states and 550 transitions. Word has length 97 [2022-11-03 02:04:02,760 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:04:02,761 INFO L495 AbstractCegarLoop]: Abstraction has 471 states and 550 transitions. [2022-11-03 02:04:02,761 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 54 states, 54 states have (on average 4.462962962962963) internal successors, (241), 54 states have internal predecessors, (241), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:02,761 INFO L276 IsEmpty]: Start isEmpty. Operand 471 states and 550 transitions. [2022-11-03 02:04:02,762 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2022-11-03 02:04:02,762 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:04:02,762 INFO L195 NwaCegarLoop]: trace histogram [5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 2, 2, 1, 1, 1, 1, 1] [2022-11-03 02:04:02,782 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (53)] Forceful destruction successful, exit code 0 [2022-11-03 02:04:03,005 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (55)] Ended with exit code 0 [2022-11-03 02:04:03,187 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (54)] Ended with exit code 0 [2022-11-03 02:04:03,382 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 53 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,55 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,54 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt [2022-11-03 02:04:03,382 INFO L420 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:04:03,382 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:04:03,383 INFO L85 PathProgramCache]: Analyzing trace with hash -1451515129, now seen corresponding path program 2 times [2022-11-03 02:04:03,383 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:04:03,383 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [449490996] [2022-11-03 02:04:03,384 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-03 02:04:03,384 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:04:03,384 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:04:03,384 INFO L229 MonitoredProcess]: Starting monitored process 56 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:04:03,386 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (56)] Waiting until timeout for monitored process [2022-11-03 02:04:03,809 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-03 02:04:03,809 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 02:04:03,833 INFO L263 TraceCheckSpWp]: Trace formula consists of 1556 conjuncts, 63 conjunts are in the unsatisfiable core [2022-11-03 02:04:03,836 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:04:04,391 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 85 proven. 12 refuted. 0 times theorem prover too weak. 49 trivial. 0 not checked. [2022-11-03 02:04:04,391 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:04:04,753 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 85 proven. 12 refuted. 0 times theorem prover too weak. 49 trivial. 0 not checked. [2022-11-03 02:04:04,754 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:04:04,754 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [449490996] [2022-11-03 02:04:04,754 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [449490996] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:04:04,754 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1356674562] [2022-11-03 02:04:04,754 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-03 02:04:04,755 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:04:04,755 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:04:04,756 INFO L229 MonitoredProcess]: Starting monitored process 57 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:04:04,757 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (57)] Waiting until timeout for monitored process [2022-11-03 02:04:05,456 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-03 02:04:05,456 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 02:04:05,490 INFO L263 TraceCheckSpWp]: Trace formula consists of 1556 conjuncts, 4 conjunts are in the unsatisfiable core [2022-11-03 02:04:05,492 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:04:05,535 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 94 proven. 0 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2022-11-03 02:04:05,535 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:04:05,535 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1356674562] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:04:05,535 INFO L184 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2022-11-03 02:04:05,536 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [6, 6] total 11 [2022-11-03 02:04:05,536 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [678142754] [2022-11-03 02:04:05,536 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:04:05,536 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-03 02:04:05,537 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:04:05,537 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-03 02:04:05,537 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2022-11-03 02:04:05,537 INFO L87 Difference]: Start difference. First operand 471 states and 550 transitions. Second operand has 5 states, 5 states have (on average 12.2) internal successors, (61), 5 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:05,698 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:04:05,698 INFO L93 Difference]: Finished difference Result 840 states and 989 transitions. [2022-11-03 02:04:05,699 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-03 02:04:05,699 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 12.2) internal successors, (61), 5 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 97 [2022-11-03 02:04:05,699 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:04:05,701 INFO L225 Difference]: With dead ends: 840 [2022-11-03 02:04:05,701 INFO L226 Difference]: Without dead ends: 488 [2022-11-03 02:04:05,702 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 294 GetRequests, 282 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=38, Invalid=144, Unknown=0, NotChecked=0, Total=182 [2022-11-03 02:04:05,703 INFO L413 NwaCegarLoop]: 33 mSDtfsCounter, 110 mSDsluCounter, 45 mSDsCounter, 0 mSdLazyCounter, 40 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 110 SdHoareTripleChecker+Valid, 78 SdHoareTripleChecker+Invalid, 42 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 40 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:04:05,703 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [110 Valid, 78 Invalid, 42 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 40 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 02:04:05,704 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 488 states. [2022-11-03 02:04:05,731 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 488 to 456. [2022-11-03 02:04:05,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 456 states, 455 states have (on average 1.1428571428571428) internal successors, (520), 455 states have internal predecessors, (520), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:05,733 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 456 states to 456 states and 520 transitions. [2022-11-03 02:04:05,733 INFO L78 Accepts]: Start accepts. Automaton has 456 states and 520 transitions. Word has length 97 [2022-11-03 02:04:05,734 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:04:05,734 INFO L495 AbstractCegarLoop]: Abstraction has 456 states and 520 transitions. [2022-11-03 02:04:05,734 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 12.2) internal successors, (61), 5 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:05,734 INFO L276 IsEmpty]: Start isEmpty. Operand 456 states and 520 transitions. [2022-11-03 02:04:05,735 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2022-11-03 02:04:05,735 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:04:05,736 INFO L195 NwaCegarLoop]: trace histogram [5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:04:05,756 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (56)] Ended with exit code 0 [2022-11-03 02:04:05,954 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (57)] Ended with exit code 0 [2022-11-03 02:04:06,150 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 56 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,57 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt [2022-11-03 02:04:06,151 INFO L420 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:04:06,151 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:04:06,151 INFO L85 PathProgramCache]: Analyzing trace with hash 1067449655, now seen corresponding path program 1 times [2022-11-03 02:04:06,152 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:04:06,152 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [215872485] [2022-11-03 02:04:06,152 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:04:06,152 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:04:06,152 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:04:06,153 INFO L229 MonitoredProcess]: Starting monitored process 58 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:04:06,154 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (58)] Waiting until timeout for monitored process [2022-11-03 02:04:06,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:04:06,596 INFO L263 TraceCheckSpWp]: Trace formula consists of 1556 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-03 02:04:06,598 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:04:06,650 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 50 proven. 0 refuted. 0 times theorem prover too weak. 96 trivial. 0 not checked. [2022-11-03 02:04:06,650 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:04:06,651 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:04:06,651 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [215872485] [2022-11-03 02:04:06,651 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [215872485] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:04:06,651 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:04:06,651 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-03 02:04:06,651 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [352556757] [2022-11-03 02:04:06,652 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:04:06,652 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 02:04:06,652 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:04:06,652 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 02:04:06,653 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 02:04:06,653 INFO L87 Difference]: Start difference. First operand 456 states and 520 transitions. Second operand has 4 states, 4 states have (on average 13.25) internal successors, (53), 4 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:06,740 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:04:06,740 INFO L93 Difference]: Finished difference Result 820 states and 940 transitions. [2022-11-03 02:04:06,741 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-03 02:04:06,741 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 13.25) internal successors, (53), 4 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 97 [2022-11-03 02:04:06,741 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:04:06,742 INFO L225 Difference]: With dead ends: 820 [2022-11-03 02:04:06,742 INFO L226 Difference]: Without dead ends: 422 [2022-11-03 02:04:06,743 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 97 GetRequests, 94 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-03 02:04:06,744 INFO L413 NwaCegarLoop]: 44 mSDtfsCounter, 32 mSDsluCounter, 54 mSDsCounter, 0 mSdLazyCounter, 28 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 32 SdHoareTripleChecker+Valid, 98 SdHoareTripleChecker+Invalid, 28 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 28 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:04:06,744 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [32 Valid, 98 Invalid, 28 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 28 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 02:04:06,745 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 422 states. [2022-11-03 02:04:06,780 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 422 to 422. [2022-11-03 02:04:06,780 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 422 states, 421 states have (on average 1.1425178147268409) internal successors, (481), 421 states have internal predecessors, (481), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:06,782 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 422 states to 422 states and 481 transitions. [2022-11-03 02:04:06,782 INFO L78 Accepts]: Start accepts. Automaton has 422 states and 481 transitions. Word has length 97 [2022-11-03 02:04:06,782 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:04:06,782 INFO L495 AbstractCegarLoop]: Abstraction has 422 states and 481 transitions. [2022-11-03 02:04:06,782 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 13.25) internal successors, (53), 4 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:06,783 INFO L276 IsEmpty]: Start isEmpty. Operand 422 states and 481 transitions. [2022-11-03 02:04:06,783 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2022-11-03 02:04:06,784 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:04:06,784 INFO L195 NwaCegarLoop]: trace histogram [5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 2, 2, 1, 1, 1, 1, 1] [2022-11-03 02:04:06,804 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (58)] Forceful destruction successful, exit code 0 [2022-11-03 02:04:07,003 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 58 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:04:07,004 INFO L420 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:04:07,004 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:04:07,004 INFO L85 PathProgramCache]: Analyzing trace with hash -1076697277, now seen corresponding path program 1 times [2022-11-03 02:04:07,005 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:04:07,005 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1498056482] [2022-11-03 02:04:07,005 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:04:07,005 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:04:07,006 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:04:07,007 INFO L229 MonitoredProcess]: Starting monitored process 59 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:04:07,008 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (59)] Waiting until timeout for monitored process [2022-11-03 02:04:07,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:04:07,456 INFO L263 TraceCheckSpWp]: Trace formula consists of 1556 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-03 02:04:07,459 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:04:07,488 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 32 proven. 0 refuted. 0 times theorem prover too weak. 114 trivial. 0 not checked. [2022-11-03 02:04:07,489 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:04:07,489 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:04:07,489 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1498056482] [2022-11-03 02:04:07,489 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1498056482] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:04:07,489 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:04:07,490 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-03 02:04:07,490 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1205800571] [2022-11-03 02:04:07,490 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:04:07,490 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 02:04:07,490 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:04:07,491 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 02:04:07,491 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 02:04:07,491 INFO L87 Difference]: Start difference. First operand 422 states and 481 transitions. Second operand has 4 states, 4 states have (on average 9.5) internal successors, (38), 4 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:07,593 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:04:07,593 INFO L93 Difference]: Finished difference Result 660 states and 759 transitions. [2022-11-03 02:04:07,594 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-03 02:04:07,594 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 9.5) internal successors, (38), 4 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 97 [2022-11-03 02:04:07,594 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:04:07,595 INFO L225 Difference]: With dead ends: 660 [2022-11-03 02:04:07,595 INFO L226 Difference]: Without dead ends: 366 [2022-11-03 02:04:07,595 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 97 GetRequests, 94 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-03 02:04:07,596 INFO L413 NwaCegarLoop]: 37 mSDtfsCounter, 36 mSDsluCounter, 57 mSDsCounter, 0 mSdLazyCounter, 25 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 36 SdHoareTripleChecker+Valid, 94 SdHoareTripleChecker+Invalid, 25 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 25 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:04:07,596 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [36 Valid, 94 Invalid, 25 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 25 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 02:04:07,597 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 366 states. [2022-11-03 02:04:07,627 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 366 to 366. [2022-11-03 02:04:07,628 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 366 states, 365 states have (on average 1.1452054794520548) internal successors, (418), 365 states have internal predecessors, (418), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:07,629 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 366 states to 366 states and 418 transitions. [2022-11-03 02:04:07,629 INFO L78 Accepts]: Start accepts. Automaton has 366 states and 418 transitions. Word has length 97 [2022-11-03 02:04:07,629 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:04:07,629 INFO L495 AbstractCegarLoop]: Abstraction has 366 states and 418 transitions. [2022-11-03 02:04:07,630 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 9.5) internal successors, (38), 4 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:07,630 INFO L276 IsEmpty]: Start isEmpty. Operand 366 states and 418 transitions. [2022-11-03 02:04:07,630 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2022-11-03 02:04:07,631 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:04:07,631 INFO L195 NwaCegarLoop]: trace histogram [6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 3, 2, 1, 1, 1, 1] [2022-11-03 02:04:07,651 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (59)] Forceful destruction successful, exit code 0 [2022-11-03 02:04:07,850 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 59 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:04:07,850 INFO L420 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:04:07,851 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:04:07,851 INFO L85 PathProgramCache]: Analyzing trace with hash -1885700643, now seen corresponding path program 5 times [2022-11-03 02:04:07,852 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:04:07,852 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1545535245] [2022-11-03 02:04:07,852 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-03 02:04:07,852 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:04:07,852 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:04:07,853 INFO L229 MonitoredProcess]: Starting monitored process 60 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:04:07,855 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (60)] Waiting until timeout for monitored process [2022-11-03 02:04:08,515 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2022-11-03 02:04:08,515 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 02:04:08,547 INFO L263 TraceCheckSpWp]: Trace formula consists of 1934 conjuncts, 242 conjunts are in the unsatisfiable core [2022-11-03 02:04:08,554 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:04:54,090 WARN L230 Executor]: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1) with exit command (exit)) stderr output: (error "out of memory") [2022-11-03 02:04:54,091 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:04:54,091 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1545535245] [2022-11-03 02:04:54,092 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_DEPENDING: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") [2022-11-03 02:04:54,092 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [191921971] [2022-11-03 02:04:54,092 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-03 02:04:54,092 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:04:54,092 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:04:54,093 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Ended with exit code 101 [2022-11-03 02:04:54,095 INFO L229 MonitoredProcess]: Starting monitored process 61 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:04:54,096 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (61)] Waiting until timeout for monitored process [2022-11-03 02:04:55,629 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2022-11-03 02:04:55,630 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 02:04:55,686 INFO L263 TraceCheckSpWp]: Trace formula consists of 1934 conjuncts, 242 conjunts are in the unsatisfiable core [2022-11-03 02:04:55,693 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:04:55,695 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_DEPENDING: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1) with exit command (exit)) Connection to SMT solver broken [2022-11-03 02:04:55,695 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1103035949] [2022-11-03 02:04:55,695 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-03 02:04:55,695 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:04:55,695 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:04:55,696 INFO L229 MonitoredProcess]: Starting monitored process 62 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:04:55,697 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (62)] Waiting until timeout for monitored process [2022-11-03 02:04:56,416 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2022-11-03 02:04:56,417 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 02:04:56,431 INFO L263 TraceCheckSpWp]: Trace formula consists of 1934 conjuncts, 113 conjunts are in the unsatisfiable core [2022-11-03 02:04:56,436 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:04:56,437 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_DEPENDING: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1) with exit command (exit)) Connection to SMT solver broken [2022-11-03 02:04:56,437 INFO L184 FreeRefinementEngine]: Found 0 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:04:56,437 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [] total 0 [2022-11-03 02:04:56,437 ERROR L170 FreeRefinementEngine]: Strategy WALRUS failed to provide any proof altough trace is infeasible [2022-11-03 02:04:56,437 INFO L359 BasicCegarLoop]: Counterexample might be feasible [2022-11-03 02:04:56,443 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-11-03 02:04:56,454 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (61)] Ended with exit code 0 [2022-11-03 02:04:56,668 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (60)] Ended with exit code 0 [2022-11-03 02:04:56,878 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (62)] Ended with exit code 0 [2022-11-03 02:04:57,054 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 61 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,60 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,62 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_536e7e45-f05e-478c-8429-016ed94d5663/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:04:57,057 INFO L444 BasicCegarLoop]: Path program histogram: [5, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:04:57,061 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-03 02:04:57,094 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 02:04:57,094 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 02:04:57,094 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 02:04:57,094 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 02:04:57,095 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 02:04:57,095 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 02:04:57,134 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 03.11 02:04:57 BoogieIcfgContainer [2022-11-03 02:04:57,136 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-03 02:04:57,136 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-03 02:04:57,136 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-03 02:04:57,136 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-03 02:04:57,137 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 01:52:17" (3/4) ... [2022-11-03 02:04:57,140 INFO L140 WitnessPrinter]: No result that supports witness generation found [2022-11-03 02:04:57,140 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-03 02:04:57,141 INFO L158 Benchmark]: Toolchain (without parser) took 761692.23ms. Allocated memory was 73.4MB in the beginning and 799.0MB in the end (delta: 725.6MB). Free memory was 56.3MB in the beginning and 703.7MB in the end (delta: -647.4MB). Peak memory consumption was 77.0MB. Max. memory is 16.1GB. [2022-11-03 02:04:57,141 INFO L158 Benchmark]: CDTParser took 0.38ms. Allocated memory is still 73.4MB. Free memory is still 54.5MB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-03 02:04:57,141 INFO L158 Benchmark]: CACSL2BoogieTranslator took 728.85ms. Allocated memory is still 73.4MB. Free memory was 56.1MB in the beginning and 47.9MB in the end (delta: 8.2MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. [2022-11-03 02:04:57,144 INFO L158 Benchmark]: Boogie Procedure Inliner took 88.87ms. Allocated memory is still 73.4MB. Free memory was 47.9MB in the beginning and 43.8MB in the end (delta: 4.1MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. [2022-11-03 02:04:57,145 INFO L158 Benchmark]: Boogie Preprocessor took 99.99ms. Allocated memory is still 73.4MB. Free memory was 43.8MB in the beginning and 41.0MB in the end (delta: 2.8MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. [2022-11-03 02:04:57,145 INFO L158 Benchmark]: RCFGBuilder took 1030.84ms. Allocated memory is still 73.4MB. Free memory was 41.0MB in the beginning and 27.2MB in the end (delta: 13.8MB). Peak memory consumption was 16.4MB. Max. memory is 16.1GB. [2022-11-03 02:04:57,146 INFO L158 Benchmark]: TraceAbstraction took 759711.22ms. Allocated memory was 104.9MB in the beginning and 799.0MB in the end (delta: 694.2MB). Free memory was 83.6MB in the beginning and 703.7MB in the end (delta: -620.1MB). Peak memory consumption was 73.0MB. Max. memory is 16.1GB. [2022-11-03 02:04:57,146 INFO L158 Benchmark]: Witness Printer took 4.18ms. Allocated memory is still 799.0MB. Free memory is still 703.7MB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-03 02:04:57,148 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.38ms. Allocated memory is still 73.4MB. Free memory is still 54.5MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 728.85ms. Allocated memory is still 73.4MB. Free memory was 56.1MB in the beginning and 47.9MB in the end (delta: 8.2MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 88.87ms. Allocated memory is still 73.4MB. Free memory was 47.9MB in the beginning and 43.8MB in the end (delta: 4.1MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. * Boogie Preprocessor took 99.99ms. Allocated memory is still 73.4MB. Free memory was 43.8MB in the beginning and 41.0MB in the end (delta: 2.8MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. * RCFGBuilder took 1030.84ms. Allocated memory is still 73.4MB. Free memory was 41.0MB in the beginning and 27.2MB in the end (delta: 13.8MB). Peak memory consumption was 16.4MB. Max. memory is 16.1GB. * TraceAbstraction took 759711.22ms. Allocated memory was 104.9MB in the beginning and 799.0MB in the end (delta: 694.2MB). Free memory was 83.6MB in the beginning and 703.7MB in the end (delta: -620.1MB). Peak memory consumption was 73.0MB. Max. memory is 16.1GB. * Witness Printer took 4.18ms. Allocated memory is still 799.0MB. Free memory is still 703.7MB. There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 20]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: unable to decide satisfiability of path constraint. Possible FailurePath: [L25] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L26] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L28] const SORT_27 mask_SORT_27 = (SORT_27)-1 >> (sizeof(SORT_27) * 8 - 6); [L29] const SORT_27 msb_SORT_27 = (SORT_27)1 << (6 - 1); [L31] const SORT_1 var_3 = 0; [L32] const SORT_1 var_9 = 1; [L33] const SORT_27 var_28 = 1; [L34] const SORT_27 var_32 = 19; [L35] const SORT_27 var_45 = 17; [L36] const SORT_27 var_158 = 3; [L38] SORT_1 input_2; [L40] SORT_1 state_4 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L41] SORT_1 state_13 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L42] SORT_1 state_15 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L43] SORT_1 state_17 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L44] SORT_1 state_19 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L45] SORT_1 state_21 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L46] SORT_1 state_23 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L47] SORT_1 state_25 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L48] SORT_27 state_29 = __VERIFIER_nondet_uchar() & mask_SORT_27; [L50] SORT_1 init_5_arg_1 = var_3; [L51] state_4 = init_5_arg_1 [L52] SORT_1 init_14_arg_1 = var_9; [L53] state_13 = init_14_arg_1 [L54] SORT_1 init_16_arg_1 = var_3; [L55] state_15 = init_16_arg_1 [L56] SORT_1 init_18_arg_1 = var_3; [L57] state_17 = init_18_arg_1 [L58] SORT_1 init_20_arg_1 = var_3; [L59] state_19 = init_20_arg_1 [L60] SORT_1 init_22_arg_1 = var_3; [L61] state_21 = init_22_arg_1 [L62] SORT_1 init_24_arg_1 = var_3; [L63] state_23 = init_24_arg_1 [L64] SORT_1 init_26_arg_1 = var_9; [L65] state_25 = init_26_arg_1 [L66] SORT_27 init_30_arg_1 = var_28; [L67] state_29 = init_30_arg_1 [L70] input_2 = __VERIFIER_nondet_uchar() [L73] SORT_1 var_6_arg_0 = state_4; [L74] SORT_1 var_6 = ~var_6_arg_0; [L75] SORT_1 var_10_arg_0 = var_6; [L76] SORT_1 var_10 = ~var_10_arg_0; [L77] SORT_1 var_11_arg_0 = var_9; [L78] SORT_1 var_11_arg_1 = var_10; [L79] SORT_1 var_11 = var_11_arg_0 & var_11_arg_1; [L80] var_11 = var_11 & mask_SORT_1 [L81] SORT_1 bad_12_arg_0 = var_11; [L82] CALL __VERIFIER_assert(!(bad_12_arg_0)) [L20] COND FALSE !(!(cond)) [L82] RET __VERIFIER_assert(!(bad_12_arg_0)) [L84] SORT_27 var_33_arg_0 = state_29; [L85] SORT_27 var_33_arg_1 = var_32; [L86] SORT_1 var_33 = var_33_arg_0 < var_33_arg_1; [L87] SORT_1 var_34_arg_0 = var_33; [L88] SORT_1 var_34 = ~var_34_arg_0; [L89] SORT_1 var_35_arg_0 = state_15; [L90] SORT_1 var_35_arg_1 = var_34; [L91] SORT_1 var_35 = var_35_arg_0 & var_35_arg_1; [L92] SORT_1 var_36_arg_0 = state_4; [L93] SORT_1 var_36_arg_1 = var_35; [L94] SORT_1 var_36 = var_36_arg_0 | var_36_arg_1; [L95] SORT_27 var_37_arg_0 = state_29; [L96] SORT_27 var_37_arg_1 = var_32; [L97] SORT_1 var_37 = var_37_arg_0 < var_37_arg_1; [L98] SORT_1 var_38_arg_0 = var_37; [L99] SORT_1 var_38 = ~var_38_arg_0; [L100] SORT_1 var_39_arg_0 = state_21; [L101] SORT_1 var_39_arg_1 = var_38; [L102] SORT_1 var_39 = var_39_arg_0 & var_39_arg_1; [L103] SORT_1 var_40_arg_0 = var_36; [L104] SORT_1 var_40_arg_1 = var_39; [L105] SORT_1 var_40 = var_40_arg_0 | var_40_arg_1; [L106] SORT_1 var_41_arg_0 = state_25; [L107] SORT_1 var_41_arg_1 = var_40; [L108] SORT_1 var_41_arg_2 = state_4; [L109] EXPR var_41_arg_0 ? var_41_arg_1 : var_41_arg_2 [L109] SORT_1 var_41 = var_41_arg_0 ? var_41_arg_1 : var_41_arg_2; [L110] SORT_1 next_42_arg_1 = var_41; [L111] SORT_1 var_43_arg_0 = state_25; [L112] SORT_1 var_43_arg_1 = var_3; [L113] SORT_1 var_43_arg_2 = state_13; [L114] EXPR var_43_arg_0 ? var_43_arg_1 : var_43_arg_2 [L114] SORT_1 var_43 = var_43_arg_0 ? var_43_arg_1 : var_43_arg_2; [L115] SORT_1 next_44_arg_1 = var_43; [L116] SORT_27 var_46_arg_0 = state_29; [L117] SORT_27 var_46_arg_1 = var_45; [L118] SORT_1 var_46 = var_46_arg_0 < var_46_arg_1; [L119] SORT_1 var_47_arg_0 = state_19; [L120] SORT_1 var_47_arg_1 = var_46; [L121] SORT_1 var_47 = var_47_arg_0 & var_47_arg_1; [L122] SORT_1 var_48_arg_0 = state_13; [L123] SORT_1 var_48_arg_1 = var_47; [L124] SORT_1 var_48 = var_48_arg_0 | var_48_arg_1; [L125] SORT_1 var_49_arg_0 = state_25; [L126] SORT_1 var_49_arg_1 = var_48; [L127] SORT_1 var_49_arg_2 = state_15; [L128] EXPR var_49_arg_0 ? var_49_arg_1 : var_49_arg_2 [L128] SORT_1 var_49 = var_49_arg_0 ? var_49_arg_1 : var_49_arg_2; [L129] var_49 = var_49 & mask_SORT_1 [L130] SORT_1 next_50_arg_1 = var_49; [L131] SORT_27 var_51_arg_0 = state_29; [L132] SORT_27 var_51_arg_1 = var_32; [L133] SORT_1 var_51 = var_51_arg_0 < var_51_arg_1; [L134] SORT_1 var_52_arg_0 = state_15; [L135] SORT_1 var_52_arg_1 = var_51; [L136] SORT_1 var_52 = var_52_arg_0 & var_52_arg_1; [L137] SORT_1 var_53_arg_0 = state_25; [L138] SORT_1 var_53_arg_1 = var_52; [L139] SORT_1 var_53_arg_2 = state_17; [L140] EXPR var_53_arg_0 ? var_53_arg_1 : var_53_arg_2 [L140] SORT_1 var_53 = var_53_arg_0 ? var_53_arg_1 : var_53_arg_2; [L141] SORT_1 next_54_arg_1 = var_53; [L142] SORT_1 var_55_arg_0 = state_25; [L143] SORT_1 var_55_arg_1 = state_17; [L144] SORT_1 var_55_arg_2 = state_19; [L145] EXPR var_55_arg_0 ? var_55_arg_1 : var_55_arg_2 [L145] SORT_1 var_55 = var_55_arg_0 ? var_55_arg_1 : var_55_arg_2; [L146] SORT_1 next_56_arg_1 = var_55; [L147] SORT_27 var_57_arg_0 = state_29; [L148] SORT_27 var_57_arg_1 = var_45; [L149] SORT_1 var_57 = var_57_arg_0 < var_57_arg_1; [L150] SORT_1 var_58_arg_0 = var_57; [L151] SORT_1 var_58 = ~var_58_arg_0; [L152] SORT_1 var_59_arg_0 = state_19; [L153] SORT_1 var_59_arg_1 = var_58; [L154] SORT_1 var_59 = var_59_arg_0 & var_59_arg_1; [L155] SORT_1 var_60_arg_0 = state_25; [L156] SORT_1 var_60_arg_1 = var_59; [L157] SORT_1 var_60_arg_2 = state_21; [L158] EXPR var_60_arg_0 ? var_60_arg_1 : var_60_arg_2 [L158] SORT_1 var_60 = var_60_arg_0 ? var_60_arg_1 : var_60_arg_2; [L159] SORT_1 next_61_arg_1 = var_60; [L160] SORT_27 var_62_arg_0 = state_29; [L161] SORT_27 var_62_arg_1 = var_32; [L162] SORT_1 var_62 = var_62_arg_0 < var_62_arg_1; [L163] SORT_1 var_63_arg_0 = state_21; [L164] SORT_1 var_63_arg_1 = var_62; [L165] SORT_1 var_63 = var_63_arg_0 & var_63_arg_1; [L166] SORT_1 var_64_arg_0 = state_23; [L167] SORT_1 var_64_arg_1 = var_63; [L168] SORT_1 var_64 = var_64_arg_0 | var_64_arg_1; [L169] SORT_1 var_65_arg_0 = state_25; [L170] SORT_1 var_65_arg_1 = var_64; [L171] SORT_1 var_65_arg_2 = state_23; [L172] EXPR var_65_arg_0 ? var_65_arg_1 : var_65_arg_2 [L172] SORT_1 var_65 = var_65_arg_0 ? var_65_arg_1 : var_65_arg_2; [L173] SORT_1 next_66_arg_1 = var_65; [L174] SORT_1 var_67_arg_0 = state_15; [L175] SORT_1 var_67 = ~var_67_arg_0; [L176] SORT_1 var_68_arg_0 = state_13; [L177] SORT_1 var_68_arg_1 = var_67; [L178] SORT_1 var_68 = var_68_arg_0 & var_68_arg_1; [L179] SORT_1 var_69_arg_0 = state_17; [L180] SORT_1 var_69 = ~var_69_arg_0; [L181] SORT_1 var_70_arg_0 = var_68; [L182] SORT_1 var_70_arg_1 = var_69; [L183] SORT_1 var_70 = var_70_arg_0 & var_70_arg_1; [L184] SORT_1 var_71_arg_0 = state_19; [L185] SORT_1 var_71 = ~var_71_arg_0; [L186] SORT_1 var_72_arg_0 = var_70; [L187] SORT_1 var_72_arg_1 = var_71; [L188] SORT_1 var_72 = var_72_arg_0 & var_72_arg_1; [L189] SORT_1 var_73_arg_0 = state_21; [L190] SORT_1 var_73 = ~var_73_arg_0; [L191] SORT_1 var_74_arg_0 = var_72; [L192] SORT_1 var_74_arg_1 = var_73; [L193] SORT_1 var_74 = var_74_arg_0 & var_74_arg_1; [L194] SORT_1 var_75_arg_0 = state_23; [L195] SORT_1 var_75 = ~var_75_arg_0; [L196] SORT_1 var_76_arg_0 = var_74; [L197] SORT_1 var_76_arg_1 = var_75; [L198] SORT_1 var_76 = var_76_arg_0 & var_76_arg_1; [L199] SORT_1 var_77_arg_0 = state_4; [L200] SORT_1 var_77 = ~var_77_arg_0; [L201] SORT_1 var_78_arg_0 = var_76; [L202] SORT_1 var_78_arg_1 = var_77; [L203] SORT_1 var_78 = var_78_arg_0 & var_78_arg_1; [L204] SORT_1 var_79_arg_0 = state_13; [L205] SORT_1 var_79 = ~var_79_arg_0; [L206] SORT_1 var_80_arg_0 = var_79; [L207] SORT_1 var_80_arg_1 = state_15; [L208] SORT_1 var_80 = var_80_arg_0 & var_80_arg_1; [L209] SORT_1 var_81_arg_0 = state_17; [L210] SORT_1 var_81 = ~var_81_arg_0; [L211] SORT_1 var_82_arg_0 = var_80; [L212] SORT_1 var_82_arg_1 = var_81; [L213] SORT_1 var_82 = var_82_arg_0 & var_82_arg_1; [L214] SORT_1 var_83_arg_0 = state_19; [L215] SORT_1 var_83 = ~var_83_arg_0; [L216] SORT_1 var_84_arg_0 = var_82; [L217] SORT_1 var_84_arg_1 = var_83; [L218] SORT_1 var_84 = var_84_arg_0 & var_84_arg_1; [L219] SORT_1 var_85_arg_0 = state_21; [L220] SORT_1 var_85 = ~var_85_arg_0; [L221] SORT_1 var_86_arg_0 = var_84; [L222] SORT_1 var_86_arg_1 = var_85; [L223] SORT_1 var_86 = var_86_arg_0 & var_86_arg_1; [L224] SORT_1 var_87_arg_0 = state_23; [L225] SORT_1 var_87 = ~var_87_arg_0; [L226] SORT_1 var_88_arg_0 = var_86; [L227] SORT_1 var_88_arg_1 = var_87; [L228] SORT_1 var_88 = var_88_arg_0 & var_88_arg_1; [L229] SORT_1 var_89_arg_0 = state_4; [L230] SORT_1 var_89 = ~var_89_arg_0; [L231] SORT_1 var_90_arg_0 = var_88; [L232] SORT_1 var_90_arg_1 = var_89; [L233] SORT_1 var_90 = var_90_arg_0 & var_90_arg_1; [L234] SORT_1 var_91_arg_0 = var_78; [L235] SORT_1 var_91_arg_1 = var_90; [L236] SORT_1 var_91 = var_91_arg_0 | var_91_arg_1; [L237] SORT_1 var_92_arg_0 = state_13; [L238] SORT_1 var_92 = ~var_92_arg_0; [L239] SORT_1 var_93_arg_0 = state_15; [L240] SORT_1 var_93 = ~var_93_arg_0; [L241] SORT_1 var_94_arg_0 = var_92; [L242] SORT_1 var_94_arg_1 = var_93; [L243] SORT_1 var_94 = var_94_arg_0 & var_94_arg_1; [L244] SORT_1 var_95_arg_0 = var_94; [L245] SORT_1 var_95_arg_1 = state_17; [L246] SORT_1 var_95 = var_95_arg_0 & var_95_arg_1; [L247] SORT_1 var_96_arg_0 = state_19; [L248] SORT_1 var_96 = ~var_96_arg_0; [L249] SORT_1 var_97_arg_0 = var_95; [L250] SORT_1 var_97_arg_1 = var_96; [L251] SORT_1 var_97 = var_97_arg_0 & var_97_arg_1; [L252] SORT_1 var_98_arg_0 = state_21; [L253] SORT_1 var_98 = ~var_98_arg_0; [L254] SORT_1 var_99_arg_0 = var_97; [L255] SORT_1 var_99_arg_1 = var_98; [L256] SORT_1 var_99 = var_99_arg_0 & var_99_arg_1; [L257] SORT_1 var_100_arg_0 = state_23; [L258] SORT_1 var_100 = ~var_100_arg_0; [L259] SORT_1 var_101_arg_0 = var_99; [L260] SORT_1 var_101_arg_1 = var_100; [L261] SORT_1 var_101 = var_101_arg_0 & var_101_arg_1; [L262] SORT_1 var_102_arg_0 = state_4; [L263] SORT_1 var_102 = ~var_102_arg_0; [L264] SORT_1 var_103_arg_0 = var_101; [L265] SORT_1 var_103_arg_1 = var_102; [L266] SORT_1 var_103 = var_103_arg_0 & var_103_arg_1; [L267] SORT_1 var_104_arg_0 = var_91; [L268] SORT_1 var_104_arg_1 = var_103; [L269] SORT_1 var_104 = var_104_arg_0 | var_104_arg_1; [L270] SORT_1 var_105_arg_0 = state_13; [L271] SORT_1 var_105 = ~var_105_arg_0; [L272] SORT_1 var_106_arg_0 = state_15; [L273] SORT_1 var_106 = ~var_106_arg_0; [L274] SORT_1 var_107_arg_0 = var_105; [L275] SORT_1 var_107_arg_1 = var_106; [L276] SORT_1 var_107 = var_107_arg_0 & var_107_arg_1; [L277] SORT_1 var_108_arg_0 = state_17; [L278] SORT_1 var_108 = ~var_108_arg_0; [L279] SORT_1 var_109_arg_0 = var_107; [L280] SORT_1 var_109_arg_1 = var_108; [L281] SORT_1 var_109 = var_109_arg_0 & var_109_arg_1; [L282] SORT_1 var_110_arg_0 = var_109; [L283] SORT_1 var_110_arg_1 = state_19; [L284] SORT_1 var_110 = var_110_arg_0 & var_110_arg_1; [L285] SORT_1 var_111_arg_0 = state_21; [L286] SORT_1 var_111 = ~var_111_arg_0; [L287] SORT_1 var_112_arg_0 = var_110; [L288] SORT_1 var_112_arg_1 = var_111; [L289] SORT_1 var_112 = var_112_arg_0 & var_112_arg_1; [L290] SORT_1 var_113_arg_0 = state_23; [L291] SORT_1 var_113 = ~var_113_arg_0; [L292] SORT_1 var_114_arg_0 = var_112; [L293] SORT_1 var_114_arg_1 = var_113; [L294] SORT_1 var_114 = var_114_arg_0 & var_114_arg_1; [L295] SORT_1 var_115_arg_0 = state_4; [L296] SORT_1 var_115 = ~var_115_arg_0; [L297] SORT_1 var_116_arg_0 = var_114; [L298] SORT_1 var_116_arg_1 = var_115; [L299] SORT_1 var_116 = var_116_arg_0 & var_116_arg_1; [L300] SORT_1 var_117_arg_0 = var_104; [L301] SORT_1 var_117_arg_1 = var_116; [L302] SORT_1 var_117 = var_117_arg_0 | var_117_arg_1; [L303] SORT_1 var_118_arg_0 = state_13; [L304] SORT_1 var_118 = ~var_118_arg_0; [L305] SORT_1 var_119_arg_0 = state_15; [L306] SORT_1 var_119 = ~var_119_arg_0; [L307] SORT_1 var_120_arg_0 = var_118; [L308] SORT_1 var_120_arg_1 = var_119; [L309] SORT_1 var_120 = var_120_arg_0 & var_120_arg_1; [L310] SORT_1 var_121_arg_0 = state_17; [L311] SORT_1 var_121 = ~var_121_arg_0; [L312] SORT_1 var_122_arg_0 = var_120; [L313] SORT_1 var_122_arg_1 = var_121; [L314] SORT_1 var_122 = var_122_arg_0 & var_122_arg_1; [L315] SORT_1 var_123_arg_0 = state_19; [L316] SORT_1 var_123 = ~var_123_arg_0; [L317] SORT_1 var_124_arg_0 = var_122; [L318] SORT_1 var_124_arg_1 = var_123; [L319] SORT_1 var_124 = var_124_arg_0 & var_124_arg_1; [L320] SORT_1 var_125_arg_0 = var_124; [L321] SORT_1 var_125_arg_1 = state_21; [L322] SORT_1 var_125 = var_125_arg_0 & var_125_arg_1; [L323] SORT_1 var_126_arg_0 = state_23; [L324] SORT_1 var_126 = ~var_126_arg_0; [L325] SORT_1 var_127_arg_0 = var_125; [L326] SORT_1 var_127_arg_1 = var_126; [L327] SORT_1 var_127 = var_127_arg_0 & var_127_arg_1; [L328] SORT_1 var_128_arg_0 = state_4; [L329] SORT_1 var_128 = ~var_128_arg_0; [L330] SORT_1 var_129_arg_0 = var_127; [L331] SORT_1 var_129_arg_1 = var_128; [L332] SORT_1 var_129 = var_129_arg_0 & var_129_arg_1; [L333] SORT_1 var_130_arg_0 = var_117; [L334] SORT_1 var_130_arg_1 = var_129; [L335] SORT_1 var_130 = var_130_arg_0 | var_130_arg_1; [L336] SORT_1 var_131_arg_0 = state_13; [L337] SORT_1 var_131 = ~var_131_arg_0; [L338] SORT_1 var_132_arg_0 = state_15; [L339] SORT_1 var_132 = ~var_132_arg_0; [L340] SORT_1 var_133_arg_0 = var_131; [L341] SORT_1 var_133_arg_1 = var_132; [L342] SORT_1 var_133 = var_133_arg_0 & var_133_arg_1; [L343] SORT_1 var_134_arg_0 = state_17; [L344] SORT_1 var_134 = ~var_134_arg_0; [L345] SORT_1 var_135_arg_0 = var_133; [L346] SORT_1 var_135_arg_1 = var_134; [L347] SORT_1 var_135 = var_135_arg_0 & var_135_arg_1; [L348] SORT_1 var_136_arg_0 = state_19; [L349] SORT_1 var_136 = ~var_136_arg_0; [L350] SORT_1 var_137_arg_0 = var_135; [L351] SORT_1 var_137_arg_1 = var_136; [L352] SORT_1 var_137 = var_137_arg_0 & var_137_arg_1; [L353] SORT_1 var_138_arg_0 = state_21; [L354] SORT_1 var_138 = ~var_138_arg_0; [L355] SORT_1 var_139_arg_0 = var_137; [L356] SORT_1 var_139_arg_1 = var_138; [L357] SORT_1 var_139 = var_139_arg_0 & var_139_arg_1; [L358] SORT_1 var_140_arg_0 = var_139; [L359] SORT_1 var_140_arg_1 = state_23; [L360] SORT_1 var_140 = var_140_arg_0 & var_140_arg_1; [L361] SORT_1 var_141_arg_0 = state_4; [L362] SORT_1 var_141 = ~var_141_arg_0; [L363] SORT_1 var_142_arg_0 = var_140; [L364] SORT_1 var_142_arg_1 = var_141; [L365] SORT_1 var_142 = var_142_arg_0 & var_142_arg_1; [L366] SORT_1 var_143_arg_0 = var_130; [L367] SORT_1 var_143_arg_1 = var_142; [L368] SORT_1 var_143 = var_143_arg_0 | var_143_arg_1; [L369] SORT_1 var_144_arg_0 = state_13; [L370] SORT_1 var_144 = ~var_144_arg_0; [L371] SORT_1 var_145_arg_0 = state_15; [L372] SORT_1 var_145 = ~var_145_arg_0; [L373] SORT_1 var_146_arg_0 = var_144; [L374] SORT_1 var_146_arg_1 = var_145; [L375] SORT_1 var_146 = var_146_arg_0 & var_146_arg_1; [L376] SORT_1 var_147_arg_0 = state_17; [L377] SORT_1 var_147 = ~var_147_arg_0; [L378] SORT_1 var_148_arg_0 = var_146; [L379] SORT_1 var_148_arg_1 = var_147; [L380] SORT_1 var_148 = var_148_arg_0 & var_148_arg_1; [L381] SORT_1 var_149_arg_0 = state_19; [L382] SORT_1 var_149 = ~var_149_arg_0; [L383] SORT_1 var_150_arg_0 = var_148; [L384] SORT_1 var_150_arg_1 = var_149; [L385] SORT_1 var_150 = var_150_arg_0 & var_150_arg_1; [L386] SORT_1 var_151_arg_0 = state_21; [L387] SORT_1 var_151 = ~var_151_arg_0; [L388] SORT_1 var_152_arg_0 = var_150; [L389] SORT_1 var_152_arg_1 = var_151; [L390] SORT_1 var_152 = var_152_arg_0 & var_152_arg_1; [L391] SORT_1 var_153_arg_0 = state_23; [L392] SORT_1 var_153 = ~var_153_arg_0; [L393] SORT_1 var_154_arg_0 = var_152; [L394] SORT_1 var_154_arg_1 = var_153; [L395] SORT_1 var_154 = var_154_arg_0 & var_154_arg_1; [L396] SORT_1 var_155_arg_0 = var_154; [L397] SORT_1 var_155_arg_1 = state_4; [L398] SORT_1 var_155 = var_155_arg_0 & var_155_arg_1; [L399] SORT_1 var_156_arg_0 = var_143; [L400] SORT_1 var_156_arg_1 = var_155; [L401] SORT_1 var_156 = var_156_arg_0 | var_156_arg_1; [L402] var_156 = var_156 & mask_SORT_1 [L403] SORT_1 next_157_arg_1 = var_156; [L404] SORT_27 var_160_arg_0 = state_29; [L405] SORT_27 var_160_arg_1 = var_32; [L406] SORT_1 var_160 = var_160_arg_0 < var_160_arg_1; [L407] SORT_27 var_159_arg_0 = state_29; [L408] SORT_27 var_159_arg_1 = var_158; [L409] SORT_27 var_159 = var_159_arg_0 + var_159_arg_1; [L410] SORT_1 var_161_arg_0 = var_160; [L411] SORT_27 var_161_arg_1 = var_159; [L412] SORT_27 var_161_arg_2 = state_29; [L413] EXPR var_161_arg_0 ? var_161_arg_1 : var_161_arg_2 [L413] SORT_27 var_161 = var_161_arg_0 ? var_161_arg_1 : var_161_arg_2; [L414] SORT_1 var_162_arg_0 = state_15; [L415] SORT_27 var_162_arg_1 = var_161; [L416] SORT_27 var_162_arg_2 = state_29; [L417] EXPR var_162_arg_0 ? var_162_arg_1 : var_162_arg_2 [L417] SORT_27 var_162 = var_162_arg_0 ? var_162_arg_1 : var_162_arg_2; [L418] SORT_1 var_163_arg_0 = state_25; [L419] SORT_27 var_163_arg_1 = var_162; [L420] SORT_27 var_163_arg_2 = state_29; [L421] EXPR var_163_arg_0 ? var_163_arg_1 : var_163_arg_2 [L421] SORT_27 var_163 = var_163_arg_0 ? var_163_arg_1 : var_163_arg_2; [L422] var_163 = var_163 & mask_SORT_27 [L423] SORT_27 next_164_arg_1 = var_163; [L425] state_4 = next_42_arg_1 [L426] state_13 = next_44_arg_1 [L427] state_15 = next_50_arg_1 [L428] state_17 = next_54_arg_1 [L429] state_19 = next_56_arg_1 [L430] state_21 = next_61_arg_1 [L431] state_23 = next_66_arg_1 [L432] state_25 = next_157_arg_1 [L433] state_29 = next_164_arg_1 [L70] input_2 = __VERIFIER_nondet_uchar() [L73] SORT_1 var_6_arg_0 = state_4; [L74] SORT_1 var_6 = ~var_6_arg_0; [L75] SORT_1 var_10_arg_0 = var_6; [L76] SORT_1 var_10 = ~var_10_arg_0; [L77] SORT_1 var_11_arg_0 = var_9; [L78] SORT_1 var_11_arg_1 = var_10; [L79] SORT_1 var_11 = var_11_arg_0 & var_11_arg_1; [L80] var_11 = var_11 & mask_SORT_1 [L81] SORT_1 bad_12_arg_0 = var_11; [L82] CALL __VERIFIER_assert(!(bad_12_arg_0)) [L20] COND FALSE !(!(cond)) [L82] RET __VERIFIER_assert(!(bad_12_arg_0)) [L84] SORT_27 var_33_arg_0 = state_29; [L85] SORT_27 var_33_arg_1 = var_32; [L86] SORT_1 var_33 = var_33_arg_0 < var_33_arg_1; [L87] SORT_1 var_34_arg_0 = var_33; [L88] SORT_1 var_34 = ~var_34_arg_0; [L89] SORT_1 var_35_arg_0 = state_15; [L90] SORT_1 var_35_arg_1 = var_34; [L91] SORT_1 var_35 = var_35_arg_0 & var_35_arg_1; [L92] SORT_1 var_36_arg_0 = state_4; [L93] SORT_1 var_36_arg_1 = var_35; [L94] SORT_1 var_36 = var_36_arg_0 | var_36_arg_1; [L95] SORT_27 var_37_arg_0 = state_29; [L96] SORT_27 var_37_arg_1 = var_32; [L97] SORT_1 var_37 = var_37_arg_0 < var_37_arg_1; [L98] SORT_1 var_38_arg_0 = var_37; [L99] SORT_1 var_38 = ~var_38_arg_0; [L100] SORT_1 var_39_arg_0 = state_21; [L101] SORT_1 var_39_arg_1 = var_38; [L102] SORT_1 var_39 = var_39_arg_0 & var_39_arg_1; [L103] SORT_1 var_40_arg_0 = var_36; [L104] SORT_1 var_40_arg_1 = var_39; [L105] SORT_1 var_40 = var_40_arg_0 | var_40_arg_1; [L106] SORT_1 var_41_arg_0 = state_25; [L107] SORT_1 var_41_arg_1 = var_40; [L108] SORT_1 var_41_arg_2 = state_4; [L109] EXPR var_41_arg_0 ? var_41_arg_1 : var_41_arg_2 [L109] SORT_1 var_41 = var_41_arg_0 ? var_41_arg_1 : var_41_arg_2; [L110] SORT_1 next_42_arg_1 = var_41; [L111] SORT_1 var_43_arg_0 = state_25; [L112] SORT_1 var_43_arg_1 = var_3; [L113] SORT_1 var_43_arg_2 = state_13; [L114] EXPR var_43_arg_0 ? var_43_arg_1 : var_43_arg_2 [L114] SORT_1 var_43 = var_43_arg_0 ? var_43_arg_1 : var_43_arg_2; [L115] SORT_1 next_44_arg_1 = var_43; [L116] SORT_27 var_46_arg_0 = state_29; [L117] SORT_27 var_46_arg_1 = var_45; [L118] SORT_1 var_46 = var_46_arg_0 < var_46_arg_1; [L119] SORT_1 var_47_arg_0 = state_19; [L120] SORT_1 var_47_arg_1 = var_46; [L121] SORT_1 var_47 = var_47_arg_0 & var_47_arg_1; [L122] SORT_1 var_48_arg_0 = state_13; [L123] SORT_1 var_48_arg_1 = var_47; [L124] SORT_1 var_48 = var_48_arg_0 | var_48_arg_1; [L125] SORT_1 var_49_arg_0 = state_25; [L126] SORT_1 var_49_arg_1 = var_48; [L127] SORT_1 var_49_arg_2 = state_15; [L128] EXPR var_49_arg_0 ? var_49_arg_1 : var_49_arg_2 [L128] SORT_1 var_49 = var_49_arg_0 ? var_49_arg_1 : var_49_arg_2; [L129] var_49 = var_49 & mask_SORT_1 [L130] SORT_1 next_50_arg_1 = var_49; [L131] SORT_27 var_51_arg_0 = state_29; [L132] SORT_27 var_51_arg_1 = var_32; [L133] SORT_1 var_51 = var_51_arg_0 < var_51_arg_1; [L134] SORT_1 var_52_arg_0 = state_15; [L135] SORT_1 var_52_arg_1 = var_51; [L136] SORT_1 var_52 = var_52_arg_0 & var_52_arg_1; [L137] SORT_1 var_53_arg_0 = state_25; [L138] SORT_1 var_53_arg_1 = var_52; [L139] SORT_1 var_53_arg_2 = state_17; [L140] EXPR var_53_arg_0 ? var_53_arg_1 : var_53_arg_2 [L140] SORT_1 var_53 = var_53_arg_0 ? var_53_arg_1 : var_53_arg_2; [L141] SORT_1 next_54_arg_1 = var_53; [L142] SORT_1 var_55_arg_0 = state_25; [L143] SORT_1 var_55_arg_1 = state_17; [L144] SORT_1 var_55_arg_2 = state_19; [L145] EXPR var_55_arg_0 ? var_55_arg_1 : var_55_arg_2 [L145] SORT_1 var_55 = var_55_arg_0 ? var_55_arg_1 : var_55_arg_2; [L146] SORT_1 next_56_arg_1 = var_55; [L147] SORT_27 var_57_arg_0 = state_29; [L148] SORT_27 var_57_arg_1 = var_45; [L149] SORT_1 var_57 = var_57_arg_0 < var_57_arg_1; [L150] SORT_1 var_58_arg_0 = var_57; [L151] SORT_1 var_58 = ~var_58_arg_0; [L152] SORT_1 var_59_arg_0 = state_19; [L153] SORT_1 var_59_arg_1 = var_58; [L154] SORT_1 var_59 = var_59_arg_0 & var_59_arg_1; [L155] SORT_1 var_60_arg_0 = state_25; [L156] SORT_1 var_60_arg_1 = var_59; [L157] SORT_1 var_60_arg_2 = state_21; [L158] EXPR var_60_arg_0 ? var_60_arg_1 : var_60_arg_2 [L158] SORT_1 var_60 = var_60_arg_0 ? var_60_arg_1 : var_60_arg_2; [L159] SORT_1 next_61_arg_1 = var_60; [L160] SORT_27 var_62_arg_0 = state_29; [L161] SORT_27 var_62_arg_1 = var_32; [L162] SORT_1 var_62 = var_62_arg_0 < var_62_arg_1; [L163] SORT_1 var_63_arg_0 = state_21; [L164] SORT_1 var_63_arg_1 = var_62; [L165] SORT_1 var_63 = var_63_arg_0 & var_63_arg_1; [L166] SORT_1 var_64_arg_0 = state_23; [L167] SORT_1 var_64_arg_1 = var_63; [L168] SORT_1 var_64 = var_64_arg_0 | var_64_arg_1; [L169] SORT_1 var_65_arg_0 = state_25; [L170] SORT_1 var_65_arg_1 = var_64; [L171] SORT_1 var_65_arg_2 = state_23; [L172] EXPR var_65_arg_0 ? var_65_arg_1 : var_65_arg_2 [L172] SORT_1 var_65 = var_65_arg_0 ? var_65_arg_1 : var_65_arg_2; [L173] SORT_1 next_66_arg_1 = var_65; [L174] SORT_1 var_67_arg_0 = state_15; [L175] SORT_1 var_67 = ~var_67_arg_0; [L176] SORT_1 var_68_arg_0 = state_13; [L177] SORT_1 var_68_arg_1 = var_67; [L178] SORT_1 var_68 = var_68_arg_0 & var_68_arg_1; [L179] SORT_1 var_69_arg_0 = state_17; [L180] SORT_1 var_69 = ~var_69_arg_0; [L181] SORT_1 var_70_arg_0 = var_68; [L182] SORT_1 var_70_arg_1 = var_69; [L183] SORT_1 var_70 = var_70_arg_0 & var_70_arg_1; [L184] SORT_1 var_71_arg_0 = state_19; [L185] SORT_1 var_71 = ~var_71_arg_0; [L186] SORT_1 var_72_arg_0 = var_70; [L187] SORT_1 var_72_arg_1 = var_71; [L188] SORT_1 var_72 = var_72_arg_0 & var_72_arg_1; [L189] SORT_1 var_73_arg_0 = state_21; [L190] SORT_1 var_73 = ~var_73_arg_0; [L191] SORT_1 var_74_arg_0 = var_72; [L192] SORT_1 var_74_arg_1 = var_73; [L193] SORT_1 var_74 = var_74_arg_0 & var_74_arg_1; [L194] SORT_1 var_75_arg_0 = state_23; [L195] SORT_1 var_75 = ~var_75_arg_0; [L196] SORT_1 var_76_arg_0 = var_74; [L197] SORT_1 var_76_arg_1 = var_75; [L198] SORT_1 var_76 = var_76_arg_0 & var_76_arg_1; [L199] SORT_1 var_77_arg_0 = state_4; [L200] SORT_1 var_77 = ~var_77_arg_0; [L201] SORT_1 var_78_arg_0 = var_76; [L202] SORT_1 var_78_arg_1 = var_77; [L203] SORT_1 var_78 = var_78_arg_0 & var_78_arg_1; [L204] SORT_1 var_79_arg_0 = state_13; [L205] SORT_1 var_79 = ~var_79_arg_0; [L206] SORT_1 var_80_arg_0 = var_79; [L207] SORT_1 var_80_arg_1 = state_15; [L208] SORT_1 var_80 = var_80_arg_0 & var_80_arg_1; [L209] SORT_1 var_81_arg_0 = state_17; [L210] SORT_1 var_81 = ~var_81_arg_0; [L211] SORT_1 var_82_arg_0 = var_80; [L212] SORT_1 var_82_arg_1 = var_81; [L213] SORT_1 var_82 = var_82_arg_0 & var_82_arg_1; [L214] SORT_1 var_83_arg_0 = state_19; [L215] SORT_1 var_83 = ~var_83_arg_0; [L216] SORT_1 var_84_arg_0 = var_82; [L217] SORT_1 var_84_arg_1 = var_83; [L218] SORT_1 var_84 = var_84_arg_0 & var_84_arg_1; [L219] SORT_1 var_85_arg_0 = state_21; [L220] SORT_1 var_85 = ~var_85_arg_0; [L221] SORT_1 var_86_arg_0 = var_84; [L222] SORT_1 var_86_arg_1 = var_85; [L223] SORT_1 var_86 = var_86_arg_0 & var_86_arg_1; [L224] SORT_1 var_87_arg_0 = state_23; [L225] SORT_1 var_87 = ~var_87_arg_0; [L226] SORT_1 var_88_arg_0 = var_86; [L227] SORT_1 var_88_arg_1 = var_87; [L228] SORT_1 var_88 = var_88_arg_0 & var_88_arg_1; [L229] SORT_1 var_89_arg_0 = state_4; [L230] SORT_1 var_89 = ~var_89_arg_0; [L231] SORT_1 var_90_arg_0 = var_88; [L232] SORT_1 var_90_arg_1 = var_89; [L233] SORT_1 var_90 = var_90_arg_0 & var_90_arg_1; [L234] SORT_1 var_91_arg_0 = var_78; [L235] SORT_1 var_91_arg_1 = var_90; [L236] SORT_1 var_91 = var_91_arg_0 | var_91_arg_1; [L237] SORT_1 var_92_arg_0 = state_13; [L238] SORT_1 var_92 = ~var_92_arg_0; [L239] SORT_1 var_93_arg_0 = state_15; [L240] SORT_1 var_93 = ~var_93_arg_0; [L241] SORT_1 var_94_arg_0 = var_92; [L242] SORT_1 var_94_arg_1 = var_93; [L243] SORT_1 var_94 = var_94_arg_0 & var_94_arg_1; [L244] SORT_1 var_95_arg_0 = var_94; [L245] SORT_1 var_95_arg_1 = state_17; [L246] SORT_1 var_95 = var_95_arg_0 & var_95_arg_1; [L247] SORT_1 var_96_arg_0 = state_19; [L248] SORT_1 var_96 = ~var_96_arg_0; [L249] SORT_1 var_97_arg_0 = var_95; [L250] SORT_1 var_97_arg_1 = var_96; [L251] SORT_1 var_97 = var_97_arg_0 & var_97_arg_1; [L252] SORT_1 var_98_arg_0 = state_21; [L253] SORT_1 var_98 = ~var_98_arg_0; [L254] SORT_1 var_99_arg_0 = var_97; [L255] SORT_1 var_99_arg_1 = var_98; [L256] SORT_1 var_99 = var_99_arg_0 & var_99_arg_1; [L257] SORT_1 var_100_arg_0 = state_23; [L258] SORT_1 var_100 = ~var_100_arg_0; [L259] SORT_1 var_101_arg_0 = var_99; [L260] SORT_1 var_101_arg_1 = var_100; [L261] SORT_1 var_101 = var_101_arg_0 & var_101_arg_1; [L262] SORT_1 var_102_arg_0 = state_4; [L263] SORT_1 var_102 = ~var_102_arg_0; [L264] SORT_1 var_103_arg_0 = var_101; [L265] SORT_1 var_103_arg_1 = var_102; [L266] SORT_1 var_103 = var_103_arg_0 & var_103_arg_1; [L267] SORT_1 var_104_arg_0 = var_91; [L268] SORT_1 var_104_arg_1 = var_103; [L269] SORT_1 var_104 = var_104_arg_0 | var_104_arg_1; [L270] SORT_1 var_105_arg_0 = state_13; [L271] SORT_1 var_105 = ~var_105_arg_0; [L272] SORT_1 var_106_arg_0 = state_15; [L273] SORT_1 var_106 = ~var_106_arg_0; [L274] SORT_1 var_107_arg_0 = var_105; [L275] SORT_1 var_107_arg_1 = var_106; [L276] SORT_1 var_107 = var_107_arg_0 & var_107_arg_1; [L277] SORT_1 var_108_arg_0 = state_17; [L278] SORT_1 var_108 = ~var_108_arg_0; [L279] SORT_1 var_109_arg_0 = var_107; [L280] SORT_1 var_109_arg_1 = var_108; [L281] SORT_1 var_109 = var_109_arg_0 & var_109_arg_1; [L282] SORT_1 var_110_arg_0 = var_109; [L283] SORT_1 var_110_arg_1 = state_19; [L284] SORT_1 var_110 = var_110_arg_0 & var_110_arg_1; [L285] SORT_1 var_111_arg_0 = state_21; [L286] SORT_1 var_111 = ~var_111_arg_0; [L287] SORT_1 var_112_arg_0 = var_110; [L288] SORT_1 var_112_arg_1 = var_111; [L289] SORT_1 var_112 = var_112_arg_0 & var_112_arg_1; [L290] SORT_1 var_113_arg_0 = state_23; [L291] SORT_1 var_113 = ~var_113_arg_0; [L292] SORT_1 var_114_arg_0 = var_112; [L293] SORT_1 var_114_arg_1 = var_113; [L294] SORT_1 var_114 = var_114_arg_0 & var_114_arg_1; [L295] SORT_1 var_115_arg_0 = state_4; [L296] SORT_1 var_115 = ~var_115_arg_0; [L297] SORT_1 var_116_arg_0 = var_114; [L298] SORT_1 var_116_arg_1 = var_115; [L299] SORT_1 var_116 = var_116_arg_0 & var_116_arg_1; [L300] SORT_1 var_117_arg_0 = var_104; [L301] SORT_1 var_117_arg_1 = var_116; [L302] SORT_1 var_117 = var_117_arg_0 | var_117_arg_1; [L303] SORT_1 var_118_arg_0 = state_13; [L304] SORT_1 var_118 = ~var_118_arg_0; [L305] SORT_1 var_119_arg_0 = state_15; [L306] SORT_1 var_119 = ~var_119_arg_0; [L307] SORT_1 var_120_arg_0 = var_118; [L308] SORT_1 var_120_arg_1 = var_119; [L309] SORT_1 var_120 = var_120_arg_0 & var_120_arg_1; [L310] SORT_1 var_121_arg_0 = state_17; [L311] SORT_1 var_121 = ~var_121_arg_0; [L312] SORT_1 var_122_arg_0 = var_120; [L313] SORT_1 var_122_arg_1 = var_121; [L314] SORT_1 var_122 = var_122_arg_0 & var_122_arg_1; [L315] SORT_1 var_123_arg_0 = state_19; [L316] SORT_1 var_123 = ~var_123_arg_0; [L317] SORT_1 var_124_arg_0 = var_122; [L318] SORT_1 var_124_arg_1 = var_123; [L319] SORT_1 var_124 = var_124_arg_0 & var_124_arg_1; [L320] SORT_1 var_125_arg_0 = var_124; [L321] SORT_1 var_125_arg_1 = state_21; [L322] SORT_1 var_125 = var_125_arg_0 & var_125_arg_1; [L323] SORT_1 var_126_arg_0 = state_23; [L324] SORT_1 var_126 = ~var_126_arg_0; [L325] SORT_1 var_127_arg_0 = var_125; [L326] SORT_1 var_127_arg_1 = var_126; [L327] SORT_1 var_127 = var_127_arg_0 & var_127_arg_1; [L328] SORT_1 var_128_arg_0 = state_4; [L329] SORT_1 var_128 = ~var_128_arg_0; [L330] SORT_1 var_129_arg_0 = var_127; [L331] SORT_1 var_129_arg_1 = var_128; [L332] SORT_1 var_129 = var_129_arg_0 & var_129_arg_1; [L333] SORT_1 var_130_arg_0 = var_117; [L334] SORT_1 var_130_arg_1 = var_129; [L335] SORT_1 var_130 = var_130_arg_0 | var_130_arg_1; [L336] SORT_1 var_131_arg_0 = state_13; [L337] SORT_1 var_131 = ~var_131_arg_0; [L338] SORT_1 var_132_arg_0 = state_15; [L339] SORT_1 var_132 = ~var_132_arg_0; [L340] SORT_1 var_133_arg_0 = var_131; [L341] SORT_1 var_133_arg_1 = var_132; [L342] SORT_1 var_133 = var_133_arg_0 & var_133_arg_1; [L343] SORT_1 var_134_arg_0 = state_17; [L344] SORT_1 var_134 = ~var_134_arg_0; [L345] SORT_1 var_135_arg_0 = var_133; [L346] SORT_1 var_135_arg_1 = var_134; [L347] SORT_1 var_135 = var_135_arg_0 & var_135_arg_1; [L348] SORT_1 var_136_arg_0 = state_19; [L349] SORT_1 var_136 = ~var_136_arg_0; [L350] SORT_1 var_137_arg_0 = var_135; [L351] SORT_1 var_137_arg_1 = var_136; [L352] SORT_1 var_137 = var_137_arg_0 & var_137_arg_1; [L353] SORT_1 var_138_arg_0 = state_21; [L354] SORT_1 var_138 = ~var_138_arg_0; [L355] SORT_1 var_139_arg_0 = var_137; [L356] SORT_1 var_139_arg_1 = var_138; [L357] SORT_1 var_139 = var_139_arg_0 & var_139_arg_1; [L358] SORT_1 var_140_arg_0 = var_139; [L359] SORT_1 var_140_arg_1 = state_23; [L360] SORT_1 var_140 = var_140_arg_0 & var_140_arg_1; [L361] SORT_1 var_141_arg_0 = state_4; [L362] SORT_1 var_141 = ~var_141_arg_0; [L363] SORT_1 var_142_arg_0 = var_140; [L364] SORT_1 var_142_arg_1 = var_141; [L365] SORT_1 var_142 = var_142_arg_0 & var_142_arg_1; [L366] SORT_1 var_143_arg_0 = var_130; [L367] SORT_1 var_143_arg_1 = var_142; [L368] SORT_1 var_143 = var_143_arg_0 | var_143_arg_1; [L369] SORT_1 var_144_arg_0 = state_13; [L370] SORT_1 var_144 = ~var_144_arg_0; [L371] SORT_1 var_145_arg_0 = state_15; [L372] SORT_1 var_145 = ~var_145_arg_0; [L373] SORT_1 var_146_arg_0 = var_144; [L374] SORT_1 var_146_arg_1 = var_145; [L375] SORT_1 var_146 = var_146_arg_0 & var_146_arg_1; [L376] SORT_1 var_147_arg_0 = state_17; [L377] SORT_1 var_147 = ~var_147_arg_0; [L378] SORT_1 var_148_arg_0 = var_146; [L379] SORT_1 var_148_arg_1 = var_147; [L380] SORT_1 var_148 = var_148_arg_0 & var_148_arg_1; [L381] SORT_1 var_149_arg_0 = state_19; [L382] SORT_1 var_149 = ~var_149_arg_0; [L383] SORT_1 var_150_arg_0 = var_148; [L384] SORT_1 var_150_arg_1 = var_149; [L385] SORT_1 var_150 = var_150_arg_0 & var_150_arg_1; [L386] SORT_1 var_151_arg_0 = state_21; [L387] SORT_1 var_151 = ~var_151_arg_0; [L388] SORT_1 var_152_arg_0 = var_150; [L389] SORT_1 var_152_arg_1 = var_151; [L390] SORT_1 var_152 = var_152_arg_0 & var_152_arg_1; [L391] SORT_1 var_153_arg_0 = state_23; [L392] SORT_1 var_153 = ~var_153_arg_0; [L393] SORT_1 var_154_arg_0 = var_152; [L394] SORT_1 var_154_arg_1 = var_153; [L395] SORT_1 var_154 = var_154_arg_0 & var_154_arg_1; [L396] SORT_1 var_155_arg_0 = var_154; [L397] SORT_1 var_155_arg_1 = state_4; [L398] SORT_1 var_155 = var_155_arg_0 & var_155_arg_1; [L399] SORT_1 var_156_arg_0 = var_143; [L400] SORT_1 var_156_arg_1 = var_155; [L401] SORT_1 var_156 = var_156_arg_0 | var_156_arg_1; [L402] var_156 = var_156 & mask_SORT_1 [L403] SORT_1 next_157_arg_1 = var_156; [L404] SORT_27 var_160_arg_0 = state_29; [L405] SORT_27 var_160_arg_1 = var_32; [L406] SORT_1 var_160 = var_160_arg_0 < var_160_arg_1; [L407] SORT_27 var_159_arg_0 = state_29; [L408] SORT_27 var_159_arg_1 = var_158; [L409] SORT_27 var_159 = var_159_arg_0 + var_159_arg_1; [L410] SORT_1 var_161_arg_0 = var_160; [L411] SORT_27 var_161_arg_1 = var_159; [L412] SORT_27 var_161_arg_2 = state_29; [L413] EXPR var_161_arg_0 ? var_161_arg_1 : var_161_arg_2 [L413] SORT_27 var_161 = var_161_arg_0 ? var_161_arg_1 : var_161_arg_2; [L414] SORT_1 var_162_arg_0 = state_15; [L415] SORT_27 var_162_arg_1 = var_161; [L416] SORT_27 var_162_arg_2 = state_29; [L417] EXPR var_162_arg_0 ? var_162_arg_1 : var_162_arg_2 [L417] SORT_27 var_162 = var_162_arg_0 ? var_162_arg_1 : var_162_arg_2; [L418] SORT_1 var_163_arg_0 = state_25; [L419] SORT_27 var_163_arg_1 = var_162; [L420] SORT_27 var_163_arg_2 = state_29; [L421] EXPR var_163_arg_0 ? var_163_arg_1 : var_163_arg_2 [L421] SORT_27 var_163 = var_163_arg_0 ? var_163_arg_1 : var_163_arg_2; [L422] var_163 = var_163 & mask_SORT_27 [L423] SORT_27 next_164_arg_1 = var_163; [L425] state_4 = next_42_arg_1 [L426] state_13 = next_44_arg_1 [L427] state_15 = next_50_arg_1 [L428] state_17 = next_54_arg_1 [L429] state_19 = next_56_arg_1 [L430] state_21 = next_61_arg_1 [L431] state_23 = next_66_arg_1 [L432] state_25 = next_157_arg_1 [L433] state_29 = next_164_arg_1 [L70] input_2 = __VERIFIER_nondet_uchar() [L73] SORT_1 var_6_arg_0 = state_4; [L74] SORT_1 var_6 = ~var_6_arg_0; [L75] SORT_1 var_10_arg_0 = var_6; [L76] SORT_1 var_10 = ~var_10_arg_0; [L77] SORT_1 var_11_arg_0 = var_9; [L78] SORT_1 var_11_arg_1 = var_10; [L79] SORT_1 var_11 = var_11_arg_0 & var_11_arg_1; [L80] var_11 = var_11 & mask_SORT_1 [L81] SORT_1 bad_12_arg_0 = var_11; [L82] CALL __VERIFIER_assert(!(bad_12_arg_0)) [L20] COND FALSE !(!(cond)) [L82] RET __VERIFIER_assert(!(bad_12_arg_0)) [L84] SORT_27 var_33_arg_0 = state_29; [L85] SORT_27 var_33_arg_1 = var_32; [L86] SORT_1 var_33 = var_33_arg_0 < var_33_arg_1; [L87] SORT_1 var_34_arg_0 = var_33; [L88] SORT_1 var_34 = ~var_34_arg_0; [L89] SORT_1 var_35_arg_0 = state_15; [L90] SORT_1 var_35_arg_1 = var_34; [L91] SORT_1 var_35 = var_35_arg_0 & var_35_arg_1; [L92] SORT_1 var_36_arg_0 = state_4; [L93] SORT_1 var_36_arg_1 = var_35; [L94] SORT_1 var_36 = var_36_arg_0 | var_36_arg_1; [L95] SORT_27 var_37_arg_0 = state_29; [L96] SORT_27 var_37_arg_1 = var_32; [L97] SORT_1 var_37 = var_37_arg_0 < var_37_arg_1; [L98] SORT_1 var_38_arg_0 = var_37; [L99] SORT_1 var_38 = ~var_38_arg_0; [L100] SORT_1 var_39_arg_0 = state_21; [L101] SORT_1 var_39_arg_1 = var_38; [L102] SORT_1 var_39 = var_39_arg_0 & var_39_arg_1; [L103] SORT_1 var_40_arg_0 = var_36; [L104] SORT_1 var_40_arg_1 = var_39; [L105] SORT_1 var_40 = var_40_arg_0 | var_40_arg_1; [L106] SORT_1 var_41_arg_0 = state_25; [L107] SORT_1 var_41_arg_1 = var_40; [L108] SORT_1 var_41_arg_2 = state_4; [L109] EXPR var_41_arg_0 ? var_41_arg_1 : var_41_arg_2 [L109] SORT_1 var_41 = var_41_arg_0 ? var_41_arg_1 : var_41_arg_2; [L110] SORT_1 next_42_arg_1 = var_41; [L111] SORT_1 var_43_arg_0 = state_25; [L112] SORT_1 var_43_arg_1 = var_3; [L113] SORT_1 var_43_arg_2 = state_13; [L114] EXPR var_43_arg_0 ? var_43_arg_1 : var_43_arg_2 [L114] SORT_1 var_43 = var_43_arg_0 ? var_43_arg_1 : var_43_arg_2; [L115] SORT_1 next_44_arg_1 = var_43; [L116] SORT_27 var_46_arg_0 = state_29; [L117] SORT_27 var_46_arg_1 = var_45; [L118] SORT_1 var_46 = var_46_arg_0 < var_46_arg_1; [L119] SORT_1 var_47_arg_0 = state_19; [L120] SORT_1 var_47_arg_1 = var_46; [L121] SORT_1 var_47 = var_47_arg_0 & var_47_arg_1; [L122] SORT_1 var_48_arg_0 = state_13; [L123] SORT_1 var_48_arg_1 = var_47; [L124] SORT_1 var_48 = var_48_arg_0 | var_48_arg_1; [L125] SORT_1 var_49_arg_0 = state_25; [L126] SORT_1 var_49_arg_1 = var_48; [L127] SORT_1 var_49_arg_2 = state_15; [L128] EXPR var_49_arg_0 ? var_49_arg_1 : var_49_arg_2 [L128] SORT_1 var_49 = var_49_arg_0 ? var_49_arg_1 : var_49_arg_2; [L129] var_49 = var_49 & mask_SORT_1 [L130] SORT_1 next_50_arg_1 = var_49; [L131] SORT_27 var_51_arg_0 = state_29; [L132] SORT_27 var_51_arg_1 = var_32; [L133] SORT_1 var_51 = var_51_arg_0 < var_51_arg_1; [L134] SORT_1 var_52_arg_0 = state_15; [L135] SORT_1 var_52_arg_1 = var_51; [L136] SORT_1 var_52 = var_52_arg_0 & var_52_arg_1; [L137] SORT_1 var_53_arg_0 = state_25; [L138] SORT_1 var_53_arg_1 = var_52; [L139] SORT_1 var_53_arg_2 = state_17; [L140] EXPR var_53_arg_0 ? var_53_arg_1 : var_53_arg_2 [L140] SORT_1 var_53 = var_53_arg_0 ? var_53_arg_1 : var_53_arg_2; [L141] SORT_1 next_54_arg_1 = var_53; [L142] SORT_1 var_55_arg_0 = state_25; [L143] SORT_1 var_55_arg_1 = state_17; [L144] SORT_1 var_55_arg_2 = state_19; [L145] EXPR var_55_arg_0 ? var_55_arg_1 : var_55_arg_2 [L145] SORT_1 var_55 = var_55_arg_0 ? var_55_arg_1 : var_55_arg_2; [L146] SORT_1 next_56_arg_1 = var_55; [L147] SORT_27 var_57_arg_0 = state_29; [L148] SORT_27 var_57_arg_1 = var_45; [L149] SORT_1 var_57 = var_57_arg_0 < var_57_arg_1; [L150] SORT_1 var_58_arg_0 = var_57; [L151] SORT_1 var_58 = ~var_58_arg_0; [L152] SORT_1 var_59_arg_0 = state_19; [L153] SORT_1 var_59_arg_1 = var_58; [L154] SORT_1 var_59 = var_59_arg_0 & var_59_arg_1; [L155] SORT_1 var_60_arg_0 = state_25; [L156] SORT_1 var_60_arg_1 = var_59; [L157] SORT_1 var_60_arg_2 = state_21; [L158] EXPR var_60_arg_0 ? var_60_arg_1 : var_60_arg_2 [L158] SORT_1 var_60 = var_60_arg_0 ? var_60_arg_1 : var_60_arg_2; [L159] SORT_1 next_61_arg_1 = var_60; [L160] SORT_27 var_62_arg_0 = state_29; [L161] SORT_27 var_62_arg_1 = var_32; [L162] SORT_1 var_62 = var_62_arg_0 < var_62_arg_1; [L163] SORT_1 var_63_arg_0 = state_21; [L164] SORT_1 var_63_arg_1 = var_62; [L165] SORT_1 var_63 = var_63_arg_0 & var_63_arg_1; [L166] SORT_1 var_64_arg_0 = state_23; [L167] SORT_1 var_64_arg_1 = var_63; [L168] SORT_1 var_64 = var_64_arg_0 | var_64_arg_1; [L169] SORT_1 var_65_arg_0 = state_25; [L170] SORT_1 var_65_arg_1 = var_64; [L171] SORT_1 var_65_arg_2 = state_23; [L172] EXPR var_65_arg_0 ? var_65_arg_1 : var_65_arg_2 [L172] SORT_1 var_65 = var_65_arg_0 ? var_65_arg_1 : var_65_arg_2; [L173] SORT_1 next_66_arg_1 = var_65; [L174] SORT_1 var_67_arg_0 = state_15; [L175] SORT_1 var_67 = ~var_67_arg_0; [L176] SORT_1 var_68_arg_0 = state_13; [L177] SORT_1 var_68_arg_1 = var_67; [L178] SORT_1 var_68 = var_68_arg_0 & var_68_arg_1; [L179] SORT_1 var_69_arg_0 = state_17; [L180] SORT_1 var_69 = ~var_69_arg_0; [L181] SORT_1 var_70_arg_0 = var_68; [L182] SORT_1 var_70_arg_1 = var_69; [L183] SORT_1 var_70 = var_70_arg_0 & var_70_arg_1; [L184] SORT_1 var_71_arg_0 = state_19; [L185] SORT_1 var_71 = ~var_71_arg_0; [L186] SORT_1 var_72_arg_0 = var_70; [L187] SORT_1 var_72_arg_1 = var_71; [L188] SORT_1 var_72 = var_72_arg_0 & var_72_arg_1; [L189] SORT_1 var_73_arg_0 = state_21; [L190] SORT_1 var_73 = ~var_73_arg_0; [L191] SORT_1 var_74_arg_0 = var_72; [L192] SORT_1 var_74_arg_1 = var_73; [L193] SORT_1 var_74 = var_74_arg_0 & var_74_arg_1; [L194] SORT_1 var_75_arg_0 = state_23; [L195] SORT_1 var_75 = ~var_75_arg_0; [L196] SORT_1 var_76_arg_0 = var_74; [L197] SORT_1 var_76_arg_1 = var_75; [L198] SORT_1 var_76 = var_76_arg_0 & var_76_arg_1; [L199] SORT_1 var_77_arg_0 = state_4; [L200] SORT_1 var_77 = ~var_77_arg_0; [L201] SORT_1 var_78_arg_0 = var_76; [L202] SORT_1 var_78_arg_1 = var_77; [L203] SORT_1 var_78 = var_78_arg_0 & var_78_arg_1; [L204] SORT_1 var_79_arg_0 = state_13; [L205] SORT_1 var_79 = ~var_79_arg_0; [L206] SORT_1 var_80_arg_0 = var_79; [L207] SORT_1 var_80_arg_1 = state_15; [L208] SORT_1 var_80 = var_80_arg_0 & var_80_arg_1; [L209] SORT_1 var_81_arg_0 = state_17; [L210] SORT_1 var_81 = ~var_81_arg_0; [L211] SORT_1 var_82_arg_0 = var_80; [L212] SORT_1 var_82_arg_1 = var_81; [L213] SORT_1 var_82 = var_82_arg_0 & var_82_arg_1; [L214] SORT_1 var_83_arg_0 = state_19; [L215] SORT_1 var_83 = ~var_83_arg_0; [L216] SORT_1 var_84_arg_0 = var_82; [L217] SORT_1 var_84_arg_1 = var_83; [L218] SORT_1 var_84 = var_84_arg_0 & var_84_arg_1; [L219] SORT_1 var_85_arg_0 = state_21; [L220] SORT_1 var_85 = ~var_85_arg_0; [L221] SORT_1 var_86_arg_0 = var_84; [L222] SORT_1 var_86_arg_1 = var_85; [L223] SORT_1 var_86 = var_86_arg_0 & var_86_arg_1; [L224] SORT_1 var_87_arg_0 = state_23; [L225] SORT_1 var_87 = ~var_87_arg_0; [L226] SORT_1 var_88_arg_0 = var_86; [L227] SORT_1 var_88_arg_1 = var_87; [L228] SORT_1 var_88 = var_88_arg_0 & var_88_arg_1; [L229] SORT_1 var_89_arg_0 = state_4; [L230] SORT_1 var_89 = ~var_89_arg_0; [L231] SORT_1 var_90_arg_0 = var_88; [L232] SORT_1 var_90_arg_1 = var_89; [L233] SORT_1 var_90 = var_90_arg_0 & var_90_arg_1; [L234] SORT_1 var_91_arg_0 = var_78; [L235] SORT_1 var_91_arg_1 = var_90; [L236] SORT_1 var_91 = var_91_arg_0 | var_91_arg_1; [L237] SORT_1 var_92_arg_0 = state_13; [L238] SORT_1 var_92 = ~var_92_arg_0; [L239] SORT_1 var_93_arg_0 = state_15; [L240] SORT_1 var_93 = ~var_93_arg_0; [L241] SORT_1 var_94_arg_0 = var_92; [L242] SORT_1 var_94_arg_1 = var_93; [L243] SORT_1 var_94 = var_94_arg_0 & var_94_arg_1; [L244] SORT_1 var_95_arg_0 = var_94; [L245] SORT_1 var_95_arg_1 = state_17; [L246] SORT_1 var_95 = var_95_arg_0 & var_95_arg_1; [L247] SORT_1 var_96_arg_0 = state_19; [L248] SORT_1 var_96 = ~var_96_arg_0; [L249] SORT_1 var_97_arg_0 = var_95; [L250] SORT_1 var_97_arg_1 = var_96; [L251] SORT_1 var_97 = var_97_arg_0 & var_97_arg_1; [L252] SORT_1 var_98_arg_0 = state_21; [L253] SORT_1 var_98 = ~var_98_arg_0; [L254] SORT_1 var_99_arg_0 = var_97; [L255] SORT_1 var_99_arg_1 = var_98; [L256] SORT_1 var_99 = var_99_arg_0 & var_99_arg_1; [L257] SORT_1 var_100_arg_0 = state_23; [L258] SORT_1 var_100 = ~var_100_arg_0; [L259] SORT_1 var_101_arg_0 = var_99; [L260] SORT_1 var_101_arg_1 = var_100; [L261] SORT_1 var_101 = var_101_arg_0 & var_101_arg_1; [L262] SORT_1 var_102_arg_0 = state_4; [L263] SORT_1 var_102 = ~var_102_arg_0; [L264] SORT_1 var_103_arg_0 = var_101; [L265] SORT_1 var_103_arg_1 = var_102; [L266] SORT_1 var_103 = var_103_arg_0 & var_103_arg_1; [L267] SORT_1 var_104_arg_0 = var_91; [L268] SORT_1 var_104_arg_1 = var_103; [L269] SORT_1 var_104 = var_104_arg_0 | var_104_arg_1; [L270] SORT_1 var_105_arg_0 = state_13; [L271] SORT_1 var_105 = ~var_105_arg_0; [L272] SORT_1 var_106_arg_0 = state_15; [L273] SORT_1 var_106 = ~var_106_arg_0; [L274] SORT_1 var_107_arg_0 = var_105; [L275] SORT_1 var_107_arg_1 = var_106; [L276] SORT_1 var_107 = var_107_arg_0 & var_107_arg_1; [L277] SORT_1 var_108_arg_0 = state_17; [L278] SORT_1 var_108 = ~var_108_arg_0; [L279] SORT_1 var_109_arg_0 = var_107; [L280] SORT_1 var_109_arg_1 = var_108; [L281] SORT_1 var_109 = var_109_arg_0 & var_109_arg_1; [L282] SORT_1 var_110_arg_0 = var_109; [L283] SORT_1 var_110_arg_1 = state_19; [L284] SORT_1 var_110 = var_110_arg_0 & var_110_arg_1; [L285] SORT_1 var_111_arg_0 = state_21; [L286] SORT_1 var_111 = ~var_111_arg_0; [L287] SORT_1 var_112_arg_0 = var_110; [L288] SORT_1 var_112_arg_1 = var_111; [L289] SORT_1 var_112 = var_112_arg_0 & var_112_arg_1; [L290] SORT_1 var_113_arg_0 = state_23; [L291] SORT_1 var_113 = ~var_113_arg_0; [L292] SORT_1 var_114_arg_0 = var_112; [L293] SORT_1 var_114_arg_1 = var_113; [L294] SORT_1 var_114 = var_114_arg_0 & var_114_arg_1; [L295] SORT_1 var_115_arg_0 = state_4; [L296] SORT_1 var_115 = ~var_115_arg_0; [L297] SORT_1 var_116_arg_0 = var_114; [L298] SORT_1 var_116_arg_1 = var_115; [L299] SORT_1 var_116 = var_116_arg_0 & var_116_arg_1; [L300] SORT_1 var_117_arg_0 = var_104; [L301] SORT_1 var_117_arg_1 = var_116; [L302] SORT_1 var_117 = var_117_arg_0 | var_117_arg_1; [L303] SORT_1 var_118_arg_0 = state_13; [L304] SORT_1 var_118 = ~var_118_arg_0; [L305] SORT_1 var_119_arg_0 = state_15; [L306] SORT_1 var_119 = ~var_119_arg_0; [L307] SORT_1 var_120_arg_0 = var_118; [L308] SORT_1 var_120_arg_1 = var_119; [L309] SORT_1 var_120 = var_120_arg_0 & var_120_arg_1; [L310] SORT_1 var_121_arg_0 = state_17; [L311] SORT_1 var_121 = ~var_121_arg_0; [L312] SORT_1 var_122_arg_0 = var_120; [L313] SORT_1 var_122_arg_1 = var_121; [L314] SORT_1 var_122 = var_122_arg_0 & var_122_arg_1; [L315] SORT_1 var_123_arg_0 = state_19; [L316] SORT_1 var_123 = ~var_123_arg_0; [L317] SORT_1 var_124_arg_0 = var_122; [L318] SORT_1 var_124_arg_1 = var_123; [L319] SORT_1 var_124 = var_124_arg_0 & var_124_arg_1; [L320] SORT_1 var_125_arg_0 = var_124; [L321] SORT_1 var_125_arg_1 = state_21; [L322] SORT_1 var_125 = var_125_arg_0 & var_125_arg_1; [L323] SORT_1 var_126_arg_0 = state_23; [L324] SORT_1 var_126 = ~var_126_arg_0; [L325] SORT_1 var_127_arg_0 = var_125; [L326] SORT_1 var_127_arg_1 = var_126; [L327] SORT_1 var_127 = var_127_arg_0 & var_127_arg_1; [L328] SORT_1 var_128_arg_0 = state_4; [L329] SORT_1 var_128 = ~var_128_arg_0; [L330] SORT_1 var_129_arg_0 = var_127; [L331] SORT_1 var_129_arg_1 = var_128; [L332] SORT_1 var_129 = var_129_arg_0 & var_129_arg_1; [L333] SORT_1 var_130_arg_0 = var_117; [L334] SORT_1 var_130_arg_1 = var_129; [L335] SORT_1 var_130 = var_130_arg_0 | var_130_arg_1; [L336] SORT_1 var_131_arg_0 = state_13; [L337] SORT_1 var_131 = ~var_131_arg_0; [L338] SORT_1 var_132_arg_0 = state_15; [L339] SORT_1 var_132 = ~var_132_arg_0; [L340] SORT_1 var_133_arg_0 = var_131; [L341] SORT_1 var_133_arg_1 = var_132; [L342] SORT_1 var_133 = var_133_arg_0 & var_133_arg_1; [L343] SORT_1 var_134_arg_0 = state_17; [L344] SORT_1 var_134 = ~var_134_arg_0; [L345] SORT_1 var_135_arg_0 = var_133; [L346] SORT_1 var_135_arg_1 = var_134; [L347] SORT_1 var_135 = var_135_arg_0 & var_135_arg_1; [L348] SORT_1 var_136_arg_0 = state_19; [L349] SORT_1 var_136 = ~var_136_arg_0; [L350] SORT_1 var_137_arg_0 = var_135; [L351] SORT_1 var_137_arg_1 = var_136; [L352] SORT_1 var_137 = var_137_arg_0 & var_137_arg_1; [L353] SORT_1 var_138_arg_0 = state_21; [L354] SORT_1 var_138 = ~var_138_arg_0; [L355] SORT_1 var_139_arg_0 = var_137; [L356] SORT_1 var_139_arg_1 = var_138; [L357] SORT_1 var_139 = var_139_arg_0 & var_139_arg_1; [L358] SORT_1 var_140_arg_0 = var_139; [L359] SORT_1 var_140_arg_1 = state_23; [L360] SORT_1 var_140 = var_140_arg_0 & var_140_arg_1; [L361] SORT_1 var_141_arg_0 = state_4; [L362] SORT_1 var_141 = ~var_141_arg_0; [L363] SORT_1 var_142_arg_0 = var_140; [L364] SORT_1 var_142_arg_1 = var_141; [L365] SORT_1 var_142 = var_142_arg_0 & var_142_arg_1; [L366] SORT_1 var_143_arg_0 = var_130; [L367] SORT_1 var_143_arg_1 = var_142; [L368] SORT_1 var_143 = var_143_arg_0 | var_143_arg_1; [L369] SORT_1 var_144_arg_0 = state_13; [L370] SORT_1 var_144 = ~var_144_arg_0; [L371] SORT_1 var_145_arg_0 = state_15; [L372] SORT_1 var_145 = ~var_145_arg_0; [L373] SORT_1 var_146_arg_0 = var_144; [L374] SORT_1 var_146_arg_1 = var_145; [L375] SORT_1 var_146 = var_146_arg_0 & var_146_arg_1; [L376] SORT_1 var_147_arg_0 = state_17; [L377] SORT_1 var_147 = ~var_147_arg_0; [L378] SORT_1 var_148_arg_0 = var_146; [L379] SORT_1 var_148_arg_1 = var_147; [L380] SORT_1 var_148 = var_148_arg_0 & var_148_arg_1; [L381] SORT_1 var_149_arg_0 = state_19; [L382] SORT_1 var_149 = ~var_149_arg_0; [L383] SORT_1 var_150_arg_0 = var_148; [L384] SORT_1 var_150_arg_1 = var_149; [L385] SORT_1 var_150 = var_150_arg_0 & var_150_arg_1; [L386] SORT_1 var_151_arg_0 = state_21; [L387] SORT_1 var_151 = ~var_151_arg_0; [L388] SORT_1 var_152_arg_0 = var_150; [L389] SORT_1 var_152_arg_1 = var_151; [L390] SORT_1 var_152 = var_152_arg_0 & var_152_arg_1; [L391] SORT_1 var_153_arg_0 = state_23; [L392] SORT_1 var_153 = ~var_153_arg_0; [L393] SORT_1 var_154_arg_0 = var_152; [L394] SORT_1 var_154_arg_1 = var_153; [L395] SORT_1 var_154 = var_154_arg_0 & var_154_arg_1; [L396] SORT_1 var_155_arg_0 = var_154; [L397] SORT_1 var_155_arg_1 = state_4; [L398] SORT_1 var_155 = var_155_arg_0 & var_155_arg_1; [L399] SORT_1 var_156_arg_0 = var_143; [L400] SORT_1 var_156_arg_1 = var_155; [L401] SORT_1 var_156 = var_156_arg_0 | var_156_arg_1; [L402] var_156 = var_156 & mask_SORT_1 [L403] SORT_1 next_157_arg_1 = var_156; [L404] SORT_27 var_160_arg_0 = state_29; [L405] SORT_27 var_160_arg_1 = var_32; [L406] SORT_1 var_160 = var_160_arg_0 < var_160_arg_1; [L407] SORT_27 var_159_arg_0 = state_29; [L408] SORT_27 var_159_arg_1 = var_158; [L409] SORT_27 var_159 = var_159_arg_0 + var_159_arg_1; [L410] SORT_1 var_161_arg_0 = var_160; [L411] SORT_27 var_161_arg_1 = var_159; [L412] SORT_27 var_161_arg_2 = state_29; [L413] EXPR var_161_arg_0 ? var_161_arg_1 : var_161_arg_2 [L413] SORT_27 var_161 = var_161_arg_0 ? var_161_arg_1 : var_161_arg_2; [L414] SORT_1 var_162_arg_0 = state_15; [L415] SORT_27 var_162_arg_1 = var_161; [L416] SORT_27 var_162_arg_2 = state_29; [L417] EXPR var_162_arg_0 ? var_162_arg_1 : var_162_arg_2 [L417] SORT_27 var_162 = var_162_arg_0 ? var_162_arg_1 : var_162_arg_2; [L418] SORT_1 var_163_arg_0 = state_25; [L419] SORT_27 var_163_arg_1 = var_162; [L420] SORT_27 var_163_arg_2 = state_29; [L421] EXPR var_163_arg_0 ? var_163_arg_1 : var_163_arg_2 [L421] SORT_27 var_163 = var_163_arg_0 ? var_163_arg_1 : var_163_arg_2; [L422] var_163 = var_163 & mask_SORT_27 [L423] SORT_27 next_164_arg_1 = var_163; [L425] state_4 = next_42_arg_1 [L426] state_13 = next_44_arg_1 [L427] state_15 = next_50_arg_1 [L428] state_17 = next_54_arg_1 [L429] state_19 = next_56_arg_1 [L430] state_21 = next_61_arg_1 [L431] state_23 = next_66_arg_1 [L432] state_25 = next_157_arg_1 [L433] state_29 = next_164_arg_1 [L70] input_2 = __VERIFIER_nondet_uchar() [L73] SORT_1 var_6_arg_0 = state_4; [L74] SORT_1 var_6 = ~var_6_arg_0; [L75] SORT_1 var_10_arg_0 = var_6; [L76] SORT_1 var_10 = ~var_10_arg_0; [L77] SORT_1 var_11_arg_0 = var_9; [L78] SORT_1 var_11_arg_1 = var_10; [L79] SORT_1 var_11 = var_11_arg_0 & var_11_arg_1; [L80] var_11 = var_11 & mask_SORT_1 [L81] SORT_1 bad_12_arg_0 = var_11; [L82] CALL __VERIFIER_assert(!(bad_12_arg_0)) [L20] COND FALSE !(!(cond)) [L82] RET __VERIFIER_assert(!(bad_12_arg_0)) [L84] SORT_27 var_33_arg_0 = state_29; [L85] SORT_27 var_33_arg_1 = var_32; [L86] SORT_1 var_33 = var_33_arg_0 < var_33_arg_1; [L87] SORT_1 var_34_arg_0 = var_33; [L88] SORT_1 var_34 = ~var_34_arg_0; [L89] SORT_1 var_35_arg_0 = state_15; [L90] SORT_1 var_35_arg_1 = var_34; [L91] SORT_1 var_35 = var_35_arg_0 & var_35_arg_1; [L92] SORT_1 var_36_arg_0 = state_4; [L93] SORT_1 var_36_arg_1 = var_35; [L94] SORT_1 var_36 = var_36_arg_0 | var_36_arg_1; [L95] SORT_27 var_37_arg_0 = state_29; [L96] SORT_27 var_37_arg_1 = var_32; [L97] SORT_1 var_37 = var_37_arg_0 < var_37_arg_1; [L98] SORT_1 var_38_arg_0 = var_37; [L99] SORT_1 var_38 = ~var_38_arg_0; [L100] SORT_1 var_39_arg_0 = state_21; [L101] SORT_1 var_39_arg_1 = var_38; [L102] SORT_1 var_39 = var_39_arg_0 & var_39_arg_1; [L103] SORT_1 var_40_arg_0 = var_36; [L104] SORT_1 var_40_arg_1 = var_39; [L105] SORT_1 var_40 = var_40_arg_0 | var_40_arg_1; [L106] SORT_1 var_41_arg_0 = state_25; [L107] SORT_1 var_41_arg_1 = var_40; [L108] SORT_1 var_41_arg_2 = state_4; [L109] EXPR var_41_arg_0 ? var_41_arg_1 : var_41_arg_2 [L109] SORT_1 var_41 = var_41_arg_0 ? var_41_arg_1 : var_41_arg_2; [L110] SORT_1 next_42_arg_1 = var_41; [L111] SORT_1 var_43_arg_0 = state_25; [L112] SORT_1 var_43_arg_1 = var_3; [L113] SORT_1 var_43_arg_2 = state_13; [L114] EXPR var_43_arg_0 ? var_43_arg_1 : var_43_arg_2 [L114] SORT_1 var_43 = var_43_arg_0 ? var_43_arg_1 : var_43_arg_2; [L115] SORT_1 next_44_arg_1 = var_43; [L116] SORT_27 var_46_arg_0 = state_29; [L117] SORT_27 var_46_arg_1 = var_45; [L118] SORT_1 var_46 = var_46_arg_0 < var_46_arg_1; [L119] SORT_1 var_47_arg_0 = state_19; [L120] SORT_1 var_47_arg_1 = var_46; [L121] SORT_1 var_47 = var_47_arg_0 & var_47_arg_1; [L122] SORT_1 var_48_arg_0 = state_13; [L123] SORT_1 var_48_arg_1 = var_47; [L124] SORT_1 var_48 = var_48_arg_0 | var_48_arg_1; [L125] SORT_1 var_49_arg_0 = state_25; [L126] SORT_1 var_49_arg_1 = var_48; [L127] SORT_1 var_49_arg_2 = state_15; [L128] EXPR var_49_arg_0 ? var_49_arg_1 : var_49_arg_2 [L128] SORT_1 var_49 = var_49_arg_0 ? var_49_arg_1 : var_49_arg_2; [L129] var_49 = var_49 & mask_SORT_1 [L130] SORT_1 next_50_arg_1 = var_49; [L131] SORT_27 var_51_arg_0 = state_29; [L132] SORT_27 var_51_arg_1 = var_32; [L133] SORT_1 var_51 = var_51_arg_0 < var_51_arg_1; [L134] SORT_1 var_52_arg_0 = state_15; [L135] SORT_1 var_52_arg_1 = var_51; [L136] SORT_1 var_52 = var_52_arg_0 & var_52_arg_1; [L137] SORT_1 var_53_arg_0 = state_25; [L138] SORT_1 var_53_arg_1 = var_52; [L139] SORT_1 var_53_arg_2 = state_17; [L140] EXPR var_53_arg_0 ? var_53_arg_1 : var_53_arg_2 [L140] SORT_1 var_53 = var_53_arg_0 ? var_53_arg_1 : var_53_arg_2; [L141] SORT_1 next_54_arg_1 = var_53; [L142] SORT_1 var_55_arg_0 = state_25; [L143] SORT_1 var_55_arg_1 = state_17; [L144] SORT_1 var_55_arg_2 = state_19; [L145] EXPR var_55_arg_0 ? var_55_arg_1 : var_55_arg_2 [L145] SORT_1 var_55 = var_55_arg_0 ? var_55_arg_1 : var_55_arg_2; [L146] SORT_1 next_56_arg_1 = var_55; [L147] SORT_27 var_57_arg_0 = state_29; [L148] SORT_27 var_57_arg_1 = var_45; [L149] SORT_1 var_57 = var_57_arg_0 < var_57_arg_1; [L150] SORT_1 var_58_arg_0 = var_57; [L151] SORT_1 var_58 = ~var_58_arg_0; [L152] SORT_1 var_59_arg_0 = state_19; [L153] SORT_1 var_59_arg_1 = var_58; [L154] SORT_1 var_59 = var_59_arg_0 & var_59_arg_1; [L155] SORT_1 var_60_arg_0 = state_25; [L156] SORT_1 var_60_arg_1 = var_59; [L157] SORT_1 var_60_arg_2 = state_21; [L158] EXPR var_60_arg_0 ? var_60_arg_1 : var_60_arg_2 [L158] SORT_1 var_60 = var_60_arg_0 ? var_60_arg_1 : var_60_arg_2; [L159] SORT_1 next_61_arg_1 = var_60; [L160] SORT_27 var_62_arg_0 = state_29; [L161] SORT_27 var_62_arg_1 = var_32; [L162] SORT_1 var_62 = var_62_arg_0 < var_62_arg_1; [L163] SORT_1 var_63_arg_0 = state_21; [L164] SORT_1 var_63_arg_1 = var_62; [L165] SORT_1 var_63 = var_63_arg_0 & var_63_arg_1; [L166] SORT_1 var_64_arg_0 = state_23; [L167] SORT_1 var_64_arg_1 = var_63; [L168] SORT_1 var_64 = var_64_arg_0 | var_64_arg_1; [L169] SORT_1 var_65_arg_0 = state_25; [L170] SORT_1 var_65_arg_1 = var_64; [L171] SORT_1 var_65_arg_2 = state_23; [L172] EXPR var_65_arg_0 ? var_65_arg_1 : var_65_arg_2 [L172] SORT_1 var_65 = var_65_arg_0 ? var_65_arg_1 : var_65_arg_2; [L173] SORT_1 next_66_arg_1 = var_65; [L174] SORT_1 var_67_arg_0 = state_15; [L175] SORT_1 var_67 = ~var_67_arg_0; [L176] SORT_1 var_68_arg_0 = state_13; [L177] SORT_1 var_68_arg_1 = var_67; [L178] SORT_1 var_68 = var_68_arg_0 & var_68_arg_1; [L179] SORT_1 var_69_arg_0 = state_17; [L180] SORT_1 var_69 = ~var_69_arg_0; [L181] SORT_1 var_70_arg_0 = var_68; [L182] SORT_1 var_70_arg_1 = var_69; [L183] SORT_1 var_70 = var_70_arg_0 & var_70_arg_1; [L184] SORT_1 var_71_arg_0 = state_19; [L185] SORT_1 var_71 = ~var_71_arg_0; [L186] SORT_1 var_72_arg_0 = var_70; [L187] SORT_1 var_72_arg_1 = var_71; [L188] SORT_1 var_72 = var_72_arg_0 & var_72_arg_1; [L189] SORT_1 var_73_arg_0 = state_21; [L190] SORT_1 var_73 = ~var_73_arg_0; [L191] SORT_1 var_74_arg_0 = var_72; [L192] SORT_1 var_74_arg_1 = var_73; [L193] SORT_1 var_74 = var_74_arg_0 & var_74_arg_1; [L194] SORT_1 var_75_arg_0 = state_23; [L195] SORT_1 var_75 = ~var_75_arg_0; [L196] SORT_1 var_76_arg_0 = var_74; [L197] SORT_1 var_76_arg_1 = var_75; [L198] SORT_1 var_76 = var_76_arg_0 & var_76_arg_1; [L199] SORT_1 var_77_arg_0 = state_4; [L200] SORT_1 var_77 = ~var_77_arg_0; [L201] SORT_1 var_78_arg_0 = var_76; [L202] SORT_1 var_78_arg_1 = var_77; [L203] SORT_1 var_78 = var_78_arg_0 & var_78_arg_1; [L204] SORT_1 var_79_arg_0 = state_13; [L205] SORT_1 var_79 = ~var_79_arg_0; [L206] SORT_1 var_80_arg_0 = var_79; [L207] SORT_1 var_80_arg_1 = state_15; [L208] SORT_1 var_80 = var_80_arg_0 & var_80_arg_1; [L209] SORT_1 var_81_arg_0 = state_17; [L210] SORT_1 var_81 = ~var_81_arg_0; [L211] SORT_1 var_82_arg_0 = var_80; [L212] SORT_1 var_82_arg_1 = var_81; [L213] SORT_1 var_82 = var_82_arg_0 & var_82_arg_1; [L214] SORT_1 var_83_arg_0 = state_19; [L215] SORT_1 var_83 = ~var_83_arg_0; [L216] SORT_1 var_84_arg_0 = var_82; [L217] SORT_1 var_84_arg_1 = var_83; [L218] SORT_1 var_84 = var_84_arg_0 & var_84_arg_1; [L219] SORT_1 var_85_arg_0 = state_21; [L220] SORT_1 var_85 = ~var_85_arg_0; [L221] SORT_1 var_86_arg_0 = var_84; [L222] SORT_1 var_86_arg_1 = var_85; [L223] SORT_1 var_86 = var_86_arg_0 & var_86_arg_1; [L224] SORT_1 var_87_arg_0 = state_23; [L225] SORT_1 var_87 = ~var_87_arg_0; [L226] SORT_1 var_88_arg_0 = var_86; [L227] SORT_1 var_88_arg_1 = var_87; [L228] SORT_1 var_88 = var_88_arg_0 & var_88_arg_1; [L229] SORT_1 var_89_arg_0 = state_4; [L230] SORT_1 var_89 = ~var_89_arg_0; [L231] SORT_1 var_90_arg_0 = var_88; [L232] SORT_1 var_90_arg_1 = var_89; [L233] SORT_1 var_90 = var_90_arg_0 & var_90_arg_1; [L234] SORT_1 var_91_arg_0 = var_78; [L235] SORT_1 var_91_arg_1 = var_90; [L236] SORT_1 var_91 = var_91_arg_0 | var_91_arg_1; [L237] SORT_1 var_92_arg_0 = state_13; [L238] SORT_1 var_92 = ~var_92_arg_0; [L239] SORT_1 var_93_arg_0 = state_15; [L240] SORT_1 var_93 = ~var_93_arg_0; [L241] SORT_1 var_94_arg_0 = var_92; [L242] SORT_1 var_94_arg_1 = var_93; [L243] SORT_1 var_94 = var_94_arg_0 & var_94_arg_1; [L244] SORT_1 var_95_arg_0 = var_94; [L245] SORT_1 var_95_arg_1 = state_17; [L246] SORT_1 var_95 = var_95_arg_0 & var_95_arg_1; [L247] SORT_1 var_96_arg_0 = state_19; [L248] SORT_1 var_96 = ~var_96_arg_0; [L249] SORT_1 var_97_arg_0 = var_95; [L250] SORT_1 var_97_arg_1 = var_96; [L251] SORT_1 var_97 = var_97_arg_0 & var_97_arg_1; [L252] SORT_1 var_98_arg_0 = state_21; [L253] SORT_1 var_98 = ~var_98_arg_0; [L254] SORT_1 var_99_arg_0 = var_97; [L255] SORT_1 var_99_arg_1 = var_98; [L256] SORT_1 var_99 = var_99_arg_0 & var_99_arg_1; [L257] SORT_1 var_100_arg_0 = state_23; [L258] SORT_1 var_100 = ~var_100_arg_0; [L259] SORT_1 var_101_arg_0 = var_99; [L260] SORT_1 var_101_arg_1 = var_100; [L261] SORT_1 var_101 = var_101_arg_0 & var_101_arg_1; [L262] SORT_1 var_102_arg_0 = state_4; [L263] SORT_1 var_102 = ~var_102_arg_0; [L264] SORT_1 var_103_arg_0 = var_101; [L265] SORT_1 var_103_arg_1 = var_102; [L266] SORT_1 var_103 = var_103_arg_0 & var_103_arg_1; [L267] SORT_1 var_104_arg_0 = var_91; [L268] SORT_1 var_104_arg_1 = var_103; [L269] SORT_1 var_104 = var_104_arg_0 | var_104_arg_1; [L270] SORT_1 var_105_arg_0 = state_13; [L271] SORT_1 var_105 = ~var_105_arg_0; [L272] SORT_1 var_106_arg_0 = state_15; [L273] SORT_1 var_106 = ~var_106_arg_0; [L274] SORT_1 var_107_arg_0 = var_105; [L275] SORT_1 var_107_arg_1 = var_106; [L276] SORT_1 var_107 = var_107_arg_0 & var_107_arg_1; [L277] SORT_1 var_108_arg_0 = state_17; [L278] SORT_1 var_108 = ~var_108_arg_0; [L279] SORT_1 var_109_arg_0 = var_107; [L280] SORT_1 var_109_arg_1 = var_108; [L281] SORT_1 var_109 = var_109_arg_0 & var_109_arg_1; [L282] SORT_1 var_110_arg_0 = var_109; [L283] SORT_1 var_110_arg_1 = state_19; [L284] SORT_1 var_110 = var_110_arg_0 & var_110_arg_1; [L285] SORT_1 var_111_arg_0 = state_21; [L286] SORT_1 var_111 = ~var_111_arg_0; [L287] SORT_1 var_112_arg_0 = var_110; [L288] SORT_1 var_112_arg_1 = var_111; [L289] SORT_1 var_112 = var_112_arg_0 & var_112_arg_1; [L290] SORT_1 var_113_arg_0 = state_23; [L291] SORT_1 var_113 = ~var_113_arg_0; [L292] SORT_1 var_114_arg_0 = var_112; [L293] SORT_1 var_114_arg_1 = var_113; [L294] SORT_1 var_114 = var_114_arg_0 & var_114_arg_1; [L295] SORT_1 var_115_arg_0 = state_4; [L296] SORT_1 var_115 = ~var_115_arg_0; [L297] SORT_1 var_116_arg_0 = var_114; [L298] SORT_1 var_116_arg_1 = var_115; [L299] SORT_1 var_116 = var_116_arg_0 & var_116_arg_1; [L300] SORT_1 var_117_arg_0 = var_104; [L301] SORT_1 var_117_arg_1 = var_116; [L302] SORT_1 var_117 = var_117_arg_0 | var_117_arg_1; [L303] SORT_1 var_118_arg_0 = state_13; [L304] SORT_1 var_118 = ~var_118_arg_0; [L305] SORT_1 var_119_arg_0 = state_15; [L306] SORT_1 var_119 = ~var_119_arg_0; [L307] SORT_1 var_120_arg_0 = var_118; [L308] SORT_1 var_120_arg_1 = var_119; [L309] SORT_1 var_120 = var_120_arg_0 & var_120_arg_1; [L310] SORT_1 var_121_arg_0 = state_17; [L311] SORT_1 var_121 = ~var_121_arg_0; [L312] SORT_1 var_122_arg_0 = var_120; [L313] SORT_1 var_122_arg_1 = var_121; [L314] SORT_1 var_122 = var_122_arg_0 & var_122_arg_1; [L315] SORT_1 var_123_arg_0 = state_19; [L316] SORT_1 var_123 = ~var_123_arg_0; [L317] SORT_1 var_124_arg_0 = var_122; [L318] SORT_1 var_124_arg_1 = var_123; [L319] SORT_1 var_124 = var_124_arg_0 & var_124_arg_1; [L320] SORT_1 var_125_arg_0 = var_124; [L321] SORT_1 var_125_arg_1 = state_21; [L322] SORT_1 var_125 = var_125_arg_0 & var_125_arg_1; [L323] SORT_1 var_126_arg_0 = state_23; [L324] SORT_1 var_126 = ~var_126_arg_0; [L325] SORT_1 var_127_arg_0 = var_125; [L326] SORT_1 var_127_arg_1 = var_126; [L327] SORT_1 var_127 = var_127_arg_0 & var_127_arg_1; [L328] SORT_1 var_128_arg_0 = state_4; [L329] SORT_1 var_128 = ~var_128_arg_0; [L330] SORT_1 var_129_arg_0 = var_127; [L331] SORT_1 var_129_arg_1 = var_128; [L332] SORT_1 var_129 = var_129_arg_0 & var_129_arg_1; [L333] SORT_1 var_130_arg_0 = var_117; [L334] SORT_1 var_130_arg_1 = var_129; [L335] SORT_1 var_130 = var_130_arg_0 | var_130_arg_1; [L336] SORT_1 var_131_arg_0 = state_13; [L337] SORT_1 var_131 = ~var_131_arg_0; [L338] SORT_1 var_132_arg_0 = state_15; [L339] SORT_1 var_132 = ~var_132_arg_0; [L340] SORT_1 var_133_arg_0 = var_131; [L341] SORT_1 var_133_arg_1 = var_132; [L342] SORT_1 var_133 = var_133_arg_0 & var_133_arg_1; [L343] SORT_1 var_134_arg_0 = state_17; [L344] SORT_1 var_134 = ~var_134_arg_0; [L345] SORT_1 var_135_arg_0 = var_133; [L346] SORT_1 var_135_arg_1 = var_134; [L347] SORT_1 var_135 = var_135_arg_0 & var_135_arg_1; [L348] SORT_1 var_136_arg_0 = state_19; [L349] SORT_1 var_136 = ~var_136_arg_0; [L350] SORT_1 var_137_arg_0 = var_135; [L351] SORT_1 var_137_arg_1 = var_136; [L352] SORT_1 var_137 = var_137_arg_0 & var_137_arg_1; [L353] SORT_1 var_138_arg_0 = state_21; [L354] SORT_1 var_138 = ~var_138_arg_0; [L355] SORT_1 var_139_arg_0 = var_137; [L356] SORT_1 var_139_arg_1 = var_138; [L357] SORT_1 var_139 = var_139_arg_0 & var_139_arg_1; [L358] SORT_1 var_140_arg_0 = var_139; [L359] SORT_1 var_140_arg_1 = state_23; [L360] SORT_1 var_140 = var_140_arg_0 & var_140_arg_1; [L361] SORT_1 var_141_arg_0 = state_4; [L362] SORT_1 var_141 = ~var_141_arg_0; [L363] SORT_1 var_142_arg_0 = var_140; [L364] SORT_1 var_142_arg_1 = var_141; [L365] SORT_1 var_142 = var_142_arg_0 & var_142_arg_1; [L366] SORT_1 var_143_arg_0 = var_130; [L367] SORT_1 var_143_arg_1 = var_142; [L368] SORT_1 var_143 = var_143_arg_0 | var_143_arg_1; [L369] SORT_1 var_144_arg_0 = state_13; [L370] SORT_1 var_144 = ~var_144_arg_0; [L371] SORT_1 var_145_arg_0 = state_15; [L372] SORT_1 var_145 = ~var_145_arg_0; [L373] SORT_1 var_146_arg_0 = var_144; [L374] SORT_1 var_146_arg_1 = var_145; [L375] SORT_1 var_146 = var_146_arg_0 & var_146_arg_1; [L376] SORT_1 var_147_arg_0 = state_17; [L377] SORT_1 var_147 = ~var_147_arg_0; [L378] SORT_1 var_148_arg_0 = var_146; [L379] SORT_1 var_148_arg_1 = var_147; [L380] SORT_1 var_148 = var_148_arg_0 & var_148_arg_1; [L381] SORT_1 var_149_arg_0 = state_19; [L382] SORT_1 var_149 = ~var_149_arg_0; [L383] SORT_1 var_150_arg_0 = var_148; [L384] SORT_1 var_150_arg_1 = var_149; [L385] SORT_1 var_150 = var_150_arg_0 & var_150_arg_1; [L386] SORT_1 var_151_arg_0 = state_21; [L387] SORT_1 var_151 = ~var_151_arg_0; [L388] SORT_1 var_152_arg_0 = var_150; [L389] SORT_1 var_152_arg_1 = var_151; [L390] SORT_1 var_152 = var_152_arg_0 & var_152_arg_1; [L391] SORT_1 var_153_arg_0 = state_23; [L392] SORT_1 var_153 = ~var_153_arg_0; [L393] SORT_1 var_154_arg_0 = var_152; [L394] SORT_1 var_154_arg_1 = var_153; [L395] SORT_1 var_154 = var_154_arg_0 & var_154_arg_1; [L396] SORT_1 var_155_arg_0 = var_154; [L397] SORT_1 var_155_arg_1 = state_4; [L398] SORT_1 var_155 = var_155_arg_0 & var_155_arg_1; [L399] SORT_1 var_156_arg_0 = var_143; [L400] SORT_1 var_156_arg_1 = var_155; [L401] SORT_1 var_156 = var_156_arg_0 | var_156_arg_1; [L402] var_156 = var_156 & mask_SORT_1 [L403] SORT_1 next_157_arg_1 = var_156; [L404] SORT_27 var_160_arg_0 = state_29; [L405] SORT_27 var_160_arg_1 = var_32; [L406] SORT_1 var_160 = var_160_arg_0 < var_160_arg_1; [L407] SORT_27 var_159_arg_0 = state_29; [L408] SORT_27 var_159_arg_1 = var_158; [L409] SORT_27 var_159 = var_159_arg_0 + var_159_arg_1; [L410] SORT_1 var_161_arg_0 = var_160; [L411] SORT_27 var_161_arg_1 = var_159; [L412] SORT_27 var_161_arg_2 = state_29; [L413] EXPR var_161_arg_0 ? var_161_arg_1 : var_161_arg_2 [L413] SORT_27 var_161 = var_161_arg_0 ? var_161_arg_1 : var_161_arg_2; [L414] SORT_1 var_162_arg_0 = state_15; [L415] SORT_27 var_162_arg_1 = var_161; [L416] SORT_27 var_162_arg_2 = state_29; [L417] EXPR var_162_arg_0 ? var_162_arg_1 : var_162_arg_2 [L417] SORT_27 var_162 = var_162_arg_0 ? var_162_arg_1 : var_162_arg_2; [L418] SORT_1 var_163_arg_0 = state_25; [L419] SORT_27 var_163_arg_1 = var_162; [L420] SORT_27 var_163_arg_2 = state_29; [L421] EXPR var_163_arg_0 ? var_163_arg_1 : var_163_arg_2 [L421] SORT_27 var_163 = var_163_arg_0 ? var_163_arg_1 : var_163_arg_2; [L422] var_163 = var_163 & mask_SORT_27 [L423] SORT_27 next_164_arg_1 = var_163; [L425] state_4 = next_42_arg_1 [L426] state_13 = next_44_arg_1 [L427] state_15 = next_50_arg_1 [L428] state_17 = next_54_arg_1 [L429] state_19 = next_56_arg_1 [L430] state_21 = next_61_arg_1 [L431] state_23 = next_66_arg_1 [L432] state_25 = next_157_arg_1 [L433] state_29 = next_164_arg_1 [L70] input_2 = __VERIFIER_nondet_uchar() [L73] SORT_1 var_6_arg_0 = state_4; [L74] SORT_1 var_6 = ~var_6_arg_0; [L75] SORT_1 var_10_arg_0 = var_6; [L76] SORT_1 var_10 = ~var_10_arg_0; [L77] SORT_1 var_11_arg_0 = var_9; [L78] SORT_1 var_11_arg_1 = var_10; [L79] SORT_1 var_11 = var_11_arg_0 & var_11_arg_1; [L80] var_11 = var_11 & mask_SORT_1 [L81] SORT_1 bad_12_arg_0 = var_11; [L82] CALL __VERIFIER_assert(!(bad_12_arg_0)) [L20] COND FALSE !(!(cond)) [L82] RET __VERIFIER_assert(!(bad_12_arg_0)) [L84] SORT_27 var_33_arg_0 = state_29; [L85] SORT_27 var_33_arg_1 = var_32; [L86] SORT_1 var_33 = var_33_arg_0 < var_33_arg_1; [L87] SORT_1 var_34_arg_0 = var_33; [L88] SORT_1 var_34 = ~var_34_arg_0; [L89] SORT_1 var_35_arg_0 = state_15; [L90] SORT_1 var_35_arg_1 = var_34; [L91] SORT_1 var_35 = var_35_arg_0 & var_35_arg_1; [L92] SORT_1 var_36_arg_0 = state_4; [L93] SORT_1 var_36_arg_1 = var_35; [L94] SORT_1 var_36 = var_36_arg_0 | var_36_arg_1; [L95] SORT_27 var_37_arg_0 = state_29; [L96] SORT_27 var_37_arg_1 = var_32; [L97] SORT_1 var_37 = var_37_arg_0 < var_37_arg_1; [L98] SORT_1 var_38_arg_0 = var_37; [L99] SORT_1 var_38 = ~var_38_arg_0; [L100] SORT_1 var_39_arg_0 = state_21; [L101] SORT_1 var_39_arg_1 = var_38; [L102] SORT_1 var_39 = var_39_arg_0 & var_39_arg_1; [L103] SORT_1 var_40_arg_0 = var_36; [L104] SORT_1 var_40_arg_1 = var_39; [L105] SORT_1 var_40 = var_40_arg_0 | var_40_arg_1; [L106] SORT_1 var_41_arg_0 = state_25; [L107] SORT_1 var_41_arg_1 = var_40; [L108] SORT_1 var_41_arg_2 = state_4; [L109] EXPR var_41_arg_0 ? var_41_arg_1 : var_41_arg_2 [L109] SORT_1 var_41 = var_41_arg_0 ? var_41_arg_1 : var_41_arg_2; [L110] SORT_1 next_42_arg_1 = var_41; [L111] SORT_1 var_43_arg_0 = state_25; [L112] SORT_1 var_43_arg_1 = var_3; [L113] SORT_1 var_43_arg_2 = state_13; [L114] EXPR var_43_arg_0 ? var_43_arg_1 : var_43_arg_2 [L114] SORT_1 var_43 = var_43_arg_0 ? var_43_arg_1 : var_43_arg_2; [L115] SORT_1 next_44_arg_1 = var_43; [L116] SORT_27 var_46_arg_0 = state_29; [L117] SORT_27 var_46_arg_1 = var_45; [L118] SORT_1 var_46 = var_46_arg_0 < var_46_arg_1; [L119] SORT_1 var_47_arg_0 = state_19; [L120] SORT_1 var_47_arg_1 = var_46; [L121] SORT_1 var_47 = var_47_arg_0 & var_47_arg_1; [L122] SORT_1 var_48_arg_0 = state_13; [L123] SORT_1 var_48_arg_1 = var_47; [L124] SORT_1 var_48 = var_48_arg_0 | var_48_arg_1; [L125] SORT_1 var_49_arg_0 = state_25; [L126] SORT_1 var_49_arg_1 = var_48; [L127] SORT_1 var_49_arg_2 = state_15; [L128] EXPR var_49_arg_0 ? var_49_arg_1 : var_49_arg_2 [L128] SORT_1 var_49 = var_49_arg_0 ? var_49_arg_1 : var_49_arg_2; [L129] var_49 = var_49 & mask_SORT_1 [L130] SORT_1 next_50_arg_1 = var_49; [L131] SORT_27 var_51_arg_0 = state_29; [L132] SORT_27 var_51_arg_1 = var_32; [L133] SORT_1 var_51 = var_51_arg_0 < var_51_arg_1; [L134] SORT_1 var_52_arg_0 = state_15; [L135] SORT_1 var_52_arg_1 = var_51; [L136] SORT_1 var_52 = var_52_arg_0 & var_52_arg_1; [L137] SORT_1 var_53_arg_0 = state_25; [L138] SORT_1 var_53_arg_1 = var_52; [L139] SORT_1 var_53_arg_2 = state_17; [L140] EXPR var_53_arg_0 ? var_53_arg_1 : var_53_arg_2 [L140] SORT_1 var_53 = var_53_arg_0 ? var_53_arg_1 : var_53_arg_2; [L141] SORT_1 next_54_arg_1 = var_53; [L142] SORT_1 var_55_arg_0 = state_25; [L143] SORT_1 var_55_arg_1 = state_17; [L144] SORT_1 var_55_arg_2 = state_19; [L145] EXPR var_55_arg_0 ? var_55_arg_1 : var_55_arg_2 [L145] SORT_1 var_55 = var_55_arg_0 ? var_55_arg_1 : var_55_arg_2; [L146] SORT_1 next_56_arg_1 = var_55; [L147] SORT_27 var_57_arg_0 = state_29; [L148] SORT_27 var_57_arg_1 = var_45; [L149] SORT_1 var_57 = var_57_arg_0 < var_57_arg_1; [L150] SORT_1 var_58_arg_0 = var_57; [L151] SORT_1 var_58 = ~var_58_arg_0; [L152] SORT_1 var_59_arg_0 = state_19; [L153] SORT_1 var_59_arg_1 = var_58; [L154] SORT_1 var_59 = var_59_arg_0 & var_59_arg_1; [L155] SORT_1 var_60_arg_0 = state_25; [L156] SORT_1 var_60_arg_1 = var_59; [L157] SORT_1 var_60_arg_2 = state_21; [L158] EXPR var_60_arg_0 ? var_60_arg_1 : var_60_arg_2 [L158] SORT_1 var_60 = var_60_arg_0 ? var_60_arg_1 : var_60_arg_2; [L159] SORT_1 next_61_arg_1 = var_60; [L160] SORT_27 var_62_arg_0 = state_29; [L161] SORT_27 var_62_arg_1 = var_32; [L162] SORT_1 var_62 = var_62_arg_0 < var_62_arg_1; [L163] SORT_1 var_63_arg_0 = state_21; [L164] SORT_1 var_63_arg_1 = var_62; [L165] SORT_1 var_63 = var_63_arg_0 & var_63_arg_1; [L166] SORT_1 var_64_arg_0 = state_23; [L167] SORT_1 var_64_arg_1 = var_63; [L168] SORT_1 var_64 = var_64_arg_0 | var_64_arg_1; [L169] SORT_1 var_65_arg_0 = state_25; [L170] SORT_1 var_65_arg_1 = var_64; [L171] SORT_1 var_65_arg_2 = state_23; [L172] EXPR var_65_arg_0 ? var_65_arg_1 : var_65_arg_2 [L172] SORT_1 var_65 = var_65_arg_0 ? var_65_arg_1 : var_65_arg_2; [L173] SORT_1 next_66_arg_1 = var_65; [L174] SORT_1 var_67_arg_0 = state_15; [L175] SORT_1 var_67 = ~var_67_arg_0; [L176] SORT_1 var_68_arg_0 = state_13; [L177] SORT_1 var_68_arg_1 = var_67; [L178] SORT_1 var_68 = var_68_arg_0 & var_68_arg_1; [L179] SORT_1 var_69_arg_0 = state_17; [L180] SORT_1 var_69 = ~var_69_arg_0; [L181] SORT_1 var_70_arg_0 = var_68; [L182] SORT_1 var_70_arg_1 = var_69; [L183] SORT_1 var_70 = var_70_arg_0 & var_70_arg_1; [L184] SORT_1 var_71_arg_0 = state_19; [L185] SORT_1 var_71 = ~var_71_arg_0; [L186] SORT_1 var_72_arg_0 = var_70; [L187] SORT_1 var_72_arg_1 = var_71; [L188] SORT_1 var_72 = var_72_arg_0 & var_72_arg_1; [L189] SORT_1 var_73_arg_0 = state_21; [L190] SORT_1 var_73 = ~var_73_arg_0; [L191] SORT_1 var_74_arg_0 = var_72; [L192] SORT_1 var_74_arg_1 = var_73; [L193] SORT_1 var_74 = var_74_arg_0 & var_74_arg_1; [L194] SORT_1 var_75_arg_0 = state_23; [L195] SORT_1 var_75 = ~var_75_arg_0; [L196] SORT_1 var_76_arg_0 = var_74; [L197] SORT_1 var_76_arg_1 = var_75; [L198] SORT_1 var_76 = var_76_arg_0 & var_76_arg_1; [L199] SORT_1 var_77_arg_0 = state_4; [L200] SORT_1 var_77 = ~var_77_arg_0; [L201] SORT_1 var_78_arg_0 = var_76; [L202] SORT_1 var_78_arg_1 = var_77; [L203] SORT_1 var_78 = var_78_arg_0 & var_78_arg_1; [L204] SORT_1 var_79_arg_0 = state_13; [L205] SORT_1 var_79 = ~var_79_arg_0; [L206] SORT_1 var_80_arg_0 = var_79; [L207] SORT_1 var_80_arg_1 = state_15; [L208] SORT_1 var_80 = var_80_arg_0 & var_80_arg_1; [L209] SORT_1 var_81_arg_0 = state_17; [L210] SORT_1 var_81 = ~var_81_arg_0; [L211] SORT_1 var_82_arg_0 = var_80; [L212] SORT_1 var_82_arg_1 = var_81; [L213] SORT_1 var_82 = var_82_arg_0 & var_82_arg_1; [L214] SORT_1 var_83_arg_0 = state_19; [L215] SORT_1 var_83 = ~var_83_arg_0; [L216] SORT_1 var_84_arg_0 = var_82; [L217] SORT_1 var_84_arg_1 = var_83; [L218] SORT_1 var_84 = var_84_arg_0 & var_84_arg_1; [L219] SORT_1 var_85_arg_0 = state_21; [L220] SORT_1 var_85 = ~var_85_arg_0; [L221] SORT_1 var_86_arg_0 = var_84; [L222] SORT_1 var_86_arg_1 = var_85; [L223] SORT_1 var_86 = var_86_arg_0 & var_86_arg_1; [L224] SORT_1 var_87_arg_0 = state_23; [L225] SORT_1 var_87 = ~var_87_arg_0; [L226] SORT_1 var_88_arg_0 = var_86; [L227] SORT_1 var_88_arg_1 = var_87; [L228] SORT_1 var_88 = var_88_arg_0 & var_88_arg_1; [L229] SORT_1 var_89_arg_0 = state_4; [L230] SORT_1 var_89 = ~var_89_arg_0; [L231] SORT_1 var_90_arg_0 = var_88; [L232] SORT_1 var_90_arg_1 = var_89; [L233] SORT_1 var_90 = var_90_arg_0 & var_90_arg_1; [L234] SORT_1 var_91_arg_0 = var_78; [L235] SORT_1 var_91_arg_1 = var_90; [L236] SORT_1 var_91 = var_91_arg_0 | var_91_arg_1; [L237] SORT_1 var_92_arg_0 = state_13; [L238] SORT_1 var_92 = ~var_92_arg_0; [L239] SORT_1 var_93_arg_0 = state_15; [L240] SORT_1 var_93 = ~var_93_arg_0; [L241] SORT_1 var_94_arg_0 = var_92; [L242] SORT_1 var_94_arg_1 = var_93; [L243] SORT_1 var_94 = var_94_arg_0 & var_94_arg_1; [L244] SORT_1 var_95_arg_0 = var_94; [L245] SORT_1 var_95_arg_1 = state_17; [L246] SORT_1 var_95 = var_95_arg_0 & var_95_arg_1; [L247] SORT_1 var_96_arg_0 = state_19; [L248] SORT_1 var_96 = ~var_96_arg_0; [L249] SORT_1 var_97_arg_0 = var_95; [L250] SORT_1 var_97_arg_1 = var_96; [L251] SORT_1 var_97 = var_97_arg_0 & var_97_arg_1; [L252] SORT_1 var_98_arg_0 = state_21; [L253] SORT_1 var_98 = ~var_98_arg_0; [L254] SORT_1 var_99_arg_0 = var_97; [L255] SORT_1 var_99_arg_1 = var_98; [L256] SORT_1 var_99 = var_99_arg_0 & var_99_arg_1; [L257] SORT_1 var_100_arg_0 = state_23; [L258] SORT_1 var_100 = ~var_100_arg_0; [L259] SORT_1 var_101_arg_0 = var_99; [L260] SORT_1 var_101_arg_1 = var_100; [L261] SORT_1 var_101 = var_101_arg_0 & var_101_arg_1; [L262] SORT_1 var_102_arg_0 = state_4; [L263] SORT_1 var_102 = ~var_102_arg_0; [L264] SORT_1 var_103_arg_0 = var_101; [L265] SORT_1 var_103_arg_1 = var_102; [L266] SORT_1 var_103 = var_103_arg_0 & var_103_arg_1; [L267] SORT_1 var_104_arg_0 = var_91; [L268] SORT_1 var_104_arg_1 = var_103; [L269] SORT_1 var_104 = var_104_arg_0 | var_104_arg_1; [L270] SORT_1 var_105_arg_0 = state_13; [L271] SORT_1 var_105 = ~var_105_arg_0; [L272] SORT_1 var_106_arg_0 = state_15; [L273] SORT_1 var_106 = ~var_106_arg_0; [L274] SORT_1 var_107_arg_0 = var_105; [L275] SORT_1 var_107_arg_1 = var_106; [L276] SORT_1 var_107 = var_107_arg_0 & var_107_arg_1; [L277] SORT_1 var_108_arg_0 = state_17; [L278] SORT_1 var_108 = ~var_108_arg_0; [L279] SORT_1 var_109_arg_0 = var_107; [L280] SORT_1 var_109_arg_1 = var_108; [L281] SORT_1 var_109 = var_109_arg_0 & var_109_arg_1; [L282] SORT_1 var_110_arg_0 = var_109; [L283] SORT_1 var_110_arg_1 = state_19; [L284] SORT_1 var_110 = var_110_arg_0 & var_110_arg_1; [L285] SORT_1 var_111_arg_0 = state_21; [L286] SORT_1 var_111 = ~var_111_arg_0; [L287] SORT_1 var_112_arg_0 = var_110; [L288] SORT_1 var_112_arg_1 = var_111; [L289] SORT_1 var_112 = var_112_arg_0 & var_112_arg_1; [L290] SORT_1 var_113_arg_0 = state_23; [L291] SORT_1 var_113 = ~var_113_arg_0; [L292] SORT_1 var_114_arg_0 = var_112; [L293] SORT_1 var_114_arg_1 = var_113; [L294] SORT_1 var_114 = var_114_arg_0 & var_114_arg_1; [L295] SORT_1 var_115_arg_0 = state_4; [L296] SORT_1 var_115 = ~var_115_arg_0; [L297] SORT_1 var_116_arg_0 = var_114; [L298] SORT_1 var_116_arg_1 = var_115; [L299] SORT_1 var_116 = var_116_arg_0 & var_116_arg_1; [L300] SORT_1 var_117_arg_0 = var_104; [L301] SORT_1 var_117_arg_1 = var_116; [L302] SORT_1 var_117 = var_117_arg_0 | var_117_arg_1; [L303] SORT_1 var_118_arg_0 = state_13; [L304] SORT_1 var_118 = ~var_118_arg_0; [L305] SORT_1 var_119_arg_0 = state_15; [L306] SORT_1 var_119 = ~var_119_arg_0; [L307] SORT_1 var_120_arg_0 = var_118; [L308] SORT_1 var_120_arg_1 = var_119; [L309] SORT_1 var_120 = var_120_arg_0 & var_120_arg_1; [L310] SORT_1 var_121_arg_0 = state_17; [L311] SORT_1 var_121 = ~var_121_arg_0; [L312] SORT_1 var_122_arg_0 = var_120; [L313] SORT_1 var_122_arg_1 = var_121; [L314] SORT_1 var_122 = var_122_arg_0 & var_122_arg_1; [L315] SORT_1 var_123_arg_0 = state_19; [L316] SORT_1 var_123 = ~var_123_arg_0; [L317] SORT_1 var_124_arg_0 = var_122; [L318] SORT_1 var_124_arg_1 = var_123; [L319] SORT_1 var_124 = var_124_arg_0 & var_124_arg_1; [L320] SORT_1 var_125_arg_0 = var_124; [L321] SORT_1 var_125_arg_1 = state_21; [L322] SORT_1 var_125 = var_125_arg_0 & var_125_arg_1; [L323] SORT_1 var_126_arg_0 = state_23; [L324] SORT_1 var_126 = ~var_126_arg_0; [L325] SORT_1 var_127_arg_0 = var_125; [L326] SORT_1 var_127_arg_1 = var_126; [L327] SORT_1 var_127 = var_127_arg_0 & var_127_arg_1; [L328] SORT_1 var_128_arg_0 = state_4; [L329] SORT_1 var_128 = ~var_128_arg_0; [L330] SORT_1 var_129_arg_0 = var_127; [L331] SORT_1 var_129_arg_1 = var_128; [L332] SORT_1 var_129 = var_129_arg_0 & var_129_arg_1; [L333] SORT_1 var_130_arg_0 = var_117; [L334] SORT_1 var_130_arg_1 = var_129; [L335] SORT_1 var_130 = var_130_arg_0 | var_130_arg_1; [L336] SORT_1 var_131_arg_0 = state_13; [L337] SORT_1 var_131 = ~var_131_arg_0; [L338] SORT_1 var_132_arg_0 = state_15; [L339] SORT_1 var_132 = ~var_132_arg_0; [L340] SORT_1 var_133_arg_0 = var_131; [L341] SORT_1 var_133_arg_1 = var_132; [L342] SORT_1 var_133 = var_133_arg_0 & var_133_arg_1; [L343] SORT_1 var_134_arg_0 = state_17; [L344] SORT_1 var_134 = ~var_134_arg_0; [L345] SORT_1 var_135_arg_0 = var_133; [L346] SORT_1 var_135_arg_1 = var_134; [L347] SORT_1 var_135 = var_135_arg_0 & var_135_arg_1; [L348] SORT_1 var_136_arg_0 = state_19; [L349] SORT_1 var_136 = ~var_136_arg_0; [L350] SORT_1 var_137_arg_0 = var_135; [L351] SORT_1 var_137_arg_1 = var_136; [L352] SORT_1 var_137 = var_137_arg_0 & var_137_arg_1; [L353] SORT_1 var_138_arg_0 = state_21; [L354] SORT_1 var_138 = ~var_138_arg_0; [L355] SORT_1 var_139_arg_0 = var_137; [L356] SORT_1 var_139_arg_1 = var_138; [L357] SORT_1 var_139 = var_139_arg_0 & var_139_arg_1; [L358] SORT_1 var_140_arg_0 = var_139; [L359] SORT_1 var_140_arg_1 = state_23; [L360] SORT_1 var_140 = var_140_arg_0 & var_140_arg_1; [L361] SORT_1 var_141_arg_0 = state_4; [L362] SORT_1 var_141 = ~var_141_arg_0; [L363] SORT_1 var_142_arg_0 = var_140; [L364] SORT_1 var_142_arg_1 = var_141; [L365] SORT_1 var_142 = var_142_arg_0 & var_142_arg_1; [L366] SORT_1 var_143_arg_0 = var_130; [L367] SORT_1 var_143_arg_1 = var_142; [L368] SORT_1 var_143 = var_143_arg_0 | var_143_arg_1; [L369] SORT_1 var_144_arg_0 = state_13; [L370] SORT_1 var_144 = ~var_144_arg_0; [L371] SORT_1 var_145_arg_0 = state_15; [L372] SORT_1 var_145 = ~var_145_arg_0; [L373] SORT_1 var_146_arg_0 = var_144; [L374] SORT_1 var_146_arg_1 = var_145; [L375] SORT_1 var_146 = var_146_arg_0 & var_146_arg_1; [L376] SORT_1 var_147_arg_0 = state_17; [L377] SORT_1 var_147 = ~var_147_arg_0; [L378] SORT_1 var_148_arg_0 = var_146; [L379] SORT_1 var_148_arg_1 = var_147; [L380] SORT_1 var_148 = var_148_arg_0 & var_148_arg_1; [L381] SORT_1 var_149_arg_0 = state_19; [L382] SORT_1 var_149 = ~var_149_arg_0; [L383] SORT_1 var_150_arg_0 = var_148; [L384] SORT_1 var_150_arg_1 = var_149; [L385] SORT_1 var_150 = var_150_arg_0 & var_150_arg_1; [L386] SORT_1 var_151_arg_0 = state_21; [L387] SORT_1 var_151 = ~var_151_arg_0; [L388] SORT_1 var_152_arg_0 = var_150; [L389] SORT_1 var_152_arg_1 = var_151; [L390] SORT_1 var_152 = var_152_arg_0 & var_152_arg_1; [L391] SORT_1 var_153_arg_0 = state_23; [L392] SORT_1 var_153 = ~var_153_arg_0; [L393] SORT_1 var_154_arg_0 = var_152; [L394] SORT_1 var_154_arg_1 = var_153; [L395] SORT_1 var_154 = var_154_arg_0 & var_154_arg_1; [L396] SORT_1 var_155_arg_0 = var_154; [L397] SORT_1 var_155_arg_1 = state_4; [L398] SORT_1 var_155 = var_155_arg_0 & var_155_arg_1; [L399] SORT_1 var_156_arg_0 = var_143; [L400] SORT_1 var_156_arg_1 = var_155; [L401] SORT_1 var_156 = var_156_arg_0 | var_156_arg_1; [L402] var_156 = var_156 & mask_SORT_1 [L403] SORT_1 next_157_arg_1 = var_156; [L404] SORT_27 var_160_arg_0 = state_29; [L405] SORT_27 var_160_arg_1 = var_32; [L406] SORT_1 var_160 = var_160_arg_0 < var_160_arg_1; [L407] SORT_27 var_159_arg_0 = state_29; [L408] SORT_27 var_159_arg_1 = var_158; [L409] SORT_27 var_159 = var_159_arg_0 + var_159_arg_1; [L410] SORT_1 var_161_arg_0 = var_160; [L411] SORT_27 var_161_arg_1 = var_159; [L412] SORT_27 var_161_arg_2 = state_29; [L413] EXPR var_161_arg_0 ? var_161_arg_1 : var_161_arg_2 [L413] SORT_27 var_161 = var_161_arg_0 ? var_161_arg_1 : var_161_arg_2; [L414] SORT_1 var_162_arg_0 = state_15; [L415] SORT_27 var_162_arg_1 = var_161; [L416] SORT_27 var_162_arg_2 = state_29; [L417] EXPR var_162_arg_0 ? var_162_arg_1 : var_162_arg_2 [L417] SORT_27 var_162 = var_162_arg_0 ? var_162_arg_1 : var_162_arg_2; [L418] SORT_1 var_163_arg_0 = state_25; [L419] SORT_27 var_163_arg_1 = var_162; [L420] SORT_27 var_163_arg_2 = state_29; [L421] EXPR var_163_arg_0 ? var_163_arg_1 : var_163_arg_2 [L421] SORT_27 var_163 = var_163_arg_0 ? var_163_arg_1 : var_163_arg_2; [L422] var_163 = var_163 & mask_SORT_27 [L423] SORT_27 next_164_arg_1 = var_163; [L425] state_4 = next_42_arg_1 [L426] state_13 = next_44_arg_1 [L427] state_15 = next_50_arg_1 [L428] state_17 = next_54_arg_1 [L429] state_19 = next_56_arg_1 [L430] state_21 = next_61_arg_1 [L431] state_23 = next_66_arg_1 [L432] state_25 = next_157_arg_1 [L433] state_29 = next_164_arg_1 [L70] input_2 = __VERIFIER_nondet_uchar() [L73] SORT_1 var_6_arg_0 = state_4; [L74] SORT_1 var_6 = ~var_6_arg_0; [L75] SORT_1 var_10_arg_0 = var_6; [L76] SORT_1 var_10 = ~var_10_arg_0; [L77] SORT_1 var_11_arg_0 = var_9; [L78] SORT_1 var_11_arg_1 = var_10; [L79] SORT_1 var_11 = var_11_arg_0 & var_11_arg_1; [L80] var_11 = var_11 & mask_SORT_1 [L81] SORT_1 bad_12_arg_0 = var_11; [L82] CALL __VERIFIER_assert(!(bad_12_arg_0)) [L20] COND TRUE !(cond) [L20] reach_error() - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 31 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 759.5s, OverallIterations: 30, TraceHistogramMax: 6, PathProgramHistogramMax: 5, EmptinessCheckTime: 0.1s, AutomataDifference: 48.8s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 5872 SdHoareTripleChecker+Valid, 6.0s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 5872 mSDsluCounter, 13200 SdHoareTripleChecker+Invalid, 5.3s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 3165 IncrementalHoareTripleChecker+Unchecked, 11829 mSDsCounter, 385 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 2760 IncrementalHoareTripleChecker+Invalid, 6310 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 385 mSolverCounterUnsat, 1371 mSDtfsCounter, 2760 mSolverCounterSat, 0.1s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 6723 GetRequests, 5822 SyntacticMatches, 62 SemanticMatches, 839 ConstructedPredicates, 0 IntricatePredicates, 1 DeprecatedPredicates, 17387 ImplicationChecksByTransitivity, 614.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=502occurred in iteration=24, InterpolantAutomatonStates: 407, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.6s AutomataMinimizationTime, 29 MinimizatonAttempts, 2052 StatesRemovedByMinimization, 24 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 7.2s SsaConstructionTime, 15.3s SatisfiabilityAnalysisTime, 666.4s InterpolantComputationTime, 3929 NumberOfCodeBlocks, 3791 NumberOfCodeBlocksAsserted, 83 NumberOfCheckSat, 6341 ConstructedInterpolants, 1995 QuantifiedInterpolants, 132945 SizeOfPredicates, 2317 NumberOfNonLiveVariables, 60052 ConjunctsInSsa, 2575 ConjunctsInUnsatCore, 96 InterpolantComputations, 20 PerfectInterpolantSequences, 3706/6797 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Result: UNKNOWN