./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_QF_BV_fru32_p2.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 5e519f3a Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_QF_BV_fru32_p2.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 68247466317aee0244dc7f575ccae08683247b6402561e65aded8c5c88cd935b --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-5e519f3 [2022-11-03 03:33:42,381 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-03 03:33:42,384 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-03 03:33:42,428 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-03 03:33:42,428 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-03 03:33:42,433 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-03 03:33:42,435 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-03 03:33:42,440 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-03 03:33:42,442 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-03 03:33:42,445 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-03 03:33:42,446 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-03 03:33:42,449 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-03 03:33:42,450 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-03 03:33:42,457 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-03 03:33:42,459 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-03 03:33:42,461 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-03 03:33:42,463 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-03 03:33:42,464 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-03 03:33:42,465 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-03 03:33:42,467 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-03 03:33:42,471 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-03 03:33:42,472 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-03 03:33:42,473 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-03 03:33:42,476 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-03 03:33:42,480 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-03 03:33:42,482 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-03 03:33:42,483 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-03 03:33:42,485 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-03 03:33:42,485 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-03 03:33:42,486 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-03 03:33:42,487 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-03 03:33:42,488 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-03 03:33:42,490 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-03 03:33:42,491 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-03 03:33:42,492 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-03 03:33:42,492 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-03 03:33:42,493 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-03 03:33:42,493 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-03 03:33:42,493 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-03 03:33:42,494 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-03 03:33:42,495 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-03 03:33:42,495 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Default.epf [2022-11-03 03:33:42,530 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-03 03:33:42,530 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-03 03:33:42,530 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-03 03:33:42,531 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-03 03:33:42,531 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-03 03:33:42,531 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-03 03:33:42,532 INFO L138 SettingsManager]: * User list type=DISABLED [2022-11-03 03:33:42,532 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-11-03 03:33:42,532 INFO L138 SettingsManager]: * Explicit value domain=true [2022-11-03 03:33:42,532 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2022-11-03 03:33:42,533 INFO L138 SettingsManager]: * Octagon Domain=false [2022-11-03 03:33:42,533 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-11-03 03:33:42,533 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2022-11-03 03:33:42,533 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2022-11-03 03:33:42,533 INFO L138 SettingsManager]: * Interval Domain=false [2022-11-03 03:33:42,534 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2022-11-03 03:33:42,534 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2022-11-03 03:33:42,534 INFO L138 SettingsManager]: * Simplification Technique=POLY_PAC [2022-11-03 03:33:42,535 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-03 03:33:42,535 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-03 03:33:42,535 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-03 03:33:42,536 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-03 03:33:42,536 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-03 03:33:42,536 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-03 03:33:42,536 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-03 03:33:42,536 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-03 03:33:42,537 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-03 03:33:42,537 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-03 03:33:42,537 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-03 03:33:42,537 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 03:33:42,538 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-03 03:33:42,538 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2022-11-03 03:33:42,538 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-03 03:33:42,538 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-03 03:33:42,538 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2022-11-03 03:33:42,539 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-11-03 03:33:42,539 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-03 03:33:42,539 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-11-03 03:33:42,539 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 68247466317aee0244dc7f575ccae08683247b6402561e65aded8c5c88cd935b [2022-11-03 03:33:42,772 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-03 03:33:42,798 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-03 03:33:42,801 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-03 03:33:42,802 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-03 03:33:42,803 INFO L275 PluginConnector]: CDTParser initialized [2022-11-03 03:33:42,804 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_QF_BV_fru32_p2.c [2022-11-03 03:33:42,870 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/data/b818e7468/86b253461bb54d21a10e16135faa6698/FLAG7d5d82d58 [2022-11-03 03:33:43,329 INFO L306 CDTParser]: Found 1 translation units. [2022-11-03 03:33:43,330 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_QF_BV_fru32_p2.c [2022-11-03 03:33:43,344 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/data/b818e7468/86b253461bb54d21a10e16135faa6698/FLAG7d5d82d58 [2022-11-03 03:33:43,678 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/data/b818e7468/86b253461bb54d21a10e16135faa6698 [2022-11-03 03:33:43,680 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-03 03:33:43,682 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-03 03:33:43,687 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-03 03:33:43,687 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-03 03:33:43,691 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-03 03:33:43,692 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 03:33:43" (1/1) ... [2022-11-03 03:33:43,694 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5fe315b0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:33:43, skipping insertion in model container [2022-11-03 03:33:43,695 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 03:33:43" (1/1) ... [2022-11-03 03:33:43,702 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-03 03:33:43,737 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-03 03:33:43,925 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_QF_BV_fru32_p2.c[1107,1120] [2022-11-03 03:33:44,049 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 03:33:44,052 INFO L203 MainTranslator]: Completed pre-run [2022-11-03 03:33:44,072 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_QF_BV_fru32_p2.c[1107,1120] [2022-11-03 03:33:44,185 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 03:33:44,205 INFO L208 MainTranslator]: Completed translation [2022-11-03 03:33:44,205 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:33:44 WrapperNode [2022-11-03 03:33:44,205 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-03 03:33:44,220 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-03 03:33:44,220 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-03 03:33:44,220 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-03 03:33:44,228 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:33:44" (1/1) ... [2022-11-03 03:33:44,244 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:33:44" (1/1) ... [2022-11-03 03:33:44,306 INFO L138 Inliner]: procedures = 11, calls = 3, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 465 [2022-11-03 03:33:44,306 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-03 03:33:44,307 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-03 03:33:44,307 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-03 03:33:44,307 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-03 03:33:44,316 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:33:44" (1/1) ... [2022-11-03 03:33:44,317 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:33:44" (1/1) ... [2022-11-03 03:33:44,325 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:33:44" (1/1) ... [2022-11-03 03:33:44,335 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:33:44" (1/1) ... [2022-11-03 03:33:44,357 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:33:44" (1/1) ... [2022-11-03 03:33:44,373 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:33:44" (1/1) ... [2022-11-03 03:33:44,376 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:33:44" (1/1) ... [2022-11-03 03:33:44,380 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:33:44" (1/1) ... [2022-11-03 03:33:44,396 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-03 03:33:44,398 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-03 03:33:44,398 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-03 03:33:44,398 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-03 03:33:44,399 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:33:44" (1/1) ... [2022-11-03 03:33:44,406 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 03:33:44,416 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:33:44,435 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-03 03:33:44,466 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-03 03:33:44,485 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-03 03:33:44,486 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-03 03:33:44,692 INFO L235 CfgBuilder]: Building ICFG [2022-11-03 03:33:44,708 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-03 03:33:45,755 INFO L276 CfgBuilder]: Performing block encoding [2022-11-03 03:33:46,206 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-03 03:33:46,207 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-03 03:33:46,209 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 03:33:46 BoogieIcfgContainer [2022-11-03 03:33:46,209 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-03 03:33:46,211 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-03 03:33:46,212 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-03 03:33:46,215 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-03 03:33:46,216 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 03.11 03:33:43" (1/3) ... [2022-11-03 03:33:46,217 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@35197bcb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 03:33:46, skipping insertion in model container [2022-11-03 03:33:46,217 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:33:44" (2/3) ... [2022-11-03 03:33:46,217 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@35197bcb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 03:33:46, skipping insertion in model container [2022-11-03 03:33:46,219 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 03:33:46" (3/3) ... [2022-11-03 03:33:46,221 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.vis_QF_BV_fru32_p2.c [2022-11-03 03:33:46,243 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-03 03:33:46,243 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-03 03:33:46,304 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-03 03:33:46,317 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@db17a20, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-03 03:33:46,318 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-03 03:33:46,324 INFO L276 IsEmpty]: Start isEmpty. Operand has 7 states, 5 states have (on average 1.6) internal successors, (8), 6 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:46,333 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2022-11-03 03:33:46,334 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:33:46,334 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1] [2022-11-03 03:33:46,335 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:33:46,342 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:33:46,342 INFO L85 PathProgramCache]: Analyzing trace with hash 4244801, now seen corresponding path program 1 times [2022-11-03 03:33:46,352 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-03 03:33:46,352 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [961098543] [2022-11-03 03:33:46,352 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:33:46,353 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-03 03:33:48,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-03 03:33:48,651 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-03 03:33:49,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-03 03:33:49,908 INFO L130 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2022-11-03 03:33:49,910 INFO L359 BasicCegarLoop]: Counterexample is feasible [2022-11-03 03:33:49,911 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-11-03 03:33:49,913 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-11-03 03:33:49,917 INFO L444 BasicCegarLoop]: Path program histogram: [1] [2022-11-03 03:33:49,921 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-03 03:33:49,972 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:33:49,996 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 03.11 03:33:49 BoogieIcfgContainer [2022-11-03 03:33:50,001 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-03 03:33:50,002 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-03 03:33:50,002 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-03 03:33:50,002 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-03 03:33:50,004 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 03:33:46" (3/4) ... [2022-11-03 03:33:50,007 INFO L140 WitnessPrinter]: No result that supports witness generation found [2022-11-03 03:33:50,007 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-03 03:33:50,010 INFO L158 Benchmark]: Toolchain (without parser) took 6327.56ms. Allocated memory was 117.4MB in the beginning and 182.5MB in the end (delta: 65.0MB). Free memory was 76.8MB in the beginning and 85.3MB in the end (delta: -8.5MB). Peak memory consumption was 55.6MB. Max. memory is 16.1GB. [2022-11-03 03:33:50,011 INFO L158 Benchmark]: CDTParser took 0.20ms. Allocated memory is still 117.4MB. Free memory is still 93.7MB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-03 03:33:50,012 INFO L158 Benchmark]: CACSL2BoogieTranslator took 532.53ms. Allocated memory is still 117.4MB. Free memory was 76.6MB in the beginning and 83.7MB in the end (delta: -7.0MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. [2022-11-03 03:33:50,014 INFO L158 Benchmark]: Boogie Procedure Inliner took 86.22ms. Allocated memory is still 117.4MB. Free memory was 83.7MB in the beginning and 76.4MB in the end (delta: 7.2MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2022-11-03 03:33:50,015 INFO L158 Benchmark]: Boogie Preprocessor took 90.09ms. Allocated memory is still 117.4MB. Free memory was 76.4MB in the beginning and 72.2MB in the end (delta: 4.2MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. [2022-11-03 03:33:50,020 INFO L158 Benchmark]: RCFGBuilder took 1811.62ms. Allocated memory was 117.4MB in the beginning and 146.8MB in the end (delta: 29.4MB). Free memory was 72.2MB in the beginning and 97.3MB in the end (delta: -25.1MB). Peak memory consumption was 71.0MB. Max. memory is 16.1GB. [2022-11-03 03:33:50,021 INFO L158 Benchmark]: TraceAbstraction took 3789.72ms. Allocated memory was 146.8MB in the beginning and 182.5MB in the end (delta: 35.7MB). Free memory was 97.3MB in the beginning and 85.3MB in the end (delta: 12.0MB). Peak memory consumption was 91.7MB. Max. memory is 16.1GB. [2022-11-03 03:33:50,022 INFO L158 Benchmark]: Witness Printer took 6.91ms. Allocated memory is still 182.5MB. Free memory is still 85.3MB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-03 03:33:50,027 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20ms. Allocated memory is still 117.4MB. Free memory is still 93.7MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 532.53ms. Allocated memory is still 117.4MB. Free memory was 76.6MB in the beginning and 83.7MB in the end (delta: -7.0MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 86.22ms. Allocated memory is still 117.4MB. Free memory was 83.7MB in the beginning and 76.4MB in the end (delta: 7.2MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Preprocessor took 90.09ms. Allocated memory is still 117.4MB. Free memory was 76.4MB in the beginning and 72.2MB in the end (delta: 4.2MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. * RCFGBuilder took 1811.62ms. Allocated memory was 117.4MB in the beginning and 146.8MB in the end (delta: 29.4MB). Free memory was 72.2MB in the beginning and 97.3MB in the end (delta: -25.1MB). Peak memory consumption was 71.0MB. Max. memory is 16.1GB. * TraceAbstraction took 3789.72ms. Allocated memory was 146.8MB in the beginning and 182.5MB in the end (delta: 35.7MB). Free memory was 97.3MB in the beginning and 85.3MB in the end (delta: 12.0MB). Peak memory consumption was 91.7MB. Max. memory is 16.1GB. * Witness Printer took 6.91ms. Allocated memory is still 182.5MB. Free memory is still 85.3MB. There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 20]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: overapproximation of bitwiseOr at line 294, overapproximation of bitwiseComplement at line 325, overapproximation of bitwiseAnd at line 134. Possible FailurePath: [L25] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 6); [L26] const SORT_1 msb_SORT_1 = (SORT_1)1 << (6 - 1); [L28] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 1); [L29] const SORT_3 msb_SORT_3 = (SORT_3)1 << (1 - 1); [L31] const SORT_6 mask_SORT_6 = (SORT_6)-1 >> (sizeof(SORT_6) * 8 - 32); [L32] const SORT_6 msb_SORT_6 = (SORT_6)1 << (32 - 1); [L34] const SORT_24 mask_SORT_24 = (SORT_24)-1 >> (sizeof(SORT_24) * 8 - 5); [L35] const SORT_24 msb_SORT_24 = (SORT_24)1 << (5 - 1); [L37] const SORT_33 mask_SORT_33 = (SORT_33)-1 >> (sizeof(SORT_33) * 8 - 2); [L38] const SORT_33 msb_SORT_33 = (SORT_33)1 << (2 - 1); [L40] const SORT_1 var_21 = 0; [L41] const SORT_24 var_26 = 31; [L42] const SORT_6 var_28 = 0; [L43] const SORT_33 var_34 = 0; [L44] const SORT_33 var_35 = 1; [L45] const SORT_3 var_39 = 1; [L46] const SORT_3 var_45 = 0; [L47] const SORT_33 var_58 = 2; [L48] const SORT_33 var_75 = 3; [L50] SORT_1 input_2; [L51] SORT_3 input_4; [L52] SORT_1 input_5; [L53] SORT_6 input_7; [L54] SORT_3 input_8; [L55] SORT_6 input_9; [L56] SORT_1 input_10; [L57] SORT_1 input_11; [L58] SORT_1 input_12; [L59] SORT_3 input_13; [L60] SORT_3 input_14; [L61] SORT_3 input_15; [L62] SORT_3 input_16; [L63] SORT_3 input_17; [L64] SORT_3 input_18; [L65] SORT_3 input_19; [L66] SORT_3 input_20; [L67] SORT_3 input_120; [L68] SORT_3 input_124; [L69] SORT_3 input_126; [L70] SORT_33 input_129; [L71] SORT_3 input_131; [L72] SORT_6 input_134; [L73] SORT_3 input_136; [L75] SORT_1 state_22 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L76] SORT_6 state_29 = __VERIFIER_nondet_uint() & mask_SORT_6; [L77] SORT_6 state_31 = __VERIFIER_nondet_uint() & mask_SORT_6; [L78] SORT_1 state_36 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L79] SORT_1 state_41 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L80] SORT_3 state_46 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L81] SORT_3 state_50 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L82] SORT_1 state_60 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L83] SORT_3 state_64 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L84] SORT_3 state_68 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L85] SORT_1 state_77 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L86] SORT_3 state_81 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L87] SORT_3 state_85 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L88] SORT_3 state_89 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L89] SORT_6 state_98 = __VERIFIER_nondet_uint() & mask_SORT_6; [L90] SORT_1 state_116 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L91] SORT_3 state_118 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L92] SORT_3 state_122 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L94] SORT_1 init_23_arg_1 = var_21; [L95] state_22 = init_23_arg_1 [L96] SORT_6 init_30_arg_1 = var_28; [L97] state_29 = init_30_arg_1 [L98] SORT_6 init_32_arg_1 = var_28; [L99] state_31 = init_32_arg_1 [L100] SORT_1 init_37_arg_1 = var_21; [L101] state_36 = init_37_arg_1 [L102] SORT_1 init_42_arg_1 = var_21; [L103] state_41 = init_42_arg_1 [L104] SORT_3 init_47_arg_1 = var_45; [L105] state_46 = init_47_arg_1 [L106] SORT_3 init_51_arg_1 = var_45; [L107] state_50 = init_51_arg_1 [L108] SORT_1 init_61_arg_1 = var_21; [L109] state_60 = init_61_arg_1 [L110] SORT_3 init_65_arg_1 = var_45; [L111] state_64 = init_65_arg_1 [L112] SORT_3 init_69_arg_1 = var_45; [L113] state_68 = init_69_arg_1 [L114] SORT_1 init_78_arg_1 = var_21; [L115] state_77 = init_78_arg_1 [L116] SORT_3 init_82_arg_1 = var_45; [L117] state_81 = init_82_arg_1 [L118] SORT_3 init_86_arg_1 = var_45; [L119] state_85 = init_86_arg_1 [L120] SORT_3 init_90_arg_1 = var_45; [L121] state_89 = init_90_arg_1 [L122] SORT_6 init_99_arg_1 = var_28; [L123] state_98 = init_99_arg_1 [L124] SORT_1 init_117_arg_1 = var_21; [L125] state_116 = init_117_arg_1 [L126] SORT_3 init_119_arg_1 = var_45; [L127] state_118 = init_119_arg_1 [L128] SORT_3 init_123_arg_1 = var_45; [L129] state_122 = init_123_arg_1 VAL [init_117_arg_1=0, init_119_arg_1=0, init_123_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_37_arg_1=0, init_42_arg_1=0, init_47_arg_1=0, init_51_arg_1=0, init_61_arg_1=0, init_65_arg_1=0, init_69_arg_1=0, init_78_arg_1=0, init_82_arg_1=0, init_86_arg_1=0, init_90_arg_1=0, init_99_arg_1=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_45=0, var_58=2, var_75=3] [L132] input_2 = __VERIFIER_nondet_uchar() [L133] input_4 = __VERIFIER_nondet_uchar() [L134] input_4 = input_4 & mask_SORT_3 [L135] input_5 = __VERIFIER_nondet_uchar() [L136] input_5 = input_5 & mask_SORT_1 [L137] input_7 = __VERIFIER_nondet_uint() [L138] input_8 = __VERIFIER_nondet_uchar() [L139] input_8 = input_8 & mask_SORT_3 [L140] input_9 = __VERIFIER_nondet_uint() [L141] input_10 = __VERIFIER_nondet_uchar() [L142] input_10 = input_10 & mask_SORT_1 [L143] input_11 = __VERIFIER_nondet_uchar() [L144] input_11 = input_11 & mask_SORT_1 [L145] input_12 = __VERIFIER_nondet_uchar() [L146] input_13 = __VERIFIER_nondet_uchar() [L147] input_14 = __VERIFIER_nondet_uchar() [L148] input_14 = input_14 & mask_SORT_3 [L149] input_15 = __VERIFIER_nondet_uchar() [L150] input_16 = __VERIFIER_nondet_uchar() [L151] input_16 = input_16 & mask_SORT_3 [L152] input_17 = __VERIFIER_nondet_uchar() [L153] input_17 = input_17 & mask_SORT_3 [L154] input_18 = __VERIFIER_nondet_uchar() [L155] input_18 = input_18 & mask_SORT_3 [L156] input_19 = __VERIFIER_nondet_uchar() [L157] input_19 = input_19 & mask_SORT_3 [L158] input_20 = __VERIFIER_nondet_uchar() [L159] input_120 = __VERIFIER_nondet_uchar() [L160] input_124 = __VERIFIER_nondet_uchar() [L161] input_126 = __VERIFIER_nondet_uchar() [L162] input_129 = __VERIFIER_nondet_uchar() [L163] input_131 = __VERIFIER_nondet_uchar() [L164] input_134 = __VERIFIER_nondet_uint() [L165] input_136 = __VERIFIER_nondet_uchar() [L168] SORT_1 var_25_arg_0 = state_22; [L169] SORT_24 var_25 = var_25_arg_0 >> 0; [L170] var_25 = var_25 & mask_SORT_24 [L171] SORT_24 var_27_arg_0 = var_25; [L172] SORT_24 var_27_arg_1 = var_26; [L173] SORT_3 var_27 = var_27_arg_0 == var_27_arg_1; [L174] SORT_1 var_54_arg_0 = state_36; [L175] SORT_24 var_54 = var_54_arg_0 >> 0; [L176] var_54 = var_54 & mask_SORT_24 [L177] SORT_24 var_105_arg_0 = var_54; [L178] SORT_24 var_105_arg_1 = var_26; [L179] SORT_3 var_105 = var_105_arg_0 == var_105_arg_1; [L180] SORT_1 var_38_arg_0 = state_36; [L181] SORT_3 var_38 = var_38_arg_0 >> 5; [L182] var_38 = var_38 & mask_SORT_3 [L183] SORT_3 var_76_arg_0 = var_38; [L184] SORT_3 var_76_arg_1 = var_39; [L185] SORT_3 var_76 = var_76_arg_0 == var_76_arg_1; [L186] SORT_1 var_79_arg_0 = state_36; [L187] SORT_1 var_79_arg_1 = state_77; [L188] SORT_3 var_79 = var_79_arg_0 == var_79_arg_1; [L189] SORT_3 var_80_arg_0 = var_76; [L190] SORT_3 var_80_arg_1 = var_79; [L191] SORT_3 var_80 = var_80_arg_0 & var_80_arg_1; [L192] SORT_3 var_83_arg_0 = state_81; [L193] SORT_3 var_83_arg_1 = var_39; [L194] SORT_3 var_83 = var_83_arg_0 != var_83_arg_1; [L195] SORT_3 var_84_arg_0 = var_80; [L196] SORT_3 var_84_arg_1 = var_83; [L197] SORT_3 var_84 = var_84_arg_0 & var_84_arg_1; [L198] SORT_3 var_87_arg_0 = state_85; [L199] SORT_3 var_87_arg_1 = var_39; [L200] SORT_3 var_87 = var_87_arg_0 == var_87_arg_1; [L201] SORT_3 var_88_arg_0 = var_84; [L202] SORT_3 var_88_arg_1 = var_87; [L203] SORT_3 var_88 = var_88_arg_0 & var_88_arg_1; [L204] SORT_3 var_91_arg_0 = state_89; [L205] SORT_3 var_91_arg_1 = var_39; [L206] SORT_3 var_91 = var_91_arg_0 == var_91_arg_1; [L207] SORT_3 var_92_arg_0 = var_88; [L208] SORT_3 var_92_arg_1 = var_91; [L209] SORT_3 var_92 = var_92_arg_0 & var_92_arg_1; [L210] SORT_24 var_93_arg_0 = var_54; [L211] SORT_24 var_93_arg_1 = var_26; [L212] SORT_3 var_93 = var_93_arg_0 != var_93_arg_1; [L213] SORT_3 var_94_arg_0 = var_92; [L214] SORT_3 var_94_arg_1 = var_93; [L215] SORT_3 var_94 = var_94_arg_0 & var_94_arg_1; [L216] var_94 = var_94 & mask_SORT_3 [L217] SORT_3 var_59_arg_0 = var_38; [L218] SORT_3 var_59_arg_1 = var_39; [L219] SORT_3 var_59 = var_59_arg_0 == var_59_arg_1; [L220] SORT_1 var_62_arg_0 = state_36; [L221] SORT_1 var_62_arg_1 = state_60; [L222] SORT_3 var_62 = var_62_arg_0 == var_62_arg_1; [L223] SORT_3 var_63_arg_0 = var_59; [L224] SORT_3 var_63_arg_1 = var_62; [L225] SORT_3 var_63 = var_63_arg_0 & var_63_arg_1; [L226] SORT_3 var_66_arg_0 = state_64; [L227] SORT_3 var_66_arg_1 = var_39; [L228] SORT_3 var_66 = var_66_arg_0 == var_66_arg_1; [L229] SORT_3 var_67_arg_0 = var_63; [L230] SORT_3 var_67_arg_1 = var_66; [L231] SORT_3 var_67 = var_67_arg_0 & var_67_arg_1; [L232] SORT_3 var_70_arg_0 = state_68; [L233] SORT_3 var_70_arg_1 = var_39; [L234] SORT_3 var_70 = var_70_arg_0 == var_70_arg_1; [L235] SORT_3 var_71_arg_0 = var_67; [L236] SORT_3 var_71_arg_1 = var_70; [L237] SORT_3 var_71 = var_71_arg_0 & var_71_arg_1; [L238] SORT_24 var_72_arg_0 = var_54; [L239] SORT_24 var_72_arg_1 = var_26; [L240] SORT_3 var_72 = var_72_arg_0 != var_72_arg_1; [L241] SORT_3 var_73_arg_0 = var_71; [L242] SORT_3 var_73_arg_1 = var_72; [L243] SORT_3 var_73 = var_73_arg_0 & var_73_arg_1; [L244] var_73 = var_73 & mask_SORT_3 [L245] SORT_3 var_40_arg_0 = var_38; [L246] SORT_3 var_40_arg_1 = var_39; [L247] SORT_3 var_40 = var_40_arg_0 == var_40_arg_1; [L248] SORT_1 var_43_arg_0 = state_36; [L249] SORT_1 var_43_arg_1 = state_41; [L250] SORT_3 var_43 = var_43_arg_0 == var_43_arg_1; [L251] SORT_3 var_44_arg_0 = var_40; [L252] SORT_3 var_44_arg_1 = var_43; [L253] SORT_3 var_44 = var_44_arg_0 & var_44_arg_1; [L254] SORT_3 var_48_arg_0 = state_46; [L255] SORT_3 var_48_arg_1 = var_39; [L256] SORT_3 var_48 = var_48_arg_0 == var_48_arg_1; [L257] SORT_3 var_49_arg_0 = var_44; [L258] SORT_3 var_49_arg_1 = var_48; [L259] SORT_3 var_49 = var_49_arg_0 & var_49_arg_1; [L260] SORT_3 var_52_arg_0 = state_50; [L261] SORT_3 var_52_arg_1 = var_39; [L262] SORT_3 var_52 = var_52_arg_0 == var_52_arg_1; [L263] SORT_3 var_53_arg_0 = var_49; [L264] SORT_3 var_53_arg_1 = var_52; [L265] SORT_3 var_53 = var_53_arg_0 & var_53_arg_1; [L266] SORT_24 var_55_arg_0 = var_54; [L267] SORT_24 var_55_arg_1 = var_26; [L268] SORT_3 var_55 = var_55_arg_0 != var_55_arg_1; [L269] SORT_3 var_56_arg_0 = var_53; [L270] SORT_3 var_56_arg_1 = var_55; [L271] SORT_3 var_56 = var_56_arg_0 & var_56_arg_1; [L272] var_56 = var_56 & mask_SORT_3 [L273] SORT_3 var_57_arg_0 = var_56; [L274] SORT_33 var_57_arg_1 = var_35; [L275] SORT_33 var_57_arg_2 = var_34; [L276] EXPR var_57_arg_0 ? var_57_arg_1 : var_57_arg_2 [L276] SORT_33 var_57 = var_57_arg_0 ? var_57_arg_1 : var_57_arg_2; [L277] SORT_3 var_74_arg_0 = var_73; [L278] SORT_33 var_74_arg_1 = var_58; [L279] SORT_33 var_74_arg_2 = var_57; [L280] EXPR var_74_arg_0 ? var_74_arg_1 : var_74_arg_2 [L280] SORT_33 var_74 = var_74_arg_0 ? var_74_arg_1 : var_74_arg_2; [L281] SORT_3 var_95_arg_0 = var_94; [L282] SORT_33 var_95_arg_1 = var_75; [L283] SORT_33 var_95_arg_2 = var_74; [L284] EXPR var_95_arg_0 ? var_95_arg_1 : var_95_arg_2 [L284] SORT_33 var_95 = var_95_arg_0 ? var_95_arg_1 : var_95_arg_2; [L285] var_95 = var_95 & mask_SORT_33 [L286] SORT_33 var_102_arg_0 = var_95; [L287] SORT_33 var_102_arg_1 = var_35; [L288] SORT_3 var_102 = var_102_arg_0 == var_102_arg_1; [L289] SORT_33 var_100_arg_0 = var_95; [L290] SORT_33 var_100_arg_1 = var_34; [L291] SORT_3 var_100 = var_100_arg_0 == var_100_arg_1; [L292] SORT_3 var_103_arg_0 = var_102; [L293] SORT_3 var_103_arg_1 = var_100; [L294] SORT_3 var_103 = var_103_arg_0 | var_103_arg_1; [L295] var_103 = var_103 & mask_SORT_3 [L296] SORT_3 var_101_arg_0 = var_100; [L297] SORT_6 var_101_arg_1 = var_28; [L298] SORT_6 var_101_arg_2 = state_98; [L299] EXPR var_101_arg_0 ? var_101_arg_1 : var_101_arg_2 [L299] SORT_6 var_101 = var_101_arg_0 ? var_101_arg_1 : var_101_arg_2; [L300] SORT_33 var_96_arg_0 = var_95; [L301] SORT_33 var_96_arg_1 = var_58; [L302] SORT_3 var_96 = var_96_arg_0 == var_96_arg_1; [L303] SORT_3 var_97_arg_0 = var_96; [L304] SORT_6 var_97_arg_1 = state_31; [L305] SORT_6 var_97_arg_2 = state_29; [L306] EXPR var_97_arg_0 ? var_97_arg_1 : var_97_arg_2 [L306] SORT_6 var_97 = var_97_arg_0 ? var_97_arg_1 : var_97_arg_2; [L307] SORT_3 var_104_arg_0 = var_103; [L308] SORT_6 var_104_arg_1 = var_101; [L309] SORT_6 var_104_arg_2 = var_97; [L310] EXPR var_104_arg_0 ? var_104_arg_1 : var_104_arg_2 [L310] SORT_6 var_104 = var_104_arg_0 ? var_104_arg_1 : var_104_arg_2; [L311] SORT_3 var_106_arg_0 = var_105; [L312] SORT_6 var_106_arg_1 = var_28; [L313] SORT_6 var_106_arg_2 = var_104; [L314] EXPR var_106_arg_0 ? var_106_arg_1 : var_106_arg_2 [L314] SORT_6 var_106 = var_106_arg_0 ? var_106_arg_1 : var_106_arg_2; [L315] SORT_6 var_107_arg_0 = var_106; [L316] SORT_1 var_107 = var_107_arg_0 >> 26; [L317] var_107 = var_107 & mask_SORT_1 [L318] SORT_1 var_108_arg_0 = var_107; [L319] SORT_1 var_108_arg_1 = var_21; [L320] SORT_3 var_108 = var_108_arg_0 == var_108_arg_1; [L321] SORT_3 var_109_arg_0 = var_27; [L322] SORT_3 var_109_arg_1 = var_108; [L323] SORT_3 var_109 = var_109_arg_0 & var_109_arg_1; [L324] SORT_3 var_110_arg_0 = var_109; [L325] SORT_3 var_110 = ~var_110_arg_0; [L326] SORT_3 var_113_arg_0 = var_110; [L327] SORT_3 var_113 = ~var_113_arg_0; [L328] SORT_3 var_114_arg_0 = var_39; [L329] SORT_3 var_114_arg_1 = var_113; [L330] SORT_3 var_114 = var_114_arg_0 & var_114_arg_1; [L331] var_114 = var_114 & mask_SORT_3 [L332] SORT_3 bad_115_arg_0 = var_114; [L333] CALL __VERIFIER_assert(!(bad_115_arg_0)) [L20] COND TRUE !(cond) VAL [\old(cond)=0, cond=0] [L20] reach_error() VAL [\old(cond)=0, cond=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 7 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 3.6s, OverallIterations: 1, TraceHistogramMax: 1, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: , PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=7occurred in iteration=0, InterpolantAutomatonStates: 0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 2.2s SatisfiabilityAnalysisTime, 0.0s InterpolantComputationTime, 4 NumberOfCodeBlocks, 4 NumberOfCodeBlocksAsserted, 1 NumberOfCheckSat, 0 ConstructedInterpolants, 0 QuantifiedInterpolants, 0 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 0 InterpolantComputations, 0 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2022-11-03 03:33:50,076 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_QF_BV_fru32_p2.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 68247466317aee0244dc7f575ccae08683247b6402561e65aded8c5c88cd935b --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-5e519f3 [2022-11-03 03:33:52,449 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-03 03:33:52,451 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-03 03:33:52,478 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-03 03:33:52,479 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-03 03:33:52,480 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-03 03:33:52,481 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-03 03:33:52,483 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-03 03:33:52,485 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-03 03:33:52,486 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-03 03:33:52,487 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-03 03:33:52,489 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-03 03:33:52,489 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-03 03:33:52,490 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-03 03:33:52,492 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-03 03:33:52,493 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-03 03:33:52,494 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-03 03:33:52,495 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-03 03:33:52,497 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-03 03:33:52,499 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-03 03:33:52,501 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-03 03:33:52,502 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-03 03:33:52,503 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-03 03:33:52,504 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-03 03:33:52,508 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-03 03:33:52,514 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-03 03:33:52,514 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-03 03:33:52,515 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-03 03:33:52,516 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-03 03:33:52,517 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-03 03:33:52,517 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-03 03:33:52,518 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-03 03:33:52,519 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-03 03:33:52,519 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-03 03:33:52,520 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-03 03:33:52,521 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-03 03:33:52,521 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-03 03:33:52,522 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-03 03:33:52,522 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-03 03:33:52,523 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-03 03:33:52,524 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-03 03:33:52,533 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Bitvector.epf [2022-11-03 03:33:52,574 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-03 03:33:52,575 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-03 03:33:52,575 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-03 03:33:52,575 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-03 03:33:52,576 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-03 03:33:52,576 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-03 03:33:52,577 INFO L138 SettingsManager]: * User list type=DISABLED [2022-11-03 03:33:52,577 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-11-03 03:33:52,577 INFO L138 SettingsManager]: * Explicit value domain=true [2022-11-03 03:33:52,577 INFO L138 SettingsManager]: * Octagon Domain=false [2022-11-03 03:33:52,578 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-11-03 03:33:52,578 INFO L138 SettingsManager]: * Interval Domain=false [2022-11-03 03:33:52,579 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-03 03:33:52,579 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-03 03:33:52,579 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-03 03:33:52,579 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-03 03:33:52,580 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-03 03:33:52,580 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-11-03 03:33:52,580 INFO L138 SettingsManager]: * Use bitvectors instead of ints=true [2022-11-03 03:33:52,580 INFO L138 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2022-11-03 03:33:52,581 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-03 03:33:52,581 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-03 03:33:52,581 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-03 03:33:52,581 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-03 03:33:52,582 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-03 03:33:52,582 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-03 03:33:52,582 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 03:33:52,582 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-03 03:33:52,583 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-03 03:33:52,583 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-03 03:33:52,583 INFO L138 SettingsManager]: * Trace refinement strategy=WALRUS [2022-11-03 03:33:52,583 INFO L138 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2022-11-03 03:33:52,584 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-03 03:33:52,584 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-11-03 03:33:52,584 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-11-03 03:33:52,584 INFO L138 SettingsManager]: * Logic for external solver=AUFBV WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 68247466317aee0244dc7f575ccae08683247b6402561e65aded8c5c88cd935b [2022-11-03 03:33:52,975 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-03 03:33:53,004 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-03 03:33:53,007 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-03 03:33:53,008 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-03 03:33:53,010 INFO L275 PluginConnector]: CDTParser initialized [2022-11-03 03:33:53,016 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_QF_BV_fru32_p2.c [2022-11-03 03:33:53,093 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/data/ab855df51/f7d81da737d94f6aa391044d9ed67136/FLAGd0a88874c [2022-11-03 03:33:53,621 INFO L306 CDTParser]: Found 1 translation units. [2022-11-03 03:33:53,622 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_QF_BV_fru32_p2.c [2022-11-03 03:33:53,633 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/data/ab855df51/f7d81da737d94f6aa391044d9ed67136/FLAGd0a88874c [2022-11-03 03:33:53,928 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/data/ab855df51/f7d81da737d94f6aa391044d9ed67136 [2022-11-03 03:33:53,931 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-03 03:33:53,932 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-03 03:33:53,933 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-03 03:33:53,933 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-03 03:33:53,940 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-03 03:33:53,940 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 03:33:53" (1/1) ... [2022-11-03 03:33:53,941 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2074da4f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:33:53, skipping insertion in model container [2022-11-03 03:33:53,942 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 03:33:53" (1/1) ... [2022-11-03 03:33:53,954 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-03 03:33:54,014 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-03 03:33:54,160 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_QF_BV_fru32_p2.c[1107,1120] [2022-11-03 03:33:54,351 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 03:33:54,355 INFO L203 MainTranslator]: Completed pre-run [2022-11-03 03:33:54,370 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_QF_BV_fru32_p2.c[1107,1120] [2022-11-03 03:33:54,459 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 03:33:54,474 INFO L208 MainTranslator]: Completed translation [2022-11-03 03:33:54,475 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:33:54 WrapperNode [2022-11-03 03:33:54,475 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-03 03:33:54,477 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-03 03:33:54,477 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-03 03:33:54,477 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-03 03:33:54,482 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:33:54" (1/1) ... [2022-11-03 03:33:54,494 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:33:54" (1/1) ... [2022-11-03 03:33:54,543 INFO L138 Inliner]: procedures = 11, calls = 3, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 465 [2022-11-03 03:33:54,543 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-03 03:33:54,544 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-03 03:33:54,544 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-03 03:33:54,544 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-03 03:33:54,563 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:33:54" (1/1) ... [2022-11-03 03:33:54,563 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:33:54" (1/1) ... [2022-11-03 03:33:54,570 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:33:54" (1/1) ... [2022-11-03 03:33:54,570 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:33:54" (1/1) ... [2022-11-03 03:33:54,580 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:33:54" (1/1) ... [2022-11-03 03:33:54,585 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:33:54" (1/1) ... [2022-11-03 03:33:54,588 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:33:54" (1/1) ... [2022-11-03 03:33:54,590 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:33:54" (1/1) ... [2022-11-03 03:33:54,595 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-03 03:33:54,596 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-03 03:33:54,596 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-03 03:33:54,596 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-03 03:33:54,597 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:33:54" (1/1) ... [2022-11-03 03:33:54,603 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 03:33:54,615 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:33:54,626 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-03 03:33:54,653 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-03 03:33:54,684 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-03 03:33:54,684 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-03 03:33:54,902 INFO L235 CfgBuilder]: Building ICFG [2022-11-03 03:33:54,904 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-03 03:33:55,429 INFO L276 CfgBuilder]: Performing block encoding [2022-11-03 03:33:55,436 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-03 03:33:55,437 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-03 03:33:55,439 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 03:33:55 BoogieIcfgContainer [2022-11-03 03:33:55,439 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-03 03:33:55,441 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-03 03:33:55,442 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-03 03:33:55,445 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-03 03:33:55,445 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 03.11 03:33:53" (1/3) ... [2022-11-03 03:33:55,446 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@532a07c6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 03:33:55, skipping insertion in model container [2022-11-03 03:33:55,446 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:33:54" (2/3) ... [2022-11-03 03:33:55,447 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@532a07c6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 03:33:55, skipping insertion in model container [2022-11-03 03:33:55,447 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 03:33:55" (3/3) ... [2022-11-03 03:33:55,448 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.vis_QF_BV_fru32_p2.c [2022-11-03 03:33:55,489 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-03 03:33:55,490 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-03 03:33:55,571 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-03 03:33:55,579 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@175c4b2, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-03 03:33:55,580 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-03 03:33:55,585 INFO L276 IsEmpty]: Start isEmpty. Operand has 33 states, 31 states have (on average 1.4838709677419355) internal successors, (46), 32 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:55,591 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-11-03 03:33:55,592 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:33:55,592 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:33:55,593 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:33:55,601 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:33:55,601 INFO L85 PathProgramCache]: Analyzing trace with hash -1799458747, now seen corresponding path program 1 times [2022-11-03 03:33:55,617 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:33:55,618 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [18802874] [2022-11-03 03:33:55,618 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:33:55,618 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:33:55,619 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:33:55,626 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:33:55,665 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (2)] Waiting until timeout for monitored process [2022-11-03 03:33:55,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:33:55,923 INFO L263 TraceCheckSpWp]: Trace formula consists of 255 conjuncts, 16 conjunts are in the unsatisfiable core [2022-11-03 03:33:55,933 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:33:56,076 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:33:56,076 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:33:56,077 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:33:56,077 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [18802874] [2022-11-03 03:33:56,078 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [18802874] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:33:56,078 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:33:56,078 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-03 03:33:56,080 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2070126363] [2022-11-03 03:33:56,081 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:33:56,088 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 03:33:56,088 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:33:56,127 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 03:33:56,128 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 03:33:56,130 INFO L87 Difference]: Start difference. First operand has 33 states, 31 states have (on average 1.4838709677419355) internal successors, (46), 32 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 4.75) internal successors, (19), 4 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:56,258 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:33:56,259 INFO L93 Difference]: Finished difference Result 113 states and 167 transitions. [2022-11-03 03:33:56,260 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-03 03:33:56,261 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 4.75) internal successors, (19), 4 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 19 [2022-11-03 03:33:56,262 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:33:56,270 INFO L225 Difference]: With dead ends: 113 [2022-11-03 03:33:56,270 INFO L226 Difference]: Without dead ends: 82 [2022-11-03 03:33:56,273 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-03 03:33:56,276 INFO L413 NwaCegarLoop]: 35 mSDtfsCounter, 107 mSDsluCounter, 99 mSDsCounter, 0 mSdLazyCounter, 19 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 107 SdHoareTripleChecker+Valid, 134 SdHoareTripleChecker+Invalid, 20 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 19 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:33:56,277 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [107 Valid, 134 Invalid, 20 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 19 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 03:33:56,294 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states. [2022-11-03 03:33:56,307 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 31. [2022-11-03 03:33:56,309 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 30 states have (on average 1.4) internal successors, (42), 30 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:56,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 42 transitions. [2022-11-03 03:33:56,311 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 42 transitions. Word has length 19 [2022-11-03 03:33:56,311 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:33:56,311 INFO L495 AbstractCegarLoop]: Abstraction has 31 states and 42 transitions. [2022-11-03 03:33:56,311 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 4.75) internal successors, (19), 4 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:56,312 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 42 transitions. [2022-11-03 03:33:56,312 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-11-03 03:33:56,312 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:33:56,312 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:33:56,331 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (2)] Forceful destruction successful, exit code 0 [2022-11-03 03:33:56,526 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:33:56,526 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:33:56,527 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:33:56,527 INFO L85 PathProgramCache]: Analyzing trace with hash 1474440195, now seen corresponding path program 1 times [2022-11-03 03:33:56,530 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:33:56,531 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [328855684] [2022-11-03 03:33:56,532 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:33:56,532 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:33:56,532 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:33:56,534 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:33:56,558 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (3)] Waiting until timeout for monitored process [2022-11-03 03:33:56,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:33:56,736 INFO L263 TraceCheckSpWp]: Trace formula consists of 255 conjuncts, 16 conjunts are in the unsatisfiable core [2022-11-03 03:33:56,740 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:33:56,796 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:33:56,796 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:33:56,797 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:33:56,797 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [328855684] [2022-11-03 03:33:56,797 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [328855684] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:33:56,797 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:33:56,798 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-03 03:33:56,798 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [465114230] [2022-11-03 03:33:56,798 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:33:56,800 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-03 03:33:56,801 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:33:56,803 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-03 03:33:56,805 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-03 03:33:56,806 INFO L87 Difference]: Start difference. First operand 31 states and 42 transitions. Second operand has 5 states, 5 states have (on average 3.8) internal successors, (19), 5 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:56,956 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:33:56,956 INFO L93 Difference]: Finished difference Result 110 states and 152 transitions. [2022-11-03 03:33:56,957 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-03 03:33:56,957 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.8) internal successors, (19), 5 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 19 [2022-11-03 03:33:56,957 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:33:56,958 INFO L225 Difference]: With dead ends: 110 [2022-11-03 03:33:56,958 INFO L226 Difference]: Without dead ends: 83 [2022-11-03 03:33:56,958 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2022-11-03 03:33:56,959 INFO L413 NwaCegarLoop]: 35 mSDtfsCounter, 138 mSDsluCounter, 162 mSDsCounter, 0 mSdLazyCounter, 27 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 138 SdHoareTripleChecker+Valid, 197 SdHoareTripleChecker+Invalid, 28 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 27 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:33:56,960 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [138 Valid, 197 Invalid, 28 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 27 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 03:33:56,961 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2022-11-03 03:33:56,966 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 33. [2022-11-03 03:33:56,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 32 states have (on average 1.375) internal successors, (44), 32 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:56,967 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 44 transitions. [2022-11-03 03:33:56,967 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 44 transitions. Word has length 19 [2022-11-03 03:33:56,969 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:33:56,969 INFO L495 AbstractCegarLoop]: Abstraction has 33 states and 44 transitions. [2022-11-03 03:33:56,970 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 3.8) internal successors, (19), 5 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:56,970 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 44 transitions. [2022-11-03 03:33:56,970 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-11-03 03:33:56,970 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:33:56,971 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:33:56,993 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (3)] Forceful destruction successful, exit code 0 [2022-11-03 03:33:57,173 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:33:57,173 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:33:57,174 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:33:57,174 INFO L85 PathProgramCache]: Analyzing trace with hash 463322945, now seen corresponding path program 1 times [2022-11-03 03:33:57,174 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:33:57,174 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1194488390] [2022-11-03 03:33:57,175 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:33:57,175 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:33:57,175 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:33:57,180 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:33:57,182 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (4)] Waiting until timeout for monitored process [2022-11-03 03:33:57,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:33:57,363 INFO L263 TraceCheckSpWp]: Trace formula consists of 255 conjuncts, 14 conjunts are in the unsatisfiable core [2022-11-03 03:33:57,366 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:33:57,430 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:33:57,430 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:33:57,431 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:33:57,431 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1194488390] [2022-11-03 03:33:57,432 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1194488390] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:33:57,435 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:33:57,435 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-03 03:33:57,436 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [647830373] [2022-11-03 03:33:57,436 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:33:57,436 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-03 03:33:57,436 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:33:57,437 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-03 03:33:57,438 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-03 03:33:57,439 INFO L87 Difference]: Start difference. First operand 33 states and 44 transitions. Second operand has 5 states, 5 states have (on average 3.8) internal successors, (19), 5 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:57,580 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:33:57,580 INFO L93 Difference]: Finished difference Result 110 states and 151 transitions. [2022-11-03 03:33:57,580 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-03 03:33:57,581 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.8) internal successors, (19), 5 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 19 [2022-11-03 03:33:57,581 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:33:57,581 INFO L225 Difference]: With dead ends: 110 [2022-11-03 03:33:57,582 INFO L226 Difference]: Without dead ends: 83 [2022-11-03 03:33:57,582 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2022-11-03 03:33:57,583 INFO L413 NwaCegarLoop]: 38 mSDtfsCounter, 131 mSDsluCounter, 158 mSDsCounter, 0 mSdLazyCounter, 24 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 131 SdHoareTripleChecker+Valid, 196 SdHoareTripleChecker+Invalid, 25 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 24 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:33:57,584 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [131 Valid, 196 Invalid, 25 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 24 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 03:33:57,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2022-11-03 03:33:57,589 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 35. [2022-11-03 03:33:57,589 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 34 states have (on average 1.3529411764705883) internal successors, (46), 34 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:57,590 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 46 transitions. [2022-11-03 03:33:57,590 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 46 transitions. Word has length 19 [2022-11-03 03:33:57,590 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:33:57,590 INFO L495 AbstractCegarLoop]: Abstraction has 35 states and 46 transitions. [2022-11-03 03:33:57,590 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 3.8) internal successors, (19), 5 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:57,590 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 46 transitions. [2022-11-03 03:33:57,591 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-11-03 03:33:57,591 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:33:57,591 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:33:57,604 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (4)] Ended with exit code 0 [2022-11-03 03:33:57,804 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:33:57,804 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:33:57,804 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:33:57,805 INFO L85 PathProgramCache]: Analyzing trace with hash 721488383, now seen corresponding path program 1 times [2022-11-03 03:33:57,805 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:33:57,805 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [774663873] [2022-11-03 03:33:57,805 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:33:57,809 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:33:57,809 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:33:57,811 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:33:57,822 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (5)] Waiting until timeout for monitored process [2022-11-03 03:33:57,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:33:57,995 INFO L263 TraceCheckSpWp]: Trace formula consists of 255 conjuncts, 16 conjunts are in the unsatisfiable core [2022-11-03 03:33:57,999 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:33:58,159 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:33:58,159 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:33:58,159 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:33:58,160 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [774663873] [2022-11-03 03:33:58,160 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [774663873] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:33:58,160 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:33:58,160 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2022-11-03 03:33:58,160 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [718882382] [2022-11-03 03:33:58,160 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:33:58,161 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-11-03 03:33:58,161 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:33:58,161 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-11-03 03:33:58,161 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2022-11-03 03:33:58,162 INFO L87 Difference]: Start difference. First operand 35 states and 46 transitions. Second operand has 11 states, 11 states have (on average 1.7272727272727273) internal successors, (19), 11 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:59,131 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:33:59,131 INFO L93 Difference]: Finished difference Result 248 states and 339 transitions. [2022-11-03 03:33:59,131 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2022-11-03 03:33:59,132 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 1.7272727272727273) internal successors, (19), 11 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 19 [2022-11-03 03:33:59,132 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:33:59,133 INFO L225 Difference]: With dead ends: 248 [2022-11-03 03:33:59,133 INFO L226 Difference]: Without dead ends: 221 [2022-11-03 03:33:59,135 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 300 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=374, Invalid=1108, Unknown=0, NotChecked=0, Total=1482 [2022-11-03 03:33:59,136 INFO L413 NwaCegarLoop]: 49 mSDtfsCounter, 388 mSDsluCounter, 571 mSDsCounter, 0 mSdLazyCounter, 208 mSolverCounterSat, 32 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 388 SdHoareTripleChecker+Valid, 620 SdHoareTripleChecker+Invalid, 240 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 32 IncrementalHoareTripleChecker+Valid, 208 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-11-03 03:33:59,136 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [388 Valid, 620 Invalid, 240 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [32 Valid, 208 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-11-03 03:33:59,137 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 221 states. [2022-11-03 03:33:59,148 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 221 to 43. [2022-11-03 03:33:59,152 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 42 states have (on average 1.3571428571428572) internal successors, (57), 42 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:59,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 57 transitions. [2022-11-03 03:33:59,154 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 57 transitions. Word has length 19 [2022-11-03 03:33:59,155 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:33:59,155 INFO L495 AbstractCegarLoop]: Abstraction has 43 states and 57 transitions. [2022-11-03 03:33:59,155 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 1.7272727272727273) internal successors, (19), 11 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:59,155 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 57 transitions. [2022-11-03 03:33:59,156 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-11-03 03:33:59,156 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:33:59,156 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:33:59,174 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (5)] Forceful destruction successful, exit code 0 [2022-11-03 03:33:59,374 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:33:59,374 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:33:59,374 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:33:59,374 INFO L85 PathProgramCache]: Analyzing trace with hash -87858243, now seen corresponding path program 1 times [2022-11-03 03:33:59,375 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:33:59,375 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1903346110] [2022-11-03 03:33:59,375 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:33:59,375 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:33:59,376 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:33:59,377 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:33:59,379 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (6)] Waiting until timeout for monitored process [2022-11-03 03:33:59,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:33:59,544 INFO L263 TraceCheckSpWp]: Trace formula consists of 255 conjuncts, 11 conjunts are in the unsatisfiable core [2022-11-03 03:33:59,547 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:33:59,602 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:33:59,603 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:33:59,603 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:33:59,603 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1903346110] [2022-11-03 03:33:59,603 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1903346110] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:33:59,604 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:33:59,604 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-03 03:33:59,604 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [869123104] [2022-11-03 03:33:59,604 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:33:59,605 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-03 03:33:59,605 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:33:59,605 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-03 03:33:59,605 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-03 03:33:59,606 INFO L87 Difference]: Start difference. First operand 43 states and 57 transitions. Second operand has 5 states, 5 states have (on average 3.8) internal successors, (19), 5 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:59,691 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:33:59,692 INFO L93 Difference]: Finished difference Result 134 states and 182 transitions. [2022-11-03 03:33:59,692 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-03 03:33:59,692 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.8) internal successors, (19), 5 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 19 [2022-11-03 03:33:59,693 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:33:59,693 INFO L225 Difference]: With dead ends: 134 [2022-11-03 03:33:59,693 INFO L226 Difference]: Without dead ends: 99 [2022-11-03 03:33:59,694 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2022-11-03 03:33:59,695 INFO L413 NwaCegarLoop]: 52 mSDtfsCounter, 107 mSDsluCounter, 142 mSDsCounter, 0 mSdLazyCounter, 12 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 107 SdHoareTripleChecker+Valid, 194 SdHoareTripleChecker+Invalid, 13 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 12 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:33:59,695 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [107 Valid, 194 Invalid, 13 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 12 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 03:33:59,696 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2022-11-03 03:33:59,700 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 51. [2022-11-03 03:33:59,701 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 51 states, 50 states have (on average 1.34) internal successors, (67), 50 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:59,701 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 67 transitions. [2022-11-03 03:33:59,701 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 67 transitions. Word has length 19 [2022-11-03 03:33:59,702 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:33:59,702 INFO L495 AbstractCegarLoop]: Abstraction has 51 states and 67 transitions. [2022-11-03 03:33:59,702 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 3.8) internal successors, (19), 5 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:33:59,702 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 67 transitions. [2022-11-03 03:33:59,703 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-11-03 03:33:59,703 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:33:59,703 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:33:59,721 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (6)] Forceful destruction successful, exit code 0 [2022-11-03 03:33:59,917 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:33:59,917 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:33:59,917 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:33:59,918 INFO L85 PathProgramCache]: Analyzing trace with hash -87798661, now seen corresponding path program 1 times [2022-11-03 03:33:59,918 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:33:59,918 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [120224003] [2022-11-03 03:33:59,918 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:33:59,918 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:33:59,919 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:33:59,920 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:33:59,921 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (7)] Waiting until timeout for monitored process [2022-11-03 03:34:00,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:34:00,089 INFO L263 TraceCheckSpWp]: Trace formula consists of 255 conjuncts, 22 conjunts are in the unsatisfiable core [2022-11-03 03:34:00,096 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:34:00,201 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:34:00,201 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:34:00,202 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:34:00,202 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [120224003] [2022-11-03 03:34:00,202 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [120224003] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:34:00,202 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:34:00,202 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-03 03:34:00,203 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1536453145] [2022-11-03 03:34:00,203 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:34:00,203 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-03 03:34:00,203 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:34:00,204 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-03 03:34:00,204 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-03 03:34:00,204 INFO L87 Difference]: Start difference. First operand 51 states and 67 transitions. Second operand has 5 states, 5 states have (on average 3.8) internal successors, (19), 5 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:34:00,333 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:34:00,333 INFO L93 Difference]: Finished difference Result 87 states and 117 transitions. [2022-11-03 03:34:00,335 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-03 03:34:00,335 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.8) internal successors, (19), 5 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 19 [2022-11-03 03:34:00,336 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:34:00,336 INFO L225 Difference]: With dead ends: 87 [2022-11-03 03:34:00,336 INFO L226 Difference]: Without dead ends: 85 [2022-11-03 03:34:00,337 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2022-11-03 03:34:00,337 INFO L413 NwaCegarLoop]: 50 mSDtfsCounter, 81 mSDsluCounter, 102 mSDsCounter, 0 mSdLazyCounter, 24 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 81 SdHoareTripleChecker+Valid, 152 SdHoareTripleChecker+Invalid, 25 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 24 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:34:00,338 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [81 Valid, 152 Invalid, 25 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 24 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 03:34:00,339 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2022-11-03 03:34:00,342 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 53. [2022-11-03 03:34:00,343 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 53 states, 52 states have (on average 1.3269230769230769) internal successors, (69), 52 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:34:00,344 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 69 transitions. [2022-11-03 03:34:00,344 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 69 transitions. Word has length 19 [2022-11-03 03:34:00,350 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:34:00,351 INFO L495 AbstractCegarLoop]: Abstraction has 53 states and 69 transitions. [2022-11-03 03:34:00,351 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 3.8) internal successors, (19), 5 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:34:00,352 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 69 transitions. [2022-11-03 03:34:00,352 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2022-11-03 03:34:00,354 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:34:00,354 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:34:00,367 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (7)] Forceful destruction successful, exit code 0 [2022-11-03 03:34:00,567 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:34:00,567 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:34:00,567 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:34:00,568 INFO L85 PathProgramCache]: Analyzing trace with hash -1892809185, now seen corresponding path program 1 times [2022-11-03 03:34:00,569 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:34:00,569 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [2108636084] [2022-11-03 03:34:00,569 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:34:00,569 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:34:00,569 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:34:00,570 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:34:00,583 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (8)] Waiting until timeout for monitored process [2022-11-03 03:34:00,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:34:00,825 INFO L263 TraceCheckSpWp]: Trace formula consists of 525 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-03 03:34:00,829 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:34:00,880 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 16 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:34:00,881 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:34:00,881 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:34:00,881 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [2108636084] [2022-11-03 03:34:00,881 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [2108636084] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:34:00,882 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:34:00,882 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-03 03:34:00,882 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1561053909] [2022-11-03 03:34:00,882 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:34:00,883 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 03:34:00,883 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:34:00,884 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 03:34:00,884 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 03:34:00,884 INFO L87 Difference]: Start difference. First operand 53 states and 69 transitions. Second operand has 4 states, 4 states have (on average 11.0) internal successors, (44), 4 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:34:00,924 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:34:00,925 INFO L93 Difference]: Finished difference Result 131 states and 178 transitions. [2022-11-03 03:34:00,925 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-03 03:34:00,926 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 11.0) internal successors, (44), 4 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2022-11-03 03:34:00,926 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:34:00,927 INFO L225 Difference]: With dead ends: 131 [2022-11-03 03:34:00,927 INFO L226 Difference]: Without dead ends: 96 [2022-11-03 03:34:00,928 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 41 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-03 03:34:00,929 INFO L413 NwaCegarLoop]: 55 mSDtfsCounter, 59 mSDsluCounter, 78 mSDsCounter, 0 mSdLazyCounter, 13 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 59 SdHoareTripleChecker+Valid, 133 SdHoareTripleChecker+Invalid, 14 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 13 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 03:34:00,929 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [59 Valid, 133 Invalid, 14 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 13 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-03 03:34:00,933 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states. [2022-11-03 03:34:00,941 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 55. [2022-11-03 03:34:00,941 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 55 states, 54 states have (on average 1.3148148148148149) internal successors, (71), 54 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:34:00,942 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 71 transitions. [2022-11-03 03:34:00,942 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 71 transitions. Word has length 44 [2022-11-03 03:34:00,942 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:34:00,943 INFO L495 AbstractCegarLoop]: Abstraction has 55 states and 71 transitions. [2022-11-03 03:34:00,943 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 11.0) internal successors, (44), 4 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:34:00,943 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 71 transitions. [2022-11-03 03:34:00,944 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2022-11-03 03:34:00,944 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:34:00,944 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:34:00,958 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (8)] Forceful destruction successful, exit code 0 [2022-11-03 03:34:01,158 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:34:01,158 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:34:01,158 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:34:01,159 INFO L85 PathProgramCache]: Analyzing trace with hash -1752260575, now seen corresponding path program 1 times [2022-11-03 03:34:01,159 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:34:01,159 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1471997507] [2022-11-03 03:34:01,159 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:34:01,160 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:34:01,160 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:34:01,160 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:34:01,161 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (9)] Waiting until timeout for monitored process [2022-11-03 03:34:01,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:34:01,408 INFO L263 TraceCheckSpWp]: Trace formula consists of 525 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-03 03:34:01,411 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:34:01,463 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 16 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:34:01,463 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:34:01,463 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:34:01,463 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1471997507] [2022-11-03 03:34:01,464 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1471997507] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:34:01,464 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:34:01,464 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-03 03:34:01,464 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [755829541] [2022-11-03 03:34:01,464 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:34:01,465 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 03:34:01,465 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:34:01,465 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 03:34:01,465 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 03:34:01,466 INFO L87 Difference]: Start difference. First operand 55 states and 71 transitions. Second operand has 4 states, 4 states have (on average 11.0) internal successors, (44), 4 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:34:01,492 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:34:01,492 INFO L93 Difference]: Finished difference Result 131 states and 177 transitions. [2022-11-03 03:34:01,493 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-03 03:34:01,493 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 11.0) internal successors, (44), 4 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2022-11-03 03:34:01,493 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:34:01,494 INFO L225 Difference]: With dead ends: 131 [2022-11-03 03:34:01,494 INFO L226 Difference]: Without dead ends: 96 [2022-11-03 03:34:01,494 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 41 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-03 03:34:01,495 INFO L413 NwaCegarLoop]: 62 mSDtfsCounter, 48 mSDsluCounter, 76 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 48 SdHoareTripleChecker+Valid, 138 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 03:34:01,496 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [48 Valid, 138 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-03 03:34:01,496 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states. [2022-11-03 03:34:01,500 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 59. [2022-11-03 03:34:01,501 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 59 states, 58 states have (on average 1.3103448275862069) internal successors, (76), 58 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:34:01,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 76 transitions. [2022-11-03 03:34:01,501 INFO L78 Accepts]: Start accepts. Automaton has 59 states and 76 transitions. Word has length 44 [2022-11-03 03:34:01,502 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:34:01,502 INFO L495 AbstractCegarLoop]: Abstraction has 59 states and 76 transitions. [2022-11-03 03:34:01,502 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 11.0) internal successors, (44), 4 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:34:01,502 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 76 transitions. [2022-11-03 03:34:01,503 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2022-11-03 03:34:01,503 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:34:01,503 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:34:01,518 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (9)] Ended with exit code 0 [2022-11-03 03:34:01,717 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:34:01,717 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:34:01,718 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:34:01,718 INFO L85 PathProgramCache]: Analyzing trace with hash -1329558749, now seen corresponding path program 1 times [2022-11-03 03:34:01,718 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:34:01,718 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [549437585] [2022-11-03 03:34:01,718 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:34:01,719 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:34:01,719 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:34:01,720 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:34:01,721 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (10)] Waiting until timeout for monitored process [2022-11-03 03:34:01,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:34:01,999 INFO L263 TraceCheckSpWp]: Trace formula consists of 525 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-03 03:34:02,003 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:34:02,077 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 16 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:34:02,078 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:34:02,078 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:34:02,078 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [549437585] [2022-11-03 03:34:02,078 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [549437585] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:34:02,078 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:34:02,078 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-03 03:34:02,079 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1382068067] [2022-11-03 03:34:02,079 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:34:02,079 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 03:34:02,079 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:34:02,080 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 03:34:02,080 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 03:34:02,080 INFO L87 Difference]: Start difference. First operand 59 states and 76 transitions. Second operand has 4 states, 4 states have (on average 11.0) internal successors, (44), 4 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:34:02,118 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:34:02,118 INFO L93 Difference]: Finished difference Result 131 states and 176 transitions. [2022-11-03 03:34:02,119 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-03 03:34:02,119 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 11.0) internal successors, (44), 4 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2022-11-03 03:34:02,119 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:34:02,120 INFO L225 Difference]: With dead ends: 131 [2022-11-03 03:34:02,120 INFO L226 Difference]: Without dead ends: 96 [2022-11-03 03:34:02,121 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 41 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-03 03:34:02,121 INFO L413 NwaCegarLoop]: 62 mSDtfsCounter, 42 mSDsluCounter, 69 mSDsCounter, 0 mSdLazyCounter, 13 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 42 SdHoareTripleChecker+Valid, 131 SdHoareTripleChecker+Invalid, 14 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 13 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 03:34:02,122 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [42 Valid, 131 Invalid, 14 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 13 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-03 03:34:02,122 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states. [2022-11-03 03:34:02,126 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 61. [2022-11-03 03:34:02,127 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 61 states, 60 states have (on average 1.3) internal successors, (78), 60 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:34:02,127 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 78 transitions. [2022-11-03 03:34:02,127 INFO L78 Accepts]: Start accepts. Automaton has 61 states and 78 transitions. Word has length 44 [2022-11-03 03:34:02,128 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:34:02,128 INFO L495 AbstractCegarLoop]: Abstraction has 61 states and 78 transitions. [2022-11-03 03:34:02,128 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 11.0) internal successors, (44), 4 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:34:02,128 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 78 transitions. [2022-11-03 03:34:02,129 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2022-11-03 03:34:02,129 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:34:02,129 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:34:02,143 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (10)] Forceful destruction successful, exit code 0 [2022-11-03 03:34:02,342 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:34:02,342 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:34:02,343 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:34:02,343 INFO L85 PathProgramCache]: Analyzing trace with hash 1276464805, now seen corresponding path program 1 times [2022-11-03 03:34:02,343 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:34:02,344 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [863980837] [2022-11-03 03:34:02,344 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:34:02,344 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:34:02,344 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:34:02,345 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:34:02,349 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (11)] Waiting until timeout for monitored process [2022-11-03 03:34:02,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:34:02,581 INFO L263 TraceCheckSpWp]: Trace formula consists of 525 conjuncts, 19 conjunts are in the unsatisfiable core [2022-11-03 03:34:02,584 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:34:02,857 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 14 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 03:34:02,858 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:34:03,340 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 14 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:34:03,341 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:34:03,341 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [863980837] [2022-11-03 03:34:03,341 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [863980837] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:34:03,341 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [940973555] [2022-11-03 03:34:03,342 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:34:03,342 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 03:34:03,342 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 03:34:03,350 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 03:34:03,370 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (12)] Waiting until timeout for monitored process [2022-11-03 03:34:03,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:34:03,777 INFO L263 TraceCheckSpWp]: Trace formula consists of 525 conjuncts, 19 conjunts are in the unsatisfiable core [2022-11-03 03:34:03,780 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:34:03,972 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 14 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 03:34:03,972 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:34:04,218 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 14 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 03:34:04,218 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [940973555] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:34:04,218 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1167072230] [2022-11-03 03:34:04,219 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:34:04,219 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:34:04,219 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:34:04,222 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:34:04,242 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-11-03 03:34:04,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:34:04,462 INFO L263 TraceCheckSpWp]: Trace formula consists of 525 conjuncts, 12 conjunts are in the unsatisfiable core [2022-11-03 03:34:04,465 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:34:04,700 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 6 proven. 3 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-11-03 03:34:04,700 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:34:05,040 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 6 proven. 3 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-11-03 03:34:05,040 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1167072230] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:34:05,041 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 03:34:05,041 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 8, 7, 8, 6, 6] total 19 [2022-11-03 03:34:05,041 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [961625520] [2022-11-03 03:34:05,041 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 03:34:05,043 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-11-03 03:34:05,044 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:34:05,044 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-11-03 03:34:05,044 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=297, Unknown=0, NotChecked=0, Total=342 [2022-11-03 03:34:05,045 INFO L87 Difference]: Start difference. First operand 61 states and 78 transitions. Second operand has 19 states, 19 states have (on average 7.157894736842105) internal successors, (136), 19 states have internal predecessors, (136), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:34:07,025 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:34:07,025 INFO L93 Difference]: Finished difference Result 506 states and 677 transitions. [2022-11-03 03:34:07,026 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2022-11-03 03:34:07,026 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 7.157894736842105) internal successors, (136), 19 states have internal predecessors, (136), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2022-11-03 03:34:07,027 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:34:07,028 INFO L225 Difference]: With dead ends: 506 [2022-11-03 03:34:07,028 INFO L226 Difference]: Without dead ends: 471 [2022-11-03 03:34:07,030 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 295 GetRequests, 243 SyntacticMatches, 1 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 605 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=742, Invalid=2014, Unknown=0, NotChecked=0, Total=2756 [2022-11-03 03:34:07,035 INFO L413 NwaCegarLoop]: 38 mSDtfsCounter, 1483 mSDsluCounter, 552 mSDsCounter, 0 mSdLazyCounter, 197 mSolverCounterSat, 128 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1483 SdHoareTripleChecker+Valid, 590 SdHoareTripleChecker+Invalid, 626 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 128 IncrementalHoareTripleChecker+Valid, 197 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 301 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-11-03 03:34:07,036 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1483 Valid, 590 Invalid, 626 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [128 Valid, 197 Invalid, 0 Unknown, 301 Unchecked, 0.4s Time] [2022-11-03 03:34:07,037 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 471 states. [2022-11-03 03:34:07,054 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 471 to 96. [2022-11-03 03:34:07,055 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 96 states, 95 states have (on average 1.3263157894736841) internal successors, (126), 95 states have internal predecessors, (126), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:34:07,061 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96 states to 96 states and 126 transitions. [2022-11-03 03:34:07,061 INFO L78 Accepts]: Start accepts. Automaton has 96 states and 126 transitions. Word has length 44 [2022-11-03 03:34:07,062 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:34:07,062 INFO L495 AbstractCegarLoop]: Abstraction has 96 states and 126 transitions. [2022-11-03 03:34:07,062 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 7.157894736842105) internal successors, (136), 19 states have internal predecessors, (136), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:34:07,062 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 126 transitions. [2022-11-03 03:34:07,063 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2022-11-03 03:34:07,063 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:34:07,063 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:34:07,078 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (11)] Forceful destruction successful, exit code 0 [2022-11-03 03:34:07,269 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (12)] Forceful destruction successful, exit code 0 [2022-11-03 03:34:07,488 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2022-11-03 03:34:07,666 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:34:07,667 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:34:07,667 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:34:07,667 INFO L85 PathProgramCache]: Analyzing trace with hash -553950175, now seen corresponding path program 1 times [2022-11-03 03:34:07,668 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:34:07,668 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1339679086] [2022-11-03 03:34:07,668 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:34:07,668 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:34:07,668 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:34:07,669 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:34:07,670 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (14)] Waiting until timeout for monitored process [2022-11-03 03:34:07,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:34:07,938 INFO L263 TraceCheckSpWp]: Trace formula consists of 525 conjuncts, 11 conjunts are in the unsatisfiable core [2022-11-03 03:34:07,941 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:34:08,166 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2022-11-03 03:34:08,166 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:34:08,301 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2022-11-03 03:34:08,302 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:34:08,302 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1339679086] [2022-11-03 03:34:08,302 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1339679086] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:34:08,302 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [152547080] [2022-11-03 03:34:08,302 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:34:08,303 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 03:34:08,303 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 03:34:08,304 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 03:34:08,314 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (15)] Waiting until timeout for monitored process [2022-11-03 03:34:08,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:34:08,709 INFO L263 TraceCheckSpWp]: Trace formula consists of 525 conjuncts, 18 conjunts are in the unsatisfiable core [2022-11-03 03:34:08,712 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:34:08,983 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 8 proven. 5 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 03:34:08,983 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:34:09,072 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2022-11-03 03:34:09,072 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [152547080] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:34:09,072 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [251110979] [2022-11-03 03:34:09,072 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:34:09,073 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:34:09,073 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:34:09,074 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:34:09,101 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-11-03 03:34:09,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:34:09,280 INFO L263 TraceCheckSpWp]: Trace formula consists of 525 conjuncts, 11 conjunts are in the unsatisfiable core [2022-11-03 03:34:09,282 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:34:09,484 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2022-11-03 03:34:09,485 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:34:09,563 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2022-11-03 03:34:09,563 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [251110979] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:34:09,563 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 03:34:09,563 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 8, 6, 6, 6] total 11 [2022-11-03 03:34:09,564 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [148024993] [2022-11-03 03:34:09,564 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 03:34:09,564 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-11-03 03:34:09,564 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:34:09,565 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-11-03 03:34:09,565 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=84, Unknown=0, NotChecked=0, Total=110 [2022-11-03 03:34:09,566 INFO L87 Difference]: Start difference. First operand 96 states and 126 transitions. Second operand has 11 states, 11 states have (on average 6.7272727272727275) internal successors, (74), 11 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:34:09,806 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:34:09,807 INFO L93 Difference]: Finished difference Result 250 states and 332 transitions. [2022-11-03 03:34:09,810 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-03 03:34:09,810 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 6.7272727272727275) internal successors, (74), 11 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2022-11-03 03:34:09,811 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:34:09,812 INFO L225 Difference]: With dead ends: 250 [2022-11-03 03:34:09,812 INFO L226 Difference]: Without dead ends: 184 [2022-11-03 03:34:09,813 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 265 GetRequests, 249 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=94, Invalid=212, Unknown=0, NotChecked=0, Total=306 [2022-11-03 03:34:09,814 INFO L413 NwaCegarLoop]: 61 mSDtfsCounter, 254 mSDsluCounter, 137 mSDsCounter, 0 mSdLazyCounter, 62 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 254 SdHoareTripleChecker+Valid, 198 SdHoareTripleChecker+Invalid, 71 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 62 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:34:09,815 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [254 Valid, 198 Invalid, 71 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 62 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 03:34:09,815 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states. [2022-11-03 03:34:09,831 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 100. [2022-11-03 03:34:09,831 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 100 states, 99 states have (on average 1.3131313131313131) internal successors, (130), 99 states have internal predecessors, (130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:34:09,833 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 130 transitions. [2022-11-03 03:34:09,833 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 130 transitions. Word has length 44 [2022-11-03 03:34:09,833 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:34:09,833 INFO L495 AbstractCegarLoop]: Abstraction has 100 states and 130 transitions. [2022-11-03 03:34:09,834 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 6.7272727272727275) internal successors, (74), 11 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:34:09,834 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 130 transitions. [2022-11-03 03:34:09,838 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2022-11-03 03:34:09,839 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:34:09,839 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:34:09,857 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (14)] Ended with exit code 0 [2022-11-03 03:34:10,055 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (15)] Ended with exit code 0 [2022-11-03 03:34:10,274 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2022-11-03 03:34:10,453 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,15 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,16 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:34:10,453 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:34:10,453 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:34:10,454 INFO L85 PathProgramCache]: Analyzing trace with hash -137630559, now seen corresponding path program 1 times [2022-11-03 03:34:10,454 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:34:10,454 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [2055358663] [2022-11-03 03:34:10,454 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:34:10,454 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:34:10,455 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:34:10,456 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:34:10,461 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (17)] Waiting until timeout for monitored process [2022-11-03 03:34:10,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:34:10,694 INFO L263 TraceCheckSpWp]: Trace formula consists of 525 conjuncts, 11 conjunts are in the unsatisfiable core [2022-11-03 03:34:10,697 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:34:10,965 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2022-11-03 03:34:10,965 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:34:11,096 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2022-11-03 03:34:11,096 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:34:11,096 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [2055358663] [2022-11-03 03:34:11,096 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [2055358663] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:34:11,096 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1404149520] [2022-11-03 03:34:11,096 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:34:11,096 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 03:34:11,096 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 03:34:11,097 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 03:34:11,099 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (18)] Waiting until timeout for monitored process [2022-11-03 03:34:11,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:34:11,487 INFO L263 TraceCheckSpWp]: Trace formula consists of 525 conjuncts, 17 conjunts are in the unsatisfiable core [2022-11-03 03:34:11,488 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:34:11,909 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2022-11-03 03:34:11,909 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:34:12,260 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2022-11-03 03:34:12,260 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1404149520] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:34:12,260 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [880605363] [2022-11-03 03:34:12,260 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:34:12,261 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:34:12,261 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:34:12,262 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:34:12,274 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-11-03 03:34:12,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:34:12,458 INFO L263 TraceCheckSpWp]: Trace formula consists of 525 conjuncts, 11 conjunts are in the unsatisfiable core [2022-11-03 03:34:12,461 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:34:12,639 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2022-11-03 03:34:12,639 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:34:12,727 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2022-11-03 03:34:12,728 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [880605363] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:34:12,728 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 03:34:12,728 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 8, 8, 7, 7] total 21 [2022-11-03 03:34:12,728 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [964217566] [2022-11-03 03:34:12,728 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 03:34:12,729 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2022-11-03 03:34:12,729 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:34:12,730 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2022-11-03 03:34:12,730 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=372, Unknown=0, NotChecked=0, Total=420 [2022-11-03 03:34:12,730 INFO L87 Difference]: Start difference. First operand 100 states and 130 transitions. Second operand has 21 states, 21 states have (on average 6.619047619047619) internal successors, (139), 21 states have internal predecessors, (139), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:34:13,964 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:34:13,964 INFO L93 Difference]: Finished difference Result 612 states and 811 transitions. [2022-11-03 03:34:13,964 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2022-11-03 03:34:13,965 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 6.619047619047619) internal successors, (139), 21 states have internal predecessors, (139), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2022-11-03 03:34:13,965 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:34:13,967 INFO L225 Difference]: With dead ends: 612 [2022-11-03 03:34:13,967 INFO L226 Difference]: Without dead ends: 542 [2022-11-03 03:34:13,969 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 282 GetRequests, 239 SyntacticMatches, 0 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 252 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=536, Invalid=1444, Unknown=0, NotChecked=0, Total=1980 [2022-11-03 03:34:13,969 INFO L413 NwaCegarLoop]: 68 mSDtfsCounter, 801 mSDsluCounter, 568 mSDsCounter, 0 mSdLazyCounter, 345 mSolverCounterSat, 27 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 801 SdHoareTripleChecker+Valid, 636 SdHoareTripleChecker+Invalid, 372 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 27 IncrementalHoareTripleChecker+Valid, 345 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-11-03 03:34:13,969 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [801 Valid, 636 Invalid, 372 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [27 Valid, 345 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-11-03 03:34:13,970 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 542 states. [2022-11-03 03:34:13,986 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 542 to 108. [2022-11-03 03:34:13,986 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 108 states, 107 states have (on average 1.2897196261682242) internal successors, (138), 107 states have internal predecessors, (138), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:34:13,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 138 transitions. [2022-11-03 03:34:13,987 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 138 transitions. Word has length 44 [2022-11-03 03:34:13,987 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:34:13,987 INFO L495 AbstractCegarLoop]: Abstraction has 108 states and 138 transitions. [2022-11-03 03:34:13,988 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 6.619047619047619) internal successors, (139), 21 states have internal predecessors, (139), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:34:13,988 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 138 transitions. [2022-11-03 03:34:13,989 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2022-11-03 03:34:13,989 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:34:13,989 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:34:14,015 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Forceful destruction successful, exit code 0 [2022-11-03 03:34:14,207 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (17)] Forceful destruction successful, exit code 0 [2022-11-03 03:34:14,401 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (18)] Forceful destruction successful, exit code 0 [2022-11-03 03:34:14,599 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 19 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,17 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,18 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt [2022-11-03 03:34:14,599 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:34:14,600 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:34:14,600 INFO L85 PathProgramCache]: Analyzing trace with hash -889718883, now seen corresponding path program 1 times [2022-11-03 03:34:14,600 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:34:14,600 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [600665218] [2022-11-03 03:34:14,600 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:34:14,601 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:34:14,601 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:34:14,601 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:34:14,603 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (20)] Waiting until timeout for monitored process [2022-11-03 03:34:14,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:34:14,809 INFO L263 TraceCheckSpWp]: Trace formula consists of 525 conjuncts, 14 conjunts are in the unsatisfiable core [2022-11-03 03:34:14,811 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:34:14,987 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 03:34:14,988 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:34:15,048 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 15 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 03:34:15,048 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 03:34:15,048 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [600665218] [2022-11-03 03:34:15,048 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [600665218] provided 1 perfect and 1 imperfect interpolant sequences [2022-11-03 03:34:15,048 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-03 03:34:15,048 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 9 [2022-11-03 03:34:15,048 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1332228486] [2022-11-03 03:34:15,049 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:34:15,049 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-03 03:34:15,049 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 03:34:15,049 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-03 03:34:15,050 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2022-11-03 03:34:15,050 INFO L87 Difference]: Start difference. First operand 108 states and 138 transitions. Second operand has 6 states, 6 states have (on average 7.333333333333333) internal successors, (44), 6 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:34:15,203 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:34:15,203 INFO L93 Difference]: Finished difference Result 346 states and 449 transitions. [2022-11-03 03:34:15,205 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-03 03:34:15,206 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 7.333333333333333) internal successors, (44), 6 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2022-11-03 03:34:15,206 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:34:15,207 INFO L225 Difference]: With dead ends: 346 [2022-11-03 03:34:15,207 INFO L226 Difference]: Without dead ends: 268 [2022-11-03 03:34:15,208 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 83 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=44, Invalid=112, Unknown=0, NotChecked=0, Total=156 [2022-11-03 03:34:15,208 INFO L413 NwaCegarLoop]: 61 mSDtfsCounter, 184 mSDsluCounter, 99 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 184 SdHoareTripleChecker+Valid, 160 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:34:15,209 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [184 Valid, 160 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 03:34:15,210 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 268 states. [2022-11-03 03:34:15,216 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 268 to 138. [2022-11-03 03:34:15,217 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 138 states, 137 states have (on average 1.2627737226277371) internal successors, (173), 137 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:34:15,217 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 173 transitions. [2022-11-03 03:34:15,218 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 173 transitions. Word has length 44 [2022-11-03 03:34:15,218 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:34:15,218 INFO L495 AbstractCegarLoop]: Abstraction has 138 states and 173 transitions. [2022-11-03 03:34:15,218 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 7.333333333333333) internal successors, (44), 6 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 03:34:15,218 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 173 transitions. [2022-11-03 03:34:15,219 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2022-11-03 03:34:15,219 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:34:15,219 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:34:15,234 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (20)] Ended with exit code 0 [2022-11-03 03:34:15,434 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 20 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:34:15,434 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:34:15,434 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:34:15,434 INFO L85 PathProgramCache]: Analyzing trace with hash -889659301, now seen corresponding path program 1 times [2022-11-03 03:34:15,435 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 03:34:15,435 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [853277740] [2022-11-03 03:34:15,435 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:34:15,435 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 03:34:15,435 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 03:34:15,436 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 03:34:15,439 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (21)] Waiting until timeout for monitored process [2022-11-03 03:34:15,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-03 03:34:15,670 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-03 03:34:15,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-03 03:34:16,093 INFO L130 FreeRefinementEngine]: Strategy WALRUS found a feasible trace [2022-11-03 03:34:16,093 INFO L359 BasicCegarLoop]: Counterexample is feasible [2022-11-03 03:34:16,094 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-11-03 03:34:16,116 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (21)] Forceful destruction successful, exit code 0 [2022-11-03 03:34:16,311 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 21 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 03:34:16,314 INFO L444 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:34:16,318 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-03 03:34:16,451 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:34:16,451 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:34:16,489 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 03.11 03:34:16 BoogieIcfgContainer [2022-11-03 03:34:16,489 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-03 03:34:16,490 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-03 03:34:16,490 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-03 03:34:16,490 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-03 03:34:16,491 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 03:33:55" (3/4) ... [2022-11-03 03:34:16,492 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2022-11-03 03:34:16,564 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:34:16,565 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 03:34:16,721 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/witness.graphml [2022-11-03 03:34:16,721 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-03 03:34:16,721 INFO L158 Benchmark]: Toolchain (without parser) took 22789.61ms. Allocated memory was 73.4MB in the beginning and 172.0MB in the end (delta: 98.6MB). Free memory was 54.0MB in the beginning and 56.0MB in the end (delta: -1.9MB). Peak memory consumption was 95.9MB. Max. memory is 16.1GB. [2022-11-03 03:34:16,722 INFO L158 Benchmark]: CDTParser took 0.35ms. Allocated memory is still 73.4MB. Free memory was 54.4MB in the beginning and 54.4MB in the end (delta: 54.9kB). There was no memory consumed. Max. memory is 16.1GB. [2022-11-03 03:34:16,723 INFO L158 Benchmark]: CACSL2BoogieTranslator took 542.72ms. Allocated memory is still 73.4MB. Free memory was 53.9MB in the beginning and 49.0MB in the end (delta: 4.9MB). Peak memory consumption was 12.6MB. Max. memory is 16.1GB. [2022-11-03 03:34:16,724 INFO L158 Benchmark]: Boogie Procedure Inliner took 66.83ms. Allocated memory is still 73.4MB. Free memory was 49.0MB in the beginning and 45.2MB in the end (delta: 3.8MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. [2022-11-03 03:34:16,724 INFO L158 Benchmark]: Boogie Preprocessor took 51.16ms. Allocated memory is still 73.4MB. Free memory was 45.2MB in the beginning and 42.6MB in the end (delta: 2.6MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-11-03 03:34:16,724 INFO L158 Benchmark]: RCFGBuilder took 843.42ms. Allocated memory is still 73.4MB. Free memory was 42.6MB in the beginning and 30.6MB in the end (delta: 12.0MB). Peak memory consumption was 20.1MB. Max. memory is 16.1GB. [2022-11-03 03:34:16,725 INFO L158 Benchmark]: TraceAbstraction took 21047.84ms. Allocated memory was 73.4MB in the beginning and 172.0MB in the end (delta: 98.6MB). Free memory was 29.9MB in the beginning and 89.5MB in the end (delta: -59.6MB). Peak memory consumption was 38.9MB. Max. memory is 16.1GB. [2022-11-03 03:34:16,725 INFO L158 Benchmark]: Witness Printer took 231.26ms. Allocated memory is still 172.0MB. Free memory was 89.5MB in the beginning and 56.0MB in the end (delta: 33.6MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. [2022-11-03 03:34:16,733 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.35ms. Allocated memory is still 73.4MB. Free memory was 54.4MB in the beginning and 54.4MB in the end (delta: 54.9kB). There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 542.72ms. Allocated memory is still 73.4MB. Free memory was 53.9MB in the beginning and 49.0MB in the end (delta: 4.9MB). Peak memory consumption was 12.6MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 66.83ms. Allocated memory is still 73.4MB. Free memory was 49.0MB in the beginning and 45.2MB in the end (delta: 3.8MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. * Boogie Preprocessor took 51.16ms. Allocated memory is still 73.4MB. Free memory was 45.2MB in the beginning and 42.6MB in the end (delta: 2.6MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * RCFGBuilder took 843.42ms. Allocated memory is still 73.4MB. Free memory was 42.6MB in the beginning and 30.6MB in the end (delta: 12.0MB). Peak memory consumption was 20.1MB. Max. memory is 16.1GB. * TraceAbstraction took 21047.84ms. Allocated memory was 73.4MB in the beginning and 172.0MB in the end (delta: 98.6MB). Free memory was 29.9MB in the beginning and 89.5MB in the end (delta: -59.6MB). Peak memory consumption was 38.9MB. Max. memory is 16.1GB. * Witness Printer took 231.26ms. Allocated memory is still 172.0MB. Free memory was 89.5MB in the beginning and 56.0MB in the end (delta: 33.6MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 20]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L25] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 6); [L26] const SORT_1 msb_SORT_1 = (SORT_1)1 << (6 - 1); [L28] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 1); [L29] const SORT_3 msb_SORT_3 = (SORT_3)1 << (1 - 1); [L31] const SORT_6 mask_SORT_6 = (SORT_6)-1 >> (sizeof(SORT_6) * 8 - 32); [L32] const SORT_6 msb_SORT_6 = (SORT_6)1 << (32 - 1); [L34] const SORT_24 mask_SORT_24 = (SORT_24)-1 >> (sizeof(SORT_24) * 8 - 5); [L35] const SORT_24 msb_SORT_24 = (SORT_24)1 << (5 - 1); [L37] const SORT_33 mask_SORT_33 = (SORT_33)-1 >> (sizeof(SORT_33) * 8 - 2); [L38] const SORT_33 msb_SORT_33 = (SORT_33)1 << (2 - 1); [L40] const SORT_1 var_21 = 0; [L41] const SORT_24 var_26 = 31; [L42] const SORT_6 var_28 = 0; [L43] const SORT_33 var_34 = 0; [L44] const SORT_33 var_35 = 1; [L45] const SORT_3 var_39 = 1; [L46] const SORT_3 var_45 = 0; [L47] const SORT_33 var_58 = 2; [L48] const SORT_33 var_75 = 3; [L50] SORT_1 input_2; [L51] SORT_3 input_4; [L52] SORT_1 input_5; [L53] SORT_6 input_7; [L54] SORT_3 input_8; [L55] SORT_6 input_9; [L56] SORT_1 input_10; [L57] SORT_1 input_11; [L58] SORT_1 input_12; [L59] SORT_3 input_13; [L60] SORT_3 input_14; [L61] SORT_3 input_15; [L62] SORT_3 input_16; [L63] SORT_3 input_17; [L64] SORT_3 input_18; [L65] SORT_3 input_19; [L66] SORT_3 input_20; [L67] SORT_3 input_120; [L68] SORT_3 input_124; [L69] SORT_3 input_126; [L70] SORT_33 input_129; [L71] SORT_3 input_131; [L72] SORT_6 input_134; [L73] SORT_3 input_136; [L75] SORT_1 state_22 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L76] SORT_6 state_29 = __VERIFIER_nondet_uint() & mask_SORT_6; [L77] SORT_6 state_31 = __VERIFIER_nondet_uint() & mask_SORT_6; [L78] SORT_1 state_36 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L79] SORT_1 state_41 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L80] SORT_3 state_46 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L81] SORT_3 state_50 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L82] SORT_1 state_60 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L83] SORT_3 state_64 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L84] SORT_3 state_68 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L85] SORT_1 state_77 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L86] SORT_3 state_81 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L87] SORT_3 state_85 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L88] SORT_3 state_89 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L89] SORT_6 state_98 = __VERIFIER_nondet_uint() & mask_SORT_6; [L90] SORT_1 state_116 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L91] SORT_3 state_118 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L92] SORT_3 state_122 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L94] SORT_1 init_23_arg_1 = var_21; [L95] state_22 = init_23_arg_1 [L96] SORT_6 init_30_arg_1 = var_28; [L97] state_29 = init_30_arg_1 [L98] SORT_6 init_32_arg_1 = var_28; [L99] state_31 = init_32_arg_1 [L100] SORT_1 init_37_arg_1 = var_21; [L101] state_36 = init_37_arg_1 [L102] SORT_1 init_42_arg_1 = var_21; [L103] state_41 = init_42_arg_1 [L104] SORT_3 init_47_arg_1 = var_45; [L105] state_46 = init_47_arg_1 [L106] SORT_3 init_51_arg_1 = var_45; [L107] state_50 = init_51_arg_1 [L108] SORT_1 init_61_arg_1 = var_21; [L109] state_60 = init_61_arg_1 [L110] SORT_3 init_65_arg_1 = var_45; [L111] state_64 = init_65_arg_1 [L112] SORT_3 init_69_arg_1 = var_45; [L113] state_68 = init_69_arg_1 [L114] SORT_1 init_78_arg_1 = var_21; [L115] state_77 = init_78_arg_1 [L116] SORT_3 init_82_arg_1 = var_45; [L117] state_81 = init_82_arg_1 [L118] SORT_3 init_86_arg_1 = var_45; [L119] state_85 = init_86_arg_1 [L120] SORT_3 init_90_arg_1 = var_45; [L121] state_89 = init_90_arg_1 [L122] SORT_6 init_99_arg_1 = var_28; [L123] state_98 = init_99_arg_1 [L124] SORT_1 init_117_arg_1 = var_21; [L125] state_116 = init_117_arg_1 [L126] SORT_3 init_119_arg_1 = var_45; [L127] state_118 = init_119_arg_1 [L128] SORT_3 init_123_arg_1 = var_45; [L129] state_122 = init_123_arg_1 VAL [init_117_arg_1=0, init_119_arg_1=0, init_123_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_37_arg_1=0, init_42_arg_1=0, init_47_arg_1=0, init_51_arg_1=0, init_61_arg_1=0, init_65_arg_1=0, init_69_arg_1=0, init_78_arg_1=0, init_82_arg_1=0, init_86_arg_1=0, init_90_arg_1=0, init_99_arg_1=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_45=0, var_58=2, var_75=3] [L132] input_2 = __VERIFIER_nondet_uchar() [L133] input_4 = __VERIFIER_nondet_uchar() [L134] input_4 = input_4 & mask_SORT_3 [L135] input_5 = __VERIFIER_nondet_uchar() [L136] input_5 = input_5 & mask_SORT_1 [L137] input_7 = __VERIFIER_nondet_uint() [L138] input_8 = __VERIFIER_nondet_uchar() [L139] input_8 = input_8 & mask_SORT_3 [L140] input_9 = __VERIFIER_nondet_uint() [L141] input_10 = __VERIFIER_nondet_uchar() [L142] input_10 = input_10 & mask_SORT_1 [L143] input_11 = __VERIFIER_nondet_uchar() [L144] input_11 = input_11 & mask_SORT_1 [L145] input_12 = __VERIFIER_nondet_uchar() [L146] input_13 = __VERIFIER_nondet_uchar() [L147] input_14 = __VERIFIER_nondet_uchar() [L148] input_14 = input_14 & mask_SORT_3 [L149] input_15 = __VERIFIER_nondet_uchar() [L150] input_16 = __VERIFIER_nondet_uchar() [L151] input_16 = input_16 & mask_SORT_3 [L152] input_17 = __VERIFIER_nondet_uchar() [L153] input_17 = input_17 & mask_SORT_3 [L154] input_18 = __VERIFIER_nondet_uchar() [L155] input_18 = input_18 & mask_SORT_3 [L156] input_19 = __VERIFIER_nondet_uchar() [L157] input_19 = input_19 & mask_SORT_3 [L158] input_20 = __VERIFIER_nondet_uchar() [L159] input_120 = __VERIFIER_nondet_uchar() [L160] input_124 = __VERIFIER_nondet_uchar() [L161] input_126 = __VERIFIER_nondet_uchar() [L162] input_129 = __VERIFIER_nondet_uchar() [L163] input_131 = __VERIFIER_nondet_uchar() [L164] input_134 = __VERIFIER_nondet_uint() [L165] input_136 = __VERIFIER_nondet_uchar() [L168] SORT_1 var_25_arg_0 = state_22; [L169] SORT_24 var_25 = var_25_arg_0 >> 0; [L170] var_25 = var_25 & mask_SORT_24 [L171] SORT_24 var_27_arg_0 = var_25; [L172] SORT_24 var_27_arg_1 = var_26; [L173] SORT_3 var_27 = var_27_arg_0 == var_27_arg_1; [L174] SORT_1 var_54_arg_0 = state_36; [L175] SORT_24 var_54 = var_54_arg_0 >> 0; [L176] var_54 = var_54 & mask_SORT_24 [L177] SORT_24 var_105_arg_0 = var_54; [L178] SORT_24 var_105_arg_1 = var_26; [L179] SORT_3 var_105 = var_105_arg_0 == var_105_arg_1; [L180] SORT_1 var_38_arg_0 = state_36; [L181] SORT_3 var_38 = var_38_arg_0 >> 5; [L182] var_38 = var_38 & mask_SORT_3 [L183] SORT_3 var_76_arg_0 = var_38; [L184] SORT_3 var_76_arg_1 = var_39; [L185] SORT_3 var_76 = var_76_arg_0 == var_76_arg_1; [L186] SORT_1 var_79_arg_0 = state_36; [L187] SORT_1 var_79_arg_1 = state_77; [L188] SORT_3 var_79 = var_79_arg_0 == var_79_arg_1; [L189] SORT_3 var_80_arg_0 = var_76; [L190] SORT_3 var_80_arg_1 = var_79; [L191] SORT_3 var_80 = var_80_arg_0 & var_80_arg_1; [L192] SORT_3 var_83_arg_0 = state_81; [L193] SORT_3 var_83_arg_1 = var_39; [L194] SORT_3 var_83 = var_83_arg_0 != var_83_arg_1; [L195] SORT_3 var_84_arg_0 = var_80; [L196] SORT_3 var_84_arg_1 = var_83; [L197] SORT_3 var_84 = var_84_arg_0 & var_84_arg_1; [L198] SORT_3 var_87_arg_0 = state_85; [L199] SORT_3 var_87_arg_1 = var_39; [L200] SORT_3 var_87 = var_87_arg_0 == var_87_arg_1; [L201] SORT_3 var_88_arg_0 = var_84; [L202] SORT_3 var_88_arg_1 = var_87; [L203] SORT_3 var_88 = var_88_arg_0 & var_88_arg_1; [L204] SORT_3 var_91_arg_0 = state_89; [L205] SORT_3 var_91_arg_1 = var_39; [L206] SORT_3 var_91 = var_91_arg_0 == var_91_arg_1; [L207] SORT_3 var_92_arg_0 = var_88; [L208] SORT_3 var_92_arg_1 = var_91; [L209] SORT_3 var_92 = var_92_arg_0 & var_92_arg_1; [L210] SORT_24 var_93_arg_0 = var_54; [L211] SORT_24 var_93_arg_1 = var_26; [L212] SORT_3 var_93 = var_93_arg_0 != var_93_arg_1; [L213] SORT_3 var_94_arg_0 = var_92; [L214] SORT_3 var_94_arg_1 = var_93; [L215] SORT_3 var_94 = var_94_arg_0 & var_94_arg_1; [L216] var_94 = var_94 & mask_SORT_3 [L217] SORT_3 var_59_arg_0 = var_38; [L218] SORT_3 var_59_arg_1 = var_39; [L219] SORT_3 var_59 = var_59_arg_0 == var_59_arg_1; [L220] SORT_1 var_62_arg_0 = state_36; [L221] SORT_1 var_62_arg_1 = state_60; [L222] SORT_3 var_62 = var_62_arg_0 == var_62_arg_1; [L223] SORT_3 var_63_arg_0 = var_59; [L224] SORT_3 var_63_arg_1 = var_62; [L225] SORT_3 var_63 = var_63_arg_0 & var_63_arg_1; [L226] SORT_3 var_66_arg_0 = state_64; [L227] SORT_3 var_66_arg_1 = var_39; [L228] SORT_3 var_66 = var_66_arg_0 == var_66_arg_1; [L229] SORT_3 var_67_arg_0 = var_63; [L230] SORT_3 var_67_arg_1 = var_66; [L231] SORT_3 var_67 = var_67_arg_0 & var_67_arg_1; [L232] SORT_3 var_70_arg_0 = state_68; [L233] SORT_3 var_70_arg_1 = var_39; [L234] SORT_3 var_70 = var_70_arg_0 == var_70_arg_1; [L235] SORT_3 var_71_arg_0 = var_67; [L236] SORT_3 var_71_arg_1 = var_70; [L237] SORT_3 var_71 = var_71_arg_0 & var_71_arg_1; [L238] SORT_24 var_72_arg_0 = var_54; [L239] SORT_24 var_72_arg_1 = var_26; [L240] SORT_3 var_72 = var_72_arg_0 != var_72_arg_1; [L241] SORT_3 var_73_arg_0 = var_71; [L242] SORT_3 var_73_arg_1 = var_72; [L243] SORT_3 var_73 = var_73_arg_0 & var_73_arg_1; [L244] var_73 = var_73 & mask_SORT_3 [L245] SORT_3 var_40_arg_0 = var_38; [L246] SORT_3 var_40_arg_1 = var_39; [L247] SORT_3 var_40 = var_40_arg_0 == var_40_arg_1; [L248] SORT_1 var_43_arg_0 = state_36; [L249] SORT_1 var_43_arg_1 = state_41; [L250] SORT_3 var_43 = var_43_arg_0 == var_43_arg_1; [L251] SORT_3 var_44_arg_0 = var_40; [L252] SORT_3 var_44_arg_1 = var_43; [L253] SORT_3 var_44 = var_44_arg_0 & var_44_arg_1; [L254] SORT_3 var_48_arg_0 = state_46; [L255] SORT_3 var_48_arg_1 = var_39; [L256] SORT_3 var_48 = var_48_arg_0 == var_48_arg_1; [L257] SORT_3 var_49_arg_0 = var_44; [L258] SORT_3 var_49_arg_1 = var_48; [L259] SORT_3 var_49 = var_49_arg_0 & var_49_arg_1; [L260] SORT_3 var_52_arg_0 = state_50; [L261] SORT_3 var_52_arg_1 = var_39; [L262] SORT_3 var_52 = var_52_arg_0 == var_52_arg_1; [L263] SORT_3 var_53_arg_0 = var_49; [L264] SORT_3 var_53_arg_1 = var_52; [L265] SORT_3 var_53 = var_53_arg_0 & var_53_arg_1; [L266] SORT_24 var_55_arg_0 = var_54; [L267] SORT_24 var_55_arg_1 = var_26; [L268] SORT_3 var_55 = var_55_arg_0 != var_55_arg_1; [L269] SORT_3 var_56_arg_0 = var_53; [L270] SORT_3 var_56_arg_1 = var_55; [L271] SORT_3 var_56 = var_56_arg_0 & var_56_arg_1; [L272] var_56 = var_56 & mask_SORT_3 [L273] SORT_3 var_57_arg_0 = var_56; [L274] SORT_33 var_57_arg_1 = var_35; [L275] SORT_33 var_57_arg_2 = var_34; VAL [init_117_arg_1=0, init_119_arg_1=0, init_123_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_37_arg_1=0, init_42_arg_1=0, init_47_arg_1=0, init_51_arg_1=0, init_61_arg_1=0, init_65_arg_1=0, init_69_arg_1=0, init_78_arg_1=0, init_82_arg_1=0, init_86_arg_1=0, init_90_arg_1=0, init_99_arg_1=0, input_10=32, input_11=32, input_12=31, input_120=6, input_124=8, input_126=10, input_129=4, input_13=12, input_131=11, input_134=14, input_136=9, input_14=0, input_15=7, input_16=0, input_17=1, input_18=1, input_19=0, input_2=5, input_20=13, input_4=1, input_5=32, input_7=0, input_8=1, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_105=0, var_105_arg_0=0, var_105_arg_1=31, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_38=0, var_38_arg_0=0, var_39=1, var_40=0, var_40_arg_0=0, var_40_arg_1=1, var_43=1, var_43_arg_0=0, var_43_arg_1=0, var_44=0, var_44_arg_0=0, var_44_arg_1=1, var_45=0, var_48=0, var_48_arg_0=0, var_48_arg_1=1, var_49=0, var_49_arg_0=0, var_49_arg_1=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=0, var_55=1, var_55_arg_0=0, var_55_arg_1=31, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57_arg_0=0, var_57_arg_1=1, var_57_arg_2=0, var_58=2, var_59=0, var_59_arg_0=0, var_59_arg_1=1, var_62=1, var_62_arg_0=0, var_62_arg_1=0, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_66=0, var_66_arg_0=0, var_66_arg_1=1, var_67=0, var_67_arg_0=0, var_67_arg_1=0, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_72=1, var_72_arg_0=0, var_72_arg_1=31, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_75=3, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_79=1, var_79_arg_0=0, var_79_arg_1=0, var_80=0, var_80_arg_0=0, var_80_arg_1=1, var_83=1, var_83_arg_0=0, var_83_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_87=0, var_87_arg_0=0, var_87_arg_1=1, var_88=0, var_88_arg_0=0, var_88_arg_1=0, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=0, var_93=1, var_93_arg_0=0, var_93_arg_1=31, var_94=0, var_94_arg_0=0, var_94_arg_1=1] [L276] EXPR var_57_arg_0 ? var_57_arg_1 : var_57_arg_2 VAL [init_117_arg_1=0, init_119_arg_1=0, init_123_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_37_arg_1=0, init_42_arg_1=0, init_47_arg_1=0, init_51_arg_1=0, init_61_arg_1=0, init_65_arg_1=0, init_69_arg_1=0, init_78_arg_1=0, init_82_arg_1=0, init_86_arg_1=0, init_90_arg_1=0, init_99_arg_1=0, input_10=32, input_11=32, input_12=31, input_120=6, input_124=8, input_126=10, input_129=4, input_13=12, input_131=11, input_134=14, input_136=9, input_14=0, input_15=7, input_16=0, input_17=1, input_18=1, input_19=0, input_2=5, input_20=13, input_4=1, input_5=32, input_7=0, input_8=1, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_105=0, var_105_arg_0=0, var_105_arg_1=31, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_38=0, var_38_arg_0=0, var_39=1, var_40=0, var_40_arg_0=0, var_40_arg_1=1, var_43=1, var_43_arg_0=0, var_43_arg_1=0, var_44=0, var_44_arg_0=0, var_44_arg_1=1, var_45=0, var_48=0, var_48_arg_0=0, var_48_arg_1=1, var_49=0, var_49_arg_0=0, var_49_arg_1=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=0, var_55=1, var_55_arg_0=0, var_55_arg_1=31, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57_arg_0=0, var_57_arg_0 ? var_57_arg_1 : var_57_arg_2=0, var_57_arg_1=1, var_57_arg_2=0, var_58=2, var_59=0, var_59_arg_0=0, var_59_arg_1=1, var_62=1, var_62_arg_0=0, var_62_arg_1=0, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_66=0, var_66_arg_0=0, var_66_arg_1=1, var_67=0, var_67_arg_0=0, var_67_arg_1=0, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_72=1, var_72_arg_0=0, var_72_arg_1=31, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_75=3, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_79=1, var_79_arg_0=0, var_79_arg_1=0, var_80=0, var_80_arg_0=0, var_80_arg_1=1, var_83=1, var_83_arg_0=0, var_83_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_87=0, var_87_arg_0=0, var_87_arg_1=1, var_88=0, var_88_arg_0=0, var_88_arg_1=0, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=0, var_93=1, var_93_arg_0=0, var_93_arg_1=31, var_94=0, var_94_arg_0=0, var_94_arg_1=1] [L276] SORT_33 var_57 = var_57_arg_0 ? var_57_arg_1 : var_57_arg_2; [L277] SORT_3 var_74_arg_0 = var_73; [L278] SORT_33 var_74_arg_1 = var_58; [L279] SORT_33 var_74_arg_2 = var_57; VAL [init_117_arg_1=0, init_119_arg_1=0, init_123_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_37_arg_1=0, init_42_arg_1=0, init_47_arg_1=0, init_51_arg_1=0, init_61_arg_1=0, init_65_arg_1=0, init_69_arg_1=0, init_78_arg_1=0, init_82_arg_1=0, init_86_arg_1=0, init_90_arg_1=0, init_99_arg_1=0, input_10=32, input_11=32, input_12=31, input_120=6, input_124=8, input_126=10, input_129=4, input_13=12, input_131=11, input_134=14, input_136=9, input_14=0, input_15=7, input_16=0, input_17=1, input_18=1, input_19=0, input_2=5, input_20=13, input_4=1, input_5=32, input_7=0, input_8=1, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_105=0, var_105_arg_0=0, var_105_arg_1=31, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_38=0, var_38_arg_0=0, var_39=1, var_40=0, var_40_arg_0=0, var_40_arg_1=1, var_43=1, var_43_arg_0=0, var_43_arg_1=0, var_44=0, var_44_arg_0=0, var_44_arg_1=1, var_45=0, var_48=0, var_48_arg_0=0, var_48_arg_1=1, var_49=0, var_49_arg_0=0, var_49_arg_1=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=0, var_55=1, var_55_arg_0=0, var_55_arg_1=31, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57=0, var_57_arg_0=0, var_57_arg_1=1, var_57_arg_2=0, var_58=2, var_59=0, var_59_arg_0=0, var_59_arg_1=1, var_62=1, var_62_arg_0=0, var_62_arg_1=0, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_66=0, var_66_arg_0=0, var_66_arg_1=1, var_67=0, var_67_arg_0=0, var_67_arg_1=0, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_72=1, var_72_arg_0=0, var_72_arg_1=31, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_74_arg_0=0, var_74_arg_1=2, var_74_arg_2=0, var_75=3, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_79=1, var_79_arg_0=0, var_79_arg_1=0, var_80=0, var_80_arg_0=0, var_80_arg_1=1, var_83=1, var_83_arg_0=0, var_83_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_87=0, var_87_arg_0=0, var_87_arg_1=1, var_88=0, var_88_arg_0=0, var_88_arg_1=0, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=0, var_93=1, var_93_arg_0=0, var_93_arg_1=31, var_94=0, var_94_arg_0=0, var_94_arg_1=1] [L280] EXPR var_74_arg_0 ? var_74_arg_1 : var_74_arg_2 VAL [init_117_arg_1=0, init_119_arg_1=0, init_123_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_37_arg_1=0, init_42_arg_1=0, init_47_arg_1=0, init_51_arg_1=0, init_61_arg_1=0, init_65_arg_1=0, init_69_arg_1=0, init_78_arg_1=0, init_82_arg_1=0, init_86_arg_1=0, init_90_arg_1=0, init_99_arg_1=0, input_10=32, input_11=32, input_12=31, input_120=6, input_124=8, input_126=10, input_129=4, input_13=12, input_131=11, input_134=14, input_136=9, input_14=0, input_15=7, input_16=0, input_17=1, input_18=1, input_19=0, input_2=5, input_20=13, input_4=1, input_5=32, input_7=0, input_8=1, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_105=0, var_105_arg_0=0, var_105_arg_1=31, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_38=0, var_38_arg_0=0, var_39=1, var_40=0, var_40_arg_0=0, var_40_arg_1=1, var_43=1, var_43_arg_0=0, var_43_arg_1=0, var_44=0, var_44_arg_0=0, var_44_arg_1=1, var_45=0, var_48=0, var_48_arg_0=0, var_48_arg_1=1, var_49=0, var_49_arg_0=0, var_49_arg_1=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=0, var_55=1, var_55_arg_0=0, var_55_arg_1=31, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57=0, var_57_arg_0=0, var_57_arg_1=1, var_57_arg_2=0, var_58=2, var_59=0, var_59_arg_0=0, var_59_arg_1=1, var_62=1, var_62_arg_0=0, var_62_arg_1=0, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_66=0, var_66_arg_0=0, var_66_arg_1=1, var_67=0, var_67_arg_0=0, var_67_arg_1=0, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_72=1, var_72_arg_0=0, var_72_arg_1=31, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_74_arg_0=0, var_74_arg_0 ? var_74_arg_1 : var_74_arg_2=0, var_74_arg_1=2, var_74_arg_2=0, var_75=3, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_79=1, var_79_arg_0=0, var_79_arg_1=0, var_80=0, var_80_arg_0=0, var_80_arg_1=1, var_83=1, var_83_arg_0=0, var_83_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_87=0, var_87_arg_0=0, var_87_arg_1=1, var_88=0, var_88_arg_0=0, var_88_arg_1=0, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=0, var_93=1, var_93_arg_0=0, var_93_arg_1=31, var_94=0, var_94_arg_0=0, var_94_arg_1=1] [L280] SORT_33 var_74 = var_74_arg_0 ? var_74_arg_1 : var_74_arg_2; [L281] SORT_3 var_95_arg_0 = var_94; [L282] SORT_33 var_95_arg_1 = var_75; [L283] SORT_33 var_95_arg_2 = var_74; VAL [init_117_arg_1=0, init_119_arg_1=0, init_123_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_37_arg_1=0, init_42_arg_1=0, init_47_arg_1=0, init_51_arg_1=0, init_61_arg_1=0, init_65_arg_1=0, init_69_arg_1=0, init_78_arg_1=0, init_82_arg_1=0, init_86_arg_1=0, init_90_arg_1=0, init_99_arg_1=0, input_10=32, input_11=32, input_12=31, input_120=6, input_124=8, input_126=10, input_129=4, input_13=12, input_131=11, input_134=14, input_136=9, input_14=0, input_15=7, input_16=0, input_17=1, input_18=1, input_19=0, input_2=5, input_20=13, input_4=1, input_5=32, input_7=0, input_8=1, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_105=0, var_105_arg_0=0, var_105_arg_1=31, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_38=0, var_38_arg_0=0, var_39=1, var_40=0, var_40_arg_0=0, var_40_arg_1=1, var_43=1, var_43_arg_0=0, var_43_arg_1=0, var_44=0, var_44_arg_0=0, var_44_arg_1=1, var_45=0, var_48=0, var_48_arg_0=0, var_48_arg_1=1, var_49=0, var_49_arg_0=0, var_49_arg_1=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=0, var_55=1, var_55_arg_0=0, var_55_arg_1=31, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57=0, var_57_arg_0=0, var_57_arg_1=1, var_57_arg_2=0, var_58=2, var_59=0, var_59_arg_0=0, var_59_arg_1=1, var_62=1, var_62_arg_0=0, var_62_arg_1=0, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_66=0, var_66_arg_0=0, var_66_arg_1=1, var_67=0, var_67_arg_0=0, var_67_arg_1=0, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_72=1, var_72_arg_0=0, var_72_arg_1=31, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_74=0, var_74_arg_0=0, var_74_arg_1=2, var_74_arg_2=0, var_75=3, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_79=1, var_79_arg_0=0, var_79_arg_1=0, var_80=0, var_80_arg_0=0, var_80_arg_1=1, var_83=1, var_83_arg_0=0, var_83_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_87=0, var_87_arg_0=0, var_87_arg_1=1, var_88=0, var_88_arg_0=0, var_88_arg_1=0, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=0, var_93=1, var_93_arg_0=0, var_93_arg_1=31, var_94=0, var_94_arg_0=0, var_94_arg_1=1, var_95_arg_0=0, var_95_arg_1=3, var_95_arg_2=0] [L284] EXPR var_95_arg_0 ? var_95_arg_1 : var_95_arg_2 VAL [init_117_arg_1=0, init_119_arg_1=0, init_123_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_37_arg_1=0, init_42_arg_1=0, init_47_arg_1=0, init_51_arg_1=0, init_61_arg_1=0, init_65_arg_1=0, init_69_arg_1=0, init_78_arg_1=0, init_82_arg_1=0, init_86_arg_1=0, init_90_arg_1=0, init_99_arg_1=0, input_10=32, input_11=32, input_12=31, input_120=6, input_124=8, input_126=10, input_129=4, input_13=12, input_131=11, input_134=14, input_136=9, input_14=0, input_15=7, input_16=0, input_17=1, input_18=1, input_19=0, input_2=5, input_20=13, input_4=1, input_5=32, input_7=0, input_8=1, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_105=0, var_105_arg_0=0, var_105_arg_1=31, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_38=0, var_38_arg_0=0, var_39=1, var_40=0, var_40_arg_0=0, var_40_arg_1=1, var_43=1, var_43_arg_0=0, var_43_arg_1=0, var_44=0, var_44_arg_0=0, var_44_arg_1=1, var_45=0, var_48=0, var_48_arg_0=0, var_48_arg_1=1, var_49=0, var_49_arg_0=0, var_49_arg_1=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=0, var_55=1, var_55_arg_0=0, var_55_arg_1=31, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57=0, var_57_arg_0=0, var_57_arg_1=1, var_57_arg_2=0, var_58=2, var_59=0, var_59_arg_0=0, var_59_arg_1=1, var_62=1, var_62_arg_0=0, var_62_arg_1=0, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_66=0, var_66_arg_0=0, var_66_arg_1=1, var_67=0, var_67_arg_0=0, var_67_arg_1=0, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_72=1, var_72_arg_0=0, var_72_arg_1=31, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_74=0, var_74_arg_0=0, var_74_arg_1=2, var_74_arg_2=0, var_75=3, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_79=1, var_79_arg_0=0, var_79_arg_1=0, var_80=0, var_80_arg_0=0, var_80_arg_1=1, var_83=1, var_83_arg_0=0, var_83_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_87=0, var_87_arg_0=0, var_87_arg_1=1, var_88=0, var_88_arg_0=0, var_88_arg_1=0, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=0, var_93=1, var_93_arg_0=0, var_93_arg_1=31, var_94=0, var_94_arg_0=0, var_94_arg_1=1, var_95_arg_0=0, var_95_arg_0 ? var_95_arg_1 : var_95_arg_2=0, var_95_arg_1=3, var_95_arg_2=0] [L284] SORT_33 var_95 = var_95_arg_0 ? var_95_arg_1 : var_95_arg_2; [L285] var_95 = var_95 & mask_SORT_33 [L286] SORT_33 var_102_arg_0 = var_95; [L287] SORT_33 var_102_arg_1 = var_35; [L288] SORT_3 var_102 = var_102_arg_0 == var_102_arg_1; [L289] SORT_33 var_100_arg_0 = var_95; [L290] SORT_33 var_100_arg_1 = var_34; [L291] SORT_3 var_100 = var_100_arg_0 == var_100_arg_1; [L292] SORT_3 var_103_arg_0 = var_102; [L293] SORT_3 var_103_arg_1 = var_100; [L294] SORT_3 var_103 = var_103_arg_0 | var_103_arg_1; [L295] var_103 = var_103 & mask_SORT_3 [L296] SORT_3 var_101_arg_0 = var_100; [L297] SORT_6 var_101_arg_1 = var_28; [L298] SORT_6 var_101_arg_2 = state_98; VAL [init_117_arg_1=0, init_119_arg_1=0, init_123_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_37_arg_1=0, init_42_arg_1=0, init_47_arg_1=0, init_51_arg_1=0, init_61_arg_1=0, init_65_arg_1=0, init_69_arg_1=0, init_78_arg_1=0, init_82_arg_1=0, init_86_arg_1=0, init_90_arg_1=0, init_99_arg_1=0, input_10=32, input_11=32, input_12=31, input_120=6, input_124=8, input_126=10, input_129=4, input_13=12, input_131=11, input_134=14, input_136=9, input_14=0, input_15=7, input_16=0, input_17=1, input_18=1, input_19=0, input_2=5, input_20=13, input_4=1, input_5=32, input_7=0, input_8=1, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_100=1, var_100_arg_0=0, var_100_arg_1=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_102_arg_1=1, var_103=1, var_103_arg_0=0, var_103_arg_1=1, var_105=0, var_105_arg_0=0, var_105_arg_1=31, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_38=0, var_38_arg_0=0, var_39=1, var_40=0, var_40_arg_0=0, var_40_arg_1=1, var_43=1, var_43_arg_0=0, var_43_arg_1=0, var_44=0, var_44_arg_0=0, var_44_arg_1=1, var_45=0, var_48=0, var_48_arg_0=0, var_48_arg_1=1, var_49=0, var_49_arg_0=0, var_49_arg_1=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=0, var_55=1, var_55_arg_0=0, var_55_arg_1=31, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57=0, var_57_arg_0=0, var_57_arg_1=1, var_57_arg_2=0, var_58=2, var_59=0, var_59_arg_0=0, var_59_arg_1=1, var_62=1, var_62_arg_0=0, var_62_arg_1=0, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_66=0, var_66_arg_0=0, var_66_arg_1=1, var_67=0, var_67_arg_0=0, var_67_arg_1=0, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_72=1, var_72_arg_0=0, var_72_arg_1=31, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_74=0, var_74_arg_0=0, var_74_arg_1=2, var_74_arg_2=0, var_75=3, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_79=1, var_79_arg_0=0, var_79_arg_1=0, var_80=0, var_80_arg_0=0, var_80_arg_1=1, var_83=1, var_83_arg_0=0, var_83_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_87=0, var_87_arg_0=0, var_87_arg_1=1, var_88=0, var_88_arg_0=0, var_88_arg_1=0, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=0, var_93=1, var_93_arg_0=0, var_93_arg_1=31, var_94=0, var_94_arg_0=0, var_94_arg_1=1, var_95=0, var_95_arg_0=0, var_95_arg_1=3, var_95_arg_2=0] [L299] EXPR var_101_arg_0 ? var_101_arg_1 : var_101_arg_2 VAL [init_117_arg_1=0, init_119_arg_1=0, init_123_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_37_arg_1=0, init_42_arg_1=0, init_47_arg_1=0, init_51_arg_1=0, init_61_arg_1=0, init_65_arg_1=0, init_69_arg_1=0, init_78_arg_1=0, init_82_arg_1=0, init_86_arg_1=0, init_90_arg_1=0, init_99_arg_1=0, input_10=32, input_11=32, input_12=31, input_120=6, input_124=8, input_126=10, input_129=4, input_13=12, input_131=11, input_134=14, input_136=9, input_14=0, input_15=7, input_16=0, input_17=1, input_18=1, input_19=0, input_2=5, input_20=13, input_4=1, input_5=32, input_7=0, input_8=1, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_100=1, var_100_arg_0=0, var_100_arg_1=0, var_101_arg_0=1, var_101_arg_0 ? var_101_arg_1 : var_101_arg_2=0, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_102_arg_1=1, var_103=1, var_103_arg_0=0, var_103_arg_1=1, var_105=0, var_105_arg_0=0, var_105_arg_1=31, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_38=0, var_38_arg_0=0, var_39=1, var_40=0, var_40_arg_0=0, var_40_arg_1=1, var_43=1, var_43_arg_0=0, var_43_arg_1=0, var_44=0, var_44_arg_0=0, var_44_arg_1=1, var_45=0, var_48=0, var_48_arg_0=0, var_48_arg_1=1, var_49=0, var_49_arg_0=0, var_49_arg_1=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=0, var_55=1, var_55_arg_0=0, var_55_arg_1=31, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57=0, var_57_arg_0=0, var_57_arg_1=1, var_57_arg_2=0, var_58=2, var_59=0, var_59_arg_0=0, var_59_arg_1=1, var_62=1, var_62_arg_0=0, var_62_arg_1=0, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_66=0, var_66_arg_0=0, var_66_arg_1=1, var_67=0, var_67_arg_0=0, var_67_arg_1=0, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_72=1, var_72_arg_0=0, var_72_arg_1=31, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_74=0, var_74_arg_0=0, var_74_arg_1=2, var_74_arg_2=0, var_75=3, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_79=1, var_79_arg_0=0, var_79_arg_1=0, var_80=0, var_80_arg_0=0, var_80_arg_1=1, var_83=1, var_83_arg_0=0, var_83_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_87=0, var_87_arg_0=0, var_87_arg_1=1, var_88=0, var_88_arg_0=0, var_88_arg_1=0, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=0, var_93=1, var_93_arg_0=0, var_93_arg_1=31, var_94=0, var_94_arg_0=0, var_94_arg_1=1, var_95=0, var_95_arg_0=0, var_95_arg_1=3, var_95_arg_2=0] [L299] SORT_6 var_101 = var_101_arg_0 ? var_101_arg_1 : var_101_arg_2; [L300] SORT_33 var_96_arg_0 = var_95; [L301] SORT_33 var_96_arg_1 = var_58; [L302] SORT_3 var_96 = var_96_arg_0 == var_96_arg_1; [L303] SORT_3 var_97_arg_0 = var_96; [L304] SORT_6 var_97_arg_1 = state_31; [L305] SORT_6 var_97_arg_2 = state_29; VAL [init_117_arg_1=0, init_119_arg_1=0, init_123_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_37_arg_1=0, init_42_arg_1=0, init_47_arg_1=0, init_51_arg_1=0, init_61_arg_1=0, init_65_arg_1=0, init_69_arg_1=0, init_78_arg_1=0, init_82_arg_1=0, init_86_arg_1=0, init_90_arg_1=0, init_99_arg_1=0, input_10=32, input_11=32, input_12=31, input_120=6, input_124=8, input_126=10, input_129=4, input_13=12, input_131=11, input_134=14, input_136=9, input_14=0, input_15=7, input_16=0, input_17=1, input_18=1, input_19=0, input_2=5, input_20=13, input_4=1, input_5=32, input_7=0, input_8=1, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_100=1, var_100_arg_0=0, var_100_arg_1=0, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_102_arg_1=1, var_103=1, var_103_arg_0=0, var_103_arg_1=1, var_105=0, var_105_arg_0=0, var_105_arg_1=31, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_38=0, var_38_arg_0=0, var_39=1, var_40=0, var_40_arg_0=0, var_40_arg_1=1, var_43=1, var_43_arg_0=0, var_43_arg_1=0, var_44=0, var_44_arg_0=0, var_44_arg_1=1, var_45=0, var_48=0, var_48_arg_0=0, var_48_arg_1=1, var_49=0, var_49_arg_0=0, var_49_arg_1=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=0, var_55=1, var_55_arg_0=0, var_55_arg_1=31, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57=0, var_57_arg_0=0, var_57_arg_1=1, var_57_arg_2=0, var_58=2, var_59=0, var_59_arg_0=0, var_59_arg_1=1, var_62=1, var_62_arg_0=0, var_62_arg_1=0, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_66=0, var_66_arg_0=0, var_66_arg_1=1, var_67=0, var_67_arg_0=0, var_67_arg_1=0, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_72=1, var_72_arg_0=0, var_72_arg_1=31, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_74=0, var_74_arg_0=0, var_74_arg_1=2, var_74_arg_2=0, var_75=3, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_79=1, var_79_arg_0=0, var_79_arg_1=0, var_80=0, var_80_arg_0=0, var_80_arg_1=1, var_83=1, var_83_arg_0=0, var_83_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_87=0, var_87_arg_0=0, var_87_arg_1=1, var_88=0, var_88_arg_0=0, var_88_arg_1=0, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=0, var_93=1, var_93_arg_0=0, var_93_arg_1=31, var_94=0, var_94_arg_0=0, var_94_arg_1=1, var_95=0, var_95_arg_0=0, var_95_arg_1=3, var_95_arg_2=0, var_96=0, var_96_arg_0=0, var_96_arg_1=2, var_97_arg_0=0, var_97_arg_1=0, var_97_arg_2=0] [L306] EXPR var_97_arg_0 ? var_97_arg_1 : var_97_arg_2 VAL [init_117_arg_1=0, init_119_arg_1=0, init_123_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_37_arg_1=0, init_42_arg_1=0, init_47_arg_1=0, init_51_arg_1=0, init_61_arg_1=0, init_65_arg_1=0, init_69_arg_1=0, init_78_arg_1=0, init_82_arg_1=0, init_86_arg_1=0, init_90_arg_1=0, init_99_arg_1=0, input_10=32, input_11=32, input_12=31, input_120=6, input_124=8, input_126=10, input_129=4, input_13=12, input_131=11, input_134=14, input_136=9, input_14=0, input_15=7, input_16=0, input_17=1, input_18=1, input_19=0, input_2=5, input_20=13, input_4=1, input_5=32, input_7=0, input_8=1, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_100=1, var_100_arg_0=0, var_100_arg_1=0, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_102_arg_1=1, var_103=1, var_103_arg_0=0, var_103_arg_1=1, var_105=0, var_105_arg_0=0, var_105_arg_1=31, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_38=0, var_38_arg_0=0, var_39=1, var_40=0, var_40_arg_0=0, var_40_arg_1=1, var_43=1, var_43_arg_0=0, var_43_arg_1=0, var_44=0, var_44_arg_0=0, var_44_arg_1=1, var_45=0, var_48=0, var_48_arg_0=0, var_48_arg_1=1, var_49=0, var_49_arg_0=0, var_49_arg_1=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=0, var_55=1, var_55_arg_0=0, var_55_arg_1=31, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57=0, var_57_arg_0=0, var_57_arg_1=1, var_57_arg_2=0, var_58=2, var_59=0, var_59_arg_0=0, var_59_arg_1=1, var_62=1, var_62_arg_0=0, var_62_arg_1=0, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_66=0, var_66_arg_0=0, var_66_arg_1=1, var_67=0, var_67_arg_0=0, var_67_arg_1=0, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_72=1, var_72_arg_0=0, var_72_arg_1=31, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_74=0, var_74_arg_0=0, var_74_arg_1=2, var_74_arg_2=0, var_75=3, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_79=1, var_79_arg_0=0, var_79_arg_1=0, var_80=0, var_80_arg_0=0, var_80_arg_1=1, var_83=1, var_83_arg_0=0, var_83_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_87=0, var_87_arg_0=0, var_87_arg_1=1, var_88=0, var_88_arg_0=0, var_88_arg_1=0, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=0, var_93=1, var_93_arg_0=0, var_93_arg_1=31, var_94=0, var_94_arg_0=0, var_94_arg_1=1, var_95=0, var_95_arg_0=0, var_95_arg_1=3, var_95_arg_2=0, var_96=0, var_96_arg_0=0, var_96_arg_1=2, var_97_arg_0=0, var_97_arg_0 ? var_97_arg_1 : var_97_arg_2=0, var_97_arg_1=0, var_97_arg_2=0] [L306] SORT_6 var_97 = var_97_arg_0 ? var_97_arg_1 : var_97_arg_2; [L307] SORT_3 var_104_arg_0 = var_103; [L308] SORT_6 var_104_arg_1 = var_101; [L309] SORT_6 var_104_arg_2 = var_97; VAL [init_117_arg_1=0, init_119_arg_1=0, init_123_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_37_arg_1=0, init_42_arg_1=0, init_47_arg_1=0, init_51_arg_1=0, init_61_arg_1=0, init_65_arg_1=0, init_69_arg_1=0, init_78_arg_1=0, init_82_arg_1=0, init_86_arg_1=0, init_90_arg_1=0, init_99_arg_1=0, input_10=32, input_11=32, input_12=31, input_120=6, input_124=8, input_126=10, input_129=4, input_13=12, input_131=11, input_134=14, input_136=9, input_14=0, input_15=7, input_16=0, input_17=1, input_18=1, input_19=0, input_2=5, input_20=13, input_4=1, input_5=32, input_7=0, input_8=1, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_100=1, var_100_arg_0=0, var_100_arg_1=0, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_102_arg_1=1, var_103=1, var_103_arg_0=0, var_103_arg_1=1, var_104_arg_0=1, var_104_arg_1=0, var_104_arg_2=0, var_105=0, var_105_arg_0=0, var_105_arg_1=31, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_38=0, var_38_arg_0=0, var_39=1, var_40=0, var_40_arg_0=0, var_40_arg_1=1, var_43=1, var_43_arg_0=0, var_43_arg_1=0, var_44=0, var_44_arg_0=0, var_44_arg_1=1, var_45=0, var_48=0, var_48_arg_0=0, var_48_arg_1=1, var_49=0, var_49_arg_0=0, var_49_arg_1=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=0, var_55=1, var_55_arg_0=0, var_55_arg_1=31, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57=0, var_57_arg_0=0, var_57_arg_1=1, var_57_arg_2=0, var_58=2, var_59=0, var_59_arg_0=0, var_59_arg_1=1, var_62=1, var_62_arg_0=0, var_62_arg_1=0, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_66=0, var_66_arg_0=0, var_66_arg_1=1, var_67=0, var_67_arg_0=0, var_67_arg_1=0, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_72=1, var_72_arg_0=0, var_72_arg_1=31, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_74=0, var_74_arg_0=0, var_74_arg_1=2, var_74_arg_2=0, var_75=3, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_79=1, var_79_arg_0=0, var_79_arg_1=0, var_80=0, var_80_arg_0=0, var_80_arg_1=1, var_83=1, var_83_arg_0=0, var_83_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_87=0, var_87_arg_0=0, var_87_arg_1=1, var_88=0, var_88_arg_0=0, var_88_arg_1=0, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=0, var_93=1, var_93_arg_0=0, var_93_arg_1=31, var_94=0, var_94_arg_0=0, var_94_arg_1=1, var_95=0, var_95_arg_0=0, var_95_arg_1=3, var_95_arg_2=0, var_96=0, var_96_arg_0=0, var_96_arg_1=2, var_97=0, var_97_arg_0=0, var_97_arg_1=0, var_97_arg_2=0] [L310] EXPR var_104_arg_0 ? var_104_arg_1 : var_104_arg_2 VAL [init_117_arg_1=0, init_119_arg_1=0, init_123_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_37_arg_1=0, init_42_arg_1=0, init_47_arg_1=0, init_51_arg_1=0, init_61_arg_1=0, init_65_arg_1=0, init_69_arg_1=0, init_78_arg_1=0, init_82_arg_1=0, init_86_arg_1=0, init_90_arg_1=0, init_99_arg_1=0, input_10=32, input_11=32, input_12=31, input_120=6, input_124=8, input_126=10, input_129=4, input_13=12, input_131=11, input_134=14, input_136=9, input_14=0, input_15=7, input_16=0, input_17=1, input_18=1, input_19=0, input_2=5, input_20=13, input_4=1, input_5=32, input_7=0, input_8=1, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_100=1, var_100_arg_0=0, var_100_arg_1=0, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_102_arg_1=1, var_103=1, var_103_arg_0=0, var_103_arg_1=1, var_104_arg_0=1, var_104_arg_0 ? var_104_arg_1 : var_104_arg_2=0, var_104_arg_1=0, var_104_arg_2=0, var_105=0, var_105_arg_0=0, var_105_arg_1=31, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_38=0, var_38_arg_0=0, var_39=1, var_40=0, var_40_arg_0=0, var_40_arg_1=1, var_43=1, var_43_arg_0=0, var_43_arg_1=0, var_44=0, var_44_arg_0=0, var_44_arg_1=1, var_45=0, var_48=0, var_48_arg_0=0, var_48_arg_1=1, var_49=0, var_49_arg_0=0, var_49_arg_1=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=0, var_55=1, var_55_arg_0=0, var_55_arg_1=31, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57=0, var_57_arg_0=0, var_57_arg_1=1, var_57_arg_2=0, var_58=2, var_59=0, var_59_arg_0=0, var_59_arg_1=1, var_62=1, var_62_arg_0=0, var_62_arg_1=0, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_66=0, var_66_arg_0=0, var_66_arg_1=1, var_67=0, var_67_arg_0=0, var_67_arg_1=0, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_72=1, var_72_arg_0=0, var_72_arg_1=31, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_74=0, var_74_arg_0=0, var_74_arg_1=2, var_74_arg_2=0, var_75=3, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_79=1, var_79_arg_0=0, var_79_arg_1=0, var_80=0, var_80_arg_0=0, var_80_arg_1=1, var_83=1, var_83_arg_0=0, var_83_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_87=0, var_87_arg_0=0, var_87_arg_1=1, var_88=0, var_88_arg_0=0, var_88_arg_1=0, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=0, var_93=1, var_93_arg_0=0, var_93_arg_1=31, var_94=0, var_94_arg_0=0, var_94_arg_1=1, var_95=0, var_95_arg_0=0, var_95_arg_1=3, var_95_arg_2=0, var_96=0, var_96_arg_0=0, var_96_arg_1=2, var_97=0, var_97_arg_0=0, var_97_arg_1=0, var_97_arg_2=0] [L310] SORT_6 var_104 = var_104_arg_0 ? var_104_arg_1 : var_104_arg_2; [L311] SORT_3 var_106_arg_0 = var_105; [L312] SORT_6 var_106_arg_1 = var_28; [L313] SORT_6 var_106_arg_2 = var_104; VAL [init_117_arg_1=0, init_119_arg_1=0, init_123_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_37_arg_1=0, init_42_arg_1=0, init_47_arg_1=0, init_51_arg_1=0, init_61_arg_1=0, init_65_arg_1=0, init_69_arg_1=0, init_78_arg_1=0, init_82_arg_1=0, init_86_arg_1=0, init_90_arg_1=0, init_99_arg_1=0, input_10=32, input_11=32, input_12=31, input_120=6, input_124=8, input_126=10, input_129=4, input_13=12, input_131=11, input_134=14, input_136=9, input_14=0, input_15=7, input_16=0, input_17=1, input_18=1, input_19=0, input_2=5, input_20=13, input_4=1, input_5=32, input_7=0, input_8=1, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_100=1, var_100_arg_0=0, var_100_arg_1=0, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_102_arg_1=1, var_103=1, var_103_arg_0=0, var_103_arg_1=1, var_104=0, var_104_arg_0=1, var_104_arg_1=0, var_104_arg_2=0, var_105=0, var_105_arg_0=0, var_105_arg_1=31, var_106_arg_0=0, var_106_arg_1=0, var_106_arg_2=0, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_38=0, var_38_arg_0=0, var_39=1, var_40=0, var_40_arg_0=0, var_40_arg_1=1, var_43=1, var_43_arg_0=0, var_43_arg_1=0, var_44=0, var_44_arg_0=0, var_44_arg_1=1, var_45=0, var_48=0, var_48_arg_0=0, var_48_arg_1=1, var_49=0, var_49_arg_0=0, var_49_arg_1=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=0, var_55=1, var_55_arg_0=0, var_55_arg_1=31, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57=0, var_57_arg_0=0, var_57_arg_1=1, var_57_arg_2=0, var_58=2, var_59=0, var_59_arg_0=0, var_59_arg_1=1, var_62=1, var_62_arg_0=0, var_62_arg_1=0, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_66=0, var_66_arg_0=0, var_66_arg_1=1, var_67=0, var_67_arg_0=0, var_67_arg_1=0, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_72=1, var_72_arg_0=0, var_72_arg_1=31, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_74=0, var_74_arg_0=0, var_74_arg_1=2, var_74_arg_2=0, var_75=3, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_79=1, var_79_arg_0=0, var_79_arg_1=0, var_80=0, var_80_arg_0=0, var_80_arg_1=1, var_83=1, var_83_arg_0=0, var_83_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_87=0, var_87_arg_0=0, var_87_arg_1=1, var_88=0, var_88_arg_0=0, var_88_arg_1=0, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=0, var_93=1, var_93_arg_0=0, var_93_arg_1=31, var_94=0, var_94_arg_0=0, var_94_arg_1=1, var_95=0, var_95_arg_0=0, var_95_arg_1=3, var_95_arg_2=0, var_96=0, var_96_arg_0=0, var_96_arg_1=2, var_97=0, var_97_arg_0=0, var_97_arg_1=0, var_97_arg_2=0] [L314] EXPR var_106_arg_0 ? var_106_arg_1 : var_106_arg_2 VAL [init_117_arg_1=0, init_119_arg_1=0, init_123_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_37_arg_1=0, init_42_arg_1=0, init_47_arg_1=0, init_51_arg_1=0, init_61_arg_1=0, init_65_arg_1=0, init_69_arg_1=0, init_78_arg_1=0, init_82_arg_1=0, init_86_arg_1=0, init_90_arg_1=0, init_99_arg_1=0, input_10=32, input_11=32, input_12=31, input_120=6, input_124=8, input_126=10, input_129=4, input_13=12, input_131=11, input_134=14, input_136=9, input_14=0, input_15=7, input_16=0, input_17=1, input_18=1, input_19=0, input_2=5, input_20=13, input_4=1, input_5=32, input_7=0, input_8=1, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_100=1, var_100_arg_0=0, var_100_arg_1=0, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_102_arg_1=1, var_103=1, var_103_arg_0=0, var_103_arg_1=1, var_104=0, var_104_arg_0=1, var_104_arg_1=0, var_104_arg_2=0, var_105=0, var_105_arg_0=0, var_105_arg_1=31, var_106_arg_0=0, var_106_arg_0 ? var_106_arg_1 : var_106_arg_2=0, var_106_arg_1=0, var_106_arg_2=0, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_38=0, var_38_arg_0=0, var_39=1, var_40=0, var_40_arg_0=0, var_40_arg_1=1, var_43=1, var_43_arg_0=0, var_43_arg_1=0, var_44=0, var_44_arg_0=0, var_44_arg_1=1, var_45=0, var_48=0, var_48_arg_0=0, var_48_arg_1=1, var_49=0, var_49_arg_0=0, var_49_arg_1=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=0, var_55=1, var_55_arg_0=0, var_55_arg_1=31, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57=0, var_57_arg_0=0, var_57_arg_1=1, var_57_arg_2=0, var_58=2, var_59=0, var_59_arg_0=0, var_59_arg_1=1, var_62=1, var_62_arg_0=0, var_62_arg_1=0, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_66=0, var_66_arg_0=0, var_66_arg_1=1, var_67=0, var_67_arg_0=0, var_67_arg_1=0, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_72=1, var_72_arg_0=0, var_72_arg_1=31, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_74=0, var_74_arg_0=0, var_74_arg_1=2, var_74_arg_2=0, var_75=3, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_79=1, var_79_arg_0=0, var_79_arg_1=0, var_80=0, var_80_arg_0=0, var_80_arg_1=1, var_83=1, var_83_arg_0=0, var_83_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_87=0, var_87_arg_0=0, var_87_arg_1=1, var_88=0, var_88_arg_0=0, var_88_arg_1=0, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=0, var_93=1, var_93_arg_0=0, var_93_arg_1=31, var_94=0, var_94_arg_0=0, var_94_arg_1=1, var_95=0, var_95_arg_0=0, var_95_arg_1=3, var_95_arg_2=0, var_96=0, var_96_arg_0=0, var_96_arg_1=2, var_97=0, var_97_arg_0=0, var_97_arg_1=0, var_97_arg_2=0] [L314] SORT_6 var_106 = var_106_arg_0 ? var_106_arg_1 : var_106_arg_2; [L315] SORT_6 var_107_arg_0 = var_106; [L316] SORT_1 var_107 = var_107_arg_0 >> 26; [L317] var_107 = var_107 & mask_SORT_1 [L318] SORT_1 var_108_arg_0 = var_107; [L319] SORT_1 var_108_arg_1 = var_21; [L320] SORT_3 var_108 = var_108_arg_0 == var_108_arg_1; [L321] SORT_3 var_109_arg_0 = var_27; [L322] SORT_3 var_109_arg_1 = var_108; [L323] SORT_3 var_109 = var_109_arg_0 & var_109_arg_1; [L324] SORT_3 var_110_arg_0 = var_109; [L325] SORT_3 var_110 = ~var_110_arg_0; [L326] SORT_3 var_113_arg_0 = var_110; [L327] SORT_3 var_113 = ~var_113_arg_0; [L328] SORT_3 var_114_arg_0 = var_39; [L329] SORT_3 var_114_arg_1 = var_113; [L330] SORT_3 var_114 = var_114_arg_0 & var_114_arg_1; [L331] var_114 = var_114 & mask_SORT_3 [L332] SORT_3 bad_115_arg_0 = var_114; [L333] CALL __VERIFIER_assert(!(bad_115_arg_0)) [L20] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L333] RET __VERIFIER_assert(!(bad_115_arg_0)) [L335] SORT_1 next_139_arg_1 = input_12; [L336] SORT_6 next_140_arg_1 = input_7; [L337] SORT_6 next_141_arg_1 = input_9; [L338] SORT_1 next_142_arg_1 = input_11; [L339] SORT_3 var_143_arg_0 = state_122; [L340] SORT_1 var_143_arg_1 = state_60; [L341] SORT_1 var_143_arg_2 = state_41; VAL [bad_115_arg_0=0, init_117_arg_1=0, init_119_arg_1=0, init_123_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_37_arg_1=0, init_42_arg_1=0, init_47_arg_1=0, init_51_arg_1=0, init_61_arg_1=0, init_65_arg_1=0, init_69_arg_1=0, init_78_arg_1=0, init_82_arg_1=0, init_86_arg_1=0, init_90_arg_1=0, init_99_arg_1=0, input_10=32, input_11=32, input_12=31, input_120=6, input_124=8, input_126=10, input_129=4, input_13=12, input_131=11, input_134=14, input_136=9, input_14=0, input_15=7, input_16=0, input_17=1, input_18=1, input_19=0, input_2=5, input_20=13, input_4=1, input_5=32, input_7=0, input_8=1, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_139_arg_1=31, next_140_arg_1=0, next_141_arg_1=13, next_142_arg_1=32, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_100=1, var_100_arg_0=0, var_100_arg_1=0, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_102_arg_1=1, var_103=1, var_103_arg_0=0, var_103_arg_1=1, var_104=0, var_104_arg_0=1, var_104_arg_1=0, var_104_arg_2=0, var_105=0, var_105_arg_0=0, var_105_arg_1=31, var_106=0, var_106_arg_0=0, var_106_arg_1=0, var_106_arg_2=0, var_107=0, var_107_arg_0=0, var_108=1, var_108_arg_0=0, var_108_arg_1=0, var_109=0, var_109_arg_0=0, var_109_arg_1=1, var_110=255, var_110_arg_0=0, var_113=0, var_113_arg_0=255, var_114=0, var_114_arg_0=1, var_114_arg_1=0, var_143_arg_0=0, var_143_arg_1=0, var_143_arg_2=0, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_38=0, var_38_arg_0=0, var_39=1, var_40=0, var_40_arg_0=0, var_40_arg_1=1, var_43=1, var_43_arg_0=0, var_43_arg_1=0, var_44=0, var_44_arg_0=0, var_44_arg_1=1, var_45=0, var_48=0, var_48_arg_0=0, var_48_arg_1=1, var_49=0, var_49_arg_0=0, var_49_arg_1=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=0, var_55=1, var_55_arg_0=0, var_55_arg_1=31, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57=0, var_57_arg_0=0, var_57_arg_1=1, var_57_arg_2=0, var_58=2, var_59=0, var_59_arg_0=0, var_59_arg_1=1, var_62=1, var_62_arg_0=0, var_62_arg_1=0, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_66=0, var_66_arg_0=0, var_66_arg_1=1, var_67=0, var_67_arg_0=0, var_67_arg_1=0, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_72=1, var_72_arg_0=0, var_72_arg_1=31, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_74=0, var_74_arg_0=0, var_74_arg_1=2, var_74_arg_2=0, var_75=3, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_79=1, var_79_arg_0=0, var_79_arg_1=0, var_80=0, var_80_arg_0=0, var_80_arg_1=1, var_83=1, var_83_arg_0=0, var_83_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_87=0, var_87_arg_0=0, var_87_arg_1=1, var_88=0, var_88_arg_0=0, var_88_arg_1=0, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=0, var_93=1, var_93_arg_0=0, var_93_arg_1=31, var_94=0, var_94_arg_0=0, var_94_arg_1=1, var_95=0, var_95_arg_0=0, var_95_arg_1=3, var_95_arg_2=0, var_96=0, var_96_arg_0=0, var_96_arg_1=2, var_97=0, var_97_arg_0=0, var_97_arg_1=0, var_97_arg_2=0] [L342] EXPR var_143_arg_0 ? var_143_arg_1 : var_143_arg_2 VAL [bad_115_arg_0=0, init_117_arg_1=0, init_119_arg_1=0, init_123_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_37_arg_1=0, init_42_arg_1=0, init_47_arg_1=0, init_51_arg_1=0, init_61_arg_1=0, init_65_arg_1=0, init_69_arg_1=0, init_78_arg_1=0, init_82_arg_1=0, init_86_arg_1=0, init_90_arg_1=0, init_99_arg_1=0, input_10=32, input_11=32, input_12=31, input_120=6, input_124=8, input_126=10, input_129=4, input_13=12, input_131=11, input_134=14, input_136=9, input_14=0, input_15=7, input_16=0, input_17=1, input_18=1, input_19=0, input_2=5, input_20=13, input_4=1, input_5=32, input_7=0, input_8=1, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_139_arg_1=31, next_140_arg_1=0, next_141_arg_1=13, next_142_arg_1=32, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_100=1, var_100_arg_0=0, var_100_arg_1=0, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_102_arg_1=1, var_103=1, var_103_arg_0=0, var_103_arg_1=1, var_104=0, var_104_arg_0=1, var_104_arg_1=0, var_104_arg_2=0, var_105=0, var_105_arg_0=0, var_105_arg_1=31, var_106=0, var_106_arg_0=0, var_106_arg_1=0, var_106_arg_2=0, var_107=0, var_107_arg_0=0, var_108=1, var_108_arg_0=0, var_108_arg_1=0, var_109=0, var_109_arg_0=0, var_109_arg_1=1, var_110=255, var_110_arg_0=0, var_113=0, var_113_arg_0=255, var_114=0, var_114_arg_0=1, var_114_arg_1=0, var_143_arg_0=0, var_143_arg_0 ? var_143_arg_1 : var_143_arg_2=0, var_143_arg_1=0, var_143_arg_2=0, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_38=0, var_38_arg_0=0, var_39=1, var_40=0, var_40_arg_0=0, var_40_arg_1=1, var_43=1, var_43_arg_0=0, var_43_arg_1=0, var_44=0, var_44_arg_0=0, var_44_arg_1=1, var_45=0, var_48=0, var_48_arg_0=0, var_48_arg_1=1, var_49=0, var_49_arg_0=0, var_49_arg_1=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=0, var_55=1, var_55_arg_0=0, var_55_arg_1=31, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57=0, var_57_arg_0=0, var_57_arg_1=1, var_57_arg_2=0, var_58=2, var_59=0, var_59_arg_0=0, var_59_arg_1=1, var_62=1, var_62_arg_0=0, var_62_arg_1=0, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_66=0, var_66_arg_0=0, var_66_arg_1=1, var_67=0, var_67_arg_0=0, var_67_arg_1=0, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_72=1, var_72_arg_0=0, var_72_arg_1=31, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_74=0, var_74_arg_0=0, var_74_arg_1=2, var_74_arg_2=0, var_75=3, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_79=1, var_79_arg_0=0, var_79_arg_1=0, var_80=0, var_80_arg_0=0, var_80_arg_1=1, var_83=1, var_83_arg_0=0, var_83_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_87=0, var_87_arg_0=0, var_87_arg_1=1, var_88=0, var_88_arg_0=0, var_88_arg_1=0, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=0, var_93=1, var_93_arg_0=0, var_93_arg_1=31, var_94=0, var_94_arg_0=0, var_94_arg_1=1, var_95=0, var_95_arg_0=0, var_95_arg_1=3, var_95_arg_2=0, var_96=0, var_96_arg_0=0, var_96_arg_1=2, var_97=0, var_97_arg_0=0, var_97_arg_1=0, var_97_arg_2=0] [L342] SORT_1 var_143 = var_143_arg_0 ? var_143_arg_1 : var_143_arg_2; [L343] var_143 = var_143 & mask_SORT_1 [L344] SORT_1 next_144_arg_1 = var_143; [L345] SORT_3 next_145_arg_1 = input_19; [L346] SORT_3 var_146_arg_0 = state_122; [L347] SORT_3 var_146_arg_1 = state_64; [L348] SORT_3 var_146_arg_2 = state_50; VAL [bad_115_arg_0=0, init_117_arg_1=0, init_119_arg_1=0, init_123_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_37_arg_1=0, init_42_arg_1=0, init_47_arg_1=0, init_51_arg_1=0, init_61_arg_1=0, init_65_arg_1=0, init_69_arg_1=0, init_78_arg_1=0, init_82_arg_1=0, init_86_arg_1=0, init_90_arg_1=0, init_99_arg_1=0, input_10=32, input_11=32, input_12=31, input_120=6, input_124=8, input_126=10, input_129=4, input_13=12, input_131=11, input_134=14, input_136=9, input_14=0, input_15=7, input_16=0, input_17=1, input_18=1, input_19=0, input_2=5, input_20=13, input_4=1, input_5=32, input_7=0, input_8=1, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_139_arg_1=31, next_140_arg_1=0, next_141_arg_1=13, next_142_arg_1=32, next_144_arg_1=0, next_145_arg_1=0, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_100=1, var_100_arg_0=0, var_100_arg_1=0, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_102_arg_1=1, var_103=1, var_103_arg_0=0, var_103_arg_1=1, var_104=0, var_104_arg_0=1, var_104_arg_1=0, var_104_arg_2=0, var_105=0, var_105_arg_0=0, var_105_arg_1=31, var_106=0, var_106_arg_0=0, var_106_arg_1=0, var_106_arg_2=0, var_107=0, var_107_arg_0=0, var_108=1, var_108_arg_0=0, var_108_arg_1=0, var_109=0, var_109_arg_0=0, var_109_arg_1=1, var_110=255, var_110_arg_0=0, var_113=0, var_113_arg_0=255, var_114=0, var_114_arg_0=1, var_114_arg_1=0, var_143=0, var_143_arg_0=0, var_143_arg_1=0, var_143_arg_2=0, var_146_arg_0=0, var_146_arg_1=0, var_146_arg_2=0, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_38=0, var_38_arg_0=0, var_39=1, var_40=0, var_40_arg_0=0, var_40_arg_1=1, var_43=1, var_43_arg_0=0, var_43_arg_1=0, var_44=0, var_44_arg_0=0, var_44_arg_1=1, var_45=0, var_48=0, var_48_arg_0=0, var_48_arg_1=1, var_49=0, var_49_arg_0=0, var_49_arg_1=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=0, var_55=1, var_55_arg_0=0, var_55_arg_1=31, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57=0, var_57_arg_0=0, var_57_arg_1=1, var_57_arg_2=0, var_58=2, var_59=0, var_59_arg_0=0, var_59_arg_1=1, var_62=1, var_62_arg_0=0, var_62_arg_1=0, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_66=0, var_66_arg_0=0, var_66_arg_1=1, var_67=0, var_67_arg_0=0, var_67_arg_1=0, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_72=1, var_72_arg_0=0, var_72_arg_1=31, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_74=0, var_74_arg_0=0, var_74_arg_1=2, var_74_arg_2=0, var_75=3, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_79=1, var_79_arg_0=0, var_79_arg_1=0, var_80=0, var_80_arg_0=0, var_80_arg_1=1, var_83=1, var_83_arg_0=0, var_83_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_87=0, var_87_arg_0=0, var_87_arg_1=1, var_88=0, var_88_arg_0=0, var_88_arg_1=0, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=0, var_93=1, var_93_arg_0=0, var_93_arg_1=31, var_94=0, var_94_arg_0=0, var_94_arg_1=1, var_95=0, var_95_arg_0=0, var_95_arg_1=3, var_95_arg_2=0, var_96=0, var_96_arg_0=0, var_96_arg_1=2, var_97=0, var_97_arg_0=0, var_97_arg_1=0, var_97_arg_2=0] [L349] EXPR var_146_arg_0 ? var_146_arg_1 : var_146_arg_2 VAL [bad_115_arg_0=0, init_117_arg_1=0, init_119_arg_1=0, init_123_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_37_arg_1=0, init_42_arg_1=0, init_47_arg_1=0, init_51_arg_1=0, init_61_arg_1=0, init_65_arg_1=0, init_69_arg_1=0, init_78_arg_1=0, init_82_arg_1=0, init_86_arg_1=0, init_90_arg_1=0, init_99_arg_1=0, input_10=32, input_11=32, input_12=31, input_120=6, input_124=8, input_126=10, input_129=4, input_13=12, input_131=11, input_134=14, input_136=9, input_14=0, input_15=7, input_16=0, input_17=1, input_18=1, input_19=0, input_2=5, input_20=13, input_4=1, input_5=32, input_7=0, input_8=1, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_139_arg_1=31, next_140_arg_1=0, next_141_arg_1=13, next_142_arg_1=32, next_144_arg_1=0, next_145_arg_1=0, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_100=1, var_100_arg_0=0, var_100_arg_1=0, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_102_arg_1=1, var_103=1, var_103_arg_0=0, var_103_arg_1=1, var_104=0, var_104_arg_0=1, var_104_arg_1=0, var_104_arg_2=0, var_105=0, var_105_arg_0=0, var_105_arg_1=31, var_106=0, var_106_arg_0=0, var_106_arg_1=0, var_106_arg_2=0, var_107=0, var_107_arg_0=0, var_108=1, var_108_arg_0=0, var_108_arg_1=0, var_109=0, var_109_arg_0=0, var_109_arg_1=1, var_110=255, var_110_arg_0=0, var_113=0, var_113_arg_0=255, var_114=0, var_114_arg_0=1, var_114_arg_1=0, var_143=0, var_143_arg_0=0, var_143_arg_1=0, var_143_arg_2=0, var_146_arg_0=0, var_146_arg_0 ? var_146_arg_1 : var_146_arg_2=0, var_146_arg_1=0, var_146_arg_2=0, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_38=0, var_38_arg_0=0, var_39=1, var_40=0, var_40_arg_0=0, var_40_arg_1=1, var_43=1, var_43_arg_0=0, var_43_arg_1=0, var_44=0, var_44_arg_0=0, var_44_arg_1=1, var_45=0, var_48=0, var_48_arg_0=0, var_48_arg_1=1, var_49=0, var_49_arg_0=0, var_49_arg_1=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=0, var_55=1, var_55_arg_0=0, var_55_arg_1=31, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57=0, var_57_arg_0=0, var_57_arg_1=1, var_57_arg_2=0, var_58=2, var_59=0, var_59_arg_0=0, var_59_arg_1=1, var_62=1, var_62_arg_0=0, var_62_arg_1=0, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_66=0, var_66_arg_0=0, var_66_arg_1=1, var_67=0, var_67_arg_0=0, var_67_arg_1=0, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_72=1, var_72_arg_0=0, var_72_arg_1=31, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_74=0, var_74_arg_0=0, var_74_arg_1=2, var_74_arg_2=0, var_75=3, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_79=1, var_79_arg_0=0, var_79_arg_1=0, var_80=0, var_80_arg_0=0, var_80_arg_1=1, var_83=1, var_83_arg_0=0, var_83_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_87=0, var_87_arg_0=0, var_87_arg_1=1, var_88=0, var_88_arg_0=0, var_88_arg_1=0, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=0, var_93=1, var_93_arg_0=0, var_93_arg_1=31, var_94=0, var_94_arg_0=0, var_94_arg_1=1, var_95=0, var_95_arg_0=0, var_95_arg_1=3, var_95_arg_2=0, var_96=0, var_96_arg_0=0, var_96_arg_1=2, var_97=0, var_97_arg_0=0, var_97_arg_1=0, var_97_arg_2=0] [L349] SORT_3 var_146 = var_146_arg_0 ? var_146_arg_1 : var_146_arg_2; [L350] var_146 = var_146 & mask_SORT_3 [L351] SORT_3 next_147_arg_1 = var_146; [L352] SORT_1 next_148_arg_1 = input_10; [L353] SORT_3 next_149_arg_1 = input_8; [L354] SORT_3 next_150_arg_1 = input_18; [L355] SORT_1 next_151_arg_1 = input_5; [L356] SORT_1 var_152_arg_0 = state_116; [L357] SORT_3 var_152 = var_152_arg_0 >> 5; [L358] SORT_1 var_153_arg_0 = state_116; [L359] SORT_3 var_153 = var_153_arg_0 >> 2; [L360] SORT_3 var_154_arg_0 = var_152; [L361] SORT_3 var_154_arg_1 = var_153; [L362] SORT_3 var_154 = var_154_arg_0 & var_154_arg_1; [L363] SORT_1 var_155_arg_0 = state_116; [L364] SORT_3 var_155 = var_155_arg_0 >> 0; [L365] SORT_3 var_156_arg_0 = var_155; [L366] SORT_3 var_156 = ~var_156_arg_0; [L367] SORT_3 var_157_arg_0 = var_154; [L368] SORT_3 var_157_arg_1 = var_156; [L369] SORT_3 var_157 = var_157_arg_0 & var_157_arg_1; [L370] SORT_3 var_158_arg_0 = state_118; [L371] SORT_3 var_158_arg_1 = var_157; [L372] SORT_3 var_158_arg_2 = state_81; VAL [bad_115_arg_0=0, init_117_arg_1=0, init_119_arg_1=0, init_123_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_37_arg_1=0, init_42_arg_1=0, init_47_arg_1=0, init_51_arg_1=0, init_61_arg_1=0, init_65_arg_1=0, init_69_arg_1=0, init_78_arg_1=0, init_82_arg_1=0, init_86_arg_1=0, init_90_arg_1=0, init_99_arg_1=0, input_10=32, input_11=32, input_12=31, input_120=6, input_124=8, input_126=10, input_129=4, input_13=12, input_131=11, input_134=14, input_136=9, input_14=0, input_15=7, input_16=0, input_17=1, input_18=1, input_19=0, input_2=5, input_20=13, input_4=1, input_5=32, input_7=0, input_8=1, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_139_arg_1=31, next_140_arg_1=0, next_141_arg_1=13, next_142_arg_1=32, next_144_arg_1=0, next_145_arg_1=0, next_147_arg_1=0, next_148_arg_1=32, next_149_arg_1=1, next_150_arg_1=1, next_151_arg_1=32, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_100=1, var_100_arg_0=0, var_100_arg_1=0, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_102_arg_1=1, var_103=1, var_103_arg_0=0, var_103_arg_1=1, var_104=0, var_104_arg_0=1, var_104_arg_1=0, var_104_arg_2=0, var_105=0, var_105_arg_0=0, var_105_arg_1=31, var_106=0, var_106_arg_0=0, var_106_arg_1=0, var_106_arg_2=0, var_107=0, var_107_arg_0=0, var_108=1, var_108_arg_0=0, var_108_arg_1=0, var_109=0, var_109_arg_0=0, var_109_arg_1=1, var_110=255, var_110_arg_0=0, var_113=0, var_113_arg_0=255, var_114=0, var_114_arg_0=1, var_114_arg_1=0, var_143=0, var_143_arg_0=0, var_143_arg_1=0, var_143_arg_2=0, var_146=0, var_146_arg_0=0, var_146_arg_1=0, var_146_arg_2=0, var_152=0, var_152_arg_0=0, var_153=0, var_153_arg_0=0, var_154=0, var_154_arg_0=0, var_154_arg_1=0, var_155=0, var_155_arg_0=0, var_156=255, var_156_arg_0=0, var_157=0, var_157_arg_0=0, var_157_arg_1=255, var_158_arg_0=0, var_158_arg_1=0, var_158_arg_2=0, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_38=0, var_38_arg_0=0, var_39=1, var_40=0, var_40_arg_0=0, var_40_arg_1=1, var_43=1, var_43_arg_0=0, var_43_arg_1=0, var_44=0, var_44_arg_0=0, var_44_arg_1=1, var_45=0, var_48=0, var_48_arg_0=0, var_48_arg_1=1, var_49=0, var_49_arg_0=0, var_49_arg_1=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=0, var_55=1, var_55_arg_0=0, var_55_arg_1=31, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57=0, var_57_arg_0=0, var_57_arg_1=1, var_57_arg_2=0, var_58=2, var_59=0, var_59_arg_0=0, var_59_arg_1=1, var_62=1, var_62_arg_0=0, var_62_arg_1=0, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_66=0, var_66_arg_0=0, var_66_arg_1=1, var_67=0, var_67_arg_0=0, var_67_arg_1=0, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_72=1, var_72_arg_0=0, var_72_arg_1=31, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_74=0, var_74_arg_0=0, var_74_arg_1=2, var_74_arg_2=0, var_75=3, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_79=1, var_79_arg_0=0, var_79_arg_1=0, var_80=0, var_80_arg_0=0, var_80_arg_1=1, var_83=1, var_83_arg_0=0, var_83_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_87=0, var_87_arg_0=0, var_87_arg_1=1, var_88=0, var_88_arg_0=0, var_88_arg_1=0, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=0, var_93=1, var_93_arg_0=0, var_93_arg_1=31, var_94=0, var_94_arg_0=0, var_94_arg_1=1, var_95=0, var_95_arg_0=0, var_95_arg_1=3, var_95_arg_2=0, var_96=0, var_96_arg_0=0, var_96_arg_1=2, var_97=0, var_97_arg_0=0, var_97_arg_1=0, var_97_arg_2=0] [L373] EXPR var_158_arg_0 ? var_158_arg_1 : var_158_arg_2 VAL [bad_115_arg_0=0, init_117_arg_1=0, init_119_arg_1=0, init_123_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_37_arg_1=0, init_42_arg_1=0, init_47_arg_1=0, init_51_arg_1=0, init_61_arg_1=0, init_65_arg_1=0, init_69_arg_1=0, init_78_arg_1=0, init_82_arg_1=0, init_86_arg_1=0, init_90_arg_1=0, init_99_arg_1=0, input_10=32, input_11=32, input_12=31, input_120=6, input_124=8, input_126=10, input_129=4, input_13=12, input_131=11, input_134=14, input_136=9, input_14=0, input_15=7, input_16=0, input_17=1, input_18=1, input_19=0, input_2=5, input_20=13, input_4=1, input_5=32, input_7=0, input_8=1, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_139_arg_1=31, next_140_arg_1=0, next_141_arg_1=13, next_142_arg_1=32, next_144_arg_1=0, next_145_arg_1=0, next_147_arg_1=0, next_148_arg_1=32, next_149_arg_1=1, next_150_arg_1=1, next_151_arg_1=32, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_100=1, var_100_arg_0=0, var_100_arg_1=0, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_102_arg_1=1, var_103=1, var_103_arg_0=0, var_103_arg_1=1, var_104=0, var_104_arg_0=1, var_104_arg_1=0, var_104_arg_2=0, var_105=0, var_105_arg_0=0, var_105_arg_1=31, var_106=0, var_106_arg_0=0, var_106_arg_1=0, var_106_arg_2=0, var_107=0, var_107_arg_0=0, var_108=1, var_108_arg_0=0, var_108_arg_1=0, var_109=0, var_109_arg_0=0, var_109_arg_1=1, var_110=255, var_110_arg_0=0, var_113=0, var_113_arg_0=255, var_114=0, var_114_arg_0=1, var_114_arg_1=0, var_143=0, var_143_arg_0=0, var_143_arg_1=0, var_143_arg_2=0, var_146=0, var_146_arg_0=0, var_146_arg_1=0, var_146_arg_2=0, var_152=0, var_152_arg_0=0, var_153=0, var_153_arg_0=0, var_154=0, var_154_arg_0=0, var_154_arg_1=0, var_155=0, var_155_arg_0=0, var_156=255, var_156_arg_0=0, var_157=0, var_157_arg_0=0, var_157_arg_1=255, var_158_arg_0=0, var_158_arg_0 ? var_158_arg_1 : var_158_arg_2=0, var_158_arg_1=0, var_158_arg_2=0, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_38=0, var_38_arg_0=0, var_39=1, var_40=0, var_40_arg_0=0, var_40_arg_1=1, var_43=1, var_43_arg_0=0, var_43_arg_1=0, var_44=0, var_44_arg_0=0, var_44_arg_1=1, var_45=0, var_48=0, var_48_arg_0=0, var_48_arg_1=1, var_49=0, var_49_arg_0=0, var_49_arg_1=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=0, var_55=1, var_55_arg_0=0, var_55_arg_1=31, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57=0, var_57_arg_0=0, var_57_arg_1=1, var_57_arg_2=0, var_58=2, var_59=0, var_59_arg_0=0, var_59_arg_1=1, var_62=1, var_62_arg_0=0, var_62_arg_1=0, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_66=0, var_66_arg_0=0, var_66_arg_1=1, var_67=0, var_67_arg_0=0, var_67_arg_1=0, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_72=1, var_72_arg_0=0, var_72_arg_1=31, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_74=0, var_74_arg_0=0, var_74_arg_1=2, var_74_arg_2=0, var_75=3, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_79=1, var_79_arg_0=0, var_79_arg_1=0, var_80=0, var_80_arg_0=0, var_80_arg_1=1, var_83=1, var_83_arg_0=0, var_83_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_87=0, var_87_arg_0=0, var_87_arg_1=1, var_88=0, var_88_arg_0=0, var_88_arg_1=0, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=0, var_93=1, var_93_arg_0=0, var_93_arg_1=31, var_94=0, var_94_arg_0=0, var_94_arg_1=1, var_95=0, var_95_arg_0=0, var_95_arg_1=3, var_95_arg_2=0, var_96=0, var_96_arg_0=0, var_96_arg_1=2, var_97=0, var_97_arg_0=0, var_97_arg_1=0, var_97_arg_2=0] [L373] SORT_3 var_158 = var_158_arg_0 ? var_158_arg_1 : var_158_arg_2; [L374] var_158 = var_158 & mask_SORT_3 [L375] SORT_3 next_159_arg_1 = var_158; [L376] SORT_3 next_160_arg_1 = input_4; [L377] SORT_3 next_161_arg_1 = input_17; [L378] SORT_3 var_162_arg_0 = state_122; [L379] SORT_6 var_162_arg_1 = state_31; [L380] SORT_6 var_162_arg_2 = state_98; VAL [bad_115_arg_0=0, init_117_arg_1=0, init_119_arg_1=0, init_123_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_37_arg_1=0, init_42_arg_1=0, init_47_arg_1=0, init_51_arg_1=0, init_61_arg_1=0, init_65_arg_1=0, init_69_arg_1=0, init_78_arg_1=0, init_82_arg_1=0, init_86_arg_1=0, init_90_arg_1=0, init_99_arg_1=0, input_10=32, input_11=32, input_12=31, input_120=6, input_124=8, input_126=10, input_129=4, input_13=12, input_131=11, input_134=14, input_136=9, input_14=0, input_15=7, input_16=0, input_17=1, input_18=1, input_19=0, input_2=5, input_20=13, input_4=1, input_5=32, input_7=0, input_8=1, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_139_arg_1=31, next_140_arg_1=0, next_141_arg_1=13, next_142_arg_1=32, next_144_arg_1=0, next_145_arg_1=0, next_147_arg_1=0, next_148_arg_1=32, next_149_arg_1=1, next_150_arg_1=1, next_151_arg_1=32, next_159_arg_1=0, next_160_arg_1=1, next_161_arg_1=1, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_100=1, var_100_arg_0=0, var_100_arg_1=0, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_102_arg_1=1, var_103=1, var_103_arg_0=0, var_103_arg_1=1, var_104=0, var_104_arg_0=1, var_104_arg_1=0, var_104_arg_2=0, var_105=0, var_105_arg_0=0, var_105_arg_1=31, var_106=0, var_106_arg_0=0, var_106_arg_1=0, var_106_arg_2=0, var_107=0, var_107_arg_0=0, var_108=1, var_108_arg_0=0, var_108_arg_1=0, var_109=0, var_109_arg_0=0, var_109_arg_1=1, var_110=255, var_110_arg_0=0, var_113=0, var_113_arg_0=255, var_114=0, var_114_arg_0=1, var_114_arg_1=0, var_143=0, var_143_arg_0=0, var_143_arg_1=0, var_143_arg_2=0, var_146=0, var_146_arg_0=0, var_146_arg_1=0, var_146_arg_2=0, var_152=0, var_152_arg_0=0, var_153=0, var_153_arg_0=0, var_154=0, var_154_arg_0=0, var_154_arg_1=0, var_155=0, var_155_arg_0=0, var_156=255, var_156_arg_0=0, var_157=0, var_157_arg_0=0, var_157_arg_1=255, var_158=0, var_158_arg_0=0, var_158_arg_1=0, var_158_arg_2=0, var_162_arg_0=0, var_162_arg_1=0, var_162_arg_2=0, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_38=0, var_38_arg_0=0, var_39=1, var_40=0, var_40_arg_0=0, var_40_arg_1=1, var_43=1, var_43_arg_0=0, var_43_arg_1=0, var_44=0, var_44_arg_0=0, var_44_arg_1=1, var_45=0, var_48=0, var_48_arg_0=0, var_48_arg_1=1, var_49=0, var_49_arg_0=0, var_49_arg_1=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=0, var_55=1, var_55_arg_0=0, var_55_arg_1=31, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57=0, var_57_arg_0=0, var_57_arg_1=1, var_57_arg_2=0, var_58=2, var_59=0, var_59_arg_0=0, var_59_arg_1=1, var_62=1, var_62_arg_0=0, var_62_arg_1=0, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_66=0, var_66_arg_0=0, var_66_arg_1=1, var_67=0, var_67_arg_0=0, var_67_arg_1=0, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_72=1, var_72_arg_0=0, var_72_arg_1=31, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_74=0, var_74_arg_0=0, var_74_arg_1=2, var_74_arg_2=0, var_75=3, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_79=1, var_79_arg_0=0, var_79_arg_1=0, var_80=0, var_80_arg_0=0, var_80_arg_1=1, var_83=1, var_83_arg_0=0, var_83_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_87=0, var_87_arg_0=0, var_87_arg_1=1, var_88=0, var_88_arg_0=0, var_88_arg_1=0, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=0, var_93=1, var_93_arg_0=0, var_93_arg_1=31, var_94=0, var_94_arg_0=0, var_94_arg_1=1, var_95=0, var_95_arg_0=0, var_95_arg_1=3, var_95_arg_2=0, var_96=0, var_96_arg_0=0, var_96_arg_1=2, var_97=0, var_97_arg_0=0, var_97_arg_1=0, var_97_arg_2=0] [L381] EXPR var_162_arg_0 ? var_162_arg_1 : var_162_arg_2 VAL [bad_115_arg_0=0, init_117_arg_1=0, init_119_arg_1=0, init_123_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_37_arg_1=0, init_42_arg_1=0, init_47_arg_1=0, init_51_arg_1=0, init_61_arg_1=0, init_65_arg_1=0, init_69_arg_1=0, init_78_arg_1=0, init_82_arg_1=0, init_86_arg_1=0, init_90_arg_1=0, init_99_arg_1=0, input_10=32, input_11=32, input_12=31, input_120=6, input_124=8, input_126=10, input_129=4, input_13=12, input_131=11, input_134=14, input_136=9, input_14=0, input_15=7, input_16=0, input_17=1, input_18=1, input_19=0, input_2=5, input_20=13, input_4=1, input_5=32, input_7=0, input_8=1, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_139_arg_1=31, next_140_arg_1=0, next_141_arg_1=13, next_142_arg_1=32, next_144_arg_1=0, next_145_arg_1=0, next_147_arg_1=0, next_148_arg_1=32, next_149_arg_1=1, next_150_arg_1=1, next_151_arg_1=32, next_159_arg_1=0, next_160_arg_1=1, next_161_arg_1=1, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_100=1, var_100_arg_0=0, var_100_arg_1=0, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_102_arg_1=1, var_103=1, var_103_arg_0=0, var_103_arg_1=1, var_104=0, var_104_arg_0=1, var_104_arg_1=0, var_104_arg_2=0, var_105=0, var_105_arg_0=0, var_105_arg_1=31, var_106=0, var_106_arg_0=0, var_106_arg_1=0, var_106_arg_2=0, var_107=0, var_107_arg_0=0, var_108=1, var_108_arg_0=0, var_108_arg_1=0, var_109=0, var_109_arg_0=0, var_109_arg_1=1, var_110=255, var_110_arg_0=0, var_113=0, var_113_arg_0=255, var_114=0, var_114_arg_0=1, var_114_arg_1=0, var_143=0, var_143_arg_0=0, var_143_arg_1=0, var_143_arg_2=0, var_146=0, var_146_arg_0=0, var_146_arg_1=0, var_146_arg_2=0, var_152=0, var_152_arg_0=0, var_153=0, var_153_arg_0=0, var_154=0, var_154_arg_0=0, var_154_arg_1=0, var_155=0, var_155_arg_0=0, var_156=255, var_156_arg_0=0, var_157=0, var_157_arg_0=0, var_157_arg_1=255, var_158=0, var_158_arg_0=0, var_158_arg_1=0, var_158_arg_2=0, var_162_arg_0=0, var_162_arg_0 ? var_162_arg_1 : var_162_arg_2=0, var_162_arg_1=0, var_162_arg_2=0, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_38=0, var_38_arg_0=0, var_39=1, var_40=0, var_40_arg_0=0, var_40_arg_1=1, var_43=1, var_43_arg_0=0, var_43_arg_1=0, var_44=0, var_44_arg_0=0, var_44_arg_1=1, var_45=0, var_48=0, var_48_arg_0=0, var_48_arg_1=1, var_49=0, var_49_arg_0=0, var_49_arg_1=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=0, var_55=1, var_55_arg_0=0, var_55_arg_1=31, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57=0, var_57_arg_0=0, var_57_arg_1=1, var_57_arg_2=0, var_58=2, var_59=0, var_59_arg_0=0, var_59_arg_1=1, var_62=1, var_62_arg_0=0, var_62_arg_1=0, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_66=0, var_66_arg_0=0, var_66_arg_1=1, var_67=0, var_67_arg_0=0, var_67_arg_1=0, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_72=1, var_72_arg_0=0, var_72_arg_1=31, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_74=0, var_74_arg_0=0, var_74_arg_1=2, var_74_arg_2=0, var_75=3, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_79=1, var_79_arg_0=0, var_79_arg_1=0, var_80=0, var_80_arg_0=0, var_80_arg_1=1, var_83=1, var_83_arg_0=0, var_83_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_87=0, var_87_arg_0=0, var_87_arg_1=1, var_88=0, var_88_arg_0=0, var_88_arg_1=0, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=0, var_93=1, var_93_arg_0=0, var_93_arg_1=31, var_94=0, var_94_arg_0=0, var_94_arg_1=1, var_95=0, var_95_arg_0=0, var_95_arg_1=3, var_95_arg_2=0, var_96=0, var_96_arg_0=0, var_96_arg_1=2, var_97=0, var_97_arg_0=0, var_97_arg_1=0, var_97_arg_2=0] [L381] SORT_6 var_162 = var_162_arg_0 ? var_162_arg_1 : var_162_arg_2; [L382] SORT_6 next_163_arg_1 = var_162; [L383] SORT_1 next_164_arg_1 = input_2; [L384] SORT_3 next_165_arg_1 = input_14; [L385] SORT_3 next_166_arg_1 = input_16; [L387] state_22 = next_139_arg_1 [L388] state_29 = next_140_arg_1 [L389] state_31 = next_141_arg_1 [L390] state_36 = next_142_arg_1 [L391] state_41 = next_144_arg_1 [L392] state_46 = next_145_arg_1 [L393] state_50 = next_147_arg_1 [L394] state_60 = next_148_arg_1 [L395] state_64 = next_149_arg_1 [L396] state_68 = next_150_arg_1 [L397] state_77 = next_151_arg_1 [L398] state_81 = next_159_arg_1 [L399] state_85 = next_160_arg_1 [L400] state_89 = next_161_arg_1 [L401] state_98 = next_163_arg_1 [L402] state_116 = next_164_arg_1 [L403] state_118 = next_165_arg_1 [L404] state_122 = next_166_arg_1 VAL [bad_115_arg_0=0, init_117_arg_1=0, init_119_arg_1=0, init_123_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_37_arg_1=0, init_42_arg_1=0, init_47_arg_1=0, init_51_arg_1=0, init_61_arg_1=0, init_65_arg_1=0, init_69_arg_1=0, init_78_arg_1=0, init_82_arg_1=0, init_86_arg_1=0, init_90_arg_1=0, init_99_arg_1=0, input_10=32, input_11=32, input_12=31, input_120=6, input_124=8, input_126=10, input_129=4, input_13=12, input_131=11, input_134=14, input_136=9, input_14=0, input_15=7, input_16=0, input_17=1, input_18=1, input_19=0, input_2=5, input_20=13, input_4=1, input_5=32, input_7=0, input_8=1, input_9=13, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_139_arg_1=31, next_140_arg_1=0, next_141_arg_1=13, next_142_arg_1=32, next_144_arg_1=0, next_145_arg_1=0, next_147_arg_1=0, next_148_arg_1=32, next_149_arg_1=1, next_150_arg_1=1, next_151_arg_1=32, next_159_arg_1=0, next_160_arg_1=1, next_161_arg_1=1, next_163_arg_1=0, next_164_arg_1=5, next_165_arg_1=0, next_166_arg_1=0, state_116=5, state_118=0, state_122=0, state_22=31, state_29=0, state_31=13, state_36=32, state_41=0, state_46=0, state_50=0, state_60=32, state_64=1, state_68=1, state_77=32, state_81=0, state_85=1, state_89=1, state_98=0, var_100=1, var_100_arg_0=0, var_100_arg_1=0, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_102_arg_1=1, var_103=1, var_103_arg_0=0, var_103_arg_1=1, var_104=0, var_104_arg_0=1, var_104_arg_1=0, var_104_arg_2=0, var_105=0, var_105_arg_0=0, var_105_arg_1=31, var_106=0, var_106_arg_0=0, var_106_arg_1=0, var_106_arg_2=0, var_107=0, var_107_arg_0=0, var_108=1, var_108_arg_0=0, var_108_arg_1=0, var_109=0, var_109_arg_0=0, var_109_arg_1=1, var_110=255, var_110_arg_0=0, var_113=0, var_113_arg_0=255, var_114=0, var_114_arg_0=1, var_114_arg_1=0, var_143=0, var_143_arg_0=0, var_143_arg_1=0, var_143_arg_2=0, var_146=0, var_146_arg_0=0, var_146_arg_1=0, var_146_arg_2=0, var_152=0, var_152_arg_0=0, var_153=0, var_153_arg_0=0, var_154=0, var_154_arg_0=0, var_154_arg_1=0, var_155=0, var_155_arg_0=0, var_156=255, var_156_arg_0=0, var_157=0, var_157_arg_0=0, var_157_arg_1=255, var_158=0, var_158_arg_0=0, var_158_arg_1=0, var_158_arg_2=0, var_162=0, var_162_arg_0=0, var_162_arg_1=0, var_162_arg_2=0, var_21=0, var_25=0, var_25_arg_0=0, var_26=31, var_27=0, var_27_arg_0=0, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_38=0, var_38_arg_0=0, var_39=1, var_40=0, var_40_arg_0=0, var_40_arg_1=1, var_43=1, var_43_arg_0=0, var_43_arg_1=0, var_44=0, var_44_arg_0=0, var_44_arg_1=1, var_45=0, var_48=0, var_48_arg_0=0, var_48_arg_1=1, var_49=0, var_49_arg_0=0, var_49_arg_1=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=0, var_55=1, var_55_arg_0=0, var_55_arg_1=31, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57=0, var_57_arg_0=0, var_57_arg_1=1, var_57_arg_2=0, var_58=2, var_59=0, var_59_arg_0=0, var_59_arg_1=1, var_62=1, var_62_arg_0=0, var_62_arg_1=0, var_63=0, var_63_arg_0=0, var_63_arg_1=1, var_66=0, var_66_arg_0=0, var_66_arg_1=1, var_67=0, var_67_arg_0=0, var_67_arg_1=0, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=0, var_71_arg_0=0, var_71_arg_1=0, var_72=1, var_72_arg_0=0, var_72_arg_1=31, var_73=0, var_73_arg_0=0, var_73_arg_1=1, var_74=0, var_74_arg_0=0, var_74_arg_1=2, var_74_arg_2=0, var_75=3, var_76=0, var_76_arg_0=0, var_76_arg_1=1, var_79=1, var_79_arg_0=0, var_79_arg_1=0, var_80=0, var_80_arg_0=0, var_80_arg_1=1, var_83=1, var_83_arg_0=0, var_83_arg_1=1, var_84=0, var_84_arg_0=0, var_84_arg_1=1, var_87=0, var_87_arg_0=0, var_87_arg_1=1, var_88=0, var_88_arg_0=0, var_88_arg_1=0, var_91=0, var_91_arg_0=0, var_91_arg_1=1, var_92=0, var_92_arg_0=0, var_92_arg_1=0, var_93=1, var_93_arg_0=0, var_93_arg_1=31, var_94=0, var_94_arg_0=0, var_94_arg_1=1, var_95=0, var_95_arg_0=0, var_95_arg_1=3, var_95_arg_2=0, var_96=0, var_96_arg_0=0, var_96_arg_1=2, var_97=0, var_97_arg_0=0, var_97_arg_1=0, var_97_arg_2=0] [L132] input_2 = __VERIFIER_nondet_uchar() [L133] input_4 = __VERIFIER_nondet_uchar() [L134] input_4 = input_4 & mask_SORT_3 [L135] input_5 = __VERIFIER_nondet_uchar() [L136] input_5 = input_5 & mask_SORT_1 [L137] input_7 = __VERIFIER_nondet_uint() [L138] input_8 = __VERIFIER_nondet_uchar() [L139] input_8 = input_8 & mask_SORT_3 [L140] input_9 = __VERIFIER_nondet_uint() [L141] input_10 = __VERIFIER_nondet_uchar() [L142] input_10 = input_10 & mask_SORT_1 [L143] input_11 = __VERIFIER_nondet_uchar() [L144] input_11 = input_11 & mask_SORT_1 [L145] input_12 = __VERIFIER_nondet_uchar() [L146] input_13 = __VERIFIER_nondet_uchar() [L147] input_14 = __VERIFIER_nondet_uchar() [L148] input_14 = input_14 & mask_SORT_3 [L149] input_15 = __VERIFIER_nondet_uchar() [L150] input_16 = __VERIFIER_nondet_uchar() [L151] input_16 = input_16 & mask_SORT_3 [L152] input_17 = __VERIFIER_nondet_uchar() [L153] input_17 = input_17 & mask_SORT_3 [L154] input_18 = __VERIFIER_nondet_uchar() [L155] input_18 = input_18 & mask_SORT_3 [L156] input_19 = __VERIFIER_nondet_uchar() [L157] input_19 = input_19 & mask_SORT_3 [L158] input_20 = __VERIFIER_nondet_uchar() [L159] input_120 = __VERIFIER_nondet_uchar() [L160] input_124 = __VERIFIER_nondet_uchar() [L161] input_126 = __VERIFIER_nondet_uchar() [L162] input_129 = __VERIFIER_nondet_uchar() [L163] input_131 = __VERIFIER_nondet_uchar() [L164] input_134 = __VERIFIER_nondet_uint() [L165] input_136 = __VERIFIER_nondet_uchar() [L168] SORT_1 var_25_arg_0 = state_22; [L169] SORT_24 var_25 = var_25_arg_0 >> 0; [L170] var_25 = var_25 & mask_SORT_24 [L171] SORT_24 var_27_arg_0 = var_25; [L172] SORT_24 var_27_arg_1 = var_26; [L173] SORT_3 var_27 = var_27_arg_0 == var_27_arg_1; [L174] SORT_1 var_54_arg_0 = state_36; [L175] SORT_24 var_54 = var_54_arg_0 >> 0; [L176] var_54 = var_54 & mask_SORT_24 [L177] SORT_24 var_105_arg_0 = var_54; [L178] SORT_24 var_105_arg_1 = var_26; [L179] SORT_3 var_105 = var_105_arg_0 == var_105_arg_1; [L180] SORT_1 var_38_arg_0 = state_36; [L181] SORT_3 var_38 = var_38_arg_0 >> 5; [L182] var_38 = var_38 & mask_SORT_3 [L183] SORT_3 var_76_arg_0 = var_38; [L184] SORT_3 var_76_arg_1 = var_39; [L185] SORT_3 var_76 = var_76_arg_0 == var_76_arg_1; [L186] SORT_1 var_79_arg_0 = state_36; [L187] SORT_1 var_79_arg_1 = state_77; [L188] SORT_3 var_79 = var_79_arg_0 == var_79_arg_1; [L189] SORT_3 var_80_arg_0 = var_76; [L190] SORT_3 var_80_arg_1 = var_79; [L191] SORT_3 var_80 = var_80_arg_0 & var_80_arg_1; [L192] SORT_3 var_83_arg_0 = state_81; [L193] SORT_3 var_83_arg_1 = var_39; [L194] SORT_3 var_83 = var_83_arg_0 != var_83_arg_1; [L195] SORT_3 var_84_arg_0 = var_80; [L196] SORT_3 var_84_arg_1 = var_83; [L197] SORT_3 var_84 = var_84_arg_0 & var_84_arg_1; [L198] SORT_3 var_87_arg_0 = state_85; [L199] SORT_3 var_87_arg_1 = var_39; [L200] SORT_3 var_87 = var_87_arg_0 == var_87_arg_1; [L201] SORT_3 var_88_arg_0 = var_84; [L202] SORT_3 var_88_arg_1 = var_87; [L203] SORT_3 var_88 = var_88_arg_0 & var_88_arg_1; [L204] SORT_3 var_91_arg_0 = state_89; [L205] SORT_3 var_91_arg_1 = var_39; [L206] SORT_3 var_91 = var_91_arg_0 == var_91_arg_1; [L207] SORT_3 var_92_arg_0 = var_88; [L208] SORT_3 var_92_arg_1 = var_91; [L209] SORT_3 var_92 = var_92_arg_0 & var_92_arg_1; [L210] SORT_24 var_93_arg_0 = var_54; [L211] SORT_24 var_93_arg_1 = var_26; [L212] SORT_3 var_93 = var_93_arg_0 != var_93_arg_1; [L213] SORT_3 var_94_arg_0 = var_92; [L214] SORT_3 var_94_arg_1 = var_93; [L215] SORT_3 var_94 = var_94_arg_0 & var_94_arg_1; [L216] var_94 = var_94 & mask_SORT_3 [L217] SORT_3 var_59_arg_0 = var_38; [L218] SORT_3 var_59_arg_1 = var_39; [L219] SORT_3 var_59 = var_59_arg_0 == var_59_arg_1; [L220] SORT_1 var_62_arg_0 = state_36; [L221] SORT_1 var_62_arg_1 = state_60; [L222] SORT_3 var_62 = var_62_arg_0 == var_62_arg_1; [L223] SORT_3 var_63_arg_0 = var_59; [L224] SORT_3 var_63_arg_1 = var_62; [L225] SORT_3 var_63 = var_63_arg_0 & var_63_arg_1; [L226] SORT_3 var_66_arg_0 = state_64; [L227] SORT_3 var_66_arg_1 = var_39; [L228] SORT_3 var_66 = var_66_arg_0 == var_66_arg_1; [L229] SORT_3 var_67_arg_0 = var_63; [L230] SORT_3 var_67_arg_1 = var_66; [L231] SORT_3 var_67 = var_67_arg_0 & var_67_arg_1; [L232] SORT_3 var_70_arg_0 = state_68; [L233] SORT_3 var_70_arg_1 = var_39; [L234] SORT_3 var_70 = var_70_arg_0 == var_70_arg_1; [L235] SORT_3 var_71_arg_0 = var_67; [L236] SORT_3 var_71_arg_1 = var_70; [L237] SORT_3 var_71 = var_71_arg_0 & var_71_arg_1; [L238] SORT_24 var_72_arg_0 = var_54; [L239] SORT_24 var_72_arg_1 = var_26; [L240] SORT_3 var_72 = var_72_arg_0 != var_72_arg_1; [L241] SORT_3 var_73_arg_0 = var_71; [L242] SORT_3 var_73_arg_1 = var_72; [L243] SORT_3 var_73 = var_73_arg_0 & var_73_arg_1; [L244] var_73 = var_73 & mask_SORT_3 [L245] SORT_3 var_40_arg_0 = var_38; [L246] SORT_3 var_40_arg_1 = var_39; [L247] SORT_3 var_40 = var_40_arg_0 == var_40_arg_1; [L248] SORT_1 var_43_arg_0 = state_36; [L249] SORT_1 var_43_arg_1 = state_41; [L250] SORT_3 var_43 = var_43_arg_0 == var_43_arg_1; [L251] SORT_3 var_44_arg_0 = var_40; [L252] SORT_3 var_44_arg_1 = var_43; [L253] SORT_3 var_44 = var_44_arg_0 & var_44_arg_1; [L254] SORT_3 var_48_arg_0 = state_46; [L255] SORT_3 var_48_arg_1 = var_39; [L256] SORT_3 var_48 = var_48_arg_0 == var_48_arg_1; [L257] SORT_3 var_49_arg_0 = var_44; [L258] SORT_3 var_49_arg_1 = var_48; [L259] SORT_3 var_49 = var_49_arg_0 & var_49_arg_1; [L260] SORT_3 var_52_arg_0 = state_50; [L261] SORT_3 var_52_arg_1 = var_39; [L262] SORT_3 var_52 = var_52_arg_0 == var_52_arg_1; [L263] SORT_3 var_53_arg_0 = var_49; [L264] SORT_3 var_53_arg_1 = var_52; [L265] SORT_3 var_53 = var_53_arg_0 & var_53_arg_1; [L266] SORT_24 var_55_arg_0 = var_54; [L267] SORT_24 var_55_arg_1 = var_26; [L268] SORT_3 var_55 = var_55_arg_0 != var_55_arg_1; [L269] SORT_3 var_56_arg_0 = var_53; [L270] SORT_3 var_56_arg_1 = var_55; [L271] SORT_3 var_56 = var_56_arg_0 & var_56_arg_1; [L272] var_56 = var_56 & mask_SORT_3 [L273] SORT_3 var_57_arg_0 = var_56; [L274] SORT_33 var_57_arg_1 = var_35; [L275] SORT_33 var_57_arg_2 = var_34; VAL [bad_115_arg_0=0, init_117_arg_1=0, init_119_arg_1=0, init_123_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_37_arg_1=0, init_42_arg_1=0, init_47_arg_1=0, init_51_arg_1=0, init_61_arg_1=0, init_65_arg_1=0, init_69_arg_1=0, init_78_arg_1=0, init_82_arg_1=0, init_86_arg_1=0, init_90_arg_1=0, init_99_arg_1=0, input_10=0, input_11=0, input_12=19, input_120=18, input_124=26, input_126=21, input_129=15, input_13=24, input_131=22, input_134=27, input_136=20, input_14=0, input_15=23, input_16=0, input_17=0, input_18=0, input_19=0, input_2=17, input_20=25, input_4=0, input_5=0, input_7=15, input_8=0, input_9=25, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_139_arg_1=31, next_140_arg_1=0, next_141_arg_1=13, next_142_arg_1=32, next_144_arg_1=0, next_145_arg_1=0, next_147_arg_1=0, next_148_arg_1=32, next_149_arg_1=1, next_150_arg_1=1, next_151_arg_1=32, next_159_arg_1=0, next_160_arg_1=1, next_161_arg_1=1, next_163_arg_1=0, next_164_arg_1=5, next_165_arg_1=0, next_166_arg_1=0, state_116=5, state_118=0, state_122=0, state_22=31, state_29=0, state_31=13, state_36=32, state_41=0, state_46=0, state_50=0, state_60=32, state_64=1, state_68=1, state_77=32, state_81=0, state_85=1, state_89=1, state_98=0, var_100=1, var_100_arg_0=0, var_100_arg_1=0, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_102_arg_1=1, var_103=1, var_103_arg_0=0, var_103_arg_1=1, var_104=0, var_104_arg_0=1, var_104_arg_1=0, var_104_arg_2=0, var_105=0, var_105_arg_0=0, var_105_arg_1=31, var_106=0, var_106_arg_0=0, var_106_arg_1=0, var_106_arg_2=0, var_107=0, var_107_arg_0=0, var_108=1, var_108_arg_0=0, var_108_arg_1=0, var_109=0, var_109_arg_0=0, var_109_arg_1=1, var_110=255, var_110_arg_0=0, var_113=0, var_113_arg_0=255, var_114=0, var_114_arg_0=1, var_114_arg_1=0, var_143=0, var_143_arg_0=0, var_143_arg_1=0, var_143_arg_2=0, var_146=0, var_146_arg_0=0, var_146_arg_1=0, var_146_arg_2=0, var_152=0, var_152_arg_0=0, var_153=0, var_153_arg_0=0, var_154=0, var_154_arg_0=0, var_154_arg_1=0, var_155=0, var_155_arg_0=0, var_156=255, var_156_arg_0=0, var_157=0, var_157_arg_0=0, var_157_arg_1=255, var_158=0, var_158_arg_0=0, var_158_arg_1=0, var_158_arg_2=0, var_162=0, var_162_arg_0=0, var_162_arg_1=0, var_162_arg_2=0, var_21=0, var_25=31, var_25_arg_0=31, var_26=31, var_27=1, var_27_arg_0=31, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_38=1, var_38_arg_0=32, var_39=1, var_40=1, var_40_arg_0=1, var_40_arg_1=1, var_43=0, var_43_arg_0=32, var_43_arg_1=0, var_44=0, var_44_arg_0=1, var_44_arg_1=0, var_45=0, var_48=0, var_48_arg_0=0, var_48_arg_1=1, var_49=0, var_49_arg_0=0, var_49_arg_1=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=32, var_55=1, var_55_arg_0=0, var_55_arg_1=31, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57=0, var_57_arg_0=0, var_57_arg_1=1, var_57_arg_2=0, var_58=2, var_59=1, var_59_arg_0=1, var_59_arg_1=1, var_62=1, var_62_arg_0=32, var_62_arg_1=32, var_63=1, var_63_arg_0=1, var_63_arg_1=1, var_66=1, var_66_arg_0=1, var_66_arg_1=1, var_67=1, var_67_arg_0=1, var_67_arg_1=1, var_70=1, var_70_arg_0=1, var_70_arg_1=1, var_71=1, var_71_arg_0=1, var_71_arg_1=1, var_72=1, var_72_arg_0=0, var_72_arg_1=31, var_73=1, var_73_arg_0=1, var_73_arg_1=1, var_74=0, var_74_arg_0=0, var_74_arg_1=2, var_74_arg_2=0, var_75=3, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_79=1, var_79_arg_0=32, var_79_arg_1=32, var_80=1, var_80_arg_0=1, var_80_arg_1=1, var_83=1, var_83_arg_0=0, var_83_arg_1=1, var_84=1, var_84_arg_0=1, var_84_arg_1=1, var_87=1, var_87_arg_0=1, var_87_arg_1=1, var_88=1, var_88_arg_0=1, var_88_arg_1=1, var_91=1, var_91_arg_0=1, var_91_arg_1=1, var_92=1, var_92_arg_0=1, var_92_arg_1=1, var_93=1, var_93_arg_0=0, var_93_arg_1=31, var_94=1, var_94_arg_0=1, var_94_arg_1=1, var_95=0, var_95_arg_0=0, var_95_arg_1=3, var_95_arg_2=0, var_96=0, var_96_arg_0=0, var_96_arg_1=2, var_97=0, var_97_arg_0=0, var_97_arg_1=0, var_97_arg_2=0] [L276] EXPR var_57_arg_0 ? var_57_arg_1 : var_57_arg_2 VAL [bad_115_arg_0=0, init_117_arg_1=0, init_119_arg_1=0, init_123_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_37_arg_1=0, init_42_arg_1=0, init_47_arg_1=0, init_51_arg_1=0, init_61_arg_1=0, init_65_arg_1=0, init_69_arg_1=0, init_78_arg_1=0, init_82_arg_1=0, init_86_arg_1=0, init_90_arg_1=0, init_99_arg_1=0, input_10=0, input_11=0, input_12=19, input_120=18, input_124=26, input_126=21, input_129=15, input_13=24, input_131=22, input_134=27, input_136=20, input_14=0, input_15=23, input_16=0, input_17=0, input_18=0, input_19=0, input_2=17, input_20=25, input_4=0, input_5=0, input_7=15, input_8=0, input_9=25, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_139_arg_1=31, next_140_arg_1=0, next_141_arg_1=13, next_142_arg_1=32, next_144_arg_1=0, next_145_arg_1=0, next_147_arg_1=0, next_148_arg_1=32, next_149_arg_1=1, next_150_arg_1=1, next_151_arg_1=32, next_159_arg_1=0, next_160_arg_1=1, next_161_arg_1=1, next_163_arg_1=0, next_164_arg_1=5, next_165_arg_1=0, next_166_arg_1=0, state_116=5, state_118=0, state_122=0, state_22=31, state_29=0, state_31=13, state_36=32, state_41=0, state_46=0, state_50=0, state_60=32, state_64=1, state_68=1, state_77=32, state_81=0, state_85=1, state_89=1, state_98=0, var_100=1, var_100_arg_0=0, var_100_arg_1=0, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_102_arg_1=1, var_103=1, var_103_arg_0=0, var_103_arg_1=1, var_104=0, var_104_arg_0=1, var_104_arg_1=0, var_104_arg_2=0, var_105=0, var_105_arg_0=0, var_105_arg_1=31, var_106=0, var_106_arg_0=0, var_106_arg_1=0, var_106_arg_2=0, var_107=0, var_107_arg_0=0, var_108=1, var_108_arg_0=0, var_108_arg_1=0, var_109=0, var_109_arg_0=0, var_109_arg_1=1, var_110=255, var_110_arg_0=0, var_113=0, var_113_arg_0=255, var_114=0, var_114_arg_0=1, var_114_arg_1=0, var_143=0, var_143_arg_0=0, var_143_arg_1=0, var_143_arg_2=0, var_146=0, var_146_arg_0=0, var_146_arg_1=0, var_146_arg_2=0, var_152=0, var_152_arg_0=0, var_153=0, var_153_arg_0=0, var_154=0, var_154_arg_0=0, var_154_arg_1=0, var_155=0, var_155_arg_0=0, var_156=255, var_156_arg_0=0, var_157=0, var_157_arg_0=0, var_157_arg_1=255, var_158=0, var_158_arg_0=0, var_158_arg_1=0, var_158_arg_2=0, var_162=0, var_162_arg_0=0, var_162_arg_1=0, var_162_arg_2=0, var_21=0, var_25=31, var_25_arg_0=31, var_26=31, var_27=1, var_27_arg_0=31, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_38=1, var_38_arg_0=32, var_39=1, var_40=1, var_40_arg_0=1, var_40_arg_1=1, var_43=0, var_43_arg_0=32, var_43_arg_1=0, var_44=0, var_44_arg_0=1, var_44_arg_1=0, var_45=0, var_48=0, var_48_arg_0=0, var_48_arg_1=1, var_49=0, var_49_arg_0=0, var_49_arg_1=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=32, var_55=1, var_55_arg_0=0, var_55_arg_1=31, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57=0, var_57_arg_0=0, var_57_arg_0 ? var_57_arg_1 : var_57_arg_2=0, var_57_arg_1=1, var_57_arg_2=0, var_58=2, var_59=1, var_59_arg_0=1, var_59_arg_1=1, var_62=1, var_62_arg_0=32, var_62_arg_1=32, var_63=1, var_63_arg_0=1, var_63_arg_1=1, var_66=1, var_66_arg_0=1, var_66_arg_1=1, var_67=1, var_67_arg_0=1, var_67_arg_1=1, var_70=1, var_70_arg_0=1, var_70_arg_1=1, var_71=1, var_71_arg_0=1, var_71_arg_1=1, var_72=1, var_72_arg_0=0, var_72_arg_1=31, var_73=1, var_73_arg_0=1, var_73_arg_1=1, var_74=0, var_74_arg_0=0, var_74_arg_1=2, var_74_arg_2=0, var_75=3, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_79=1, var_79_arg_0=32, var_79_arg_1=32, var_80=1, var_80_arg_0=1, var_80_arg_1=1, var_83=1, var_83_arg_0=0, var_83_arg_1=1, var_84=1, var_84_arg_0=1, var_84_arg_1=1, var_87=1, var_87_arg_0=1, var_87_arg_1=1, var_88=1, var_88_arg_0=1, var_88_arg_1=1, var_91=1, var_91_arg_0=1, var_91_arg_1=1, var_92=1, var_92_arg_0=1, var_92_arg_1=1, var_93=1, var_93_arg_0=0, var_93_arg_1=31, var_94=1, var_94_arg_0=1, var_94_arg_1=1, var_95=0, var_95_arg_0=0, var_95_arg_1=3, var_95_arg_2=0, var_96=0, var_96_arg_0=0, var_96_arg_1=2, var_97=0, var_97_arg_0=0, var_97_arg_1=0, var_97_arg_2=0] [L276] SORT_33 var_57 = var_57_arg_0 ? var_57_arg_1 : var_57_arg_2; [L277] SORT_3 var_74_arg_0 = var_73; [L278] SORT_33 var_74_arg_1 = var_58; [L279] SORT_33 var_74_arg_2 = var_57; VAL [bad_115_arg_0=0, init_117_arg_1=0, init_119_arg_1=0, init_123_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_37_arg_1=0, init_42_arg_1=0, init_47_arg_1=0, init_51_arg_1=0, init_61_arg_1=0, init_65_arg_1=0, init_69_arg_1=0, init_78_arg_1=0, init_82_arg_1=0, init_86_arg_1=0, init_90_arg_1=0, init_99_arg_1=0, input_10=0, input_11=0, input_12=19, input_120=18, input_124=26, input_126=21, input_129=15, input_13=24, input_131=22, input_134=27, input_136=20, input_14=0, input_15=23, input_16=0, input_17=0, input_18=0, input_19=0, input_2=17, input_20=25, input_4=0, input_5=0, input_7=15, input_8=0, input_9=25, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_139_arg_1=31, next_140_arg_1=0, next_141_arg_1=13, next_142_arg_1=32, next_144_arg_1=0, next_145_arg_1=0, next_147_arg_1=0, next_148_arg_1=32, next_149_arg_1=1, next_150_arg_1=1, next_151_arg_1=32, next_159_arg_1=0, next_160_arg_1=1, next_161_arg_1=1, next_163_arg_1=0, next_164_arg_1=5, next_165_arg_1=0, next_166_arg_1=0, state_116=5, state_118=0, state_122=0, state_22=31, state_29=0, state_31=13, state_36=32, state_41=0, state_46=0, state_50=0, state_60=32, state_64=1, state_68=1, state_77=32, state_81=0, state_85=1, state_89=1, state_98=0, var_100=1, var_100_arg_0=0, var_100_arg_1=0, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_102_arg_1=1, var_103=1, var_103_arg_0=0, var_103_arg_1=1, var_104=0, var_104_arg_0=1, var_104_arg_1=0, var_104_arg_2=0, var_105=0, var_105_arg_0=0, var_105_arg_1=31, var_106=0, var_106_arg_0=0, var_106_arg_1=0, var_106_arg_2=0, var_107=0, var_107_arg_0=0, var_108=1, var_108_arg_0=0, var_108_arg_1=0, var_109=0, var_109_arg_0=0, var_109_arg_1=1, var_110=255, var_110_arg_0=0, var_113=0, var_113_arg_0=255, var_114=0, var_114_arg_0=1, var_114_arg_1=0, var_143=0, var_143_arg_0=0, var_143_arg_1=0, var_143_arg_2=0, var_146=0, var_146_arg_0=0, var_146_arg_1=0, var_146_arg_2=0, var_152=0, var_152_arg_0=0, var_153=0, var_153_arg_0=0, var_154=0, var_154_arg_0=0, var_154_arg_1=0, var_155=0, var_155_arg_0=0, var_156=255, var_156_arg_0=0, var_157=0, var_157_arg_0=0, var_157_arg_1=255, var_158=0, var_158_arg_0=0, var_158_arg_1=0, var_158_arg_2=0, var_162=0, var_162_arg_0=0, var_162_arg_1=0, var_162_arg_2=0, var_21=0, var_25=31, var_25_arg_0=31, var_26=31, var_27=1, var_27_arg_0=31, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_38=1, var_38_arg_0=32, var_39=1, var_40=1, var_40_arg_0=1, var_40_arg_1=1, var_43=0, var_43_arg_0=32, var_43_arg_1=0, var_44=0, var_44_arg_0=1, var_44_arg_1=0, var_45=0, var_48=0, var_48_arg_0=0, var_48_arg_1=1, var_49=0, var_49_arg_0=0, var_49_arg_1=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=32, var_55=1, var_55_arg_0=0, var_55_arg_1=31, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57=0, var_57_arg_0=0, var_57_arg_1=1, var_57_arg_2=0, var_58=2, var_59=1, var_59_arg_0=1, var_59_arg_1=1, var_62=1, var_62_arg_0=32, var_62_arg_1=32, var_63=1, var_63_arg_0=1, var_63_arg_1=1, var_66=1, var_66_arg_0=1, var_66_arg_1=1, var_67=1, var_67_arg_0=1, var_67_arg_1=1, var_70=1, var_70_arg_0=1, var_70_arg_1=1, var_71=1, var_71_arg_0=1, var_71_arg_1=1, var_72=1, var_72_arg_0=0, var_72_arg_1=31, var_73=1, var_73_arg_0=1, var_73_arg_1=1, var_74=0, var_74_arg_0=1, var_74_arg_1=2, var_74_arg_2=0, var_75=3, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_79=1, var_79_arg_0=32, var_79_arg_1=32, var_80=1, var_80_arg_0=1, var_80_arg_1=1, var_83=1, var_83_arg_0=0, var_83_arg_1=1, var_84=1, var_84_arg_0=1, var_84_arg_1=1, var_87=1, var_87_arg_0=1, var_87_arg_1=1, var_88=1, var_88_arg_0=1, var_88_arg_1=1, var_91=1, var_91_arg_0=1, var_91_arg_1=1, var_92=1, var_92_arg_0=1, var_92_arg_1=1, var_93=1, var_93_arg_0=0, var_93_arg_1=31, var_94=1, var_94_arg_0=1, var_94_arg_1=1, var_95=0, var_95_arg_0=0, var_95_arg_1=3, var_95_arg_2=0, var_96=0, var_96_arg_0=0, var_96_arg_1=2, var_97=0, var_97_arg_0=0, var_97_arg_1=0, var_97_arg_2=0] [L280] EXPR var_74_arg_0 ? var_74_arg_1 : var_74_arg_2 VAL [bad_115_arg_0=0, init_117_arg_1=0, init_119_arg_1=0, init_123_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_37_arg_1=0, init_42_arg_1=0, init_47_arg_1=0, init_51_arg_1=0, init_61_arg_1=0, init_65_arg_1=0, init_69_arg_1=0, init_78_arg_1=0, init_82_arg_1=0, init_86_arg_1=0, init_90_arg_1=0, init_99_arg_1=0, input_10=0, input_11=0, input_12=19, input_120=18, input_124=26, input_126=21, input_129=15, input_13=24, input_131=22, input_134=27, input_136=20, input_14=0, input_15=23, input_16=0, input_17=0, input_18=0, input_19=0, input_2=17, input_20=25, input_4=0, input_5=0, input_7=15, input_8=0, input_9=25, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_139_arg_1=31, next_140_arg_1=0, next_141_arg_1=13, next_142_arg_1=32, next_144_arg_1=0, next_145_arg_1=0, next_147_arg_1=0, next_148_arg_1=32, next_149_arg_1=1, next_150_arg_1=1, next_151_arg_1=32, next_159_arg_1=0, next_160_arg_1=1, next_161_arg_1=1, next_163_arg_1=0, next_164_arg_1=5, next_165_arg_1=0, next_166_arg_1=0, state_116=5, state_118=0, state_122=0, state_22=31, state_29=0, state_31=13, state_36=32, state_41=0, state_46=0, state_50=0, state_60=32, state_64=1, state_68=1, state_77=32, state_81=0, state_85=1, state_89=1, state_98=0, var_100=1, var_100_arg_0=0, var_100_arg_1=0, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_102_arg_1=1, var_103=1, var_103_arg_0=0, var_103_arg_1=1, var_104=0, var_104_arg_0=1, var_104_arg_1=0, var_104_arg_2=0, var_105=0, var_105_arg_0=0, var_105_arg_1=31, var_106=0, var_106_arg_0=0, var_106_arg_1=0, var_106_arg_2=0, var_107=0, var_107_arg_0=0, var_108=1, var_108_arg_0=0, var_108_arg_1=0, var_109=0, var_109_arg_0=0, var_109_arg_1=1, var_110=255, var_110_arg_0=0, var_113=0, var_113_arg_0=255, var_114=0, var_114_arg_0=1, var_114_arg_1=0, var_143=0, var_143_arg_0=0, var_143_arg_1=0, var_143_arg_2=0, var_146=0, var_146_arg_0=0, var_146_arg_1=0, var_146_arg_2=0, var_152=0, var_152_arg_0=0, var_153=0, var_153_arg_0=0, var_154=0, var_154_arg_0=0, var_154_arg_1=0, var_155=0, var_155_arg_0=0, var_156=255, var_156_arg_0=0, var_157=0, var_157_arg_0=0, var_157_arg_1=255, var_158=0, var_158_arg_0=0, var_158_arg_1=0, var_158_arg_2=0, var_162=0, var_162_arg_0=0, var_162_arg_1=0, var_162_arg_2=0, var_21=0, var_25=31, var_25_arg_0=31, var_26=31, var_27=1, var_27_arg_0=31, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_38=1, var_38_arg_0=32, var_39=1, var_40=1, var_40_arg_0=1, var_40_arg_1=1, var_43=0, var_43_arg_0=32, var_43_arg_1=0, var_44=0, var_44_arg_0=1, var_44_arg_1=0, var_45=0, var_48=0, var_48_arg_0=0, var_48_arg_1=1, var_49=0, var_49_arg_0=0, var_49_arg_1=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=32, var_55=1, var_55_arg_0=0, var_55_arg_1=31, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57=0, var_57_arg_0=0, var_57_arg_1=1, var_57_arg_2=0, var_58=2, var_59=1, var_59_arg_0=1, var_59_arg_1=1, var_62=1, var_62_arg_0=32, var_62_arg_1=32, var_63=1, var_63_arg_0=1, var_63_arg_1=1, var_66=1, var_66_arg_0=1, var_66_arg_1=1, var_67=1, var_67_arg_0=1, var_67_arg_1=1, var_70=1, var_70_arg_0=1, var_70_arg_1=1, var_71=1, var_71_arg_0=1, var_71_arg_1=1, var_72=1, var_72_arg_0=0, var_72_arg_1=31, var_73=1, var_73_arg_0=1, var_73_arg_1=1, var_74=0, var_74_arg_0=1, var_74_arg_0 ? var_74_arg_1 : var_74_arg_2=2, var_74_arg_1=2, var_74_arg_2=0, var_75=3, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_79=1, var_79_arg_0=32, var_79_arg_1=32, var_80=1, var_80_arg_0=1, var_80_arg_1=1, var_83=1, var_83_arg_0=0, var_83_arg_1=1, var_84=1, var_84_arg_0=1, var_84_arg_1=1, var_87=1, var_87_arg_0=1, var_87_arg_1=1, var_88=1, var_88_arg_0=1, var_88_arg_1=1, var_91=1, var_91_arg_0=1, var_91_arg_1=1, var_92=1, var_92_arg_0=1, var_92_arg_1=1, var_93=1, var_93_arg_0=0, var_93_arg_1=31, var_94=1, var_94_arg_0=1, var_94_arg_1=1, var_95=0, var_95_arg_0=0, var_95_arg_1=3, var_95_arg_2=0, var_96=0, var_96_arg_0=0, var_96_arg_1=2, var_97=0, var_97_arg_0=0, var_97_arg_1=0, var_97_arg_2=0] [L280] SORT_33 var_74 = var_74_arg_0 ? var_74_arg_1 : var_74_arg_2; [L281] SORT_3 var_95_arg_0 = var_94; [L282] SORT_33 var_95_arg_1 = var_75; [L283] SORT_33 var_95_arg_2 = var_74; VAL [bad_115_arg_0=0, init_117_arg_1=0, init_119_arg_1=0, init_123_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_37_arg_1=0, init_42_arg_1=0, init_47_arg_1=0, init_51_arg_1=0, init_61_arg_1=0, init_65_arg_1=0, init_69_arg_1=0, init_78_arg_1=0, init_82_arg_1=0, init_86_arg_1=0, init_90_arg_1=0, init_99_arg_1=0, input_10=0, input_11=0, input_12=19, input_120=18, input_124=26, input_126=21, input_129=15, input_13=24, input_131=22, input_134=27, input_136=20, input_14=0, input_15=23, input_16=0, input_17=0, input_18=0, input_19=0, input_2=17, input_20=25, input_4=0, input_5=0, input_7=15, input_8=0, input_9=25, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_139_arg_1=31, next_140_arg_1=0, next_141_arg_1=13, next_142_arg_1=32, next_144_arg_1=0, next_145_arg_1=0, next_147_arg_1=0, next_148_arg_1=32, next_149_arg_1=1, next_150_arg_1=1, next_151_arg_1=32, next_159_arg_1=0, next_160_arg_1=1, next_161_arg_1=1, next_163_arg_1=0, next_164_arg_1=5, next_165_arg_1=0, next_166_arg_1=0, state_116=5, state_118=0, state_122=0, state_22=31, state_29=0, state_31=13, state_36=32, state_41=0, state_46=0, state_50=0, state_60=32, state_64=1, state_68=1, state_77=32, state_81=0, state_85=1, state_89=1, state_98=0, var_100=1, var_100_arg_0=0, var_100_arg_1=0, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_102_arg_1=1, var_103=1, var_103_arg_0=0, var_103_arg_1=1, var_104=0, var_104_arg_0=1, var_104_arg_1=0, var_104_arg_2=0, var_105=0, var_105_arg_0=0, var_105_arg_1=31, var_106=0, var_106_arg_0=0, var_106_arg_1=0, var_106_arg_2=0, var_107=0, var_107_arg_0=0, var_108=1, var_108_arg_0=0, var_108_arg_1=0, var_109=0, var_109_arg_0=0, var_109_arg_1=1, var_110=255, var_110_arg_0=0, var_113=0, var_113_arg_0=255, var_114=0, var_114_arg_0=1, var_114_arg_1=0, var_143=0, var_143_arg_0=0, var_143_arg_1=0, var_143_arg_2=0, var_146=0, var_146_arg_0=0, var_146_arg_1=0, var_146_arg_2=0, var_152=0, var_152_arg_0=0, var_153=0, var_153_arg_0=0, var_154=0, var_154_arg_0=0, var_154_arg_1=0, var_155=0, var_155_arg_0=0, var_156=255, var_156_arg_0=0, var_157=0, var_157_arg_0=0, var_157_arg_1=255, var_158=0, var_158_arg_0=0, var_158_arg_1=0, var_158_arg_2=0, var_162=0, var_162_arg_0=0, var_162_arg_1=0, var_162_arg_2=0, var_21=0, var_25=31, var_25_arg_0=31, var_26=31, var_27=1, var_27_arg_0=31, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_38=1, var_38_arg_0=32, var_39=1, var_40=1, var_40_arg_0=1, var_40_arg_1=1, var_43=0, var_43_arg_0=32, var_43_arg_1=0, var_44=0, var_44_arg_0=1, var_44_arg_1=0, var_45=0, var_48=0, var_48_arg_0=0, var_48_arg_1=1, var_49=0, var_49_arg_0=0, var_49_arg_1=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=32, var_55=1, var_55_arg_0=0, var_55_arg_1=31, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57=0, var_57_arg_0=0, var_57_arg_1=1, var_57_arg_2=0, var_58=2, var_59=1, var_59_arg_0=1, var_59_arg_1=1, var_62=1, var_62_arg_0=32, var_62_arg_1=32, var_63=1, var_63_arg_0=1, var_63_arg_1=1, var_66=1, var_66_arg_0=1, var_66_arg_1=1, var_67=1, var_67_arg_0=1, var_67_arg_1=1, var_70=1, var_70_arg_0=1, var_70_arg_1=1, var_71=1, var_71_arg_0=1, var_71_arg_1=1, var_72=1, var_72_arg_0=0, var_72_arg_1=31, var_73=1, var_73_arg_0=1, var_73_arg_1=1, var_74=2, var_74_arg_0=1, var_74_arg_1=2, var_74_arg_2=0, var_75=3, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_79=1, var_79_arg_0=32, var_79_arg_1=32, var_80=1, var_80_arg_0=1, var_80_arg_1=1, var_83=1, var_83_arg_0=0, var_83_arg_1=1, var_84=1, var_84_arg_0=1, var_84_arg_1=1, var_87=1, var_87_arg_0=1, var_87_arg_1=1, var_88=1, var_88_arg_0=1, var_88_arg_1=1, var_91=1, var_91_arg_0=1, var_91_arg_1=1, var_92=1, var_92_arg_0=1, var_92_arg_1=1, var_93=1, var_93_arg_0=0, var_93_arg_1=31, var_94=1, var_94_arg_0=1, var_94_arg_1=1, var_95=0, var_95_arg_0=1, var_95_arg_1=3, var_95_arg_2=2, var_96=0, var_96_arg_0=0, var_96_arg_1=2, var_97=0, var_97_arg_0=0, var_97_arg_1=0, var_97_arg_2=0] [L284] EXPR var_95_arg_0 ? var_95_arg_1 : var_95_arg_2 VAL [bad_115_arg_0=0, init_117_arg_1=0, init_119_arg_1=0, init_123_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_37_arg_1=0, init_42_arg_1=0, init_47_arg_1=0, init_51_arg_1=0, init_61_arg_1=0, init_65_arg_1=0, init_69_arg_1=0, init_78_arg_1=0, init_82_arg_1=0, init_86_arg_1=0, init_90_arg_1=0, init_99_arg_1=0, input_10=0, input_11=0, input_12=19, input_120=18, input_124=26, input_126=21, input_129=15, input_13=24, input_131=22, input_134=27, input_136=20, input_14=0, input_15=23, input_16=0, input_17=0, input_18=0, input_19=0, input_2=17, input_20=25, input_4=0, input_5=0, input_7=15, input_8=0, input_9=25, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_139_arg_1=31, next_140_arg_1=0, next_141_arg_1=13, next_142_arg_1=32, next_144_arg_1=0, next_145_arg_1=0, next_147_arg_1=0, next_148_arg_1=32, next_149_arg_1=1, next_150_arg_1=1, next_151_arg_1=32, next_159_arg_1=0, next_160_arg_1=1, next_161_arg_1=1, next_163_arg_1=0, next_164_arg_1=5, next_165_arg_1=0, next_166_arg_1=0, state_116=5, state_118=0, state_122=0, state_22=31, state_29=0, state_31=13, state_36=32, state_41=0, state_46=0, state_50=0, state_60=32, state_64=1, state_68=1, state_77=32, state_81=0, state_85=1, state_89=1, state_98=0, var_100=1, var_100_arg_0=0, var_100_arg_1=0, var_101=0, var_101_arg_0=1, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=0, var_102_arg_1=1, var_103=1, var_103_arg_0=0, var_103_arg_1=1, var_104=0, var_104_arg_0=1, var_104_arg_1=0, var_104_arg_2=0, var_105=0, var_105_arg_0=0, var_105_arg_1=31, var_106=0, var_106_arg_0=0, var_106_arg_1=0, var_106_arg_2=0, var_107=0, var_107_arg_0=0, var_108=1, var_108_arg_0=0, var_108_arg_1=0, var_109=0, var_109_arg_0=0, var_109_arg_1=1, var_110=255, var_110_arg_0=0, var_113=0, var_113_arg_0=255, var_114=0, var_114_arg_0=1, var_114_arg_1=0, var_143=0, var_143_arg_0=0, var_143_arg_1=0, var_143_arg_2=0, var_146=0, var_146_arg_0=0, var_146_arg_1=0, var_146_arg_2=0, var_152=0, var_152_arg_0=0, var_153=0, var_153_arg_0=0, var_154=0, var_154_arg_0=0, var_154_arg_1=0, var_155=0, var_155_arg_0=0, var_156=255, var_156_arg_0=0, var_157=0, var_157_arg_0=0, var_157_arg_1=255, var_158=0, var_158_arg_0=0, var_158_arg_1=0, var_158_arg_2=0, var_162=0, var_162_arg_0=0, var_162_arg_1=0, var_162_arg_2=0, var_21=0, var_25=31, var_25_arg_0=31, var_26=31, var_27=1, var_27_arg_0=31, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_38=1, var_38_arg_0=32, var_39=1, var_40=1, var_40_arg_0=1, var_40_arg_1=1, var_43=0, var_43_arg_0=32, var_43_arg_1=0, var_44=0, var_44_arg_0=1, var_44_arg_1=0, var_45=0, var_48=0, var_48_arg_0=0, var_48_arg_1=1, var_49=0, var_49_arg_0=0, var_49_arg_1=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=32, var_55=1, var_55_arg_0=0, var_55_arg_1=31, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57=0, var_57_arg_0=0, var_57_arg_1=1, var_57_arg_2=0, var_58=2, var_59=1, var_59_arg_0=1, var_59_arg_1=1, var_62=1, var_62_arg_0=32, var_62_arg_1=32, var_63=1, var_63_arg_0=1, var_63_arg_1=1, var_66=1, var_66_arg_0=1, var_66_arg_1=1, var_67=1, var_67_arg_0=1, var_67_arg_1=1, var_70=1, var_70_arg_0=1, var_70_arg_1=1, var_71=1, var_71_arg_0=1, var_71_arg_1=1, var_72=1, var_72_arg_0=0, var_72_arg_1=31, var_73=1, var_73_arg_0=1, var_73_arg_1=1, var_74=2, var_74_arg_0=1, var_74_arg_1=2, var_74_arg_2=0, var_75=3, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_79=1, var_79_arg_0=32, var_79_arg_1=32, var_80=1, var_80_arg_0=1, var_80_arg_1=1, var_83=1, var_83_arg_0=0, var_83_arg_1=1, var_84=1, var_84_arg_0=1, var_84_arg_1=1, var_87=1, var_87_arg_0=1, var_87_arg_1=1, var_88=1, var_88_arg_0=1, var_88_arg_1=1, var_91=1, var_91_arg_0=1, var_91_arg_1=1, var_92=1, var_92_arg_0=1, var_92_arg_1=1, var_93=1, var_93_arg_0=0, var_93_arg_1=31, var_94=1, var_94_arg_0=1, var_94_arg_1=1, var_95=0, var_95_arg_0=1, var_95_arg_0 ? var_95_arg_1 : var_95_arg_2=3, var_95_arg_1=3, var_95_arg_2=2, var_96=0, var_96_arg_0=0, var_96_arg_1=2, var_97=0, var_97_arg_0=0, var_97_arg_1=0, var_97_arg_2=0] [L284] SORT_33 var_95 = var_95_arg_0 ? var_95_arg_1 : var_95_arg_2; [L285] var_95 = var_95 & mask_SORT_33 [L286] SORT_33 var_102_arg_0 = var_95; [L287] SORT_33 var_102_arg_1 = var_35; [L288] SORT_3 var_102 = var_102_arg_0 == var_102_arg_1; [L289] SORT_33 var_100_arg_0 = var_95; [L290] SORT_33 var_100_arg_1 = var_34; [L291] SORT_3 var_100 = var_100_arg_0 == var_100_arg_1; [L292] SORT_3 var_103_arg_0 = var_102; [L293] SORT_3 var_103_arg_1 = var_100; [L294] SORT_3 var_103 = var_103_arg_0 | var_103_arg_1; [L295] var_103 = var_103 & mask_SORT_3 [L296] SORT_3 var_101_arg_0 = var_100; [L297] SORT_6 var_101_arg_1 = var_28; [L298] SORT_6 var_101_arg_2 = state_98; VAL [bad_115_arg_0=0, init_117_arg_1=0, init_119_arg_1=0, init_123_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_37_arg_1=0, init_42_arg_1=0, init_47_arg_1=0, init_51_arg_1=0, init_61_arg_1=0, init_65_arg_1=0, init_69_arg_1=0, init_78_arg_1=0, init_82_arg_1=0, init_86_arg_1=0, init_90_arg_1=0, init_99_arg_1=0, input_10=0, input_11=0, input_12=19, input_120=18, input_124=26, input_126=21, input_129=15, input_13=24, input_131=22, input_134=27, input_136=20, input_14=0, input_15=23, input_16=0, input_17=0, input_18=0, input_19=0, input_2=17, input_20=25, input_4=0, input_5=0, input_7=15, input_8=0, input_9=25, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_139_arg_1=31, next_140_arg_1=0, next_141_arg_1=13, next_142_arg_1=32, next_144_arg_1=0, next_145_arg_1=0, next_147_arg_1=0, next_148_arg_1=32, next_149_arg_1=1, next_150_arg_1=1, next_151_arg_1=32, next_159_arg_1=0, next_160_arg_1=1, next_161_arg_1=1, next_163_arg_1=0, next_164_arg_1=5, next_165_arg_1=0, next_166_arg_1=0, state_116=5, state_118=0, state_122=0, state_22=31, state_29=0, state_31=13, state_36=32, state_41=0, state_46=0, state_50=0, state_60=32, state_64=1, state_68=1, state_77=32, state_81=0, state_85=1, state_89=1, state_98=0, var_100=0, var_100_arg_0=3, var_100_arg_1=0, var_101=0, var_101_arg_0=0, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=3, var_102_arg_1=1, var_103=0, var_103_arg_0=0, var_103_arg_1=0, var_104=0, var_104_arg_0=1, var_104_arg_1=0, var_104_arg_2=0, var_105=0, var_105_arg_0=0, var_105_arg_1=31, var_106=0, var_106_arg_0=0, var_106_arg_1=0, var_106_arg_2=0, var_107=0, var_107_arg_0=0, var_108=1, var_108_arg_0=0, var_108_arg_1=0, var_109=0, var_109_arg_0=0, var_109_arg_1=1, var_110=255, var_110_arg_0=0, var_113=0, var_113_arg_0=255, var_114=0, var_114_arg_0=1, var_114_arg_1=0, var_143=0, var_143_arg_0=0, var_143_arg_1=0, var_143_arg_2=0, var_146=0, var_146_arg_0=0, var_146_arg_1=0, var_146_arg_2=0, var_152=0, var_152_arg_0=0, var_153=0, var_153_arg_0=0, var_154=0, var_154_arg_0=0, var_154_arg_1=0, var_155=0, var_155_arg_0=0, var_156=255, var_156_arg_0=0, var_157=0, var_157_arg_0=0, var_157_arg_1=255, var_158=0, var_158_arg_0=0, var_158_arg_1=0, var_158_arg_2=0, var_162=0, var_162_arg_0=0, var_162_arg_1=0, var_162_arg_2=0, var_21=0, var_25=31, var_25_arg_0=31, var_26=31, var_27=1, var_27_arg_0=31, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_38=1, var_38_arg_0=32, var_39=1, var_40=1, var_40_arg_0=1, var_40_arg_1=1, var_43=0, var_43_arg_0=32, var_43_arg_1=0, var_44=0, var_44_arg_0=1, var_44_arg_1=0, var_45=0, var_48=0, var_48_arg_0=0, var_48_arg_1=1, var_49=0, var_49_arg_0=0, var_49_arg_1=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=32, var_55=1, var_55_arg_0=0, var_55_arg_1=31, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57=0, var_57_arg_0=0, var_57_arg_1=1, var_57_arg_2=0, var_58=2, var_59=1, var_59_arg_0=1, var_59_arg_1=1, var_62=1, var_62_arg_0=32, var_62_arg_1=32, var_63=1, var_63_arg_0=1, var_63_arg_1=1, var_66=1, var_66_arg_0=1, var_66_arg_1=1, var_67=1, var_67_arg_0=1, var_67_arg_1=1, var_70=1, var_70_arg_0=1, var_70_arg_1=1, var_71=1, var_71_arg_0=1, var_71_arg_1=1, var_72=1, var_72_arg_0=0, var_72_arg_1=31, var_73=1, var_73_arg_0=1, var_73_arg_1=1, var_74=2, var_74_arg_0=1, var_74_arg_1=2, var_74_arg_2=0, var_75=3, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_79=1, var_79_arg_0=32, var_79_arg_1=32, var_80=1, var_80_arg_0=1, var_80_arg_1=1, var_83=1, var_83_arg_0=0, var_83_arg_1=1, var_84=1, var_84_arg_0=1, var_84_arg_1=1, var_87=1, var_87_arg_0=1, var_87_arg_1=1, var_88=1, var_88_arg_0=1, var_88_arg_1=1, var_91=1, var_91_arg_0=1, var_91_arg_1=1, var_92=1, var_92_arg_0=1, var_92_arg_1=1, var_93=1, var_93_arg_0=0, var_93_arg_1=31, var_94=1, var_94_arg_0=1, var_94_arg_1=1, var_95=3, var_95_arg_0=1, var_95_arg_1=3, var_95_arg_2=2, var_96=0, var_96_arg_0=0, var_96_arg_1=2, var_97=0, var_97_arg_0=0, var_97_arg_1=0, var_97_arg_2=0] [L299] EXPR var_101_arg_0 ? var_101_arg_1 : var_101_arg_2 VAL [bad_115_arg_0=0, init_117_arg_1=0, init_119_arg_1=0, init_123_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_37_arg_1=0, init_42_arg_1=0, init_47_arg_1=0, init_51_arg_1=0, init_61_arg_1=0, init_65_arg_1=0, init_69_arg_1=0, init_78_arg_1=0, init_82_arg_1=0, init_86_arg_1=0, init_90_arg_1=0, init_99_arg_1=0, input_10=0, input_11=0, input_12=19, input_120=18, input_124=26, input_126=21, input_129=15, input_13=24, input_131=22, input_134=27, input_136=20, input_14=0, input_15=23, input_16=0, input_17=0, input_18=0, input_19=0, input_2=17, input_20=25, input_4=0, input_5=0, input_7=15, input_8=0, input_9=25, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_139_arg_1=31, next_140_arg_1=0, next_141_arg_1=13, next_142_arg_1=32, next_144_arg_1=0, next_145_arg_1=0, next_147_arg_1=0, next_148_arg_1=32, next_149_arg_1=1, next_150_arg_1=1, next_151_arg_1=32, next_159_arg_1=0, next_160_arg_1=1, next_161_arg_1=1, next_163_arg_1=0, next_164_arg_1=5, next_165_arg_1=0, next_166_arg_1=0, state_116=5, state_118=0, state_122=0, state_22=31, state_29=0, state_31=13, state_36=32, state_41=0, state_46=0, state_50=0, state_60=32, state_64=1, state_68=1, state_77=32, state_81=0, state_85=1, state_89=1, state_98=0, var_100=0, var_100_arg_0=3, var_100_arg_1=0, var_101=0, var_101_arg_0=0, var_101_arg_0 ? var_101_arg_1 : var_101_arg_2=0, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=3, var_102_arg_1=1, var_103=0, var_103_arg_0=0, var_103_arg_1=0, var_104=0, var_104_arg_0=1, var_104_arg_1=0, var_104_arg_2=0, var_105=0, var_105_arg_0=0, var_105_arg_1=31, var_106=0, var_106_arg_0=0, var_106_arg_1=0, var_106_arg_2=0, var_107=0, var_107_arg_0=0, var_108=1, var_108_arg_0=0, var_108_arg_1=0, var_109=0, var_109_arg_0=0, var_109_arg_1=1, var_110=255, var_110_arg_0=0, var_113=0, var_113_arg_0=255, var_114=0, var_114_arg_0=1, var_114_arg_1=0, var_143=0, var_143_arg_0=0, var_143_arg_1=0, var_143_arg_2=0, var_146=0, var_146_arg_0=0, var_146_arg_1=0, var_146_arg_2=0, var_152=0, var_152_arg_0=0, var_153=0, var_153_arg_0=0, var_154=0, var_154_arg_0=0, var_154_arg_1=0, var_155=0, var_155_arg_0=0, var_156=255, var_156_arg_0=0, var_157=0, var_157_arg_0=0, var_157_arg_1=255, var_158=0, var_158_arg_0=0, var_158_arg_1=0, var_158_arg_2=0, var_162=0, var_162_arg_0=0, var_162_arg_1=0, var_162_arg_2=0, var_21=0, var_25=31, var_25_arg_0=31, var_26=31, var_27=1, var_27_arg_0=31, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_38=1, var_38_arg_0=32, var_39=1, var_40=1, var_40_arg_0=1, var_40_arg_1=1, var_43=0, var_43_arg_0=32, var_43_arg_1=0, var_44=0, var_44_arg_0=1, var_44_arg_1=0, var_45=0, var_48=0, var_48_arg_0=0, var_48_arg_1=1, var_49=0, var_49_arg_0=0, var_49_arg_1=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=32, var_55=1, var_55_arg_0=0, var_55_arg_1=31, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57=0, var_57_arg_0=0, var_57_arg_1=1, var_57_arg_2=0, var_58=2, var_59=1, var_59_arg_0=1, var_59_arg_1=1, var_62=1, var_62_arg_0=32, var_62_arg_1=32, var_63=1, var_63_arg_0=1, var_63_arg_1=1, var_66=1, var_66_arg_0=1, var_66_arg_1=1, var_67=1, var_67_arg_0=1, var_67_arg_1=1, var_70=1, var_70_arg_0=1, var_70_arg_1=1, var_71=1, var_71_arg_0=1, var_71_arg_1=1, var_72=1, var_72_arg_0=0, var_72_arg_1=31, var_73=1, var_73_arg_0=1, var_73_arg_1=1, var_74=2, var_74_arg_0=1, var_74_arg_1=2, var_74_arg_2=0, var_75=3, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_79=1, var_79_arg_0=32, var_79_arg_1=32, var_80=1, var_80_arg_0=1, var_80_arg_1=1, var_83=1, var_83_arg_0=0, var_83_arg_1=1, var_84=1, var_84_arg_0=1, var_84_arg_1=1, var_87=1, var_87_arg_0=1, var_87_arg_1=1, var_88=1, var_88_arg_0=1, var_88_arg_1=1, var_91=1, var_91_arg_0=1, var_91_arg_1=1, var_92=1, var_92_arg_0=1, var_92_arg_1=1, var_93=1, var_93_arg_0=0, var_93_arg_1=31, var_94=1, var_94_arg_0=1, var_94_arg_1=1, var_95=3, var_95_arg_0=1, var_95_arg_1=3, var_95_arg_2=2, var_96=0, var_96_arg_0=0, var_96_arg_1=2, var_97=0, var_97_arg_0=0, var_97_arg_1=0, var_97_arg_2=0] [L299] SORT_6 var_101 = var_101_arg_0 ? var_101_arg_1 : var_101_arg_2; [L300] SORT_33 var_96_arg_0 = var_95; [L301] SORT_33 var_96_arg_1 = var_58; [L302] SORT_3 var_96 = var_96_arg_0 == var_96_arg_1; [L303] SORT_3 var_97_arg_0 = var_96; [L304] SORT_6 var_97_arg_1 = state_31; [L305] SORT_6 var_97_arg_2 = state_29; VAL [bad_115_arg_0=0, init_117_arg_1=0, init_119_arg_1=0, init_123_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_37_arg_1=0, init_42_arg_1=0, init_47_arg_1=0, init_51_arg_1=0, init_61_arg_1=0, init_65_arg_1=0, init_69_arg_1=0, init_78_arg_1=0, init_82_arg_1=0, init_86_arg_1=0, init_90_arg_1=0, init_99_arg_1=0, input_10=0, input_11=0, input_12=19, input_120=18, input_124=26, input_126=21, input_129=15, input_13=24, input_131=22, input_134=27, input_136=20, input_14=0, input_15=23, input_16=0, input_17=0, input_18=0, input_19=0, input_2=17, input_20=25, input_4=0, input_5=0, input_7=15, input_8=0, input_9=25, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_139_arg_1=31, next_140_arg_1=0, next_141_arg_1=13, next_142_arg_1=32, next_144_arg_1=0, next_145_arg_1=0, next_147_arg_1=0, next_148_arg_1=32, next_149_arg_1=1, next_150_arg_1=1, next_151_arg_1=32, next_159_arg_1=0, next_160_arg_1=1, next_161_arg_1=1, next_163_arg_1=0, next_164_arg_1=5, next_165_arg_1=0, next_166_arg_1=0, state_116=5, state_118=0, state_122=0, state_22=31, state_29=0, state_31=13, state_36=32, state_41=0, state_46=0, state_50=0, state_60=32, state_64=1, state_68=1, state_77=32, state_81=0, state_85=1, state_89=1, state_98=0, var_100=0, var_100_arg_0=3, var_100_arg_1=0, var_101=0, var_101_arg_0=0, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=3, var_102_arg_1=1, var_103=0, var_103_arg_0=0, var_103_arg_1=0, var_104=0, var_104_arg_0=1, var_104_arg_1=0, var_104_arg_2=0, var_105=0, var_105_arg_0=0, var_105_arg_1=31, var_106=0, var_106_arg_0=0, var_106_arg_1=0, var_106_arg_2=0, var_107=0, var_107_arg_0=0, var_108=1, var_108_arg_0=0, var_108_arg_1=0, var_109=0, var_109_arg_0=0, var_109_arg_1=1, var_110=255, var_110_arg_0=0, var_113=0, var_113_arg_0=255, var_114=0, var_114_arg_0=1, var_114_arg_1=0, var_143=0, var_143_arg_0=0, var_143_arg_1=0, var_143_arg_2=0, var_146=0, var_146_arg_0=0, var_146_arg_1=0, var_146_arg_2=0, var_152=0, var_152_arg_0=0, var_153=0, var_153_arg_0=0, var_154=0, var_154_arg_0=0, var_154_arg_1=0, var_155=0, var_155_arg_0=0, var_156=255, var_156_arg_0=0, var_157=0, var_157_arg_0=0, var_157_arg_1=255, var_158=0, var_158_arg_0=0, var_158_arg_1=0, var_158_arg_2=0, var_162=0, var_162_arg_0=0, var_162_arg_1=0, var_162_arg_2=0, var_21=0, var_25=31, var_25_arg_0=31, var_26=31, var_27=1, var_27_arg_0=31, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_38=1, var_38_arg_0=32, var_39=1, var_40=1, var_40_arg_0=1, var_40_arg_1=1, var_43=0, var_43_arg_0=32, var_43_arg_1=0, var_44=0, var_44_arg_0=1, var_44_arg_1=0, var_45=0, var_48=0, var_48_arg_0=0, var_48_arg_1=1, var_49=0, var_49_arg_0=0, var_49_arg_1=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=32, var_55=1, var_55_arg_0=0, var_55_arg_1=31, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57=0, var_57_arg_0=0, var_57_arg_1=1, var_57_arg_2=0, var_58=2, var_59=1, var_59_arg_0=1, var_59_arg_1=1, var_62=1, var_62_arg_0=32, var_62_arg_1=32, var_63=1, var_63_arg_0=1, var_63_arg_1=1, var_66=1, var_66_arg_0=1, var_66_arg_1=1, var_67=1, var_67_arg_0=1, var_67_arg_1=1, var_70=1, var_70_arg_0=1, var_70_arg_1=1, var_71=1, var_71_arg_0=1, var_71_arg_1=1, var_72=1, var_72_arg_0=0, var_72_arg_1=31, var_73=1, var_73_arg_0=1, var_73_arg_1=1, var_74=2, var_74_arg_0=1, var_74_arg_1=2, var_74_arg_2=0, var_75=3, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_79=1, var_79_arg_0=32, var_79_arg_1=32, var_80=1, var_80_arg_0=1, var_80_arg_1=1, var_83=1, var_83_arg_0=0, var_83_arg_1=1, var_84=1, var_84_arg_0=1, var_84_arg_1=1, var_87=1, var_87_arg_0=1, var_87_arg_1=1, var_88=1, var_88_arg_0=1, var_88_arg_1=1, var_91=1, var_91_arg_0=1, var_91_arg_1=1, var_92=1, var_92_arg_0=1, var_92_arg_1=1, var_93=1, var_93_arg_0=0, var_93_arg_1=31, var_94=1, var_94_arg_0=1, var_94_arg_1=1, var_95=3, var_95_arg_0=1, var_95_arg_1=3, var_95_arg_2=2, var_96=0, var_96_arg_0=3, var_96_arg_1=2, var_97=0, var_97_arg_0=0, var_97_arg_1=13, var_97_arg_2=0] [L306] EXPR var_97_arg_0 ? var_97_arg_1 : var_97_arg_2 VAL [bad_115_arg_0=0, init_117_arg_1=0, init_119_arg_1=0, init_123_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_37_arg_1=0, init_42_arg_1=0, init_47_arg_1=0, init_51_arg_1=0, init_61_arg_1=0, init_65_arg_1=0, init_69_arg_1=0, init_78_arg_1=0, init_82_arg_1=0, init_86_arg_1=0, init_90_arg_1=0, init_99_arg_1=0, input_10=0, input_11=0, input_12=19, input_120=18, input_124=26, input_126=21, input_129=15, input_13=24, input_131=22, input_134=27, input_136=20, input_14=0, input_15=23, input_16=0, input_17=0, input_18=0, input_19=0, input_2=17, input_20=25, input_4=0, input_5=0, input_7=15, input_8=0, input_9=25, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_139_arg_1=31, next_140_arg_1=0, next_141_arg_1=13, next_142_arg_1=32, next_144_arg_1=0, next_145_arg_1=0, next_147_arg_1=0, next_148_arg_1=32, next_149_arg_1=1, next_150_arg_1=1, next_151_arg_1=32, next_159_arg_1=0, next_160_arg_1=1, next_161_arg_1=1, next_163_arg_1=0, next_164_arg_1=5, next_165_arg_1=0, next_166_arg_1=0, state_116=5, state_118=0, state_122=0, state_22=31, state_29=0, state_31=13, state_36=32, state_41=0, state_46=0, state_50=0, state_60=32, state_64=1, state_68=1, state_77=32, state_81=0, state_85=1, state_89=1, state_98=0, var_100=0, var_100_arg_0=3, var_100_arg_1=0, var_101=0, var_101_arg_0=0, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=3, var_102_arg_1=1, var_103=0, var_103_arg_0=0, var_103_arg_1=0, var_104=0, var_104_arg_0=1, var_104_arg_1=0, var_104_arg_2=0, var_105=0, var_105_arg_0=0, var_105_arg_1=31, var_106=0, var_106_arg_0=0, var_106_arg_1=0, var_106_arg_2=0, var_107=0, var_107_arg_0=0, var_108=1, var_108_arg_0=0, var_108_arg_1=0, var_109=0, var_109_arg_0=0, var_109_arg_1=1, var_110=255, var_110_arg_0=0, var_113=0, var_113_arg_0=255, var_114=0, var_114_arg_0=1, var_114_arg_1=0, var_143=0, var_143_arg_0=0, var_143_arg_1=0, var_143_arg_2=0, var_146=0, var_146_arg_0=0, var_146_arg_1=0, var_146_arg_2=0, var_152=0, var_152_arg_0=0, var_153=0, var_153_arg_0=0, var_154=0, var_154_arg_0=0, var_154_arg_1=0, var_155=0, var_155_arg_0=0, var_156=255, var_156_arg_0=0, var_157=0, var_157_arg_0=0, var_157_arg_1=255, var_158=0, var_158_arg_0=0, var_158_arg_1=0, var_158_arg_2=0, var_162=0, var_162_arg_0=0, var_162_arg_1=0, var_162_arg_2=0, var_21=0, var_25=31, var_25_arg_0=31, var_26=31, var_27=1, var_27_arg_0=31, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_38=1, var_38_arg_0=32, var_39=1, var_40=1, var_40_arg_0=1, var_40_arg_1=1, var_43=0, var_43_arg_0=32, var_43_arg_1=0, var_44=0, var_44_arg_0=1, var_44_arg_1=0, var_45=0, var_48=0, var_48_arg_0=0, var_48_arg_1=1, var_49=0, var_49_arg_0=0, var_49_arg_1=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=32, var_55=1, var_55_arg_0=0, var_55_arg_1=31, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57=0, var_57_arg_0=0, var_57_arg_1=1, var_57_arg_2=0, var_58=2, var_59=1, var_59_arg_0=1, var_59_arg_1=1, var_62=1, var_62_arg_0=32, var_62_arg_1=32, var_63=1, var_63_arg_0=1, var_63_arg_1=1, var_66=1, var_66_arg_0=1, var_66_arg_1=1, var_67=1, var_67_arg_0=1, var_67_arg_1=1, var_70=1, var_70_arg_0=1, var_70_arg_1=1, var_71=1, var_71_arg_0=1, var_71_arg_1=1, var_72=1, var_72_arg_0=0, var_72_arg_1=31, var_73=1, var_73_arg_0=1, var_73_arg_1=1, var_74=2, var_74_arg_0=1, var_74_arg_1=2, var_74_arg_2=0, var_75=3, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_79=1, var_79_arg_0=32, var_79_arg_1=32, var_80=1, var_80_arg_0=1, var_80_arg_1=1, var_83=1, var_83_arg_0=0, var_83_arg_1=1, var_84=1, var_84_arg_0=1, var_84_arg_1=1, var_87=1, var_87_arg_0=1, var_87_arg_1=1, var_88=1, var_88_arg_0=1, var_88_arg_1=1, var_91=1, var_91_arg_0=1, var_91_arg_1=1, var_92=1, var_92_arg_0=1, var_92_arg_1=1, var_93=1, var_93_arg_0=0, var_93_arg_1=31, var_94=1, var_94_arg_0=1, var_94_arg_1=1, var_95=3, var_95_arg_0=1, var_95_arg_1=3, var_95_arg_2=2, var_96=0, var_96_arg_0=3, var_96_arg_1=2, var_97=0, var_97_arg_0=0, var_97_arg_0 ? var_97_arg_1 : var_97_arg_2=0, var_97_arg_1=13, var_97_arg_2=0] [L306] SORT_6 var_97 = var_97_arg_0 ? var_97_arg_1 : var_97_arg_2; [L307] SORT_3 var_104_arg_0 = var_103; [L308] SORT_6 var_104_arg_1 = var_101; [L309] SORT_6 var_104_arg_2 = var_97; VAL [bad_115_arg_0=0, init_117_arg_1=0, init_119_arg_1=0, init_123_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_37_arg_1=0, init_42_arg_1=0, init_47_arg_1=0, init_51_arg_1=0, init_61_arg_1=0, init_65_arg_1=0, init_69_arg_1=0, init_78_arg_1=0, init_82_arg_1=0, init_86_arg_1=0, init_90_arg_1=0, init_99_arg_1=0, input_10=0, input_11=0, input_12=19, input_120=18, input_124=26, input_126=21, input_129=15, input_13=24, input_131=22, input_134=27, input_136=20, input_14=0, input_15=23, input_16=0, input_17=0, input_18=0, input_19=0, input_2=17, input_20=25, input_4=0, input_5=0, input_7=15, input_8=0, input_9=25, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_139_arg_1=31, next_140_arg_1=0, next_141_arg_1=13, next_142_arg_1=32, next_144_arg_1=0, next_145_arg_1=0, next_147_arg_1=0, next_148_arg_1=32, next_149_arg_1=1, next_150_arg_1=1, next_151_arg_1=32, next_159_arg_1=0, next_160_arg_1=1, next_161_arg_1=1, next_163_arg_1=0, next_164_arg_1=5, next_165_arg_1=0, next_166_arg_1=0, state_116=5, state_118=0, state_122=0, state_22=31, state_29=0, state_31=13, state_36=32, state_41=0, state_46=0, state_50=0, state_60=32, state_64=1, state_68=1, state_77=32, state_81=0, state_85=1, state_89=1, state_98=0, var_100=0, var_100_arg_0=3, var_100_arg_1=0, var_101=0, var_101_arg_0=0, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=3, var_102_arg_1=1, var_103=0, var_103_arg_0=0, var_103_arg_1=0, var_104=0, var_104_arg_0=0, var_104_arg_1=0, var_104_arg_2=0, var_105=0, var_105_arg_0=0, var_105_arg_1=31, var_106=0, var_106_arg_0=0, var_106_arg_1=0, var_106_arg_2=0, var_107=0, var_107_arg_0=0, var_108=1, var_108_arg_0=0, var_108_arg_1=0, var_109=0, var_109_arg_0=0, var_109_arg_1=1, var_110=255, var_110_arg_0=0, var_113=0, var_113_arg_0=255, var_114=0, var_114_arg_0=1, var_114_arg_1=0, var_143=0, var_143_arg_0=0, var_143_arg_1=0, var_143_arg_2=0, var_146=0, var_146_arg_0=0, var_146_arg_1=0, var_146_arg_2=0, var_152=0, var_152_arg_0=0, var_153=0, var_153_arg_0=0, var_154=0, var_154_arg_0=0, var_154_arg_1=0, var_155=0, var_155_arg_0=0, var_156=255, var_156_arg_0=0, var_157=0, var_157_arg_0=0, var_157_arg_1=255, var_158=0, var_158_arg_0=0, var_158_arg_1=0, var_158_arg_2=0, var_162=0, var_162_arg_0=0, var_162_arg_1=0, var_162_arg_2=0, var_21=0, var_25=31, var_25_arg_0=31, var_26=31, var_27=1, var_27_arg_0=31, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_38=1, var_38_arg_0=32, var_39=1, var_40=1, var_40_arg_0=1, var_40_arg_1=1, var_43=0, var_43_arg_0=32, var_43_arg_1=0, var_44=0, var_44_arg_0=1, var_44_arg_1=0, var_45=0, var_48=0, var_48_arg_0=0, var_48_arg_1=1, var_49=0, var_49_arg_0=0, var_49_arg_1=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=32, var_55=1, var_55_arg_0=0, var_55_arg_1=31, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57=0, var_57_arg_0=0, var_57_arg_1=1, var_57_arg_2=0, var_58=2, var_59=1, var_59_arg_0=1, var_59_arg_1=1, var_62=1, var_62_arg_0=32, var_62_arg_1=32, var_63=1, var_63_arg_0=1, var_63_arg_1=1, var_66=1, var_66_arg_0=1, var_66_arg_1=1, var_67=1, var_67_arg_0=1, var_67_arg_1=1, var_70=1, var_70_arg_0=1, var_70_arg_1=1, var_71=1, var_71_arg_0=1, var_71_arg_1=1, var_72=1, var_72_arg_0=0, var_72_arg_1=31, var_73=1, var_73_arg_0=1, var_73_arg_1=1, var_74=2, var_74_arg_0=1, var_74_arg_1=2, var_74_arg_2=0, var_75=3, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_79=1, var_79_arg_0=32, var_79_arg_1=32, var_80=1, var_80_arg_0=1, var_80_arg_1=1, var_83=1, var_83_arg_0=0, var_83_arg_1=1, var_84=1, var_84_arg_0=1, var_84_arg_1=1, var_87=1, var_87_arg_0=1, var_87_arg_1=1, var_88=1, var_88_arg_0=1, var_88_arg_1=1, var_91=1, var_91_arg_0=1, var_91_arg_1=1, var_92=1, var_92_arg_0=1, var_92_arg_1=1, var_93=1, var_93_arg_0=0, var_93_arg_1=31, var_94=1, var_94_arg_0=1, var_94_arg_1=1, var_95=3, var_95_arg_0=1, var_95_arg_1=3, var_95_arg_2=2, var_96=0, var_96_arg_0=3, var_96_arg_1=2, var_97=0, var_97_arg_0=0, var_97_arg_1=13, var_97_arg_2=0] [L310] EXPR var_104_arg_0 ? var_104_arg_1 : var_104_arg_2 VAL [bad_115_arg_0=0, init_117_arg_1=0, init_119_arg_1=0, init_123_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_37_arg_1=0, init_42_arg_1=0, init_47_arg_1=0, init_51_arg_1=0, init_61_arg_1=0, init_65_arg_1=0, init_69_arg_1=0, init_78_arg_1=0, init_82_arg_1=0, init_86_arg_1=0, init_90_arg_1=0, init_99_arg_1=0, input_10=0, input_11=0, input_12=19, input_120=18, input_124=26, input_126=21, input_129=15, input_13=24, input_131=22, input_134=27, input_136=20, input_14=0, input_15=23, input_16=0, input_17=0, input_18=0, input_19=0, input_2=17, input_20=25, input_4=0, input_5=0, input_7=15, input_8=0, input_9=25, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_139_arg_1=31, next_140_arg_1=0, next_141_arg_1=13, next_142_arg_1=32, next_144_arg_1=0, next_145_arg_1=0, next_147_arg_1=0, next_148_arg_1=32, next_149_arg_1=1, next_150_arg_1=1, next_151_arg_1=32, next_159_arg_1=0, next_160_arg_1=1, next_161_arg_1=1, next_163_arg_1=0, next_164_arg_1=5, next_165_arg_1=0, next_166_arg_1=0, state_116=5, state_118=0, state_122=0, state_22=31, state_29=0, state_31=13, state_36=32, state_41=0, state_46=0, state_50=0, state_60=32, state_64=1, state_68=1, state_77=32, state_81=0, state_85=1, state_89=1, state_98=0, var_100=0, var_100_arg_0=3, var_100_arg_1=0, var_101=0, var_101_arg_0=0, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=3, var_102_arg_1=1, var_103=0, var_103_arg_0=0, var_103_arg_1=0, var_104=0, var_104_arg_0=0, var_104_arg_0 ? var_104_arg_1 : var_104_arg_2=0, var_104_arg_1=0, var_104_arg_2=0, var_105=0, var_105_arg_0=0, var_105_arg_1=31, var_106=0, var_106_arg_0=0, var_106_arg_1=0, var_106_arg_2=0, var_107=0, var_107_arg_0=0, var_108=1, var_108_arg_0=0, var_108_arg_1=0, var_109=0, var_109_arg_0=0, var_109_arg_1=1, var_110=255, var_110_arg_0=0, var_113=0, var_113_arg_0=255, var_114=0, var_114_arg_0=1, var_114_arg_1=0, var_143=0, var_143_arg_0=0, var_143_arg_1=0, var_143_arg_2=0, var_146=0, var_146_arg_0=0, var_146_arg_1=0, var_146_arg_2=0, var_152=0, var_152_arg_0=0, var_153=0, var_153_arg_0=0, var_154=0, var_154_arg_0=0, var_154_arg_1=0, var_155=0, var_155_arg_0=0, var_156=255, var_156_arg_0=0, var_157=0, var_157_arg_0=0, var_157_arg_1=255, var_158=0, var_158_arg_0=0, var_158_arg_1=0, var_158_arg_2=0, var_162=0, var_162_arg_0=0, var_162_arg_1=0, var_162_arg_2=0, var_21=0, var_25=31, var_25_arg_0=31, var_26=31, var_27=1, var_27_arg_0=31, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_38=1, var_38_arg_0=32, var_39=1, var_40=1, var_40_arg_0=1, var_40_arg_1=1, var_43=0, var_43_arg_0=32, var_43_arg_1=0, var_44=0, var_44_arg_0=1, var_44_arg_1=0, var_45=0, var_48=0, var_48_arg_0=0, var_48_arg_1=1, var_49=0, var_49_arg_0=0, var_49_arg_1=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=32, var_55=1, var_55_arg_0=0, var_55_arg_1=31, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57=0, var_57_arg_0=0, var_57_arg_1=1, var_57_arg_2=0, var_58=2, var_59=1, var_59_arg_0=1, var_59_arg_1=1, var_62=1, var_62_arg_0=32, var_62_arg_1=32, var_63=1, var_63_arg_0=1, var_63_arg_1=1, var_66=1, var_66_arg_0=1, var_66_arg_1=1, var_67=1, var_67_arg_0=1, var_67_arg_1=1, var_70=1, var_70_arg_0=1, var_70_arg_1=1, var_71=1, var_71_arg_0=1, var_71_arg_1=1, var_72=1, var_72_arg_0=0, var_72_arg_1=31, var_73=1, var_73_arg_0=1, var_73_arg_1=1, var_74=2, var_74_arg_0=1, var_74_arg_1=2, var_74_arg_2=0, var_75=3, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_79=1, var_79_arg_0=32, var_79_arg_1=32, var_80=1, var_80_arg_0=1, var_80_arg_1=1, var_83=1, var_83_arg_0=0, var_83_arg_1=1, var_84=1, var_84_arg_0=1, var_84_arg_1=1, var_87=1, var_87_arg_0=1, var_87_arg_1=1, var_88=1, var_88_arg_0=1, var_88_arg_1=1, var_91=1, var_91_arg_0=1, var_91_arg_1=1, var_92=1, var_92_arg_0=1, var_92_arg_1=1, var_93=1, var_93_arg_0=0, var_93_arg_1=31, var_94=1, var_94_arg_0=1, var_94_arg_1=1, var_95=3, var_95_arg_0=1, var_95_arg_1=3, var_95_arg_2=2, var_96=0, var_96_arg_0=3, var_96_arg_1=2, var_97=0, var_97_arg_0=0, var_97_arg_1=13, var_97_arg_2=0] [L310] SORT_6 var_104 = var_104_arg_0 ? var_104_arg_1 : var_104_arg_2; [L311] SORT_3 var_106_arg_0 = var_105; [L312] SORT_6 var_106_arg_1 = var_28; [L313] SORT_6 var_106_arg_2 = var_104; VAL [bad_115_arg_0=0, init_117_arg_1=0, init_119_arg_1=0, init_123_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_37_arg_1=0, init_42_arg_1=0, init_47_arg_1=0, init_51_arg_1=0, init_61_arg_1=0, init_65_arg_1=0, init_69_arg_1=0, init_78_arg_1=0, init_82_arg_1=0, init_86_arg_1=0, init_90_arg_1=0, init_99_arg_1=0, input_10=0, input_11=0, input_12=19, input_120=18, input_124=26, input_126=21, input_129=15, input_13=24, input_131=22, input_134=27, input_136=20, input_14=0, input_15=23, input_16=0, input_17=0, input_18=0, input_19=0, input_2=17, input_20=25, input_4=0, input_5=0, input_7=15, input_8=0, input_9=25, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_139_arg_1=31, next_140_arg_1=0, next_141_arg_1=13, next_142_arg_1=32, next_144_arg_1=0, next_145_arg_1=0, next_147_arg_1=0, next_148_arg_1=32, next_149_arg_1=1, next_150_arg_1=1, next_151_arg_1=32, next_159_arg_1=0, next_160_arg_1=1, next_161_arg_1=1, next_163_arg_1=0, next_164_arg_1=5, next_165_arg_1=0, next_166_arg_1=0, state_116=5, state_118=0, state_122=0, state_22=31, state_29=0, state_31=13, state_36=32, state_41=0, state_46=0, state_50=0, state_60=32, state_64=1, state_68=1, state_77=32, state_81=0, state_85=1, state_89=1, state_98=0, var_100=0, var_100_arg_0=3, var_100_arg_1=0, var_101=0, var_101_arg_0=0, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=3, var_102_arg_1=1, var_103=0, var_103_arg_0=0, var_103_arg_1=0, var_104=0, var_104_arg_0=0, var_104_arg_1=0, var_104_arg_2=0, var_105=0, var_105_arg_0=0, var_105_arg_1=31, var_106=0, var_106_arg_0=0, var_106_arg_1=0, var_106_arg_2=0, var_107=0, var_107_arg_0=0, var_108=1, var_108_arg_0=0, var_108_arg_1=0, var_109=0, var_109_arg_0=0, var_109_arg_1=1, var_110=255, var_110_arg_0=0, var_113=0, var_113_arg_0=255, var_114=0, var_114_arg_0=1, var_114_arg_1=0, var_143=0, var_143_arg_0=0, var_143_arg_1=0, var_143_arg_2=0, var_146=0, var_146_arg_0=0, var_146_arg_1=0, var_146_arg_2=0, var_152=0, var_152_arg_0=0, var_153=0, var_153_arg_0=0, var_154=0, var_154_arg_0=0, var_154_arg_1=0, var_155=0, var_155_arg_0=0, var_156=255, var_156_arg_0=0, var_157=0, var_157_arg_0=0, var_157_arg_1=255, var_158=0, var_158_arg_0=0, var_158_arg_1=0, var_158_arg_2=0, var_162=0, var_162_arg_0=0, var_162_arg_1=0, var_162_arg_2=0, var_21=0, var_25=31, var_25_arg_0=31, var_26=31, var_27=1, var_27_arg_0=31, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_38=1, var_38_arg_0=32, var_39=1, var_40=1, var_40_arg_0=1, var_40_arg_1=1, var_43=0, var_43_arg_0=32, var_43_arg_1=0, var_44=0, var_44_arg_0=1, var_44_arg_1=0, var_45=0, var_48=0, var_48_arg_0=0, var_48_arg_1=1, var_49=0, var_49_arg_0=0, var_49_arg_1=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=32, var_55=1, var_55_arg_0=0, var_55_arg_1=31, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57=0, var_57_arg_0=0, var_57_arg_1=1, var_57_arg_2=0, var_58=2, var_59=1, var_59_arg_0=1, var_59_arg_1=1, var_62=1, var_62_arg_0=32, var_62_arg_1=32, var_63=1, var_63_arg_0=1, var_63_arg_1=1, var_66=1, var_66_arg_0=1, var_66_arg_1=1, var_67=1, var_67_arg_0=1, var_67_arg_1=1, var_70=1, var_70_arg_0=1, var_70_arg_1=1, var_71=1, var_71_arg_0=1, var_71_arg_1=1, var_72=1, var_72_arg_0=0, var_72_arg_1=31, var_73=1, var_73_arg_0=1, var_73_arg_1=1, var_74=2, var_74_arg_0=1, var_74_arg_1=2, var_74_arg_2=0, var_75=3, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_79=1, var_79_arg_0=32, var_79_arg_1=32, var_80=1, var_80_arg_0=1, var_80_arg_1=1, var_83=1, var_83_arg_0=0, var_83_arg_1=1, var_84=1, var_84_arg_0=1, var_84_arg_1=1, var_87=1, var_87_arg_0=1, var_87_arg_1=1, var_88=1, var_88_arg_0=1, var_88_arg_1=1, var_91=1, var_91_arg_0=1, var_91_arg_1=1, var_92=1, var_92_arg_0=1, var_92_arg_1=1, var_93=1, var_93_arg_0=0, var_93_arg_1=31, var_94=1, var_94_arg_0=1, var_94_arg_1=1, var_95=3, var_95_arg_0=1, var_95_arg_1=3, var_95_arg_2=2, var_96=0, var_96_arg_0=3, var_96_arg_1=2, var_97=0, var_97_arg_0=0, var_97_arg_1=13, var_97_arg_2=0] [L314] EXPR var_106_arg_0 ? var_106_arg_1 : var_106_arg_2 VAL [bad_115_arg_0=0, init_117_arg_1=0, init_119_arg_1=0, init_123_arg_1=0, init_23_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_37_arg_1=0, init_42_arg_1=0, init_47_arg_1=0, init_51_arg_1=0, init_61_arg_1=0, init_65_arg_1=0, init_69_arg_1=0, init_78_arg_1=0, init_82_arg_1=0, init_86_arg_1=0, init_90_arg_1=0, init_99_arg_1=0, input_10=0, input_11=0, input_12=19, input_120=18, input_124=26, input_126=21, input_129=15, input_13=24, input_131=22, input_134=27, input_136=20, input_14=0, input_15=23, input_16=0, input_17=0, input_18=0, input_19=0, input_2=17, input_20=25, input_4=0, input_5=0, input_7=15, input_8=0, input_9=25, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_3=1, mask_SORT_33=3, mask_SORT_6=4294967295, msb_SORT_1=32, msb_SORT_24=16, msb_SORT_3=1, msb_SORT_33=2, msb_SORT_6=2147483648, next_139_arg_1=31, next_140_arg_1=0, next_141_arg_1=13, next_142_arg_1=32, next_144_arg_1=0, next_145_arg_1=0, next_147_arg_1=0, next_148_arg_1=32, next_149_arg_1=1, next_150_arg_1=1, next_151_arg_1=32, next_159_arg_1=0, next_160_arg_1=1, next_161_arg_1=1, next_163_arg_1=0, next_164_arg_1=5, next_165_arg_1=0, next_166_arg_1=0, state_116=5, state_118=0, state_122=0, state_22=31, state_29=0, state_31=13, state_36=32, state_41=0, state_46=0, state_50=0, state_60=32, state_64=1, state_68=1, state_77=32, state_81=0, state_85=1, state_89=1, state_98=0, var_100=0, var_100_arg_0=3, var_100_arg_1=0, var_101=0, var_101_arg_0=0, var_101_arg_1=0, var_101_arg_2=0, var_102=0, var_102_arg_0=3, var_102_arg_1=1, var_103=0, var_103_arg_0=0, var_103_arg_1=0, var_104=0, var_104_arg_0=0, var_104_arg_1=0, var_104_arg_2=0, var_105=0, var_105_arg_0=0, var_105_arg_1=31, var_106=0, var_106_arg_0=0, var_106_arg_0 ? var_106_arg_1 : var_106_arg_2=0, var_106_arg_1=0, var_106_arg_2=0, var_107=0, var_107_arg_0=0, var_108=1, var_108_arg_0=0, var_108_arg_1=0, var_109=0, var_109_arg_0=0, var_109_arg_1=1, var_110=255, var_110_arg_0=0, var_113=0, var_113_arg_0=255, var_114=0, var_114_arg_0=1, var_114_arg_1=0, var_143=0, var_143_arg_0=0, var_143_arg_1=0, var_143_arg_2=0, var_146=0, var_146_arg_0=0, var_146_arg_1=0, var_146_arg_2=0, var_152=0, var_152_arg_0=0, var_153=0, var_153_arg_0=0, var_154=0, var_154_arg_0=0, var_154_arg_1=0, var_155=0, var_155_arg_0=0, var_156=255, var_156_arg_0=0, var_157=0, var_157_arg_0=0, var_157_arg_1=255, var_158=0, var_158_arg_0=0, var_158_arg_1=0, var_158_arg_2=0, var_162=0, var_162_arg_0=0, var_162_arg_1=0, var_162_arg_2=0, var_21=0, var_25=31, var_25_arg_0=31, var_26=31, var_27=1, var_27_arg_0=31, var_27_arg_1=31, var_28=0, var_34=0, var_35=1, var_38=1, var_38_arg_0=32, var_39=1, var_40=1, var_40_arg_0=1, var_40_arg_1=1, var_43=0, var_43_arg_0=32, var_43_arg_1=0, var_44=0, var_44_arg_0=1, var_44_arg_1=0, var_45=0, var_48=0, var_48_arg_0=0, var_48_arg_1=1, var_49=0, var_49_arg_0=0, var_49_arg_1=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=32, var_55=1, var_55_arg_0=0, var_55_arg_1=31, var_56=0, var_56_arg_0=0, var_56_arg_1=1, var_57=0, var_57_arg_0=0, var_57_arg_1=1, var_57_arg_2=0, var_58=2, var_59=1, var_59_arg_0=1, var_59_arg_1=1, var_62=1, var_62_arg_0=32, var_62_arg_1=32, var_63=1, var_63_arg_0=1, var_63_arg_1=1, var_66=1, var_66_arg_0=1, var_66_arg_1=1, var_67=1, var_67_arg_0=1, var_67_arg_1=1, var_70=1, var_70_arg_0=1, var_70_arg_1=1, var_71=1, var_71_arg_0=1, var_71_arg_1=1, var_72=1, var_72_arg_0=0, var_72_arg_1=31, var_73=1, var_73_arg_0=1, var_73_arg_1=1, var_74=2, var_74_arg_0=1, var_74_arg_1=2, var_74_arg_2=0, var_75=3, var_76=1, var_76_arg_0=1, var_76_arg_1=1, var_79=1, var_79_arg_0=32, var_79_arg_1=32, var_80=1, var_80_arg_0=1, var_80_arg_1=1, var_83=1, var_83_arg_0=0, var_83_arg_1=1, var_84=1, var_84_arg_0=1, var_84_arg_1=1, var_87=1, var_87_arg_0=1, var_87_arg_1=1, var_88=1, var_88_arg_0=1, var_88_arg_1=1, var_91=1, var_91_arg_0=1, var_91_arg_1=1, var_92=1, var_92_arg_0=1, var_92_arg_1=1, var_93=1, var_93_arg_0=0, var_93_arg_1=31, var_94=1, var_94_arg_0=1, var_94_arg_1=1, var_95=3, var_95_arg_0=1, var_95_arg_1=3, var_95_arg_2=2, var_96=0, var_96_arg_0=3, var_96_arg_1=2, var_97=0, var_97_arg_0=0, var_97_arg_1=13, var_97_arg_2=0] [L314] SORT_6 var_106 = var_106_arg_0 ? var_106_arg_1 : var_106_arg_2; [L315] SORT_6 var_107_arg_0 = var_106; [L316] SORT_1 var_107 = var_107_arg_0 >> 26; [L317] var_107 = var_107 & mask_SORT_1 [L318] SORT_1 var_108_arg_0 = var_107; [L319] SORT_1 var_108_arg_1 = var_21; [L320] SORT_3 var_108 = var_108_arg_0 == var_108_arg_1; [L321] SORT_3 var_109_arg_0 = var_27; [L322] SORT_3 var_109_arg_1 = var_108; [L323] SORT_3 var_109 = var_109_arg_0 & var_109_arg_1; [L324] SORT_3 var_110_arg_0 = var_109; [L325] SORT_3 var_110 = ~var_110_arg_0; [L326] SORT_3 var_113_arg_0 = var_110; [L327] SORT_3 var_113 = ~var_113_arg_0; [L328] SORT_3 var_114_arg_0 = var_39; [L329] SORT_3 var_114_arg_1 = var_113; [L330] SORT_3 var_114 = var_114_arg_0 & var_114_arg_1; [L331] var_114 = var_114 & mask_SORT_3 [L332] SORT_3 bad_115_arg_0 = var_114; [L333] CALL __VERIFIER_assert(!(bad_115_arg_0)) [L20] COND TRUE !(cond) VAL [\old(cond)=0, cond=0] [L20] reach_error() VAL [\old(cond)=0, cond=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 33 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 20.8s, OverallIterations: 14, TraceHistogramMax: 2, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 5.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 3823 SdHoareTripleChecker+Valid, 2.0s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 3823 mSDsluCounter, 3479 SdHoareTripleChecker+Invalid, 1.8s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 301 IncrementalHoareTripleChecker+Unchecked, 2813 mSDsCounter, 206 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 981 IncrementalHoareTripleChecker+Invalid, 1488 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 206 mSolverCounterUnsat, 666 mSDtfsCounter, 981 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 1217 GetRequests, 1022 SyntacticMatches, 1 SemanticMatches, 194 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1195 ImplicationChecksByTransitivity, 4.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=138occurred in iteration=13, InterpolantAutomatonStates: 159, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 13 MinimizatonAttempts, 1543 StatesRemovedByMinimization, 13 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 1.2s SsaConstructionTime, 2.3s SatisfiabilityAnalysisTime, 5.4s InterpolantComputationTime, 730 NumberOfCodeBlocks, 730 NumberOfCodeBlocksAsserted, 20 NumberOfCheckSat, 1097 ConstructedInterpolants, 87 QuantifiedInterpolants, 8783 SizeOfPredicates, 222 NumberOfNonLiveVariables, 8355 ConjunctsInSsa, 253 ConjunctsInUnsatCore, 29 InterpolantComputations, 10 PerfectInterpolantSequences, 289/368 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2022-11-03 03:34:16,792 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9db8571-c114-41b5-a050-1fa9d39c7a5a/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE