./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/nla-digbench-scaling/fermat2-ll_unwindbound100.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 5e519f3a Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/config/TaipanReach.xml -i ../../sv-benchmarks/c/nla-digbench-scaling/fermat2-ll_unwindbound100.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 36da946a83103a61b88f0f1db9af94484aad5eefbde5313f974f53b267bd14bf --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-5e519f3 [2022-11-03 03:31:57,433 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-03 03:31:57,436 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-03 03:31:57,466 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-03 03:31:57,467 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-03 03:31:57,468 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-03 03:31:57,470 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-03 03:31:57,472 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-03 03:31:57,474 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-03 03:31:57,475 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-03 03:31:57,476 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-03 03:31:57,478 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-03 03:31:57,478 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-03 03:31:57,480 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-03 03:31:57,481 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-03 03:31:57,482 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-03 03:31:57,483 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-03 03:31:57,485 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-03 03:31:57,486 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-03 03:31:57,489 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-03 03:31:57,490 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-03 03:31:57,499 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-03 03:31:57,500 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-03 03:31:57,501 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-03 03:31:57,507 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-03 03:31:57,518 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-03 03:31:57,518 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-03 03:31:57,519 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-03 03:31:57,520 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-03 03:31:57,521 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-03 03:31:57,521 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-03 03:31:57,522 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-03 03:31:57,523 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-03 03:31:57,524 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-03 03:31:57,525 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-03 03:31:57,529 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-03 03:31:57,531 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-03 03:31:57,531 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-03 03:31:57,531 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-03 03:31:57,532 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-03 03:31:57,533 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-03 03:31:57,535 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-32bit-Taipan_Default.epf [2022-11-03 03:31:57,576 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-03 03:31:57,577 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-03 03:31:57,578 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-03 03:31:57,578 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-03 03:31:57,579 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-03 03:31:57,579 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-03 03:31:57,580 INFO L138 SettingsManager]: * User list type=DISABLED [2022-11-03 03:31:57,580 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-11-03 03:31:57,580 INFO L138 SettingsManager]: * Explicit value domain=true [2022-11-03 03:31:57,581 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2022-11-03 03:31:57,582 INFO L138 SettingsManager]: * Octagon Domain=false [2022-11-03 03:31:57,582 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-11-03 03:31:57,583 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2022-11-03 03:31:57,583 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2022-11-03 03:31:57,583 INFO L138 SettingsManager]: * Interval Domain=false [2022-11-03 03:31:57,584 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2022-11-03 03:31:57,584 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2022-11-03 03:31:57,584 INFO L138 SettingsManager]: * Simplification Technique=POLY_PAC [2022-11-03 03:31:57,585 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-03 03:31:57,586 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-03 03:31:57,586 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-03 03:31:57,586 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-03 03:31:57,587 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-03 03:31:57,587 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-03 03:31:57,587 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-03 03:31:57,587 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-03 03:31:57,588 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-03 03:31:57,588 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-03 03:31:57,588 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-03 03:31:57,589 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-03 03:31:57,589 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-03 03:31:57,590 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-03 03:31:57,590 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 03:31:57,590 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-03 03:31:57,591 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2022-11-03 03:31:57,591 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-03 03:31:57,591 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-03 03:31:57,592 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2022-11-03 03:31:57,592 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-11-03 03:31:57,592 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-03 03:31:57,593 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-11-03 03:31:57,594 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 36da946a83103a61b88f0f1db9af94484aad5eefbde5313f974f53b267bd14bf [2022-11-03 03:31:57,941 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-03 03:31:57,981 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-03 03:31:57,984 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-03 03:31:57,986 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-03 03:31:57,987 INFO L275 PluginConnector]: CDTParser initialized [2022-11-03 03:31:57,988 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/../../sv-benchmarks/c/nla-digbench-scaling/fermat2-ll_unwindbound100.c [2022-11-03 03:31:58,081 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/data/7f1d8655a/baff75dfb0144e9092471378669cb9e6/FLAGe5c04c1fc [2022-11-03 03:31:58,591 INFO L306 CDTParser]: Found 1 translation units. [2022-11-03 03:31:58,591 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/sv-benchmarks/c/nla-digbench-scaling/fermat2-ll_unwindbound100.c [2022-11-03 03:31:58,601 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/data/7f1d8655a/baff75dfb0144e9092471378669cb9e6/FLAGe5c04c1fc [2022-11-03 03:31:58,964 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/data/7f1d8655a/baff75dfb0144e9092471378669cb9e6 [2022-11-03 03:31:58,966 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-03 03:31:58,968 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-03 03:31:58,969 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-03 03:31:58,970 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-03 03:31:58,975 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-03 03:31:58,976 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 03:31:58" (1/1) ... [2022-11-03 03:31:58,977 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5734182d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:58, skipping insertion in model container [2022-11-03 03:31:58,978 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 03:31:58" (1/1) ... [2022-11-03 03:31:58,987 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-03 03:31:59,005 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-03 03:31:59,183 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/sv-benchmarks/c/nla-digbench-scaling/fermat2-ll_unwindbound100.c[524,537] [2022-11-03 03:31:59,213 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 03:31:59,221 INFO L203 MainTranslator]: Completed pre-run [2022-11-03 03:31:59,231 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/sv-benchmarks/c/nla-digbench-scaling/fermat2-ll_unwindbound100.c[524,537] [2022-11-03 03:31:59,240 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 03:31:59,254 INFO L208 MainTranslator]: Completed translation [2022-11-03 03:31:59,254 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:59 WrapperNode [2022-11-03 03:31:59,254 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-03 03:31:59,255 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-03 03:31:59,255 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-03 03:31:59,256 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-03 03:31:59,264 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:59" (1/1) ... [2022-11-03 03:31:59,271 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:59" (1/1) ... [2022-11-03 03:31:59,289 INFO L138 Inliner]: procedures = 14, calls = 11, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 46 [2022-11-03 03:31:59,289 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-03 03:31:59,290 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-03 03:31:59,290 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-03 03:31:59,290 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-03 03:31:59,299 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:59" (1/1) ... [2022-11-03 03:31:59,299 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:59" (1/1) ... [2022-11-03 03:31:59,301 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:59" (1/1) ... [2022-11-03 03:31:59,301 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:59" (1/1) ... [2022-11-03 03:31:59,304 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:59" (1/1) ... [2022-11-03 03:31:59,308 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:59" (1/1) ... [2022-11-03 03:31:59,309 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:59" (1/1) ... [2022-11-03 03:31:59,310 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:59" (1/1) ... [2022-11-03 03:31:59,311 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-03 03:31:59,312 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-03 03:31:59,312 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-03 03:31:59,312 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-03 03:31:59,313 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:59" (1/1) ... [2022-11-03 03:31:59,320 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 03:31:59,333 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:31:59,346 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-03 03:31:59,355 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-03 03:31:59,386 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-03 03:31:59,386 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2022-11-03 03:31:59,386 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2022-11-03 03:31:59,386 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-03 03:31:59,386 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-03 03:31:59,387 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-03 03:31:59,387 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-11-03 03:31:59,387 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-11-03 03:31:59,451 INFO L235 CfgBuilder]: Building ICFG [2022-11-03 03:31:59,454 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-03 03:31:59,602 INFO L276 CfgBuilder]: Performing block encoding [2022-11-03 03:31:59,637 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-03 03:31:59,637 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-03 03:31:59,640 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 03:31:59 BoogieIcfgContainer [2022-11-03 03:31:59,640 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-03 03:31:59,642 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-03 03:31:59,643 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-03 03:31:59,646 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-03 03:31:59,647 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 03.11 03:31:58" (1/3) ... [2022-11-03 03:31:59,648 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@74c6da04 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 03:31:59, skipping insertion in model container [2022-11-03 03:31:59,648 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 03:31:59" (2/3) ... [2022-11-03 03:31:59,648 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@74c6da04 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 03:31:59, skipping insertion in model container [2022-11-03 03:31:59,650 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 03:31:59" (3/3) ... [2022-11-03 03:31:59,652 INFO L112 eAbstractionObserver]: Analyzing ICFG fermat2-ll_unwindbound100.c [2022-11-03 03:31:59,675 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-03 03:31:59,675 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-03 03:31:59,744 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-03 03:31:59,757 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@2798b89d, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-03 03:31:59,757 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-03 03:31:59,763 INFO L276 IsEmpty]: Start isEmpty. Operand has 19 states, 11 states have (on average 1.4545454545454546) internal successors, (16), 12 states have internal predecessors, (16), 4 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-11-03 03:31:59,772 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2022-11-03 03:31:59,773 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:31:59,774 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:31:59,777 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:31:59,787 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:31:59,788 INFO L85 PathProgramCache]: Analyzing trace with hash -1046920148, now seen corresponding path program 1 times [2022-11-03 03:31:59,799 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-03 03:31:59,801 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [61713554] [2022-11-03 03:31:59,801 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:31:59,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-03 03:31:59,943 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-03 03:31:59,944 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2081012097] [2022-11-03 03:31:59,944 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:31:59,944 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:31:59,945 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:31:59,950 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:31:59,974 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-11-03 03:32:00,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:00,046 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 1 conjunts are in the unsatisfiable core [2022-11-03 03:32:00,050 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:00,095 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-03 03:32:00,096 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:32:00,096 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-03 03:32:00,096 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [61713554] [2022-11-03 03:32:00,097 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-03 03:32:00,097 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2081012097] [2022-11-03 03:32:00,097 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2081012097] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:32:00,098 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:32:00,098 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-03 03:32:00,100 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [358045635] [2022-11-03 03:32:00,101 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:32:00,120 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2022-11-03 03:32:00,121 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-03 03:32:00,164 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2022-11-03 03:32:00,165 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2022-11-03 03:32:00,176 INFO L87 Difference]: Start difference. First operand has 19 states, 11 states have (on average 1.4545454545454546) internal successors, (16), 12 states have internal predecessors, (16), 4 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) Second operand has 2 states, 2 states have (on average 3.5) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-11-03 03:32:00,220 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:32:00,220 INFO L93 Difference]: Finished difference Result 32 states and 43 transitions. [2022-11-03 03:32:00,221 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-03 03:32:00,223 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 3.5) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 13 [2022-11-03 03:32:00,223 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:32:00,231 INFO L225 Difference]: With dead ends: 32 [2022-11-03 03:32:00,232 INFO L226 Difference]: Without dead ends: 17 [2022-11-03 03:32:00,235 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2022-11-03 03:32:00,238 INFO L413 NwaCegarLoop]: 18 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 4 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 18 SdHoareTripleChecker+Invalid, 4 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 4 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 03:32:00,240 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 18 Invalid, 4 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 4 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-03 03:32:00,260 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states. [2022-11-03 03:32:00,279 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 17. [2022-11-03 03:32:00,281 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 10 states have (on average 1.3) internal successors, (13), 11 states have internal predecessors, (13), 4 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-03 03:32:00,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 20 transitions. [2022-11-03 03:32:00,285 INFO L78 Accepts]: Start accepts. Automaton has 17 states and 20 transitions. Word has length 13 [2022-11-03 03:32:00,287 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:32:00,288 INFO L495 AbstractCegarLoop]: Abstraction has 17 states and 20 transitions. [2022-11-03 03:32:00,288 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 3.5) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-11-03 03:32:00,288 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 20 transitions. [2022-11-03 03:32:00,291 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-11-03 03:32:00,291 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:32:00,291 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:32:00,324 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2022-11-03 03:32:00,506 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:32:00,506 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:32:00,507 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:32:00,507 INFO L85 PathProgramCache]: Analyzing trace with hash 1317434454, now seen corresponding path program 1 times [2022-11-03 03:32:00,508 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-03 03:32:00,508 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [935728746] [2022-11-03 03:32:00,508 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:00,509 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-03 03:32:00,524 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-03 03:32:00,525 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [399627151] [2022-11-03 03:32:00,525 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:00,525 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:32:00,526 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:32:00,527 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:32:00,554 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-11-03 03:32:00,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:00,643 INFO L263 TraceCheckSpWp]: Trace formula consists of 67 conjuncts, 3 conjunts are in the unsatisfiable core [2022-11-03 03:32:00,645 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:00,749 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-03 03:32:00,750 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:32:00,750 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-03 03:32:00,751 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [935728746] [2022-11-03 03:32:00,751 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-03 03:32:00,751 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [399627151] [2022-11-03 03:32:00,751 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [399627151] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:32:00,751 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:32:00,752 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-03 03:32:00,752 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [519815452] [2022-11-03 03:32:00,752 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:32:00,753 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 03:32:00,753 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-03 03:32:00,754 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 03:32:00,755 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 03:32:00,755 INFO L87 Difference]: Start difference. First operand 17 states and 20 transitions. Second operand has 4 states, 4 states have (on average 2.0) internal successors, (8), 3 states have internal predecessors, (8), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-11-03 03:32:00,782 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:32:00,782 INFO L93 Difference]: Finished difference Result 26 states and 29 transitions. [2022-11-03 03:32:00,783 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-03 03:32:00,783 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.0) internal successors, (8), 3 states have internal predecessors, (8), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 14 [2022-11-03 03:32:00,783 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:32:00,784 INFO L225 Difference]: With dead ends: 26 [2022-11-03 03:32:00,784 INFO L226 Difference]: Without dead ends: 19 [2022-11-03 03:32:00,785 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 03:32:00,787 INFO L413 NwaCegarLoop]: 15 mSDtfsCounter, 0 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 14 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 39 SdHoareTripleChecker+Invalid, 14 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 14 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 03:32:00,787 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 39 Invalid, 14 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 14 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-03 03:32:00,789 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2022-11-03 03:32:00,793 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2022-11-03 03:32:00,793 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 12 states have (on average 1.25) internal successors, (15), 13 states have internal predecessors, (15), 4 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-03 03:32:00,794 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 22 transitions. [2022-11-03 03:32:00,794 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 22 transitions. Word has length 14 [2022-11-03 03:32:00,795 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:32:00,795 INFO L495 AbstractCegarLoop]: Abstraction has 19 states and 22 transitions. [2022-11-03 03:32:00,795 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.0) internal successors, (8), 3 states have internal predecessors, (8), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-11-03 03:32:00,795 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 22 transitions. [2022-11-03 03:32:00,796 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-11-03 03:32:00,796 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:32:00,796 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:32:00,843 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-11-03 03:32:01,022 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable1 [2022-11-03 03:32:01,022 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:32:01,023 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:32:01,023 INFO L85 PathProgramCache]: Analyzing trace with hash 1319221914, now seen corresponding path program 1 times [2022-11-03 03:32:01,024 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-03 03:32:01,024 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [224840435] [2022-11-03 03:32:01,024 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:01,024 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-03 03:32:01,038 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-03 03:32:01,042 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1301315997] [2022-11-03 03:32:01,042 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:01,042 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:32:01,043 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:32:01,044 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:32:01,055 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-11-03 03:32:01,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:01,146 INFO L263 TraceCheckSpWp]: Trace formula consists of 67 conjuncts, 9 conjunts are in the unsatisfiable core [2022-11-03 03:32:01,148 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:01,279 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-03 03:32:01,279 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 03:32:01,280 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-03 03:32:01,280 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [224840435] [2022-11-03 03:32:01,280 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-03 03:32:01,281 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1301315997] [2022-11-03 03:32:01,281 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1301315997] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:32:01,281 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 03:32:01,281 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-03 03:32:01,282 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [325639146] [2022-11-03 03:32:01,282 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:32:01,282 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-03 03:32:01,283 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-03 03:32:01,283 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-03 03:32:01,284 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-03 03:32:01,284 INFO L87 Difference]: Start difference. First operand 19 states and 22 transitions. Second operand has 5 states, 5 states have (on average 1.6) internal successors, (8), 4 states have internal predecessors, (8), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-11-03 03:32:01,473 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:32:01,473 INFO L93 Difference]: Finished difference Result 28 states and 32 transitions. [2022-11-03 03:32:01,473 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-03 03:32:01,474 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 1.6) internal successors, (8), 4 states have internal predecessors, (8), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 14 [2022-11-03 03:32:01,474 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:32:01,475 INFO L225 Difference]: With dead ends: 28 [2022-11-03 03:32:01,475 INFO L226 Difference]: Without dead ends: 26 [2022-11-03 03:32:01,476 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2022-11-03 03:32:01,477 INFO L413 NwaCegarLoop]: 14 mSDtfsCounter, 6 mSDsluCounter, 38 mSDsCounter, 0 mSdLazyCounter, 35 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 47 SdHoareTripleChecker+Invalid, 35 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 35 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-03 03:32:01,478 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 47 Invalid, 35 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 35 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-03 03:32:01,479 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2022-11-03 03:32:01,485 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 24. [2022-11-03 03:32:01,486 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 15 states have (on average 1.2) internal successors, (18), 17 states have internal predecessors, (18), 5 states have call successors, (5), 3 states have call predecessors, (5), 3 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-11-03 03:32:01,487 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 27 transitions. [2022-11-03 03:32:01,487 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 27 transitions. Word has length 14 [2022-11-03 03:32:01,487 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:32:01,488 INFO L495 AbstractCegarLoop]: Abstraction has 24 states and 27 transitions. [2022-11-03 03:32:01,488 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 1.6) internal successors, (8), 4 states have internal predecessors, (8), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-11-03 03:32:01,488 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 27 transitions. [2022-11-03 03:32:01,489 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2022-11-03 03:32:01,489 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:32:01,489 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:32:01,502 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-11-03 03:32:01,694 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:32:01,694 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:32:01,695 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:32:01,695 INFO L85 PathProgramCache]: Analyzing trace with hash -1562521278, now seen corresponding path program 1 times [2022-11-03 03:32:01,696 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-03 03:32:01,696 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [650464916] [2022-11-03 03:32:01,696 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:01,696 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-03 03:32:01,707 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-03 03:32:01,708 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2051607953] [2022-11-03 03:32:01,708 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:01,708 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:32:01,708 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:32:01,717 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:32:01,738 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-11-03 03:32:01,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:01,788 INFO L263 TraceCheckSpWp]: Trace formula consists of 78 conjuncts, 10 conjunts are in the unsatisfiable core [2022-11-03 03:32:01,792 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:01,943 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-03 03:32:01,943 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:32:02,224 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-03 03:32:02,225 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-03 03:32:02,225 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [650464916] [2022-11-03 03:32:02,225 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-03 03:32:02,225 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2051607953] [2022-11-03 03:32:02,226 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2051607953] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:32:02,226 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1517349926] [2022-11-03 03:32:02,257 INFO L159 IcfgInterpreter]: Started Sifa with 17 locations of interest [2022-11-03 03:32:02,257 INFO L166 IcfgInterpreter]: Building call graph [2022-11-03 03:32:02,264 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2022-11-03 03:32:02,270 INFO L176 IcfgInterpreter]: Starting interpretation [2022-11-03 03:32:02,271 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2022-11-03 03:32:02,858 INFO L197 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 40 for LOIs [2022-11-03 03:32:02,875 INFO L197 IcfgInterpreter]: Interpreting procedure assume_abort_if_not with input of size 97 for LOIs [2022-11-03 03:32:02,934 INFO L180 IcfgInterpreter]: Interpretation finished [2022-11-03 03:32:10,386 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSifa [1517349926] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 03:32:10,386 INFO L184 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2022-11-03 03:32:10,386 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [8, 8] total 21 [2022-11-03 03:32:10,387 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [710458219] [2022-11-03 03:32:10,387 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 03:32:10,388 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2022-11-03 03:32:10,388 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-03 03:32:10,388 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-11-03 03:32:10,403 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=348, Unknown=0, NotChecked=0, Total=420 [2022-11-03 03:32:10,404 INFO L87 Difference]: Start difference. First operand 24 states and 27 transitions. Second operand has 13 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 8 states have internal predecessors, (11), 4 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-03 03:32:10,678 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:32:10,678 INFO L93 Difference]: Finished difference Result 32 states and 35 transitions. [2022-11-03 03:32:10,679 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-11-03 03:32:10,679 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 8 states have internal predecessors, (11), 4 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 20 [2022-11-03 03:32:10,679 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:32:10,680 INFO L225 Difference]: With dead ends: 32 [2022-11-03 03:32:10,680 INFO L226 Difference]: Without dead ends: 25 [2022-11-03 03:32:10,681 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 34 SyntacticMatches, 5 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 105 ImplicationChecksByTransitivity, 7.5s TimeCoverageRelationStatistics Valid=72, Invalid=348, Unknown=0, NotChecked=0, Total=420 [2022-11-03 03:32:10,682 INFO L413 NwaCegarLoop]: 9 mSDtfsCounter, 6 mSDsluCounter, 28 mSDsCounter, 0 mSdLazyCounter, 53 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 36 SdHoareTripleChecker+Invalid, 72 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 53 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 18 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-03 03:32:10,682 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 36 Invalid, 72 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 53 Invalid, 0 Unknown, 18 Unchecked, 0.3s Time] [2022-11-03 03:32:10,683 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2022-11-03 03:32:10,693 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2022-11-03 03:32:10,694 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 16 states have (on average 1.1875) internal successors, (19), 17 states have internal predecessors, (19), 5 states have call successors, (5), 3 states have call predecessors, (5), 3 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-11-03 03:32:10,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 28 transitions. [2022-11-03 03:32:10,695 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 28 transitions. Word has length 20 [2022-11-03 03:32:10,695 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:32:10,696 INFO L495 AbstractCegarLoop]: Abstraction has 25 states and 28 transitions. [2022-11-03 03:32:10,696 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 8 states have internal predecessors, (11), 4 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-03 03:32:10,696 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 28 transitions. [2022-11-03 03:32:10,697 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-11-03 03:32:10,697 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:32:10,697 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:32:10,746 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-11-03 03:32:10,911 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:32:10,911 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:32:10,912 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:32:10,912 INFO L85 PathProgramCache]: Analyzing trace with hash -182192907, now seen corresponding path program 1 times [2022-11-03 03:32:10,912 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-03 03:32:10,912 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1341115724] [2022-11-03 03:32:10,912 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:10,913 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-03 03:32:10,922 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-03 03:32:10,924 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1939472901] [2022-11-03 03:32:10,924 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:10,924 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:32:10,924 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:32:10,926 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:32:10,951 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-11-03 03:32:10,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:10,982 INFO L263 TraceCheckSpWp]: Trace formula consists of 83 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-03 03:32:10,984 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:11,027 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-03 03:32:11,027 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:32:11,075 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-03 03:32:11,075 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-03 03:32:11,076 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1341115724] [2022-11-03 03:32:11,076 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-03 03:32:11,076 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1939472901] [2022-11-03 03:32:11,076 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1939472901] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:32:11,076 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2037609249] [2022-11-03 03:32:11,079 INFO L159 IcfgInterpreter]: Started Sifa with 17 locations of interest [2022-11-03 03:32:11,079 INFO L166 IcfgInterpreter]: Building call graph [2022-11-03 03:32:11,080 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2022-11-03 03:32:11,080 INFO L176 IcfgInterpreter]: Starting interpretation [2022-11-03 03:32:11,080 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2022-11-03 03:32:11,845 INFO L197 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 68 for LOIs [2022-11-03 03:32:11,952 INFO L197 IcfgInterpreter]: Interpreting procedure assume_abort_if_not with input of size 97 for LOIs [2022-11-03 03:32:11,988 INFO L180 IcfgInterpreter]: Interpretation finished [2022-11-03 03:32:14,957 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '702#(and (<= 0 |#NULL.base|) (<= |#NULL.offset| 0) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond) (<= 1 ~counter~0) (= __VERIFIER_assert_~cond 0) (<= |#NULL.base| 0) (<= 0 |#NULL.offset|) (<= 0 |#StackHeapBarrier|))' at error location [2022-11-03 03:32:14,957 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2022-11-03 03:32:14,957 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-03 03:32:14,957 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 5] total 8 [2022-11-03 03:32:14,957 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [410074390] [2022-11-03 03:32:14,958 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-03 03:32:14,958 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-03 03:32:14,958 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-03 03:32:14,959 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-03 03:32:14,959 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=340, Unknown=0, NotChecked=0, Total=420 [2022-11-03 03:32:14,959 INFO L87 Difference]: Start difference. First operand 25 states and 28 transitions. Second operand has 8 states, 8 states have (on average 3.125) internal successors, (25), 8 states have internal predecessors, (25), 5 states have call successors, (7), 4 states have call predecessors, (7), 3 states have return successors, (6), 4 states have call predecessors, (6), 4 states have call successors, (6) [2022-11-03 03:32:15,100 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:32:15,101 INFO L93 Difference]: Finished difference Result 56 states and 63 transitions. [2022-11-03 03:32:15,101 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-03 03:32:15,102 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 3.125) internal successors, (25), 8 states have internal predecessors, (25), 5 states have call successors, (7), 4 states have call predecessors, (7), 3 states have return successors, (6), 4 states have call predecessors, (6), 4 states have call successors, (6) Word has length 22 [2022-11-03 03:32:15,103 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:32:15,105 INFO L225 Difference]: With dead ends: 56 [2022-11-03 03:32:15,107 INFO L226 Difference]: Without dead ends: 49 [2022-11-03 03:32:15,108 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 67 GetRequests, 45 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 165 ImplicationChecksByTransitivity, 3.0s TimeCoverageRelationStatistics Valid=100, Invalid=452, Unknown=0, NotChecked=0, Total=552 [2022-11-03 03:32:15,109 INFO L413 NwaCegarLoop]: 18 mSDtfsCounter, 24 mSDsluCounter, 76 mSDsCounter, 0 mSdLazyCounter, 41 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 24 SdHoareTripleChecker+Valid, 86 SdHoareTripleChecker+Invalid, 52 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 41 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:32:15,110 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [24 Valid, 86 Invalid, 52 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 41 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 03:32:15,112 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2022-11-03 03:32:15,125 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 45. [2022-11-03 03:32:15,126 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 45 states, 30 states have (on average 1.2333333333333334) internal successors, (37), 33 states have internal predecessors, (37), 9 states have call successors, (9), 5 states have call predecessors, (9), 5 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-11-03 03:32:15,129 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 52 transitions. [2022-11-03 03:32:15,130 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 52 transitions. Word has length 22 [2022-11-03 03:32:15,130 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:32:15,131 INFO L495 AbstractCegarLoop]: Abstraction has 45 states and 52 transitions. [2022-11-03 03:32:15,131 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 3.125) internal successors, (25), 8 states have internal predecessors, (25), 5 states have call successors, (7), 4 states have call predecessors, (7), 3 states have return successors, (6), 4 states have call predecessors, (6), 4 states have call successors, (6) [2022-11-03 03:32:15,131 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 52 transitions. [2022-11-03 03:32:15,133 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-11-03 03:32:15,134 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:32:15,134 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:32:15,182 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-11-03 03:32:15,349 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:32:15,349 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:32:15,350 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:32:15,350 INFO L85 PathProgramCache]: Analyzing trace with hash -180405447, now seen corresponding path program 1 times [2022-11-03 03:32:15,350 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-03 03:32:15,350 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1371378355] [2022-11-03 03:32:15,350 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:15,351 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-03 03:32:15,368 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-03 03:32:15,368 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1360961499] [2022-11-03 03:32:15,369 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:15,369 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:32:15,369 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:32:15,373 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:32:15,390 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-11-03 03:32:15,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:15,473 INFO L263 TraceCheckSpWp]: Trace formula consists of 83 conjuncts, 20 conjunts are in the unsatisfiable core [2022-11-03 03:32:15,476 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:22,465 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 03:32:22,466 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:32:25,512 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-03 03:32:25,512 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-03 03:32:25,513 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1371378355] [2022-11-03 03:32:25,515 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-03 03:32:25,516 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1360961499] [2022-11-03 03:32:25,516 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1360961499] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:32:25,516 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2038747060] [2022-11-03 03:32:25,519 INFO L159 IcfgInterpreter]: Started Sifa with 16 locations of interest [2022-11-03 03:32:25,519 INFO L166 IcfgInterpreter]: Building call graph [2022-11-03 03:32:25,520 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2022-11-03 03:32:25,520 INFO L176 IcfgInterpreter]: Starting interpretation [2022-11-03 03:32:25,520 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2022-11-03 03:32:26,227 INFO L197 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 40 for LOIs [2022-11-03 03:32:26,291 INFO L197 IcfgInterpreter]: Interpreting procedure assume_abort_if_not with input of size 97 for LOIs [2022-11-03 03:32:26,338 INFO L180 IcfgInterpreter]: Interpretation finished [2022-11-03 03:32:28,678 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '1000#(and (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond) (<= 1 ~counter~0) (= __VERIFIER_assert_~cond 0) (= |#NULL.offset| 0) (<= 0 |#StackHeapBarrier|) (= |#NULL.base| 0))' at error location [2022-11-03 03:32:28,678 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2022-11-03 03:32:28,678 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-03 03:32:28,678 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 7] total 12 [2022-11-03 03:32:28,679 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2007532503] [2022-11-03 03:32:28,679 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-03 03:32:28,679 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-11-03 03:32:28,680 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-03 03:32:28,680 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-11-03 03:32:28,681 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=520, Unknown=0, NotChecked=0, Total=600 [2022-11-03 03:32:28,681 INFO L87 Difference]: Start difference. First operand 45 states and 52 transitions. Second operand has 12 states, 11 states have (on average 2.090909090909091) internal successors, (23), 10 states have internal predecessors, (23), 5 states have call successors, (7), 2 states have call predecessors, (7), 3 states have return successors, (6), 4 states have call predecessors, (6), 3 states have call successors, (6) [2022-11-03 03:32:30,775 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-11-03 03:32:33,353 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.26s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-11-03 03:32:35,439 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.99s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-11-03 03:32:39,423 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.77s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-11-03 03:32:41,430 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-11-03 03:32:44,861 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:32:44,862 INFO L93 Difference]: Finished difference Result 59 states and 65 transitions. [2022-11-03 03:32:44,862 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-03 03:32:44,863 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 11 states have (on average 2.090909090909091) internal successors, (23), 10 states have internal predecessors, (23), 5 states have call successors, (7), 2 states have call predecessors, (7), 3 states have return successors, (6), 4 states have call predecessors, (6), 3 states have call successors, (6) Word has length 22 [2022-11-03 03:32:44,863 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:32:44,864 INFO L225 Difference]: With dead ends: 59 [2022-11-03 03:32:44,864 INFO L226 Difference]: Without dead ends: 51 [2022-11-03 03:32:44,865 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 73 GetRequests, 42 SyntacticMatches, 3 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 152 ImplicationChecksByTransitivity, 11.7s TimeCoverageRelationStatistics Valid=111, Invalid=759, Unknown=0, NotChecked=0, Total=870 [2022-11-03 03:32:44,866 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 24 mSDsluCounter, 71 mSDsCounter, 0 mSdLazyCounter, 164 mSolverCounterSat, 8 mSolverCounterUnsat, 2 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 12.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 24 SdHoareTripleChecker+Valid, 68 SdHoareTripleChecker+Invalid, 174 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 164 IncrementalHoareTripleChecker+Invalid, 2 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 12.3s IncrementalHoareTripleChecker+Time [2022-11-03 03:32:44,866 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [24 Valid, 68 Invalid, 174 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 164 Invalid, 2 Unknown, 0 Unchecked, 12.3s Time] [2022-11-03 03:32:44,867 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2022-11-03 03:32:44,883 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 45. [2022-11-03 03:32:44,883 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 45 states, 32 states have (on average 1.125) internal successors, (36), 32 states have internal predecessors, (36), 7 states have call successors, (7), 6 states have call predecessors, (7), 5 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-11-03 03:32:44,884 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 49 transitions. [2022-11-03 03:32:44,885 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 49 transitions. Word has length 22 [2022-11-03 03:32:44,885 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:32:44,885 INFO L495 AbstractCegarLoop]: Abstraction has 45 states and 49 transitions. [2022-11-03 03:32:44,886 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 11 states have (on average 2.090909090909091) internal successors, (23), 10 states have internal predecessors, (23), 5 states have call successors, (7), 2 states have call predecessors, (7), 3 states have return successors, (6), 4 states have call predecessors, (6), 3 states have call successors, (6) [2022-11-03 03:32:44,886 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 49 transitions. [2022-11-03 03:32:44,886 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-11-03 03:32:44,887 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:32:44,887 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:32:44,916 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-11-03 03:32:45,098 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable5 [2022-11-03 03:32:45,098 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:32:45,099 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:32:45,099 INFO L85 PathProgramCache]: Analyzing trace with hash 408559265, now seen corresponding path program 1 times [2022-11-03 03:32:45,099 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-03 03:32:45,099 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [536723223] [2022-11-03 03:32:45,099 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:45,099 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-03 03:32:45,110 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-03 03:32:45,120 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1065514238] [2022-11-03 03:32:45,121 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:32:45,121 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:32:45,121 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:32:45,123 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:32:45,130 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-11-03 03:32:45,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:32:45,176 INFO L263 TraceCheckSpWp]: Trace formula consists of 94 conjuncts, 10 conjunts are in the unsatisfiable core [2022-11-03 03:32:45,178 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:32:45,260 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 7 proven. 1 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-11-03 03:32:45,260 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:32:45,391 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 7 proven. 1 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-11-03 03:32:45,391 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-03 03:32:45,392 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [536723223] [2022-11-03 03:32:45,392 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-03 03:32:45,392 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1065514238] [2022-11-03 03:32:45,392 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1065514238] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:32:45,392 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1316826326] [2022-11-03 03:32:45,394 INFO L159 IcfgInterpreter]: Started Sifa with 17 locations of interest [2022-11-03 03:32:45,395 INFO L166 IcfgInterpreter]: Building call graph [2022-11-03 03:32:45,395 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2022-11-03 03:32:45,395 INFO L176 IcfgInterpreter]: Starting interpretation [2022-11-03 03:32:45,395 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2022-11-03 03:32:46,105 INFO L197 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 70 for LOIs [2022-11-03 03:32:46,223 INFO L197 IcfgInterpreter]: Interpreting procedure assume_abort_if_not with input of size 97 for LOIs [2022-11-03 03:32:46,262 INFO L180 IcfgInterpreter]: Interpretation finished [2022-11-03 03:32:59,341 WARN L234 SmtUtils]: Spent 11.87s on a formula simplification. DAG size of input: 70 DAG size of output: 41 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-03 03:33:00,111 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '1343#(and (<= |#NULL.offset| 0) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond) (<= 1 ~counter~0) (= __VERIFIER_assert_~cond 0) (<= 0 |#NULL.offset|) (<= 0 |#StackHeapBarrier|) (= |#NULL.base| 0))' at error location [2022-11-03 03:33:00,111 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2022-11-03 03:33:00,111 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-03 03:33:00,111 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 10 [2022-11-03 03:33:00,111 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1396609511] [2022-11-03 03:33:00,111 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-03 03:33:00,112 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-11-03 03:33:00,112 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-03 03:33:00,112 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-11-03 03:33:00,113 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=82, Invalid=470, Unknown=0, NotChecked=0, Total=552 [2022-11-03 03:33:00,113 INFO L87 Difference]: Start difference. First operand 45 states and 49 transitions. Second operand has 10 states, 9 states have (on average 2.111111111111111) internal successors, (19), 7 states have internal predecessors, (19), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (5), 3 states have call predecessors, (5), 1 states have call successors, (5) [2022-11-03 03:33:00,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:33:00,315 INFO L93 Difference]: Finished difference Result 50 states and 53 transitions. [2022-11-03 03:33:00,315 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-03 03:33:00,315 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 9 states have (on average 2.111111111111111) internal successors, (19), 7 states have internal predecessors, (19), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (5), 3 states have call predecessors, (5), 1 states have call successors, (5) Word has length 28 [2022-11-03 03:33:00,316 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:33:00,316 INFO L225 Difference]: With dead ends: 50 [2022-11-03 03:33:00,316 INFO L226 Difference]: Without dead ends: 45 [2022-11-03 03:33:00,317 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 84 GetRequests, 58 SyntacticMatches, 2 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 131 ImplicationChecksByTransitivity, 14.0s TimeCoverageRelationStatistics Valid=96, Invalid=554, Unknown=0, NotChecked=0, Total=650 [2022-11-03 03:33:00,317 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 13 mSDsluCounter, 66 mSDsCounter, 0 mSdLazyCounter, 67 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 13 SdHoareTripleChecker+Valid, 66 SdHoareTripleChecker+Invalid, 71 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 67 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 03:33:00,318 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [13 Valid, 66 Invalid, 71 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 67 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 03:33:00,318 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2022-11-03 03:33:00,331 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 45. [2022-11-03 03:33:00,331 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 45 states, 32 states have (on average 1.03125) internal successors, (33), 32 states have internal predecessors, (33), 7 states have call successors, (7), 6 states have call predecessors, (7), 5 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-11-03 03:33:00,332 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 46 transitions. [2022-11-03 03:33:00,332 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 46 transitions. Word has length 28 [2022-11-03 03:33:00,332 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:33:00,333 INFO L495 AbstractCegarLoop]: Abstraction has 45 states and 46 transitions. [2022-11-03 03:33:00,333 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 9 states have (on average 2.111111111111111) internal successors, (19), 7 states have internal predecessors, (19), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (5), 3 states have call predecessors, (5), 1 states have call successors, (5) [2022-11-03 03:33:00,333 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 46 transitions. [2022-11-03 03:33:00,334 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2022-11-03 03:33:00,334 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:33:00,334 INFO L195 NwaCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 4, 4, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:33:00,386 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-11-03 03:33:00,570 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable6 [2022-11-03 03:33:00,570 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:33:00,570 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:33:00,570 INFO L85 PathProgramCache]: Analyzing trace with hash -235004718, now seen corresponding path program 2 times [2022-11-03 03:33:00,571 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-03 03:33:00,571 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1559971209] [2022-11-03 03:33:00,571 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:33:00,571 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-03 03:33:00,579 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-03 03:33:00,579 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1502797656] [2022-11-03 03:33:00,580 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-03 03:33:00,580 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:33:00,580 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:33:00,581 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:33:00,583 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-11-03 03:33:00,730 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2022-11-03 03:33:00,731 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 03:33:00,732 INFO L263 TraceCheckSpWp]: Trace formula consists of 131 conjuncts, 11 conjunts are in the unsatisfiable core [2022-11-03 03:33:00,734 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:33:00,852 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 8 proven. 56 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-03 03:33:00,852 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:33:00,965 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 8 proven. 32 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2022-11-03 03:33:00,965 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-03 03:33:00,965 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1559971209] [2022-11-03 03:33:00,965 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-03 03:33:00,966 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1502797656] [2022-11-03 03:33:00,966 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1502797656] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:33:00,966 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1301477595] [2022-11-03 03:33:00,968 INFO L159 IcfgInterpreter]: Started Sifa with 17 locations of interest [2022-11-03 03:33:00,968 INFO L166 IcfgInterpreter]: Building call graph [2022-11-03 03:33:00,968 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2022-11-03 03:33:00,968 INFO L176 IcfgInterpreter]: Starting interpretation [2022-11-03 03:33:00,969 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2022-11-03 03:33:01,601 INFO L197 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 68 for LOIs [2022-11-03 03:33:01,693 INFO L197 IcfgInterpreter]: Interpreting procedure assume_abort_if_not with input of size 97 for LOIs [2022-11-03 03:33:01,727 INFO L180 IcfgInterpreter]: Interpretation finished [2022-11-03 03:33:03,184 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '1778#(and (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond) (<= 1 ~counter~0) (= __VERIFIER_assert_~cond 0) (= |#NULL.offset| 0) (<= 0 |#StackHeapBarrier|) (= |#NULL.base| 0))' at error location [2022-11-03 03:33:03,184 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2022-11-03 03:33:03,184 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-03 03:33:03,184 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 8] total 14 [2022-11-03 03:33:03,184 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1049769173] [2022-11-03 03:33:03,185 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-03 03:33:03,185 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-11-03 03:33:03,185 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-03 03:33:03,186 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-11-03 03:33:03,186 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=161, Invalid=541, Unknown=0, NotChecked=0, Total=702 [2022-11-03 03:33:03,187 INFO L87 Difference]: Start difference. First operand 45 states and 46 transitions. Second operand has 14 states, 14 states have (on average 3.7142857142857144) internal successors, (52), 14 states have internal predecessors, (52), 11 states have call successors, (13), 7 states have call predecessors, (13), 6 states have return successors, (12), 10 states have call predecessors, (12), 10 states have call successors, (12) [2022-11-03 03:33:03,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:33:03,530 INFO L93 Difference]: Finished difference Result 98 states and 104 transitions. [2022-11-03 03:33:03,532 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2022-11-03 03:33:03,532 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 3.7142857142857144) internal successors, (52), 14 states have internal predecessors, (52), 11 states have call successors, (13), 7 states have call predecessors, (13), 6 states have return successors, (12), 10 states have call predecessors, (12), 10 states have call successors, (12) Word has length 46 [2022-11-03 03:33:03,532 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:33:03,533 INFO L225 Difference]: With dead ends: 98 [2022-11-03 03:33:03,533 INFO L226 Difference]: Without dead ends: 93 [2022-11-03 03:33:03,534 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 145 GetRequests, 111 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 405 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=274, Invalid=986, Unknown=0, NotChecked=0, Total=1260 [2022-11-03 03:33:03,535 INFO L413 NwaCegarLoop]: 23 mSDtfsCounter, 98 mSDsluCounter, 75 mSDsCounter, 0 mSdLazyCounter, 72 mSolverCounterSat, 51 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 98 SdHoareTripleChecker+Valid, 86 SdHoareTripleChecker+Invalid, 123 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 51 IncrementalHoareTripleChecker+Valid, 72 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-03 03:33:03,535 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [98 Valid, 86 Invalid, 123 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [51 Valid, 72 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-03 03:33:03,536 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states. [2022-11-03 03:33:03,560 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 93. [2022-11-03 03:33:03,560 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 93 states, 68 states have (on average 1.0147058823529411) internal successors, (69), 68 states have internal predecessors, (69), 13 states have call successors, (13), 12 states have call predecessors, (13), 11 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2022-11-03 03:33:03,562 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 94 transitions. [2022-11-03 03:33:03,562 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 94 transitions. Word has length 46 [2022-11-03 03:33:03,562 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:33:03,563 INFO L495 AbstractCegarLoop]: Abstraction has 93 states and 94 transitions. [2022-11-03 03:33:03,563 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 3.7142857142857144) internal successors, (52), 14 states have internal predecessors, (52), 11 states have call successors, (13), 7 states have call predecessors, (13), 6 states have return successors, (12), 10 states have call predecessors, (12), 10 states have call successors, (12) [2022-11-03 03:33:03,563 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 94 transitions. [2022-11-03 03:33:03,565 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2022-11-03 03:33:03,566 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:33:03,566 INFO L195 NwaCegarLoop]: trace histogram [11, 11, 10, 10, 10, 10, 10, 10, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:33:03,572 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-11-03 03:33:03,772 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:33:03,772 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:33:03,772 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:33:03,772 INFO L85 PathProgramCache]: Analyzing trace with hash -1419782260, now seen corresponding path program 3 times [2022-11-03 03:33:03,772 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-03 03:33:03,773 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1972107582] [2022-11-03 03:33:03,773 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:33:03,773 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-03 03:33:03,795 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-03 03:33:03,810 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [800922106] [2022-11-03 03:33:03,810 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-03 03:33:03,810 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:33:03,810 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:33:03,824 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:33:03,846 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-11-03 03:33:04,090 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-03 03:33:04,091 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 03:33:04,092 INFO L263 TraceCheckSpWp]: Trace formula consists of 227 conjuncts, 23 conjunts are in the unsatisfiable core [2022-11-03 03:33:04,096 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:33:04,358 INFO L134 CoverageAnalysis]: Checked inductivity of 402 backedges. 20 proven. 380 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-03 03:33:04,358 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:33:04,727 INFO L134 CoverageAnalysis]: Checked inductivity of 402 backedges. 20 proven. 200 refuted. 0 times theorem prover too weak. 182 trivial. 0 not checked. [2022-11-03 03:33:04,727 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-03 03:33:04,728 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1972107582] [2022-11-03 03:33:04,728 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-03 03:33:04,728 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [800922106] [2022-11-03 03:33:04,728 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [800922106] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:33:04,728 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1576420102] [2022-11-03 03:33:04,730 INFO L159 IcfgInterpreter]: Started Sifa with 17 locations of interest [2022-11-03 03:33:04,730 INFO L166 IcfgInterpreter]: Building call graph [2022-11-03 03:33:04,731 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2022-11-03 03:33:04,731 INFO L176 IcfgInterpreter]: Starting interpretation [2022-11-03 03:33:04,731 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2022-11-03 03:33:05,376 INFO L197 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 68 for LOIs [2022-11-03 03:33:05,476 INFO L197 IcfgInterpreter]: Interpreting procedure assume_abort_if_not with input of size 97 for LOIs [2022-11-03 03:33:05,507 INFO L180 IcfgInterpreter]: Interpretation finished [2022-11-03 03:33:08,221 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '2658#(and (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond) (<= 1 ~counter~0) (= __VERIFIER_assert_~cond 0) (= |#NULL.offset| 0) (<= 0 |#StackHeapBarrier|) (= |#NULL.base| 0))' at error location [2022-11-03 03:33:08,221 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2022-11-03 03:33:08,221 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-03 03:33:08,221 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 14] total 26 [2022-11-03 03:33:08,222 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1799391698] [2022-11-03 03:33:08,222 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-03 03:33:08,222 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-11-03 03:33:08,223 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-03 03:33:08,223 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-11-03 03:33:08,224 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=431, Invalid=1051, Unknown=0, NotChecked=0, Total=1482 [2022-11-03 03:33:08,224 INFO L87 Difference]: Start difference. First operand 93 states and 94 transitions. Second operand has 26 states, 26 states have (on average 4.076923076923077) internal successors, (106), 26 states have internal predecessors, (106), 23 states have call successors, (25), 13 states have call predecessors, (25), 12 states have return successors, (24), 22 states have call predecessors, (24), 22 states have call successors, (24) [2022-11-03 03:33:08,987 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:33:08,988 INFO L93 Difference]: Finished difference Result 194 states and 206 transitions. [2022-11-03 03:33:08,990 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2022-11-03 03:33:08,990 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 4.076923076923077) internal successors, (106), 26 states have internal predecessors, (106), 23 states have call successors, (25), 13 states have call predecessors, (25), 12 states have return successors, (24), 22 states have call predecessors, (24), 22 states have call successors, (24) Word has length 94 [2022-11-03 03:33:08,991 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:33:08,992 INFO L225 Difference]: With dead ends: 194 [2022-11-03 03:33:08,992 INFO L226 Difference]: Without dead ends: 189 [2022-11-03 03:33:08,994 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 301 GetRequests, 243 SyntacticMatches, 0 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1020 ImplicationChecksByTransitivity, 3.4s TimeCoverageRelationStatistics Valid=946, Invalid=2594, Unknown=0, NotChecked=0, Total=3540 [2022-11-03 03:33:08,995 INFO L413 NwaCegarLoop]: 35 mSDtfsCounter, 162 mSDsluCounter, 181 mSDsCounter, 0 mSdLazyCounter, 148 mSolverCounterSat, 89 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 162 SdHoareTripleChecker+Valid, 190 SdHoareTripleChecker+Invalid, 237 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 89 IncrementalHoareTripleChecker+Valid, 148 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-03 03:33:08,995 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [162 Valid, 190 Invalid, 237 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [89 Valid, 148 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-11-03 03:33:08,996 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189 states. [2022-11-03 03:33:09,033 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189 to 189. [2022-11-03 03:33:09,034 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 189 states, 140 states have (on average 1.0071428571428571) internal successors, (141), 140 states have internal predecessors, (141), 25 states have call successors, (25), 24 states have call predecessors, (25), 23 states have return successors, (24), 24 states have call predecessors, (24), 24 states have call successors, (24) [2022-11-03 03:33:09,035 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 189 states to 189 states and 190 transitions. [2022-11-03 03:33:09,036 INFO L78 Accepts]: Start accepts. Automaton has 189 states and 190 transitions. Word has length 94 [2022-11-03 03:33:09,036 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:33:09,036 INFO L495 AbstractCegarLoop]: Abstraction has 189 states and 190 transitions. [2022-11-03 03:33:09,037 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 4.076923076923077) internal successors, (106), 26 states have internal predecessors, (106), 23 states have call successors, (25), 13 states have call predecessors, (25), 12 states have return successors, (24), 22 states have call predecessors, (24), 22 states have call successors, (24) [2022-11-03 03:33:09,037 INFO L276 IsEmpty]: Start isEmpty. Operand 189 states and 190 transitions. [2022-11-03 03:33:09,040 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 191 [2022-11-03 03:33:09,040 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:33:09,040 INFO L195 NwaCegarLoop]: trace histogram [23, 23, 22, 22, 22, 22, 22, 22, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:33:09,079 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-11-03 03:33:09,254 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:33:09,254 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:33:09,254 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:33:09,255 INFO L85 PathProgramCache]: Analyzing trace with hash -1763378944, now seen corresponding path program 4 times [2022-11-03 03:33:09,255 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-03 03:33:09,255 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1104029800] [2022-11-03 03:33:09,255 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:33:09,255 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-03 03:33:09,292 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-03 03:33:09,292 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [816790079] [2022-11-03 03:33:09,292 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-11-03 03:33:09,292 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:33:09,293 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:33:09,294 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:33:09,317 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-11-03 03:33:09,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 03:33:09,429 INFO L263 TraceCheckSpWp]: Trace formula consists of 419 conjuncts, 47 conjunts are in the unsatisfiable core [2022-11-03 03:33:09,434 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:33:10,104 INFO L134 CoverageAnalysis]: Checked inductivity of 1938 backedges. 44 proven. 1892 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-03 03:33:10,105 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:33:11,195 INFO L134 CoverageAnalysis]: Checked inductivity of 1938 backedges. 44 proven. 968 refuted. 0 times theorem prover too weak. 926 trivial. 0 not checked. [2022-11-03 03:33:11,195 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-03 03:33:11,196 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1104029800] [2022-11-03 03:33:11,196 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-03 03:33:11,196 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [816790079] [2022-11-03 03:33:11,196 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [816790079] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:33:11,196 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1859583942] [2022-11-03 03:33:11,198 INFO L159 IcfgInterpreter]: Started Sifa with 17 locations of interest [2022-11-03 03:33:11,198 INFO L166 IcfgInterpreter]: Building call graph [2022-11-03 03:33:11,198 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2022-11-03 03:33:11,199 INFO L176 IcfgInterpreter]: Starting interpretation [2022-11-03 03:33:11,199 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2022-11-03 03:33:11,823 INFO L197 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 68 for LOIs [2022-11-03 03:33:11,903 INFO L197 IcfgInterpreter]: Interpreting procedure assume_abort_if_not with input of size 97 for LOIs [2022-11-03 03:33:11,942 INFO L180 IcfgInterpreter]: Interpretation finished [2022-11-03 03:33:14,449 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '4426#(and (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond) (<= 1 ~counter~0) (= __VERIFIER_assert_~cond 0) (= |#NULL.offset| 0) (<= 0 |#StackHeapBarrier|) (= |#NULL.base| 0))' at error location [2022-11-03 03:33:14,449 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2022-11-03 03:33:14,449 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-03 03:33:14,449 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 26] total 50 [2022-11-03 03:33:14,451 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1312766796] [2022-11-03 03:33:14,451 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-03 03:33:14,454 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 50 states [2022-11-03 03:33:14,454 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-03 03:33:14,455 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2022-11-03 03:33:14,456 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1403, Invalid=2503, Unknown=0, NotChecked=0, Total=3906 [2022-11-03 03:33:14,457 INFO L87 Difference]: Start difference. First operand 189 states and 190 transitions. Second operand has 50 states, 50 states have (on average 4.28) internal successors, (214), 50 states have internal predecessors, (214), 47 states have call successors, (49), 25 states have call predecessors, (49), 24 states have return successors, (48), 46 states have call predecessors, (48), 46 states have call successors, (48) [2022-11-03 03:33:16,760 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:33:16,760 INFO L93 Difference]: Finished difference Result 386 states and 410 transitions. [2022-11-03 03:33:16,760 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 94 states. [2022-11-03 03:33:16,761 INFO L78 Accepts]: Start accepts. Automaton has has 50 states, 50 states have (on average 4.28) internal successors, (214), 50 states have internal predecessors, (214), 47 states have call successors, (49), 25 states have call predecessors, (49), 24 states have return successors, (48), 46 states have call predecessors, (48), 46 states have call successors, (48) Word has length 190 [2022-11-03 03:33:16,762 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:33:16,765 INFO L225 Difference]: With dead ends: 386 [2022-11-03 03:33:16,765 INFO L226 Difference]: Without dead ends: 381 [2022-11-03 03:33:16,769 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 613 GetRequests, 507 SyntacticMatches, 0 SemanticMatches, 106 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2790 ImplicationChecksByTransitivity, 5.0s TimeCoverageRelationStatistics Valid=3586, Invalid=7970, Unknown=0, NotChecked=0, Total=11556 [2022-11-03 03:33:16,770 INFO L413 NwaCegarLoop]: 59 mSDtfsCounter, 681 mSDsluCounter, 325 mSDsCounter, 0 mSdLazyCounter, 344 mSolverCounterSat, 278 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 681 SdHoareTripleChecker+Valid, 334 SdHoareTripleChecker+Invalid, 622 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 278 IncrementalHoareTripleChecker+Valid, 344 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-11-03 03:33:16,770 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [681 Valid, 334 Invalid, 622 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [278 Valid, 344 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-11-03 03:33:16,771 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 381 states. [2022-11-03 03:33:16,826 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 381 to 381. [2022-11-03 03:33:16,827 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 381 states, 284 states have (on average 1.0035211267605635) internal successors, (285), 284 states have internal predecessors, (285), 49 states have call successors, (49), 48 states have call predecessors, (49), 47 states have return successors, (48), 48 states have call predecessors, (48), 48 states have call successors, (48) [2022-11-03 03:33:16,829 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 381 states to 381 states and 382 transitions. [2022-11-03 03:33:16,829 INFO L78 Accepts]: Start accepts. Automaton has 381 states and 382 transitions. Word has length 190 [2022-11-03 03:33:16,830 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:33:16,830 INFO L495 AbstractCegarLoop]: Abstraction has 381 states and 382 transitions. [2022-11-03 03:33:16,830 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 50 states, 50 states have (on average 4.28) internal successors, (214), 50 states have internal predecessors, (214), 47 states have call successors, (49), 25 states have call predecessors, (49), 24 states have return successors, (48), 46 states have call predecessors, (48), 46 states have call successors, (48) [2022-11-03 03:33:16,830 INFO L276 IsEmpty]: Start isEmpty. Operand 381 states and 382 transitions. [2022-11-03 03:33:16,838 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 383 [2022-11-03 03:33:16,838 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:33:16,839 INFO L195 NwaCegarLoop]: trace histogram [47, 47, 46, 46, 46, 46, 46, 46, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:33:16,873 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-11-03 03:33:17,051 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-11-03 03:33:17,052 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:33:17,052 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:33:17,052 INFO L85 PathProgramCache]: Analyzing trace with hash 1767238632, now seen corresponding path program 5 times [2022-11-03 03:33:17,052 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-03 03:33:17,053 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1935363150] [2022-11-03 03:33:17,053 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:33:17,053 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-03 03:33:17,085 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-03 03:33:17,085 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1435680098] [2022-11-03 03:33:17,085 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-03 03:33:17,086 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:33:17,086 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:33:17,087 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:33:17,094 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-11-03 03:36:23,128 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 47 check-sat command(s) [2022-11-03 03:36:23,128 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 03:36:23,174 INFO L263 TraceCheckSpWp]: Trace formula consists of 803 conjuncts, 95 conjunts are in the unsatisfiable core [2022-11-03 03:36:23,183 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:36:24,981 INFO L134 CoverageAnalysis]: Checked inductivity of 8466 backedges. 92 proven. 8372 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-03 03:36:24,981 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:36:28,599 INFO L134 CoverageAnalysis]: Checked inductivity of 8466 backedges. 92 proven. 4232 refuted. 0 times theorem prover too weak. 4142 trivial. 0 not checked. [2022-11-03 03:36:28,609 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-03 03:36:28,609 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1935363150] [2022-11-03 03:36:28,609 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-03 03:36:28,610 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1435680098] [2022-11-03 03:36:28,610 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1435680098] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:36:28,610 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [694175977] [2022-11-03 03:36:28,612 INFO L159 IcfgInterpreter]: Started Sifa with 17 locations of interest [2022-11-03 03:36:28,612 INFO L166 IcfgInterpreter]: Building call graph [2022-11-03 03:36:28,613 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2022-11-03 03:36:28,613 INFO L176 IcfgInterpreter]: Starting interpretation [2022-11-03 03:36:28,613 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2022-11-03 03:36:29,256 INFO L197 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 68 for LOIs [2022-11-03 03:36:29,321 INFO L197 IcfgInterpreter]: Interpreting procedure assume_abort_if_not with input of size 97 for LOIs [2022-11-03 03:36:29,350 INFO L180 IcfgInterpreter]: Interpretation finished [2022-11-03 03:36:31,689 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '7970#(and (<= |#NULL.offset| 0) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond) (<= 1 ~counter~0) (= __VERIFIER_assert_~cond 0) (<= 0 |#NULL.offset|) (<= 0 |#StackHeapBarrier|) (= |#NULL.base| 0))' at error location [2022-11-03 03:36:31,690 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2022-11-03 03:36:31,690 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-03 03:36:31,690 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 50] total 98 [2022-11-03 03:36:31,690 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1391364238] [2022-11-03 03:36:31,691 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-03 03:36:31,692 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 98 states [2022-11-03 03:36:31,692 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-03 03:36:31,694 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 98 interpolants. [2022-11-03 03:36:31,696 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5075, Invalid=7135, Unknown=0, NotChecked=0, Total=12210 [2022-11-03 03:36:31,697 INFO L87 Difference]: Start difference. First operand 381 states and 382 transitions. Second operand has 98 states, 98 states have (on average 4.387755102040816) internal successors, (430), 98 states have internal predecessors, (430), 95 states have call successors, (97), 49 states have call predecessors, (97), 48 states have return successors, (96), 94 states have call predecessors, (96), 94 states have call successors, (96) [2022-11-03 03:36:38,736 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:36:38,736 INFO L93 Difference]: Finished difference Result 770 states and 818 transitions. [2022-11-03 03:36:38,736 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 190 states. [2022-11-03 03:36:38,738 INFO L78 Accepts]: Start accepts. Automaton has has 98 states, 98 states have (on average 4.387755102040816) internal successors, (430), 98 states have internal predecessors, (430), 95 states have call successors, (97), 49 states have call predecessors, (97), 48 states have return successors, (96), 94 states have call predecessors, (96), 94 states have call successors, (96) Word has length 382 [2022-11-03 03:36:38,739 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:36:38,743 INFO L225 Difference]: With dead ends: 770 [2022-11-03 03:36:38,743 INFO L226 Difference]: Without dead ends: 765 [2022-11-03 03:36:38,752 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 1237 GetRequests, 1035 SyntacticMatches, 0 SemanticMatches, 202 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8490 ImplicationChecksByTransitivity, 11.1s TimeCoverageRelationStatistics Valid=14050, Invalid=27362, Unknown=0, NotChecked=0, Total=41412 [2022-11-03 03:36:38,753 INFO L413 NwaCegarLoop]: 107 mSDtfsCounter, 1064 mSDsluCounter, 520 mSDsCounter, 0 mSdLazyCounter, 771 mSolverCounterSat, 429 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1064 SdHoareTripleChecker+Valid, 531 SdHoareTripleChecker+Invalid, 1200 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 429 IncrementalHoareTripleChecker+Valid, 771 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2022-11-03 03:36:38,754 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1064 Valid, 531 Invalid, 1200 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [429 Valid, 771 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2022-11-03 03:36:38,755 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 765 states. [2022-11-03 03:36:38,845 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 765 to 765. [2022-11-03 03:36:38,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 765 states, 572 states have (on average 1.0017482517482517) internal successors, (573), 572 states have internal predecessors, (573), 97 states have call successors, (97), 96 states have call predecessors, (97), 95 states have return successors, (96), 96 states have call predecessors, (96), 96 states have call successors, (96) [2022-11-03 03:36:38,851 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 765 states to 765 states and 766 transitions. [2022-11-03 03:36:38,852 INFO L78 Accepts]: Start accepts. Automaton has 765 states and 766 transitions. Word has length 382 [2022-11-03 03:36:38,853 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:36:38,853 INFO L495 AbstractCegarLoop]: Abstraction has 765 states and 766 transitions. [2022-11-03 03:36:38,854 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 98 states, 98 states have (on average 4.387755102040816) internal successors, (430), 98 states have internal predecessors, (430), 95 states have call successors, (97), 49 states have call predecessors, (97), 48 states have return successors, (96), 94 states have call predecessors, (96), 94 states have call successors, (96) [2022-11-03 03:36:38,854 INFO L276 IsEmpty]: Start isEmpty. Operand 765 states and 766 transitions. [2022-11-03 03:36:38,885 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 767 [2022-11-03 03:36:38,886 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:36:38,886 INFO L195 NwaCegarLoop]: trace histogram [95, 95, 94, 94, 94, 94, 94, 94, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:36:38,922 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-11-03 03:36:39,102 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable10 [2022-11-03 03:36:39,102 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:36:39,103 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:36:39,103 INFO L85 PathProgramCache]: Analyzing trace with hash 1053987256, now seen corresponding path program 6 times [2022-11-03 03:36:39,103 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-03 03:36:39,103 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [567303928] [2022-11-03 03:36:39,103 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:36:39,103 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-03 03:36:39,148 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-03 03:36:39,148 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2101880919] [2022-11-03 03:36:39,149 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-03 03:36:39,149 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:36:39,149 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:36:39,150 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:36:39,153 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-11-03 03:37:20,696 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-03 03:37:20,697 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-03 03:37:20,725 INFO L263 TraceCheckSpWp]: Trace formula consists of 1571 conjuncts, 191 conjunts are in the unsatisfiable core [2022-11-03 03:37:20,743 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 03:37:26,045 INFO L134 CoverageAnalysis]: Checked inductivity of 35346 backedges. 188 proven. 35156 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-03 03:37:26,045 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 03:37:31,433 INFO L134 CoverageAnalysis]: Checked inductivity of 35346 backedges. 188 proven. 17672 refuted. 0 times theorem prover too weak. 17486 trivial. 0 not checked. [2022-11-03 03:37:31,433 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-03 03:37:31,433 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [567303928] [2022-11-03 03:37:31,433 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-03 03:37:31,433 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2101880919] [2022-11-03 03:37:31,433 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2101880919] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 03:37:31,434 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [414687633] [2022-11-03 03:37:31,436 INFO L159 IcfgInterpreter]: Started Sifa with 17 locations of interest [2022-11-03 03:37:31,436 INFO L166 IcfgInterpreter]: Building call graph [2022-11-03 03:37:31,436 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2022-11-03 03:37:31,436 INFO L176 IcfgInterpreter]: Starting interpretation [2022-11-03 03:37:31,437 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2022-11-03 03:37:32,084 INFO L197 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 68 for LOIs [2022-11-03 03:37:32,161 INFO L197 IcfgInterpreter]: Interpreting procedure assume_abort_if_not with input of size 97 for LOIs [2022-11-03 03:37:32,210 INFO L180 IcfgInterpreter]: Interpretation finished [2022-11-03 03:37:35,176 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '14976#(and (<= |#NULL.offset| 0) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond) (<= 1 ~counter~0) (= __VERIFIER_assert_~cond 0) (<= 0 |#NULL.offset|) (<= 0 |#StackHeapBarrier|) (= |#NULL.base| 0))' at error location [2022-11-03 03:37:35,176 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2022-11-03 03:37:35,176 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-03 03:37:35,176 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [97, 98] total 104 [2022-11-03 03:37:35,177 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1029486101] [2022-11-03 03:37:35,177 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-03 03:37:35,179 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 104 states [2022-11-03 03:37:35,179 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-03 03:37:35,181 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 104 interpolants. [2022-11-03 03:37:35,182 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5696, Invalid=7876, Unknown=0, NotChecked=0, Total=13572 [2022-11-03 03:37:35,184 INFO L87 Difference]: Start difference. First operand 765 states and 766 transitions. Second operand has 104 states, 104 states have (on average 5.721153846153846) internal successors, (595), 104 states have internal predecessors, (595), 101 states have call successors, (193), 97 states have call predecessors, (193), 96 states have return successors, (192), 100 states have call predecessors, (192), 100 states have call successors, (192) [2022-11-03 03:37:42,408 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 03:37:42,408 INFO L93 Difference]: Finished difference Result 818 states and 824 transitions. [2022-11-03 03:37:42,410 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 202 states. [2022-11-03 03:37:42,410 INFO L78 Accepts]: Start accepts. Automaton has has 104 states, 104 states have (on average 5.721153846153846) internal successors, (595), 104 states have internal predecessors, (595), 101 states have call successors, (193), 97 states have call predecessors, (193), 96 states have return successors, (192), 100 states have call predecessors, (192), 100 states have call successors, (192) Word has length 766 [2022-11-03 03:37:42,411 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 03:37:42,415 INFO L225 Difference]: With dead ends: 818 [2022-11-03 03:37:42,415 INFO L226 Difference]: Without dead ends: 813 [2022-11-03 03:37:42,422 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2395 GetRequests, 2091 SyntacticMatches, 90 SemanticMatches, 214 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12375 ImplicationChecksByTransitivity, 16.9s TimeCoverageRelationStatistics Valid=15889, Invalid=30551, Unknown=0, NotChecked=0, Total=46440 [2022-11-03 03:37:42,423 INFO L413 NwaCegarLoop]: 113 mSDtfsCounter, 893 mSDsluCounter, 649 mSDsCounter, 0 mSdLazyCounter, 871 mSolverCounterSat, 317 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 893 SdHoareTripleChecker+Valid, 658 SdHoareTripleChecker+Invalid, 1188 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 317 IncrementalHoareTripleChecker+Valid, 871 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2022-11-03 03:37:42,423 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [893 Valid, 658 Invalid, 1188 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [317 Valid, 871 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2022-11-03 03:37:42,424 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 813 states. [2022-11-03 03:37:42,526 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 813 to 813. [2022-11-03 03:37:42,527 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 813 states, 608 states have (on average 1.0016447368421053) internal successors, (609), 608 states have internal predecessors, (609), 103 states have call successors, (103), 102 states have call predecessors, (103), 101 states have return successors, (102), 102 states have call predecessors, (102), 102 states have call successors, (102) [2022-11-03 03:37:42,531 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 813 states to 813 states and 814 transitions. [2022-11-03 03:37:42,531 INFO L78 Accepts]: Start accepts. Automaton has 813 states and 814 transitions. Word has length 766 [2022-11-03 03:37:42,533 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 03:37:42,533 INFO L495 AbstractCegarLoop]: Abstraction has 813 states and 814 transitions. [2022-11-03 03:37:42,534 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 104 states, 104 states have (on average 5.721153846153846) internal successors, (595), 104 states have internal predecessors, (595), 101 states have call successors, (193), 97 states have call predecessors, (193), 96 states have return successors, (192), 100 states have call predecessors, (192), 100 states have call successors, (192) [2022-11-03 03:37:42,534 INFO L276 IsEmpty]: Start isEmpty. Operand 813 states and 814 transitions. [2022-11-03 03:37:42,543 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 815 [2022-11-03 03:37:42,544 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 03:37:42,544 INFO L195 NwaCegarLoop]: trace histogram [101, 101, 100, 100, 100, 100, 100, 100, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 03:37:42,558 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Ended with exit code 0 [2022-11-03 03:37:42,750 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable11 [2022-11-03 03:37:42,751 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 03:37:42,751 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 03:37:42,751 INFO L85 PathProgramCache]: Analyzing trace with hash 1872537714, now seen corresponding path program 7 times [2022-11-03 03:37:42,751 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-03 03:37:42,752 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [889523748] [2022-11-03 03:37:42,752 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 03:37:42,752 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-03 03:37:42,824 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-03 03:37:42,826 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [353213925] [2022-11-03 03:37:42,826 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-11-03 03:37:42,827 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 03:37:42,827 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 03:37:42,828 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 03:37:42,858 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-11-03 03:37:57,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-03 03:37:57,755 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-03 03:38:15,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-03 03:38:16,389 INFO L130 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2022-11-03 03:38:16,390 INFO L359 BasicCegarLoop]: Counterexample is feasible [2022-11-03 03:38:16,391 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-11-03 03:38:16,408 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2022-11-03 03:38:16,595 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2022-11-03 03:38:16,598 INFO L444 BasicCegarLoop]: Path program histogram: [7, 1, 1, 1, 1, 1, 1] [2022-11-03 03:38:16,604 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-03 03:38:16,897 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 03.11 03:38:16 BoogieIcfgContainer [2022-11-03 03:38:16,897 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-03 03:38:16,898 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-03 03:38:16,898 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-03 03:38:16,899 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-03 03:38:16,899 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 03:31:59" (3/4) ... [2022-11-03 03:38:16,901 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2022-11-03 03:38:17,195 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/witness.graphml [2022-11-03 03:38:17,195 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-03 03:38:17,197 INFO L158 Benchmark]: Toolchain (without parser) took 378228.38ms. Allocated memory was 104.9MB in the beginning and 249.6MB in the end (delta: 144.7MB). Free memory was 67.1MB in the beginning and 151.2MB in the end (delta: -84.0MB). Peak memory consumption was 61.4MB. Max. memory is 16.1GB. [2022-11-03 03:38:17,197 INFO L158 Benchmark]: CDTParser took 0.28ms. Allocated memory is still 104.9MB. Free memory is still 83.3MB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-03 03:38:17,198 INFO L158 Benchmark]: CACSL2BoogieTranslator took 285.09ms. Allocated memory is still 104.9MB. Free memory was 67.0MB in the beginning and 81.0MB in the end (delta: -14.0MB). Peak memory consumption was 12.6MB. Max. memory is 16.1GB. [2022-11-03 03:38:17,198 INFO L158 Benchmark]: Boogie Procedure Inliner took 34.23ms. Allocated memory is still 104.9MB. Free memory was 81.0MB in the beginning and 79.3MB in the end (delta: 1.7MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-11-03 03:38:17,199 INFO L158 Benchmark]: Boogie Preprocessor took 21.34ms. Allocated memory is still 104.9MB. Free memory was 79.3MB in the beginning and 78.2MB in the end (delta: 1.1MB). There was no memory consumed. Max. memory is 16.1GB. [2022-11-03 03:38:17,199 INFO L158 Benchmark]: RCFGBuilder took 328.32ms. Allocated memory is still 104.9MB. Free memory was 78.2MB in the beginning and 66.0MB in the end (delta: 12.2MB). Peak memory consumption was 12.6MB. Max. memory is 16.1GB. [2022-11-03 03:38:17,199 INFO L158 Benchmark]: TraceAbstraction took 377254.96ms. Allocated memory was 104.9MB in the beginning and 249.6MB in the end (delta: 144.7MB). Free memory was 65.4MB in the beginning and 179.5MB in the end (delta: -114.1MB). Peak memory consumption was 131.2MB. Max. memory is 16.1GB. [2022-11-03 03:38:17,200 INFO L158 Benchmark]: Witness Printer took 297.30ms. Allocated memory is still 249.6MB. Free memory was 179.5MB in the beginning and 151.2MB in the end (delta: 28.3MB). Peak memory consumption was 29.4MB. Max. memory is 16.1GB. [2022-11-03 03:38:17,206 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.28ms. Allocated memory is still 104.9MB. Free memory is still 83.3MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 285.09ms. Allocated memory is still 104.9MB. Free memory was 67.0MB in the beginning and 81.0MB in the end (delta: -14.0MB). Peak memory consumption was 12.6MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 34.23ms. Allocated memory is still 104.9MB. Free memory was 81.0MB in the beginning and 79.3MB in the end (delta: 1.7MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * Boogie Preprocessor took 21.34ms. Allocated memory is still 104.9MB. Free memory was 79.3MB in the beginning and 78.2MB in the end (delta: 1.1MB). There was no memory consumed. Max. memory is 16.1GB. * RCFGBuilder took 328.32ms. Allocated memory is still 104.9MB. Free memory was 78.2MB in the beginning and 66.0MB in the end (delta: 12.2MB). Peak memory consumption was 12.6MB. Max. memory is 16.1GB. * TraceAbstraction took 377254.96ms. Allocated memory was 104.9MB in the beginning and 249.6MB in the end (delta: 144.7MB). Free memory was 65.4MB in the beginning and 179.5MB in the end (delta: -114.1MB). Peak memory consumption was 131.2MB. Max. memory is 16.1GB. * Witness Printer took 297.30ms. Allocated memory is still 249.6MB. Free memory was 179.5MB in the beginning and 151.2MB in the end (delta: 28.3MB). Peak memory consumption was 29.4MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 14]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L19] int counter = 0; [L21] int A, R; [L22] long long u, v, r; [L23] A = __VERIFIER_nondet_int() [L24] R = __VERIFIER_nondet_int() [L26] CALL assume_abort_if_not(((long long) R - 1) * ((long long) R - 1) < A) VAL [\old(cond)=1, counter=0] [L9] COND FALSE !(!cond) [L26] RET assume_abort_if_not(((long long) R - 1) * ((long long) R - 1) < A) VAL [A=9557, counter=0, R=82] [L28] CALL assume_abort_if_not(A % 2 == 1) VAL [\old(cond)=1, counter=0] [L9] COND FALSE !(!cond) [L28] RET assume_abort_if_not(A % 2 == 1) VAL [A=9557, counter=0, R=82] [L30] u = ((long long) 2 * R) + 1 [L31] v = 1 [L32] r = ((long long) R * R) - A VAL [A=9557, counter=0, r=-2833, R=82, u=165, v=1] [L34] EXPR counter++ VAL [A=9557, counter=1, counter++=0, r=-2833, R=82, u=165, v=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=1] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=1] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=1, r=-2833, R=82, u=165, v=1] [L36] COND FALSE !(!(r != 0)) [L38] COND FALSE !(r > 0) [L42] r = r + u [L43] u = u + 2 VAL [A=9557, counter=1, R=82, r=-2668, u=167, v=1] [L34] EXPR counter++ VAL [A=9557, counter=2, counter++=1, r=-2668, R=82, u=167, v=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=2] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=2] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=2, R=82, r=-2668, u=167, v=1] [L36] COND FALSE !(!(r != 0)) [L38] COND FALSE !(r > 0) [L42] r = r + u [L43] u = u + 2 VAL [A=9557, counter=2, R=82, r=-2501, u=169, v=1] [L34] EXPR counter++ VAL [A=9557, counter=3, counter++=2, R=82, r=-2501, u=169, v=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=3] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=3] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=3, R=82, r=-2501, u=169, v=1] [L36] COND FALSE !(!(r != 0)) [L38] COND FALSE !(r > 0) [L42] r = r + u [L43] u = u + 2 VAL [A=9557, counter=3, r=-2332, R=82, u=171, v=1] [L34] EXPR counter++ VAL [A=9557, counter=4, counter++=3, r=-2332, R=82, u=171, v=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=4] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=4] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=4, r=-2332, R=82, u=171, v=1] [L36] COND FALSE !(!(r != 0)) [L38] COND FALSE !(r > 0) [L42] r = r + u [L43] u = u + 2 VAL [A=9557, counter=4, r=-2161, R=82, u=173, v=1] [L34] EXPR counter++ VAL [A=9557, counter=5, counter++=4, r=-2161, R=82, u=173, v=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=5] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=5] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=5, r=-2161, R=82, u=173, v=1] [L36] COND FALSE !(!(r != 0)) [L38] COND FALSE !(r > 0) [L42] r = r + u [L43] u = u + 2 VAL [A=9557, counter=5, R=82, r=-1988, u=175, v=1] [L34] EXPR counter++ VAL [A=9557, counter=6, counter++=5, r=-1988, R=82, u=175, v=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=6] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=6] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=6, R=82, r=-1988, u=175, v=1] [L36] COND FALSE !(!(r != 0)) [L38] COND FALSE !(r > 0) [L42] r = r + u [L43] u = u + 2 VAL [A=9557, counter=6, R=82, r=-1813, u=177, v=1] [L34] EXPR counter++ VAL [A=9557, counter=7, counter++=6, r=-1813, R=82, u=177, v=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=7] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=7] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=7, R=82, r=-1813, u=177, v=1] [L36] COND FALSE !(!(r != 0)) [L38] COND FALSE !(r > 0) [L42] r = r + u [L43] u = u + 2 VAL [A=9557, counter=7, r=-1636, R=82, u=179, v=1] [L34] EXPR counter++ VAL [A=9557, counter=8, counter++=7, r=-1636, R=82, u=179, v=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=8] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=8] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=8, r=-1636, R=82, u=179, v=1] [L36] COND FALSE !(!(r != 0)) [L38] COND FALSE !(r > 0) [L42] r = r + u [L43] u = u + 2 VAL [A=9557, counter=8, R=82, r=-1457, u=181, v=1] [L34] EXPR counter++ VAL [A=9557, counter=9, counter++=8, r=-1457, R=82, u=181, v=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=9] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=9] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=9, r=-1457, R=82, u=181, v=1] [L36] COND FALSE !(!(r != 0)) [L38] COND FALSE !(r > 0) [L42] r = r + u [L43] u = u + 2 VAL [A=9557, counter=9, R=82, r=-1276, u=183, v=1] [L34] EXPR counter++ VAL [A=9557, counter=10, counter++=9, r=-1276, R=82, u=183, v=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=10] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=10] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=10, R=82, r=-1276, u=183, v=1] [L36] COND FALSE !(!(r != 0)) [L38] COND FALSE !(r > 0) [L42] r = r + u [L43] u = u + 2 VAL [A=9557, counter=10, r=-1093, R=82, u=185, v=1] [L34] EXPR counter++ VAL [A=9557, counter=11, counter++=10, R=82, r=-1093, u=185, v=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=11] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=11] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=11, r=-1093, R=82, u=185, v=1] [L36] COND FALSE !(!(r != 0)) [L38] COND FALSE !(r > 0) [L42] r = r + u [L43] u = u + 2 VAL [A=9557, counter=11, r=-908, R=82, u=187, v=1] [L34] EXPR counter++ VAL [A=9557, counter=12, counter++=11, R=82, r=-908, u=187, v=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=12] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=12] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=12, R=82, r=-908, u=187, v=1] [L36] COND FALSE !(!(r != 0)) [L38] COND FALSE !(r > 0) [L42] r = r + u [L43] u = u + 2 VAL [A=9557, counter=12, r=-721, R=82, u=189, v=1] [L34] EXPR counter++ VAL [A=9557, counter=13, counter++=12, r=-721, R=82, u=189, v=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=13] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=13] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=13, R=82, r=-721, u=189, v=1] [L36] COND FALSE !(!(r != 0)) [L38] COND FALSE !(r > 0) [L42] r = r + u [L43] u = u + 2 VAL [A=9557, counter=13, r=-532, R=82, u=191, v=1] [L34] EXPR counter++ VAL [A=9557, counter=14, counter++=13, r=-532, R=82, u=191, v=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=14] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=14] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=14, r=-532, R=82, u=191, v=1] [L36] COND FALSE !(!(r != 0)) [L38] COND FALSE !(r > 0) [L42] r = r + u [L43] u = u + 2 VAL [A=9557, counter=14, R=82, r=-341, u=193, v=1] [L34] EXPR counter++ VAL [A=9557, counter=15, counter++=14, r=-341, R=82, u=193, v=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=15] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=15] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=15, r=-341, R=82, u=193, v=1] [L36] COND FALSE !(!(r != 0)) [L38] COND FALSE !(r > 0) [L42] r = r + u [L43] u = u + 2 VAL [A=9557, counter=15, R=82, r=-148, u=195, v=1] [L34] EXPR counter++ VAL [A=9557, counter=16, counter++=15, R=82, r=-148, u=195, v=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=16] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=16] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=16, R=82, r=-148, u=195, v=1] [L36] COND FALSE !(!(r != 0)) [L38] COND FALSE !(r > 0) [L42] r = r + u [L43] u = u + 2 VAL [A=9557, counter=16, r=47, R=82, u=197, v=1] [L34] EXPR counter++ VAL [A=9557, counter=17, counter++=16, r=47, R=82, u=197, v=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=17] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=17] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=17, r=47, R=82, u=197, v=1] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=17, R=82, r=46, u=197, v=3] [L34] EXPR counter++ VAL [A=9557, counter=18, counter++=17, R=82, r=46, u=197, v=3] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=18] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=18] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=18, r=46, R=82, u=197, v=3] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=18, r=43, R=82, u=197, v=5] [L34] EXPR counter++ VAL [A=9557, counter=19, counter++=18, R=82, r=43, u=197, v=5] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=19] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=19] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=19, r=43, R=82, u=197, v=5] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=19, r=38, R=82, u=197, v=7] [L34] EXPR counter++ VAL [A=9557, counter=20, counter++=19, R=82, r=38, u=197, v=7] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=20] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=20] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=20, R=82, r=38, u=197, v=7] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=20, R=82, r=31, u=197, v=9] [L34] EXPR counter++ VAL [A=9557, counter=21, counter++=20, R=82, r=31, u=197, v=9] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=21] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=21] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=21, r=31, R=82, u=197, v=9] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=21, R=82, r=22, u=197, v=11] [L34] EXPR counter++ VAL [A=9557, counter=22, counter++=21, R=82, r=22, u=197, v=11] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=22] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=22] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=22, R=82, r=22, u=197, v=11] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=22, r=11, R=82, u=197, v=13] [L34] EXPR counter++ VAL [A=9557, counter=23, counter++=22, r=11, R=82, u=197, v=13] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=23] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=23] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=23, r=11, R=82, u=197, v=13] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=23, r=-2, R=82, u=197, v=15] [L34] EXPR counter++ VAL [A=9557, counter=24, counter++=23, r=-2, R=82, u=197, v=15] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=24] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=24] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=24, r=-2, R=82, u=197, v=15] [L36] COND FALSE !(!(r != 0)) [L38] COND FALSE !(r > 0) [L42] r = r + u [L43] u = u + 2 VAL [A=9557, counter=24, r=195, R=82, u=199, v=15] [L34] EXPR counter++ VAL [A=9557, counter=25, counter++=24, r=195, R=82, u=199, v=15] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=25] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=25] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=25, r=195, R=82, u=199, v=15] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=25, r=180, R=82, u=199, v=17] [L34] EXPR counter++ VAL [A=9557, counter=26, counter++=25, R=82, r=180, u=199, v=17] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=26] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=26] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=26, r=180, R=82, u=199, v=17] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=26, R=82, r=163, u=199, v=19] [L34] EXPR counter++ VAL [A=9557, counter=27, counter++=26, r=163, R=82, u=199, v=19] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=27] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=27] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=27, r=163, R=82, u=199, v=19] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=27, R=82, r=144, u=199, v=21] [L34] EXPR counter++ VAL [A=9557, counter=28, counter++=27, R=82, r=144, u=199, v=21] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=28] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=28] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=28, R=82, r=144, u=199, v=21] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=28, R=82, r=123, u=199, v=23] [L34] EXPR counter++ VAL [A=9557, counter=29, counter++=28, r=123, R=82, u=199, v=23] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=29] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=29] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=29, r=123, R=82, u=199, v=23] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=29, r=100, R=82, u=199, v=25] [L34] EXPR counter++ VAL [A=9557, counter=30, counter++=29, R=82, r=100, u=199, v=25] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=30] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=30] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=30, r=100, R=82, u=199, v=25] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=30, r=75, R=82, u=199, v=27] [L34] EXPR counter++ VAL [A=9557, counter=31, counter++=30, R=82, r=75, u=199, v=27] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=31] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=31] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=31, R=82, r=75, u=199, v=27] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=31, r=48, R=82, u=199, v=29] [L34] EXPR counter++ VAL [A=9557, counter=32, counter++=31, r=48, R=82, u=199, v=29] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=32] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=32] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=32, r=48, R=82, u=199, v=29] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=32, R=82, r=19, u=199, v=31] [L34] EXPR counter++ VAL [A=9557, counter=33, counter++=32, r=19, R=82, u=199, v=31] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=33] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=33] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=33, R=82, r=19, u=199, v=31] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=33, r=-12, R=82, u=199, v=33] [L34] EXPR counter++ VAL [A=9557, counter=34, counter++=33, R=82, r=-12, u=199, v=33] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=34] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=34] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=34, r=-12, R=82, u=199, v=33] [L36] COND FALSE !(!(r != 0)) [L38] COND FALSE !(r > 0) [L42] r = r + u [L43] u = u + 2 VAL [A=9557, counter=34, r=187, R=82, u=201, v=33] [L34] EXPR counter++ VAL [A=9557, counter=35, counter++=34, r=187, R=82, u=201, v=33] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=35] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=35] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=35, r=187, R=82, u=201, v=33] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=35, r=154, R=82, u=201, v=35] [L34] EXPR counter++ VAL [A=9557, counter=36, counter++=35, R=82, r=154, u=201, v=35] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=36] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=36] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=36, R=82, r=154, u=201, v=35] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=36, r=119, R=82, u=201, v=37] [L34] EXPR counter++ VAL [A=9557, counter=37, counter++=36, r=119, R=82, u=201, v=37] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=37] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=37] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=37, r=119, R=82, u=201, v=37] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=37, R=82, r=82, u=201, v=39] [L34] EXPR counter++ VAL [A=9557, counter=38, counter++=37, r=82, R=82, u=201, v=39] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=38] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=38] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=38, r=82, R=82, u=201, v=39] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=38, r=43, R=82, u=201, v=41] [L34] EXPR counter++ VAL [A=9557, counter=39, counter++=38, r=43, R=82, u=201, v=41] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=39] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=39] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=39, R=82, r=43, u=201, v=41] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=39, r=2, R=82, u=201, v=43] [L34] EXPR counter++ VAL [A=9557, counter=40, counter++=39, r=2, R=82, u=201, v=43] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=40] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=40] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=40, r=2, R=82, u=201, v=43] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=40, r=-41, R=82, u=201, v=45] [L34] EXPR counter++ VAL [A=9557, counter=41, counter++=40, R=82, r=-41, u=201, v=45] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=41] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=41] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=41, R=82, r=-41, u=201, v=45] [L36] COND FALSE !(!(r != 0)) [L38] COND FALSE !(r > 0) [L42] r = r + u [L43] u = u + 2 VAL [A=9557, counter=41, r=160, R=82, u=203, v=45] [L34] EXPR counter++ VAL [A=9557, counter=42, counter++=41, r=160, R=82, u=203, v=45] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=42] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=42] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=42, R=82, r=160, u=203, v=45] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=42, R=82, r=115, u=203, v=47] [L34] EXPR counter++ VAL [A=9557, counter=43, counter++=42, r=115, R=82, u=203, v=47] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=43] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=43] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=43, r=115, R=82, u=203, v=47] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=43, R=82, r=68, u=203, v=49] [L34] EXPR counter++ VAL [A=9557, counter=44, counter++=43, R=82, r=68, u=203, v=49] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=44] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=44] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=44, R=82, r=68, u=203, v=49] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=44, R=82, r=19, u=203, v=51] [L34] EXPR counter++ VAL [A=9557, counter=45, counter++=44, R=82, r=19, u=203, v=51] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=45] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=45] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=45, r=19, R=82, u=203, v=51] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=45, R=82, r=-32, u=203, v=53] [L34] EXPR counter++ VAL [A=9557, counter=46, counter++=45, R=82, r=-32, u=203, v=53] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=46] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=46] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=46, r=-32, R=82, u=203, v=53] [L36] COND FALSE !(!(r != 0)) [L38] COND FALSE !(r > 0) [L42] r = r + u [L43] u = u + 2 VAL [A=9557, counter=46, R=82, r=171, u=205, v=53] [L34] EXPR counter++ VAL [A=9557, counter=47, counter++=46, r=171, R=82, u=205, v=53] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=47] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=47] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=47, R=82, r=171, u=205, v=53] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=47, R=82, r=118, u=205, v=55] [L34] EXPR counter++ VAL [A=9557, counter=48, counter++=47, r=118, R=82, u=205, v=55] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=48] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=48] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=48, R=82, r=118, u=205, v=55] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=48, R=82, r=63, u=205, v=57] [L34] EXPR counter++ VAL [A=9557, counter=49, counter++=48, r=63, R=82, u=205, v=57] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=49] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=49] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=49, R=82, r=63, u=205, v=57] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=49, r=6, R=82, u=205, v=59] [L34] EXPR counter++ VAL [A=9557, counter=50, counter++=49, r=6, R=82, u=205, v=59] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=50] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=50] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=50, r=6, R=82, u=205, v=59] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=50, R=82, r=-53, u=205, v=61] [L34] EXPR counter++ VAL [A=9557, counter=51, counter++=50, R=82, r=-53, u=205, v=61] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=51] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=51] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=51, R=82, r=-53, u=205, v=61] [L36] COND FALSE !(!(r != 0)) [L38] COND FALSE !(r > 0) [L42] r = r + u [L43] u = u + 2 VAL [A=9557, counter=51, R=82, r=152, u=207, v=61] [L34] EXPR counter++ VAL [A=9557, counter=52, counter++=51, R=82, r=152, u=207, v=61] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=52] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=52] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=52, r=152, R=82, u=207, v=61] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=52, R=82, r=91, u=207, v=63] [L34] EXPR counter++ VAL [A=9557, counter=53, counter++=52, R=82, r=91, u=207, v=63] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=53] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=53] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=53, r=91, R=82, u=207, v=63] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=53, r=28, R=82, u=207, v=65] [L34] EXPR counter++ VAL [A=9557, counter=54, counter++=53, R=82, r=28, u=207, v=65] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=54] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=54] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=54, r=28, R=82, u=207, v=65] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=54, R=82, r=-37, u=207, v=67] [L34] EXPR counter++ VAL [A=9557, counter=55, counter++=54, r=-37, R=82, u=207, v=67] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=55] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=55] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=55, r=-37, R=82, u=207, v=67] [L36] COND FALSE !(!(r != 0)) [L38] COND FALSE !(r > 0) [L42] r = r + u [L43] u = u + 2 VAL [A=9557, counter=55, r=170, R=82, u=209, v=67] [L34] EXPR counter++ VAL [A=9557, counter=56, counter++=55, r=170, R=82, u=209, v=67] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=56] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=56] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=56, R=82, r=170, u=209, v=67] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=56, R=82, r=103, u=209, v=69] [L34] EXPR counter++ VAL [A=9557, counter=57, counter++=56, r=103, R=82, u=209, v=69] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=57] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=57] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=57, r=103, R=82, u=209, v=69] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=57, R=82, r=34, u=209, v=71] [L34] EXPR counter++ VAL [A=9557, counter=58, counter++=57, R=82, r=34, u=209, v=71] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=58] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=58] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=58, r=34, R=82, u=209, v=71] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=58, R=82, r=-37, u=209, v=73] [L34] EXPR counter++ VAL [A=9557, counter=59, counter++=58, r=-37, R=82, u=209, v=73] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=59] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=59] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=59, r=-37, R=82, u=209, v=73] [L36] COND FALSE !(!(r != 0)) [L38] COND FALSE !(r > 0) [L42] r = r + u [L43] u = u + 2 VAL [A=9557, counter=59, R=82, r=172, u=211, v=73] [L34] EXPR counter++ VAL [A=9557, counter=60, counter++=59, r=172, R=82, u=211, v=73] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=60] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=60] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=60, r=172, R=82, u=211, v=73] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=60, r=99, R=82, u=211, v=75] [L34] EXPR counter++ VAL [A=9557, counter=61, counter++=60, R=82, r=99, u=211, v=75] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=61] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=61] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=61, R=82, r=99, u=211, v=75] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=61, R=82, r=24, u=211, v=77] [L34] EXPR counter++ VAL [A=9557, counter=62, counter++=61, R=82, r=24, u=211, v=77] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=62] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=62] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=62, R=82, r=24, u=211, v=77] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=62, R=82, r=-53, u=211, v=79] [L34] EXPR counter++ VAL [A=9557, counter=63, counter++=62, R=82, r=-53, u=211, v=79] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=63] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=63] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=63, R=82, r=-53, u=211, v=79] [L36] COND FALSE !(!(r != 0)) [L38] COND FALSE !(r > 0) [L42] r = r + u [L43] u = u + 2 VAL [A=9557, counter=63, r=158, R=82, u=213, v=79] [L34] EXPR counter++ VAL [A=9557, counter=64, counter++=63, R=82, r=158, u=213, v=79] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=64] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=64] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=64, r=158, R=82, u=213, v=79] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=64, r=79, R=82, u=213, v=81] [L34] EXPR counter++ VAL [A=9557, counter=65, counter++=64, r=79, R=82, u=213, v=81] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=65] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=65] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=65, R=82, r=79, u=213, v=81] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=65, R=82, r=-2, u=213, v=83] [L34] EXPR counter++ VAL [A=9557, counter=66, counter++=65, R=82, r=-2, u=213, v=83] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=66] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=66] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=66, r=-2, R=82, u=213, v=83] [L36] COND FALSE !(!(r != 0)) [L38] COND FALSE !(r > 0) [L42] r = r + u [L43] u = u + 2 VAL [A=9557, counter=66, R=82, r=211, u=215, v=83] [L34] EXPR counter++ VAL [A=9557, counter=67, counter++=66, r=211, R=82, u=215, v=83] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=67] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=67] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=67, R=82, r=211, u=215, v=83] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=67, r=128, R=82, u=215, v=85] [L34] EXPR counter++ VAL [A=9557, counter=68, counter++=67, R=82, r=128, u=215, v=85] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=68] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=68] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=68, R=82, r=128, u=215, v=85] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=68, R=82, r=43, u=215, v=87] [L34] EXPR counter++ VAL [A=9557, counter=69, counter++=68, R=82, r=43, u=215, v=87] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=69] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=69] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=69, R=82, r=43, u=215, v=87] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=69, R=82, r=-44, u=215, v=89] [L34] EXPR counter++ VAL [A=9557, counter=70, counter++=69, R=82, r=-44, u=215, v=89] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=70] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=70] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=70, R=82, r=-44, u=215, v=89] [L36] COND FALSE !(!(r != 0)) [L38] COND FALSE !(r > 0) [L42] r = r + u [L43] u = u + 2 VAL [A=9557, counter=70, R=82, r=171, u=217, v=89] [L34] EXPR counter++ VAL [A=9557, counter=71, counter++=70, R=82, r=171, u=217, v=89] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=71] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=71] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=71, R=82, r=171, u=217, v=89] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=71, R=82, r=82, u=217, v=91] [L34] EXPR counter++ VAL [A=9557, counter=72, counter++=71, R=82, r=82, u=217, v=91] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=72] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=72] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=72, R=82, r=82, u=217, v=91] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=72, R=82, r=-9, u=217, v=93] [L34] EXPR counter++ VAL [A=9557, counter=73, counter++=72, r=-9, R=82, u=217, v=93] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=73] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=73] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=73, r=-9, R=82, u=217, v=93] [L36] COND FALSE !(!(r != 0)) [L38] COND FALSE !(r > 0) [L42] r = r + u [L43] u = u + 2 VAL [A=9557, counter=73, R=82, r=208, u=219, v=93] [L34] EXPR counter++ VAL [A=9557, counter=74, counter++=73, R=82, r=208, u=219, v=93] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=74] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=74] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=74, R=82, r=208, u=219, v=93] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=74, r=115, R=82, u=219, v=95] [L34] EXPR counter++ VAL [A=9557, counter=75, counter++=74, R=82, r=115, u=219, v=95] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=75] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=75] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=75, r=115, R=82, u=219, v=95] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=75, R=82, r=20, u=219, v=97] [L34] EXPR counter++ VAL [A=9557, counter=76, counter++=75, r=20, R=82, u=219, v=97] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=76] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=76] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=76, r=20, R=82, u=219, v=97] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=76, R=82, r=-77, u=219, v=99] [L34] EXPR counter++ VAL [A=9557, counter=77, counter++=76, R=82, r=-77, u=219, v=99] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=77] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=77] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=77, r=-77, R=82, u=219, v=99] [L36] COND FALSE !(!(r != 0)) [L38] COND FALSE !(r > 0) [L42] r = r + u [L43] u = u + 2 VAL [A=9557, counter=77, r=142, R=82, u=221, v=99] [L34] EXPR counter++ VAL [A=9557, counter=78, counter++=77, r=142, R=82, u=221, v=99] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=78] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=78] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=78, r=142, R=82, u=221, v=99] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=78, r=43, R=82, u=221, v=101] [L34] EXPR counter++ VAL [A=9557, counter=79, counter++=78, R=82, r=43, u=221, v=101] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=79] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=79] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=79, R=82, r=43, u=221, v=101] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=79, r=-58, R=82, u=221, v=103] [L34] EXPR counter++ VAL [A=9557, counter=80, counter++=79, R=82, r=-58, u=221, v=103] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=80] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=80] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=80, r=-58, R=82, u=221, v=103] [L36] COND FALSE !(!(r != 0)) [L38] COND FALSE !(r > 0) [L42] r = r + u [L43] u = u + 2 VAL [A=9557, counter=80, R=82, r=163, u=223, v=103] [L34] EXPR counter++ VAL [A=9557, counter=81, counter++=80, R=82, r=163, u=223, v=103] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=81] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=81] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=81, r=163, R=82, u=223, v=103] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=81, R=82, r=60, u=223, v=105] [L34] EXPR counter++ VAL [A=9557, counter=82, counter++=81, r=60, R=82, u=223, v=105] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=82] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=82] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=82, R=82, r=60, u=223, v=105] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=82, R=82, r=-45, u=223, v=107] [L34] EXPR counter++ VAL [A=9557, counter=83, counter++=82, R=82, r=-45, u=223, v=107] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=83] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=83] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=83, r=-45, R=82, u=223, v=107] [L36] COND FALSE !(!(r != 0)) [L38] COND FALSE !(r > 0) [L42] r = r + u [L43] u = u + 2 VAL [A=9557, counter=83, R=82, r=178, u=225, v=107] [L34] EXPR counter++ VAL [A=9557, counter=84, counter++=83, R=82, r=178, u=225, v=107] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=84] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=84] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=84, r=178, R=82, u=225, v=107] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=84, r=71, R=82, u=225, v=109] [L34] EXPR counter++ VAL [A=9557, counter=85, counter++=84, r=71, R=82, u=225, v=109] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=85] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=85] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=85, r=71, R=82, u=225, v=109] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=85, R=82, r=-38, u=225, v=111] [L34] EXPR counter++ VAL [A=9557, counter=86, counter++=85, R=82, r=-38, u=225, v=111] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=86] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=86] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=86, r=-38, R=82, u=225, v=111] [L36] COND FALSE !(!(r != 0)) [L38] COND FALSE !(r > 0) [L42] r = r + u [L43] u = u + 2 VAL [A=9557, counter=86, r=187, R=82, u=227, v=111] [L34] EXPR counter++ VAL [A=9557, counter=87, counter++=86, r=187, R=82, u=227, v=111] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=87] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=87] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=87, r=187, R=82, u=227, v=111] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=87, r=76, R=82, u=227, v=113] [L34] EXPR counter++ VAL [A=9557, counter=88, counter++=87, r=76, R=82, u=227, v=113] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=88] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=88] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=88, r=76, R=82, u=227, v=113] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=88, R=82, r=-37, u=227, v=115] [L34] EXPR counter++ VAL [A=9557, counter=89, counter++=88, r=-37, R=82, u=227, v=115] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=89] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=89] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=89, r=-37, R=82, u=227, v=115] [L36] COND FALSE !(!(r != 0)) [L38] COND FALSE !(r > 0) [L42] r = r + u [L43] u = u + 2 VAL [A=9557, counter=89, R=82, r=190, u=229, v=115] [L34] EXPR counter++ VAL [A=9557, counter=90, counter++=89, r=190, R=82, u=229, v=115] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=90] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=90] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=90, R=82, r=190, u=229, v=115] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=90, R=82, r=75, u=229, v=117] [L34] EXPR counter++ VAL [A=9557, counter=91, counter++=90, R=82, r=75, u=229, v=117] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=91] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=91] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=91, R=82, r=75, u=229, v=117] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=91, R=82, r=-42, u=229, v=119] [L34] EXPR counter++ VAL [A=9557, counter=92, counter++=91, R=82, r=-42, u=229, v=119] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=92] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=92] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=92, r=-42, R=82, u=229, v=119] [L36] COND FALSE !(!(r != 0)) [L38] COND FALSE !(r > 0) [L42] r = r + u [L43] u = u + 2 VAL [A=9557, counter=92, r=187, R=82, u=231, v=119] [L34] EXPR counter++ VAL [A=9557, counter=93, counter++=92, r=187, R=82, u=231, v=119] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=93] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=93] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=93, r=187, R=82, u=231, v=119] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=93, R=82, r=68, u=231, v=121] [L34] EXPR counter++ VAL [A=9557, counter=94, counter++=93, R=82, r=68, u=231, v=121] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=94] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=94] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=94, R=82, r=68, u=231, v=121] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=94, R=82, r=-53, u=231, v=123] [L34] EXPR counter++ VAL [A=9557, counter=95, counter++=94, r=-53, R=82, u=231, v=123] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=95] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=95] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=95, R=82, r=-53, u=231, v=123] [L36] COND FALSE !(!(r != 0)) [L38] COND FALSE !(r > 0) [L42] r = r + u [L43] u = u + 2 VAL [A=9557, counter=95, r=178, R=82, u=233, v=123] [L34] EXPR counter++ VAL [A=9557, counter=96, counter++=95, R=82, r=178, u=233, v=123] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=96] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=96] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=96, R=82, r=178, u=233, v=123] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=96, r=55, R=82, u=233, v=125] [L34] EXPR counter++ VAL [A=9557, counter=97, counter++=96, r=55, R=82, u=233, v=125] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=97] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=97] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=97, R=82, r=55, u=233, v=125] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=97, R=82, r=-70, u=233, v=127] [L34] EXPR counter++ VAL [A=9557, counter=98, counter++=97, R=82, r=-70, u=233, v=127] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=98] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=98] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=98, R=82, r=-70, u=233, v=127] [L36] COND FALSE !(!(r != 0)) [L38] COND FALSE !(r > 0) [L42] r = r + u [L43] u = u + 2 VAL [A=9557, counter=98, R=82, r=163, u=235, v=127] [L34] EXPR counter++ VAL [A=9557, counter=99, counter++=98, r=163, R=82, u=235, v=127] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=99] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=99] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=99, r=163, R=82, u=235, v=127] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=99, r=36, R=82, u=235, v=129] [L34] EXPR counter++ VAL [A=9557, counter=100, counter++=99, r=36, R=82, u=235, v=129] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=100] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=100] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=9557, counter=100, R=82, r=36, u=235, v=129] [L36] COND FALSE !(!(r != 0)) [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=9557, counter=100, R=82, r=-93, u=235, v=131] [L34] EXPR counter++ VAL [A=9557, counter=101, counter++=100, R=82, r=-93, u=235, v=131] [L34] COND FALSE !(counter++<100) [L48] CALL __VERIFIER_assert(((long long) 4*A) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=0, counter=101] [L12] COND TRUE !(cond) VAL [\old(cond)=0, cond=0, counter=101] [L14] reach_error() VAL [\old(cond)=0, cond=0, counter=101] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 19 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 376.9s, OverallIterations: 13, TraceHistogramMax: 101, PathProgramHistogramMax: 7, EmptinessCheckTime: 0.1s, AutomataDifference: 34.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 2 mSolverCounterUnknown, 2972 SdHoareTripleChecker+Valid, 16.5s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 2971 mSDsluCounter, 2159 SdHoareTripleChecker+Invalid, 15.8s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 18 IncrementalHoareTripleChecker+Unchecked, 2056 mSDsCounter, 1188 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 2584 IncrementalHoareTripleChecker+Invalid, 3792 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 1188 mSolverCounterUnsat, 435 mSDtfsCounter, 2584 mSolverCounterSat, 0.1s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 5012 GetRequests, 4199 SyntacticMatches, 100 SemanticMatches, 713 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25633 ImplicationChecksByTransitivity, 74.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=813occurred in iteration=12, InterpolantAutomatonStates: 606, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.4s AutomataMinimizationTime, 12 MinimizatonAttempts, 12 StatesRemovedByMinimization, 3 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.4s SsaConstructionTime, 242.9s SatisfiabilityAnalysisTime, 29.9s InterpolantComputationTime, 2425 NumberOfCodeBlocks, 2425 NumberOfCodeBlocksAsserted, 65 NumberOfCheckSat, 3160 ConstructedInterpolants, 0 QuantifiedInterpolants, 8663 SizeOfPredicates, 197 NumberOfNonLiveVariables, 3686 ConjunctsInSsa, 425 ConjunctsInUnsatCore, 21 InterpolantComputations, 3 PerfectInterpolantSequences, 23530/92504 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: OVERALL_TIME: 0.7s, ICFG_INTERPRETER_ENTERED_PROCEDURES: 3, DAG_INTERPRETER_EARLY_EXIT_QUERIES_NONTRIVIAL: 17, DAG_INTERPRETER_EARLY_EXITS: 1, TOOLS_POST_APPLICATIONS: 14, TOOLS_POST_TIME: 0.1s, TOOLS_POST_CALL_APPLICATIONS: 10, TOOLS_POST_CALL_TIME: 0.3s, TOOLS_POST_RETURN_APPLICATIONS: 6, TOOLS_POST_RETURN_TIME: 0.0s, TOOLS_QUANTIFIERELIM_APPLICATIONS: 30, TOOLS_QUANTIFIERELIM_TIME: 0.4s, TOOLS_QUANTIFIERELIM_MAX_TIME: 0.1s, FLUID_QUERY_TIME: 0.0s, FLUID_QUERIES: 46, FLUID_YES_ANSWERS: 0, DOMAIN_JOIN_APPLICATIONS: 10, DOMAIN_JOIN_TIME: 0.2s, DOMAIN_ALPHA_APPLICATIONS: 0, DOMAIN_ALPHA_TIME: 0.0s, DOMAIN_WIDEN_APPLICATIONS: 0, DOMAIN_WIDEN_TIME: 0.0s, DOMAIN_ISSUBSETEQ_APPLICATIONS: 0, DOMAIN_ISSUBSETEQ_TIME: 0.0s, DOMAIN_ISBOTTOM_APPLICATIONS: 17, DOMAIN_ISBOTTOM_TIME: 0.0s, LOOP_SUMMARIZER_APPLICATIONS: 0, LOOP_SUMMARIZER_CACHE_MISSES: 0, LOOP_SUMMARIZER_OVERALL_TIME: 0.0s, LOOP_SUMMARIZER_NEW_COMPUTATION_TIME: 0.0s, LOOP_SUMMARIZER_FIXPOINT_ITERATIONS: 0, CALL_SUMMARIZER_APPLICATIONS: 6, CALL_SUMMARIZER_CACHE_MISSES: 2, CALL_SUMMARIZER_OVERALL_TIME: 0.0s, CALL_SUMMARIZER_NEW_COMPUTATION_TIME: 0.0s, PROCEDURE_GRAPH_BUILDER_TIME: 0.0s, PATH_EXPR_TIME: 0.0s, REGEX_TO_DAG_TIME: 0.0s, DAG_COMPRESSION_TIME: 0.0s, DAG_COMPRESSION_PROCESSED_NODES: 145, DAG_COMPRESSION_RETAINED_NODES: 50, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2022-11-03 03:38:17,275 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a77f4d7d-24d5-420e-8a3d-3b09923077de/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE