./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.loyd.2.prop1-func-interl.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version e04fb08f Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.loyd.2.prop1-func-interl.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/config/svcomp-Reach-64bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0 --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash ed61074eddcb834d61e28f232b7629873df53457bf4184fbdaa62dbd20153dd8 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-e04fb08 [2022-11-16 19:30:16,267 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-16 19:30:16,269 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-16 19:30:16,305 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-16 19:30:16,305 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-16 19:30:16,306 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-16 19:30:16,308 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-16 19:30:16,310 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-16 19:30:16,319 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-16 19:30:16,328 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-16 19:30:16,329 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-16 19:30:16,330 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-16 19:30:16,330 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-16 19:30:16,331 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-16 19:30:16,332 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-16 19:30:16,333 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-16 19:30:16,334 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-16 19:30:16,335 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-16 19:30:16,337 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-16 19:30:16,342 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-16 19:30:16,344 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-16 19:30:16,353 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-16 19:30:16,355 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-16 19:30:16,356 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-16 19:30:16,360 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-16 19:30:16,364 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-16 19:30:16,365 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-16 19:30:16,366 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-16 19:30:16,371 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-16 19:30:16,372 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-16 19:30:16,372 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-16 19:30:16,373 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-16 19:30:16,374 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-16 19:30:16,376 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-16 19:30:16,377 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-16 19:30:16,378 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-16 19:30:16,379 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-16 19:30:16,380 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-16 19:30:16,380 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-16 19:30:16,381 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-16 19:30:16,382 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-16 19:30:16,383 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/config/svcomp-Reach-64bit-Taipan_Default.epf [2022-11-16 19:30:16,419 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-16 19:30:16,419 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-16 19:30:16,419 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-16 19:30:16,419 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-16 19:30:16,420 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-16 19:30:16,420 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-16 19:30:16,420 INFO L138 SettingsManager]: * User list type=DISABLED [2022-11-16 19:30:16,421 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-11-16 19:30:16,421 INFO L138 SettingsManager]: * Explicit value domain=true [2022-11-16 19:30:16,421 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2022-11-16 19:30:16,421 INFO L138 SettingsManager]: * Octagon Domain=false [2022-11-16 19:30:16,421 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-11-16 19:30:16,421 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2022-11-16 19:30:16,422 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2022-11-16 19:30:16,422 INFO L138 SettingsManager]: * Interval Domain=false [2022-11-16 19:30:16,422 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2022-11-16 19:30:16,422 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2022-11-16 19:30:16,422 INFO L138 SettingsManager]: * Simplification Technique=POLY_PAC [2022-11-16 19:30:16,428 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-16 19:30:16,428 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-16 19:30:16,428 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-16 19:30:16,428 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-16 19:30:16,428 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-16 19:30:16,430 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-16 19:30:16,430 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-16 19:30:16,430 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-16 19:30:16,431 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-16 19:30:16,431 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-16 19:30:16,432 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-16 19:30:16,432 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-16 19:30:16,432 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-16 19:30:16,432 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2022-11-16 19:30:16,432 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-16 19:30:16,433 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-16 19:30:16,433 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2022-11-16 19:30:16,433 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-11-16 19:30:16,434 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-16 19:30:16,434 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-11-16 19:30:16,434 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> ed61074eddcb834d61e28f232b7629873df53457bf4184fbdaa62dbd20153dd8 [2022-11-16 19:30:16,742 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-16 19:30:16,767 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-16 19:30:16,770 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-16 19:30:16,785 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-16 19:30:16,787 INFO L275 PluginConnector]: CDTParser initialized [2022-11-16 19:30:16,792 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.loyd.2.prop1-func-interl.c [2022-11-16 19:30:16,887 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/data/8ac8d598f/0c7c1b3ffdc6493fa8f26be821160921/FLAGdc36f37f1 [2022-11-16 19:30:17,586 INFO L306 CDTParser]: Found 1 translation units. [2022-11-16 19:30:17,587 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.loyd.2.prop1-func-interl.c [2022-11-16 19:30:17,602 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/data/8ac8d598f/0c7c1b3ffdc6493fa8f26be821160921/FLAGdc36f37f1 [2022-11-16 19:30:17,884 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/data/8ac8d598f/0c7c1b3ffdc6493fa8f26be821160921 [2022-11-16 19:30:17,887 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-16 19:30:17,890 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-16 19:30:17,894 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-16 19:30:17,894 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-16 19:30:17,898 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-16 19:30:17,899 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 07:30:17" (1/1) ... [2022-11-16 19:30:17,901 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4661226a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:30:17, skipping insertion in model container [2022-11-16 19:30:17,901 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 07:30:17" (1/1) ... [2022-11-16 19:30:17,909 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-16 19:30:17,988 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-16 19:30:18,209 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.loyd.2.prop1-func-interl.c[1014,1027] [2022-11-16 19:30:18,553 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 19:30:18,557 INFO L203 MainTranslator]: Completed pre-run [2022-11-16 19:30:18,571 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.loyd.2.prop1-func-interl.c[1014,1027] [2022-11-16 19:30:18,748 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 19:30:18,760 INFO L208 MainTranslator]: Completed translation [2022-11-16 19:30:18,761 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:30:18 WrapperNode [2022-11-16 19:30:18,761 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-16 19:30:18,762 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-16 19:30:18,763 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-16 19:30:18,763 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-16 19:30:18,772 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:30:18" (1/1) ... [2022-11-16 19:30:18,819 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:30:18" (1/1) ... [2022-11-16 19:30:18,916 INFO L138 Inliner]: procedures = 11, calls = 3, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1904 [2022-11-16 19:30:18,916 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-16 19:30:18,917 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-16 19:30:18,917 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-16 19:30:18,917 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-16 19:30:18,927 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:30:18" (1/1) ... [2022-11-16 19:30:18,927 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:30:18" (1/1) ... [2022-11-16 19:30:18,941 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:30:18" (1/1) ... [2022-11-16 19:30:18,941 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:30:18" (1/1) ... [2022-11-16 19:30:19,002 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:30:18" (1/1) ... [2022-11-16 19:30:19,018 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:30:18" (1/1) ... [2022-11-16 19:30:19,049 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:30:18" (1/1) ... [2022-11-16 19:30:19,067 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:30:18" (1/1) ... [2022-11-16 19:30:19,103 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-16 19:30:19,105 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-16 19:30:19,105 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-16 19:30:19,105 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-16 19:30:19,106 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:30:18" (1/1) ... [2022-11-16 19:30:19,112 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-16 19:30:19,123 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/z3 [2022-11-16 19:30:19,137 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-16 19:30:19,163 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-16 19:30:19,183 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-16 19:30:19,183 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-16 19:30:19,678 INFO L235 CfgBuilder]: Building ICFG [2022-11-16 19:30:19,680 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-16 19:30:21,568 INFO L276 CfgBuilder]: Performing block encoding [2022-11-16 19:30:28,332 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-16 19:30:28,332 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-16 19:30:28,335 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 07:30:28 BoogieIcfgContainer [2022-11-16 19:30:28,335 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-16 19:30:28,339 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-16 19:30:28,339 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-16 19:30:28,343 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-16 19:30:28,343 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 16.11 07:30:17" (1/3) ... [2022-11-16 19:30:28,344 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@8971d8f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.11 07:30:28, skipping insertion in model container [2022-11-16 19:30:28,344 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:30:18" (2/3) ... [2022-11-16 19:30:28,345 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@8971d8f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.11 07:30:28, skipping insertion in model container [2022-11-16 19:30:28,345 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 07:30:28" (3/3) ... [2022-11-16 19:30:28,346 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.loyd.2.prop1-func-interl.c [2022-11-16 19:30:28,367 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-16 19:30:28,368 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-16 19:30:28,451 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-16 19:30:28,465 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@50446a9a, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-16 19:30:28,466 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-16 19:30:28,470 INFO L276 IsEmpty]: Start isEmpty. Operand has 7 states, 5 states have (on average 1.6) internal successors, (8), 6 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 19:30:28,475 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2022-11-16 19:30:28,476 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 19:30:28,476 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1] [2022-11-16 19:30:28,477 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 19:30:28,482 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 19:30:28,482 INFO L85 PathProgramCache]: Analyzing trace with hash 33998097, now seen corresponding path program 1 times [2022-11-16 19:30:28,493 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-16 19:30:28,493 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [329309118] [2022-11-16 19:30:28,494 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 19:30:28,494 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 19:30:28,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 19:30:29,207 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 19:30:29,208 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-16 19:30:29,208 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [329309118] [2022-11-16 19:30:29,209 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [329309118] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 19:30:29,209 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 19:30:29,209 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-16 19:30:29,211 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1945487712] [2022-11-16 19:30:29,212 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 19:30:29,216 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-16 19:30:29,217 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-16 19:30:29,252 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-16 19:30:29,253 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-16 19:30:29,255 INFO L87 Difference]: Start difference. First operand has 7 states, 5 states have (on average 1.6) internal successors, (8), 6 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 1.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 19:30:31,479 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.17s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-11-16 19:30:31,527 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 19:30:31,527 INFO L93 Difference]: Finished difference Result 15 states and 20 transitions. [2022-11-16 19:30:31,528 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-16 19:30:31,530 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 4 [2022-11-16 19:30:31,530 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 19:30:31,538 INFO L225 Difference]: With dead ends: 15 [2022-11-16 19:30:31,538 INFO L226 Difference]: Without dead ends: 9 [2022-11-16 19:30:31,541 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-16 19:30:31,544 INFO L413 NwaCegarLoop]: 2 mSDtfsCounter, 3 mSDsluCounter, 4 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 1 mSolverCounterUnsat, 1 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 6 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 1 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.2s IncrementalHoareTripleChecker+Time [2022-11-16 19:30:31,545 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 6 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 7 Invalid, 1 Unknown, 0 Unchecked, 2.2s Time] [2022-11-16 19:30:31,562 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9 states. [2022-11-16 19:30:31,572 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9 to 8. [2022-11-16 19:30:31,574 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 7 states have (on average 1.1428571428571428) internal successors, (8), 7 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 19:30:31,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 8 transitions. [2022-11-16 19:30:31,575 INFO L78 Accepts]: Start accepts. Automaton has 8 states and 8 transitions. Word has length 4 [2022-11-16 19:30:31,576 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 19:30:31,576 INFO L495 AbstractCegarLoop]: Abstraction has 8 states and 8 transitions. [2022-11-16 19:30:31,576 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 1.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 19:30:31,577 INFO L276 IsEmpty]: Start isEmpty. Operand 8 states and 8 transitions. [2022-11-16 19:30:31,577 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2022-11-16 19:30:31,577 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 19:30:31,577 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1] [2022-11-16 19:30:31,578 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-11-16 19:30:31,578 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 19:30:31,578 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 19:30:31,579 INFO L85 PathProgramCache]: Analyzing trace with hash -726974262, now seen corresponding path program 1 times [2022-11-16 19:30:31,579 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-16 19:30:31,579 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [117362253] [2022-11-16 19:30:31,579 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 19:30:31,580 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 19:30:31,747 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-16 19:30:31,748 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [730524603] [2022-11-16 19:30:31,748 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 19:30:31,761 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 19:30:31,761 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/z3 [2022-11-16 19:30:31,787 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 19:30:31,814 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-11-16 19:33:27,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 19:33:27,605 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 19:37:29,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 19:37:30,913 INFO L130 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2022-11-16 19:37:30,914 INFO L359 BasicCegarLoop]: Counterexample is feasible [2022-11-16 19:37:30,925 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-11-16 19:37:31,141 WARN L435 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forcibly destroying the process [2022-11-16 19:37:31,193 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 137 [2022-11-16 19:37:31,193 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 19:37:31,196 INFO L444 BasicCegarLoop]: Path program histogram: [1, 1] [2022-11-16 19:37:31,200 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-16 19:37:31,332 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-16 19:37:31,333 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-16 19:37:31,400 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 16.11 07:37:31 BoogieIcfgContainer [2022-11-16 19:37:31,400 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-16 19:37:31,401 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-16 19:37:31,401 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-16 19:37:31,401 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-16 19:37:31,403 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 07:30:28" (3/4) ... [2022-11-16 19:37:31,407 INFO L140 WitnessPrinter]: No result that supports witness generation found [2022-11-16 19:37:31,407 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-16 19:37:31,409 INFO L158 Benchmark]: Toolchain (without parser) took 433517.89ms. Allocated memory was 144.7MB in the beginning and 947.9MB in the end (delta: 803.2MB). Free memory was 109.3MB in the beginning and 431.3MB in the end (delta: -322.0MB). Peak memory consumption was 479.5MB. Max. memory is 16.1GB. [2022-11-16 19:37:31,411 INFO L158 Benchmark]: CDTParser took 0.25ms. Allocated memory is still 100.7MB. Free memory was 73.3MB in the beginning and 73.3MB in the end (delta: 27.6kB). There was no memory consumed. Max. memory is 16.1GB. [2022-11-16 19:37:31,413 INFO L158 Benchmark]: CACSL2BoogieTranslator took 867.14ms. Allocated memory is still 144.7MB. Free memory was 108.9MB in the beginning and 84.5MB in the end (delta: 24.4MB). Peak memory consumption was 23.1MB. Max. memory is 16.1GB. [2022-11-16 19:37:31,416 INFO L158 Benchmark]: Boogie Procedure Inliner took 153.94ms. Allocated memory is still 144.7MB. Free memory was 84.5MB in the beginning and 68.2MB in the end (delta: 16.3MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2022-11-16 19:37:31,420 INFO L158 Benchmark]: Boogie Preprocessor took 186.63ms. Allocated memory is still 144.7MB. Free memory was 68.2MB in the beginning and 59.3MB in the end (delta: 8.9MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2022-11-16 19:37:31,420 INFO L158 Benchmark]: RCFGBuilder took 9230.98ms. Allocated memory was 144.7MB in the beginning and 947.9MB in the end (delta: 803.2MB). Free memory was 59.3MB in the beginning and 716.5MB in the end (delta: -657.2MB). Peak memory consumption was 506.8MB. Max. memory is 16.1GB. [2022-11-16 19:37:31,421 INFO L158 Benchmark]: TraceAbstraction took 423061.11ms. Allocated memory is still 947.9MB. Free memory was 716.5MB in the beginning and 431.3MB in the end (delta: 285.2MB). Peak memory consumption was 285.2MB. Max. memory is 16.1GB. [2022-11-16 19:37:31,421 INFO L158 Benchmark]: Witness Printer took 6.48ms. Allocated memory is still 947.9MB. Free memory is still 431.3MB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-16 19:37:31,427 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.25ms. Allocated memory is still 100.7MB. Free memory was 73.3MB in the beginning and 73.3MB in the end (delta: 27.6kB). There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 867.14ms. Allocated memory is still 144.7MB. Free memory was 108.9MB in the beginning and 84.5MB in the end (delta: 24.4MB). Peak memory consumption was 23.1MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 153.94ms. Allocated memory is still 144.7MB. Free memory was 84.5MB in the beginning and 68.2MB in the end (delta: 16.3MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * Boogie Preprocessor took 186.63ms. Allocated memory is still 144.7MB. Free memory was 68.2MB in the beginning and 59.3MB in the end (delta: 8.9MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * RCFGBuilder took 9230.98ms. Allocated memory was 144.7MB in the beginning and 947.9MB in the end (delta: 803.2MB). Free memory was 59.3MB in the beginning and 716.5MB in the end (delta: -657.2MB). Peak memory consumption was 506.8MB. Max. memory is 16.1GB. * TraceAbstraction took 423061.11ms. Allocated memory is still 947.9MB. Free memory was 716.5MB in the beginning and 431.3MB in the end (delta: 285.2MB). Peak memory consumption was 285.2MB. Max. memory is 16.1GB. * Witness Printer took 6.48ms. Allocated memory is still 947.9MB. Free memory is still 431.3MB. There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 20]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: overapproximation of bitwiseOr at line 134, overapproximation of bitwiseAnd at line 114, overapproximation of bitwiseComplement at line 125, overapproximation of bitwiseXor at line 175. Possible FailurePath: [L25] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L26] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L28] const SORT_2 mask_SORT_2 = (SORT_2)-1 >> (sizeof(SORT_2) * 8 - 8); [L29] const SORT_2 msb_SORT_2 = (SORT_2)1 << (8 - 1); [L31] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 24); [L32] const SORT_3 msb_SORT_3 = (SORT_3)1 << (24 - 1); [L34] const SORT_4 mask_SORT_4 = (SORT_4)-1 >> (sizeof(SORT_4) * 8 - 32); [L35] const SORT_4 msb_SORT_4 = (SORT_4)1 << (32 - 1); [L37] const SORT_2 var_5 = 0; [L38] const SORT_1 var_28 = 0; [L39] const SORT_4 var_40 = 0; [L40] const SORT_3 var_41 = 0; [L41] const SORT_4 var_43 = 3; [L42] const SORT_4 var_48 = 1; [L43] const SORT_2 var_55 = 0; [L44] const SORT_2 var_57 = 1; [L45] const SORT_4 var_59 = 2; [L46] const SORT_2 var_61 = 2; [L47] const SORT_2 var_64 = 3; [L48] const SORT_4 var_66 = 4; [L49] const SORT_2 var_68 = 4; [L50] const SORT_4 var_70 = 5; [L51] const SORT_2 var_72 = 5; [L52] const SORT_4 var_74 = 6; [L53] const SORT_2 var_76 = 6; [L54] const SORT_4 var_78 = 7; [L55] const SORT_2 var_80 = 7; [L56] const SORT_2 var_82 = 8; [L57] const SORT_4 var_296 = 8; [L59] SORT_1 input_39; [L60] SORT_1 input_93; [L61] SORT_1 input_116; [L62] SORT_1 input_137; [L63] SORT_1 input_333; [L65] SORT_2 state_6 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L66] SORT_2 state_8 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L67] SORT_2 state_10 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L68] SORT_2 state_12 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L69] SORT_2 state_14 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L70] SORT_2 state_16 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L71] SORT_2 state_18 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L72] SORT_2 state_20 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L73] SORT_2 state_22 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L74] SORT_2 state_24 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L75] SORT_2 state_26 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L76] SORT_1 state_29 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L77] SORT_1 state_31 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L78] SORT_1 state_33 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L79] SORT_1 state_35 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L81] SORT_2 init_7_arg_1 = var_5; [L82] state_6 = init_7_arg_1 [L83] SORT_2 init_9_arg_1 = var_5; [L84] state_8 = init_9_arg_1 [L85] SORT_2 init_11_arg_1 = var_5; [L86] state_10 = init_11_arg_1 [L87] SORT_2 init_13_arg_1 = var_5; [L88] state_12 = init_13_arg_1 [L89] SORT_2 init_15_arg_1 = var_5; [L90] state_14 = init_15_arg_1 [L91] SORT_2 init_17_arg_1 = var_5; [L92] state_16 = init_17_arg_1 [L93] SORT_2 init_19_arg_1 = var_5; [L94] state_18 = init_19_arg_1 [L95] SORT_2 init_21_arg_1 = var_5; [L96] state_20 = init_21_arg_1 [L97] SORT_2 init_23_arg_1 = var_5; [L98] state_22 = init_23_arg_1 [L99] SORT_2 init_25_arg_1 = var_5; [L100] state_24 = init_25_arg_1 [L101] SORT_2 init_27_arg_1 = var_5; [L102] state_26 = init_27_arg_1 [L103] SORT_1 init_30_arg_1 = var_28; [L104] state_29 = init_30_arg_1 [L105] SORT_1 init_32_arg_1 = var_28; [L106] state_31 = init_32_arg_1 [L107] SORT_1 init_34_arg_1 = var_28; [L108] state_33 = init_34_arg_1 [L109] SORT_1 init_36_arg_1 = var_28; [L110] state_35 = init_36_arg_1 VAL [init_11_arg_1=0, init_13_arg_1=0, init_15_arg_1=0, init_17_arg_1=0, init_19_arg_1=0, init_21_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_7_arg_1=0, init_9_arg_1=0, mask_SORT_1=1, mask_SORT_2=255, mask_SORT_3=4294967295, mask_SORT_4=4294967295, msb_SORT_1=1, msb_SORT_2=128, msb_SORT_3=8388608, msb_SORT_4=2147483648, state_10=0, state_12=0, state_14=0, state_16=0, state_18=0, state_20=0, state_22=0, state_24=0, state_26=0, state_29=0, state_31=0, state_33=0, state_35=0, state_6=0, state_8=0, var_28=0, var_296=8, var_40=0, var_41=0, var_43=3, var_48=1, var_5=0, var_55=0, var_57=1, var_59=2, var_61=2, var_64=3, var_66=4, var_68=4, var_70=5, var_72=5, var_74=6, var_76=6, var_78=7, var_80=7, var_82=8] [L113] input_39 = __VERIFIER_nondet_uchar() [L114] input_39 = input_39 & mask_SORT_1 [L115] input_93 = __VERIFIER_nondet_uchar() [L116] input_93 = input_93 & mask_SORT_1 [L117] input_116 = __VERIFIER_nondet_uchar() [L118] input_116 = input_116 & mask_SORT_1 [L119] input_137 = __VERIFIER_nondet_uchar() [L120] input_137 = input_137 & mask_SORT_1 [L121] input_333 = __VERIFIER_nondet_uchar() [L124] SORT_1 var_37_arg_0 = state_33; [L125] SORT_1 var_37_arg_1 = ~state_35; [L126] var_37_arg_1 = var_37_arg_1 & mask_SORT_1 [L127] SORT_1 var_37 = var_37_arg_0 & var_37_arg_1; [L128] var_37 = var_37 & mask_SORT_1 [L129] SORT_1 bad_38_arg_0 = var_37; [L130] CALL __VERIFIER_assert(!(bad_38_arg_0)) [L20] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L130] RET __VERIFIER_assert(!(bad_38_arg_0)) [L132] SORT_3 var_42_arg_0 = var_41; [L133] SORT_2 var_42_arg_1 = state_24; [L134] SORT_4 var_42 = ((SORT_4)var_42_arg_0 << 8) | var_42_arg_1; [L135] var_42 = var_42 & mask_SORT_4 [L136] SORT_3 var_44_arg_0 = var_41; [L137] SORT_2 var_44_arg_1 = state_26; [L138] SORT_4 var_44 = ((SORT_4)var_44_arg_0 << 8) | var_44_arg_1; [L139] var_44 = var_44 & mask_SORT_4 [L140] SORT_4 var_45_arg_0 = var_43; [L141] SORT_4 var_45_arg_1 = var_44; [L142] SORT_4 var_45 = var_45_arg_0 * var_45_arg_1; [L143] SORT_4 var_46_arg_0 = var_42; [L144] SORT_4 var_46_arg_1 = var_45; [L145] SORT_4 var_46 = var_46_arg_0 + var_46_arg_1; [L146] var_46 = var_46 & mask_SORT_4 [L147] SORT_4 var_47_arg_0 = var_40; [L148] SORT_4 var_47_arg_1 = var_46; [L149] SORT_1 var_47 = var_47_arg_0 == var_47_arg_1; [L150] SORT_4 var_49_arg_0 = var_48; [L151] SORT_4 var_49_arg_1 = var_44; [L152] SORT_4 var_49 = var_49_arg_0 + var_49_arg_1; [L153] SORT_4 var_50_arg_0 = var_43; [L154] SORT_4 var_50_arg_1 = var_49; [L155] SORT_4 var_50 = var_50_arg_0 * var_50_arg_1; [L156] SORT_4 var_51_arg_0 = var_42; [L157] SORT_4 var_51_arg_1 = var_50; [L158] SORT_4 var_51 = var_51_arg_0 + var_51_arg_1; [L159] var_51 = var_51 & mask_SORT_4 [L160] SORT_4 var_52_arg_0 = var_40; [L161] SORT_4 var_52_arg_1 = var_51; [L162] SORT_1 var_52 = var_52_arg_0 == var_52_arg_1; [L163] SORT_1 var_53_arg_0 = var_47; [L164] SORT_1 var_53_arg_1 = var_52; [L165] SORT_1 var_53 = var_53_arg_0 | var_53_arg_1; [L166] SORT_1 var_54_arg_0 = input_39; [L167] SORT_1 var_54_arg_1 = var_53; [L168] SORT_1 var_54 = var_54_arg_0 & var_54_arg_1; [L169] var_54 = var_54 & mask_SORT_1 [L170] SORT_4 var_56_arg_0 = var_48; [L171] SORT_4 var_56_arg_1 = var_51; [L172] SORT_1 var_56 = var_56_arg_0 == var_56_arg_1; [L173] SORT_2 var_58_arg_0 = var_57; [L174] SORT_2 var_58_arg_1 = state_8; [L175] SORT_2 var_58 = var_58_arg_0 ^ var_58_arg_1; [L176] var_58 = var_58 & mask_SORT_2 [L177] SORT_4 var_60_arg_0 = var_59; [L178] SORT_4 var_60_arg_1 = var_51; [L179] SORT_1 var_60 = var_60_arg_0 == var_60_arg_1; [L180] SORT_2 var_62_arg_0 = var_61; [L181] SORT_2 var_62_arg_1 = state_10; [L182] SORT_2 var_62 = var_62_arg_0 ^ var_62_arg_1; [L183] var_62 = var_62 & mask_SORT_2 [L184] SORT_4 var_63_arg_0 = var_43; [L185] SORT_4 var_63_arg_1 = var_51; [L186] SORT_1 var_63 = var_63_arg_0 == var_63_arg_1; [L187] SORT_2 var_65_arg_0 = var_64; [L188] SORT_2 var_65_arg_1 = state_12; [L189] SORT_2 var_65 = var_65_arg_0 ^ var_65_arg_1; [L190] var_65 = var_65 & mask_SORT_2 [L191] SORT_4 var_67_arg_0 = var_66; [L192] SORT_4 var_67_arg_1 = var_51; [L193] SORT_1 var_67 = var_67_arg_0 == var_67_arg_1; [L194] SORT_2 var_69_arg_0 = var_68; [L195] SORT_2 var_69_arg_1 = state_14; [L196] SORT_2 var_69 = var_69_arg_0 ^ var_69_arg_1; [L197] var_69 = var_69 & mask_SORT_2 [L198] SORT_4 var_71_arg_0 = var_70; [L199] SORT_4 var_71_arg_1 = var_51; [L200] SORT_1 var_71 = var_71_arg_0 == var_71_arg_1; [L201] SORT_2 var_73_arg_0 = var_72; [L202] SORT_2 var_73_arg_1 = state_16; [L203] SORT_2 var_73 = var_73_arg_0 ^ var_73_arg_1; [L204] var_73 = var_73 & mask_SORT_2 [L205] SORT_4 var_75_arg_0 = var_74; [L206] SORT_4 var_75_arg_1 = var_51; [L207] SORT_1 var_75 = var_75_arg_0 == var_75_arg_1; [L208] SORT_2 var_77_arg_0 = var_76; [L209] SORT_2 var_77_arg_1 = state_18; [L210] SORT_2 var_77 = var_77_arg_0 ^ var_77_arg_1; [L211] var_77 = var_77 & mask_SORT_2 [L212] SORT_4 var_79_arg_0 = var_78; [L213] SORT_4 var_79_arg_1 = var_51; [L214] SORT_1 var_79 = var_79_arg_0 == var_79_arg_1; [L215] SORT_2 var_81_arg_0 = var_80; [L216] SORT_2 var_81_arg_1 = state_20; [L217] SORT_2 var_81 = var_81_arg_0 ^ var_81_arg_1; [L218] var_81 = var_81 & mask_SORT_2 [L219] SORT_2 var_83_arg_0 = var_82; [L220] SORT_2 var_83_arg_1 = state_22; [L221] SORT_2 var_83 = var_83_arg_0 ^ var_83_arg_1; [L222] var_83 = var_83 & mask_SORT_2 [L223] SORT_1 var_84_arg_0 = var_79; [L224] SORT_2 var_84_arg_1 = var_81; [L225] SORT_2 var_84_arg_2 = var_83; [L226] SORT_2 var_84 = var_84_arg_0 ? var_84_arg_1 : var_84_arg_2; [L227] SORT_1 var_85_arg_0 = var_75; [L228] SORT_2 var_85_arg_1 = var_77; [L229] SORT_2 var_85_arg_2 = var_84; [L230] SORT_2 var_85 = var_85_arg_0 ? var_85_arg_1 : var_85_arg_2; [L231] SORT_1 var_86_arg_0 = var_71; [L232] SORT_2 var_86_arg_1 = var_73; [L233] SORT_2 var_86_arg_2 = var_85; [L234] SORT_2 var_86 = var_86_arg_0 ? var_86_arg_1 : var_86_arg_2; [L235] SORT_1 var_87_arg_0 = var_67; [L236] SORT_2 var_87_arg_1 = var_69; [L237] SORT_2 var_87_arg_2 = var_86; [L238] SORT_2 var_87 = var_87_arg_0 ? var_87_arg_1 : var_87_arg_2; [L239] SORT_1 var_88_arg_0 = var_63; [L240] SORT_2 var_88_arg_1 = var_65; [L241] SORT_2 var_88_arg_2 = var_87; [L242] SORT_2 var_88 = var_88_arg_0 ? var_88_arg_1 : var_88_arg_2; [L243] SORT_1 var_89_arg_0 = var_60; [L244] SORT_2 var_89_arg_1 = var_62; [L245] SORT_2 var_89_arg_2 = var_88; [L246] SORT_2 var_89 = var_89_arg_0 ? var_89_arg_1 : var_89_arg_2; [L247] SORT_1 var_90_arg_0 = var_56; [L248] SORT_2 var_90_arg_1 = var_58; [L249] SORT_2 var_90_arg_2 = var_89; [L250] SORT_2 var_90 = var_90_arg_0 ? var_90_arg_1 : var_90_arg_2; [L251] SORT_1 var_91_arg_0 = var_52; [L252] SORT_2 var_91_arg_1 = state_6; [L253] SORT_2 var_91_arg_2 = var_90; [L254] SORT_2 var_91 = var_91_arg_0 ? var_91_arg_1 : var_91_arg_2; [L255] SORT_1 var_92_arg_0 = var_52; [L256] SORT_2 var_92_arg_1 = var_55; [L257] SORT_2 var_92_arg_2 = var_91; [L258] SORT_2 var_92 = var_92_arg_0 ? var_92_arg_1 : var_92_arg_2; [L259] SORT_4 var_94_arg_0 = var_44; [L260] SORT_4 var_94_arg_1 = var_48; [L261] SORT_4 var_94 = var_94_arg_0 - var_94_arg_1; [L262] SORT_4 var_95_arg_0 = var_43; [L263] SORT_4 var_95_arg_1 = var_94; [L264] SORT_4 var_95 = var_95_arg_0 * var_95_arg_1; [L265] SORT_4 var_96_arg_0 = var_42; [L266] SORT_4 var_96_arg_1 = var_95; [L267] SORT_4 var_96 = var_96_arg_0 + var_96_arg_1; [L268] var_96 = var_96 & mask_SORT_4 [L269] SORT_4 var_97_arg_0 = var_40; [L270] SORT_4 var_97_arg_1 = var_96; [L271] SORT_1 var_97 = var_97_arg_0 == var_97_arg_1; [L272] SORT_1 var_98_arg_0 = var_47; [L273] SORT_1 var_98_arg_1 = var_97; [L274] SORT_1 var_98 = var_98_arg_0 | var_98_arg_1; [L275] SORT_1 var_99_arg_0 = input_93; [L276] SORT_1 var_99_arg_1 = var_98; [L277] SORT_1 var_99 = var_99_arg_0 & var_99_arg_1; [L278] var_99 = var_99 & mask_SORT_1 [L279] SORT_4 var_100_arg_0 = var_48; [L280] SORT_4 var_100_arg_1 = var_96; [L281] SORT_1 var_100 = var_100_arg_0 == var_100_arg_1; [L282] SORT_4 var_101_arg_0 = var_59; [L283] SORT_4 var_101_arg_1 = var_96; [L284] SORT_1 var_101 = var_101_arg_0 == var_101_arg_1; [L285] SORT_4 var_102_arg_0 = var_43; [L286] SORT_4 var_102_arg_1 = var_96; [L287] SORT_1 var_102 = var_102_arg_0 == var_102_arg_1; [L288] SORT_4 var_103_arg_0 = var_66; [L289] SORT_4 var_103_arg_1 = var_96; [L290] SORT_1 var_103 = var_103_arg_0 == var_103_arg_1; [L291] SORT_4 var_104_arg_0 = var_70; [L292] SORT_4 var_104_arg_1 = var_96; [L293] SORT_1 var_104 = var_104_arg_0 == var_104_arg_1; [L294] SORT_4 var_105_arg_0 = var_74; [L295] SORT_4 var_105_arg_1 = var_96; [L296] SORT_1 var_105 = var_105_arg_0 == var_105_arg_1; [L297] SORT_4 var_106_arg_0 = var_78; [L298] SORT_4 var_106_arg_1 = var_96; [L299] SORT_1 var_106 = var_106_arg_0 == var_106_arg_1; [L300] SORT_1 var_107_arg_0 = var_106; [L301] SORT_2 var_107_arg_1 = var_81; [L302] SORT_2 var_107_arg_2 = var_83; [L303] SORT_2 var_107 = var_107_arg_0 ? var_107_arg_1 : var_107_arg_2; [L304] SORT_1 var_108_arg_0 = var_105; [L305] SORT_2 var_108_arg_1 = var_77; [L306] SORT_2 var_108_arg_2 = var_107; [L307] SORT_2 var_108 = var_108_arg_0 ? var_108_arg_1 : var_108_arg_2; [L308] SORT_1 var_109_arg_0 = var_104; [L309] SORT_2 var_109_arg_1 = var_73; [L310] SORT_2 var_109_arg_2 = var_108; [L311] SORT_2 var_109 = var_109_arg_0 ? var_109_arg_1 : var_109_arg_2; [L312] SORT_1 var_110_arg_0 = var_103; [L313] SORT_2 var_110_arg_1 = var_69; [L314] SORT_2 var_110_arg_2 = var_109; [L315] SORT_2 var_110 = var_110_arg_0 ? var_110_arg_1 : var_110_arg_2; [L316] SORT_1 var_111_arg_0 = var_102; [L317] SORT_2 var_111_arg_1 = var_65; [L318] SORT_2 var_111_arg_2 = var_110; [L319] SORT_2 var_111 = var_111_arg_0 ? var_111_arg_1 : var_111_arg_2; [L320] SORT_1 var_112_arg_0 = var_101; [L321] SORT_2 var_112_arg_1 = var_62; [L322] SORT_2 var_112_arg_2 = var_111; [L323] SORT_2 var_112 = var_112_arg_0 ? var_112_arg_1 : var_112_arg_2; [L324] SORT_1 var_113_arg_0 = var_100; [L325] SORT_2 var_113_arg_1 = var_58; [L326] SORT_2 var_113_arg_2 = var_112; [L327] SORT_2 var_113 = var_113_arg_0 ? var_113_arg_1 : var_113_arg_2; [L328] SORT_1 var_114_arg_0 = var_97; [L329] SORT_2 var_114_arg_1 = state_6; [L330] SORT_2 var_114_arg_2 = var_113; [L331] SORT_2 var_114 = var_114_arg_0 ? var_114_arg_1 : var_114_arg_2; [L332] SORT_1 var_115_arg_0 = var_97; [L333] SORT_2 var_115_arg_1 = var_55; [L334] SORT_2 var_115_arg_2 = var_114; [L335] SORT_2 var_115 = var_115_arg_0 ? var_115_arg_1 : var_115_arg_2; [L336] SORT_4 var_117_arg_0 = var_48; [L337] SORT_4 var_117_arg_1 = var_46; [L338] SORT_4 var_117 = var_117_arg_0 + var_117_arg_1; [L339] var_117 = var_117 & mask_SORT_4 [L340] SORT_4 var_118_arg_0 = var_40; [L341] SORT_4 var_118_arg_1 = var_117; [L342] SORT_1 var_118 = var_118_arg_0 == var_118_arg_1; [L343] SORT_1 var_119_arg_0 = var_47; [L344] SORT_1 var_119_arg_1 = var_118; [L345] SORT_1 var_119 = var_119_arg_0 | var_119_arg_1; [L346] SORT_1 var_120_arg_0 = input_116; [L347] SORT_1 var_120_arg_1 = var_119; [L348] SORT_1 var_120 = var_120_arg_0 & var_120_arg_1; [L349] var_120 = var_120 & mask_SORT_1 [L350] SORT_4 var_121_arg_0 = var_48; [L351] SORT_4 var_121_arg_1 = var_117; [L352] SORT_1 var_121 = var_121_arg_0 == var_121_arg_1; [L353] SORT_4 var_122_arg_0 = var_59; [L354] SORT_4 var_122_arg_1 = var_117; [L355] SORT_1 var_122 = var_122_arg_0 == var_122_arg_1; [L356] SORT_4 var_123_arg_0 = var_43; [L357] SORT_4 var_123_arg_1 = var_117; [L358] SORT_1 var_123 = var_123_arg_0 == var_123_arg_1; [L359] SORT_4 var_124_arg_0 = var_66; [L360] SORT_4 var_124_arg_1 = var_117; [L361] SORT_1 var_124 = var_124_arg_0 == var_124_arg_1; [L362] SORT_4 var_125_arg_0 = var_70; [L363] SORT_4 var_125_arg_1 = var_117; [L364] SORT_1 var_125 = var_125_arg_0 == var_125_arg_1; [L365] SORT_4 var_126_arg_0 = var_74; [L366] SORT_4 var_126_arg_1 = var_117; [L367] SORT_1 var_126 = var_126_arg_0 == var_126_arg_1; [L368] SORT_4 var_127_arg_0 = var_78; [L369] SORT_4 var_127_arg_1 = var_117; [L370] SORT_1 var_127 = var_127_arg_0 == var_127_arg_1; [L371] SORT_1 var_128_arg_0 = var_127; [L372] SORT_2 var_128_arg_1 = var_81; [L373] SORT_2 var_128_arg_2 = var_83; [L374] SORT_2 var_128 = var_128_arg_0 ? var_128_arg_1 : var_128_arg_2; [L375] SORT_1 var_129_arg_0 = var_126; [L376] SORT_2 var_129_arg_1 = var_77; [L377] SORT_2 var_129_arg_2 = var_128; [L378] SORT_2 var_129 = var_129_arg_0 ? var_129_arg_1 : var_129_arg_2; [L379] SORT_1 var_130_arg_0 = var_125; [L380] SORT_2 var_130_arg_1 = var_73; [L381] SORT_2 var_130_arg_2 = var_129; [L382] SORT_2 var_130 = var_130_arg_0 ? var_130_arg_1 : var_130_arg_2; [L383] SORT_1 var_131_arg_0 = var_124; [L384] SORT_2 var_131_arg_1 = var_69; [L385] SORT_2 var_131_arg_2 = var_130; [L386] SORT_2 var_131 = var_131_arg_0 ? var_131_arg_1 : var_131_arg_2; [L387] SORT_1 var_132_arg_0 = var_123; [L388] SORT_2 var_132_arg_1 = var_65; [L389] SORT_2 var_132_arg_2 = var_131; [L390] SORT_2 var_132 = var_132_arg_0 ? var_132_arg_1 : var_132_arg_2; [L391] SORT_1 var_133_arg_0 = var_122; [L392] SORT_2 var_133_arg_1 = var_62; [L393] SORT_2 var_133_arg_2 = var_132; [L394] SORT_2 var_133 = var_133_arg_0 ? var_133_arg_1 : var_133_arg_2; [L395] SORT_1 var_134_arg_0 = var_121; [L396] SORT_2 var_134_arg_1 = var_58; [L397] SORT_2 var_134_arg_2 = var_133; [L398] SORT_2 var_134 = var_134_arg_0 ? var_134_arg_1 : var_134_arg_2; [L399] SORT_1 var_135_arg_0 = var_118; [L400] SORT_2 var_135_arg_1 = state_6; [L401] SORT_2 var_135_arg_2 = var_134; [L402] SORT_2 var_135 = var_135_arg_0 ? var_135_arg_1 : var_135_arg_2; [L403] SORT_1 var_136_arg_0 = var_118; [L404] SORT_2 var_136_arg_1 = var_55; [L405] SORT_2 var_136_arg_2 = var_135; [L406] SORT_2 var_136 = var_136_arg_0 ? var_136_arg_1 : var_136_arg_2; [L407] SORT_4 var_138_arg_0 = var_46; [L408] SORT_4 var_138_arg_1 = var_48; [L409] SORT_4 var_138 = var_138_arg_0 - var_138_arg_1; [L410] var_138 = var_138 & mask_SORT_4 [L411] SORT_4 var_139_arg_0 = var_40; [L412] SORT_4 var_139_arg_1 = var_138; [L413] SORT_1 var_139 = var_139_arg_0 == var_139_arg_1; [L414] SORT_1 var_140_arg_0 = var_139; [L415] SORT_1 var_140_arg_1 = var_47; [L416] SORT_1 var_140 = var_140_arg_0 | var_140_arg_1; [L417] SORT_1 var_141_arg_0 = input_137; [L418] SORT_1 var_141_arg_1 = var_140; [L419] SORT_1 var_141 = var_141_arg_0 & var_141_arg_1; [L420] var_141 = var_141 & mask_SORT_1 [L421] SORT_4 var_142_arg_0 = var_48; [L422] SORT_4 var_142_arg_1 = var_138; [L423] SORT_1 var_142 = var_142_arg_0 == var_142_arg_1; [L424] SORT_4 var_143_arg_0 = var_59; [L425] SORT_4 var_143_arg_1 = var_138; [L426] SORT_1 var_143 = var_143_arg_0 == var_143_arg_1; [L427] SORT_4 var_144_arg_0 = var_43; [L428] SORT_4 var_144_arg_1 = var_138; [L429] SORT_1 var_144 = var_144_arg_0 == var_144_arg_1; [L430] SORT_4 var_145_arg_0 = var_66; [L431] SORT_4 var_145_arg_1 = var_138; [L432] SORT_1 var_145 = var_145_arg_0 == var_145_arg_1; [L433] SORT_4 var_146_arg_0 = var_70; [L434] SORT_4 var_146_arg_1 = var_138; [L435] SORT_1 var_146 = var_146_arg_0 == var_146_arg_1; [L436] SORT_4 var_147_arg_0 = var_74; [L437] SORT_4 var_147_arg_1 = var_138; [L438] SORT_1 var_147 = var_147_arg_0 == var_147_arg_1; [L439] SORT_4 var_148_arg_0 = var_78; [L440] SORT_4 var_148_arg_1 = var_138; [L441] SORT_1 var_148 = var_148_arg_0 == var_148_arg_1; [L442] SORT_1 var_149_arg_0 = var_148; [L443] SORT_2 var_149_arg_1 = var_81; [L444] SORT_2 var_149_arg_2 = var_83; [L445] SORT_2 var_149 = var_149_arg_0 ? var_149_arg_1 : var_149_arg_2; [L446] SORT_1 var_150_arg_0 = var_147; [L447] SORT_2 var_150_arg_1 = var_77; [L448] SORT_2 var_150_arg_2 = var_149; [L449] SORT_2 var_150 = var_150_arg_0 ? var_150_arg_1 : var_150_arg_2; [L450] SORT_1 var_151_arg_0 = var_146; [L451] SORT_2 var_151_arg_1 = var_73; [L452] SORT_2 var_151_arg_2 = var_150; [L453] SORT_2 var_151 = var_151_arg_0 ? var_151_arg_1 : var_151_arg_2; [L454] SORT_1 var_152_arg_0 = var_145; [L455] SORT_2 var_152_arg_1 = var_69; [L456] SORT_2 var_152_arg_2 = var_151; [L457] SORT_2 var_152 = var_152_arg_0 ? var_152_arg_1 : var_152_arg_2; [L458] SORT_1 var_153_arg_0 = var_144; [L459] SORT_2 var_153_arg_1 = var_65; [L460] SORT_2 var_153_arg_2 = var_152; [L461] SORT_2 var_153 = var_153_arg_0 ? var_153_arg_1 : var_153_arg_2; [L462] SORT_1 var_154_arg_0 = var_143; [L463] SORT_2 var_154_arg_1 = var_62; [L464] SORT_2 var_154_arg_2 = var_153; [L465] SORT_2 var_154 = var_154_arg_0 ? var_154_arg_1 : var_154_arg_2; [L466] SORT_1 var_155_arg_0 = var_142; [L467] SORT_2 var_155_arg_1 = var_58; [L468] SORT_2 var_155_arg_2 = var_154; [L469] SORT_2 var_155 = var_155_arg_0 ? var_155_arg_1 : var_155_arg_2; [L470] SORT_1 var_156_arg_0 = var_139; [L471] SORT_2 var_156_arg_1 = state_6; [L472] SORT_2 var_156_arg_2 = var_155; [L473] SORT_2 var_156 = var_156_arg_0 ? var_156_arg_1 : var_156_arg_2; [L474] SORT_1 var_157_arg_0 = var_139; [L475] SORT_2 var_157_arg_1 = var_55; [L476] SORT_2 var_157_arg_2 = var_156; [L477] SORT_2 var_157 = var_157_arg_0 ? var_157_arg_1 : var_157_arg_2; [L478] SORT_1 var_158_arg_0 = var_141; [L479] SORT_2 var_158_arg_1 = var_157; [L480] SORT_2 var_158_arg_2 = state_6; [L481] SORT_2 var_158 = var_158_arg_0 ? var_158_arg_1 : var_158_arg_2; [L482] SORT_1 var_159_arg_0 = var_120; [L483] SORT_2 var_159_arg_1 = var_136; [L484] SORT_2 var_159_arg_2 = var_158; [L485] SORT_2 var_159 = var_159_arg_0 ? var_159_arg_1 : var_159_arg_2; [L486] SORT_1 var_160_arg_0 = var_99; [L487] SORT_2 var_160_arg_1 = var_115; [L488] SORT_2 var_160_arg_2 = var_159; [L489] SORT_2 var_160 = var_160_arg_0 ? var_160_arg_1 : var_160_arg_2; [L490] SORT_1 var_161_arg_0 = var_54; [L491] SORT_2 var_161_arg_1 = var_92; [L492] SORT_2 var_161_arg_2 = var_160; [L493] SORT_2 var_161 = var_161_arg_0 ? var_161_arg_1 : var_161_arg_2; [L494] var_161 = var_161 & mask_SORT_2 [L495] SORT_2 next_162_arg_1 = var_161; [L496] SORT_4 var_163_arg_0 = var_48; [L497] SORT_4 var_163_arg_1 = var_46; [L498] SORT_1 var_163 = var_163_arg_0 == var_163_arg_1; [L499] SORT_1 var_164_arg_0 = var_163; [L500] SORT_1 var_164_arg_1 = var_56; [L501] SORT_1 var_164 = var_164_arg_0 | var_164_arg_1; [L502] SORT_1 var_165_arg_0 = input_39; [L503] SORT_1 var_165_arg_1 = var_164; [L504] SORT_1 var_165 = var_165_arg_0 & var_165_arg_1; [L505] var_165 = var_165 & mask_SORT_1 [L506] SORT_1 var_166_arg_0 = var_56; [L507] SORT_2 var_166_arg_1 = var_55; [L508] SORT_2 var_166_arg_2 = var_91; [L509] SORT_2 var_166 = var_166_arg_0 ? var_166_arg_1 : var_166_arg_2; [L510] SORT_1 var_167_arg_0 = var_163; [L511] SORT_1 var_167_arg_1 = var_100; [L512] SORT_1 var_167 = var_167_arg_0 | var_167_arg_1; [L513] SORT_1 var_168_arg_0 = input_93; [L514] SORT_1 var_168_arg_1 = var_167; [L515] SORT_1 var_168 = var_168_arg_0 & var_168_arg_1; [L516] var_168 = var_168 & mask_SORT_1 [L517] SORT_1 var_169_arg_0 = var_100; [L518] SORT_2 var_169_arg_1 = var_55; [L519] SORT_2 var_169_arg_2 = var_114; [L520] SORT_2 var_169 = var_169_arg_0 ? var_169_arg_1 : var_169_arg_2; [L521] SORT_1 var_170_arg_0 = var_163; [L522] SORT_1 var_170_arg_1 = var_121; [L523] SORT_1 var_170 = var_170_arg_0 | var_170_arg_1; [L524] SORT_1 var_171_arg_0 = input_116; [L525] SORT_1 var_171_arg_1 = var_170; [L526] SORT_1 var_171 = var_171_arg_0 & var_171_arg_1; [L527] var_171 = var_171 & mask_SORT_1 [L528] SORT_1 var_172_arg_0 = var_121; [L529] SORT_2 var_172_arg_1 = var_55; [L530] SORT_2 var_172_arg_2 = var_135; [L531] SORT_2 var_172 = var_172_arg_0 ? var_172_arg_1 : var_172_arg_2; [L532] SORT_1 var_173_arg_0 = var_142; [L533] SORT_1 var_173_arg_1 = var_163; [L534] SORT_1 var_173 = var_173_arg_0 | var_173_arg_1; [L535] SORT_1 var_174_arg_0 = input_137; [L536] SORT_1 var_174_arg_1 = var_173; [L537] SORT_1 var_174 = var_174_arg_0 & var_174_arg_1; [L538] var_174 = var_174 & mask_SORT_1 [L539] SORT_1 var_175_arg_0 = var_142; [L540] SORT_2 var_175_arg_1 = var_55; [L541] SORT_2 var_175_arg_2 = var_156; [L542] SORT_2 var_175 = var_175_arg_0 ? var_175_arg_1 : var_175_arg_2; [L543] SORT_1 var_176_arg_0 = var_174; [L544] SORT_2 var_176_arg_1 = var_175; [L545] SORT_2 var_176_arg_2 = var_58; [L546] SORT_2 var_176 = var_176_arg_0 ? var_176_arg_1 : var_176_arg_2; [L547] SORT_1 var_177_arg_0 = var_171; [L548] SORT_2 var_177_arg_1 = var_172; [L549] SORT_2 var_177_arg_2 = var_176; [L550] SORT_2 var_177 = var_177_arg_0 ? var_177_arg_1 : var_177_arg_2; [L551] SORT_1 var_178_arg_0 = var_168; [L552] SORT_2 var_178_arg_1 = var_169; [L553] SORT_2 var_178_arg_2 = var_177; [L554] SORT_2 var_178 = var_178_arg_0 ? var_178_arg_1 : var_178_arg_2; [L555] SORT_1 var_179_arg_0 = var_165; [L556] SORT_2 var_179_arg_1 = var_166; [L557] SORT_2 var_179_arg_2 = var_178; [L558] SORT_2 var_179 = var_179_arg_0 ? var_179_arg_1 : var_179_arg_2; [L559] SORT_2 var_180_arg_0 = var_57; [L560] SORT_2 var_180_arg_1 = var_179; [L561] SORT_2 var_180 = var_180_arg_0 ^ var_180_arg_1; [L562] SORT_2 next_181_arg_1 = var_180; [L563] SORT_4 var_182_arg_0 = var_59; [L564] SORT_4 var_182_arg_1 = var_46; [L565] SORT_1 var_182 = var_182_arg_0 == var_182_arg_1; [L566] SORT_1 var_183_arg_0 = var_182; [L567] SORT_1 var_183_arg_1 = var_60; [L568] SORT_1 var_183 = var_183_arg_0 | var_183_arg_1; [L569] SORT_1 var_184_arg_0 = input_39; [L570] SORT_1 var_184_arg_1 = var_183; [L571] SORT_1 var_184 = var_184_arg_0 & var_184_arg_1; [L572] var_184 = var_184 & mask_SORT_1 [L573] SORT_1 var_185_arg_0 = var_60; [L574] SORT_2 var_185_arg_1 = var_55; [L575] SORT_2 var_185_arg_2 = var_91; [L576] SORT_2 var_185 = var_185_arg_0 ? var_185_arg_1 : var_185_arg_2; [L577] SORT_1 var_186_arg_0 = var_182; [L578] SORT_1 var_186_arg_1 = var_101; [L579] SORT_1 var_186 = var_186_arg_0 | var_186_arg_1; [L580] SORT_1 var_187_arg_0 = input_93; [L581] SORT_1 var_187_arg_1 = var_186; [L582] SORT_1 var_187 = var_187_arg_0 & var_187_arg_1; [L583] var_187 = var_187 & mask_SORT_1 [L584] SORT_1 var_188_arg_0 = var_101; [L585] SORT_2 var_188_arg_1 = var_55; [L586] SORT_2 var_188_arg_2 = var_114; [L587] SORT_2 var_188 = var_188_arg_0 ? var_188_arg_1 : var_188_arg_2; [L588] SORT_1 var_189_arg_0 = var_182; [L589] SORT_1 var_189_arg_1 = var_122; [L590] SORT_1 var_189 = var_189_arg_0 | var_189_arg_1; [L591] SORT_1 var_190_arg_0 = input_116; [L592] SORT_1 var_190_arg_1 = var_189; [L593] SORT_1 var_190 = var_190_arg_0 & var_190_arg_1; [L594] var_190 = var_190 & mask_SORT_1 [L595] SORT_1 var_191_arg_0 = var_122; [L596] SORT_2 var_191_arg_1 = var_55; [L597] SORT_2 var_191_arg_2 = var_135; [L598] SORT_2 var_191 = var_191_arg_0 ? var_191_arg_1 : var_191_arg_2; [L599] SORT_1 var_192_arg_0 = var_143; [L600] SORT_1 var_192_arg_1 = var_182; [L601] SORT_1 var_192 = var_192_arg_0 | var_192_arg_1; [L602] SORT_1 var_193_arg_0 = input_137; [L603] SORT_1 var_193_arg_1 = var_192; [L604] SORT_1 var_193 = var_193_arg_0 & var_193_arg_1; [L605] var_193 = var_193 & mask_SORT_1 [L606] SORT_1 var_194_arg_0 = var_143; [L607] SORT_2 var_194_arg_1 = var_55; [L608] SORT_2 var_194_arg_2 = var_156; [L609] SORT_2 var_194 = var_194_arg_0 ? var_194_arg_1 : var_194_arg_2; [L610] SORT_1 var_195_arg_0 = var_193; [L611] SORT_2 var_195_arg_1 = var_194; [L612] SORT_2 var_195_arg_2 = var_62; [L613] SORT_2 var_195 = var_195_arg_0 ? var_195_arg_1 : var_195_arg_2; [L614] SORT_1 var_196_arg_0 = var_190; [L615] SORT_2 var_196_arg_1 = var_191; [L616] SORT_2 var_196_arg_2 = var_195; [L617] SORT_2 var_196 = var_196_arg_0 ? var_196_arg_1 : var_196_arg_2; [L618] SORT_1 var_197_arg_0 = var_187; [L619] SORT_2 var_197_arg_1 = var_188; [L620] SORT_2 var_197_arg_2 = var_196; [L621] SORT_2 var_197 = var_197_arg_0 ? var_197_arg_1 : var_197_arg_2; [L622] SORT_1 var_198_arg_0 = var_184; [L623] SORT_2 var_198_arg_1 = var_185; [L624] SORT_2 var_198_arg_2 = var_197; [L625] SORT_2 var_198 = var_198_arg_0 ? var_198_arg_1 : var_198_arg_2; [L626] SORT_2 var_199_arg_0 = var_61; [L627] SORT_2 var_199_arg_1 = var_198; [L628] SORT_2 var_199 = var_199_arg_0 ^ var_199_arg_1; [L629] SORT_2 next_200_arg_1 = var_199; [L630] SORT_4 var_201_arg_0 = var_43; [L631] SORT_4 var_201_arg_1 = var_46; [L632] SORT_1 var_201 = var_201_arg_0 == var_201_arg_1; [L633] SORT_1 var_202_arg_0 = var_201; [L634] SORT_1 var_202_arg_1 = var_63; [L635] SORT_1 var_202 = var_202_arg_0 | var_202_arg_1; [L636] SORT_1 var_203_arg_0 = input_39; [L637] SORT_1 var_203_arg_1 = var_202; [L638] SORT_1 var_203 = var_203_arg_0 & var_203_arg_1; [L639] var_203 = var_203 & mask_SORT_1 [L640] SORT_1 var_204_arg_0 = var_63; [L641] SORT_2 var_204_arg_1 = var_55; [L642] SORT_2 var_204_arg_2 = var_91; [L643] SORT_2 var_204 = var_204_arg_0 ? var_204_arg_1 : var_204_arg_2; [L644] SORT_1 var_205_arg_0 = var_201; [L645] SORT_1 var_205_arg_1 = var_102; [L646] SORT_1 var_205 = var_205_arg_0 | var_205_arg_1; [L647] SORT_1 var_206_arg_0 = input_93; [L648] SORT_1 var_206_arg_1 = var_205; [L649] SORT_1 var_206 = var_206_arg_0 & var_206_arg_1; [L650] var_206 = var_206 & mask_SORT_1 [L651] SORT_1 var_207_arg_0 = var_102; [L652] SORT_2 var_207_arg_1 = var_55; [L653] SORT_2 var_207_arg_2 = var_114; [L654] SORT_2 var_207 = var_207_arg_0 ? var_207_arg_1 : var_207_arg_2; [L655] SORT_1 var_208_arg_0 = var_201; [L656] SORT_1 var_208_arg_1 = var_123; [L657] SORT_1 var_208 = var_208_arg_0 | var_208_arg_1; [L658] SORT_1 var_209_arg_0 = input_116; [L659] SORT_1 var_209_arg_1 = var_208; [L660] SORT_1 var_209 = var_209_arg_0 & var_209_arg_1; [L661] var_209 = var_209 & mask_SORT_1 [L662] SORT_1 var_210_arg_0 = var_123; [L663] SORT_2 var_210_arg_1 = var_55; [L664] SORT_2 var_210_arg_2 = var_135; [L665] SORT_2 var_210 = var_210_arg_0 ? var_210_arg_1 : var_210_arg_2; [L666] SORT_1 var_211_arg_0 = var_144; [L667] SORT_1 var_211_arg_1 = var_201; [L668] SORT_1 var_211 = var_211_arg_0 | var_211_arg_1; [L669] SORT_1 var_212_arg_0 = input_137; [L670] SORT_1 var_212_arg_1 = var_211; [L671] SORT_1 var_212 = var_212_arg_0 & var_212_arg_1; [L672] var_212 = var_212 & mask_SORT_1 [L673] SORT_1 var_213_arg_0 = var_144; [L674] SORT_2 var_213_arg_1 = var_55; [L675] SORT_2 var_213_arg_2 = var_156; [L676] SORT_2 var_213 = var_213_arg_0 ? var_213_arg_1 : var_213_arg_2; [L677] SORT_1 var_214_arg_0 = var_212; [L678] SORT_2 var_214_arg_1 = var_213; [L679] SORT_2 var_214_arg_2 = var_65; [L680] SORT_2 var_214 = var_214_arg_0 ? var_214_arg_1 : var_214_arg_2; [L681] SORT_1 var_215_arg_0 = var_209; [L682] SORT_2 var_215_arg_1 = var_210; [L683] SORT_2 var_215_arg_2 = var_214; [L684] SORT_2 var_215 = var_215_arg_0 ? var_215_arg_1 : var_215_arg_2; [L685] SORT_1 var_216_arg_0 = var_206; [L686] SORT_2 var_216_arg_1 = var_207; [L687] SORT_2 var_216_arg_2 = var_215; [L688] SORT_2 var_216 = var_216_arg_0 ? var_216_arg_1 : var_216_arg_2; [L689] SORT_1 var_217_arg_0 = var_203; [L690] SORT_2 var_217_arg_1 = var_204; [L691] SORT_2 var_217_arg_2 = var_216; [L692] SORT_2 var_217 = var_217_arg_0 ? var_217_arg_1 : var_217_arg_2; [L693] SORT_2 var_218_arg_0 = var_64; [L694] SORT_2 var_218_arg_1 = var_217; [L695] SORT_2 var_218 = var_218_arg_0 ^ var_218_arg_1; [L696] SORT_2 next_219_arg_1 = var_218; [L697] SORT_4 var_220_arg_0 = var_66; [L698] SORT_4 var_220_arg_1 = var_46; [L699] SORT_1 var_220 = var_220_arg_0 == var_220_arg_1; [L700] SORT_1 var_221_arg_0 = var_220; [L701] SORT_1 var_221_arg_1 = var_67; [L702] SORT_1 var_221 = var_221_arg_0 | var_221_arg_1; [L703] SORT_1 var_222_arg_0 = input_39; [L704] SORT_1 var_222_arg_1 = var_221; [L705] SORT_1 var_222 = var_222_arg_0 & var_222_arg_1; [L706] var_222 = var_222 & mask_SORT_1 [L707] SORT_1 var_223_arg_0 = var_67; [L708] SORT_2 var_223_arg_1 = var_55; [L709] SORT_2 var_223_arg_2 = var_91; [L710] SORT_2 var_223 = var_223_arg_0 ? var_223_arg_1 : var_223_arg_2; [L711] SORT_1 var_224_arg_0 = var_220; [L712] SORT_1 var_224_arg_1 = var_103; [L713] SORT_1 var_224 = var_224_arg_0 | var_224_arg_1; [L714] SORT_1 var_225_arg_0 = input_93; [L715] SORT_1 var_225_arg_1 = var_224; [L716] SORT_1 var_225 = var_225_arg_0 & var_225_arg_1; [L717] var_225 = var_225 & mask_SORT_1 [L718] SORT_1 var_226_arg_0 = var_103; [L719] SORT_2 var_226_arg_1 = var_55; [L720] SORT_2 var_226_arg_2 = var_114; [L721] SORT_2 var_226 = var_226_arg_0 ? var_226_arg_1 : var_226_arg_2; [L722] SORT_1 var_227_arg_0 = var_220; [L723] SORT_1 var_227_arg_1 = var_124; [L724] SORT_1 var_227 = var_227_arg_0 | var_227_arg_1; [L725] SORT_1 var_228_arg_0 = input_116; [L726] SORT_1 var_228_arg_1 = var_227; [L727] SORT_1 var_228 = var_228_arg_0 & var_228_arg_1; [L728] var_228 = var_228 & mask_SORT_1 [L729] SORT_1 var_229_arg_0 = var_124; [L730] SORT_2 var_229_arg_1 = var_55; [L731] SORT_2 var_229_arg_2 = var_135; [L732] SORT_2 var_229 = var_229_arg_0 ? var_229_arg_1 : var_229_arg_2; [L733] SORT_1 var_230_arg_0 = var_145; [L734] SORT_1 var_230_arg_1 = var_220; [L735] SORT_1 var_230 = var_230_arg_0 | var_230_arg_1; [L736] SORT_1 var_231_arg_0 = input_137; [L737] SORT_1 var_231_arg_1 = var_230; [L738] SORT_1 var_231 = var_231_arg_0 & var_231_arg_1; [L739] var_231 = var_231 & mask_SORT_1 [L740] SORT_1 var_232_arg_0 = var_145; [L741] SORT_2 var_232_arg_1 = var_55; [L742] SORT_2 var_232_arg_2 = var_156; [L743] SORT_2 var_232 = var_232_arg_0 ? var_232_arg_1 : var_232_arg_2; [L744] SORT_1 var_233_arg_0 = var_231; [L745] SORT_2 var_233_arg_1 = var_232; [L746] SORT_2 var_233_arg_2 = var_69; [L747] SORT_2 var_233 = var_233_arg_0 ? var_233_arg_1 : var_233_arg_2; [L748] SORT_1 var_234_arg_0 = var_228; [L749] SORT_2 var_234_arg_1 = var_229; [L750] SORT_2 var_234_arg_2 = var_233; [L751] SORT_2 var_234 = var_234_arg_0 ? var_234_arg_1 : var_234_arg_2; [L752] SORT_1 var_235_arg_0 = var_225; [L753] SORT_2 var_235_arg_1 = var_226; [L754] SORT_2 var_235_arg_2 = var_234; [L755] SORT_2 var_235 = var_235_arg_0 ? var_235_arg_1 : var_235_arg_2; [L756] SORT_1 var_236_arg_0 = var_222; [L757] SORT_2 var_236_arg_1 = var_223; [L758] SORT_2 var_236_arg_2 = var_235; [L759] SORT_2 var_236 = var_236_arg_0 ? var_236_arg_1 : var_236_arg_2; [L760] SORT_2 var_237_arg_0 = var_68; [L761] SORT_2 var_237_arg_1 = var_236; [L762] SORT_2 var_237 = var_237_arg_0 ^ var_237_arg_1; [L763] SORT_2 next_238_arg_1 = var_237; [L764] SORT_4 var_239_arg_0 = var_70; [L765] SORT_4 var_239_arg_1 = var_46; [L766] SORT_1 var_239 = var_239_arg_0 == var_239_arg_1; [L767] SORT_1 var_240_arg_0 = var_239; [L768] SORT_1 var_240_arg_1 = var_71; [L769] SORT_1 var_240 = var_240_arg_0 | var_240_arg_1; [L770] SORT_1 var_241_arg_0 = input_39; [L771] SORT_1 var_241_arg_1 = var_240; [L772] SORT_1 var_241 = var_241_arg_0 & var_241_arg_1; [L773] var_241 = var_241 & mask_SORT_1 [L774] SORT_1 var_242_arg_0 = var_71; [L775] SORT_2 var_242_arg_1 = var_55; [L776] SORT_2 var_242_arg_2 = var_91; [L777] SORT_2 var_242 = var_242_arg_0 ? var_242_arg_1 : var_242_arg_2; [L778] SORT_1 var_243_arg_0 = var_239; [L779] SORT_1 var_243_arg_1 = var_104; [L780] SORT_1 var_243 = var_243_arg_0 | var_243_arg_1; [L781] SORT_1 var_244_arg_0 = input_93; [L782] SORT_1 var_244_arg_1 = var_243; [L783] SORT_1 var_244 = var_244_arg_0 & var_244_arg_1; [L784] var_244 = var_244 & mask_SORT_1 [L785] SORT_1 var_245_arg_0 = var_104; [L786] SORT_2 var_245_arg_1 = var_55; [L787] SORT_2 var_245_arg_2 = var_114; [L788] SORT_2 var_245 = var_245_arg_0 ? var_245_arg_1 : var_245_arg_2; [L789] SORT_1 var_246_arg_0 = var_239; [L790] SORT_1 var_246_arg_1 = var_125; [L791] SORT_1 var_246 = var_246_arg_0 | var_246_arg_1; [L792] SORT_1 var_247_arg_0 = input_116; [L793] SORT_1 var_247_arg_1 = var_246; [L794] SORT_1 var_247 = var_247_arg_0 & var_247_arg_1; [L795] var_247 = var_247 & mask_SORT_1 [L796] SORT_1 var_248_arg_0 = var_125; [L797] SORT_2 var_248_arg_1 = var_55; [L798] SORT_2 var_248_arg_2 = var_135; [L799] SORT_2 var_248 = var_248_arg_0 ? var_248_arg_1 : var_248_arg_2; [L800] SORT_1 var_249_arg_0 = var_146; [L801] SORT_1 var_249_arg_1 = var_239; [L802] SORT_1 var_249 = var_249_arg_0 | var_249_arg_1; [L803] SORT_1 var_250_arg_0 = input_137; [L804] SORT_1 var_250_arg_1 = var_249; [L805] SORT_1 var_250 = var_250_arg_0 & var_250_arg_1; [L806] var_250 = var_250 & mask_SORT_1 [L807] SORT_1 var_251_arg_0 = var_146; [L808] SORT_2 var_251_arg_1 = var_55; [L809] SORT_2 var_251_arg_2 = var_156; [L810] SORT_2 var_251 = var_251_arg_0 ? var_251_arg_1 : var_251_arg_2; [L811] SORT_1 var_252_arg_0 = var_250; [L812] SORT_2 var_252_arg_1 = var_251; [L813] SORT_2 var_252_arg_2 = var_73; [L814] SORT_2 var_252 = var_252_arg_0 ? var_252_arg_1 : var_252_arg_2; [L815] SORT_1 var_253_arg_0 = var_247; [L816] SORT_2 var_253_arg_1 = var_248; [L817] SORT_2 var_253_arg_2 = var_252; [L818] SORT_2 var_253 = var_253_arg_0 ? var_253_arg_1 : var_253_arg_2; [L819] SORT_1 var_254_arg_0 = var_244; [L820] SORT_2 var_254_arg_1 = var_245; [L821] SORT_2 var_254_arg_2 = var_253; [L822] SORT_2 var_254 = var_254_arg_0 ? var_254_arg_1 : var_254_arg_2; [L823] SORT_1 var_255_arg_0 = var_241; [L824] SORT_2 var_255_arg_1 = var_242; [L825] SORT_2 var_255_arg_2 = var_254; [L826] SORT_2 var_255 = var_255_arg_0 ? var_255_arg_1 : var_255_arg_2; [L827] SORT_2 var_256_arg_0 = var_72; [L828] SORT_2 var_256_arg_1 = var_255; [L829] SORT_2 var_256 = var_256_arg_0 ^ var_256_arg_1; [L830] SORT_2 next_257_arg_1 = var_256; [L831] SORT_4 var_258_arg_0 = var_74; [L832] SORT_4 var_258_arg_1 = var_46; [L833] SORT_1 var_258 = var_258_arg_0 == var_258_arg_1; [L834] SORT_1 var_259_arg_0 = var_258; [L835] SORT_1 var_259_arg_1 = var_75; [L836] SORT_1 var_259 = var_259_arg_0 | var_259_arg_1; [L837] SORT_1 var_260_arg_0 = input_39; [L838] SORT_1 var_260_arg_1 = var_259; [L839] SORT_1 var_260 = var_260_arg_0 & var_260_arg_1; [L840] var_260 = var_260 & mask_SORT_1 [L841] SORT_1 var_261_arg_0 = var_75; [L842] SORT_2 var_261_arg_1 = var_55; [L843] SORT_2 var_261_arg_2 = var_91; [L844] SORT_2 var_261 = var_261_arg_0 ? var_261_arg_1 : var_261_arg_2; [L845] SORT_1 var_262_arg_0 = var_258; [L846] SORT_1 var_262_arg_1 = var_105; [L847] SORT_1 var_262 = var_262_arg_0 | var_262_arg_1; [L848] SORT_1 var_263_arg_0 = input_93; [L849] SORT_1 var_263_arg_1 = var_262; [L850] SORT_1 var_263 = var_263_arg_0 & var_263_arg_1; [L851] var_263 = var_263 & mask_SORT_1 [L852] SORT_1 var_264_arg_0 = var_105; [L853] SORT_2 var_264_arg_1 = var_55; [L854] SORT_2 var_264_arg_2 = var_114; [L855] SORT_2 var_264 = var_264_arg_0 ? var_264_arg_1 : var_264_arg_2; [L856] SORT_1 var_265_arg_0 = var_258; [L857] SORT_1 var_265_arg_1 = var_126; [L858] SORT_1 var_265 = var_265_arg_0 | var_265_arg_1; [L859] SORT_1 var_266_arg_0 = input_116; [L860] SORT_1 var_266_arg_1 = var_265; [L861] SORT_1 var_266 = var_266_arg_0 & var_266_arg_1; [L862] var_266 = var_266 & mask_SORT_1 [L863] SORT_1 var_267_arg_0 = var_126; [L864] SORT_2 var_267_arg_1 = var_55; [L865] SORT_2 var_267_arg_2 = var_135; [L866] SORT_2 var_267 = var_267_arg_0 ? var_267_arg_1 : var_267_arg_2; [L867] SORT_1 var_268_arg_0 = var_147; [L868] SORT_1 var_268_arg_1 = var_258; [L869] SORT_1 var_268 = var_268_arg_0 | var_268_arg_1; [L870] SORT_1 var_269_arg_0 = input_137; [L871] SORT_1 var_269_arg_1 = var_268; [L872] SORT_1 var_269 = var_269_arg_0 & var_269_arg_1; [L873] var_269 = var_269 & mask_SORT_1 [L874] SORT_1 var_270_arg_0 = var_147; [L875] SORT_2 var_270_arg_1 = var_55; [L876] SORT_2 var_270_arg_2 = var_156; [L877] SORT_2 var_270 = var_270_arg_0 ? var_270_arg_1 : var_270_arg_2; [L878] SORT_1 var_271_arg_0 = var_269; [L879] SORT_2 var_271_arg_1 = var_270; [L880] SORT_2 var_271_arg_2 = var_77; [L881] SORT_2 var_271 = var_271_arg_0 ? var_271_arg_1 : var_271_arg_2; [L882] SORT_1 var_272_arg_0 = var_266; [L883] SORT_2 var_272_arg_1 = var_267; [L884] SORT_2 var_272_arg_2 = var_271; [L885] SORT_2 var_272 = var_272_arg_0 ? var_272_arg_1 : var_272_arg_2; [L886] SORT_1 var_273_arg_0 = var_263; [L887] SORT_2 var_273_arg_1 = var_264; [L888] SORT_2 var_273_arg_2 = var_272; [L889] SORT_2 var_273 = var_273_arg_0 ? var_273_arg_1 : var_273_arg_2; [L890] SORT_1 var_274_arg_0 = var_260; [L891] SORT_2 var_274_arg_1 = var_261; [L892] SORT_2 var_274_arg_2 = var_273; [L893] SORT_2 var_274 = var_274_arg_0 ? var_274_arg_1 : var_274_arg_2; [L894] SORT_2 var_275_arg_0 = var_76; [L895] SORT_2 var_275_arg_1 = var_274; [L896] SORT_2 var_275 = var_275_arg_0 ^ var_275_arg_1; [L897] SORT_2 next_276_arg_1 = var_275; [L898] SORT_4 var_277_arg_0 = var_78; [L899] SORT_4 var_277_arg_1 = var_46; [L900] SORT_1 var_277 = var_277_arg_0 == var_277_arg_1; [L901] SORT_1 var_278_arg_0 = var_277; [L902] SORT_1 var_278_arg_1 = var_79; [L903] SORT_1 var_278 = var_278_arg_0 | var_278_arg_1; [L904] SORT_1 var_279_arg_0 = input_39; [L905] SORT_1 var_279_arg_1 = var_278; [L906] SORT_1 var_279 = var_279_arg_0 & var_279_arg_1; [L907] var_279 = var_279 & mask_SORT_1 [L908] SORT_1 var_280_arg_0 = var_79; [L909] SORT_2 var_280_arg_1 = var_55; [L910] SORT_2 var_280_arg_2 = var_91; [L911] SORT_2 var_280 = var_280_arg_0 ? var_280_arg_1 : var_280_arg_2; [L912] SORT_1 var_281_arg_0 = var_277; [L913] SORT_1 var_281_arg_1 = var_106; [L914] SORT_1 var_281 = var_281_arg_0 | var_281_arg_1; [L915] SORT_1 var_282_arg_0 = input_93; [L916] SORT_1 var_282_arg_1 = var_281; [L917] SORT_1 var_282 = var_282_arg_0 & var_282_arg_1; [L918] var_282 = var_282 & mask_SORT_1 [L919] SORT_1 var_283_arg_0 = var_106; [L920] SORT_2 var_283_arg_1 = var_55; [L921] SORT_2 var_283_arg_2 = var_114; [L922] SORT_2 var_283 = var_283_arg_0 ? var_283_arg_1 : var_283_arg_2; [L923] SORT_1 var_284_arg_0 = var_277; [L924] SORT_1 var_284_arg_1 = var_127; [L925] SORT_1 var_284 = var_284_arg_0 | var_284_arg_1; [L926] SORT_1 var_285_arg_0 = input_116; [L927] SORT_1 var_285_arg_1 = var_284; [L928] SORT_1 var_285 = var_285_arg_0 & var_285_arg_1; [L929] var_285 = var_285 & mask_SORT_1 [L930] SORT_1 var_286_arg_0 = var_127; [L931] SORT_2 var_286_arg_1 = var_55; [L932] SORT_2 var_286_arg_2 = var_135; [L933] SORT_2 var_286 = var_286_arg_0 ? var_286_arg_1 : var_286_arg_2; [L934] SORT_1 var_287_arg_0 = var_148; [L935] SORT_1 var_287_arg_1 = var_277; [L936] SORT_1 var_287 = var_287_arg_0 | var_287_arg_1; [L937] SORT_1 var_288_arg_0 = input_137; [L938] SORT_1 var_288_arg_1 = var_287; [L939] SORT_1 var_288 = var_288_arg_0 & var_288_arg_1; [L940] var_288 = var_288 & mask_SORT_1 [L941] SORT_1 var_289_arg_0 = var_148; [L942] SORT_2 var_289_arg_1 = var_55; [L943] SORT_2 var_289_arg_2 = var_156; [L944] SORT_2 var_289 = var_289_arg_0 ? var_289_arg_1 : var_289_arg_2; [L945] SORT_1 var_290_arg_0 = var_288; [L946] SORT_2 var_290_arg_1 = var_289; [L947] SORT_2 var_290_arg_2 = var_81; [L948] SORT_2 var_290 = var_290_arg_0 ? var_290_arg_1 : var_290_arg_2; [L949] SORT_1 var_291_arg_0 = var_285; [L950] SORT_2 var_291_arg_1 = var_286; [L951] SORT_2 var_291_arg_2 = var_290; [L952] SORT_2 var_291 = var_291_arg_0 ? var_291_arg_1 : var_291_arg_2; [L953] SORT_1 var_292_arg_0 = var_282; [L954] SORT_2 var_292_arg_1 = var_283; [L955] SORT_2 var_292_arg_2 = var_291; [L956] SORT_2 var_292 = var_292_arg_0 ? var_292_arg_1 : var_292_arg_2; [L957] SORT_1 var_293_arg_0 = var_279; [L958] SORT_2 var_293_arg_1 = var_280; [L959] SORT_2 var_293_arg_2 = var_292; [L960] SORT_2 var_293 = var_293_arg_0 ? var_293_arg_1 : var_293_arg_2; [L961] SORT_2 var_294_arg_0 = var_80; [L962] SORT_2 var_294_arg_1 = var_293; [L963] SORT_2 var_294 = var_294_arg_0 ^ var_294_arg_1; [L964] SORT_2 next_295_arg_1 = var_294; [L965] SORT_4 var_297_arg_0 = var_296; [L966] SORT_4 var_297_arg_1 = var_46; [L967] SORT_1 var_297 = var_297_arg_0 == var_297_arg_1; [L968] SORT_4 var_298_arg_0 = var_296; [L969] SORT_4 var_298_arg_1 = var_51; [L970] SORT_1 var_298 = var_298_arg_0 == var_298_arg_1; [L971] SORT_1 var_299_arg_0 = var_297; [L972] SORT_1 var_299_arg_1 = var_298; [L973] SORT_1 var_299 = var_299_arg_0 | var_299_arg_1; [L974] SORT_1 var_300_arg_0 = input_39; [L975] SORT_1 var_300_arg_1 = var_299; [L976] SORT_1 var_300 = var_300_arg_0 & var_300_arg_1; [L977] var_300 = var_300 & mask_SORT_1 [L978] SORT_1 var_301_arg_0 = var_298; [L979] SORT_2 var_301_arg_1 = var_55; [L980] SORT_2 var_301_arg_2 = var_91; [L981] SORT_2 var_301 = var_301_arg_0 ? var_301_arg_1 : var_301_arg_2; [L982] SORT_4 var_302_arg_0 = var_296; [L983] SORT_4 var_302_arg_1 = var_96; [L984] SORT_1 var_302 = var_302_arg_0 == var_302_arg_1; [L985] SORT_1 var_303_arg_0 = var_297; [L986] SORT_1 var_303_arg_1 = var_302; [L987] SORT_1 var_303 = var_303_arg_0 | var_303_arg_1; [L988] SORT_1 var_304_arg_0 = input_93; [L989] SORT_1 var_304_arg_1 = var_303; [L990] SORT_1 var_304 = var_304_arg_0 & var_304_arg_1; [L991] var_304 = var_304 & mask_SORT_1 [L992] SORT_1 var_305_arg_0 = var_302; [L993] SORT_2 var_305_arg_1 = var_55; [L994] SORT_2 var_305_arg_2 = var_114; [L995] SORT_2 var_305 = var_305_arg_0 ? var_305_arg_1 : var_305_arg_2; [L996] SORT_4 var_306_arg_0 = var_296; [L997] SORT_4 var_306_arg_1 = var_117; [L998] SORT_1 var_306 = var_306_arg_0 == var_306_arg_1; [L999] SORT_1 var_307_arg_0 = var_297; [L1000] SORT_1 var_307_arg_1 = var_306; [L1001] SORT_1 var_307 = var_307_arg_0 | var_307_arg_1; [L1002] SORT_1 var_308_arg_0 = input_116; [L1003] SORT_1 var_308_arg_1 = var_307; [L1004] SORT_1 var_308 = var_308_arg_0 & var_308_arg_1; [L1005] var_308 = var_308 & mask_SORT_1 [L1006] SORT_1 var_309_arg_0 = var_306; [L1007] SORT_2 var_309_arg_1 = var_55; [L1008] SORT_2 var_309_arg_2 = var_135; [L1009] SORT_2 var_309 = var_309_arg_0 ? var_309_arg_1 : var_309_arg_2; [L1010] SORT_4 var_310_arg_0 = var_296; [L1011] SORT_4 var_310_arg_1 = var_138; [L1012] SORT_1 var_310 = var_310_arg_0 == var_310_arg_1; [L1013] SORT_1 var_311_arg_0 = var_310; [L1014] SORT_1 var_311_arg_1 = var_297; [L1015] SORT_1 var_311 = var_311_arg_0 | var_311_arg_1; [L1016] SORT_1 var_312_arg_0 = input_137; [L1017] SORT_1 var_312_arg_1 = var_311; [L1018] SORT_1 var_312 = var_312_arg_0 & var_312_arg_1; [L1019] var_312 = var_312 & mask_SORT_1 [L1020] SORT_1 var_313_arg_0 = var_310; [L1021] SORT_2 var_313_arg_1 = var_55; [L1022] SORT_2 var_313_arg_2 = var_156; [L1023] SORT_2 var_313 = var_313_arg_0 ? var_313_arg_1 : var_313_arg_2; [L1024] SORT_1 var_314_arg_0 = var_312; [L1025] SORT_2 var_314_arg_1 = var_313; [L1026] SORT_2 var_314_arg_2 = var_83; [L1027] SORT_2 var_314 = var_314_arg_0 ? var_314_arg_1 : var_314_arg_2; [L1028] SORT_1 var_315_arg_0 = var_308; [L1029] SORT_2 var_315_arg_1 = var_309; [L1030] SORT_2 var_315_arg_2 = var_314; [L1031] SORT_2 var_315 = var_315_arg_0 ? var_315_arg_1 : var_315_arg_2; [L1032] SORT_1 var_316_arg_0 = var_304; [L1033] SORT_2 var_316_arg_1 = var_305; [L1034] SORT_2 var_316_arg_2 = var_315; [L1035] SORT_2 var_316 = var_316_arg_0 ? var_316_arg_1 : var_316_arg_2; [L1036] SORT_1 var_317_arg_0 = var_300; [L1037] SORT_2 var_317_arg_1 = var_301; [L1038] SORT_2 var_317_arg_2 = var_316; [L1039] SORT_2 var_317 = var_317_arg_0 ? var_317_arg_1 : var_317_arg_2; [L1040] SORT_2 var_318_arg_0 = var_82; [L1041] SORT_2 var_318_arg_1 = var_317; [L1042] SORT_2 var_318 = var_318_arg_0 ^ var_318_arg_1; [L1043] SORT_2 next_319_arg_1 = var_318; [L1044] SORT_4 var_320_arg_0 = var_48; [L1045] SORT_4 var_320_arg_1 = var_42; [L1046] SORT_4 var_320 = var_320_arg_0 + var_320_arg_1; [L1047] SORT_4 var_321_arg_0 = var_320; [L1048] SORT_2 var_321 = var_321_arg_0 >> 0; [L1049] SORT_4 var_322_arg_0 = var_42; [L1050] SORT_4 var_322_arg_1 = var_48; [L1051] SORT_4 var_322 = var_322_arg_0 - var_322_arg_1; [L1052] SORT_4 var_323_arg_0 = var_322; [L1053] SORT_2 var_323 = var_323_arg_0 >> 0; [L1054] SORT_1 var_324_arg_0 = input_137; [L1055] SORT_2 var_324_arg_1 = var_323; [L1056] SORT_2 var_324_arg_2 = state_24; [L1057] SORT_2 var_324 = var_324_arg_0 ? var_324_arg_1 : var_324_arg_2; [L1058] SORT_1 var_325_arg_0 = input_116; [L1059] SORT_2 var_325_arg_1 = var_321; [L1060] SORT_2 var_325_arg_2 = var_324; [L1061] SORT_2 var_325 = var_325_arg_0 ? var_325_arg_1 : var_325_arg_2; [L1062] var_325 = var_325 & mask_SORT_2 [L1063] SORT_2 next_326_arg_1 = var_325; [L1064] SORT_4 var_327_arg_0 = var_49; [L1065] SORT_2 var_327 = var_327_arg_0 >> 0; [L1066] SORT_4 var_328_arg_0 = var_94; [L1067] SORT_2 var_328 = var_328_arg_0 >> 0; [L1068] SORT_1 var_329_arg_0 = input_93; [L1069] SORT_2 var_329_arg_1 = var_328; [L1070] SORT_2 var_329_arg_2 = state_26; [L1071] SORT_2 var_329 = var_329_arg_0 ? var_329_arg_1 : var_329_arg_2; [L1072] SORT_1 var_330_arg_0 = input_39; [L1073] SORT_2 var_330_arg_1 = var_327; [L1074] SORT_2 var_330_arg_2 = var_329; [L1075] SORT_2 var_330 = var_330_arg_0 ? var_330_arg_1 : var_330_arg_2; [L1076] var_330 = var_330 & mask_SORT_2 [L1077] SORT_2 next_331_arg_1 = var_330; [L1078] SORT_1 next_332_arg_1 = state_29; [L1079] SORT_1 var_334_arg_0 = ~state_31; [L1080] var_334_arg_0 = var_334_arg_0 & mask_SORT_1 [L1081] SORT_1 var_334_arg_1 = ~input_333; [L1082] var_334_arg_1 = var_334_arg_1 & mask_SORT_1 [L1083] SORT_1 var_334 = var_334_arg_0 & var_334_arg_1; [L1084] SORT_1 next_335_arg_1 = ~var_334; [L1085] next_335_arg_1 = next_335_arg_1 & mask_SORT_1 [L1086] SORT_1 var_336_arg_0 = state_33; [L1087] SORT_1 var_336_arg_1 = input_333; [L1088] SORT_1 var_336 = var_336_arg_0 | var_336_arg_1; [L1089] SORT_1 next_337_arg_1 = var_336; [L1090] SORT_4 var_338_arg_0 = var_42; [L1091] SORT_4 var_338_arg_1 = var_40; [L1092] SORT_1 var_338 = var_338_arg_0 <= var_338_arg_1; [L1093] SORT_1 var_339_arg_0 = ~state_29; [L1094] var_339_arg_0 = var_339_arg_0 & mask_SORT_1 [L1095] SORT_1 var_339_arg_1 = ~var_338; [L1096] var_339_arg_1 = var_339_arg_1 & mask_SORT_1 [L1097] SORT_1 var_339 = var_339_arg_0 & var_339_arg_1; [L1098] SORT_1 var_340_arg_0 = ~input_137; [L1099] var_340_arg_0 = var_340_arg_0 & mask_SORT_1 [L1100] SORT_1 var_340_arg_1 = var_339; [L1101] SORT_1 var_340 = var_340_arg_0 | var_340_arg_1; [L1102] SORT_4 var_341_arg_0 = var_59; [L1103] SORT_4 var_341_arg_1 = var_42; [L1104] SORT_1 var_341 = var_341_arg_0 <= var_341_arg_1; [L1105] SORT_1 var_342_arg_0 = ~state_29; [L1106] var_342_arg_0 = var_342_arg_0 & mask_SORT_1 [L1107] SORT_1 var_342_arg_1 = ~var_341; [L1108] var_342_arg_1 = var_342_arg_1 & mask_SORT_1 [L1109] SORT_1 var_342 = var_342_arg_0 & var_342_arg_1; [L1110] SORT_1 var_343_arg_0 = ~input_116; [L1111] var_343_arg_0 = var_343_arg_0 & mask_SORT_1 [L1112] SORT_1 var_343_arg_1 = var_342; [L1113] SORT_1 var_343 = var_343_arg_0 | var_343_arg_1; [L1114] SORT_1 var_344_arg_0 = var_340; [L1115] SORT_1 var_344_arg_1 = var_343; [L1116] SORT_1 var_344 = var_344_arg_0 & var_344_arg_1; [L1117] SORT_4 var_345_arg_0 = var_44; [L1118] SORT_4 var_345_arg_1 = var_40; [L1119] SORT_1 var_345 = var_345_arg_0 <= var_345_arg_1; [L1120] SORT_1 var_346_arg_0 = ~state_29; [L1121] var_346_arg_0 = var_346_arg_0 & mask_SORT_1 [L1122] SORT_1 var_346_arg_1 = ~var_345; [L1123] var_346_arg_1 = var_346_arg_1 & mask_SORT_1 [L1124] SORT_1 var_346 = var_346_arg_0 & var_346_arg_1; [L1125] SORT_1 var_347_arg_0 = ~input_93; [L1126] var_347_arg_0 = var_347_arg_0 & mask_SORT_1 [L1127] SORT_1 var_347_arg_1 = var_346; [L1128] SORT_1 var_347 = var_347_arg_0 | var_347_arg_1; [L1129] SORT_1 var_348_arg_0 = var_344; [L1130] SORT_1 var_348_arg_1 = var_347; [L1131] SORT_1 var_348 = var_348_arg_0 & var_348_arg_1; [L1132] SORT_4 var_349_arg_0 = var_59; [L1133] SORT_4 var_349_arg_1 = var_44; [L1134] SORT_1 var_349 = var_349_arg_0 <= var_349_arg_1; [L1135] SORT_1 var_350_arg_0 = ~state_29; [L1136] var_350_arg_0 = var_350_arg_0 & mask_SORT_1 [L1137] SORT_1 var_350_arg_1 = ~var_349; [L1138] var_350_arg_1 = var_350_arg_1 & mask_SORT_1 [L1139] SORT_1 var_350 = var_350_arg_0 & var_350_arg_1; [L1140] SORT_1 var_351_arg_0 = ~input_39; [L1141] var_351_arg_0 = var_351_arg_0 & mask_SORT_1 [L1142] SORT_1 var_351_arg_1 = var_350; [L1143] SORT_1 var_351 = var_351_arg_0 | var_351_arg_1; [L1144] SORT_1 var_352_arg_0 = var_348; [L1145] SORT_1 var_352_arg_1 = var_351; [L1146] SORT_1 var_352 = var_352_arg_0 & var_352_arg_1; [L1147] SORT_2 var_353_arg_0 = var_82; [L1148] SORT_2 var_353_arg_1 = state_6; [L1149] SORT_1 var_353 = var_353_arg_0 == var_353_arg_1; [L1150] SORT_2 var_354_arg_0 = var_80; [L1151] SORT_2 var_354_arg_1 = var_58; [L1152] SORT_1 var_354 = var_354_arg_0 == var_354_arg_1; [L1153] SORT_1 var_355_arg_0 = var_353; [L1154] SORT_1 var_355_arg_1 = var_354; [L1155] SORT_1 var_355 = var_355_arg_0 & var_355_arg_1; [L1156] SORT_2 var_356_arg_0 = var_76; [L1157] SORT_2 var_356_arg_1 = var_62; [L1158] SORT_1 var_356 = var_356_arg_0 == var_356_arg_1; [L1159] SORT_1 var_357_arg_0 = var_355; [L1160] SORT_1 var_357_arg_1 = var_356; [L1161] SORT_1 var_357 = var_357_arg_0 & var_357_arg_1; [L1162] SORT_2 var_358_arg_0 = var_72; [L1163] SORT_2 var_358_arg_1 = var_65; [L1164] SORT_1 var_358 = var_358_arg_0 == var_358_arg_1; [L1165] SORT_1 var_359_arg_0 = var_357; [L1166] SORT_1 var_359_arg_1 = var_358; [L1167] SORT_1 var_359 = var_359_arg_0 & var_359_arg_1; [L1168] SORT_2 var_360_arg_0 = var_68; [L1169] SORT_2 var_360_arg_1 = var_69; [L1170] SORT_1 var_360 = var_360_arg_0 == var_360_arg_1; [L1171] SORT_1 var_361_arg_0 = var_359; [L1172] SORT_1 var_361_arg_1 = var_360; [L1173] SORT_1 var_361 = var_361_arg_0 & var_361_arg_1; [L1174] SORT_2 var_362_arg_0 = var_64; [L1175] SORT_2 var_362_arg_1 = var_73; [L1176] SORT_1 var_362 = var_362_arg_0 == var_362_arg_1; [L1177] SORT_1 var_363_arg_0 = var_361; [L1178] SORT_1 var_363_arg_1 = var_362; [L1179] SORT_1 var_363 = var_363_arg_0 & var_363_arg_1; [L1180] SORT_2 var_364_arg_0 = var_61; [L1181] SORT_2 var_364_arg_1 = var_77; [L1182] SORT_1 var_364 = var_364_arg_0 == var_364_arg_1; [L1183] SORT_1 var_365_arg_0 = var_363; [L1184] SORT_1 var_365_arg_1 = var_364; [L1185] SORT_1 var_365 = var_365_arg_0 & var_365_arg_1; [L1186] SORT_2 var_366_arg_0 = var_57; [L1187] SORT_2 var_366_arg_1 = var_81; [L1188] SORT_1 var_366 = var_366_arg_0 == var_366_arg_1; [L1189] SORT_1 var_367_arg_0 = var_365; [L1190] SORT_1 var_367_arg_1 = var_366; [L1191] SORT_1 var_367 = var_367_arg_0 & var_367_arg_1; [L1192] SORT_2 var_368_arg_0 = var_55; [L1193] SORT_2 var_368_arg_1 = var_83; [L1194] SORT_1 var_368 = var_368_arg_0 == var_368_arg_1; [L1195] SORT_1 var_369_arg_0 = var_367; [L1196] SORT_1 var_369_arg_1 = var_368; [L1197] SORT_1 var_369 = var_369_arg_0 & var_369_arg_1; [L1198] SORT_1 var_370_arg_0 = ~state_31; [L1199] var_370_arg_0 = var_370_arg_0 & mask_SORT_1 [L1200] SORT_1 var_370_arg_1 = var_369; [L1201] SORT_1 var_370 = var_370_arg_0 & var_370_arg_1; [L1202] SORT_1 var_371_arg_0 = ~input_333; [L1203] var_371_arg_0 = var_371_arg_0 & mask_SORT_1 [L1204] SORT_1 var_371_arg_1 = var_370; [L1205] SORT_1 var_371 = var_371_arg_0 | var_371_arg_1; [L1206] SORT_1 var_372_arg_0 = var_352; [L1207] SORT_1 var_372_arg_1 = var_371; [L1208] SORT_1 var_372 = var_372_arg_0 & var_372_arg_1; [L1209] SORT_1 var_373_arg_0 = input_137; [L1210] SORT_1 var_373_arg_1 = input_116; [L1211] SORT_1 var_373 = var_373_arg_0 | var_373_arg_1; [L1212] SORT_1 var_374_arg_0 = input_93; [L1213] SORT_1 var_374_arg_1 = var_373; [L1214] SORT_1 var_374 = var_374_arg_0 | var_374_arg_1; [L1215] SORT_1 var_375_arg_0 = input_39; [L1216] SORT_1 var_375_arg_1 = var_374; [L1217] SORT_1 var_375 = var_375_arg_0 | var_375_arg_1; [L1218] SORT_1 var_376_arg_0 = input_333; [L1219] SORT_1 var_376_arg_1 = var_375; [L1220] SORT_1 var_376 = var_376_arg_0 | var_376_arg_1; [L1221] SORT_1 var_377_arg_0 = var_372; [L1222] SORT_1 var_377_arg_1 = var_376; [L1223] SORT_1 var_377 = var_377_arg_0 & var_377_arg_1; [L1224] SORT_1 var_378_arg_0 = input_137; [L1225] SORT_1 var_378_arg_1 = input_116; [L1226] SORT_1 var_378 = var_378_arg_0 & var_378_arg_1; [L1227] SORT_1 var_379_arg_0 = input_93; [L1228] SORT_1 var_379_arg_1 = var_373; [L1229] SORT_1 var_379 = var_379_arg_0 & var_379_arg_1; [L1230] SORT_1 var_380_arg_0 = var_378; [L1231] SORT_1 var_380_arg_1 = var_379; [L1232] SORT_1 var_380 = var_380_arg_0 | var_380_arg_1; [L1233] SORT_1 var_381_arg_0 = input_39; [L1234] SORT_1 var_381_arg_1 = var_374; [L1235] SORT_1 var_381 = var_381_arg_0 & var_381_arg_1; [L1236] SORT_1 var_382_arg_0 = var_380; [L1237] SORT_1 var_382_arg_1 = var_381; [L1238] SORT_1 var_382 = var_382_arg_0 | var_382_arg_1; [L1239] SORT_1 var_383_arg_0 = input_333; [L1240] SORT_1 var_383_arg_1 = var_375; [L1241] SORT_1 var_383 = var_383_arg_0 & var_383_arg_1; [L1242] SORT_1 var_384_arg_0 = var_382; [L1243] SORT_1 var_384_arg_1 = var_383; [L1244] SORT_1 var_384 = var_384_arg_0 | var_384_arg_1; [L1245] SORT_1 var_385_arg_0 = var_377; [L1246] SORT_1 var_385_arg_1 = ~var_384; [L1247] var_385_arg_1 = var_385_arg_1 & mask_SORT_1 [L1248] SORT_1 var_385 = var_385_arg_0 & var_385_arg_1; [L1249] SORT_1 var_386_arg_0 = ~state_31; [L1250] var_386_arg_0 = var_386_arg_0 & mask_SORT_1 [L1251] SORT_1 var_386_arg_1 = state_33; [L1252] SORT_1 var_386 = var_386_arg_0 & var_386_arg_1; [L1253] SORT_1 var_387_arg_0 = ~state_29; [L1254] var_387_arg_0 = var_387_arg_0 & mask_SORT_1 [L1255] SORT_1 var_387_arg_1 = ~var_386; [L1256] var_387_arg_1 = var_387_arg_1 & mask_SORT_1 [L1257] SORT_1 var_387 = var_387_arg_0 & var_387_arg_1; [L1258] SORT_1 var_388_arg_0 = ~state_31; [L1259] var_388_arg_0 = var_388_arg_0 & mask_SORT_1 [L1260] SORT_1 var_388_arg_1 = state_33; [L1261] SORT_1 var_388 = var_388_arg_0 | var_388_arg_1; [L1262] SORT_1 var_389_arg_0 = var_387; [L1263] SORT_1 var_389_arg_1 = var_388; [L1264] SORT_1 var_389 = var_389_arg_0 & var_389_arg_1; [L1265] SORT_1 var_390_arg_0 = var_385; [L1266] SORT_1 var_390_arg_1 = var_389; [L1267] SORT_1 var_390 = var_390_arg_0 & var_390_arg_1; [L1268] SORT_1 var_391_arg_0 = var_334; [L1269] SORT_1 var_391_arg_1 = var_336; [L1270] SORT_1 var_391 = var_391_arg_0 & var_391_arg_1; [L1271] SORT_1 var_392_arg_0 = ~state_29; [L1272] var_392_arg_0 = var_392_arg_0 & mask_SORT_1 [L1273] SORT_1 var_392_arg_1 = ~var_391; [L1274] var_392_arg_1 = var_392_arg_1 & mask_SORT_1 [L1275] SORT_1 var_392 = var_392_arg_0 & var_392_arg_1; [L1276] SORT_1 var_393_arg_0 = var_334; [L1277] SORT_1 var_393_arg_1 = var_336; [L1278] SORT_1 var_393 = var_393_arg_0 | var_393_arg_1; [L1279] SORT_1 var_394_arg_0 = var_392; [L1280] SORT_1 var_394_arg_1 = var_393; [L1281] SORT_1 var_394 = var_394_arg_0 & var_394_arg_1; [L1282] SORT_1 var_395_arg_0 = var_390; [L1283] SORT_1 var_395_arg_1 = var_394; [L1284] SORT_1 var_395 = var_395_arg_0 & var_395_arg_1; [L1285] SORT_1 var_396_arg_0 = var_395; [L1286] SORT_1 var_396_arg_1 = ~state_35; [L1287] var_396_arg_1 = var_396_arg_1 & mask_SORT_1 [L1288] SORT_1 var_396 = var_396_arg_0 & var_396_arg_1; [L1289] SORT_1 next_397_arg_1 = ~var_396; [L1290] next_397_arg_1 = next_397_arg_1 & mask_SORT_1 [L1292] state_6 = next_162_arg_1 [L1293] state_8 = next_181_arg_1 [L1294] state_10 = next_200_arg_1 [L1295] state_12 = next_219_arg_1 [L1296] state_14 = next_238_arg_1 [L1297] state_16 = next_257_arg_1 [L1298] state_18 = next_276_arg_1 [L1299] state_20 = next_295_arg_1 [L1300] state_22 = next_319_arg_1 [L1301] state_24 = next_326_arg_1 [L1302] state_26 = next_331_arg_1 [L1303] state_29 = next_332_arg_1 [L1304] state_31 = next_335_arg_1 [L1305] state_33 = next_337_arg_1 [L1306] state_35 = next_397_arg_1 VAL [bad_38_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_15_arg_1=0, init_17_arg_1=0, init_19_arg_1=0, init_21_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_7_arg_1=0, init_9_arg_1=0, input_116=0, input_137=1, input_333=1, input_39=1, input_93=1, mask_SORT_1=1, mask_SORT_2=255, mask_SORT_3=4294967295, mask_SORT_4=4294967295, msb_SORT_1=1, msb_SORT_2=128, msb_SORT_3=8388608, msb_SORT_4=2147483648, next_162_arg_1=0, next_181_arg_1=1, next_200_arg_1=207, next_219_arg_1=0, next_238_arg_1=96, next_257_arg_1=111, next_276_arg_1=6, next_295_arg_1=195, next_319_arg_1=152, next_326_arg_1=255, next_331_arg_1=0, next_332_arg_1=0, next_335_arg_1=1, next_337_arg_1=1, next_397_arg_1=1, state_10=207, state_12=0, state_14=96, state_16=111, state_18=6, state_20=195, state_22=152, state_24=255, state_26=0, state_29=0, state_31=1, state_33=1, state_35=1, state_6=0, state_8=1, var_100=0, var_100_arg_0=1, var_100_arg_1=6, var_101=0, var_101_arg_0=2, var_101_arg_1=6, var_102=0, var_102_arg_0=3, var_102_arg_1=6, var_103=0, var_103_arg_0=4, var_103_arg_1=6, var_104=0, var_104_arg_0=5, var_104_arg_1=6, var_105=1, var_105_arg_0=6, var_105_arg_1=6, var_106=0, var_106_arg_0=7, var_106_arg_1=6, var_107=2, var_107_arg_0=0, var_107_arg_1=1, var_107_arg_2=2, var_108=2, var_108_arg_0=1, var_108_arg_1=2, var_108_arg_2=2, var_109=2, var_109_arg_0=0, var_109_arg_1=2, var_109_arg_2=2, var_110=2, var_110_arg_0=0, var_110_arg_1=3, var_110_arg_2=2, var_111=2, var_111_arg_0=0, var_111_arg_1=3, var_111_arg_2=2, var_112=2, var_112_arg_0=0, var_112_arg_1=5, var_112_arg_2=2, var_113=2, var_113_arg_0=0, var_113_arg_1=1, var_113_arg_2=2, var_114=2, var_114_arg_0=0, var_114_arg_1=0, var_114_arg_2=2, var_115=2, var_115_arg_0=0, var_115_arg_1=0, var_115_arg_2=2, var_117=8, var_117_arg_0=1, var_117_arg_1=0, var_118=0, var_118_arg_0=0, var_118_arg_1=8, var_119=1, var_119_arg_0=1, var_119_arg_1=0, var_120=0, var_120_arg_0=0, var_120_arg_1=1, var_121=0, var_121_arg_0=1, var_121_arg_1=8, var_122=0, var_122_arg_0=2, var_122_arg_1=8, var_123=0, var_123_arg_0=3, var_123_arg_1=8, var_124=0, var_124_arg_0=4, var_124_arg_1=8, var_125=0, var_125_arg_0=5, var_125_arg_1=8, var_126=0, var_126_arg_0=6, var_126_arg_1=8, var_127=0, var_127_arg_0=7, var_127_arg_1=8, var_128=2, var_128_arg_0=0, var_128_arg_1=1, var_128_arg_2=2, var_129=2, var_129_arg_0=0, var_129_arg_1=2, var_129_arg_2=2, var_130=2, var_130_arg_0=0, var_130_arg_1=2, var_130_arg_2=2, var_131=2, var_131_arg_0=0, var_131_arg_1=3, var_131_arg_2=2, var_132=2, var_132_arg_0=0, var_132_arg_1=3, var_132_arg_2=2, var_133=2, var_133_arg_0=0, var_133_arg_1=5, var_133_arg_2=2, var_134=2, var_134_arg_0=0, var_134_arg_1=1, var_134_arg_2=2, var_135=2, var_135_arg_0=0, var_135_arg_1=0, var_135_arg_2=2, var_136=2, var_136_arg_0=0, var_136_arg_1=0, var_136_arg_2=2, var_138=4294967295, var_138_arg_0=0, var_138_arg_1=1, var_139=0, var_139_arg_0=0, var_139_arg_1=4294967295, var_140=1, var_140_arg_0=0, var_140_arg_1=1, var_141=1, var_141_arg_0=1, var_141_arg_1=1, var_142=0, var_142_arg_0=1, var_142_arg_1=4294967295, var_143=0, var_143_arg_0=2, var_143_arg_1=4294967295, var_144=0, var_144_arg_0=3, var_144_arg_1=4294967295, var_145=0, var_145_arg_0=4, var_145_arg_1=4294967295, var_146=0, var_146_arg_0=5, var_146_arg_1=4294967295, var_147=0, var_147_arg_0=6, var_147_arg_1=4294967295, var_148=0, var_148_arg_0=7, var_148_arg_1=4294967295, var_149=2, var_149_arg_0=0, var_149_arg_1=1, var_149_arg_2=2, var_150=2, var_150_arg_0=0, var_150_arg_1=2, var_150_arg_2=2, var_151=2, var_151_arg_0=0, var_151_arg_1=2, var_151_arg_2=2, var_152=2, var_152_arg_0=0, var_152_arg_1=3, var_152_arg_2=2, var_153=2, var_153_arg_0=0, var_153_arg_1=3, var_153_arg_2=2, var_154=2, var_154_arg_0=0, var_154_arg_1=5, var_154_arg_2=2, var_155=2, var_155_arg_0=0, var_155_arg_1=1, var_155_arg_2=2, var_156=2, var_156_arg_0=0, var_156_arg_1=0, var_156_arg_2=2, var_157=2, var_157_arg_0=0, var_157_arg_1=0, var_157_arg_2=2, var_158=2, var_158_arg_0=1, var_158_arg_1=2, var_158_arg_2=0, var_159=2, var_159_arg_0=0, var_159_arg_1=2, var_159_arg_2=2, var_160=2, var_160_arg_0=1, var_160_arg_1=2, var_160_arg_2=2, var_161=0, var_161_arg_0=1, var_161_arg_1=1, var_161_arg_2=2, var_163=0, var_163_arg_0=1, var_163_arg_1=0, var_164=1, var_164_arg_0=0, var_164_arg_1=1, var_165=1, var_165_arg_0=1, var_165_arg_1=1, var_166=0, var_166_arg_0=1, var_166_arg_1=0, var_166_arg_2=1, var_167=0, var_167_arg_0=0, var_167_arg_1=0, var_168=0, var_168_arg_0=1, var_168_arg_1=0, var_169=2, var_169_arg_0=0, var_169_arg_1=0, var_169_arg_2=2, var_170=0, var_170_arg_0=0, var_170_arg_1=0, var_171=0, var_171_arg_0=0, var_171_arg_1=0, var_172=2, var_172_arg_0=0, var_172_arg_1=0, var_172_arg_2=2, var_173=0, var_173_arg_0=0, var_173_arg_1=0, var_174=0, var_174_arg_0=1, var_174_arg_1=0, var_175=2, var_175_arg_0=0, var_175_arg_1=0, var_175_arg_2=2, var_176=1, var_176_arg_0=0, var_176_arg_1=2, var_176_arg_2=1, var_177=1, var_177_arg_0=0, var_177_arg_1=2, var_177_arg_2=1, var_178=1, var_178_arg_0=0, var_178_arg_1=2, var_178_arg_2=1, var_179=0, var_179_arg_0=1, var_179_arg_1=0, var_179_arg_2=1, var_180=1, var_180_arg_0=1, var_180_arg_1=0, var_182=0, var_182_arg_0=2, var_182_arg_1=0, var_183=0, var_183_arg_0=0, var_183_arg_1=0, var_184=0, var_184_arg_0=1, var_184_arg_1=0, var_185=1, var_185_arg_0=0, var_185_arg_1=0, var_185_arg_2=1, var_186=0, var_186_arg_0=0, var_186_arg_1=0, var_187=0, var_187_arg_0=1, var_187_arg_1=0, var_188=2, var_188_arg_0=0, var_188_arg_1=0, var_188_arg_2=2, var_189=0, var_189_arg_0=0, var_189_arg_1=0, var_190=0, var_190_arg_0=0, var_190_arg_1=0, var_191=2, var_191_arg_0=0, var_191_arg_1=0, var_191_arg_2=2, var_192=0, var_192_arg_0=0, var_192_arg_1=0, var_193=0, var_193_arg_0=1, var_193_arg_1=0, var_194=2, var_194_arg_0=0, var_194_arg_1=0, var_194_arg_2=2, var_195=5, var_195_arg_0=0, var_195_arg_1=2, var_195_arg_2=5, var_196=5, var_196_arg_0=0, var_196_arg_1=2, var_196_arg_2=5, var_197=5, var_197_arg_0=0, var_197_arg_1=2, var_197_arg_2=5, var_198=5, var_198_arg_0=0, var_198_arg_1=1, var_198_arg_2=5, var_199=207, var_199_arg_0=2, var_199_arg_1=5, var_201=0, var_201_arg_0=3, var_201_arg_1=0, var_202=0, var_202_arg_0=0, var_202_arg_1=0, var_203=0, var_203_arg_0=1, var_203_arg_1=0, var_204=1, var_204_arg_0=0, var_204_arg_1=0, var_204_arg_2=1, var_205=0, var_205_arg_0=0, var_205_arg_1=0, var_206=0, var_206_arg_0=1, var_206_arg_1=0, var_207=2, var_207_arg_0=0, var_207_arg_1=0, var_207_arg_2=2, var_208=0, var_208_arg_0=0, var_208_arg_1=0, var_209=0, var_209_arg_0=0, var_209_arg_1=0, var_210=2, var_210_arg_0=0, var_210_arg_1=0, var_210_arg_2=2, var_211=0, var_211_arg_0=0, var_211_arg_1=0, var_212=0, var_212_arg_0=1, var_212_arg_1=0, var_213=2, var_213_arg_0=0, var_213_arg_1=0, var_213_arg_2=2, var_214=3, var_214_arg_0=0, var_214_arg_1=2, var_214_arg_2=3, var_215=3, var_215_arg_0=0, var_215_arg_1=2, var_215_arg_2=3, var_216=3, var_216_arg_0=0, var_216_arg_1=2, var_216_arg_2=3, var_217=3, var_217_arg_0=0, var_217_arg_1=1, var_217_arg_2=3, var_218=0, var_218_arg_0=3, var_218_arg_1=3, var_220=0, var_220_arg_0=4, var_220_arg_1=0, var_221=0, var_221_arg_0=0, var_221_arg_1=0, var_222=0, var_222_arg_0=1, var_222_arg_1=0, var_223=1, var_223_arg_0=0, var_223_arg_1=0, var_223_arg_2=1, var_224=0, var_224_arg_0=0, var_224_arg_1=0, var_225=0, var_225_arg_0=1, var_225_arg_1=0, var_226=2, var_226_arg_0=0, var_226_arg_1=0, var_226_arg_2=2, var_227=0, var_227_arg_0=0, var_227_arg_1=0, var_228=0, var_228_arg_0=0, var_228_arg_1=0, var_229=2, var_229_arg_0=0, var_229_arg_1=0, var_229_arg_2=2, var_230=0, var_230_arg_0=0, var_230_arg_1=0, var_231=0, var_231_arg_0=1, var_231_arg_1=0, var_232=2, var_232_arg_0=0, var_232_arg_1=0, var_232_arg_2=2, var_233=3, var_233_arg_0=0, var_233_arg_1=2, var_233_arg_2=3, var_234=3, var_234_arg_0=0, var_234_arg_1=2, var_234_arg_2=3, var_235=3, var_235_arg_0=0, var_235_arg_1=2, var_235_arg_2=3, var_236=3, var_236_arg_0=0, var_236_arg_1=1, var_236_arg_2=3, var_237=96, var_237_arg_0=4, var_237_arg_1=3, var_239=0, var_239_arg_0=5, var_239_arg_1=0, var_240=0, var_240_arg_0=0, var_240_arg_1=0, var_241=0, var_241_arg_0=1, var_241_arg_1=0, var_242=1, var_242_arg_0=0, var_242_arg_1=0, var_242_arg_2=1, var_243=0, var_243_arg_0=0, var_243_arg_1=0, var_244=0, var_244_arg_0=1, var_244_arg_1=0, var_245=2, var_245_arg_0=0, var_245_arg_1=0, var_245_arg_2=2, var_246=0, var_246_arg_0=0, var_246_arg_1=0, var_247=0, var_247_arg_0=0, var_247_arg_1=0, var_248=2, var_248_arg_0=0, var_248_arg_1=0, var_248_arg_2=2, var_249=0, var_249_arg_0=0, var_249_arg_1=0, var_250=0, var_250_arg_0=1, var_250_arg_1=0, var_251=2, var_251_arg_0=0, var_251_arg_1=0, var_251_arg_2=2, var_252=2, var_252_arg_0=0, var_252_arg_1=2, var_252_arg_2=2, var_253=2, var_253_arg_0=0, var_253_arg_1=2, var_253_arg_2=2, var_254=2, var_254_arg_0=0, var_254_arg_1=2, var_254_arg_2=2, var_255=2, var_255_arg_0=0, var_255_arg_1=1, var_255_arg_2=2, var_256=111, var_256_arg_0=5, var_256_arg_1=2, var_258=0, var_258_arg_0=6, var_258_arg_1=0, var_259=0, var_259_arg_0=0, var_259_arg_1=0, var_260=0, var_260_arg_0=1, var_260_arg_1=0, var_261=1, var_261_arg_0=0, var_261_arg_1=0, var_261_arg_2=1, var_262=1, var_262_arg_0=0, var_262_arg_1=1, var_263=1, var_263_arg_0=1, var_263_arg_1=1, var_264=0, var_264_arg_0=1, var_264_arg_1=0, var_264_arg_2=2, var_265=0, var_265_arg_0=0, var_265_arg_1=0, var_266=0, var_266_arg_0=0, var_266_arg_1=0, var_267=2, var_267_arg_0=0, var_267_arg_1=0, var_267_arg_2=2, var_268=0, var_268_arg_0=0, var_268_arg_1=0, var_269=0, var_269_arg_0=1, var_269_arg_1=0, var_270=2, var_270_arg_0=0, var_270_arg_1=0, var_270_arg_2=2, var_271=2, var_271_arg_0=0, var_271_arg_1=2, var_271_arg_2=2, var_272=2, var_272_arg_0=0, var_272_arg_1=2, var_272_arg_2=2, var_273=0, var_273_arg_0=1, var_273_arg_1=0, var_273_arg_2=2, var_274=0, var_274_arg_0=0, var_274_arg_1=1, var_274_arg_2=0, var_275=6, var_275_arg_0=6, var_275_arg_1=0, var_277=0, var_277_arg_0=7, var_277_arg_1=0, var_278=0, var_278_arg_0=0, var_278_arg_1=0, var_279=0, var_279_arg_0=1, var_279_arg_1=0, var_28=0, var_280=1, var_280_arg_0=0, var_280_arg_1=0, var_280_arg_2=1, var_281=0, var_281_arg_0=0, var_281_arg_1=0, var_282=0, var_282_arg_0=1, var_282_arg_1=0, var_283=2, var_283_arg_0=0, var_283_arg_1=0, var_283_arg_2=2, var_284=0, var_284_arg_0=0, var_284_arg_1=0, var_285=0, var_285_arg_0=0, var_285_arg_1=0, var_286=2, var_286_arg_0=0, var_286_arg_1=0, var_286_arg_2=2, var_287=0, var_287_arg_0=0, var_287_arg_1=0, var_288=0, var_288_arg_0=1, var_288_arg_1=0, var_289=2, var_289_arg_0=0, var_289_arg_1=0, var_289_arg_2=2, var_290=1, var_290_arg_0=0, var_290_arg_1=2, var_290_arg_2=1, var_291=1, var_291_arg_0=0, var_291_arg_1=2, var_291_arg_2=1, var_292=1, var_292_arg_0=0, var_292_arg_1=2, var_292_arg_2=1, var_293=1, var_293_arg_0=0, var_293_arg_1=1, var_293_arg_2=1, var_294=195, var_294_arg_0=7, var_294_arg_1=1, var_296=8, var_297=0, var_297_arg_0=8, var_297_arg_1=0, var_298=0, var_298_arg_0=8, var_298_arg_1=1, var_299=0, var_299_arg_0=0, var_299_arg_1=0, var_300=0, var_300_arg_0=1, var_300_arg_1=0, var_301=1, var_301_arg_0=0, var_301_arg_1=0, var_301_arg_2=1, var_302=0, var_302_arg_0=8, var_302_arg_1=6, var_303=0, var_303_arg_0=0, var_303_arg_1=0, var_304=0, var_304_arg_0=1, var_304_arg_1=0, var_305=2, var_305_arg_0=0, var_305_arg_1=0, var_305_arg_2=2, var_306=1, var_306_arg_0=8, var_306_arg_1=8, var_307=1, var_307_arg_0=0, var_307_arg_1=1, var_308=0, var_308_arg_0=0, var_308_arg_1=1, var_309=0, var_309_arg_0=1, var_309_arg_1=0, var_309_arg_2=2, var_310=0, var_310_arg_0=8, var_310_arg_1=4294967295, var_311=0, var_311_arg_0=0, var_311_arg_1=0, var_312=0, var_312_arg_0=1, var_312_arg_1=0, var_313=2, var_313_arg_0=0, var_313_arg_1=0, var_313_arg_2=2, var_314=2, var_314_arg_0=0, var_314_arg_1=2, var_314_arg_2=2, var_315=2, var_315_arg_0=0, var_315_arg_1=0, var_315_arg_2=2, var_316=2, var_316_arg_0=0, var_316_arg_1=2, var_316_arg_2=2, var_317=2, var_317_arg_0=0, var_317_arg_1=1, var_317_arg_2=2, var_318=152, var_318_arg_0=8, var_318_arg_1=2, var_320=1, var_320_arg_0=1, var_320_arg_1=0, var_321=1, var_321_arg_0=1, var_322=4294967295, var_322_arg_0=0, var_322_arg_1=1, var_323=255, var_323_arg_0=4294967295, var_324=255, var_324_arg_0=1, var_324_arg_1=255, var_324_arg_2=0, var_325=255, var_325_arg_0=0, var_325_arg_1=1, var_325_arg_2=255, var_327=1, var_327_arg_0=1, var_328=255, var_328_arg_0=4294967295, var_329=255, var_329_arg_0=1, var_329_arg_1=255, var_329_arg_2=0, var_330=0, var_330_arg_0=1, var_330_arg_1=1, var_330_arg_2=255, var_334=0, var_334_arg_0=0, var_334_arg_1=1, var_336=1, var_336_arg_0=0, var_336_arg_1=1, var_338=1, var_338_arg_0=0, var_338_arg_1=0, var_339=1, var_339_arg_0=1, var_339_arg_1=1, var_340=1, var_340_arg_0=0, var_340_arg_1=1, var_341=0, var_341_arg_0=2, var_341_arg_1=0, var_342=0, var_342_arg_0=1, var_342_arg_1=0, var_343=0, var_343_arg_0=0, var_343_arg_1=0, var_344=0, var_344_arg_0=1, var_344_arg_1=0, var_345=1, var_345_arg_0=0, var_345_arg_1=0, var_346=0, var_346_arg_0=0, var_346_arg_1=1, var_347=1, var_347_arg_0=1, var_347_arg_1=0, var_348=0, var_348_arg_0=0, var_348_arg_1=1, var_349=0, var_349_arg_0=2, var_349_arg_1=0, var_350=0, var_350_arg_0=0, var_350_arg_1=1, var_351=0, var_351_arg_0=0, var_351_arg_1=0, var_352=0, var_352_arg_0=0, var_352_arg_1=0, var_353=0, var_353_arg_0=8, var_353_arg_1=0, var_354=0, var_354_arg_0=7, var_354_arg_1=1, var_355=0, var_355_arg_0=0, var_355_arg_1=0, var_356=0, var_356_arg_0=6, var_356_arg_1=5, var_357=0, var_357_arg_0=0, var_357_arg_1=0, var_358=0, var_358_arg_0=5, var_358_arg_1=3, var_359=0, var_359_arg_0=0, var_359_arg_1=0, var_360=0, var_360_arg_0=4, var_360_arg_1=3, var_361=0, var_361_arg_0=0, var_361_arg_1=0, var_362=0, var_362_arg_0=3, var_362_arg_1=2, var_363=0, var_363_arg_0=0, var_363_arg_1=0, var_364=1, var_364_arg_0=2, var_364_arg_1=2, var_365=0, var_365_arg_0=0, var_365_arg_1=1, var_366=1, var_366_arg_0=1, var_366_arg_1=1, var_367=0, var_367_arg_0=0, var_367_arg_1=1, var_368=0, var_368_arg_0=0, var_368_arg_1=2, var_369=0, var_369_arg_0=0, var_369_arg_1=0, var_37=0, var_370=0, var_370_arg_0=0, var_370_arg_1=0, var_371=1, var_371_arg_0=1, var_371_arg_1=0, var_372=0, var_372_arg_0=0, var_372_arg_1=1, var_373=1, var_373_arg_0=1, var_373_arg_1=0, var_374=1, var_374_arg_0=1, var_374_arg_1=1, var_375=1, var_375_arg_0=1, var_375_arg_1=1, var_376=1, var_376_arg_0=1, var_376_arg_1=1, var_377=0, var_377_arg_0=0, var_377_arg_1=1, var_378=0, var_378_arg_0=1, var_378_arg_1=0, var_379=1, var_379_arg_0=1, var_379_arg_1=1, var_37_arg_0=0, var_37_arg_1=1, var_380=1, var_380_arg_0=0, var_380_arg_1=1, var_381=1, var_381_arg_0=1, var_381_arg_1=1, var_382=1, var_382_arg_0=1, var_382_arg_1=1, var_383=1, var_383_arg_0=1, var_383_arg_1=1, var_384=1, var_384_arg_0=1, var_384_arg_1=1, var_385=0, var_385_arg_0=0, var_385_arg_1=1, var_386=0, var_386_arg_0=1, var_386_arg_1=0, var_387=1, var_387_arg_0=1, var_387_arg_1=1, var_388=0, var_388_arg_0=0, var_388_arg_1=0, var_389=0, var_389_arg_0=1, var_389_arg_1=0, var_390=0, var_390_arg_0=0, var_390_arg_1=0, var_391=0, var_391_arg_0=0, var_391_arg_1=1, var_392=0, var_392_arg_0=0, var_392_arg_1=1, var_393=1, var_393_arg_0=0, var_393_arg_1=1, var_394=0, var_394_arg_0=0, var_394_arg_1=1, var_395=0, var_395_arg_0=0, var_395_arg_1=0, var_396=0, var_396_arg_0=0, var_396_arg_1=1, var_40=0, var_41=0, var_42=0, var_42_arg_0=0, var_42_arg_1=0, var_43=3, var_44=0, var_44_arg_0=0, var_44_arg_1=0, var_45=0, var_45_arg_0=3, var_45_arg_1=0, var_46=0, var_46_arg_0=0, var_46_arg_1=0, var_47=1, var_47_arg_0=0, var_47_arg_1=0, var_48=1, var_49=1, var_49_arg_0=1, var_49_arg_1=0, var_5=0, var_50=3, var_50_arg_0=3, var_50_arg_1=1, var_51=1, var_51_arg_0=0, var_51_arg_1=3, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=1, var_53_arg_0=1, var_53_arg_1=0, var_54=1, var_54_arg_0=1, var_54_arg_1=1, var_55=0, var_56=1, var_56_arg_0=1, var_56_arg_1=1, var_57=1, var_58=1, var_58_arg_0=1, var_58_arg_1=0, var_59=2, var_60=0, var_60_arg_0=2, var_60_arg_1=1, var_61=2, var_62=5, var_62_arg_0=2, var_62_arg_1=0, var_63=0, var_63_arg_0=3, var_63_arg_1=1, var_64=3, var_65=3, var_65_arg_0=3, var_65_arg_1=0, var_66=4, var_67=0, var_67_arg_0=4, var_67_arg_1=1, var_68=4, var_69=3, var_69_arg_0=4, var_69_arg_1=0, var_70=5, var_71=0, var_71_arg_0=5, var_71_arg_1=1, var_72=5, var_73=2, var_73_arg_0=5, var_73_arg_1=0, var_74=6, var_75=0, var_75_arg_0=6, var_75_arg_1=1, var_76=6, var_77=2, var_77_arg_0=6, var_77_arg_1=0, var_78=7, var_79=0, var_79_arg_0=7, var_79_arg_1=1, var_80=7, var_81=1, var_81_arg_0=7, var_81_arg_1=0, var_82=8, var_83=2, var_83_arg_0=8, var_83_arg_1=0, var_84=2, var_84_arg_0=0, var_84_arg_1=1, var_84_arg_2=2, var_85=2, var_85_arg_0=0, var_85_arg_1=2, var_85_arg_2=2, var_86=2, var_86_arg_0=0, var_86_arg_1=2, var_86_arg_2=2, var_87=2, var_87_arg_0=0, var_87_arg_1=3, var_87_arg_2=2, var_88=2, var_88_arg_0=0, var_88_arg_1=3, var_88_arg_2=2, var_89=2, var_89_arg_0=0, var_89_arg_1=5, var_89_arg_2=2, var_90=1, var_90_arg_0=1, var_90_arg_1=1, var_90_arg_2=2, var_91=1, var_91_arg_0=0, var_91_arg_1=0, var_91_arg_2=1, var_92=1, var_92_arg_0=0, var_92_arg_1=0, var_92_arg_2=1, var_94=4294967295, var_94_arg_0=0, var_94_arg_1=1, var_95=4294967293, var_95_arg_0=3, var_95_arg_1=4294967295, var_96=6, var_96_arg_0=0, var_96_arg_1=4294967293, var_97=0, var_97_arg_0=0, var_97_arg_1=6, var_98=1, var_98_arg_0=1, var_98_arg_1=0, var_99=1, var_99_arg_0=1, var_99_arg_1=1] [L113] input_39 = __VERIFIER_nondet_uchar() [L114] input_39 = input_39 & mask_SORT_1 [L115] input_93 = __VERIFIER_nondet_uchar() [L116] input_93 = input_93 & mask_SORT_1 [L117] input_116 = __VERIFIER_nondet_uchar() [L118] input_116 = input_116 & mask_SORT_1 [L119] input_137 = __VERIFIER_nondet_uchar() [L120] input_137 = input_137 & mask_SORT_1 [L121] input_333 = __VERIFIER_nondet_uchar() [L124] SORT_1 var_37_arg_0 = state_33; [L125] SORT_1 var_37_arg_1 = ~state_35; [L126] var_37_arg_1 = var_37_arg_1 & mask_SORT_1 [L127] SORT_1 var_37 = var_37_arg_0 & var_37_arg_1; [L128] var_37 = var_37 & mask_SORT_1 [L129] SORT_1 bad_38_arg_0 = var_37; [L130] CALL __VERIFIER_assert(!(bad_38_arg_0)) [L20] COND TRUE !(cond) VAL [\old(cond)=0, cond=0] [L20] reach_error() VAL [\old(cond)=0, cond=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 7 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 422.8s, OverallIterations: 2, TraceHistogramMax: 2, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 2.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 1 mSolverCounterUnknown, 3 SdHoareTripleChecker+Valid, 2.2s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 3 mSDsluCounter, 6 SdHoareTripleChecker+Invalid, 2.2s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 4 mSDsCounter, 1 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 7 IncrementalHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 1 mSolverCounterUnsat, 2 mSDtfsCounter, 7 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=8occurred in iteration=1, InterpolantAutomatonStates: 5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 1 MinimizatonAttempts, 1 StatesRemovedByMinimization, 1 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.3s SsaConstructionTime, 175.2s SatisfiabilityAnalysisTime, 0.5s InterpolantComputationTime, 11 NumberOfCodeBlocks, 11 NumberOfCodeBlocksAsserted, 2 NumberOfCheckSat, 3 ConstructedInterpolants, 0 QuantifiedInterpolants, 8 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 1 InterpolantComputations, 1 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2022-11-16 19:37:31,496 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.loyd.2.prop1-func-interl.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/config/svcomp-Reach-64bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0 --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash ed61074eddcb834d61e28f232b7629873df53457bf4184fbdaa62dbd20153dd8 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-e04fb08 [2022-11-16 19:37:33,798 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-16 19:37:33,800 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-16 19:37:33,822 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-16 19:37:33,822 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-16 19:37:33,824 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-16 19:37:33,825 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-16 19:37:33,827 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-16 19:37:33,829 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-16 19:37:33,830 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-16 19:37:33,831 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-16 19:37:33,832 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-16 19:37:33,833 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-16 19:37:33,834 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-16 19:37:33,835 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-16 19:37:33,836 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-16 19:37:33,837 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-16 19:37:33,838 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-16 19:37:33,840 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-16 19:37:33,842 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-16 19:37:33,843 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-16 19:37:33,855 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-16 19:37:33,857 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-16 19:37:33,858 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-16 19:37:33,863 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-16 19:37:33,873 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-16 19:37:33,873 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-16 19:37:33,874 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-16 19:37:33,875 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-16 19:37:33,876 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-16 19:37:33,876 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-16 19:37:33,877 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-16 19:37:33,878 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-16 19:37:33,878 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-16 19:37:33,879 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-16 19:37:33,880 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-16 19:37:33,880 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-16 19:37:33,885 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-16 19:37:33,885 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-16 19:37:33,886 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-16 19:37:33,887 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-16 19:37:33,888 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/config/svcomp-Reach-64bit-Taipan_Bitvector.epf [2022-11-16 19:37:33,943 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-16 19:37:33,943 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-16 19:37:33,945 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-16 19:37:33,945 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-16 19:37:33,946 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-16 19:37:33,946 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-16 19:37:33,946 INFO L138 SettingsManager]: * User list type=DISABLED [2022-11-16 19:37:33,947 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-11-16 19:37:33,947 INFO L138 SettingsManager]: * Explicit value domain=true [2022-11-16 19:37:33,947 INFO L138 SettingsManager]: * Octagon Domain=false [2022-11-16 19:37:33,948 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-11-16 19:37:33,948 INFO L138 SettingsManager]: * Interval Domain=false [2022-11-16 19:37:33,950 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-16 19:37:33,950 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-16 19:37:33,950 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-16 19:37:33,950 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-16 19:37:33,951 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-16 19:37:33,951 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-11-16 19:37:33,951 INFO L138 SettingsManager]: * Use bitvectors instead of ints=true [2022-11-16 19:37:33,951 INFO L138 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2022-11-16 19:37:33,952 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-16 19:37:33,952 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-16 19:37:33,952 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-16 19:37:33,952 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-16 19:37:33,952 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-16 19:37:33,953 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-16 19:37:33,953 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-16 19:37:33,953 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-16 19:37:33,953 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-16 19:37:33,954 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-16 19:37:33,954 INFO L138 SettingsManager]: * Trace refinement strategy=WALRUS [2022-11-16 19:37:33,954 INFO L138 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2022-11-16 19:37:33,954 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-16 19:37:33,955 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-11-16 19:37:33,955 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-11-16 19:37:33,955 INFO L138 SettingsManager]: * Logic for external solver=AUFBV WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> ed61074eddcb834d61e28f232b7629873df53457bf4184fbdaa62dbd20153dd8 [2022-11-16 19:37:34,350 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-16 19:37:34,378 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-16 19:37:34,382 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-16 19:37:34,383 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-16 19:37:34,384 INFO L275 PluginConnector]: CDTParser initialized [2022-11-16 19:37:34,386 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.loyd.2.prop1-func-interl.c [2022-11-16 19:37:34,463 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/data/4247ea8fe/aa84c841e87e4b59aa7df26bebb996d0/FLAGb5e0c5a49 [2022-11-16 19:37:35,169 INFO L306 CDTParser]: Found 1 translation units. [2022-11-16 19:37:35,174 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.loyd.2.prop1-func-interl.c [2022-11-16 19:37:35,190 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/data/4247ea8fe/aa84c841e87e4b59aa7df26bebb996d0/FLAGb5e0c5a49 [2022-11-16 19:37:35,419 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/data/4247ea8fe/aa84c841e87e4b59aa7df26bebb996d0 [2022-11-16 19:37:35,421 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-16 19:37:35,423 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-16 19:37:35,424 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-16 19:37:35,424 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-16 19:37:35,434 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-16 19:37:35,435 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 07:37:35" (1/1) ... [2022-11-16 19:37:35,436 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3cf3087f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:37:35, skipping insertion in model container [2022-11-16 19:37:35,436 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 07:37:35" (1/1) ... [2022-11-16 19:37:35,443 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-16 19:37:35,493 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-16 19:37:35,645 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.loyd.2.prop1-func-interl.c[1014,1027] [2022-11-16 19:37:36,008 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 19:37:36,012 INFO L203 MainTranslator]: Completed pre-run [2022-11-16 19:37:36,024 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.loyd.2.prop1-func-interl.c[1014,1027] [2022-11-16 19:37:36,213 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 19:37:36,226 INFO L208 MainTranslator]: Completed translation [2022-11-16 19:37:36,227 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:37:36 WrapperNode [2022-11-16 19:37:36,227 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-16 19:37:36,228 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-16 19:37:36,228 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-16 19:37:36,228 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-16 19:37:36,234 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:37:36" (1/1) ... [2022-11-16 19:37:36,293 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:37:36" (1/1) ... [2022-11-16 19:37:36,414 INFO L138 Inliner]: procedures = 11, calls = 3, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1302 [2022-11-16 19:37:36,414 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-16 19:37:36,423 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-16 19:37:36,423 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-16 19:37:36,423 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-16 19:37:36,431 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:37:36" (1/1) ... [2022-11-16 19:37:36,432 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:37:36" (1/1) ... [2022-11-16 19:37:36,441 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:37:36" (1/1) ... [2022-11-16 19:37:36,442 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:37:36" (1/1) ... [2022-11-16 19:37:36,497 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:37:36" (1/1) ... [2022-11-16 19:37:36,518 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:37:36" (1/1) ... [2022-11-16 19:37:36,523 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:37:36" (1/1) ... [2022-11-16 19:37:36,528 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:37:36" (1/1) ... [2022-11-16 19:37:36,553 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-16 19:37:36,587 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-16 19:37:36,588 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-16 19:37:36,588 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-16 19:37:36,591 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:37:36" (1/1) ... [2022-11-16 19:37:36,598 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-16 19:37:36,608 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/z3 [2022-11-16 19:37:36,624 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-16 19:37:36,651 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-16 19:37:36,674 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-16 19:37:36,674 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-16 19:37:37,113 INFO L235 CfgBuilder]: Building ICFG [2022-11-16 19:37:37,115 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-16 19:37:39,283 INFO L276 CfgBuilder]: Performing block encoding [2022-11-16 19:37:39,293 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-16 19:37:39,293 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-16 19:37:39,295 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 07:37:39 BoogieIcfgContainer [2022-11-16 19:37:39,295 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-16 19:37:39,300 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-16 19:37:39,300 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-16 19:37:39,303 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-16 19:37:39,304 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 16.11 07:37:35" (1/3) ... [2022-11-16 19:37:39,305 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4f570fc1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.11 07:37:39, skipping insertion in model container [2022-11-16 19:37:39,305 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:37:36" (2/3) ... [2022-11-16 19:37:39,305 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4f570fc1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.11 07:37:39, skipping insertion in model container [2022-11-16 19:37:39,306 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 07:37:39" (3/3) ... [2022-11-16 19:37:39,307 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.loyd.2.prop1-func-interl.c [2022-11-16 19:37:39,325 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-16 19:37:39,326 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-16 19:37:39,400 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-16 19:37:39,407 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@386b0d8a, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-16 19:37:39,408 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-16 19:37:39,411 INFO L276 IsEmpty]: Start isEmpty. Operand has 11 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 10 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 19:37:39,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2022-11-16 19:37:39,416 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 19:37:39,417 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2022-11-16 19:37:39,417 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 19:37:39,422 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 19:37:39,422 INFO L85 PathProgramCache]: Analyzing trace with hash 28698761, now seen corresponding path program 1 times [2022-11-16 19:37:39,434 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-16 19:37:39,434 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1100952090] [2022-11-16 19:37:39,434 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 19:37:39,435 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 19:37:39,435 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/mathsat [2022-11-16 19:37:39,443 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 19:37:39,444 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (2)] Waiting until timeout for monitored process [2022-11-16 19:37:39,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 19:37:39,765 INFO L263 TraceCheckSpWp]: Trace formula consists of 75 conjuncts, 10 conjunts are in the unsatisfiable core [2022-11-16 19:37:39,776 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 19:37:39,889 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 19:37:39,889 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-16 19:37:39,890 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-16 19:37:39,890 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1100952090] [2022-11-16 19:37:39,891 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1100952090] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 19:37:39,891 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 19:37:39,891 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-16 19:37:39,893 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [525170361] [2022-11-16 19:37:39,895 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 19:37:39,901 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-16 19:37:39,901 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-16 19:37:39,959 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-16 19:37:39,964 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-16 19:37:39,966 INFO L87 Difference]: Start difference. First operand has 11 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 10 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 19:37:40,221 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 19:37:40,221 INFO L93 Difference]: Finished difference Result 20 states and 30 transitions. [2022-11-16 19:37:40,222 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-16 19:37:40,224 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 5 [2022-11-16 19:37:40,224 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 19:37:40,233 INFO L225 Difference]: With dead ends: 20 [2022-11-16 19:37:40,233 INFO L226 Difference]: Without dead ends: 11 [2022-11-16 19:37:40,236 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-16 19:37:40,240 INFO L413 NwaCegarLoop]: 5 mSDtfsCounter, 4 mSDsluCounter, 8 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 13 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-16 19:37:40,241 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 13 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-16 19:37:40,259 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11 states. [2022-11-16 19:37:40,270 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11 to 9. [2022-11-16 19:37:40,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 8 states have (on average 1.125) internal successors, (9), 8 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 19:37:40,272 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 9 transitions. [2022-11-16 19:37:40,273 INFO L78 Accepts]: Start accepts. Automaton has 9 states and 9 transitions. Word has length 5 [2022-11-16 19:37:40,274 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 19:37:40,274 INFO L495 AbstractCegarLoop]: Abstraction has 9 states and 9 transitions. [2022-11-16 19:37:40,274 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 19:37:40,275 INFO L276 IsEmpty]: Start isEmpty. Operand 9 states and 9 transitions. [2022-11-16 19:37:40,275 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2022-11-16 19:37:40,275 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 19:37:40,275 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1] [2022-11-16 19:37:40,298 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (2)] Ended with exit code 0 [2022-11-16 19:37:40,494 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 19:37:40,495 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 19:37:40,495 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 19:37:40,495 INFO L85 PathProgramCache]: Analyzing trace with hash 271073635, now seen corresponding path program 1 times [2022-11-16 19:37:40,498 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-16 19:37:40,499 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1787010667] [2022-11-16 19:37:40,499 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 19:37:40,499 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 19:37:40,500 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/mathsat [2022-11-16 19:37:40,501 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 19:37:40,519 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (3)] Waiting until timeout for monitored process [2022-11-16 19:37:41,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 19:37:41,451 INFO L263 TraceCheckSpWp]: Trace formula consists of 1181 conjuncts, 55 conjunts are in the unsatisfiable core [2022-11-16 19:37:41,466 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 19:37:41,981 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 19:37:41,981 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 19:37:42,841 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 19:37:42,842 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-16 19:37:42,843 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1787010667] [2022-11-16 19:37:42,843 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1787010667] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 19:37:42,847 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1200968630] [2022-11-16 19:37:42,848 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 19:37:42,848 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-16 19:37:42,849 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/cvc4 [2022-11-16 19:37:42,855 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-16 19:37:42,871 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/cvc4 --incremental --print-success --lang smt (4)] Waiting until timeout for monitored process [2022-11-16 19:37:44,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 19:37:44,224 INFO L263 TraceCheckSpWp]: Trace formula consists of 1181 conjuncts, 60 conjunts are in the unsatisfiable core [2022-11-16 19:37:44,236 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 19:37:44,574 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 19:37:44,574 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 19:37:47,420 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 19:37:47,420 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1200968630] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 19:37:47,421 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [373444992] [2022-11-16 19:37:47,421 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 19:37:47,421 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 19:37:47,421 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/z3 [2022-11-16 19:37:47,425 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 19:37:47,433 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-11-16 19:37:48,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 19:37:48,056 INFO L263 TraceCheckSpWp]: Trace formula consists of 1181 conjuncts, 52 conjunts are in the unsatisfiable core [2022-11-16 19:37:48,067 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 19:37:48,464 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 19:37:48,466 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 19:37:53,323 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 19:37:53,323 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [373444992] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 19:37:53,324 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-16 19:37:53,324 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 6, 6] total 14 [2022-11-16 19:37:53,325 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [187543462] [2022-11-16 19:37:53,325 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-16 19:37:53,326 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-11-16 19:37:53,326 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-16 19:37:53,327 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-11-16 19:37:53,328 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=137, Unknown=3, NotChecked=0, Total=182 [2022-11-16 19:37:53,328 INFO L87 Difference]: Start difference. First operand 9 states and 9 transitions. Second operand has 14 states, 14 states have (on average 2.142857142857143) internal successors, (30), 14 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 19:37:53,803 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 19:37:53,803 INFO L93 Difference]: Finished difference Result 16 states and 16 transitions. [2022-11-16 19:37:53,804 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-16 19:37:53,804 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 2.142857142857143) internal successors, (30), 14 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 8 [2022-11-16 19:37:53,805 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 19:37:53,805 INFO L225 Difference]: With dead ends: 16 [2022-11-16 19:37:53,805 INFO L226 Difference]: Without dead ends: 14 [2022-11-16 19:37:53,806 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 30 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 37 ImplicationChecksByTransitivity, 8.3s TimeCoverageRelationStatistics Valid=72, Invalid=197, Unknown=3, NotChecked=0, Total=272 [2022-11-16 19:37:53,807 INFO L413 NwaCegarLoop]: 4 mSDtfsCounter, 9 mSDsluCounter, 14 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 9 SdHoareTripleChecker+Valid, 18 SdHoareTripleChecker+Invalid, 25 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 12 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-16 19:37:53,808 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [9 Valid, 18 Invalid, 25 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 11 Invalid, 0 Unknown, 12 Unchecked, 0.2s Time] [2022-11-16 19:37:53,809 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14 states. [2022-11-16 19:37:53,812 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14 to 12. [2022-11-16 19:37:53,812 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 11 states have (on average 1.0909090909090908) internal successors, (12), 11 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 19:37:53,813 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 12 transitions. [2022-11-16 19:37:53,813 INFO L78 Accepts]: Start accepts. Automaton has 12 states and 12 transitions. Word has length 8 [2022-11-16 19:37:53,814 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 19:37:53,814 INFO L495 AbstractCegarLoop]: Abstraction has 12 states and 12 transitions. [2022-11-16 19:37:53,814 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 2.142857142857143) internal successors, (30), 14 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-16 19:37:53,814 INFO L276 IsEmpty]: Start isEmpty. Operand 12 states and 12 transitions. [2022-11-16 19:37:53,815 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-11-16 19:37:53,815 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 19:37:53,815 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1] [2022-11-16 19:37:53,849 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (3)] Forceful destruction successful, exit code 0 [2022-11-16 19:37:54,057 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-11-16 19:37:54,255 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/cvc4 --incremental --print-success --lang smt (4)] Forceful destruction successful, exit code 0 [2022-11-16 19:37:54,447 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/cvc4 --incremental --print-success --lang smt [2022-11-16 19:37:54,448 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 19:37:54,448 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 19:37:54,449 INFO L85 PathProgramCache]: Analyzing trace with hash 1020920393, now seen corresponding path program 2 times [2022-11-16 19:37:54,450 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-16 19:37:54,450 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [360224050] [2022-11-16 19:37:54,450 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-16 19:37:54,451 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-16 19:37:54,451 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/mathsat [2022-11-16 19:37:54,452 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-16 19:37:54,458 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (6)] Waiting until timeout for monitored process [2022-11-16 19:37:55,560 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-16 19:37:55,560 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 19:37:55,623 INFO L263 TraceCheckSpWp]: Trace formula consists of 2287 conjuncts, 157 conjunts are in the unsatisfiable core [2022-11-16 19:37:55,640 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 19:37:57,234 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 19:37:57,235 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 19:40:27,826 WARN L855 $PredicateComparison]: unable to prove that (let ((.cse0 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_1~0#1|))) (or (forall ((|v_ULTIMATE.start_main_~var_363_arg_0~0#1_9| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_370_arg_0~0#1_10| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_395_arg_1~0#1_9| (_ BitVec 8)) (|ULTIMATE.start_main_~state_35~0#1| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_372_arg_0~0#1_9| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_390_arg_1~0#1_9| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_365_arg_1~0#1_9| (_ BitVec 8)) (|ULTIMATE.start_main_~state_33~0#1| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_369_arg_1~0#1_9| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_367_arg_1~0#1_9| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_377_arg_1~0#1_9| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_385_arg_1~0#1_10| (_ BitVec 8)) (|ULTIMATE.start_main_~input_333~0#1| (_ BitVec 8))) (let ((.cse2 ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse0 ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) |ULTIMATE.start_main_~state_35~0#1|)))))))) (.cse1 ((_ zero_extend 24) |ULTIMATE.start_main_~state_33~0#1|))) (or (not (= ((_ extract 7 0) (bvand .cse0 ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse1 .cse2))))) (_ bv0 8))) (= ((_ extract 7 0) (bvand .cse0 ((_ zero_extend 24) ((_ extract 7 0) (let ((.cse3 ((_ zero_extend 24) |ULTIMATE.start_main_~input_333~0#1|))) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_390_arg_1~0#1_9|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_385_arg_1~0#1_10|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_377_arg_1~0#1_9|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvor ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_369_arg_1~0#1_9|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_365_arg_1~0#1_9|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_363_arg_0~0#1_9|) (_ bv1 32))))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_367_arg_1~0#1_9|))))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_370_arg_0~0#1_10|)))) ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse0 ((_ zero_extend 24) ((_ extract 7 0) (bvnot .cse3))))))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_372_arg_0~0#1_9|))))))))))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_395_arg_1~0#1_9|)))) .cse2)))))) .cse0)))))) .cse0))) ((_ zero_extend 24) ((_ extract 7 0) (bvor .cse1 .cse3))))))))) (_ bv0 8))))) (let ((.cse155 ((_ zero_extend 24) |c_ULTIMATE.start_main_~var_64~0#1|)) (.cse153 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_2~0#1|)) (.cse154 ((_ zero_extend 24) |c_ULTIMATE.start_main_~var_72~0#1|))) (let ((.cse103 (forall ((|v_ULTIMATE.start_main_~var_241_arg_0~0#1_10| (_ BitVec 8))) (= ((_ extract 7 0) (bvand .cse0 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_241_arg_0~0#1_10|) (_ bv1 32)))))) (_ bv0 8)))) (.cse104 (forall ((|v_ULTIMATE.start_main_~var_255_arg_1~0#1_10| (_ BitVec 8))) (not (= .cse155 ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse153 ((_ zero_extend 24) ((_ extract 7 0) (bvxor ((_ zero_extend 24) ((_ extract 7 0) (bvxor ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_255_arg_1~0#1_10|))) .cse154))) .cse154))))))))))) (let ((.cse54 (forall ((|v_ULTIMATE.start_main_~var_254_arg_1~0#1_10| (_ BitVec 8))) (not (= .cse155 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvxor .cse154 ((_ zero_extend 24) ((_ extract 7 0) (bvxor .cse154 ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_254_arg_1~0#1_10|))))))))))) .cse153))))))) (.cse77 (forall ((|v_ULTIMATE.start_main_~var_241_arg_0~0#1_10| (_ BitVec 8))) (not (= ((_ extract 7 0) (bvand .cse0 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_241_arg_0~0#1_10|) (_ bv1 32)))))) (_ bv0 8))))) (.cse78 (or .cse103 .cse104)) (.cse47 (bvmul |c_ULTIMATE.start_main_~var_43~0#1| |c_ULTIMATE.start_main_~var_48~0#1|)) (.cse50 (bvneg |c_ULTIMATE.start_main_~var_48~0#1|)) (.cse52 ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_24~0#1|)) (.cse53 ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_26~0#1|))) (let ((.cse73 (forall ((|v_ULTIMATE.start_main_~var_252_arg_1~0#1_10| (_ BitVec 8))) (not (= .cse155 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvxor ((_ zero_extend 24) ((_ extract 7 0) (bvxor .cse154 ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_252_arg_1~0#1_10|)))))))))))) .cse154))) .cse153))))))) (.cse65 (forall ((|v_ULTIMATE.start_main_~var_253_arg_1~0#1_10| (_ BitVec 8))) (not (= ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvxor .cse154 ((_ zero_extend 24) ((_ extract 7 0) (bvxor .cse154 ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_253_arg_1~0#1_10|))))))))))))) .cse153))) .cse155)))) (.cse4 (forall ((|v_ULTIMATE.start_main_~var_247_arg_0~0#1_10| (_ BitVec 8))) (not (= ((_ extract 7 0) (bvand .cse0 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_247_arg_0~0#1_10|) (_ bv1 32)))))) (_ bv0 8))))) (.cse13 (forall ((|v_ULTIMATE.start_main_~var_247_arg_0~0#1_10| (_ BitVec 8))) (= ((_ extract 7 0) (bvand .cse0 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_247_arg_0~0#1_10|) (_ bv1 32)))))) (_ bv0 8)))) (.cse68 (forall ((|v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse188 (bvand (bvor (bvshl |v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ bv8 32)) .cse53) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse186 (bvmul |c_ULTIMATE.start_main_~var_43~0#1| .cse188)) (.cse187 (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvor (bvshl |v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ bv8 32)) .cse52)))) (let ((.cse185 (bvand (bvadd .cse186 .cse187) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= .cse185 |c_ULTIMATE.start_main_~var_70~0#1|) (not (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand (bvadd .cse47 .cse186 .cse187) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (not (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd .cse185 |c_ULTIMATE.start_main_~var_48~0#1|)))) (not (= (bvand (bvadd .cse185 .cse50) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_70~0#1|)) (not (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd (bvmul |c_ULTIMATE.start_main_~var_43~0#1| (bvadd .cse188 .cse50)) .cse187)))))))))) (.cse67 (forall ((|v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse182 (bvand (bvor (bvshl |v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ bv8 32)) .cse53) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse184 (bvmul |c_ULTIMATE.start_main_~var_43~0#1| .cse182)) (.cse183 (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvor (bvshl |v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ bv8 32)) .cse52)))) (let ((.cse181 (bvand (bvadd .cse184 .cse183) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (not (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd .cse181 |c_ULTIMATE.start_main_~var_48~0#1|)))) (not (= (bvand (bvadd .cse181 .cse50) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_70~0#1|)) (not (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd (bvmul |c_ULTIMATE.start_main_~var_43~0#1| (bvadd .cse182 .cse50)) .cse183)))) (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand (bvadd .cse47 .cse184 .cse183) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)))))))) (.cse74 (forall ((|v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse180 (bvand (bvadd (bvmul |c_ULTIMATE.start_main_~var_43~0#1| (bvand (bvor (bvshl |v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ bv8 32)) .cse53) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvor (bvshl |v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ bv8 32)) .cse52))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (not (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd .cse180 |c_ULTIMATE.start_main_~var_48~0#1|)))) (not (= .cse180 |c_ULTIMATE.start_main_~var_70~0#1|)) (not (= (bvand (bvadd .cse180 .cse50) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_70~0#1|)))))) (.cse21 (forall ((|v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse177 (bvand (bvor (bvshl |v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ bv8 32)) .cse53) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse179 (bvmul |c_ULTIMATE.start_main_~var_43~0#1| .cse177)) (.cse178 (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvor (bvshl |v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ bv8 32)) .cse52)))) (let ((.cse176 (bvand (bvadd .cse179 .cse178) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (not (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd .cse176 |c_ULTIMATE.start_main_~var_48~0#1|)))) (not (= .cse176 |c_ULTIMATE.start_main_~var_70~0#1|)) (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd (bvmul |c_ULTIMATE.start_main_~var_43~0#1| (bvadd .cse177 .cse50)) .cse178))) (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand (bvadd .cse47 .cse179 .cse178) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)))))))) (.cse22 (forall ((|v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse175 (bvand (bvor (bvshl |v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ bv8 32)) .cse53) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse172 (bvmul |c_ULTIMATE.start_main_~var_43~0#1| .cse175)) (.cse173 (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvor (bvshl |v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ bv8 32)) .cse52)))) (let ((.cse174 (bvand (bvadd .cse172 .cse173) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (not (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand (bvadd .cse47 .cse172 .cse173) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (not (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd .cse174 |c_ULTIMATE.start_main_~var_48~0#1|)))) (not (= .cse174 |c_ULTIMATE.start_main_~var_70~0#1|)) (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd (bvmul |c_ULTIMATE.start_main_~var_43~0#1| (bvadd .cse175 .cse50)) .cse173))))))))) (.cse15 (forall ((|v_ULTIMATE.start_main_~var_244_arg_0~0#1_10| (_ BitVec 8))) (= ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_244_arg_0~0#1_10|) (_ bv1 32)))) .cse0)) (_ bv0 8)))) (.cse24 (forall ((|v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse171 (bvand (bvor (bvshl |v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ bv8 32)) .cse53) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse168 (bvmul |c_ULTIMATE.start_main_~var_43~0#1| .cse171)) (.cse169 (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvor (bvshl |v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ bv8 32)) .cse52)))) (let ((.cse170 (bvand (bvadd .cse168 .cse169) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (not (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand (bvadd .cse47 .cse168 .cse169) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (not (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd .cse170 |c_ULTIMATE.start_main_~var_48~0#1|)))) (not (= .cse170 |c_ULTIMATE.start_main_~var_70~0#1|)) (= (bvand (bvadd .cse170 .cse50) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_70~0#1|) (not (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd (bvmul |c_ULTIMATE.start_main_~var_43~0#1| (bvadd .cse171 .cse50)) .cse169)))))))))) (.cse23 (forall ((|v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse165 (bvand (bvor (bvshl |v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ bv8 32)) .cse53) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse167 (bvmul |c_ULTIMATE.start_main_~var_43~0#1| .cse165)) (.cse166 (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvor (bvshl |v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ bv8 32)) .cse52)))) (let ((.cse164 (bvand (bvadd .cse167 .cse166) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (not (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd .cse164 |c_ULTIMATE.start_main_~var_48~0#1|)))) (not (= .cse164 |c_ULTIMATE.start_main_~var_70~0#1|)) (not (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd (bvmul |c_ULTIMATE.start_main_~var_43~0#1| (bvadd .cse165 .cse50)) .cse166)))) (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand (bvadd .cse47 .cse167 .cse166) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)))))))) (.cse55 (and (or .cse54 .cse77) .cse78))) (let ((.cse19 (or .cse15 (and (or .cse55 .cse24) (or .cse23 .cse55)))) (.cse20 (or .cse15 (and (or .cse55 .cse21) (or .cse55 .cse22)))) (.cse75 (or .cse15 .cse74 .cse55)) (.cse69 (forall ((|v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse163 (bvand (bvor (bvshl |v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ bv8 32)) .cse53) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse160 (bvmul |c_ULTIMATE.start_main_~var_43~0#1| .cse163)) (.cse161 (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvor (bvshl |v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ bv8 32)) .cse52)))) (let ((.cse162 (bvand (bvadd .cse160 .cse161) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (not (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand (bvadd .cse47 .cse160 .cse161) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (not (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd .cse162 |c_ULTIMATE.start_main_~var_48~0#1|)))) (not (= (bvand (bvadd .cse162 .cse50) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_70~0#1|)) (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd (bvmul |c_ULTIMATE.start_main_~var_43~0#1| (bvadd .cse163 .cse50)) .cse161))))))))) (.cse71 (forall ((|v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse157 (bvand (bvor (bvshl |v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ bv8 32)) .cse53) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse159 (bvmul |c_ULTIMATE.start_main_~var_43~0#1| .cse157)) (.cse158 (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvor (bvshl |v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ bv8 32)) .cse52)))) (let ((.cse156 (bvand (bvadd .cse159 .cse158) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (not (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd .cse156 |c_ULTIMATE.start_main_~var_48~0#1|)))) (not (= (bvand (bvadd .cse156 .cse50) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_70~0#1|)) (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd (bvmul |c_ULTIMATE.start_main_~var_43~0#1| (bvadd .cse157 .cse50)) .cse158))) (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand (bvadd .cse47 .cse159 .cse158) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)))))))) (.cse70 (or .cse15 (and (or .cse55 .cse68) (or .cse54 .cse67)))) (.cse8 (forall ((|v_ULTIMATE.start_main_~var_244_arg_0~0#1_10| (_ BitVec 8))) (not (= ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_244_arg_0~0#1_10|) (_ bv1 32)))) .cse0)) (_ bv0 8))))) (.cse33 (not (= ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse153 ((_ zero_extend 24) ((_ extract 7 0) (bvxor .cse154 ((_ zero_extend 24) ((_ extract 7 0) (bvxor .cse154 ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvxor ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_16~0#1|) .cse154))) .cse153)))))))))))))))))))) .cse155))) (.cse63 (forall ((|v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse150 (bvand (bvor (bvshl |v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ bv8 32)) .cse53) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse152 (bvmul |c_ULTIMATE.start_main_~var_43~0#1| .cse150)) (.cse151 (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvor (bvshl |v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ bv8 32)) .cse52)))) (let ((.cse149 (bvand (bvadd .cse152 .cse151) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= .cse149 |c_ULTIMATE.start_main_~var_70~0#1|) (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd .cse149 |c_ULTIMATE.start_main_~var_48~0#1|))) (not (= (bvand (bvadd .cse149 .cse50) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_70~0#1|)) (not (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd (bvmul |c_ULTIMATE.start_main_~var_43~0#1| (bvadd .cse150 .cse50)) .cse151)))) (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand (bvadd .cse47 .cse152 .cse151) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)))))))) (.cse64 (forall ((|v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse148 (bvand (bvor (bvshl |v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ bv8 32)) .cse53) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse146 (bvmul |c_ULTIMATE.start_main_~var_43~0#1| .cse148)) (.cse147 (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvor (bvshl |v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ bv8 32)) .cse52)))) (let ((.cse145 (bvand (bvadd .cse146 .cse147) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= .cse145 |c_ULTIMATE.start_main_~var_70~0#1|) (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd .cse145 |c_ULTIMATE.start_main_~var_48~0#1|))) (not (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand (bvadd .cse47 .cse146 .cse147) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (not (= (bvand (bvadd .cse145 .cse50) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_70~0#1|)) (not (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd (bvmul |c_ULTIMATE.start_main_~var_43~0#1| (bvadd .cse148 .cse50)) .cse147)))))))))) (.cse31 (forall ((|v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse144 (bvand (bvor (bvshl |v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ bv8 32)) .cse53) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse142 (bvmul |c_ULTIMATE.start_main_~var_43~0#1| .cse144)) (.cse143 (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvor (bvshl |v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ bv8 32)) .cse52)))) (let ((.cse141 (bvand (bvadd .cse142 .cse143) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= .cse141 |c_ULTIMATE.start_main_~var_70~0#1|) (not (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand (bvadd .cse47 .cse142 .cse143) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (not (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd .cse141 |c_ULTIMATE.start_main_~var_48~0#1|)))) (= (bvand (bvadd .cse141 .cse50) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_70~0#1|) (not (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd (bvmul |c_ULTIMATE.start_main_~var_43~0#1| (bvadd .cse144 .cse50)) .cse143)))))))))) (.cse32 (forall ((|v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse138 (bvand (bvor (bvshl |v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ bv8 32)) .cse53) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse140 (bvmul |c_ULTIMATE.start_main_~var_43~0#1| .cse138)) (.cse139 (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvor (bvshl |v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ bv8 32)) .cse52)))) (let ((.cse137 (bvand (bvadd .cse140 .cse139) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= .cse137 |c_ULTIMATE.start_main_~var_70~0#1|) (not (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd .cse137 |c_ULTIMATE.start_main_~var_48~0#1|)))) (= (bvand (bvadd .cse137 .cse50) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_70~0#1|) (not (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd (bvmul |c_ULTIMATE.start_main_~var_43~0#1| (bvadd .cse138 .cse50)) .cse139)))) (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand (bvadd .cse47 .cse140 .cse139) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)))))))) (.cse26 (and .cse4 .cse13)) (.cse14 (and (or .cse65 .cse77) .cse78)) (.cse72 (and (or .cse73 .cse77) .cse78)) (.cse43 (forall ((|v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse134 (bvand (bvor (bvshl |v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ bv8 32)) .cse53) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse136 (bvmul |c_ULTIMATE.start_main_~var_43~0#1| .cse134)) (.cse135 (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvor (bvshl |v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ bv8 32)) .cse52)))) (let ((.cse133 (bvand (bvadd .cse136 .cse135) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd .cse133 |c_ULTIMATE.start_main_~var_48~0#1|))) (not (= .cse133 |c_ULTIMATE.start_main_~var_70~0#1|)) (= (bvand (bvadd .cse133 .cse50) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_70~0#1|) (not (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd (bvmul |c_ULTIMATE.start_main_~var_43~0#1| (bvadd .cse134 .cse50)) .cse135)))) (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand (bvadd .cse47 .cse136 .cse135) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)))))))) (.cse42 (forall ((|v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse132 (bvand (bvor (bvshl |v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ bv8 32)) .cse53) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse130 (bvmul |c_ULTIMATE.start_main_~var_43~0#1| .cse132)) (.cse131 (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvor (bvshl |v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ bv8 32)) .cse52)))) (let ((.cse129 (bvand (bvadd .cse130 .cse131) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd .cse129 |c_ULTIMATE.start_main_~var_48~0#1|))) (not (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand (bvadd .cse47 .cse130 .cse131) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (not (= .cse129 |c_ULTIMATE.start_main_~var_70~0#1|)) (= (bvand (bvadd .cse129 .cse50) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_70~0#1|) (not (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd (bvmul |c_ULTIMATE.start_main_~var_43~0#1| (bvadd .cse132 .cse50)) .cse131)))))))))) (.cse39 (forall ((|v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse126 (bvand (bvor (bvshl |v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ bv8 32)) .cse53) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse128 (bvmul |c_ULTIMATE.start_main_~var_43~0#1| .cse126)) (.cse127 (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvor (bvshl |v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ bv8 32)) .cse52)))) (let ((.cse125 (bvand (bvadd .cse128 .cse127) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd .cse125 |c_ULTIMATE.start_main_~var_48~0#1|))) (not (= .cse125 |c_ULTIMATE.start_main_~var_70~0#1|)) (= (bvand (bvadd .cse125 .cse50) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_70~0#1|) (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd (bvmul |c_ULTIMATE.start_main_~var_43~0#1| (bvadd .cse126 .cse50)) .cse127))) (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand (bvadd .cse47 .cse128 .cse127) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)))))))) (.cse40 (forall ((|v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse124 (bvand (bvor (bvshl |v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ bv8 32)) .cse53) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse122 (bvmul |c_ULTIMATE.start_main_~var_43~0#1| .cse124)) (.cse123 (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvor (bvshl |v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ bv8 32)) .cse52)))) (let ((.cse121 (bvand (bvadd .cse122 .cse123) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd .cse121 |c_ULTIMATE.start_main_~var_48~0#1|))) (not (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand (bvadd .cse47 .cse122 .cse123) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (not (= .cse121 |c_ULTIMATE.start_main_~var_70~0#1|)) (= (bvand (bvadd .cse121 .cse50) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_70~0#1|) (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd (bvmul |c_ULTIMATE.start_main_~var_43~0#1| (bvadd .cse124 .cse50)) .cse123))))))))) (.cse7 (forall ((|v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse120 (bvand (bvor (bvshl |v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ bv8 32)) .cse53) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse118 (bvmul |c_ULTIMATE.start_main_~var_43~0#1| .cse120)) (.cse119 (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvor (bvshl |v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ bv8 32)) .cse52)))) (let ((.cse117 (bvand (bvadd .cse118 .cse119) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd .cse117 |c_ULTIMATE.start_main_~var_48~0#1|))) (not (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand (bvadd .cse47 .cse118 .cse119) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (not (= .cse117 |c_ULTIMATE.start_main_~var_70~0#1|)) (not (= (bvand (bvadd .cse117 .cse50) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_70~0#1|)) (not (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd (bvmul |c_ULTIMATE.start_main_~var_43~0#1| (bvadd .cse120 .cse50)) .cse119)))))))))) (.cse5 (forall ((|v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse114 (bvand (bvor (bvshl |v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ bv8 32)) .cse53) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse116 (bvmul |c_ULTIMATE.start_main_~var_43~0#1| .cse114)) (.cse115 (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvor (bvshl |v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ bv8 32)) .cse52)))) (let ((.cse113 (bvand (bvadd .cse116 .cse115) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (not (= .cse113 |c_ULTIMATE.start_main_~var_70~0#1|)) (not (= (bvand (bvadd .cse113 .cse50) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_70~0#1|)) (not (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd (bvmul |c_ULTIMATE.start_main_~var_43~0#1| (bvadd .cse114 .cse50)) .cse115)))) (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand (bvadd .cse47 .cse116 .cse115) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)))))))) (.cse9 (forall ((|v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse112 (bvand (bvor (bvshl |v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ bv8 32)) .cse53) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse109 (bvmul |c_ULTIMATE.start_main_~var_43~0#1| .cse112)) (.cse110 (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvor (bvshl |v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ bv8 32)) .cse52)))) (let ((.cse111 (bvand (bvadd .cse109 .cse110) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (not (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand (bvadd .cse47 .cse109 .cse110) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (not (= .cse111 |c_ULTIMATE.start_main_~var_70~0#1|)) (not (= (bvand (bvadd .cse111 .cse50) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_70~0#1|)) (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd (bvmul |c_ULTIMATE.start_main_~var_43~0#1| (bvadd .cse112 .cse50)) .cse110))))))))) (.cse10 (forall ((|v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse106 (bvand (bvor (bvshl |v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ bv8 32)) .cse53) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse108 (bvmul |c_ULTIMATE.start_main_~var_43~0#1| .cse106)) (.cse107 (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvor (bvshl |v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ bv8 32)) .cse52)))) (let ((.cse105 (bvand (bvadd .cse108 .cse107) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (not (= .cse105 |c_ULTIMATE.start_main_~var_70~0#1|)) (not (= (bvand (bvadd .cse105 .cse50) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_70~0#1|)) (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd (bvmul |c_ULTIMATE.start_main_~var_43~0#1| (bvadd .cse106 .cse50)) .cse107))) (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand (bvadd .cse47 .cse108 .cse107) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))))))))) (let ((.cse16 (and (or .cse9 .cse55) (or .cse55 .cse10))) (.cse17 (and (or .cse55 .cse7) (or .cse55 .cse5))) (.cse44 (and (or .cse55 .cse39) (or .cse55 .cse40))) (.cse45 (and (or .cse55 .cse43) (or .cse55 .cse42))) (.cse27 (and (or .cse13 .cse14) (or .cse4 .cse72))) (.cse28 (and (or .cse26 .cse103 .cse104) (or (and (or .cse65 .cse13) (or .cse73 .cse4)) .cse77))) (.cse37 (forall ((|v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse100 (bvand (bvor (bvshl |v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ bv8 32)) .cse53) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse102 (bvmul |c_ULTIMATE.start_main_~var_43~0#1| .cse100)) (.cse101 (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvor (bvshl |v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ bv8 32)) .cse52)))) (let ((.cse99 (bvand (bvadd .cse102 .cse101) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= .cse99 |c_ULTIMATE.start_main_~var_70~0#1|) (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd .cse99 |c_ULTIMATE.start_main_~var_48~0#1|))) (= (bvand (bvadd .cse99 .cse50) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_70~0#1|) (not (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd (bvmul |c_ULTIMATE.start_main_~var_43~0#1| (bvadd .cse100 .cse50)) .cse101)))) (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand (bvadd .cse47 .cse102 .cse101) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)))))))) (.cse36 (forall ((|v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse98 (bvand (bvor (bvshl |v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ bv8 32)) .cse53) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse96 (bvmul |c_ULTIMATE.start_main_~var_43~0#1| .cse98)) (.cse97 (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvor (bvshl |v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ bv8 32)) .cse52)))) (let ((.cse95 (bvand (bvadd .cse96 .cse97) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= .cse95 |c_ULTIMATE.start_main_~var_70~0#1|) (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd .cse95 |c_ULTIMATE.start_main_~var_48~0#1|))) (not (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand (bvadd .cse47 .cse96 .cse97) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (= (bvand (bvadd .cse95 .cse50) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_70~0#1|) (not (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd (bvmul |c_ULTIMATE.start_main_~var_43~0#1| (bvadd .cse98 .cse50)) .cse97)))))))))) (.cse30 (forall ((|v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse94 (bvand (bvor (bvshl |v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ bv8 32)) .cse53) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse92 (bvmul |c_ULTIMATE.start_main_~var_43~0#1| .cse94)) (.cse93 (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvor (bvshl |v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ bv8 32)) .cse52)))) (let ((.cse91 (bvand (bvadd .cse92 .cse93) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= .cse91 |c_ULTIMATE.start_main_~var_70~0#1|) (not (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand (bvadd .cse47 .cse92 .cse93) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (not (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd .cse91 |c_ULTIMATE.start_main_~var_48~0#1|)))) (= (bvand (bvadd .cse91 .cse50) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_70~0#1|) (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd (bvmul |c_ULTIMATE.start_main_~var_43~0#1| (bvadd .cse94 .cse50)) .cse93))))))))) (.cse34 (forall ((|v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse88 (bvand (bvor (bvshl |v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ bv8 32)) .cse53) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse90 (bvmul |c_ULTIMATE.start_main_~var_43~0#1| .cse88)) (.cse89 (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvor (bvshl |v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ bv8 32)) .cse52)))) (let ((.cse87 (bvand (bvadd .cse90 .cse89) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= .cse87 |c_ULTIMATE.start_main_~var_70~0#1|) (not (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd .cse87 |c_ULTIMATE.start_main_~var_48~0#1|)))) (= (bvand (bvadd .cse87 .cse50) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_70~0#1|) (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd (bvmul |c_ULTIMATE.start_main_~var_43~0#1| (bvadd .cse88 .cse50)) .cse89))) (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand (bvadd .cse47 .cse90 .cse89) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)))))))) (.cse35 (or .cse15 (and (or .cse31 .cse55) (or .cse54 .cse32)))) (.cse61 (forall ((|v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse86 (bvand (bvor (bvshl |v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ bv8 32)) .cse53) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse84 (bvmul |c_ULTIMATE.start_main_~var_43~0#1| .cse86)) (.cse85 (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvor (bvshl |v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ bv8 32)) .cse52)))) (let ((.cse83 (bvand (bvadd .cse84 .cse85) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= .cse83 |c_ULTIMATE.start_main_~var_70~0#1|) (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd .cse83 |c_ULTIMATE.start_main_~var_48~0#1|))) (not (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand (bvadd .cse47 .cse84 .cse85) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (not (= (bvand (bvadd .cse83 .cse50) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_70~0#1|)) (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd (bvmul |c_ULTIMATE.start_main_~var_43~0#1| (bvadd .cse86 .cse50)) .cse85))))))))) (.cse60 (forall ((|v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse80 (bvand (bvor (bvshl |v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ bv8 32)) .cse53) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse82 (bvmul |c_ULTIMATE.start_main_~var_43~0#1| .cse80)) (.cse81 (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvor (bvshl |v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ bv8 32)) .cse52)))) (let ((.cse79 (bvand (bvadd .cse82 .cse81) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= .cse79 |c_ULTIMATE.start_main_~var_70~0#1|) (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd .cse79 |c_ULTIMATE.start_main_~var_48~0#1|))) (not (= (bvand (bvadd .cse79 .cse50) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_70~0#1|)) (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd (bvmul |c_ULTIMATE.start_main_~var_43~0#1| (bvadd .cse80 .cse50)) .cse81))) (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand (bvadd .cse47 .cse82 .cse81) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)))))))) (.cse62 (or .cse15 (and (or .cse54 .cse63) (or .cse55 .cse64)))) (.cse6 (and (or .cse77 .cse33) .cse78)) (.cse18 (forall ((|v_ULTIMATE.start_main_~var_250_arg_0~0#1_10| (_ BitVec 8))) (not (= ((_ extract 7 0) (bvand .cse0 ((_ zero_extend 24) ((_ extract 7 0) (bvand (_ bv1 32) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_250_arg_0~0#1_10|)))))) (_ bv0 8))))) (.cse66 (or (and (or .cse69 .cse14) (or .cse65 .cse71) .cse70 (or (and (or .cse14 .cse68) (or .cse65 .cse67)) .cse8)) .cse13)) (.cse76 (or (and (or .cse74 .cse14 .cse8) .cse75) .cse13)) (.cse25 (or (and .cse19 .cse20 (or (and (or .cse22 .cse14) (or .cse14 .cse21)) .cse8) (or (and (or .cse23 .cse14) (or .cse24 .cse14)) .cse8)) .cse13)) (.cse29 (forall ((|v_ULTIMATE.start_main_~var_250_arg_0~0#1_10| (_ BitVec 8))) (= ((_ extract 7 0) (bvand .cse0 ((_ zero_extend 24) ((_ extract 7 0) (bvand (_ bv1 32) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_250_arg_0~0#1_10|)))))) (_ bv0 8))))) (and (or (let ((.cse11 (or .cse15 .cse17)) (.cse12 (or .cse15 .cse16))) (and (or .cse4 (and (or (and (or .cse5 .cse6) (or .cse7 .cse6)) .cse8) (or (and (or .cse9 .cse6) (or .cse6 .cse10)) .cse8) .cse11 .cse12)) (or .cse13 (and .cse11 .cse12 (or (and (or .cse7 .cse14) (or .cse5 .cse14)) .cse8) (or (and (or .cse14 .cse10) (or .cse9 .cse14)) .cse8))))) .cse18) (or .cse18 (and (or .cse4 (and .cse19 .cse20 (or (and (or .cse6 .cse21) (or .cse22 .cse6)) .cse8) (or (and (or .cse23 .cse6) (or .cse6 .cse24)) .cse8))) .cse25)) (or (and (or .cse26 .cse15 .cse16) (or .cse26 .cse15 .cse17) (or (and (or .cse5 .cse27) (or .cse28 .cse7)) .cse8) (or (and (or .cse10 .cse27) (or .cse28 .cse9)) .cse8)) .cse29) (or .cse4 (and (or .cse30 .cse6) (or (and (or .cse31 .cse6) (or .cse32 .cse33)) .cse8) (or .cse34 .cse33) .cse35)) (or (and (or .cse36 .cse6) (or .cse37 .cse33)) .cse8) (or (let ((.cse38 (or .cse15 .cse45)) (.cse41 (or .cse15 .cse44))) (and (or .cse4 (and .cse38 (or (and (or .cse6 .cse39) (or .cse6 .cse40)) .cse8) .cse41 (or .cse8 (and (or .cse42 .cse6) (or .cse6 .cse43))))) (or .cse13 (and .cse38 (or (and (or .cse14 .cse40) (or .cse39 .cse14)) .cse8) .cse41 (or (and (or .cse42 .cse14) (or .cse14 .cse43)) .cse8))))) .cse18) (or (and (or .cse26 .cse15 .cse44) (or (and (or .cse43 .cse27) (or .cse28 .cse42)) .cse8) (or .cse26 .cse15 .cse45) (or (and (or .cse39 .cse27) (or .cse28 .cse40)) .cse8)) .cse29) (or .cse6 (forall ((|v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse51 (bvand (bvor (bvshl |v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ bv8 32)) .cse53) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse48 (bvmul |c_ULTIMATE.start_main_~var_43~0#1| .cse51)) (.cse49 (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvor (bvshl |v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ bv8 32)) .cse52)))) (let ((.cse46 (bvand (bvadd .cse48 .cse49) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= .cse46 |c_ULTIMATE.start_main_~var_70~0#1|) (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd .cse46 |c_ULTIMATE.start_main_~var_48~0#1|))) (not (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand (bvadd .cse47 .cse48 .cse49) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (= (bvand (bvadd .cse46 .cse50) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_70~0#1|) (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd (bvmul |c_ULTIMATE.start_main_~var_43~0#1| (bvadd .cse51 .cse50)) .cse49))))))))) (or .cse15 (and (or .cse54 .cse37) (or .cse36 .cse55))) (or (forall ((|v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse57 (bvand (bvor (bvshl |v_ULTIMATE.start_main_~var_44_arg_0~0#1_10| (_ bv8 32)) .cse53) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse59 (bvmul |c_ULTIMATE.start_main_~var_43~0#1| .cse57)) (.cse58 (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvor (bvshl |v_ULTIMATE.start_main_~var_42_arg_0~0#1_10| (_ bv8 32)) .cse52)))) (let ((.cse56 (bvand (bvadd .cse59 .cse58) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= .cse56 |c_ULTIMATE.start_main_~var_70~0#1|) (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd .cse56 |c_ULTIMATE.start_main_~var_48~0#1|))) (= (bvand (bvadd .cse56 .cse50) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_70~0#1|) (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd (bvmul |c_ULTIMATE.start_main_~var_43~0#1| (bvadd .cse57 .cse50)) .cse58))) (= |c_ULTIMATE.start_main_~var_70~0#1| (bvand (bvadd .cse47 .cse59 .cse58) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))))))) .cse33) (or (and (or .cse60 .cse33) (or .cse6 .cse61) .cse62 (or (and (or .cse63 .cse33) (or .cse6 .cse64)) .cse8)) .cse18) (or .cse13 (and (or (and (or .cse65 .cse32) (or .cse31 .cse14)) .cse8) (or .cse30 .cse14) (or .cse65 .cse34) .cse35)) (or (and .cse66 (or (and (or (and (or .cse67 .cse33) (or .cse6 .cse68)) .cse8) (or .cse69 .cse6) .cse70 (or .cse71 .cse33)) .cse4)) .cse18) (or (and (or .cse72 .cse61) (or .cse73 .cse60) .cse62 (or (and (or .cse72 .cse64) (or .cse73 .cse63)) .cse8)) .cse29) (or (and (or .cse4 (and (or .cse74 .cse6 .cse8) .cse75)) .cse76) .cse18) (or (and .cse66 (or .cse4 (and (or (and (or .cse72 .cse68) (or .cse73 .cse67)) .cse8) .cse70 (or .cse72 .cse69) (or .cse73 .cse71)))) .cse29) (or (and (or .cse4 (and (or .cse74 .cse72 .cse8) .cse75)) .cse76) .cse29) (or (and (or .cse4 (and .cse19 .cse20 (or (and (or .cse72 .cse21) (or .cse72 .cse22)) .cse8) (or (and (or .cse72 .cse24) (or .cse23 .cse72)) .cse8))) .cse25) .cse29)))))))))) is different from true [2022-11-16 19:43:07,024 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 5 not checked. [2022-11-16 19:43:07,024 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-16 19:43:07,024 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [360224050] [2022-11-16 19:43:07,025 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [360224050] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 19:43:07,025 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1990089977] [2022-11-16 19:43:07,025 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-16 19:43:07,025 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-16 19:43:07,026 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/cvc4 [2022-11-16 19:43:07,033 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-16 19:43:07,051 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6269636e-6f12-484e-9df5-a76cbbbdcb3c/bin/utaipan-Xvt2sAort0/cvc4 --incremental --print-success --lang smt (7)] Waiting until timeout for monitored process [2022-11-16 19:43:09,327 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-16 19:43:09,327 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 19:43:09,434 INFO L263 TraceCheckSpWp]: Trace formula consists of 2287 conjuncts, 192 conjunts are in the unsatisfiable core [2022-11-16 19:43:09,450 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 19:43:30,834 WARN L233 SmtUtils]: Spent 18.84s on a formula simplification that was a NOOP. DAG size: 141 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 19:43:42,516 WARN L233 SmtUtils]: Spent 8.46s on a formula simplification that was a NOOP. DAG size: 246 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 19:43:42,669 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 19:43:42,669 INFO L328 TraceCheckSpWp]: Computing backward predicates...