./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/combinations/pc_sfifo_3.cil+token_ring.03.cil-1.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version e04fb08f Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/config/TaipanReach.xml -i ../../sv-benchmarks/c/combinations/pc_sfifo_3.cil+token_ring.03.cil-1.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0 --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash bad4bd14ff0d6303c86b61698001b4d4d1f47b3200dad5c7d05f11b8899f8627 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-e04fb08 [2022-11-16 20:27:11,621 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-16 20:27:11,624 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-16 20:27:11,661 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-16 20:27:11,667 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-16 20:27:11,668 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-16 20:27:11,670 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-16 20:27:11,675 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-16 20:27:11,679 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-16 20:27:11,680 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-16 20:27:11,681 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-16 20:27:11,683 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-16 20:27:11,685 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-16 20:27:11,688 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-16 20:27:11,689 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-16 20:27:11,690 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-16 20:27:11,692 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-16 20:27:11,697 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-16 20:27:11,699 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-16 20:27:11,700 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-16 20:27:11,702 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-16 20:27:11,705 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-16 20:27:11,706 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-16 20:27:11,708 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-16 20:27:11,713 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-16 20:27:11,717 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-16 20:27:11,717 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-16 20:27:11,718 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-16 20:27:11,720 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-16 20:27:11,721 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-16 20:27:11,721 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-16 20:27:11,722 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-16 20:27:11,723 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-16 20:27:11,725 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-16 20:27:11,727 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-16 20:27:11,727 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-16 20:27:11,728 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-16 20:27:11,728 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-16 20:27:11,728 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-16 20:27:11,729 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-16 20:27:11,730 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-16 20:27:11,731 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/config/svcomp-Reach-32bit-Taipan_Default.epf [2022-11-16 20:27:11,772 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-16 20:27:11,772 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-16 20:27:11,773 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-16 20:27:11,773 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-16 20:27:11,774 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-16 20:27:11,774 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-16 20:27:11,774 INFO L138 SettingsManager]: * User list type=DISABLED [2022-11-16 20:27:11,775 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-11-16 20:27:11,775 INFO L138 SettingsManager]: * Explicit value domain=true [2022-11-16 20:27:11,775 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2022-11-16 20:27:11,776 INFO L138 SettingsManager]: * Octagon Domain=false [2022-11-16 20:27:11,776 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-11-16 20:27:11,776 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2022-11-16 20:27:11,777 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2022-11-16 20:27:11,777 INFO L138 SettingsManager]: * Interval Domain=false [2022-11-16 20:27:11,777 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2022-11-16 20:27:11,777 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2022-11-16 20:27:11,778 INFO L138 SettingsManager]: * Simplification Technique=POLY_PAC [2022-11-16 20:27:11,778 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-16 20:27:11,779 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-16 20:27:11,779 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-16 20:27:11,779 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-16 20:27:11,779 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-16 20:27:11,781 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-16 20:27:11,781 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-16 20:27:11,781 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-16 20:27:11,781 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-16 20:27:11,781 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-16 20:27:11,782 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-16 20:27:11,782 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-16 20:27:11,782 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-16 20:27:11,782 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-16 20:27:11,783 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-16 20:27:11,783 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-16 20:27:11,783 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2022-11-16 20:27:11,783 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-16 20:27:11,784 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-16 20:27:11,784 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2022-11-16 20:27:11,784 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-11-16 20:27:11,784 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-16 20:27:11,784 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-11-16 20:27:11,785 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> bad4bd14ff0d6303c86b61698001b4d4d1f47b3200dad5c7d05f11b8899f8627 [2022-11-16 20:27:12,050 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-16 20:27:12,085 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-16 20:27:12,088 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-16 20:27:12,089 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-16 20:27:12,090 INFO L275 PluginConnector]: CDTParser initialized [2022-11-16 20:27:12,091 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/../../sv-benchmarks/c/combinations/pc_sfifo_3.cil+token_ring.03.cil-1.c [2022-11-16 20:27:12,155 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/data/cdd437737/f2f888559ff7425faed8fe5b8a93e106/FLAG77a7a415a [2022-11-16 20:27:12,598 INFO L306 CDTParser]: Found 1 translation units. [2022-11-16 20:27:12,598 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/sv-benchmarks/c/combinations/pc_sfifo_3.cil+token_ring.03.cil-1.c [2022-11-16 20:27:12,613 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/data/cdd437737/f2f888559ff7425faed8fe5b8a93e106/FLAG77a7a415a [2022-11-16 20:27:13,121 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/data/cdd437737/f2f888559ff7425faed8fe5b8a93e106 [2022-11-16 20:27:13,126 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-16 20:27:13,128 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-16 20:27:13,132 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-16 20:27:13,132 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-16 20:27:13,136 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-16 20:27:13,136 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 08:27:13" (1/1) ... [2022-11-16 20:27:13,138 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6f568492 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 08:27:13, skipping insertion in model container [2022-11-16 20:27:13,138 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 08:27:13" (1/1) ... [2022-11-16 20:27:13,146 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-16 20:27:13,197 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-16 20:27:13,359 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/sv-benchmarks/c/combinations/pc_sfifo_3.cil+token_ring.03.cil-1.c[911,924] [2022-11-16 20:27:13,411 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/sv-benchmarks/c/combinations/pc_sfifo_3.cil+token_ring.03.cil-1.c[8416,8429] [2022-11-16 20:27:13,487 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 20:27:13,508 INFO L203 MainTranslator]: Completed pre-run [2022-11-16 20:27:13,523 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/sv-benchmarks/c/combinations/pc_sfifo_3.cil+token_ring.03.cil-1.c[911,924] [2022-11-16 20:27:13,555 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/sv-benchmarks/c/combinations/pc_sfifo_3.cil+token_ring.03.cil-1.c[8416,8429] [2022-11-16 20:27:13,591 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 20:27:13,609 INFO L208 MainTranslator]: Completed translation [2022-11-16 20:27:13,610 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 08:27:13 WrapperNode [2022-11-16 20:27:13,610 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-16 20:27:13,611 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-16 20:27:13,611 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-16 20:27:13,611 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-16 20:27:13,619 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 08:27:13" (1/1) ... [2022-11-16 20:27:13,631 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 08:27:13" (1/1) ... [2022-11-16 20:27:13,668 INFO L138 Inliner]: procedures = 61, calls = 71, calls flagged for inlining = 29, calls inlined = 29, statements flattened = 561 [2022-11-16 20:27:13,669 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-16 20:27:13,669 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-16 20:27:13,669 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-16 20:27:13,670 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-16 20:27:13,697 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 08:27:13" (1/1) ... [2022-11-16 20:27:13,697 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 08:27:13" (1/1) ... [2022-11-16 20:27:13,700 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 08:27:13" (1/1) ... [2022-11-16 20:27:13,701 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 08:27:13" (1/1) ... [2022-11-16 20:27:13,710 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 08:27:13" (1/1) ... [2022-11-16 20:27:13,736 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 08:27:13" (1/1) ... [2022-11-16 20:27:13,739 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 08:27:13" (1/1) ... [2022-11-16 20:27:13,741 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 08:27:13" (1/1) ... [2022-11-16 20:27:13,744 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-16 20:27:13,745 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-16 20:27:13,745 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-16 20:27:13,746 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-16 20:27:13,746 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 08:27:13" (1/1) ... [2022-11-16 20:27:13,759 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-16 20:27:13,772 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 [2022-11-16 20:27:13,790 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-16 20:27:13,819 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-16 20:27:13,846 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-16 20:27:13,847 INFO L130 BoogieDeclarations]: Found specification of procedure immediate_notify [2022-11-16 20:27:13,847 INFO L138 BoogieDeclarations]: Found implementation of procedure immediate_notify [2022-11-16 20:27:13,847 INFO L130 BoogieDeclarations]: Found specification of procedure is_do_write_p_triggered [2022-11-16 20:27:13,847 INFO L138 BoogieDeclarations]: Found implementation of procedure is_do_write_p_triggered [2022-11-16 20:27:13,847 INFO L130 BoogieDeclarations]: Found specification of procedure exists_runnable_thread1 [2022-11-16 20:27:13,847 INFO L138 BoogieDeclarations]: Found implementation of procedure exists_runnable_thread1 [2022-11-16 20:27:13,847 INFO L130 BoogieDeclarations]: Found specification of procedure exists_runnable_thread2 [2022-11-16 20:27:13,848 INFO L138 BoogieDeclarations]: Found implementation of procedure exists_runnable_thread2 [2022-11-16 20:27:13,848 INFO L130 BoogieDeclarations]: Found specification of procedure reset_delta_events1 [2022-11-16 20:27:13,848 INFO L138 BoogieDeclarations]: Found implementation of procedure reset_delta_events1 [2022-11-16 20:27:13,848 INFO L130 BoogieDeclarations]: Found specification of procedure reset_delta_events2 [2022-11-16 20:27:13,848 INFO L138 BoogieDeclarations]: Found implementation of procedure reset_delta_events2 [2022-11-16 20:27:13,848 INFO L130 BoogieDeclarations]: Found specification of procedure activate_threads2 [2022-11-16 20:27:13,848 INFO L138 BoogieDeclarations]: Found implementation of procedure activate_threads2 [2022-11-16 20:27:13,848 INFO L130 BoogieDeclarations]: Found specification of procedure activate_threads1 [2022-11-16 20:27:13,849 INFO L138 BoogieDeclarations]: Found implementation of procedure activate_threads1 [2022-11-16 20:27:13,849 INFO L130 BoogieDeclarations]: Found specification of procedure is_do_read_c_triggered [2022-11-16 20:27:13,849 INFO L138 BoogieDeclarations]: Found implementation of procedure is_do_read_c_triggered [2022-11-16 20:27:13,849 INFO L130 BoogieDeclarations]: Found specification of procedure update_channels1 [2022-11-16 20:27:13,849 INFO L138 BoogieDeclarations]: Found implementation of procedure update_channels1 [2022-11-16 20:27:13,849 INFO L130 BoogieDeclarations]: Found specification of procedure update_channels2 [2022-11-16 20:27:13,849 INFO L138 BoogieDeclarations]: Found implementation of procedure update_channels2 [2022-11-16 20:27:13,850 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-16 20:27:13,850 INFO L130 BoogieDeclarations]: Found specification of procedure fire_delta_events2 [2022-11-16 20:27:13,850 INFO L138 BoogieDeclarations]: Found implementation of procedure fire_delta_events2 [2022-11-16 20:27:13,850 INFO L130 BoogieDeclarations]: Found specification of procedure fire_delta_events1 [2022-11-16 20:27:13,851 INFO L138 BoogieDeclarations]: Found implementation of procedure fire_delta_events1 [2022-11-16 20:27:13,851 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-16 20:27:13,851 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-16 20:27:13,851 INFO L130 BoogieDeclarations]: Found specification of procedure error1 [2022-11-16 20:27:13,851 INFO L138 BoogieDeclarations]: Found implementation of procedure error1 [2022-11-16 20:27:13,853 INFO L130 BoogieDeclarations]: Found specification of procedure error2 [2022-11-16 20:27:13,853 INFO L138 BoogieDeclarations]: Found implementation of procedure error2 [2022-11-16 20:27:13,958 INFO L235 CfgBuilder]: Building ICFG [2022-11-16 20:27:13,960 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-16 20:27:14,662 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##56: assume !(1 == ~q_free~0); [2022-11-16 20:27:14,663 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##55: assume 1 == ~q_free~0;~c_dr_st~0 := 2;~c_dr_pc~0 := 2;~a_t~0 := do_read_c_~a~0#1; [2022-11-16 20:27:14,722 INFO L276 CfgBuilder]: Performing block encoding [2022-11-16 20:27:14,927 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-16 20:27:14,927 INFO L300 CfgBuilder]: Removed 10 assume(true) statements. [2022-11-16 20:27:14,930 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 08:27:14 BoogieIcfgContainer [2022-11-16 20:27:14,930 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-16 20:27:14,932 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-16 20:27:14,933 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-16 20:27:14,936 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-16 20:27:14,937 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 16.11 08:27:13" (1/3) ... [2022-11-16 20:27:14,937 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1c18e769 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.11 08:27:14, skipping insertion in model container [2022-11-16 20:27:14,937 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 08:27:13" (2/3) ... [2022-11-16 20:27:14,938 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1c18e769 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.11 08:27:14, skipping insertion in model container [2022-11-16 20:27:14,938 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 08:27:14" (3/3) ... [2022-11-16 20:27:14,939 INFO L112 eAbstractionObserver]: Analyzing ICFG pc_sfifo_3.cil+token_ring.03.cil-1.c [2022-11-16 20:27:14,957 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-16 20:27:14,958 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 2 error locations. [2022-11-16 20:27:15,012 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-16 20:27:15,019 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@463fdad, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-16 20:27:15,019 INFO L358 AbstractCegarLoop]: Starting to check reachability of 2 error locations. [2022-11-16 20:27:15,024 INFO L276 IsEmpty]: Start isEmpty. Operand has 174 states, 121 states have (on average 1.512396694214876) internal successors, (183), 129 states have internal predecessors, (183), 35 states have call successors, (35), 15 states have call predecessors, (35), 15 states have return successors, (35), 33 states have call predecessors, (35), 35 states have call successors, (35) [2022-11-16 20:27:15,038 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2022-11-16 20:27:15,038 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 20:27:15,039 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 20:27:15,040 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 20:27:15,047 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 20:27:15,048 INFO L85 PathProgramCache]: Analyzing trace with hash -268619431, now seen corresponding path program 1 times [2022-11-16 20:27:15,057 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-16 20:27:15,058 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1494410923] [2022-11-16 20:27:15,058 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:27:15,058 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 20:27:15,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:27:15,496 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 20:27:15,496 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-16 20:27:15,497 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1494410923] [2022-11-16 20:27:15,497 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1494410923] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 20:27:15,498 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 20:27:15,498 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-16 20:27:15,499 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [270560700] [2022-11-16 20:27:15,500 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 20:27:15,504 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-16 20:27:15,504 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-16 20:27:15,531 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-16 20:27:15,532 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-16 20:27:15,534 INFO L87 Difference]: Start difference. First operand has 174 states, 121 states have (on average 1.512396694214876) internal successors, (183), 129 states have internal predecessors, (183), 35 states have call successors, (35), 15 states have call predecessors, (35), 15 states have return successors, (35), 33 states have call predecessors, (35), 35 states have call successors, (35) Second operand has 5 states, 5 states have (on average 6.0) internal successors, (30), 5 states have internal predecessors, (30), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2022-11-16 20:27:16,329 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 20:27:16,329 INFO L93 Difference]: Finished difference Result 653 states and 992 transitions. [2022-11-16 20:27:16,330 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-16 20:27:16,332 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 6.0) internal successors, (30), 5 states have internal predecessors, (30), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 41 [2022-11-16 20:27:16,332 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 20:27:16,346 INFO L225 Difference]: With dead ends: 653 [2022-11-16 20:27:16,346 INFO L226 Difference]: Without dead ends: 474 [2022-11-16 20:27:16,351 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2022-11-16 20:27:16,354 INFO L413 NwaCegarLoop]: 325 mSDtfsCounter, 659 mSDsluCounter, 384 mSDsCounter, 0 mSdLazyCounter, 412 mSolverCounterSat, 220 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 667 SdHoareTripleChecker+Valid, 709 SdHoareTripleChecker+Invalid, 632 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 220 IncrementalHoareTripleChecker+Valid, 412 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-11-16 20:27:16,355 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [667 Valid, 709 Invalid, 632 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [220 Valid, 412 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-11-16 20:27:16,373 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 474 states. [2022-11-16 20:27:16,453 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 474 to 461. [2022-11-16 20:27:16,456 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 461 states, 338 states have (on average 1.4289940828402368) internal successors, (483), 346 states have internal predecessors, (483), 84 states have call successors, (84), 39 states have call predecessors, (84), 37 states have return successors, (106), 77 states have call predecessors, (106), 80 states have call successors, (106) [2022-11-16 20:27:16,460 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 461 states to 461 states and 673 transitions. [2022-11-16 20:27:16,462 INFO L78 Accepts]: Start accepts. Automaton has 461 states and 673 transitions. Word has length 41 [2022-11-16 20:27:16,463 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 20:27:16,463 INFO L495 AbstractCegarLoop]: Abstraction has 461 states and 673 transitions. [2022-11-16 20:27:16,463 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 6.0) internal successors, (30), 5 states have internal predecessors, (30), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2022-11-16 20:27:16,464 INFO L276 IsEmpty]: Start isEmpty. Operand 461 states and 673 transitions. [2022-11-16 20:27:16,466 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2022-11-16 20:27:16,466 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 20:27:16,467 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 20:27:16,467 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-11-16 20:27:16,468 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting error1Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 20:27:16,480 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 20:27:16,480 INFO L85 PathProgramCache]: Analyzing trace with hash -844282810, now seen corresponding path program 1 times [2022-11-16 20:27:16,480 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-16 20:27:16,481 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1748846815] [2022-11-16 20:27:16,481 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:27:16,481 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 20:27:16,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:27:16,565 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 20:27:16,565 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-16 20:27:16,565 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1748846815] [2022-11-16 20:27:16,566 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1748846815] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 20:27:16,566 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 20:27:16,566 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-16 20:27:16,566 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [724796381] [2022-11-16 20:27:16,567 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 20:27:16,568 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-16 20:27:16,568 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-16 20:27:16,569 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-16 20:27:16,569 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-16 20:27:16,569 INFO L87 Difference]: Start difference. First operand 461 states and 673 transitions. Second operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 4 states have internal predecessors, (29), 4 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 3 states have call predecessors, (7), 4 states have call successors, (7) [2022-11-16 20:27:16,892 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 20:27:16,893 INFO L93 Difference]: Finished difference Result 661 states and 950 transitions. [2022-11-16 20:27:16,893 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-16 20:27:16,893 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 4 states have internal predecessors, (29), 4 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 3 states have call predecessors, (7), 4 states have call successors, (7) Word has length 44 [2022-11-16 20:27:16,894 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 20:27:16,898 INFO L225 Difference]: With dead ends: 661 [2022-11-16 20:27:16,898 INFO L226 Difference]: Without dead ends: 590 [2022-11-16 20:27:16,900 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-16 20:27:16,901 INFO L413 NwaCegarLoop]: 265 mSDtfsCounter, 295 mSDsluCounter, 194 mSDsCounter, 0 mSdLazyCounter, 228 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 295 SdHoareTripleChecker+Valid, 459 SdHoareTripleChecker+Invalid, 241 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 228 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-16 20:27:16,902 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [295 Valid, 459 Invalid, 241 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 228 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-11-16 20:27:16,903 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 590 states. [2022-11-16 20:27:16,980 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 590 to 579. [2022-11-16 20:27:16,981 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 579 states, 422 states have (on average 1.4099526066350712) internal successors, (595), 430 states have internal predecessors, (595), 104 states have call successors, (104), 53 states have call predecessors, (104), 51 states have return successors, (129), 97 states have call predecessors, (129), 100 states have call successors, (129) [2022-11-16 20:27:16,986 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 579 states to 579 states and 828 transitions. [2022-11-16 20:27:16,986 INFO L78 Accepts]: Start accepts. Automaton has 579 states and 828 transitions. Word has length 44 [2022-11-16 20:27:16,987 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 20:27:16,987 INFO L495 AbstractCegarLoop]: Abstraction has 579 states and 828 transitions. [2022-11-16 20:27:16,987 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 4 states have internal predecessors, (29), 4 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 3 states have call predecessors, (7), 4 states have call successors, (7) [2022-11-16 20:27:16,987 INFO L276 IsEmpty]: Start isEmpty. Operand 579 states and 828 transitions. [2022-11-16 20:27:16,989 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2022-11-16 20:27:16,989 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 20:27:16,990 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 20:27:16,990 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-11-16 20:27:16,990 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting error1Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 20:27:16,991 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 20:27:16,991 INFO L85 PathProgramCache]: Analyzing trace with hash 242054075, now seen corresponding path program 1 times [2022-11-16 20:27:16,991 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-16 20:27:16,991 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1889291092] [2022-11-16 20:27:16,991 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:27:16,992 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 20:27:17,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:27:17,100 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 20:27:17,100 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-16 20:27:17,100 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1889291092] [2022-11-16 20:27:17,102 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1889291092] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 20:27:17,102 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 20:27:17,102 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-11-16 20:27:17,102 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [514360812] [2022-11-16 20:27:17,103 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 20:27:17,103 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-16 20:27:17,104 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-16 20:27:17,105 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-16 20:27:17,105 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-11-16 20:27:17,105 INFO L87 Difference]: Start difference. First operand 579 states and 828 transitions. Second operand has 6 states, 6 states have (on average 5.0) internal successors, (30), 6 states have internal predecessors, (30), 4 states have call successors, (8), 2 states have call predecessors, (8), 4 states have return successors, (7), 4 states have call predecessors, (7), 4 states have call successors, (7) [2022-11-16 20:27:17,917 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 20:27:17,917 INFO L93 Difference]: Finished difference Result 1116 states and 1551 transitions. [2022-11-16 20:27:17,918 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-16 20:27:17,918 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 5.0) internal successors, (30), 6 states have internal predecessors, (30), 4 states have call successors, (8), 2 states have call predecessors, (8), 4 states have return successors, (7), 4 states have call predecessors, (7), 4 states have call successors, (7) Word has length 45 [2022-11-16 20:27:17,918 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 20:27:17,925 INFO L225 Difference]: With dead ends: 1116 [2022-11-16 20:27:17,926 INFO L226 Difference]: Without dead ends: 650 [2022-11-16 20:27:17,933 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2022-11-16 20:27:17,937 INFO L413 NwaCegarLoop]: 341 mSDtfsCounter, 698 mSDsluCounter, 513 mSDsCounter, 0 mSdLazyCounter, 700 mSolverCounterSat, 264 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 706 SdHoareTripleChecker+Valid, 854 SdHoareTripleChecker+Invalid, 964 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 264 IncrementalHoareTripleChecker+Valid, 700 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-11-16 20:27:17,940 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [706 Valid, 854 Invalid, 964 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [264 Valid, 700 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-11-16 20:27:17,941 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 650 states. [2022-11-16 20:27:18,009 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 650 to 565. [2022-11-16 20:27:18,010 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 565 states, 408 states have (on average 1.3774509803921569) internal successors, (562), 416 states have internal predecessors, (562), 104 states have call successors, (104), 53 states have call predecessors, (104), 51 states have return successors, (126), 97 states have call predecessors, (126), 100 states have call successors, (126) [2022-11-16 20:27:18,014 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 565 states to 565 states and 792 transitions. [2022-11-16 20:27:18,015 INFO L78 Accepts]: Start accepts. Automaton has 565 states and 792 transitions. Word has length 45 [2022-11-16 20:27:18,015 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 20:27:18,015 INFO L495 AbstractCegarLoop]: Abstraction has 565 states and 792 transitions. [2022-11-16 20:27:18,015 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 5.0) internal successors, (30), 6 states have internal predecessors, (30), 4 states have call successors, (8), 2 states have call predecessors, (8), 4 states have return successors, (7), 4 states have call predecessors, (7), 4 states have call successors, (7) [2022-11-16 20:27:18,015 INFO L276 IsEmpty]: Start isEmpty. Operand 565 states and 792 transitions. [2022-11-16 20:27:18,023 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2022-11-16 20:27:18,023 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 20:27:18,024 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 20:27:18,024 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-11-16 20:27:18,024 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting error1Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 20:27:18,025 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 20:27:18,025 INFO L85 PathProgramCache]: Analyzing trace with hash -803173789, now seen corresponding path program 1 times [2022-11-16 20:27:18,025 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-16 20:27:18,025 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [123131410] [2022-11-16 20:27:18,026 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:27:18,026 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 20:27:18,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:27:18,130 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 20:27:18,131 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-16 20:27:18,131 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [123131410] [2022-11-16 20:27:18,131 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [123131410] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 20:27:18,131 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 20:27:18,131 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-11-16 20:27:18,132 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1959116306] [2022-11-16 20:27:18,132 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 20:27:18,132 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-16 20:27:18,132 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-16 20:27:18,133 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-16 20:27:18,133 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-11-16 20:27:18,133 INFO L87 Difference]: Start difference. First operand 565 states and 792 transitions. Second operand has 6 states, 6 states have (on average 5.166666666666667) internal successors, (31), 6 states have internal predecessors, (31), 4 states have call successors, (8), 2 states have call predecessors, (8), 4 states have return successors, (7), 4 states have call predecessors, (7), 4 states have call successors, (7) [2022-11-16 20:27:18,794 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 20:27:18,794 INFO L93 Difference]: Finished difference Result 1031 states and 1400 transitions. [2022-11-16 20:27:18,795 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-16 20:27:18,795 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 5.166666666666667) internal successors, (31), 6 states have internal predecessors, (31), 4 states have call successors, (8), 2 states have call predecessors, (8), 4 states have return successors, (7), 4 states have call predecessors, (7), 4 states have call successors, (7) Word has length 46 [2022-11-16 20:27:18,795 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 20:27:18,799 INFO L225 Difference]: With dead ends: 1031 [2022-11-16 20:27:18,799 INFO L226 Difference]: Without dead ends: 854 [2022-11-16 20:27:18,801 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2022-11-16 20:27:18,801 INFO L413 NwaCegarLoop]: 328 mSDtfsCounter, 606 mSDsluCounter, 473 mSDsCounter, 0 mSdLazyCounter, 590 mSolverCounterSat, 263 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 615 SdHoareTripleChecker+Valid, 801 SdHoareTripleChecker+Invalid, 853 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 263 IncrementalHoareTripleChecker+Valid, 590 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-11-16 20:27:18,802 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [615 Valid, 801 Invalid, 853 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [263 Valid, 590 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-11-16 20:27:18,803 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 854 states. [2022-11-16 20:27:18,904 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 854 to 829. [2022-11-16 20:27:18,905 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 829 states, 589 states have (on average 1.3259762308998302) internal successors, (781), 597 states have internal predecessors, (781), 153 states have call successors, (153), 87 states have call predecessors, (153), 85 states have return successors, (192), 146 states have call predecessors, (192), 149 states have call successors, (192) [2022-11-16 20:27:18,912 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 829 states to 829 states and 1126 transitions. [2022-11-16 20:27:18,912 INFO L78 Accepts]: Start accepts. Automaton has 829 states and 1126 transitions. Word has length 46 [2022-11-16 20:27:18,913 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 20:27:18,913 INFO L495 AbstractCegarLoop]: Abstraction has 829 states and 1126 transitions. [2022-11-16 20:27:18,913 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 5.166666666666667) internal successors, (31), 6 states have internal predecessors, (31), 4 states have call successors, (8), 2 states have call predecessors, (8), 4 states have return successors, (7), 4 states have call predecessors, (7), 4 states have call successors, (7) [2022-11-16 20:27:18,914 INFO L276 IsEmpty]: Start isEmpty. Operand 829 states and 1126 transitions. [2022-11-16 20:27:18,915 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2022-11-16 20:27:18,919 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 20:27:18,919 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 20:27:18,919 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-11-16 20:27:18,920 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting error1Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 20:27:18,920 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 20:27:18,921 INFO L85 PathProgramCache]: Analyzing trace with hash -1489204401, now seen corresponding path program 1 times [2022-11-16 20:27:18,921 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-16 20:27:18,921 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1983247329] [2022-11-16 20:27:18,921 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:27:18,927 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 20:27:18,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:27:19,019 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 20:27:19,019 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-16 20:27:19,020 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1983247329] [2022-11-16 20:27:19,020 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1983247329] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 20:27:19,020 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 20:27:19,020 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-16 20:27:19,021 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [952922262] [2022-11-16 20:27:19,021 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 20:27:19,021 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-16 20:27:19,022 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-16 20:27:19,022 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 20:27:19,022 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 20:27:19,023 INFO L87 Difference]: Start difference. First operand 829 states and 1126 transitions. Second operand has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 3 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (7), 2 states have call predecessors, (7), 2 states have call successors, (7) [2022-11-16 20:27:19,174 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 20:27:19,174 INFO L93 Difference]: Finished difference Result 830 states and 1127 transitions. [2022-11-16 20:27:19,174 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 20:27:19,175 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 3 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (7), 2 states have call predecessors, (7), 2 states have call successors, (7) Word has length 50 [2022-11-16 20:27:19,175 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 20:27:19,177 INFO L225 Difference]: With dead ends: 830 [2022-11-16 20:27:19,177 INFO L226 Difference]: Without dead ends: 386 [2022-11-16 20:27:19,179 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 20:27:19,179 INFO L413 NwaCegarLoop]: 180 mSDtfsCounter, 200 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 200 SdHoareTripleChecker+Valid, 180 SdHoareTripleChecker+Invalid, 41 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 20:27:19,180 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [200 Valid, 180 Invalid, 41 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-16 20:27:19,181 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 386 states. [2022-11-16 20:27:19,218 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 386 to 386. [2022-11-16 20:27:19,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 386 states, 287 states have (on average 1.4250871080139373) internal successors, (409), 292 states have internal predecessors, (409), 68 states have call successors, (68), 31 states have call predecessors, (68), 30 states have return successors, (92), 63 states have call predecessors, (92), 66 states have call successors, (92) [2022-11-16 20:27:19,221 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 386 states to 386 states and 569 transitions. [2022-11-16 20:27:19,221 INFO L78 Accepts]: Start accepts. Automaton has 386 states and 569 transitions. Word has length 50 [2022-11-16 20:27:19,222 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 20:27:19,222 INFO L495 AbstractCegarLoop]: Abstraction has 386 states and 569 transitions. [2022-11-16 20:27:19,222 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 3 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (7), 2 states have call predecessors, (7), 2 states have call successors, (7) [2022-11-16 20:27:19,222 INFO L276 IsEmpty]: Start isEmpty. Operand 386 states and 569 transitions. [2022-11-16 20:27:19,223 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2022-11-16 20:27:19,223 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 20:27:19,224 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 20:27:19,224 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-11-16 20:27:19,224 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 20:27:19,225 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 20:27:19,225 INFO L85 PathProgramCache]: Analyzing trace with hash 333451882, now seen corresponding path program 1 times [2022-11-16 20:27:19,225 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-16 20:27:19,225 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [596209420] [2022-11-16 20:27:19,226 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:27:19,226 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 20:27:19,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:27:19,341 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2022-11-16 20:27:19,341 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-16 20:27:19,341 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [596209420] [2022-11-16 20:27:19,342 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [596209420] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 20:27:19,342 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [979324624] [2022-11-16 20:27:19,342 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:27:19,342 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 20:27:19,342 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 [2022-11-16 20:27:19,351 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 20:27:19,375 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-11-16 20:27:19,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:27:19,563 INFO L263 TraceCheckSpWp]: Trace formula consists of 439 conjuncts, 2 conjunts are in the unsatisfiable core [2022-11-16 20:27:19,569 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 20:27:19,656 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-11-16 20:27:19,657 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-16 20:27:19,657 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [979324624] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 20:27:19,657 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-16 20:27:19,657 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [5] total 6 [2022-11-16 20:27:19,657 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1537128783] [2022-11-16 20:27:19,658 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 20:27:19,658 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-16 20:27:19,658 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-16 20:27:19,658 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 20:27:19,659 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-11-16 20:27:19,659 INFO L87 Difference]: Start difference. First operand 386 states and 569 transitions. Second operand has 3 states, 3 states have (on average 16.333333333333332) internal successors, (49), 2 states have internal predecessors, (49), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 2 states have call predecessors, (7), 2 states have call successors, (7) [2022-11-16 20:27:19,809 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 20:27:19,809 INFO L93 Difference]: Finished difference Result 1130 states and 1708 transitions. [2022-11-16 20:27:19,810 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 20:27:19,810 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 16.333333333333332) internal successors, (49), 2 states have internal predecessors, (49), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 2 states have call predecessors, (7), 2 states have call successors, (7) Word has length 74 [2022-11-16 20:27:19,810 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 20:27:19,815 INFO L225 Difference]: With dead ends: 1130 [2022-11-16 20:27:19,815 INFO L226 Difference]: Without dead ends: 750 [2022-11-16 20:27:19,816 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 74 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-11-16 20:27:19,817 INFO L413 NwaCegarLoop]: 122 mSDtfsCounter, 105 mSDsluCounter, 98 mSDsCounter, 0 mSdLazyCounter, 49 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 105 SdHoareTripleChecker+Valid, 220 SdHoareTripleChecker+Invalid, 51 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 49 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 20:27:19,818 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [105 Valid, 220 Invalid, 51 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 49 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-16 20:27:19,819 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 750 states. [2022-11-16 20:27:19,889 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 750 to 741. [2022-11-16 20:27:19,890 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 741 states, 555 states have (on average 1.4126126126126126) internal successors, (784), 563 states have internal predecessors, (784), 125 states have call successors, (125), 61 states have call predecessors, (125), 60 states have return successors, (171), 117 states have call predecessors, (171), 123 states have call successors, (171) [2022-11-16 20:27:19,894 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 741 states to 741 states and 1080 transitions. [2022-11-16 20:27:19,895 INFO L78 Accepts]: Start accepts. Automaton has 741 states and 1080 transitions. Word has length 74 [2022-11-16 20:27:19,895 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 20:27:19,895 INFO L495 AbstractCegarLoop]: Abstraction has 741 states and 1080 transitions. [2022-11-16 20:27:19,895 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 16.333333333333332) internal successors, (49), 2 states have internal predecessors, (49), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 2 states have call predecessors, (7), 2 states have call successors, (7) [2022-11-16 20:27:19,896 INFO L276 IsEmpty]: Start isEmpty. Operand 741 states and 1080 transitions. [2022-11-16 20:27:19,897 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2022-11-16 20:27:19,897 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 20:27:19,898 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 20:27:19,912 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-11-16 20:27:20,104 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 20:27:20,104 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 20:27:20,104 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 20:27:20,104 INFO L85 PathProgramCache]: Analyzing trace with hash -1154141848, now seen corresponding path program 1 times [2022-11-16 20:27:20,105 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-16 20:27:20,105 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [478851687] [2022-11-16 20:27:20,105 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:27:20,105 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 20:27:20,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:27:20,502 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-11-16 20:27:20,503 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-16 20:27:20,503 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [478851687] [2022-11-16 20:27:20,503 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [478851687] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 20:27:20,503 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 20:27:20,503 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-11-16 20:27:20,505 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2075945491] [2022-11-16 20:27:20,506 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 20:27:20,506 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-16 20:27:20,507 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-16 20:27:20,507 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-16 20:27:20,507 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2022-11-16 20:27:20,507 INFO L87 Difference]: Start difference. First operand 741 states and 1080 transitions. Second operand has 6 states, 6 states have (on average 7.166666666666667) internal successors, (43), 6 states have internal predecessors, (43), 4 states have call successors, (9), 3 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 4 states have call successors, (8) [2022-11-16 20:27:20,941 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 20:27:20,941 INFO L93 Difference]: Finished difference Result 1977 states and 2931 transitions. [2022-11-16 20:27:20,944 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-16 20:27:20,944 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 7.166666666666667) internal successors, (43), 6 states have internal predecessors, (43), 4 states have call successors, (9), 3 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 4 states have call successors, (8) Word has length 74 [2022-11-16 20:27:20,945 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 20:27:20,951 INFO L225 Difference]: With dead ends: 1977 [2022-11-16 20:27:20,951 INFO L226 Difference]: Without dead ends: 1243 [2022-11-16 20:27:20,956 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=41, Invalid=69, Unknown=0, NotChecked=0, Total=110 [2022-11-16 20:27:20,957 INFO L413 NwaCegarLoop]: 140 mSDtfsCounter, 308 mSDsluCounter, 285 mSDsCounter, 0 mSdLazyCounter, 240 mSolverCounterSat, 87 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 315 SdHoareTripleChecker+Valid, 425 SdHoareTripleChecker+Invalid, 327 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 87 IncrementalHoareTripleChecker+Valid, 240 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-16 20:27:20,957 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [315 Valid, 425 Invalid, 327 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [87 Valid, 240 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-11-16 20:27:20,959 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1243 states. [2022-11-16 20:27:21,113 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1243 to 1155. [2022-11-16 20:27:21,115 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1155 states, 864 states have (on average 1.3958333333333333) internal successors, (1206), 876 states have internal predecessors, (1206), 194 states have call successors, (194), 97 states have call predecessors, (194), 96 states have return successors, (273), 182 states have call predecessors, (273), 192 states have call successors, (273) [2022-11-16 20:27:21,124 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1155 states to 1155 states and 1673 transitions. [2022-11-16 20:27:21,125 INFO L78 Accepts]: Start accepts. Automaton has 1155 states and 1673 transitions. Word has length 74 [2022-11-16 20:27:21,125 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 20:27:21,125 INFO L495 AbstractCegarLoop]: Abstraction has 1155 states and 1673 transitions. [2022-11-16 20:27:21,125 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 7.166666666666667) internal successors, (43), 6 states have internal predecessors, (43), 4 states have call successors, (9), 3 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 4 states have call successors, (8) [2022-11-16 20:27:21,126 INFO L276 IsEmpty]: Start isEmpty. Operand 1155 states and 1673 transitions. [2022-11-16 20:27:21,128 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2022-11-16 20:27:21,128 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 20:27:21,128 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 20:27:21,128 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2022-11-16 20:27:21,129 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 20:27:21,129 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 20:27:21,129 INFO L85 PathProgramCache]: Analyzing trace with hash -409863646, now seen corresponding path program 1 times [2022-11-16 20:27:21,129 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-16 20:27:21,130 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [684288199] [2022-11-16 20:27:21,130 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:27:21,130 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 20:27:21,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:27:21,227 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-11-16 20:27:21,227 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-16 20:27:21,227 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [684288199] [2022-11-16 20:27:21,228 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [684288199] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 20:27:21,228 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 20:27:21,228 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-16 20:27:21,228 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [424832473] [2022-11-16 20:27:21,228 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 20:27:21,230 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-16 20:27:21,230 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-16 20:27:21,231 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 20:27:21,231 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 20:27:21,231 INFO L87 Difference]: Start difference. First operand 1155 states and 1673 transitions. Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2022-11-16 20:27:21,427 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 20:27:21,427 INFO L93 Difference]: Finished difference Result 2405 states and 3540 transitions. [2022-11-16 20:27:21,428 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 20:27:21,428 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 75 [2022-11-16 20:27:21,431 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 20:27:21,438 INFO L225 Difference]: With dead ends: 2405 [2022-11-16 20:27:21,439 INFO L226 Difference]: Without dead ends: 1399 [2022-11-16 20:27:21,442 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 20:27:21,445 INFO L413 NwaCegarLoop]: 158 mSDtfsCounter, 46 mSDsluCounter, 111 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 46 SdHoareTripleChecker+Valid, 269 SdHoareTripleChecker+Invalid, 58 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 20:27:21,445 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [46 Valid, 269 Invalid, 58 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 58 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-16 20:27:21,447 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1399 states. [2022-11-16 20:27:21,597 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1399 to 1274. [2022-11-16 20:27:21,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1274 states, 971 states have (on average 1.419155509783728) internal successors, (1378), 983 states have internal predecessors, (1378), 200 states have call successors, (200), 103 states have call predecessors, (200), 102 states have return successors, (279), 188 states have call predecessors, (279), 198 states have call successors, (279) [2022-11-16 20:27:21,607 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1274 states to 1274 states and 1857 transitions. [2022-11-16 20:27:21,607 INFO L78 Accepts]: Start accepts. Automaton has 1274 states and 1857 transitions. Word has length 75 [2022-11-16 20:27:21,608 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 20:27:21,608 INFO L495 AbstractCegarLoop]: Abstraction has 1274 states and 1857 transitions. [2022-11-16 20:27:21,609 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2022-11-16 20:27:21,609 INFO L276 IsEmpty]: Start isEmpty. Operand 1274 states and 1857 transitions. [2022-11-16 20:27:21,619 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2022-11-16 20:27:21,619 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 20:27:21,619 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 20:27:21,619 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2022-11-16 20:27:21,620 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 20:27:21,620 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 20:27:21,620 INFO L85 PathProgramCache]: Analyzing trace with hash -1453692988, now seen corresponding path program 1 times [2022-11-16 20:27:21,620 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-16 20:27:21,620 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [884214480] [2022-11-16 20:27:21,620 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:27:21,621 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 20:27:21,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:27:21,692 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2022-11-16 20:27:21,692 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-16 20:27:21,692 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [884214480] [2022-11-16 20:27:21,692 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [884214480] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 20:27:21,693 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 20:27:21,693 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-16 20:27:21,693 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1978915287] [2022-11-16 20:27:21,693 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 20:27:21,693 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-16 20:27:21,694 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-16 20:27:21,694 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 20:27:21,694 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 20:27:21,695 INFO L87 Difference]: Start difference. First operand 1274 states and 1857 transitions. Second operand has 3 states, 3 states have (on average 17.0) internal successors, (51), 3 states have internal predecessors, (51), 3 states have call successors, (10), 2 states have call predecessors, (10), 1 states have return successors, (9), 3 states have call predecessors, (9), 3 states have call successors, (9) [2022-11-16 20:27:22,013 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 20:27:22,014 INFO L93 Difference]: Finished difference Result 3739 states and 5557 transitions. [2022-11-16 20:27:22,014 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 20:27:22,014 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 17.0) internal successors, (51), 3 states have internal predecessors, (51), 3 states have call successors, (10), 2 states have call predecessors, (10), 1 states have return successors, (9), 3 states have call predecessors, (9), 3 states have call successors, (9) Word has length 98 [2022-11-16 20:27:22,015 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 20:27:22,030 INFO L225 Difference]: With dead ends: 3739 [2022-11-16 20:27:22,030 INFO L226 Difference]: Without dead ends: 2471 [2022-11-16 20:27:22,035 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-16 20:27:22,038 INFO L413 NwaCegarLoop]: 121 mSDtfsCounter, 100 mSDsluCounter, 98 mSDsCounter, 0 mSdLazyCounter, 47 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 100 SdHoareTripleChecker+Valid, 219 SdHoareTripleChecker+Invalid, 49 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 47 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 20:27:22,038 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [100 Valid, 219 Invalid, 49 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 47 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-16 20:27:22,042 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2471 states. [2022-11-16 20:27:22,321 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2471 to 2445. [2022-11-16 20:27:22,325 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2445 states, 1862 states have (on average 1.3963480128893662) internal successors, (2600), 1884 states have internal predecessors, (2600), 378 states have call successors, (378), 205 states have call predecessors, (378), 204 states have return successors, (524), 356 states have call predecessors, (524), 376 states have call successors, (524) [2022-11-16 20:27:22,371 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2445 states to 2445 states and 3502 transitions. [2022-11-16 20:27:22,372 INFO L78 Accepts]: Start accepts. Automaton has 2445 states and 3502 transitions. Word has length 98 [2022-11-16 20:27:22,372 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 20:27:22,372 INFO L495 AbstractCegarLoop]: Abstraction has 2445 states and 3502 transitions. [2022-11-16 20:27:22,372 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 17.0) internal successors, (51), 3 states have internal predecessors, (51), 3 states have call successors, (10), 2 states have call predecessors, (10), 1 states have return successors, (9), 3 states have call predecessors, (9), 3 states have call successors, (9) [2022-11-16 20:27:22,372 INFO L276 IsEmpty]: Start isEmpty. Operand 2445 states and 3502 transitions. [2022-11-16 20:27:22,381 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2022-11-16 20:27:22,381 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 20:27:22,381 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 20:27:22,382 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2022-11-16 20:27:22,382 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 20:27:22,382 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 20:27:22,382 INFO L85 PathProgramCache]: Analyzing trace with hash -1990817789, now seen corresponding path program 1 times [2022-11-16 20:27:22,382 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-16 20:27:22,383 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [887937169] [2022-11-16 20:27:22,383 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:27:22,383 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 20:27:22,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:27:22,699 INFO L134 CoverageAnalysis]: Checked inductivity of 70 backedges. 10 proven. 25 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2022-11-16 20:27:22,699 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-16 20:27:22,700 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [887937169] [2022-11-16 20:27:22,700 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [887937169] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 20:27:22,700 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1592612355] [2022-11-16 20:27:22,700 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:27:22,701 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 20:27:22,701 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 [2022-11-16 20:27:22,703 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 20:27:22,727 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-11-16 20:27:22,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:27:22,873 INFO L263 TraceCheckSpWp]: Trace formula consists of 573 conjuncts, 2 conjunts are in the unsatisfiable core [2022-11-16 20:27:22,878 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 20:27:22,913 INFO L134 CoverageAnalysis]: Checked inductivity of 70 backedges. 50 proven. 0 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2022-11-16 20:27:22,917 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-16 20:27:22,917 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1592612355] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 20:27:22,917 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-16 20:27:22,918 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [6] total 7 [2022-11-16 20:27:22,918 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [872244035] [2022-11-16 20:27:22,918 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 20:27:22,919 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-16 20:27:22,919 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-16 20:27:22,919 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 20:27:22,919 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2022-11-16 20:27:22,920 INFO L87 Difference]: Start difference. First operand 2445 states and 3502 transitions. Second operand has 3 states, 3 states have (on average 24.0) internal successors, (72), 3 states have internal predecessors, (72), 3 states have call successors, (11), 3 states have call predecessors, (11), 2 states have return successors, (10), 2 states have call predecessors, (10), 3 states have call successors, (10) [2022-11-16 20:27:23,278 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 20:27:23,278 INFO L93 Difference]: Finished difference Result 4833 states and 6953 transitions. [2022-11-16 20:27:23,278 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 20:27:23,279 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 24.0) internal successors, (72), 3 states have internal predecessors, (72), 3 states have call successors, (11), 3 states have call predecessors, (11), 2 states have return successors, (10), 2 states have call predecessors, (10), 3 states have call successors, (10) Word has length 110 [2022-11-16 20:27:23,279 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 20:27:23,299 INFO L225 Difference]: With dead ends: 4833 [2022-11-16 20:27:23,299 INFO L226 Difference]: Without dead ends: 3033 [2022-11-16 20:27:23,306 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 112 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2022-11-16 20:27:23,307 INFO L413 NwaCegarLoop]: 121 mSDtfsCounter, 112 mSDsluCounter, 24 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 112 SdHoareTripleChecker+Valid, 145 SdHoareTripleChecker+Invalid, 34 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-16 20:27:23,308 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [112 Valid, 145 Invalid, 34 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-16 20:27:23,312 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3033 states. [2022-11-16 20:27:23,642 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3033 to 2945. [2022-11-16 20:27:23,647 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2945 states, 2293 states have (on average 1.3654600959441778) internal successors, (3131), 2311 states have internal predecessors, (3131), 396 states have call successors, (396), 255 states have call predecessors, (396), 255 states have return successors, (549), 379 states have call predecessors, (549), 394 states have call successors, (549) [2022-11-16 20:27:23,662 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2945 states to 2945 states and 4076 transitions. [2022-11-16 20:27:23,663 INFO L78 Accepts]: Start accepts. Automaton has 2945 states and 4076 transitions. Word has length 110 [2022-11-16 20:27:23,663 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 20:27:23,663 INFO L495 AbstractCegarLoop]: Abstraction has 2945 states and 4076 transitions. [2022-11-16 20:27:23,664 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 24.0) internal successors, (72), 3 states have internal predecessors, (72), 3 states have call successors, (11), 3 states have call predecessors, (11), 2 states have return successors, (10), 2 states have call predecessors, (10), 3 states have call successors, (10) [2022-11-16 20:27:23,664 INFO L276 IsEmpty]: Start isEmpty. Operand 2945 states and 4076 transitions. [2022-11-16 20:27:23,672 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2022-11-16 20:27:23,673 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 20:27:23,673 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 20:27:23,687 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-11-16 20:27:23,879 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-11-16 20:27:23,879 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 20:27:23,880 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 20:27:23,880 INFO L85 PathProgramCache]: Analyzing trace with hash 1332474820, now seen corresponding path program 2 times [2022-11-16 20:27:23,880 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-16 20:27:23,880 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [141911066] [2022-11-16 20:27:23,880 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:27:23,880 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 20:27:23,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:27:24,166 INFO L134 CoverageAnalysis]: Checked inductivity of 70 backedges. 10 proven. 26 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2022-11-16 20:27:24,167 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-16 20:27:24,167 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [141911066] [2022-11-16 20:27:24,167 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [141911066] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 20:27:24,167 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [316128387] [2022-11-16 20:27:24,167 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-16 20:27:24,168 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 20:27:24,168 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 [2022-11-16 20:27:24,169 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 20:27:24,180 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-11-16 20:27:24,331 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2022-11-16 20:27:24,331 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-16 20:27:24,337 INFO L263 TraceCheckSpWp]: Trace formula consists of 383 conjuncts, 3 conjunts are in the unsatisfiable core [2022-11-16 20:27:24,344 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 20:27:24,384 INFO L134 CoverageAnalysis]: Checked inductivity of 70 backedges. 47 proven. 0 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2022-11-16 20:27:24,385 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-16 20:27:24,385 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [316128387] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 20:27:24,385 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-16 20:27:24,386 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [6] total 7 [2022-11-16 20:27:24,386 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1081831626] [2022-11-16 20:27:24,386 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 20:27:24,386 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-16 20:27:24,387 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-16 20:27:24,387 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 20:27:24,388 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2022-11-16 20:27:24,388 INFO L87 Difference]: Start difference. First operand 2945 states and 4076 transitions. Second operand has 3 states, 3 states have (on average 23.333333333333332) internal successors, (70), 3 states have internal predecessors, (70), 3 states have call successors, (11), 3 states have call predecessors, (11), 2 states have return successors, (10), 2 states have call predecessors, (10), 3 states have call successors, (10) [2022-11-16 20:27:24,831 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 20:27:24,832 INFO L93 Difference]: Finished difference Result 5714 states and 8125 transitions. [2022-11-16 20:27:24,832 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 20:27:24,833 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 23.333333333333332) internal successors, (70), 3 states have internal predecessors, (70), 3 states have call successors, (11), 3 states have call predecessors, (11), 2 states have return successors, (10), 2 states have call predecessors, (10), 3 states have call successors, (10) Word has length 110 [2022-11-16 20:27:24,833 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 20:27:24,853 INFO L225 Difference]: With dead ends: 5714 [2022-11-16 20:27:24,853 INFO L226 Difference]: Without dead ends: 3556 [2022-11-16 20:27:24,862 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 112 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2022-11-16 20:27:24,863 INFO L413 NwaCegarLoop]: 191 mSDtfsCounter, 117 mSDsluCounter, 100 mSDsCounter, 0 mSdLazyCounter, 65 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 117 SdHoareTripleChecker+Valid, 291 SdHoareTripleChecker+Invalid, 69 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 65 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 20:27:24,863 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [117 Valid, 291 Invalid, 69 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 65 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-16 20:27:24,867 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3556 states. [2022-11-16 20:27:25,291 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3556 to 3480. [2022-11-16 20:27:25,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3480 states, 2727 states have (on average 1.3542354235423542) internal successors, (3693), 2749 states have internal predecessors, (3693), 455 states have call successors, (455), 298 states have call predecessors, (455), 297 states have return successors, (665), 433 states have call predecessors, (665), 453 states have call successors, (665) [2022-11-16 20:27:25,347 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3480 states to 3480 states and 4813 transitions. [2022-11-16 20:27:25,348 INFO L78 Accepts]: Start accepts. Automaton has 3480 states and 4813 transitions. Word has length 110 [2022-11-16 20:27:25,348 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 20:27:25,349 INFO L495 AbstractCegarLoop]: Abstraction has 3480 states and 4813 transitions. [2022-11-16 20:27:25,349 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 23.333333333333332) internal successors, (70), 3 states have internal predecessors, (70), 3 states have call successors, (11), 3 states have call predecessors, (11), 2 states have return successors, (10), 2 states have call predecessors, (10), 3 states have call successors, (10) [2022-11-16 20:27:25,349 INFO L276 IsEmpty]: Start isEmpty. Operand 3480 states and 4813 transitions. [2022-11-16 20:27:25,357 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2022-11-16 20:27:25,357 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 20:27:25,358 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 20:27:25,375 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-11-16 20:27:25,563 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable10 [2022-11-16 20:27:25,564 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 20:27:25,564 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 20:27:25,564 INFO L85 PathProgramCache]: Analyzing trace with hash -1984586106, now seen corresponding path program 1 times [2022-11-16 20:27:25,565 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-16 20:27:25,565 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1370124328] [2022-11-16 20:27:25,565 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:27:25,565 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 20:27:25,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:27:25,800 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 10 proven. 26 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2022-11-16 20:27:25,801 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-16 20:27:25,801 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1370124328] [2022-11-16 20:27:25,801 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1370124328] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 20:27:25,801 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1036147082] [2022-11-16 20:27:25,801 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:27:25,802 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 20:27:25,802 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 [2022-11-16 20:27:25,803 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 20:27:25,831 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-11-16 20:27:25,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:27:25,967 INFO L263 TraceCheckSpWp]: Trace formula consists of 572 conjuncts, 3 conjunts are in the unsatisfiable core [2022-11-16 20:27:25,970 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 20:27:26,000 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 53 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2022-11-16 20:27:26,000 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-16 20:27:26,000 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1036147082] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 20:27:26,001 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-16 20:27:26,001 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [6] total 7 [2022-11-16 20:27:26,001 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [833532332] [2022-11-16 20:27:26,001 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 20:27:26,002 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-16 20:27:26,002 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-16 20:27:26,002 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 20:27:26,002 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2022-11-16 20:27:26,003 INFO L87 Difference]: Start difference. First operand 3480 states and 4813 transitions. Second operand has 3 states, 3 states have (on average 25.333333333333332) internal successors, (76), 3 states have internal predecessors, (76), 3 states have call successors, (11), 3 states have call predecessors, (11), 3 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) [2022-11-16 20:27:26,528 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 20:27:26,528 INFO L93 Difference]: Finished difference Result 8188 states and 11465 transitions. [2022-11-16 20:27:26,529 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 20:27:26,529 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 25.333333333333332) internal successors, (76), 3 states have internal predecessors, (76), 3 states have call successors, (11), 3 states have call predecessors, (11), 3 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) Word has length 111 [2022-11-16 20:27:26,529 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 20:27:26,553 INFO L225 Difference]: With dead ends: 8188 [2022-11-16 20:27:26,553 INFO L226 Difference]: Without dead ends: 4715 [2022-11-16 20:27:26,564 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 118 GetRequests, 113 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2022-11-16 20:27:26,565 INFO L413 NwaCegarLoop]: 130 mSDtfsCounter, 59 mSDsluCounter, 96 mSDsCounter, 0 mSdLazyCounter, 48 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 59 SdHoareTripleChecker+Valid, 226 SdHoareTripleChecker+Invalid, 50 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 48 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-16 20:27:26,566 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [59 Valid, 226 Invalid, 50 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 48 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-16 20:27:26,571 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4715 states. [2022-11-16 20:27:26,997 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4715 to 3854. [2022-11-16 20:27:27,006 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3854 states, 3057 states have (on average 1.3755315668956494) internal successors, (4205), 3080 states have internal predecessors, (4205), 477 states have call successors, (477), 320 states have call predecessors, (477), 319 states have return successors, (687), 454 states have call predecessors, (687), 475 states have call successors, (687) [2022-11-16 20:27:27,019 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3854 states to 3854 states and 5369 transitions. [2022-11-16 20:27:27,020 INFO L78 Accepts]: Start accepts. Automaton has 3854 states and 5369 transitions. Word has length 111 [2022-11-16 20:27:27,021 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 20:27:27,021 INFO L495 AbstractCegarLoop]: Abstraction has 3854 states and 5369 transitions. [2022-11-16 20:27:27,021 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 25.333333333333332) internal successors, (76), 3 states have internal predecessors, (76), 3 states have call successors, (11), 3 states have call predecessors, (11), 3 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) [2022-11-16 20:27:27,021 INFO L276 IsEmpty]: Start isEmpty. Operand 3854 states and 5369 transitions. [2022-11-16 20:27:27,030 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2022-11-16 20:27:27,030 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 20:27:27,030 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 20:27:27,039 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-11-16 20:27:27,236 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable11 [2022-11-16 20:27:27,236 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 20:27:27,237 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 20:27:27,237 INFO L85 PathProgramCache]: Analyzing trace with hash 714608099, now seen corresponding path program 1 times [2022-11-16 20:27:27,237 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-16 20:27:27,238 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1168101546] [2022-11-16 20:27:27,238 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:27:27,238 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 20:27:27,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:27:27,349 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 22 proven. 1 refuted. 0 times theorem prover too weak. 49 trivial. 0 not checked. [2022-11-16 20:27:27,349 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-16 20:27:27,349 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1168101546] [2022-11-16 20:27:27,349 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1168101546] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 20:27:27,350 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [854186619] [2022-11-16 20:27:27,350 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:27:27,350 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 20:27:27,350 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 [2022-11-16 20:27:27,351 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 20:27:27,371 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-11-16 20:27:27,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:27:27,509 INFO L263 TraceCheckSpWp]: Trace formula consists of 569 conjuncts, 2 conjunts are in the unsatisfiable core [2022-11-16 20:27:27,513 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 20:27:27,543 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 58 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2022-11-16 20:27:27,543 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-16 20:27:27,543 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [854186619] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 20:27:27,544 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-16 20:27:27,544 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [5] total 6 [2022-11-16 20:27:27,544 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1036620252] [2022-11-16 20:27:27,544 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 20:27:27,545 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-16 20:27:27,545 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-16 20:27:27,545 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 20:27:27,545 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2022-11-16 20:27:27,546 INFO L87 Difference]: Start difference. First operand 3854 states and 5369 transitions. Second operand has 3 states, 3 states have (on average 25.0) internal successors, (75), 3 states have internal predecessors, (75), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) [2022-11-16 20:27:28,123 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 20:27:28,123 INFO L93 Difference]: Finished difference Result 6126 states and 8511 transitions. [2022-11-16 20:27:28,124 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 20:27:28,124 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 25.0) internal successors, (75), 3 states have internal predecessors, (75), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) Word has length 111 [2022-11-16 20:27:28,124 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 20:27:28,147 INFO L225 Difference]: With dead ends: 6126 [2022-11-16 20:27:28,147 INFO L226 Difference]: Without dead ends: 4408 [2022-11-16 20:27:28,153 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 115 GetRequests, 111 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2022-11-16 20:27:28,154 INFO L413 NwaCegarLoop]: 161 mSDtfsCounter, 61 mSDsluCounter, 113 mSDsCounter, 0 mSdLazyCounter, 57 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 61 SdHoareTripleChecker+Valid, 274 SdHoareTripleChecker+Invalid, 57 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 57 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-16 20:27:28,154 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [61 Valid, 274 Invalid, 57 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 57 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-16 20:27:28,159 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4408 states. [2022-11-16 20:27:28,673 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4408 to 4126. [2022-11-16 20:27:28,694 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4126 states, 3297 states have (on average 1.389444949954504) internal successors, (4581), 3320 states have internal predecessors, (4581), 493 states have call successors, (493), 336 states have call predecessors, (493), 335 states have return successors, (703), 470 states have call predecessors, (703), 491 states have call successors, (703) [2022-11-16 20:27:28,709 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4126 states to 4126 states and 5777 transitions. [2022-11-16 20:27:28,710 INFO L78 Accepts]: Start accepts. Automaton has 4126 states and 5777 transitions. Word has length 111 [2022-11-16 20:27:28,710 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 20:27:28,710 INFO L495 AbstractCegarLoop]: Abstraction has 4126 states and 5777 transitions. [2022-11-16 20:27:28,711 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 25.0) internal successors, (75), 3 states have internal predecessors, (75), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) [2022-11-16 20:27:28,711 INFO L276 IsEmpty]: Start isEmpty. Operand 4126 states and 5777 transitions. [2022-11-16 20:27:28,721 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2022-11-16 20:27:28,721 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 20:27:28,721 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 20:27:28,732 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-11-16 20:27:28,932 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2022-11-16 20:27:28,933 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 20:27:28,934 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 20:27:28,934 INFO L85 PathProgramCache]: Analyzing trace with hash 1554116249, now seen corresponding path program 1 times [2022-11-16 20:27:28,934 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-16 20:27:28,935 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [952142515] [2022-11-16 20:27:28,935 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:27:28,935 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 20:27:28,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:27:29,046 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 21 proven. 3 refuted. 0 times theorem prover too weak. 49 trivial. 0 not checked. [2022-11-16 20:27:29,046 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-16 20:27:29,046 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [952142515] [2022-11-16 20:27:29,047 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [952142515] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 20:27:29,047 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [325026916] [2022-11-16 20:27:29,047 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:27:29,047 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 20:27:29,047 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 [2022-11-16 20:27:29,048 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 20:27:29,067 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-11-16 20:27:29,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:27:29,205 INFO L263 TraceCheckSpWp]: Trace formula consists of 581 conjuncts, 2 conjunts are in the unsatisfiable core [2022-11-16 20:27:29,208 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 20:27:29,237 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 59 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2022-11-16 20:27:29,238 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-16 20:27:29,238 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [325026916] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 20:27:29,238 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-16 20:27:29,238 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [5] total 6 [2022-11-16 20:27:29,238 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [931926317] [2022-11-16 20:27:29,239 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 20:27:29,239 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-16 20:27:29,239 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-16 20:27:29,240 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 20:27:29,240 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2022-11-16 20:27:29,240 INFO L87 Difference]: Start difference. First operand 4126 states and 5777 transitions. Second operand has 3 states, 3 states have (on average 25.333333333333332) internal successors, (76), 3 states have internal predecessors, (76), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) [2022-11-16 20:27:29,828 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 20:27:29,828 INFO L93 Difference]: Finished difference Result 7706 states and 10970 transitions. [2022-11-16 20:27:29,829 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 20:27:29,829 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 25.333333333333332) internal successors, (76), 3 states have internal predecessors, (76), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) Word has length 112 [2022-11-16 20:27:29,829 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 20:27:29,879 INFO L225 Difference]: With dead ends: 7706 [2022-11-16 20:27:29,880 INFO L226 Difference]: Without dead ends: 5558 [2022-11-16 20:27:29,885 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 112 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2022-11-16 20:27:29,886 INFO L413 NwaCegarLoop]: 179 mSDtfsCounter, 67 mSDsluCounter, 113 mSDsCounter, 0 mSdLazyCounter, 59 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 67 SdHoareTripleChecker+Valid, 292 SdHoareTripleChecker+Invalid, 59 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 59 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 20:27:29,886 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [67 Valid, 292 Invalid, 59 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 59 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-16 20:27:29,891 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5558 states. [2022-11-16 20:27:30,364 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5558 to 4810. [2022-11-16 20:27:30,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4810 states, 3893 states have (on average 1.4084253788851786) internal successors, (5483), 3916 states have internal predecessors, (5483), 537 states have call successors, (537), 380 states have call predecessors, (537), 379 states have return successors, (747), 514 states have call predecessors, (747), 535 states have call successors, (747) [2022-11-16 20:27:30,385 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4810 states to 4810 states and 6767 transitions. [2022-11-16 20:27:30,386 INFO L78 Accepts]: Start accepts. Automaton has 4810 states and 6767 transitions. Word has length 112 [2022-11-16 20:27:30,386 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 20:27:30,386 INFO L495 AbstractCegarLoop]: Abstraction has 4810 states and 6767 transitions. [2022-11-16 20:27:30,386 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 25.333333333333332) internal successors, (76), 3 states have internal predecessors, (76), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) [2022-11-16 20:27:30,386 INFO L276 IsEmpty]: Start isEmpty. Operand 4810 states and 6767 transitions. [2022-11-16 20:27:30,396 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2022-11-16 20:27:30,397 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 20:27:30,397 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 20:27:30,412 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-11-16 20:27:30,603 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2022-11-16 20:27:30,603 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 20:27:30,604 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 20:27:30,604 INFO L85 PathProgramCache]: Analyzing trace with hash 1908276119, now seen corresponding path program 1 times [2022-11-16 20:27:30,604 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-16 20:27:30,604 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1743577750] [2022-11-16 20:27:30,604 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:27:30,604 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 20:27:30,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:27:30,700 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 20 proven. 4 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2022-11-16 20:27:30,701 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-16 20:27:30,701 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1743577750] [2022-11-16 20:27:30,701 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1743577750] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 20:27:30,701 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [680999334] [2022-11-16 20:27:30,701 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:27:30,702 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 20:27:30,702 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 [2022-11-16 20:27:30,703 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 20:27:30,723 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-11-16 20:27:30,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:27:30,851 INFO L263 TraceCheckSpWp]: Trace formula consists of 584 conjuncts, 2 conjunts are in the unsatisfiable core [2022-11-16 20:27:30,854 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 20:27:30,890 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 57 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2022-11-16 20:27:30,890 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-16 20:27:30,890 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [680999334] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 20:27:30,891 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-16 20:27:30,891 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [5] total 6 [2022-11-16 20:27:30,891 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1231941954] [2022-11-16 20:27:30,891 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 20:27:30,892 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-16 20:27:30,892 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-16 20:27:30,892 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 20:27:30,892 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2022-11-16 20:27:30,893 INFO L87 Difference]: Start difference. First operand 4810 states and 6767 transitions. Second operand has 3 states, 3 states have (on average 25.333333333333332) internal successors, (76), 3 states have internal predecessors, (76), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) [2022-11-16 20:27:31,499 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 20:27:31,499 INFO L93 Difference]: Finished difference Result 9090 states and 12914 transitions. [2022-11-16 20:27:31,500 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 20:27:31,500 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 25.333333333333332) internal successors, (76), 3 states have internal predecessors, (76), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) Word has length 112 [2022-11-16 20:27:31,500 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 20:27:31,522 INFO L225 Difference]: With dead ends: 9090 [2022-11-16 20:27:31,522 INFO L226 Difference]: Without dead ends: 6611 [2022-11-16 20:27:31,531 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 112 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2022-11-16 20:27:31,533 INFO L413 NwaCegarLoop]: 184 mSDtfsCounter, 73 mSDsluCounter, 113 mSDsCounter, 0 mSdLazyCounter, 60 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 73 SdHoareTripleChecker+Valid, 297 SdHoareTripleChecker+Invalid, 60 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 60 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 20:27:31,533 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [73 Valid, 297 Invalid, 60 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 60 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-16 20:27:31,539 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6611 states. [2022-11-16 20:27:32,124 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6611 to 5737. [2022-11-16 20:27:32,133 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5737 states, 4688 states have (on average 1.4159556313993173) internal successors, (6638), 4711 states have internal predecessors, (6638), 603 states have call successors, (603), 446 states have call predecessors, (603), 445 states have return successors, (813), 580 states have call predecessors, (813), 601 states have call successors, (813) [2022-11-16 20:27:32,154 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5737 states to 5737 states and 8054 transitions. [2022-11-16 20:27:32,155 INFO L78 Accepts]: Start accepts. Automaton has 5737 states and 8054 transitions. Word has length 112 [2022-11-16 20:27:32,155 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 20:27:32,155 INFO L495 AbstractCegarLoop]: Abstraction has 5737 states and 8054 transitions. [2022-11-16 20:27:32,155 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 25.333333333333332) internal successors, (76), 3 states have internal predecessors, (76), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) [2022-11-16 20:27:32,156 INFO L276 IsEmpty]: Start isEmpty. Operand 5737 states and 8054 transitions. [2022-11-16 20:27:32,169 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2022-11-16 20:27:32,169 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 20:27:32,169 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 20:27:32,183 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-11-16 20:27:32,375 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14,8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 20:27:32,375 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 20:27:32,376 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 20:27:32,376 INFO L85 PathProgramCache]: Analyzing trace with hash 1301544040, now seen corresponding path program 1 times [2022-11-16 20:27:32,376 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-16 20:27:32,376 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [115922851] [2022-11-16 20:27:32,376 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:27:32,377 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 20:27:32,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:27:32,647 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 17 proven. 26 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2022-11-16 20:27:32,647 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-16 20:27:32,647 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [115922851] [2022-11-16 20:27:32,647 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [115922851] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 20:27:32,647 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2015921982] [2022-11-16 20:27:32,648 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:27:32,648 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 20:27:32,648 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 [2022-11-16 20:27:32,649 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 20:27:32,675 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-11-16 20:27:32,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:27:32,805 INFO L263 TraceCheckSpWp]: Trace formula consists of 579 conjuncts, 9 conjunts are in the unsatisfiable core [2022-11-16 20:27:32,808 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 20:27:32,966 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 47 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2022-11-16 20:27:32,967 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-16 20:27:32,967 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2015921982] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 20:27:32,967 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-16 20:27:32,967 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [6] total 7 [2022-11-16 20:27:32,967 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1471978208] [2022-11-16 20:27:32,967 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 20:27:32,968 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-16 20:27:32,968 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-16 20:27:32,968 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-16 20:27:32,968 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2022-11-16 20:27:32,969 INFO L87 Difference]: Start difference. First operand 5737 states and 8054 transitions. Second operand has 6 states, 6 states have (on average 11.833333333333334) internal successors, (71), 6 states have internal predecessors, (71), 3 states have call successors, (10), 4 states have call predecessors, (10), 4 states have return successors, (9), 3 states have call predecessors, (9), 3 states have call successors, (9) [2022-11-16 20:27:33,944 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 20:27:33,944 INFO L93 Difference]: Finished difference Result 13647 states and 19124 transitions. [2022-11-16 20:27:33,945 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-16 20:27:33,945 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 11.833333333333334) internal successors, (71), 6 states have internal predecessors, (71), 3 states have call successors, (10), 4 states have call predecessors, (10), 4 states have return successors, (9), 3 states have call predecessors, (9), 3 states have call successors, (9) Word has length 112 [2022-11-16 20:27:33,945 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 20:27:33,972 INFO L225 Difference]: With dead ends: 13647 [2022-11-16 20:27:33,972 INFO L226 Difference]: Without dead ends: 7917 [2022-11-16 20:27:33,985 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 123 GetRequests, 114 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2022-11-16 20:27:33,985 INFO L413 NwaCegarLoop]: 124 mSDtfsCounter, 355 mSDsluCounter, 149 mSDsCounter, 0 mSdLazyCounter, 135 mSolverCounterSat, 106 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 367 SdHoareTripleChecker+Valid, 273 SdHoareTripleChecker+Invalid, 241 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 106 IncrementalHoareTripleChecker+Valid, 135 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-16 20:27:33,986 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [367 Valid, 273 Invalid, 241 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [106 Valid, 135 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-16 20:27:33,993 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7917 states. [2022-11-16 20:27:34,804 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7917 to 7913. [2022-11-16 20:27:34,812 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7913 states, 6427 states have (on average 1.3899175353975417) internal successors, (8933), 6460 states have internal predecessors, (8933), 855 states have call successors, (855), 631 states have call predecessors, (855), 630 states have return successors, (1158), 822 states have call predecessors, (1158), 853 states have call successors, (1158) [2022-11-16 20:27:34,833 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7913 states to 7913 states and 10946 transitions. [2022-11-16 20:27:34,834 INFO L78 Accepts]: Start accepts. Automaton has 7913 states and 10946 transitions. Word has length 112 [2022-11-16 20:27:34,835 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 20:27:34,835 INFO L495 AbstractCegarLoop]: Abstraction has 7913 states and 10946 transitions. [2022-11-16 20:27:34,835 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 11.833333333333334) internal successors, (71), 6 states have internal predecessors, (71), 3 states have call successors, (10), 4 states have call predecessors, (10), 4 states have return successors, (9), 3 states have call predecessors, (9), 3 states have call successors, (9) [2022-11-16 20:27:34,835 INFO L276 IsEmpty]: Start isEmpty. Operand 7913 states and 10946 transitions. [2022-11-16 20:27:34,849 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2022-11-16 20:27:34,849 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 20:27:34,849 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 20:27:34,856 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-11-16 20:27:35,055 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2022-11-16 20:27:35,055 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 20:27:35,055 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 20:27:35,055 INFO L85 PathProgramCache]: Analyzing trace with hash -507811667, now seen corresponding path program 1 times [2022-11-16 20:27:35,056 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-16 20:27:35,056 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [563191502] [2022-11-16 20:27:35,056 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:27:35,056 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 20:27:35,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:27:35,259 INFO L134 CoverageAnalysis]: Checked inductivity of 75 backedges. 19 proven. 27 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2022-11-16 20:27:35,260 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-16 20:27:35,260 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [563191502] [2022-11-16 20:27:35,260 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [563191502] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 20:27:35,260 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1022389213] [2022-11-16 20:27:35,260 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:27:35,260 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 20:27:35,261 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 [2022-11-16 20:27:35,262 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 20:27:35,283 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-11-16 20:27:35,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:27:35,422 INFO L263 TraceCheckSpWp]: Trace formula consists of 588 conjuncts, 3 conjunts are in the unsatisfiable core [2022-11-16 20:27:35,424 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 20:27:35,461 INFO L134 CoverageAnalysis]: Checked inductivity of 75 backedges. 67 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2022-11-16 20:27:35,461 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-16 20:27:35,461 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1022389213] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 20:27:35,462 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-16 20:27:35,462 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [6] total 7 [2022-11-16 20:27:35,462 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1614367459] [2022-11-16 20:27:35,462 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 20:27:35,463 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-16 20:27:35,463 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-16 20:27:35,463 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 20:27:35,463 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2022-11-16 20:27:35,464 INFO L87 Difference]: Start difference. First operand 7913 states and 10946 transitions. Second operand has 3 states, 3 states have (on average 28.0) internal successors, (84), 3 states have internal predecessors, (84), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) [2022-11-16 20:27:36,148 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 20:27:36,148 INFO L93 Difference]: Finished difference Result 13561 states and 19275 transitions. [2022-11-16 20:27:36,149 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 20:27:36,149 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 28.0) internal successors, (84), 3 states have internal predecessors, (84), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) Word has length 113 [2022-11-16 20:27:36,149 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 20:27:36,175 INFO L225 Difference]: With dead ends: 13561 [2022-11-16 20:27:36,175 INFO L226 Difference]: Without dead ends: 7935 [2022-11-16 20:27:36,189 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 120 GetRequests, 115 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2022-11-16 20:27:36,190 INFO L413 NwaCegarLoop]: 181 mSDtfsCounter, 98 mSDsluCounter, 100 mSDsCounter, 0 mSdLazyCounter, 61 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 98 SdHoareTripleChecker+Valid, 281 SdHoareTripleChecker+Invalid, 63 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 61 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 20:27:36,191 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [98 Valid, 281 Invalid, 63 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 61 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-16 20:27:36,198 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7935 states. [2022-11-16 20:27:36,963 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7935 to 7817. [2022-11-16 20:27:36,970 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7817 states, 6331 states have (on average 1.3636076449218133) internal successors, (8633), 6364 states have internal predecessors, (8633), 855 states have call successors, (855), 631 states have call predecessors, (855), 630 states have return successors, (1158), 822 states have call predecessors, (1158), 853 states have call successors, (1158) [2022-11-16 20:27:36,998 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7817 states to 7817 states and 10646 transitions. [2022-11-16 20:27:36,999 INFO L78 Accepts]: Start accepts. Automaton has 7817 states and 10646 transitions. Word has length 113 [2022-11-16 20:27:37,000 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 20:27:37,000 INFO L495 AbstractCegarLoop]: Abstraction has 7817 states and 10646 transitions. [2022-11-16 20:27:37,000 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 28.0) internal successors, (84), 3 states have internal predecessors, (84), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) [2022-11-16 20:27:37,000 INFO L276 IsEmpty]: Start isEmpty. Operand 7817 states and 10646 transitions. [2022-11-16 20:27:37,018 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2022-11-16 20:27:37,019 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 20:27:37,019 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 20:27:37,025 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-11-16 20:27:37,224 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable16 [2022-11-16 20:27:37,225 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 20:27:37,225 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 20:27:37,225 INFO L85 PathProgramCache]: Analyzing trace with hash -644333717, now seen corresponding path program 1 times [2022-11-16 20:27:37,225 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-16 20:27:37,225 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1354370397] [2022-11-16 20:27:37,226 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:27:37,226 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 20:27:37,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:27:37,473 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 19 proven. 25 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2022-11-16 20:27:37,474 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-16 20:27:37,474 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1354370397] [2022-11-16 20:27:37,474 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1354370397] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 20:27:37,474 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1948020621] [2022-11-16 20:27:37,475 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:27:37,475 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 20:27:37,475 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 [2022-11-16 20:27:37,476 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 20:27:37,495 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-11-16 20:27:37,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:27:37,640 INFO L263 TraceCheckSpWp]: Trace formula consists of 594 conjuncts, 9 conjunts are in the unsatisfiable core [2022-11-16 20:27:37,644 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 20:27:37,729 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 48 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-11-16 20:27:37,729 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-16 20:27:37,730 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1948020621] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 20:27:37,730 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-16 20:27:37,730 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [6] total 7 [2022-11-16 20:27:37,730 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1996713106] [2022-11-16 20:27:37,731 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 20:27:37,731 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-16 20:27:37,731 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-16 20:27:37,732 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-16 20:27:37,732 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2022-11-16 20:27:37,732 INFO L87 Difference]: Start difference. First operand 7817 states and 10646 transitions. Second operand has 6 states, 5 states have (on average 14.4) internal successors, (72), 6 states have internal predecessors, (72), 3 states have call successors, (10), 4 states have call predecessors, (10), 4 states have return successors, (9), 3 states have call predecessors, (9), 3 states have call successors, (9) [2022-11-16 20:27:39,205 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 20:27:39,205 INFO L93 Difference]: Finished difference Result 18627 states and 25307 transitions. [2022-11-16 20:27:39,205 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-16 20:27:39,206 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 14.4) internal successors, (72), 6 states have internal predecessors, (72), 3 states have call successors, (10), 4 states have call predecessors, (10), 4 states have return successors, (9), 3 states have call predecessors, (9), 3 states have call successors, (9) Word has length 113 [2022-11-16 20:27:39,206 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 20:27:39,240 INFO L225 Difference]: With dead ends: 18627 [2022-11-16 20:27:39,240 INFO L226 Difference]: Without dead ends: 10817 [2022-11-16 20:27:39,256 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 124 GetRequests, 115 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2022-11-16 20:27:39,257 INFO L413 NwaCegarLoop]: 115 mSDtfsCounter, 358 mSDsluCounter, 138 mSDsCounter, 0 mSdLazyCounter, 130 mSolverCounterSat, 114 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 370 SdHoareTripleChecker+Valid, 253 SdHoareTripleChecker+Invalid, 244 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 114 IncrementalHoareTripleChecker+Valid, 130 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-16 20:27:39,257 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [370 Valid, 253 Invalid, 244 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [114 Valid, 130 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-16 20:27:39,267 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10817 states. [2022-11-16 20:27:40,388 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10817 to 10813. [2022-11-16 20:27:40,397 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10813 states, 8705 states have (on average 1.3361286616886847) internal successors, (11631), 8753 states have internal predecessors, (11631), 1214 states have call successors, (1214), 894 states have call predecessors, (1214), 893 states have return successors, (1648), 1166 states have call predecessors, (1648), 1212 states have call successors, (1648) [2022-11-16 20:27:40,425 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10813 states to 10813 states and 14493 transitions. [2022-11-16 20:27:40,427 INFO L78 Accepts]: Start accepts. Automaton has 10813 states and 14493 transitions. Word has length 113 [2022-11-16 20:27:40,427 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 20:27:40,427 INFO L495 AbstractCegarLoop]: Abstraction has 10813 states and 14493 transitions. [2022-11-16 20:27:40,427 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 14.4) internal successors, (72), 6 states have internal predecessors, (72), 3 states have call successors, (10), 4 states have call predecessors, (10), 4 states have return successors, (9), 3 states have call predecessors, (9), 3 states have call successors, (9) [2022-11-16 20:27:40,428 INFO L276 IsEmpty]: Start isEmpty. Operand 10813 states and 14493 transitions. [2022-11-16 20:27:40,443 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2022-11-16 20:27:40,443 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 20:27:40,444 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 20:27:40,451 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-11-16 20:27:40,651 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable17 [2022-11-16 20:27:40,651 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 20:27:40,652 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 20:27:40,652 INFO L85 PathProgramCache]: Analyzing trace with hash 1687392045, now seen corresponding path program 1 times [2022-11-16 20:27:40,652 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-16 20:27:40,652 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1087945280] [2022-11-16 20:27:40,653 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:27:40,653 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 20:27:40,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:27:40,835 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 20 proven. 30 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2022-11-16 20:27:40,836 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-16 20:27:40,836 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1087945280] [2022-11-16 20:27:40,836 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1087945280] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 20:27:40,836 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [939648093] [2022-11-16 20:27:40,836 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:27:40,837 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 20:27:40,837 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 [2022-11-16 20:27:40,838 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 20:27:40,867 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-11-16 20:27:41,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:27:41,021 INFO L263 TraceCheckSpWp]: Trace formula consists of 613 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-16 20:27:41,024 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 20:27:41,060 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 59 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2022-11-16 20:27:41,061 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-16 20:27:41,061 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [939648093] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 20:27:41,061 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-16 20:27:41,061 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [6] total 7 [2022-11-16 20:27:41,061 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [953625848] [2022-11-16 20:27:41,062 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 20:27:41,063 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-16 20:27:41,063 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-16 20:27:41,063 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-16 20:27:41,066 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-11-16 20:27:41,066 INFO L87 Difference]: Start difference. First operand 10813 states and 14493 transitions. Second operand has 4 states, 4 states have (on average 21.25) internal successors, (85), 4 states have internal predecessors, (85), 2 states have call successors, (11), 2 states have call predecessors, (11), 3 states have return successors, (10), 3 states have call predecessors, (10), 2 states have call successors, (10) [2022-11-16 20:27:42,333 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 20:27:42,333 INFO L93 Difference]: Finished difference Result 16508 states and 21962 transitions. [2022-11-16 20:27:42,333 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-16 20:27:42,334 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 21.25) internal successors, (85), 4 states have internal predecessors, (85), 2 states have call successors, (11), 2 states have call predecessors, (11), 3 states have return successors, (10), 3 states have call predecessors, (10), 2 states have call successors, (10) Word has length 117 [2022-11-16 20:27:42,334 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 20:27:42,369 INFO L225 Difference]: With dead ends: 16508 [2022-11-16 20:27:42,370 INFO L226 Difference]: Without dead ends: 11286 [2022-11-16 20:27:42,381 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 120 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-11-16 20:27:42,382 INFO L413 NwaCegarLoop]: 181 mSDtfsCounter, 114 mSDsluCounter, 271 mSDsCounter, 0 mSdLazyCounter, 94 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 114 SdHoareTripleChecker+Valid, 452 SdHoareTripleChecker+Invalid, 97 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 94 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 20:27:42,382 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [114 Valid, 452 Invalid, 97 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 94 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-16 20:27:42,395 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11286 states. [2022-11-16 20:27:43,752 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11286 to 11055. [2022-11-16 20:27:43,762 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11055 states, 8900 states have (on average 1.3330337078651686) internal successors, (11864), 8966 states have internal predecessors, (11864), 1221 states have call successors, (1221), 898 states have call predecessors, (1221), 933 states have return successors, (1709), 1191 states have call predecessors, (1709), 1219 states have call successors, (1709) [2022-11-16 20:27:43,802 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11055 states to 11055 states and 14794 transitions. [2022-11-16 20:27:43,803 INFO L78 Accepts]: Start accepts. Automaton has 11055 states and 14794 transitions. Word has length 117 [2022-11-16 20:27:43,803 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 20:27:43,804 INFO L495 AbstractCegarLoop]: Abstraction has 11055 states and 14794 transitions. [2022-11-16 20:27:43,804 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 21.25) internal successors, (85), 4 states have internal predecessors, (85), 2 states have call successors, (11), 2 states have call predecessors, (11), 3 states have return successors, (10), 3 states have call predecessors, (10), 2 states have call successors, (10) [2022-11-16 20:27:43,804 INFO L276 IsEmpty]: Start isEmpty. Operand 11055 states and 14794 transitions. [2022-11-16 20:27:43,824 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2022-11-16 20:27:43,824 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 20:27:43,825 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 20:27:43,835 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-11-16 20:27:44,036 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 20:27:44,036 INFO L420 AbstractCegarLoop]: === Iteration 20 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 20:27:44,037 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 20:27:44,037 INFO L85 PathProgramCache]: Analyzing trace with hash 1393052042, now seen corresponding path program 1 times [2022-11-16 20:27:44,037 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-16 20:27:44,038 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [569130880] [2022-11-16 20:27:44,038 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:27:44,038 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 20:27:44,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:27:44,113 INFO L134 CoverageAnalysis]: Checked inductivity of 74 backedges. 28 proven. 11 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2022-11-16 20:27:44,113 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-16 20:27:44,114 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [569130880] [2022-11-16 20:27:44,114 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [569130880] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 20:27:44,114 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1490512768] [2022-11-16 20:27:44,114 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:27:44,114 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 20:27:44,115 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 [2022-11-16 20:27:44,116 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 20:27:44,139 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-11-16 20:27:44,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:27:44,284 INFO L263 TraceCheckSpWp]: Trace formula consists of 612 conjuncts, 3 conjunts are in the unsatisfiable core [2022-11-16 20:27:44,287 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 20:27:44,306 INFO L134 CoverageAnalysis]: Checked inductivity of 74 backedges. 55 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2022-11-16 20:27:44,306 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-16 20:27:44,306 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1490512768] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 20:27:44,307 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-16 20:27:44,307 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [4] total 4 [2022-11-16 20:27:44,309 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [519271633] [2022-11-16 20:27:44,309 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 20:27:44,310 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-16 20:27:44,310 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-16 20:27:44,310 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 20:27:44,311 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-16 20:27:44,311 INFO L87 Difference]: Start difference. First operand 11055 states and 14794 transitions. Second operand has 3 states, 3 states have (on average 27.0) internal successors, (81), 3 states have internal predecessors, (81), 3 states have call successors, (11), 3 states have call predecessors, (11), 2 states have return successors, (10), 2 states have call predecessors, (10), 3 states have call successors, (10) [2022-11-16 20:27:45,457 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 20:27:45,457 INFO L93 Difference]: Finished difference Result 16223 states and 21774 transitions. [2022-11-16 20:27:45,457 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 20:27:45,458 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 27.0) internal successors, (81), 3 states have internal predecessors, (81), 3 states have call successors, (11), 3 states have call predecessors, (11), 2 states have return successors, (10), 2 states have call predecessors, (10), 3 states have call successors, (10) Word has length 118 [2022-11-16 20:27:45,458 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 20:27:45,482 INFO L225 Difference]: With dead ends: 16223 [2022-11-16 20:27:45,482 INFO L226 Difference]: Without dead ends: 10797 [2022-11-16 20:27:45,495 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 119 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-16 20:27:45,496 INFO L413 NwaCegarLoop]: 122 mSDtfsCounter, 22 mSDsluCounter, 105 mSDsCounter, 0 mSdLazyCounter, 50 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 22 SdHoareTripleChecker+Valid, 227 SdHoareTripleChecker+Invalid, 50 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 50 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-16 20:27:45,496 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [22 Valid, 227 Invalid, 50 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 50 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-16 20:27:45,505 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10797 states. [2022-11-16 20:27:46,472 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10797 to 10797. [2022-11-16 20:27:46,477 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10797 states, 8678 states have (on average 1.333256510716755) internal successors, (11570), 8735 states have internal predecessors, (11570), 1221 states have call successors, (1221), 898 states have call predecessors, (1221), 897 states have return successors, (1655), 1164 states have call predecessors, (1655), 1219 states have call successors, (1655) [2022-11-16 20:27:46,498 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10797 states to 10797 states and 14446 transitions. [2022-11-16 20:27:46,500 INFO L78 Accepts]: Start accepts. Automaton has 10797 states and 14446 transitions. Word has length 118 [2022-11-16 20:27:46,500 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 20:27:46,500 INFO L495 AbstractCegarLoop]: Abstraction has 10797 states and 14446 transitions. [2022-11-16 20:27:46,500 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 27.0) internal successors, (81), 3 states have internal predecessors, (81), 3 states have call successors, (11), 3 states have call predecessors, (11), 2 states have return successors, (10), 2 states have call predecessors, (10), 3 states have call successors, (10) [2022-11-16 20:27:46,501 INFO L276 IsEmpty]: Start isEmpty. Operand 10797 states and 14446 transitions. [2022-11-16 20:27:46,514 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2022-11-16 20:27:46,514 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 20:27:46,515 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 20:27:46,523 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2022-11-16 20:27:46,720 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 20:27:46,720 INFO L420 AbstractCegarLoop]: === Iteration 21 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 20:27:46,721 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 20:27:46,721 INFO L85 PathProgramCache]: Analyzing trace with hash 2024875128, now seen corresponding path program 1 times [2022-11-16 20:27:46,721 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-16 20:27:46,721 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [139011950] [2022-11-16 20:27:46,721 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:27:46,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 20:27:46,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:27:46,884 INFO L134 CoverageAnalysis]: Checked inductivity of 74 backedges. 31 proven. 11 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2022-11-16 20:27:46,884 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-16 20:27:46,884 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [139011950] [2022-11-16 20:27:46,884 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [139011950] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 20:27:46,885 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1524126653] [2022-11-16 20:27:46,885 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:27:46,885 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 20:27:46,885 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 [2022-11-16 20:27:46,887 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 20:27:46,896 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-11-16 20:27:47,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:27:47,053 INFO L263 TraceCheckSpWp]: Trace formula consists of 617 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-16 20:27:47,056 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 20:27:47,124 INFO L134 CoverageAnalysis]: Checked inductivity of 74 backedges. 62 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-11-16 20:27:47,124 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-16 20:27:47,125 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1524126653] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 20:27:47,125 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-16 20:27:47,125 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [6] total 6 [2022-11-16 20:27:47,125 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1194731148] [2022-11-16 20:27:47,125 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 20:27:47,126 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-16 20:27:47,126 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-16 20:27:47,126 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 20:27:47,126 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-11-16 20:27:47,127 INFO L87 Difference]: Start difference. First operand 10797 states and 14446 transitions. Second operand has 3 states, 3 states have (on average 29.333333333333332) internal successors, (88), 3 states have internal predecessors, (88), 3 states have call successors, (11), 3 states have call predecessors, (11), 3 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) [2022-11-16 20:27:48,068 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 20:27:48,068 INFO L93 Difference]: Finished difference Result 19860 states and 27039 transitions. [2022-11-16 20:27:48,069 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 20:27:48,069 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 29.333333333333332) internal successors, (88), 3 states have internal predecessors, (88), 3 states have call successors, (11), 3 states have call predecessors, (11), 3 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) Word has length 118 [2022-11-16 20:27:48,069 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 20:27:48,103 INFO L225 Difference]: With dead ends: 19860 [2022-11-16 20:27:48,103 INFO L226 Difference]: Without dead ends: 12304 [2022-11-16 20:27:48,121 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 124 GetRequests, 120 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-11-16 20:27:48,122 INFO L413 NwaCegarLoop]: 129 mSDtfsCounter, 86 mSDsluCounter, 31 mSDsCounter, 0 mSdLazyCounter, 35 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 86 SdHoareTripleChecker+Valid, 160 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 35 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-16 20:27:48,122 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [86 Valid, 160 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 35 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-16 20:27:48,133 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12304 states. [2022-11-16 20:27:49,316 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12304 to 12164. [2022-11-16 20:27:49,325 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12164 states, 9937 states have (on average 1.3073362181744994) internal successors, (12991), 9994 states have internal predecessors, (12991), 1234 states have call successors, (1234), 993 states have call predecessors, (1234), 992 states have return successors, (1844), 1177 states have call predecessors, (1844), 1232 states have call successors, (1844) [2022-11-16 20:27:49,347 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12164 states to 12164 states and 16069 transitions. [2022-11-16 20:27:49,349 INFO L78 Accepts]: Start accepts. Automaton has 12164 states and 16069 transitions. Word has length 118 [2022-11-16 20:27:49,349 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 20:27:49,349 INFO L495 AbstractCegarLoop]: Abstraction has 12164 states and 16069 transitions. [2022-11-16 20:27:49,349 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 29.333333333333332) internal successors, (88), 3 states have internal predecessors, (88), 3 states have call successors, (11), 3 states have call predecessors, (11), 3 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) [2022-11-16 20:27:49,349 INFO L276 IsEmpty]: Start isEmpty. Operand 12164 states and 16069 transitions. [2022-11-16 20:27:49,361 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2022-11-16 20:27:49,361 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 20:27:49,361 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 20:27:49,372 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2022-11-16 20:27:49,567 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable20 [2022-11-16 20:27:49,567 INFO L420 AbstractCegarLoop]: === Iteration 22 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 20:27:49,567 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 20:27:49,567 INFO L85 PathProgramCache]: Analyzing trace with hash 349817944, now seen corresponding path program 1 times [2022-11-16 20:27:49,568 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-16 20:27:49,568 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [97361327] [2022-11-16 20:27:49,568 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:27:49,568 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 20:27:49,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:27:49,628 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 30 proven. 5 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2022-11-16 20:27:49,628 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-16 20:27:49,628 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [97361327] [2022-11-16 20:27:49,629 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [97361327] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 20:27:49,629 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [802376611] [2022-11-16 20:27:49,629 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:27:49,629 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 20:27:49,629 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 [2022-11-16 20:27:49,630 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 20:27:49,635 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-11-16 20:27:49,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:27:49,781 INFO L263 TraceCheckSpWp]: Trace formula consists of 611 conjuncts, 3 conjunts are in the unsatisfiable core [2022-11-16 20:27:49,784 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 20:27:49,816 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 71 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2022-11-16 20:27:49,816 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-16 20:27:49,817 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [802376611] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 20:27:49,817 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-16 20:27:49,817 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [4] total 4 [2022-11-16 20:27:49,817 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1616177491] [2022-11-16 20:27:49,817 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 20:27:49,818 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-16 20:27:49,818 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-16 20:27:49,818 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 20:27:49,818 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-16 20:27:49,818 INFO L87 Difference]: Start difference. First operand 12164 states and 16069 transitions. Second operand has 3 states, 3 states have (on average 30.666666666666668) internal successors, (92), 3 states have internal predecessors, (92), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) [2022-11-16 20:27:51,319 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 20:27:51,319 INFO L93 Difference]: Finished difference Result 20624 states and 28041 transitions. [2022-11-16 20:27:51,320 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 20:27:51,320 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 30.666666666666668) internal successors, (92), 3 states have internal predecessors, (92), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) Word has length 118 [2022-11-16 20:27:51,320 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 20:27:51,356 INFO L225 Difference]: With dead ends: 20624 [2022-11-16 20:27:51,356 INFO L226 Difference]: Without dead ends: 12141 [2022-11-16 20:27:51,376 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 119 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-16 20:27:51,377 INFO L413 NwaCegarLoop]: 189 mSDtfsCounter, 95 mSDsluCounter, 99 mSDsCounter, 0 mSdLazyCounter, 65 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 95 SdHoareTripleChecker+Valid, 288 SdHoareTripleChecker+Invalid, 67 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 65 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 20:27:51,377 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [95 Valid, 288 Invalid, 67 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 65 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-16 20:27:51,389 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12141 states. [2022-11-16 20:27:52,711 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12141 to 11988. [2022-11-16 20:27:52,718 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11988 states, 9761 states have (on average 1.2782501792849092) internal successors, (12477), 9818 states have internal predecessors, (12477), 1234 states have call successors, (1234), 993 states have call predecessors, (1234), 992 states have return successors, (1844), 1177 states have call predecessors, (1844), 1232 states have call successors, (1844) [2022-11-16 20:27:52,740 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11988 states to 11988 states and 15555 transitions. [2022-11-16 20:27:52,741 INFO L78 Accepts]: Start accepts. Automaton has 11988 states and 15555 transitions. Word has length 118 [2022-11-16 20:27:52,741 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 20:27:52,741 INFO L495 AbstractCegarLoop]: Abstraction has 11988 states and 15555 transitions. [2022-11-16 20:27:52,741 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 30.666666666666668) internal successors, (92), 3 states have internal predecessors, (92), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) [2022-11-16 20:27:52,741 INFO L276 IsEmpty]: Start isEmpty. Operand 11988 states and 15555 transitions. [2022-11-16 20:27:52,749 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2022-11-16 20:27:52,749 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 20:27:52,750 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 20:27:52,760 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Forceful destruction successful, exit code 0 [2022-11-16 20:27:52,955 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21,15 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 20:27:52,955 INFO L420 AbstractCegarLoop]: === Iteration 23 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 20:27:52,956 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 20:27:52,956 INFO L85 PathProgramCache]: Analyzing trace with hash 870951077, now seen corresponding path program 1 times [2022-11-16 20:27:52,956 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-16 20:27:52,956 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1643995118] [2022-11-16 20:27:52,956 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:27:52,956 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 20:27:52,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:27:53,216 INFO L134 CoverageAnalysis]: Checked inductivity of 74 backedges. 26 proven. 7 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2022-11-16 20:27:53,217 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-16 20:27:53,217 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1643995118] [2022-11-16 20:27:53,217 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1643995118] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 20:27:53,217 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1551011953] [2022-11-16 20:27:53,217 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:27:53,218 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 20:27:53,218 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 [2022-11-16 20:27:53,219 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 20:27:53,243 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-11-16 20:27:53,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:27:53,381 INFO L263 TraceCheckSpWp]: Trace formula consists of 608 conjuncts, 27 conjunts are in the unsatisfiable core [2022-11-16 20:27:53,384 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 20:27:53,699 INFO L134 CoverageAnalysis]: Checked inductivity of 74 backedges. 43 proven. 15 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-11-16 20:27:53,699 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 20:27:54,051 INFO L134 CoverageAnalysis]: Checked inductivity of 74 backedges. 39 proven. 0 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2022-11-16 20:27:54,051 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1551011953] provided 1 perfect and 1 imperfect interpolant sequences [2022-11-16 20:27:54,051 INFO L184 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2022-11-16 20:27:54,051 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [8, 8] total 17 [2022-11-16 20:27:54,051 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1041687321] [2022-11-16 20:27:54,052 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 20:27:54,052 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-16 20:27:54,052 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-16 20:27:54,052 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-16 20:27:54,053 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=229, Unknown=0, NotChecked=0, Total=272 [2022-11-16 20:27:54,053 INFO L87 Difference]: Start difference. First operand 11988 states and 15555 transitions. Second operand has 4 states, 4 states have (on average 17.5) internal successors, (70), 4 states have internal predecessors, (70), 3 states have call successors, (10), 2 states have call predecessors, (10), 3 states have return successors, (10), 4 states have call predecessors, (10), 3 states have call successors, (10) [2022-11-16 20:27:55,432 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 20:27:55,433 INFO L93 Difference]: Finished difference Result 24250 states and 31599 transitions. [2022-11-16 20:27:55,433 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-16 20:27:55,433 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 17.5) internal successors, (70), 4 states have internal predecessors, (70), 3 states have call successors, (10), 2 states have call predecessors, (10), 3 states have return successors, (10), 4 states have call predecessors, (10), 3 states have call successors, (10) Word has length 115 [2022-11-16 20:27:55,433 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 20:27:55,457 INFO L225 Difference]: With dead ends: 24250 [2022-11-16 20:27:55,457 INFO L226 Difference]: Without dead ends: 13562 [2022-11-16 20:27:55,468 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 238 GetRequests, 223 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=43, Invalid=229, Unknown=0, NotChecked=0, Total=272 [2022-11-16 20:27:55,469 INFO L413 NwaCegarLoop]: 149 mSDtfsCounter, 111 mSDsluCounter, 136 mSDsCounter, 0 mSdLazyCounter, 112 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 111 SdHoareTripleChecker+Valid, 285 SdHoareTripleChecker+Invalid, 119 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 112 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-16 20:27:55,469 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [111 Valid, 285 Invalid, 119 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 112 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-16 20:27:55,481 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13562 states. [2022-11-16 20:27:56,829 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13562 to 13193. [2022-11-16 20:27:56,838 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13193 states, 10891 states have (on average 1.2575521072445137) internal successors, (13696), 10957 states have internal predecessors, (13696), 1240 states have call successors, (1240), 1053 states have call predecessors, (1240), 1061 states have return successors, (1811), 1183 states have call predecessors, (1811), 1238 states have call successors, (1811) [2022-11-16 20:27:56,861 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13193 states to 13193 states and 16747 transitions. [2022-11-16 20:27:56,863 INFO L78 Accepts]: Start accepts. Automaton has 13193 states and 16747 transitions. Word has length 115 [2022-11-16 20:27:56,864 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 20:27:56,864 INFO L495 AbstractCegarLoop]: Abstraction has 13193 states and 16747 transitions. [2022-11-16 20:27:56,864 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 17.5) internal successors, (70), 4 states have internal predecessors, (70), 3 states have call successors, (10), 2 states have call predecessors, (10), 3 states have return successors, (10), 4 states have call predecessors, (10), 3 states have call successors, (10) [2022-11-16 20:27:56,864 INFO L276 IsEmpty]: Start isEmpty. Operand 13193 states and 16747 transitions. [2022-11-16 20:27:56,879 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2022-11-16 20:27:56,879 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 20:27:56,879 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 20:27:56,884 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2022-11-16 20:27:57,082 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable22 [2022-11-16 20:27:57,082 INFO L420 AbstractCegarLoop]: === Iteration 24 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 20:27:57,083 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 20:27:57,083 INFO L85 PathProgramCache]: Analyzing trace with hash 2084862853, now seen corresponding path program 1 times [2022-11-16 20:27:57,083 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-16 20:27:57,083 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1583912611] [2022-11-16 20:27:57,083 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:27:57,083 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 20:27:57,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:27:57,285 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 51 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-11-16 20:27:57,285 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-16 20:27:57,285 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1583912611] [2022-11-16 20:27:57,285 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1583912611] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 20:27:57,285 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 20:27:57,286 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-16 20:27:57,286 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [823957677] [2022-11-16 20:27:57,286 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 20:27:57,286 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-16 20:27:57,286 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-16 20:27:57,287 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-16 20:27:57,287 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-11-16 20:27:57,287 INFO L87 Difference]: Start difference. First operand 13193 states and 16747 transitions. Second operand has 5 states, 5 states have (on average 15.2) internal successors, (76), 5 states have internal predecessors, (76), 4 states have call successors, (11), 3 states have call predecessors, (11), 2 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) [2022-11-16 20:27:59,434 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 20:27:59,434 INFO L93 Difference]: Finished difference Result 33531 states and 42547 transitions. [2022-11-16 20:27:59,435 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-16 20:27:59,435 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 15.2) internal successors, (76), 5 states have internal predecessors, (76), 4 states have call successors, (11), 3 states have call predecessors, (11), 2 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) Word has length 116 [2022-11-16 20:27:59,435 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 20:27:59,472 INFO L225 Difference]: With dead ends: 33531 [2022-11-16 20:27:59,472 INFO L226 Difference]: Without dead ends: 17376 [2022-11-16 20:27:59,494 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2022-11-16 20:27:59,495 INFO L413 NwaCegarLoop]: 163 mSDtfsCounter, 97 mSDsluCounter, 273 mSDsCounter, 0 mSdLazyCounter, 259 mSolverCounterSat, 28 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 102 SdHoareTripleChecker+Valid, 436 SdHoareTripleChecker+Invalid, 287 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 28 IncrementalHoareTripleChecker+Valid, 259 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-16 20:27:59,495 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [102 Valid, 436 Invalid, 287 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [28 Valid, 259 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-16 20:27:59,510 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17376 states. [2022-11-16 20:28:01,082 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17376 to 16878. [2022-11-16 20:28:01,094 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16878 states, 13789 states have (on average 1.240046413808108) internal successors, (17099), 13912 states have internal predecessors, (17099), 1674 states have call successors, (1674), 1406 states have call predecessors, (1674), 1414 states have return successors, (2437), 1560 states have call predecessors, (2437), 1672 states have call successors, (2437) [2022-11-16 20:28:01,122 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16878 states to 16878 states and 21210 transitions. [2022-11-16 20:28:01,125 INFO L78 Accepts]: Start accepts. Automaton has 16878 states and 21210 transitions. Word has length 116 [2022-11-16 20:28:01,125 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 20:28:01,126 INFO L495 AbstractCegarLoop]: Abstraction has 16878 states and 21210 transitions. [2022-11-16 20:28:01,126 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 15.2) internal successors, (76), 5 states have internal predecessors, (76), 4 states have call successors, (11), 3 states have call predecessors, (11), 2 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) [2022-11-16 20:28:01,126 INFO L276 IsEmpty]: Start isEmpty. Operand 16878 states and 21210 transitions. [2022-11-16 20:28:01,138 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 122 [2022-11-16 20:28:01,138 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 20:28:01,138 INFO L195 NwaCegarLoop]: trace histogram [5, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 20:28:01,138 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2022-11-16 20:28:01,139 INFO L420 AbstractCegarLoop]: === Iteration 25 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 20:28:01,139 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 20:28:01,139 INFO L85 PathProgramCache]: Analyzing trace with hash -1080464123, now seen corresponding path program 1 times [2022-11-16 20:28:01,139 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-16 20:28:01,140 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1919966329] [2022-11-16 20:28:01,140 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:28:01,140 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 20:28:01,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:28:01,691 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 13 proven. 43 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2022-11-16 20:28:01,691 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-16 20:28:01,691 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1919966329] [2022-11-16 20:28:01,691 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1919966329] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 20:28:01,691 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1226569662] [2022-11-16 20:28:01,692 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:28:01,692 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 20:28:01,692 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 [2022-11-16 20:28:01,693 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 20:28:01,715 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-11-16 20:28:01,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:28:01,864 INFO L263 TraceCheckSpWp]: Trace formula consists of 661 conjuncts, 15 conjunts are in the unsatisfiable core [2022-11-16 20:28:01,868 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 20:28:02,019 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 62 proven. 14 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-11-16 20:28:02,020 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 20:28:02,359 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 17 proven. 3 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2022-11-16 20:28:02,360 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1226569662] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 20:28:02,360 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2069441862] [2022-11-16 20:28:02,387 INFO L159 IcfgInterpreter]: Started Sifa with 69 locations of interest [2022-11-16 20:28:02,387 INFO L166 IcfgInterpreter]: Building call graph [2022-11-16 20:28:02,391 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2022-11-16 20:28:02,397 INFO L176 IcfgInterpreter]: Starting interpretation [2022-11-16 20:28:02,397 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2022-11-16 20:28:21,306 INFO L197 IcfgInterpreter]: Interpreting procedure error2 with input of size 81 for LOIs [2022-11-16 20:28:21,312 INFO L197 IcfgInterpreter]: Interpreting procedure reset_delta_events2 with input of size 216 for LOIs [2022-11-16 20:28:31,598 INFO L197 IcfgInterpreter]: Interpreting procedure exists_runnable_thread2 with input of size 161 for LOIs [2022-11-16 20:28:31,639 INFO L197 IcfgInterpreter]: Interpreting procedure update_channels2 with input of size 140 for LOIs [2022-11-16 20:28:31,666 INFO L197 IcfgInterpreter]: Interpreting procedure immediate_notify with input of size 88 for LOIs [2022-11-16 20:28:32,086 INFO L197 IcfgInterpreter]: Interpreting procedure activate_threads2 with input of size 138 for LOIs [2022-11-16 20:28:33,017 INFO L197 IcfgInterpreter]: Interpreting procedure fire_delta_events2 with input of size 165 for LOIs [2022-11-16 20:28:33,067 INFO L180 IcfgInterpreter]: Interpretation finished [2022-11-16 20:28:54,798 WARN L233 SmtUtils]: Spent 9.31s on a formula simplification. DAG size of input: 414 DAG size of output: 249 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 20:29:12,553 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '517277#(and (= ~p_dw_pc~0 0) (= ~c_dr_st~0 0) (= ~p_num_write~0 0) (<= ~local~0 2147483647) (= ~c_num_read~0 0) (= ~q_buf_0~0 0) (= ~t1_pc~0 0) (= ~t1_i~0 1) (= ~slow_clk_edge~0 0) (= ~p_last_write~0 0) (<= 0 (+ ~local~0 2147483648)) (= ~c_last_read~0 0) (= 0 ~c_dr_i~0) (= ~q_free~0 0) (= 0 ~t3_pc~0) (= ~q_req_up~0 0) (= ~fast_clk_edge~0 0) (= ~q_ev~0 0) (= ~m_pc~0 1) (= ~p_dw_i~0 0) (= ~m_i~0 1) (= ~t~0 0) (not (= ~token~0 (+ 3 ~local~0))) (= ~p_dw_st~0 0) (= ~t2_i~0 1) (= ~q_write_ev~0 0) (= ~c_dr_pc~0 0) (= 0 ~t2_pc~0) (= ~q_read_ev~0 0) (= ~m_st~0 1) (= |#NULL.offset| 0) (<= ~token~0 2147483647) (= ~a_t~0 0) (= ~t3_i~0 1) (<= 0 (+ ~token~0 2147483648)) (<= 0 |#StackHeapBarrier|) (= |#NULL.base| 0))' at error location [2022-11-16 20:29:12,554 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2022-11-16 20:29:12,554 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 20:29:12,554 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 8, 6] total 21 [2022-11-16 20:29:12,554 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1898977692] [2022-11-16 20:29:12,554 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 20:29:12,555 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2022-11-16 20:29:12,555 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-16 20:29:12,556 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2022-11-16 20:29:12,557 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=431, Invalid=4681, Unknown=0, NotChecked=0, Total=5112 [2022-11-16 20:29:12,557 INFO L87 Difference]: Start difference. First operand 16878 states and 21210 transitions. Second operand has 21 states, 17 states have (on average 9.0) internal successors, (153), 19 states have internal predecessors, (153), 9 states have call successors, (34), 5 states have call predecessors, (34), 8 states have return successors, (34), 9 states have call predecessors, (34), 9 states have call successors, (34) [2022-11-16 20:29:17,659 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 20:29:17,659 INFO L93 Difference]: Finished difference Result 33036 states and 41599 transitions. [2022-11-16 20:29:17,660 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 92 states. [2022-11-16 20:29:17,660 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 17 states have (on average 9.0) internal successors, (153), 19 states have internal predecessors, (153), 9 states have call successors, (34), 5 states have call predecessors, (34), 8 states have return successors, (34), 9 states have call predecessors, (34), 9 states have call successors, (34) Word has length 121 [2022-11-16 20:29:17,660 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 20:29:17,688 INFO L225 Difference]: With dead ends: 33036 [2022-11-16 20:29:17,688 INFO L226 Difference]: Without dead ends: 16117 [2022-11-16 20:29:17,718 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 506 GetRequests, 339 SyntacticMatches, 16 SemanticMatches, 151 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10487 ImplicationChecksByTransitivity, 41.0s TimeCoverageRelationStatistics Valid=1496, Invalid=21760, Unknown=0, NotChecked=0, Total=23256 [2022-11-16 20:29:17,719 INFO L413 NwaCegarLoop]: 236 mSDtfsCounter, 1529 mSDsluCounter, 2523 mSDsCounter, 0 mSdLazyCounter, 2471 mSolverCounterSat, 506 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1540 SdHoareTripleChecker+Valid, 2759 SdHoareTripleChecker+Invalid, 2977 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 506 IncrementalHoareTripleChecker+Valid, 2471 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.7s IncrementalHoareTripleChecker+Time [2022-11-16 20:29:17,719 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1540 Valid, 2759 Invalid, 2977 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [506 Valid, 2471 Invalid, 0 Unknown, 0 Unchecked, 1.7s Time] [2022-11-16 20:29:17,731 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16117 states. [2022-11-16 20:29:18,817 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16117 to 10988. [2022-11-16 20:29:18,825 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10988 states, 9010 states have (on average 1.2194228634850166) internal successors, (10987), 9049 states have internal predecessors, (10987), 1049 states have call successors, (1049), 940 states have call predecessors, (1049), 928 states have return successors, (1205), 998 states have call predecessors, (1205), 1047 states have call successors, (1205) [2022-11-16 20:29:18,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10988 states to 10988 states and 13241 transitions. [2022-11-16 20:29:18,998 INFO L78 Accepts]: Start accepts. Automaton has 10988 states and 13241 transitions. Word has length 121 [2022-11-16 20:29:18,998 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 20:29:18,998 INFO L495 AbstractCegarLoop]: Abstraction has 10988 states and 13241 transitions. [2022-11-16 20:29:18,998 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 17 states have (on average 9.0) internal successors, (153), 19 states have internal predecessors, (153), 9 states have call successors, (34), 5 states have call predecessors, (34), 8 states have return successors, (34), 9 states have call predecessors, (34), 9 states have call successors, (34) [2022-11-16 20:29:18,998 INFO L276 IsEmpty]: Start isEmpty. Operand 10988 states and 13241 transitions. [2022-11-16 20:29:19,006 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2022-11-16 20:29:19,006 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 20:29:19,006 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 20:29:19,018 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2022-11-16 20:29:19,212 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable24 [2022-11-16 20:29:19,212 INFO L420 AbstractCegarLoop]: === Iteration 26 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 20:29:19,213 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 20:29:19,213 INFO L85 PathProgramCache]: Analyzing trace with hash -2077791116, now seen corresponding path program 1 times [2022-11-16 20:29:19,213 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-16 20:29:19,213 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2002534760] [2022-11-16 20:29:19,213 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:29:19,213 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 20:29:19,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:29:19,388 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 41 proven. 17 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2022-11-16 20:29:19,388 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-16 20:29:19,388 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2002534760] [2022-11-16 20:29:19,389 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2002534760] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 20:29:19,389 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1141357319] [2022-11-16 20:29:19,389 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:29:19,389 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 20:29:19,389 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 [2022-11-16 20:29:19,390 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 20:29:19,411 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-11-16 20:29:19,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:29:19,542 INFO L263 TraceCheckSpWp]: Trace formula consists of 606 conjuncts, 22 conjunts are in the unsatisfiable core [2022-11-16 20:29:19,545 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 20:29:19,616 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 77 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 20:29:19,617 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-16 20:29:19,617 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1141357319] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 20:29:19,617 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-16 20:29:19,617 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [5] total 6 [2022-11-16 20:29:19,617 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [942073396] [2022-11-16 20:29:19,618 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 20:29:19,619 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-16 20:29:19,619 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-16 20:29:19,620 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-16 20:29:19,620 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2022-11-16 20:29:19,620 INFO L87 Difference]: Start difference. First operand 10988 states and 13241 transitions. Second operand has 6 states, 6 states have (on average 15.666666666666666) internal successors, (94), 6 states have internal predecessors, (94), 5 states have call successors, (12), 5 states have call predecessors, (12), 5 states have return successors, (11), 5 states have call predecessors, (11), 5 states have call successors, (11) [2022-11-16 20:29:21,165 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 20:29:21,165 INFO L93 Difference]: Finished difference Result 21082 states and 25490 transitions. [2022-11-16 20:29:21,166 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-16 20:29:21,166 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 15.666666666666666) internal successors, (94), 6 states have internal predecessors, (94), 5 states have call successors, (12), 5 states have call predecessors, (12), 5 states have return successors, (11), 5 states have call predecessors, (11), 5 states have call successors, (11) Word has length 117 [2022-11-16 20:29:21,166 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 20:29:21,191 INFO L225 Difference]: With dead ends: 21082 [2022-11-16 20:29:21,191 INFO L226 Difference]: Without dead ends: 13613 [2022-11-16 20:29:21,202 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 133 GetRequests, 124 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=41, Invalid=69, Unknown=0, NotChecked=0, Total=110 [2022-11-16 20:29:21,203 INFO L413 NwaCegarLoop]: 166 mSDtfsCounter, 220 mSDsluCounter, 201 mSDsCounter, 0 mSdLazyCounter, 214 mSolverCounterSat, 59 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 235 SdHoareTripleChecker+Valid, 367 SdHoareTripleChecker+Invalid, 273 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 59 IncrementalHoareTripleChecker+Valid, 214 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-16 20:29:21,203 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [235 Valid, 367 Invalid, 273 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [59 Valid, 214 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-16 20:29:21,212 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13613 states. [2022-11-16 20:29:22,466 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13613 to 12337. [2022-11-16 20:29:22,473 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12337 states, 10060 states have (on average 1.207355864811133) internal successors, (12146), 10124 states have internal predecessors, (12146), 1209 states have call successors, (1209), 1064 states have call predecessors, (1209), 1067 states have return successors, (1481), 1148 states have call predecessors, (1481), 1207 states have call successors, (1481) [2022-11-16 20:29:22,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12337 states to 12337 states and 14836 transitions. [2022-11-16 20:29:22,491 INFO L78 Accepts]: Start accepts. Automaton has 12337 states and 14836 transitions. Word has length 117 [2022-11-16 20:29:22,491 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 20:29:22,491 INFO L495 AbstractCegarLoop]: Abstraction has 12337 states and 14836 transitions. [2022-11-16 20:29:22,491 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 15.666666666666666) internal successors, (94), 6 states have internal predecessors, (94), 5 states have call successors, (12), 5 states have call predecessors, (12), 5 states have return successors, (11), 5 states have call predecessors, (11), 5 states have call successors, (11) [2022-11-16 20:29:22,491 INFO L276 IsEmpty]: Start isEmpty. Operand 12337 states and 14836 transitions. [2022-11-16 20:29:22,496 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2022-11-16 20:29:22,496 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 20:29:22,496 INFO L195 NwaCegarLoop]: trace histogram [5, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 20:29:22,501 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Forceful destruction successful, exit code 0 [2022-11-16 20:29:22,696 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25,18 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 20:29:22,697 INFO L420 AbstractCegarLoop]: === Iteration 27 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 20:29:22,697 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 20:29:22,697 INFO L85 PathProgramCache]: Analyzing trace with hash 1079712645, now seen corresponding path program 1 times [2022-11-16 20:29:22,697 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-16 20:29:22,697 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [854474526] [2022-11-16 20:29:22,697 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:29:22,697 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 20:29:22,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:29:22,922 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 17 proven. 26 refuted. 0 times theorem prover too weak. 39 trivial. 0 not checked. [2022-11-16 20:29:22,922 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-16 20:29:22,922 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [854474526] [2022-11-16 20:29:22,923 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [854474526] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 20:29:22,923 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1470919426] [2022-11-16 20:29:22,923 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:29:22,923 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 20:29:22,923 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 [2022-11-16 20:29:22,934 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 20:29:22,942 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-11-16 20:29:23,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:29:23,101 INFO L263 TraceCheckSpWp]: Trace formula consists of 670 conjuncts, 16 conjunts are in the unsatisfiable core [2022-11-16 20:29:23,103 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 20:29:23,242 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 62 proven. 14 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-11-16 20:29:23,242 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 20:29:23,558 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 17 proven. 3 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2022-11-16 20:29:23,559 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1470919426] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 20:29:23,559 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1788760519] [2022-11-16 20:29:23,562 INFO L159 IcfgInterpreter]: Started Sifa with 72 locations of interest [2022-11-16 20:29:23,562 INFO L166 IcfgInterpreter]: Building call graph [2022-11-16 20:29:23,563 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2022-11-16 20:29:23,563 INFO L176 IcfgInterpreter]: Starting interpretation [2022-11-16 20:29:23,563 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2022-11-16 20:29:36,194 INFO L197 IcfgInterpreter]: Interpreting procedure error2 with input of size 82 for LOIs [2022-11-16 20:29:36,199 INFO L197 IcfgInterpreter]: Interpreting procedure reset_delta_events2 with input of size 140 for LOIs [2022-11-16 20:29:36,240 INFO L197 IcfgInterpreter]: Interpreting procedure exists_runnable_thread2 with input of size 140 for LOIs [2022-11-16 20:29:36,276 INFO L197 IcfgInterpreter]: Interpreting procedure update_channels2 with input of size 225 for LOIs [2022-11-16 20:29:36,355 INFO L197 IcfgInterpreter]: Interpreting procedure immediate_notify with input of size 149 for LOIs [2022-11-16 20:29:36,634 INFO L197 IcfgInterpreter]: Interpreting procedure activate_threads2 with input of size 137 for LOIs [2022-11-16 20:29:37,031 INFO L197 IcfgInterpreter]: Interpreting procedure fire_delta_events2 with input of size 257 for LOIs [2022-11-16 20:29:38,800 INFO L180 IcfgInterpreter]: Interpretation finished [2022-11-16 20:30:12,769 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '623893#(and (= ~p_dw_pc~0 0) (= ~c_dr_st~0 0) (<= ~t1_pc~0 1) (= ~p_num_write~0 0) (<= ~local~0 2147483647) (= ~c_num_read~0 0) (= ~q_buf_0~0 0) (= ~t1_i~0 1) (= ~slow_clk_edge~0 0) (= ~p_last_write~0 0) (<= 0 (+ ~local~0 2147483648)) (= ~c_last_read~0 0) (= 0 ~c_dr_i~0) (= ~q_free~0 0) (= 0 ~t3_pc~0) (= ~q_req_up~0 0) (= ~fast_clk_edge~0 0) (= ~q_ev~0 0) (= ~m_pc~0 1) (= ~p_dw_i~0 0) (= ~m_i~0 1) (= ~t~0 0) (not (= ~token~0 (+ 3 ~local~0))) (= ~p_dw_st~0 0) (= ~t2_i~0 1) (= ~q_write_ev~0 0) (= ~c_dr_pc~0 0) (= 0 ~t2_pc~0) (= ~q_read_ev~0 0) (= ~m_st~0 1) (= |#NULL.offset| 0) (<= ~token~0 2147483647) (= ~a_t~0 0) (= ~t3_i~0 1) (<= 0 (+ ~token~0 2147483648)) (<= 0 |#StackHeapBarrier|) (<= 0 ~t1_pc~0) (= |#NULL.base| 0))' at error location [2022-11-16 20:30:12,770 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2022-11-16 20:30:12,770 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 20:30:12,770 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 9, 6] total 17 [2022-11-16 20:30:12,770 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [860157874] [2022-11-16 20:30:12,770 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 20:30:12,771 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2022-11-16 20:30:12,771 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-16 20:30:12,771 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2022-11-16 20:30:12,773 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=421, Invalid=4549, Unknown=0, NotChecked=0, Total=4970 [2022-11-16 20:30:12,773 INFO L87 Difference]: Start difference. First operand 12337 states and 14836 transitions. Second operand has 17 states, 14 states have (on average 9.642857142857142) internal successors, (135), 15 states have internal predecessors, (135), 7 states have call successors, (31), 4 states have call predecessors, (31), 7 states have return successors, (30), 6 states have call predecessors, (30), 7 states have call successors, (30) [2022-11-16 20:30:19,308 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 20:30:19,308 INFO L93 Difference]: Finished difference Result 22713 states and 27690 transitions. [2022-11-16 20:30:19,308 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 149 states. [2022-11-16 20:30:19,308 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 14 states have (on average 9.642857142857142) internal successors, (135), 15 states have internal predecessors, (135), 7 states have call successors, (31), 4 states have call predecessors, (31), 7 states have return successors, (30), 6 states have call predecessors, (30), 7 states have call successors, (30) Word has length 124 [2022-11-16 20:30:19,309 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 20:30:19,326 INFO L225 Difference]: With dead ends: 22713 [2022-11-16 20:30:19,326 INFO L226 Difference]: Without dead ends: 11626 [2022-11-16 20:30:19,342 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 594 GetRequests, 372 SyntacticMatches, 17 SemanticMatches, 205 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19345 ImplicationChecksByTransitivity, 36.8s TimeCoverageRelationStatistics Valid=2695, Invalid=39947, Unknown=0, NotChecked=0, Total=42642 [2022-11-16 20:30:19,343 INFO L413 NwaCegarLoop]: 465 mSDtfsCounter, 2125 mSDsluCounter, 2897 mSDsCounter, 0 mSdLazyCounter, 2414 mSolverCounterSat, 727 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2135 SdHoareTripleChecker+Valid, 3362 SdHoareTripleChecker+Invalid, 3141 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 727 IncrementalHoareTripleChecker+Valid, 2414 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.9s IncrementalHoareTripleChecker+Time [2022-11-16 20:30:19,343 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [2135 Valid, 3362 Invalid, 3141 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [727 Valid, 2414 Invalid, 0 Unknown, 0 Unchecked, 1.9s Time] [2022-11-16 20:30:19,351 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11626 states. [2022-11-16 20:30:20,190 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11626 to 8622. [2022-11-16 20:30:20,196 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8622 states, 7107 states have (on average 1.2082453918671732) internal successors, (8587), 7141 states have internal predecessors, (8587), 782 states have call successors, (782), 733 states have call predecessors, (782), 732 states have return successors, (968), 747 states have call predecessors, (968), 780 states have call successors, (968) [2022-11-16 20:30:20,207 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8622 states to 8622 states and 10337 transitions. [2022-11-16 20:30:20,208 INFO L78 Accepts]: Start accepts. Automaton has 8622 states and 10337 transitions. Word has length 124 [2022-11-16 20:30:20,208 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 20:30:20,208 INFO L495 AbstractCegarLoop]: Abstraction has 8622 states and 10337 transitions. [2022-11-16 20:30:20,209 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 14 states have (on average 9.642857142857142) internal successors, (135), 15 states have internal predecessors, (135), 7 states have call successors, (31), 4 states have call predecessors, (31), 7 states have return successors, (30), 6 states have call predecessors, (30), 7 states have call successors, (30) [2022-11-16 20:30:20,209 INFO L276 IsEmpty]: Start isEmpty. Operand 8622 states and 10337 transitions. [2022-11-16 20:30:20,214 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2022-11-16 20:30:20,214 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 20:30:20,214 INFO L195 NwaCegarLoop]: trace histogram [5, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 20:30:20,224 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Forceful destruction successful, exit code 0 [2022-11-16 20:30:20,420 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 19 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable26 [2022-11-16 20:30:20,420 INFO L420 AbstractCegarLoop]: === Iteration 28 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 20:30:20,420 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 20:30:20,420 INFO L85 PathProgramCache]: Analyzing trace with hash -2127622252, now seen corresponding path program 1 times [2022-11-16 20:30:20,420 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-16 20:30:20,421 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [457946087] [2022-11-16 20:30:20,421 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:30:20,421 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 20:30:20,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:30:20,691 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 17 proven. 25 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2022-11-16 20:30:20,691 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-16 20:30:20,691 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [457946087] [2022-11-16 20:30:20,691 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [457946087] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 20:30:20,692 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [546973458] [2022-11-16 20:30:20,692 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:30:20,692 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 20:30:20,692 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 [2022-11-16 20:30:20,693 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 20:30:20,712 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2022-11-16 20:30:20,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:30:20,869 INFO L263 TraceCheckSpWp]: Trace formula consists of 680 conjuncts, 17 conjunts are in the unsatisfiable core [2022-11-16 20:30:20,872 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 20:30:21,072 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 60 proven. 14 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-11-16 20:30:21,073 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 20:30:21,392 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 17 proven. 3 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-11-16 20:30:21,392 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [546973458] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 20:30:21,392 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [728574840] [2022-11-16 20:30:21,395 INFO L159 IcfgInterpreter]: Started Sifa with 75 locations of interest [2022-11-16 20:30:21,395 INFO L166 IcfgInterpreter]: Building call graph [2022-11-16 20:30:21,396 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2022-11-16 20:30:21,396 INFO L176 IcfgInterpreter]: Starting interpretation [2022-11-16 20:30:21,396 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2022-11-16 20:30:32,558 INFO L197 IcfgInterpreter]: Interpreting procedure error2 with input of size 83 for LOIs [2022-11-16 20:30:32,563 INFO L197 IcfgInterpreter]: Interpreting procedure reset_delta_events2 with input of size 218 for LOIs [2022-11-16 20:30:57,966 INFO L197 IcfgInterpreter]: Interpreting procedure exists_runnable_thread2 with input of size 78 for LOIs [2022-11-16 20:30:57,977 INFO L197 IcfgInterpreter]: Interpreting procedure update_channels2 with input of size 226 for LOIs [2022-11-16 20:30:58,056 INFO L197 IcfgInterpreter]: Interpreting procedure immediate_notify with input of size 149 for LOIs [2022-11-16 20:30:58,479 INFO L197 IcfgInterpreter]: Interpreting procedure activate_threads2 with input of size 78 for LOIs [2022-11-16 20:30:59,010 INFO L197 IcfgInterpreter]: Interpreting procedure fire_delta_events2 with input of size 258 for LOIs [2022-11-16 20:31:34,323 INFO L180 IcfgInterpreter]: Interpretation finished [2022-11-16 20:32:35,258 WARN L233 SmtUtils]: Spent 58.01s on a formula simplification. DAG size of input: 870 DAG size of output: 715 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 20:32:52,085 WARN L233 SmtUtils]: Spent 9.92s on a formula simplification. DAG size of input: 590 DAG size of output: 394 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 20:33:18,765 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '667587#(and (= ~p_dw_pc~0 0) (= ~c_dr_st~0 0) (<= ~t1_pc~0 1) (= ~p_num_write~0 0) (<= ~local~0 2147483647) (= ~c_num_read~0 0) (= ~q_buf_0~0 0) (= ~t1_i~0 1) (= ~slow_clk_edge~0 0) (= ~p_last_write~0 0) (<= 0 (+ ~local~0 2147483648)) (<= 0 ~t2_pc~0) (= ~c_last_read~0 0) (= 0 ~c_dr_i~0) (= ~q_free~0 0) (= 0 ~t3_pc~0) (= ~q_req_up~0 0) (= ~fast_clk_edge~0 0) (= ~q_ev~0 0) (= ~m_pc~0 1) (<= ~t2_pc~0 1) (= ~p_dw_i~0 0) (= ~m_i~0 1) (= ~t~0 0) (not (= ~token~0 (+ 3 ~local~0))) (= ~p_dw_st~0 0) (= ~t2_i~0 1) (= ~q_write_ev~0 0) (= ~c_dr_pc~0 0) (= ~q_read_ev~0 0) (= ~m_st~0 1) (= |#NULL.offset| 0) (<= ~token~0 2147483647) (= ~a_t~0 0) (= ~t3_i~0 1) (<= 0 (+ ~token~0 2147483648)) (<= 0 |#StackHeapBarrier|) (<= 0 ~t1_pc~0) (= |#NULL.base| 0))' at error location [2022-11-16 20:33:18,765 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2022-11-16 20:33:18,765 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 20:33:18,765 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 10, 6] total 18 [2022-11-16 20:33:18,765 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [438391839] [2022-11-16 20:33:18,765 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 20:33:18,766 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-11-16 20:33:18,766 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-16 20:33:18,767 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-11-16 20:33:18,767 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=462, Invalid=5088, Unknown=0, NotChecked=0, Total=5550 [2022-11-16 20:33:18,767 INFO L87 Difference]: Start difference. First operand 8622 states and 10337 transitions. Second operand has 18 states, 15 states have (on average 9.266666666666667) internal successors, (139), 16 states have internal predecessors, (139), 7 states have call successors, (31), 4 states have call predecessors, (31), 7 states have return successors, (30), 6 states have call predecessors, (30), 7 states have call successors, (30) [2022-11-16 20:33:25,163 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 20:33:25,164 INFO L93 Difference]: Finished difference Result 15552 states and 18760 transitions. [2022-11-16 20:33:25,167 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 166 states. [2022-11-16 20:33:25,167 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 15 states have (on average 9.266666666666667) internal successors, (139), 16 states have internal predecessors, (139), 7 states have call successors, (31), 4 states have call predecessors, (31), 7 states have return successors, (30), 6 states have call predecessors, (30), 7 states have call successors, (30) Word has length 126 [2022-11-16 20:33:25,168 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 20:33:25,181 INFO L225 Difference]: With dead ends: 15552 [2022-11-16 20:33:25,181 INFO L226 Difference]: Without dead ends: 8721 [2022-11-16 20:33:25,197 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 619 GetRequests, 388 SyntacticMatches, 6 SemanticMatches, 225 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22743 ImplicationChecksByTransitivity, 107.7s TimeCoverageRelationStatistics Valid=3039, Invalid=48263, Unknown=0, NotChecked=0, Total=51302 [2022-11-16 20:33:25,198 INFO L413 NwaCegarLoop]: 376 mSDtfsCounter, 1661 mSDsluCounter, 3198 mSDsCounter, 0 mSdLazyCounter, 2563 mSolverCounterSat, 520 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1672 SdHoareTripleChecker+Valid, 3574 SdHoareTripleChecker+Invalid, 3083 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 520 IncrementalHoareTripleChecker+Valid, 2563 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.7s IncrementalHoareTripleChecker+Time [2022-11-16 20:33:25,198 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1672 Valid, 3574 Invalid, 3083 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [520 Valid, 2563 Invalid, 0 Unknown, 0 Unchecked, 1.7s Time] [2022-11-16 20:33:25,203 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8721 states. [2022-11-16 20:33:25,886 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8721 to 6939. [2022-11-16 20:33:25,891 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6939 states, 5724 states have (on average 1.1937456324248776) internal successors, (6833), 5754 states have internal predecessors, (6833), 619 states have call successors, (619), 594 states have call predecessors, (619), 595 states have return successors, (781), 590 states have call predecessors, (781), 617 states have call successors, (781) [2022-11-16 20:33:25,899 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6939 states to 6939 states and 8233 transitions. [2022-11-16 20:33:25,900 INFO L78 Accepts]: Start accepts. Automaton has 6939 states and 8233 transitions. Word has length 126 [2022-11-16 20:33:25,900 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 20:33:25,900 INFO L495 AbstractCegarLoop]: Abstraction has 6939 states and 8233 transitions. [2022-11-16 20:33:25,901 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 15 states have (on average 9.266666666666667) internal successors, (139), 16 states have internal predecessors, (139), 7 states have call successors, (31), 4 states have call predecessors, (31), 7 states have return successors, (30), 6 states have call predecessors, (30), 7 states have call successors, (30) [2022-11-16 20:33:25,901 INFO L276 IsEmpty]: Start isEmpty. Operand 6939 states and 8233 transitions. [2022-11-16 20:33:25,903 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2022-11-16 20:33:25,903 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 20:33:25,904 INFO L195 NwaCegarLoop]: trace histogram [5, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 20:33:25,908 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Forceful destruction successful, exit code 0 [2022-11-16 20:33:26,104 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 20 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable27 [2022-11-16 20:33:26,104 INFO L420 AbstractCegarLoop]: === Iteration 29 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 20:33:26,104 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 20:33:26,105 INFO L85 PathProgramCache]: Analyzing trace with hash 2099089131, now seen corresponding path program 1 times [2022-11-16 20:33:26,105 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-16 20:33:26,105 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1999638831] [2022-11-16 20:33:26,105 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:33:26,105 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 20:33:26,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:33:26,791 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 23 proven. 31 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-11-16 20:33:26,791 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-16 20:33:26,791 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1999638831] [2022-11-16 20:33:26,791 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1999638831] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 20:33:26,792 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1486832661] [2022-11-16 20:33:26,792 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:33:26,792 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 20:33:26,792 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 [2022-11-16 20:33:26,793 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 20:33:26,801 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2022-11-16 20:33:26,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:33:26,957 INFO L263 TraceCheckSpWp]: Trace formula consists of 690 conjuncts, 32 conjunts are in the unsatisfiable core [2022-11-16 20:33:26,960 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 20:33:27,356 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 56 proven. 2 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2022-11-16 20:33:27,356 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-16 20:33:28,107 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 27 proven. 7 refuted. 0 times theorem prover too weak. 44 trivial. 0 not checked. [2022-11-16 20:33:28,107 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1486832661] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-16 20:33:28,107 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1716179415] [2022-11-16 20:33:28,110 INFO L159 IcfgInterpreter]: Started Sifa with 78 locations of interest [2022-11-16 20:33:28,110 INFO L166 IcfgInterpreter]: Building call graph [2022-11-16 20:33:28,110 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2022-11-16 20:33:28,111 INFO L176 IcfgInterpreter]: Starting interpretation [2022-11-16 20:33:28,111 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2022-11-16 20:33:49,463 INFO L197 IcfgInterpreter]: Interpreting procedure error2 with input of size 84 for LOIs [2022-11-16 20:33:49,472 INFO L197 IcfgInterpreter]: Interpreting procedure reset_delta_events2 with input of size 219 for LOIs [2022-11-16 20:34:37,182 INFO L197 IcfgInterpreter]: Interpreting procedure exists_runnable_thread2 with input of size 79 for LOIs [2022-11-16 20:34:37,192 INFO L197 IcfgInterpreter]: Interpreting procedure update_channels2 with input of size 227 for LOIs [2022-11-16 20:34:37,274 INFO L197 IcfgInterpreter]: Interpreting procedure immediate_notify with input of size 149 for LOIs [2022-11-16 20:34:37,689 INFO L197 IcfgInterpreter]: Interpreting procedure activate_threads2 with input of size 135 for LOIs [2022-11-16 20:34:38,245 INFO L197 IcfgInterpreter]: Interpreting procedure fire_delta_events2 with input of size 259 for LOIs [2022-11-16 20:34:46,736 INFO L180 IcfgInterpreter]: Interpretation finished [2022-11-16 20:35:07,052 WARN L233 SmtUtils]: Spent 17.29s on a formula simplification. DAG size of input: 360 DAG size of output: 308 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 20:35:34,073 WARN L233 SmtUtils]: Spent 17.19s on a formula simplification. DAG size of input: 827 DAG size of output: 550 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-16 20:36:02,913 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '699059#(and (= ~p_dw_pc~0 0) (= ~c_dr_st~0 0) (<= ~t1_pc~0 1) (= ~p_num_write~0 0) (<= ~local~0 2147483647) (= ~c_num_read~0 0) (= ~q_buf_0~0 0) (= ~t1_i~0 1) (= ~slow_clk_edge~0 0) (= ~p_last_write~0 0) (<= 0 (+ ~local~0 2147483648)) (<= 0 ~t2_pc~0) (= ~c_last_read~0 0) (= 0 ~c_dr_i~0) (= ~q_free~0 0) (= ~q_req_up~0 0) (= ~fast_clk_edge~0 0) (= ~q_ev~0 0) (= ~m_pc~0 1) (<= ~t2_pc~0 1) (= ~p_dw_i~0 0) (= ~m_i~0 1) (= ~t~0 0) (not (= ~token~0 (+ 3 ~local~0))) (<= ~t3_pc~0 1) (= ~p_dw_st~0 0) (= ~t2_i~0 1) (= ~q_write_ev~0 0) (= ~c_dr_pc~0 0) (= ~q_read_ev~0 0) (= ~m_st~0 1) (= |#NULL.offset| 0) (<= ~token~0 2147483647) (= ~a_t~0 0) (<= 0 ~t3_pc~0) (= ~t3_i~0 1) (<= 0 (+ ~token~0 2147483648)) (<= 0 |#StackHeapBarrier|) (<= 0 ~t1_pc~0) (= |#NULL.base| 0))' at error location [2022-11-16 20:36:02,913 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2022-11-16 20:36:02,913 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-16 20:36:02,913 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 9, 12] total 36 [2022-11-16 20:36:02,913 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [687465041] [2022-11-16 20:36:02,913 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-16 20:36:02,914 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 36 states [2022-11-16 20:36:02,914 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-16 20:36:02,915 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2022-11-16 20:36:02,916 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=659, Invalid=8461, Unknown=0, NotChecked=0, Total=9120 [2022-11-16 20:36:02,916 INFO L87 Difference]: Start difference. First operand 6939 states and 8233 transitions. Second operand has 36 states, 24 states have (on average 8.416666666666666) internal successors, (202), 27 states have internal predecessors, (202), 14 states have call successors, (41), 11 states have call predecessors, (41), 18 states have return successors, (40), 14 states have call predecessors, (40), 14 states have call successors, (40) [2022-11-16 20:36:11,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 20:36:11,709 INFO L93 Difference]: Finished difference Result 17024 states and 20541 transitions. [2022-11-16 20:36:11,709 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 65 states. [2022-11-16 20:36:11,710 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 24 states have (on average 8.416666666666666) internal successors, (202), 27 states have internal predecessors, (202), 14 states have call successors, (41), 11 states have call predecessors, (41), 18 states have return successors, (40), 14 states have call predecessors, (40), 14 states have call successors, (40) Word has length 128 [2022-11-16 20:36:11,710 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 20:36:11,734 INFO L225 Difference]: With dead ends: 17024 [2022-11-16 20:36:11,734 INFO L226 Difference]: Without dead ends: 10966 [2022-11-16 20:36:11,746 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 486 GetRequests, 316 SyntacticMatches, 13 SemanticMatches, 157 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10021 ImplicationChecksByTransitivity, 79.9s TimeCoverageRelationStatistics Valid=2431, Invalid=22691, Unknown=0, NotChecked=0, Total=25122 [2022-11-16 20:36:11,747 INFO L413 NwaCegarLoop]: 94 mSDtfsCounter, 5406 mSDsluCounter, 1144 mSDsCounter, 0 mSdLazyCounter, 4520 mSolverCounterSat, 2308 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5406 SdHoareTripleChecker+Valid, 1238 SdHoareTripleChecker+Invalid, 6828 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2308 IncrementalHoareTripleChecker+Valid, 4520 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.5s IncrementalHoareTripleChecker+Time [2022-11-16 20:36:11,748 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [5406 Valid, 1238 Invalid, 6828 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2308 Valid, 4520 Invalid, 0 Unknown, 0 Unchecked, 3.5s Time] [2022-11-16 20:36:11,757 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10966 states. [2022-11-16 20:36:12,808 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10966 to 6285. [2022-11-16 20:36:12,812 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6285 states, 5184 states have (on average 1.1919367283950617) internal successors, (6179), 5208 states have internal predecessors, (6179), 570 states have call successors, (570), 543 states have call predecessors, (570), 530 states have return successors, (632), 533 states have call predecessors, (632), 568 states have call successors, (632) [2022-11-16 20:36:12,820 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6285 states to 6285 states and 7381 transitions. [2022-11-16 20:36:12,821 INFO L78 Accepts]: Start accepts. Automaton has 6285 states and 7381 transitions. Word has length 128 [2022-11-16 20:36:12,821 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 20:36:12,821 INFO L495 AbstractCegarLoop]: Abstraction has 6285 states and 7381 transitions. [2022-11-16 20:36:12,822 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 36 states, 24 states have (on average 8.416666666666666) internal successors, (202), 27 states have internal predecessors, (202), 14 states have call successors, (41), 11 states have call predecessors, (41), 18 states have return successors, (40), 14 states have call predecessors, (40), 14 states have call successors, (40) [2022-11-16 20:36:12,822 INFO L276 IsEmpty]: Start isEmpty. Operand 6285 states and 7381 transitions. [2022-11-16 20:36:12,824 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 143 [2022-11-16 20:36:12,824 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 20:36:12,824 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 20:36:12,829 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Forceful destruction successful, exit code 0 [2022-11-16 20:36:13,024 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 21 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2022-11-16 20:36:13,025 INFO L420 AbstractCegarLoop]: === Iteration 30 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 20:36:13,025 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 20:36:13,025 INFO L85 PathProgramCache]: Analyzing trace with hash -319885820, now seen corresponding path program 1 times [2022-11-16 20:36:13,025 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-16 20:36:13,025 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [896482716] [2022-11-16 20:36:13,025 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:36:13,025 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 20:36:13,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:36:13,185 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 31 proven. 19 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2022-11-16 20:36:13,185 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-16 20:36:13,185 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [896482716] [2022-11-16 20:36:13,185 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [896482716] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 20:36:13,185 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1510179800] [2022-11-16 20:36:13,186 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:36:13,186 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 20:36:13,186 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 [2022-11-16 20:36:13,187 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 20:36:13,216 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2022-11-16 20:36:13,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:36:13,359 INFO L263 TraceCheckSpWp]: Trace formula consists of 719 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-16 20:36:13,362 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 20:36:13,410 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-11-16 20:36:13,410 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-16 20:36:13,410 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1510179800] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 20:36:13,410 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-16 20:36:13,410 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [6] total 6 [2022-11-16 20:36:13,410 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1975543170] [2022-11-16 20:36:13,410 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 20:36:13,411 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-16 20:36:13,411 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-16 20:36:13,411 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-16 20:36:13,412 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-11-16 20:36:13,412 INFO L87 Difference]: Start difference. First operand 6285 states and 7381 transitions. Second operand has 3 states, 3 states have (on average 30.666666666666668) internal successors, (92), 3 states have internal predecessors, (92), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) [2022-11-16 20:36:14,298 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 20:36:14,298 INFO L93 Difference]: Finished difference Result 12338 states and 14720 transitions. [2022-11-16 20:36:14,299 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-16 20:36:14,299 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 30.666666666666668) internal successors, (92), 3 states have internal predecessors, (92), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) Word has length 142 [2022-11-16 20:36:14,299 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 20:36:14,311 INFO L225 Difference]: With dead ends: 12338 [2022-11-16 20:36:14,311 INFO L226 Difference]: Without dead ends: 6641 [2022-11-16 20:36:14,319 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 148 GetRequests, 144 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-11-16 20:36:14,320 INFO L413 NwaCegarLoop]: 127 mSDtfsCounter, 86 mSDsluCounter, 29 mSDsCounter, 0 mSdLazyCounter, 35 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 86 SdHoareTripleChecker+Valid, 156 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 35 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-16 20:36:14,320 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [86 Valid, 156 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 35 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-16 20:36:14,325 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6641 states. [2022-11-16 20:36:15,186 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6641 to 6417. [2022-11-16 20:36:15,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6417 states, 5308 states have (on average 1.1723813112283346) internal successors, (6223), 5332 states have internal predecessors, (6223), 570 states have call successors, (570), 551 states have call predecessors, (570), 538 states have return successors, (646), 533 states have call predecessors, (646), 568 states have call successors, (646) [2022-11-16 20:36:15,196 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6417 states to 6417 states and 7439 transitions. [2022-11-16 20:36:15,197 INFO L78 Accepts]: Start accepts. Automaton has 6417 states and 7439 transitions. Word has length 142 [2022-11-16 20:36:15,197 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 20:36:15,197 INFO L495 AbstractCegarLoop]: Abstraction has 6417 states and 7439 transitions. [2022-11-16 20:36:15,198 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 30.666666666666668) internal successors, (92), 3 states have internal predecessors, (92), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) [2022-11-16 20:36:15,198 INFO L276 IsEmpty]: Start isEmpty. Operand 6417 states and 7439 transitions. [2022-11-16 20:36:15,200 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2022-11-16 20:36:15,200 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 20:36:15,200 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 20:36:15,205 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Forceful destruction successful, exit code 0 [2022-11-16 20:36:15,400 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29,22 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 20:36:15,401 INFO L420 AbstractCegarLoop]: === Iteration 31 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 20:36:15,401 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 20:36:15,401 INFO L85 PathProgramCache]: Analyzing trace with hash 2008279782, now seen corresponding path program 1 times [2022-11-16 20:36:15,401 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-16 20:36:15,401 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1196303924] [2022-11-16 20:36:15,401 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:36:15,402 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 20:36:15,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:36:15,611 INFO L134 CoverageAnalysis]: Checked inductivity of 129 backedges. 43 proven. 36 refuted. 0 times theorem prover too weak. 50 trivial. 0 not checked. [2022-11-16 20:36:15,611 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-16 20:36:15,611 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1196303924] [2022-11-16 20:36:15,612 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1196303924] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-16 20:36:15,612 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [498277043] [2022-11-16 20:36:15,612 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:36:15,612 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 20:36:15,612 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 [2022-11-16 20:36:15,613 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-16 20:36:15,639 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2022-11-16 20:36:15,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:36:15,792 INFO L263 TraceCheckSpWp]: Trace formula consists of 716 conjuncts, 22 conjunts are in the unsatisfiable core [2022-11-16 20:36:15,795 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-16 20:36:15,880 INFO L134 CoverageAnalysis]: Checked inductivity of 129 backedges. 111 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2022-11-16 20:36:15,880 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-16 20:36:15,881 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [498277043] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 20:36:15,881 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-16 20:36:15,881 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [5] total 6 [2022-11-16 20:36:15,881 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1188479275] [2022-11-16 20:36:15,882 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 20:36:15,882 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-16 20:36:15,882 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-16 20:36:15,883 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-16 20:36:15,883 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2022-11-16 20:36:15,883 INFO L87 Difference]: Start difference. First operand 6417 states and 7439 transitions. Second operand has 6 states, 6 states have (on average 17.5) internal successors, (105), 6 states have internal predecessors, (105), 5 states have call successors, (13), 5 states have call predecessors, (13), 5 states have return successors, (12), 5 states have call predecessors, (12), 5 states have call successors, (12) [2022-11-16 20:36:17,319 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 20:36:17,319 INFO L93 Difference]: Finished difference Result 13343 states and 15573 transitions. [2022-11-16 20:36:17,319 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-16 20:36:17,319 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 17.5) internal successors, (105), 6 states have internal predecessors, (105), 5 states have call successors, (13), 5 states have call predecessors, (13), 5 states have return successors, (12), 5 states have call predecessors, (12), 5 states have call successors, (12) Word has length 145 [2022-11-16 20:36:17,320 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 20:36:17,337 INFO L225 Difference]: With dead ends: 13343 [2022-11-16 20:36:17,337 INFO L226 Difference]: Without dead ends: 7563 [2022-11-16 20:36:17,347 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 163 GetRequests, 154 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=41, Invalid=69, Unknown=0, NotChecked=0, Total=110 [2022-11-16 20:36:17,348 INFO L413 NwaCegarLoop]: 156 mSDtfsCounter, 237 mSDsluCounter, 190 mSDsCounter, 0 mSdLazyCounter, 207 mSolverCounterSat, 67 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 252 SdHoareTripleChecker+Valid, 346 SdHoareTripleChecker+Invalid, 274 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 67 IncrementalHoareTripleChecker+Valid, 207 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-16 20:36:17,348 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [252 Valid, 346 Invalid, 274 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [67 Valid, 207 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-16 20:36:17,355 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7563 states. [2022-11-16 20:36:18,274 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7563 to 6997. [2022-11-16 20:36:18,279 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6997 states, 5730 states have (on average 1.1582897033158814) internal successors, (6637), 5758 states have internal predecessors, (6637), 653 states have call successors, (653), 616 states have call predecessors, (653), 613 states have return successors, (807), 622 states have call predecessors, (807), 651 states have call successors, (807) [2022-11-16 20:36:18,290 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6997 states to 6997 states and 8097 transitions. [2022-11-16 20:36:18,290 INFO L78 Accepts]: Start accepts. Automaton has 6997 states and 8097 transitions. Word has length 145 [2022-11-16 20:36:18,291 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 20:36:18,291 INFO L495 AbstractCegarLoop]: Abstraction has 6997 states and 8097 transitions. [2022-11-16 20:36:18,291 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 17.5) internal successors, (105), 6 states have internal predecessors, (105), 5 states have call successors, (13), 5 states have call predecessors, (13), 5 states have return successors, (12), 5 states have call predecessors, (12), 5 states have call successors, (12) [2022-11-16 20:36:18,291 INFO L276 IsEmpty]: Start isEmpty. Operand 6997 states and 8097 transitions. [2022-11-16 20:36:18,294 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 175 [2022-11-16 20:36:18,294 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 20:36:18,294 INFO L195 NwaCegarLoop]: trace histogram [5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 20:36:18,299 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Forceful destruction successful, exit code 0 [2022-11-16 20:36:18,495 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30,23 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-16 20:36:18,495 INFO L420 AbstractCegarLoop]: === Iteration 32 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 20:36:18,495 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 20:36:18,495 INFO L85 PathProgramCache]: Analyzing trace with hash 1626811436, now seen corresponding path program 1 times [2022-11-16 20:36:18,495 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-16 20:36:18,496 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1411574852] [2022-11-16 20:36:18,496 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:36:18,496 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 20:36:18,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 20:36:18,820 INFO L134 CoverageAnalysis]: Checked inductivity of 200 backedges. 25 proven. 0 refuted. 0 times theorem prover too weak. 175 trivial. 0 not checked. [2022-11-16 20:36:18,820 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-16 20:36:18,820 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1411574852] [2022-11-16 20:36:18,820 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1411574852] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-16 20:36:18,820 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-16 20:36:18,821 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-11-16 20:36:18,821 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [666303083] [2022-11-16 20:36:18,821 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-16 20:36:18,821 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-16 20:36:18,821 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-16 20:36:18,822 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-16 20:36:18,822 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-11-16 20:36:18,822 INFO L87 Difference]: Start difference. First operand 6997 states and 8097 transitions. Second operand has 6 states, 6 states have (on average 13.833333333333334) internal successors, (83), 6 states have internal predecessors, (83), 6 states have call successors, (12), 2 states have call predecessors, (12), 1 states have return successors, (11), 5 states have call predecessors, (11), 5 states have call successors, (11) [2022-11-16 20:36:22,093 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-16 20:36:22,093 INFO L93 Difference]: Finished difference Result 23092 states and 26812 transitions. [2022-11-16 20:36:22,094 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-16 20:36:22,094 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 13.833333333333334) internal successors, (83), 6 states have internal predecessors, (83), 6 states have call successors, (12), 2 states have call predecessors, (12), 1 states have return successors, (11), 5 states have call predecessors, (11), 5 states have call successors, (11) Word has length 174 [2022-11-16 20:36:22,094 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-16 20:36:22,125 INFO L225 Difference]: With dead ends: 23092 [2022-11-16 20:36:22,126 INFO L226 Difference]: Without dead ends: 18454 [2022-11-16 20:36:22,133 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-11-16 20:36:22,135 INFO L413 NwaCegarLoop]: 359 mSDtfsCounter, 377 mSDsluCounter, 789 mSDsCounter, 0 mSdLazyCounter, 628 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 377 SdHoareTripleChecker+Valid, 1148 SdHoareTripleChecker+Invalid, 638 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 628 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-11-16 20:36:22,135 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [377 Valid, 1148 Invalid, 638 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 628 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-11-16 20:36:22,148 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18454 states. [2022-11-16 20:36:23,849 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18454 to 12057. [2022-11-16 20:36:23,858 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12057 states, 9816 states have (on average 1.1582110839445803) internal successors, (11369), 9856 states have internal predecessors, (11369), 1159 states have call successors, (1159), 1068 states have call predecessors, (1159), 1081 states have return successors, (1435), 1132 states have call predecessors, (1435), 1157 states have call successors, (1435) [2022-11-16 20:36:23,877 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12057 states to 12057 states and 13963 transitions. [2022-11-16 20:36:23,878 INFO L78 Accepts]: Start accepts. Automaton has 12057 states and 13963 transitions. Word has length 174 [2022-11-16 20:36:23,879 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-16 20:36:23,879 INFO L495 AbstractCegarLoop]: Abstraction has 12057 states and 13963 transitions. [2022-11-16 20:36:23,879 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 13.833333333333334) internal successors, (83), 6 states have internal predecessors, (83), 6 states have call successors, (12), 2 states have call predecessors, (12), 1 states have return successors, (11), 5 states have call predecessors, (11), 5 states have call successors, (11) [2022-11-16 20:36:23,879 INFO L276 IsEmpty]: Start isEmpty. Operand 12057 states and 13963 transitions. [2022-11-16 20:36:23,884 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 178 [2022-11-16 20:36:23,884 INFO L187 NwaCegarLoop]: Found error trace [2022-11-16 20:36:23,884 INFO L195 NwaCegarLoop]: trace histogram [5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 20:36:23,884 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2022-11-16 20:36:23,884 INFO L420 AbstractCegarLoop]: === Iteration 33 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-16 20:36:23,884 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 20:36:23,885 INFO L85 PathProgramCache]: Analyzing trace with hash -2086782288, now seen corresponding path program 1 times [2022-11-16 20:36:23,885 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-16 20:36:23,885 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [456782609] [2022-11-16 20:36:23,885 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-16 20:36:23,885 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 20:36:23,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 20:36:23,914 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 20:36:23,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 20:36:24,048 INFO L130 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2022-11-16 20:36:24,049 INFO L359 BasicCegarLoop]: Counterexample is feasible [2022-11-16 20:36:24,050 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location error2Err0ASSERT_VIOLATIONERROR_FUNCTION (1 of 2 remaining) [2022-11-16 20:36:24,052 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location error1Err0ASSERT_VIOLATIONERROR_FUNCTION (0 of 2 remaining) [2022-11-16 20:36:24,052 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2022-11-16 20:36:24,056 INFO L444 BasicCegarLoop]: Path program histogram: [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-16 20:36:24,060 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-16 20:36:24,267 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 16.11 08:36:24 BoogieIcfgContainer [2022-11-16 20:36:24,267 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-16 20:36:24,268 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-16 20:36:24,268 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-16 20:36:24,269 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-16 20:36:24,269 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 08:27:14" (3/4) ... [2022-11-16 20:36:24,271 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2022-11-16 20:36:24,576 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/witness.graphml [2022-11-16 20:36:24,576 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-16 20:36:24,579 INFO L158 Benchmark]: Toolchain (without parser) took 551448.86ms. Allocated memory was 132.1MB in the beginning and 3.9GB in the end (delta: 3.8GB). Free memory was 95.1MB in the beginning and 3.8GB in the end (delta: -3.7GB). Peak memory consumption was 2.4GB. Max. memory is 16.1GB. [2022-11-16 20:36:24,581 INFO L158 Benchmark]: CDTParser took 0.24ms. Allocated memory is still 132.1MB. Free memory was 112.4MB in the beginning and 112.3MB in the end (delta: 116.8kB). There was no memory consumed. Max. memory is 16.1GB. [2022-11-16 20:36:24,581 INFO L158 Benchmark]: CACSL2BoogieTranslator took 478.44ms. Allocated memory is still 132.1MB. Free memory was 94.9MB in the beginning and 99.0MB in the end (delta: -4.2MB). Peak memory consumption was 12.6MB. Max. memory is 16.1GB. [2022-11-16 20:36:24,582 INFO L158 Benchmark]: Boogie Procedure Inliner took 57.78ms. Allocated memory is still 132.1MB. Free memory was 99.0MB in the beginning and 95.8MB in the end (delta: 3.3MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. [2022-11-16 20:36:24,582 INFO L158 Benchmark]: Boogie Preprocessor took 75.35ms. Allocated memory is still 132.1MB. Free memory was 95.8MB in the beginning and 92.8MB in the end (delta: 2.9MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-11-16 20:36:24,588 INFO L158 Benchmark]: RCFGBuilder took 1184.88ms. Allocated memory is still 132.1MB. Free memory was 92.8MB in the beginning and 66.0MB in the end (delta: 26.9MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. [2022-11-16 20:36:24,589 INFO L158 Benchmark]: TraceAbstraction took 549334.86ms. Allocated memory was 132.1MB in the beginning and 3.9GB in the end (delta: 3.8GB). Free memory was 65.3MB in the beginning and 1.5GB in the end (delta: -1.4GB). Peak memory consumption was 2.4GB. Max. memory is 16.1GB. [2022-11-16 20:36:24,591 INFO L158 Benchmark]: Witness Printer took 308.63ms. Allocated memory is still 3.9GB. Free memory was 1.5GB in the beginning and 3.8GB in the end (delta: -2.3GB). Peak memory consumption was 27.3MB. Max. memory is 16.1GB. [2022-11-16 20:36:24,592 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.24ms. Allocated memory is still 132.1MB. Free memory was 112.4MB in the beginning and 112.3MB in the end (delta: 116.8kB). There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 478.44ms. Allocated memory is still 132.1MB. Free memory was 94.9MB in the beginning and 99.0MB in the end (delta: -4.2MB). Peak memory consumption was 12.6MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 57.78ms. Allocated memory is still 132.1MB. Free memory was 99.0MB in the beginning and 95.8MB in the end (delta: 3.3MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. * Boogie Preprocessor took 75.35ms. Allocated memory is still 132.1MB. Free memory was 95.8MB in the beginning and 92.8MB in the end (delta: 2.9MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * RCFGBuilder took 1184.88ms. Allocated memory is still 132.1MB. Free memory was 92.8MB in the beginning and 66.0MB in the end (delta: 26.9MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. * TraceAbstraction took 549334.86ms. Allocated memory was 132.1MB in the beginning and 3.9GB in the end (delta: 3.8GB). Free memory was 65.3MB in the beginning and 1.5GB in the end (delta: -1.4GB). Peak memory consumption was 2.4GB. Max. memory is 16.1GB. * Witness Printer took 308.63ms. Allocated memory is still 3.9GB. Free memory was 1.5GB in the beginning and 3.8GB in the end (delta: -2.3GB). Peak memory consumption was 27.3MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 599]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L607] int m_st ; [L617] int T2_E = 2; [L618] int T3_E = 2; [L35] int q_free ; [L616] int T1_E = 2; [L36] int q_read_ev ; [L606] int t3_pc = 0; [L38] int q_req_up ; [L39] int q_ev ; [L67] int c_dr_st ; [L69] int c_dr_i ; [L33] int slow_clk_edge ; [L34] int q_buf_0 ; [L630] int local ; [L604] int t1_pc = 0; [L60] int p_num_write ; [L612] int t1_i ; [L615] int M_E = 2; [L619] int E_M = 2; [L611] int m_i ; [L202] static int a_t ; [L608] int t1_st ; [L610] int t3_st ; [L614] int t3_i ; [L613] int t2_i ; [L32] int fast_clk_edge ; [L37] int q_write_ev ; [L63] int p_dw_pc ; [L64] int p_dw_i ; [L605] int t2_pc = 0; [L628] int token ; [L62] int p_dw_st ; [L66] int c_last_read ; [L68] int c_dr_pc ; [L352] static int t = 0; [L620] int E_1 = 2; [L603] int m_pc = 0; [L609] int t2_st ; [L622] int E_3 = 2; [L621] int E_2 = 2; [L61] int p_last_write ; [L65] int c_num_read ; [L1327] COND FALSE !(__VERIFIER_nondet_int()) [L1330] CALL main2() [L1314] int __retres1 ; [L1318] CALL init_model2() [L1227] m_i = 1 [L1228] t1_i = 1 [L1229] t2_i = 1 [L1230] t3_i = 1 [L1318] RET init_model2() [L1319] CALL start_simulation2() [L1255] int kernel_st ; [L1256] int tmp ; [L1257] int tmp___0 ; [L1261] kernel_st = 0 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, kernel_st=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1262] FCALL update_channels2() VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, kernel_st=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1263] CALL init_threads2() [L883] COND TRUE m_i == 1 [L884] m_st = 0 [L888] COND TRUE t1_i == 1 [L889] t1_st = 0 [L893] COND TRUE t2_i == 1 [L894] t2_st = 0 [L898] COND TRUE t3_i == 1 [L899] t3_st = 0 [L1263] RET init_threads2() [L1264] CALL fire_delta_events2() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, \old(T2_E)=2, \old(T3_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1020] COND FALSE !(M_E == 0) [L1025] COND FALSE !(T1_E == 0) [L1030] COND FALSE !(T2_E == 0) [L1035] COND FALSE !(T3_E == 0) [L1040] COND FALSE !(E_M == 0) [L1045] COND FALSE !(E_1 == 0) [L1050] COND FALSE !(E_2 == 0) [L1055] COND FALSE !(E_3 == 0) [L1264] RET fire_delta_events2() VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, kernel_st=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1265] CALL activate_threads2() VAL [\old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1113] int tmp ; [L1114] int tmp___0 ; [L1115] int tmp___1 ; [L1116] int tmp___2 ; [L1120] CALL, EXPR is_master_triggered() [L796] int __retres1 ; VAL [\old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L799] COND FALSE !(m_pc == 1) VAL [\old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L809] __retres1 = 0 VAL [\old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L811] return (__retres1); [L1120] RET, EXPR is_master_triggered() [L1120] tmp = is_master_triggered() [L1122] COND FALSE !(\read(tmp)) [L1128] CALL, EXPR is_transmit1_triggered() [L815] int __retres1 ; VAL [\old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L818] COND FALSE !(t1_pc == 1) VAL [\old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L828] __retres1 = 0 VAL [\old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L830] return (__retres1); [L1128] RET, EXPR is_transmit1_triggered() [L1128] tmp___0 = is_transmit1_triggered() [L1130] COND FALSE !(\read(tmp___0)) [L1136] CALL, EXPR is_transmit2_triggered() [L834] int __retres1 ; VAL [\old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L837] COND FALSE !(t2_pc == 1) VAL [\old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L847] __retres1 = 0 VAL [\old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L849] return (__retres1); [L1136] RET, EXPR is_transmit2_triggered() [L1136] tmp___1 = is_transmit2_triggered() [L1138] COND FALSE !(\read(tmp___1)) [L1144] CALL, EXPR is_transmit3_triggered() [L853] int __retres1 ; VAL [\old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L856] COND FALSE !(t3_pc == 1) VAL [\old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L866] __retres1 = 0 VAL [\old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L868] return (__retres1); [L1144] RET, EXPR is_transmit3_triggered() [L1144] tmp___2 = is_transmit3_triggered() [L1146] COND FALSE !(\read(tmp___2)) [L1265] RET activate_threads2() VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, kernel_st=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1266] CALL reset_delta_events2() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, \old(T2_E)=2, \old(T3_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1068] COND FALSE !(M_E == 1) [L1073] COND FALSE !(T1_E == 1) [L1078] COND FALSE !(T2_E == 1) [L1083] COND FALSE !(T3_E == 1) [L1088] COND FALSE !(E_M == 1) [L1093] COND FALSE !(E_1 == 1) [L1098] COND FALSE !(E_2 == 1) [L1103] COND FALSE !(E_3 == 1) [L1266] RET reset_delta_events2() VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, kernel_st=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1269] COND TRUE 1 [L1272] kernel_st = 1 [L1273] CALL eval2() [L939] int tmp ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L943] COND TRUE 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L946] CALL, EXPR exists_runnable_thread2() VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L908] int __retres1 ; [L911] COND TRUE m_st == 0 [L912] __retres1 = 1 [L934] return (__retres1); [L946] RET, EXPR exists_runnable_thread2() VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, exists_runnable_thread2()=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L946] tmp = exists_runnable_thread2() [L948] COND TRUE \read(tmp) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=1, token=0] [L953] COND TRUE m_st == 0 [L954] int tmp_ndt_1; [L955] tmp_ndt_1 = __VERIFIER_nondet_int() [L956] COND FALSE !(\read(tmp_ndt_1)) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=1, tmp_ndt_1=0, token=0] [L967] COND TRUE t1_st == 0 [L968] int tmp_ndt_2; [L969] tmp_ndt_2 = __VERIFIER_nondet_int() [L970] COND TRUE \read(tmp_ndt_2) [L972] t1_st = 1 [L973] CALL transmit1() [L691] COND TRUE t1_pc == 0 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L702] COND TRUE 1 [L704] t1_pc = 1 [L705] t1_st = 2 [L973] RET transmit1() [L981] COND TRUE t2_st == 0 [L982] int tmp_ndt_3; [L983] tmp_ndt_3 = __VERIFIER_nondet_int() [L984] COND TRUE \read(tmp_ndt_3) [L986] t2_st = 1 [L987] CALL transmit2() [L727] COND TRUE t2_pc == 0 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L738] COND TRUE 1 [L740] t2_pc = 1 [L741] t2_st = 2 [L987] RET transmit2() [L995] COND TRUE t3_st == 0 [L996] int tmp_ndt_4; [L997] tmp_ndt_4 = __VERIFIER_nondet_int() [L998] COND TRUE \read(tmp_ndt_4) [L1000] t3_st = 1 [L1001] CALL transmit3() [L763] COND TRUE t3_pc == 0 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1, token=0] [L774] COND TRUE 1 [L776] t3_pc = 1 [L777] t3_st = 2 [L1001] RET transmit3() [L943] COND TRUE 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=-1, tmp_ndt_3=-2, tmp_ndt_4=1, token=0] [L946] CALL, EXPR exists_runnable_thread2() VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L908] int __retres1 ; [L911] COND TRUE m_st == 0 [L912] __retres1 = 1 [L934] return (__retres1); [L946] RET, EXPR exists_runnable_thread2() VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, exists_runnable_thread2()=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=-1, tmp_ndt_3=-2, tmp_ndt_4=1, token=0] [L946] tmp = exists_runnable_thread2() [L948] COND TRUE \read(tmp) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=-1, tmp_ndt_3=-2, tmp_ndt_4=1, token=0] [L953] COND TRUE m_st == 0 [L954] int tmp_ndt_1; [L955] tmp_ndt_1 = __VERIFIER_nondet_int() [L956] COND TRUE \read(tmp_ndt_1) [L958] m_st = 1 [L959] CALL master() [L633] int tmp_var = __VERIFIER_nondet_int(); [L635] COND TRUE m_pc == 0 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp_var=0, token=0] [L646] COND TRUE 1 [L649] token = __VERIFIER_nondet_int() [L650] local = token [L651] E_1 = 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp_var=0, token=0] [L652] CALL immediate_notify() VAL [\old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L1160] CALL activate_threads2() VAL [\old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L1113] int tmp ; [L1114] int tmp___0 ; [L1115] int tmp___1 ; [L1116] int tmp___2 ; [L1120] CALL, EXPR is_master_triggered() [L796] int __retres1 ; VAL [\old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L799] COND FALSE !(m_pc == 1) VAL [\old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L809] __retres1 = 0 VAL [\old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=2, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L811] return (__retres1); [L1120] RET, EXPR is_master_triggered() [L1120] tmp = is_master_triggered() [L1122] COND FALSE !(\read(tmp)) [L1128] CALL, EXPR is_transmit1_triggered() [L815] int __retres1 ; VAL [\old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L818] COND TRUE t1_pc == 1 VAL [\old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L819] COND TRUE E_1 == 1 [L820] __retres1 = 1 VAL [\old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=2, __retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L830] return (__retres1); [L1128] RET, EXPR is_transmit1_triggered() [L1128] tmp___0 = is_transmit1_triggered() [L1130] COND TRUE \read(tmp___0) [L1131] t1_st = 0 [L1136] CALL, EXPR is_transmit2_triggered() [L834] int __retres1 ; VAL [\old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L837] COND TRUE t2_pc == 1 VAL [\old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L838] COND FALSE !(E_2 == 1) VAL [\old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L847] __retres1 = 0 VAL [\old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=2, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L849] return (__retres1); [L1136] RET, EXPR is_transmit2_triggered() [L1136] tmp___1 = is_transmit2_triggered() [L1138] COND FALSE !(\read(tmp___1)) [L1144] CALL, EXPR is_transmit3_triggered() [L853] int __retres1 ; VAL [\old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L856] COND TRUE t3_pc == 1 VAL [\old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L857] COND FALSE !(E_3 == 1) VAL [\old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L866] __retres1 = 0 VAL [\old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=2, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L868] return (__retres1); [L1144] RET, EXPR is_transmit3_triggered() [L1144] tmp___2 = is_transmit3_triggered() [L1146] COND FALSE !(\read(tmp___2)) [L1160] RET activate_threads2() VAL [\old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L652] RET immediate_notify() VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp_var=0, token=0] [L653] E_1 = 2 [L654] m_pc = 1 [L655] m_st = 2 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp_var=0, token=0] [L959] RET master() [L967] COND TRUE t1_st == 0 [L968] int tmp_ndt_2; [L969] tmp_ndt_2 = __VERIFIER_nondet_int() [L970] COND TRUE \read(tmp_ndt_2) [L972] t1_st = 1 [L973] CALL transmit1() [L691] COND FALSE !(t1_pc == 0) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L694] COND TRUE t1_pc == 1 [L710] token += 1 [L711] E_2 = 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L712] CALL immediate_notify() VAL [\old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L1160] CALL activate_threads2() VAL [\old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L1113] int tmp ; [L1114] int tmp___0 ; [L1115] int tmp___1 ; [L1116] int tmp___2 ; [L1120] CALL, EXPR is_master_triggered() [L796] int __retres1 ; VAL [\old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L799] COND TRUE m_pc == 1 VAL [\old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L800] COND FALSE !(E_M == 1) VAL [\old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L809] __retres1 = 0 VAL [\old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \old(t3_st)=2, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L811] return (__retres1); [L1120] RET, EXPR is_master_triggered() [L1120] tmp = is_master_triggered() [L1122] COND FALSE !(\read(tmp)) [L1128] CALL, EXPR is_transmit1_triggered() [L815] int __retres1 ; VAL [\old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L818] COND TRUE t1_pc == 1 VAL [\old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L819] COND FALSE !(E_1 == 1) VAL [\old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L828] __retres1 = 0 VAL [\old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \old(t3_st)=2, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L830] return (__retres1); [L1128] RET, EXPR is_transmit1_triggered() [L1128] tmp___0 = is_transmit1_triggered() [L1130] COND FALSE !(\read(tmp___0)) [L1136] CALL, EXPR is_transmit2_triggered() [L834] int __retres1 ; VAL [\old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L837] COND TRUE t2_pc == 1 VAL [\old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L838] COND TRUE E_2 == 1 [L839] __retres1 = 1 VAL [\old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \old(t3_st)=2, __retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L849] return (__retres1); [L1136] RET, EXPR is_transmit2_triggered() [L1136] tmp___1 = is_transmit2_triggered() [L1138] COND TRUE \read(tmp___1) [L1139] t2_st = 0 [L1144] CALL, EXPR is_transmit3_triggered() [L853] int __retres1 ; VAL [\old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L856] COND TRUE t3_pc == 1 VAL [\old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L857] COND FALSE !(E_3 == 1) VAL [\old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L866] __retres1 = 0 VAL [\old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \old(t3_st)=2, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L868] return (__retres1); [L1144] RET, EXPR is_transmit3_triggered() [L1144] tmp___2 = is_transmit3_triggered() [L1146] COND FALSE !(\read(tmp___2)) [L1160] RET activate_threads2() VAL [\old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L712] RET immediate_notify() VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L713] E_2 = 2 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L702] COND TRUE 1 [L704] t1_pc = 1 [L705] t1_st = 2 [L973] RET transmit1() [L981] COND TRUE t2_st == 0 [L982] int tmp_ndt_3; [L983] tmp_ndt_3 = __VERIFIER_nondet_int() [L984] COND TRUE \read(tmp_ndt_3) [L986] t2_st = 1 [L987] CALL transmit2() [L727] COND FALSE !(t2_pc == 0) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L730] COND TRUE t2_pc == 1 [L746] token += 1 [L747] E_3 = 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L748] CALL immediate_notify() VAL [\old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L1160] CALL activate_threads2() VAL [\old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L1113] int tmp ; [L1114] int tmp___0 ; [L1115] int tmp___1 ; [L1116] int tmp___2 ; [L1120] CALL, EXPR is_master_triggered() [L796] int __retres1 ; VAL [\old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L799] COND TRUE m_pc == 1 VAL [\old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L800] COND FALSE !(E_M == 1) VAL [\old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L809] __retres1 = 0 VAL [\old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \old(t3_st)=2, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L811] return (__retres1); [L1120] RET, EXPR is_master_triggered() [L1120] tmp = is_master_triggered() [L1122] COND FALSE !(\read(tmp)) [L1128] CALL, EXPR is_transmit1_triggered() [L815] int __retres1 ; VAL [\old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L818] COND TRUE t1_pc == 1 VAL [\old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L819] COND FALSE !(E_1 == 1) VAL [\old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L828] __retres1 = 0 VAL [\old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \old(t3_st)=2, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L830] return (__retres1); [L1128] RET, EXPR is_transmit1_triggered() [L1128] tmp___0 = is_transmit1_triggered() [L1130] COND FALSE !(\read(tmp___0)) [L1136] CALL, EXPR is_transmit2_triggered() [L834] int __retres1 ; VAL [\old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L837] COND TRUE t2_pc == 1 VAL [\old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L838] COND FALSE !(E_2 == 1) VAL [\old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L847] __retres1 = 0 VAL [\old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \old(t3_st)=2, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L849] return (__retres1); [L1136] RET, EXPR is_transmit2_triggered() [L1136] tmp___1 = is_transmit2_triggered() [L1138] COND FALSE !(\read(tmp___1)) [L1144] CALL, EXPR is_transmit3_triggered() [L853] int __retres1 ; VAL [\old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L856] COND TRUE t3_pc == 1 VAL [\old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L857] COND TRUE E_3 == 1 [L858] __retres1 = 1 VAL [\old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \old(t3_st)=2, __retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L868] return (__retres1); [L1144] RET, EXPR is_transmit3_triggered() [L1144] tmp___2 = is_transmit3_triggered() [L1146] COND TRUE \read(tmp___2) [L1147] t3_st = 0 [L1160] RET activate_threads2() VAL [\old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, token=2] [L748] RET immediate_notify() VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, token=2] [L749] E_3 = 2 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, token=2] [L738] COND TRUE 1 [L740] t2_pc = 1 [L741] t2_st = 2 [L987] RET transmit2() [L995] COND TRUE t3_st == 0 [L996] int tmp_ndt_4; [L997] tmp_ndt_4 = __VERIFIER_nondet_int() [L998] COND TRUE \read(tmp_ndt_4) [L1000] t3_st = 1 [L1001] CALL transmit3() [L763] COND FALSE !(t3_pc == 0) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=2] [L766] COND TRUE t3_pc == 1 [L782] token += 1 [L783] E_M = 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L784] CALL immediate_notify() VAL [\old(m_st)=2, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L1160] CALL activate_threads2() VAL [\old(m_st)=2, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L1113] int tmp ; [L1114] int tmp___0 ; [L1115] int tmp___1 ; [L1116] int tmp___2 ; [L1120] CALL, EXPR is_master_triggered() [L796] int __retres1 ; VAL [\old(m_st)=2, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L799] COND TRUE m_pc == 1 VAL [\old(m_st)=2, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L800] COND TRUE E_M == 1 [L801] __retres1 = 1 VAL [\old(m_st)=2, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=1, __retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L811] return (__retres1); [L1120] RET, EXPR is_master_triggered() [L1120] tmp = is_master_triggered() [L1122] COND TRUE \read(tmp) [L1123] m_st = 0 [L1128] CALL, EXPR is_transmit1_triggered() [L815] int __retres1 ; VAL [\old(m_st)=2, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L818] COND TRUE t1_pc == 1 VAL [\old(m_st)=2, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L819] COND FALSE !(E_1 == 1) VAL [\old(m_st)=2, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L828] __retres1 = 0 VAL [\old(m_st)=2, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=1, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L830] return (__retres1); [L1128] RET, EXPR is_transmit1_triggered() [L1128] tmp___0 = is_transmit1_triggered() [L1130] COND FALSE !(\read(tmp___0)) [L1136] CALL, EXPR is_transmit2_triggered() [L834] int __retres1 ; VAL [\old(m_st)=2, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L837] COND TRUE t2_pc == 1 VAL [\old(m_st)=2, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L838] COND FALSE !(E_2 == 1) VAL [\old(m_st)=2, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L847] __retres1 = 0 VAL [\old(m_st)=2, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=1, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L849] return (__retres1); [L1136] RET, EXPR is_transmit2_triggered() [L1136] tmp___1 = is_transmit2_triggered() [L1138] COND FALSE !(\read(tmp___1)) [L1144] CALL, EXPR is_transmit3_triggered() [L853] int __retres1 ; VAL [\old(m_st)=2, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L856] COND TRUE t3_pc == 1 VAL [\old(m_st)=2, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L857] COND FALSE !(E_3 == 1) VAL [\old(m_st)=2, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L866] __retres1 = 0 VAL [\old(m_st)=2, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=1, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L868] return (__retres1); [L1144] RET, EXPR is_transmit3_triggered() [L1144] tmp___2 = is_transmit3_triggered() [L1146] COND FALSE !(\read(tmp___2)) [L1160] RET activate_threads2() VAL [\old(m_st)=2, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L784] RET immediate_notify() VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L785] E_M = 2 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L774] COND TRUE 1 [L776] t3_pc = 1 [L777] t3_st = 2 [L1001] RET transmit3() [L943] COND TRUE 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=-3, tmp_ndt_3=4, tmp_ndt_4=1, token=3] [L946] CALL, EXPR exists_runnable_thread2() VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=3] [L908] int __retres1 ; [L911] COND TRUE m_st == 0 [L912] __retres1 = 1 [L934] return (__retres1); [L946] RET, EXPR exists_runnable_thread2() VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, exists_runnable_thread2()=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=-3, tmp_ndt_3=4, tmp_ndt_4=1, token=3] [L946] tmp = exists_runnable_thread2() [L948] COND TRUE \read(tmp) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=-3, tmp_ndt_3=4, tmp_ndt_4=1, token=3] [L953] COND TRUE m_st == 0 [L954] int tmp_ndt_1; [L955] tmp_ndt_1 = __VERIFIER_nondet_int() [L956] COND TRUE \read(tmp_ndt_1) [L958] m_st = 1 [L959] CALL master() [L633] int tmp_var = __VERIFIER_nondet_int(); [L635] COND FALSE !(m_pc == 0) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp_var=5, token=3] [L638] COND TRUE m_pc == 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp_var=5, token=3] [L660] COND FALSE !(token != local + 3) [L665] COND TRUE tmp_var <= 5 [L666] COND TRUE tmp_var >= 5 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp_var=5, token=3] [L671] COND TRUE tmp_var <= 5 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp_var=5, token=3] [L672] COND TRUE tmp_var >= 5 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp_var=5, token=3] [L673] COND TRUE tmp_var == 5 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp_var=5, token=3] [L674] CALL error2() VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=3] [L599] reach_error() VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=3] - UnprovableResult [Line: 27]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data CFG has 16 procedures, 174 locations, 2 error locations. Started 1 CEGAR loops. OverallTime: 549.1s, OverallIterations: 33, TraceHistogramMax: 5, PathProgramHistogramMax: 2, EmptinessCheckTime: 0.3s, AutomataDifference: 53.6s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 16606 SdHoareTripleChecker+Valid, 13.6s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 16483 mSDsluCounter, 21266 SdHoareTripleChecker+Invalid, 11.3s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 14988 mSDsCounter, 5330 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 16675 IncrementalHoareTripleChecker+Invalid, 22005 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 5330 mSolverCounterUnsat, 6278 mSDtfsCounter, 16675 mSolverCounterSat, 0.3s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 4609 GetRequests, 3672 SyntacticMatches, 52 SemanticMatches, 885 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62691 ImplicationChecksByTransitivity, 266.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=16878occurred in iteration=24, InterpolantAutomatonStates: 605, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 23.7s AutomataMinimizationTime, 32 MinimizatonAttempts, 27887 StatesRemovedByMinimization, 30 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.8s SsaConstructionTime, 2.2s SatisfiabilityAnalysisTime, 10.3s InterpolantComputationTime, 6074 NumberOfCodeBlocks, 6031 NumberOfCodeBlocksAsserted, 56 NumberOfCheckSat, 6452 ConstructedInterpolants, 0 QuantifiedInterpolants, 12134 SizeOfPredicates, 41 NumberOfNonLiveVariables, 13265 ConjunctsInSsa, 211 ConjunctsInUnsatCore, 59 InterpolantComputations, 28 PerfectInterpolantSequences, 3643/4154 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2022-11-16 20:36:24,634 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0488a237-d302-4b95-a1b9-162144bd2b97/bin/utaipan-Xvt2sAort0/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE