./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.safe_analog_estimation_convergence.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 6b4ec56b Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.safe_analog_estimation_convergence.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/config/svcomp-Reach-64bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9 --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 4de94aaabb885b39de7c063dad9a583cbef1a5037a721fe952ddb512087f6e33 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-6b4ec56 [2022-11-20 18:58:03,677 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-20 18:58:03,680 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-20 18:58:03,727 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-20 18:58:03,728 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-20 18:58:03,729 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-20 18:58:03,730 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-20 18:58:03,732 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-20 18:58:03,734 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-20 18:58:03,735 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-20 18:58:03,736 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-20 18:58:03,737 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-20 18:58:03,745 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-20 18:58:03,748 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-20 18:58:03,749 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-20 18:58:03,750 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-20 18:58:03,751 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-20 18:58:03,752 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-20 18:58:03,754 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-20 18:58:03,756 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-20 18:58:03,757 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-20 18:58:03,768 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-20 18:58:03,771 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-20 18:58:03,772 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-20 18:58:03,779 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-20 18:58:03,779 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-20 18:58:03,779 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-20 18:58:03,780 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-20 18:58:03,781 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-20 18:58:03,782 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-20 18:58:03,782 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-20 18:58:03,783 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-20 18:58:03,783 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-20 18:58:03,784 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-20 18:58:03,785 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-20 18:58:03,785 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-20 18:58:03,794 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-20 18:58:03,794 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-20 18:58:03,794 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-20 18:58:03,796 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-20 18:58:03,797 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-20 18:58:03,798 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/config/svcomp-Reach-64bit-Taipan_Default.epf [2022-11-20 18:58:03,851 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-20 18:58:03,851 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-20 18:58:03,854 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-20 18:58:03,854 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-20 18:58:03,855 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-20 18:58:03,856 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-20 18:58:03,856 INFO L138 SettingsManager]: * User list type=DISABLED [2022-11-20 18:58:03,856 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-11-20 18:58:03,857 INFO L138 SettingsManager]: * Explicit value domain=true [2022-11-20 18:58:03,857 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2022-11-20 18:58:03,858 INFO L138 SettingsManager]: * Octagon Domain=false [2022-11-20 18:58:03,858 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-11-20 18:58:03,859 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2022-11-20 18:58:03,859 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2022-11-20 18:58:03,859 INFO L138 SettingsManager]: * Interval Domain=false [2022-11-20 18:58:03,859 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2022-11-20 18:58:03,860 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2022-11-20 18:58:03,860 INFO L138 SettingsManager]: * Simplification Technique=POLY_PAC [2022-11-20 18:58:03,861 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-20 18:58:03,861 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-20 18:58:03,861 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-20 18:58:03,862 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-20 18:58:03,862 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-20 18:58:03,862 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-20 18:58:03,869 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-20 18:58:03,869 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-20 18:58:03,869 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-20 18:58:03,869 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-20 18:58:03,870 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-20 18:58:03,870 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-20 18:58:03,870 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-20 18:58:03,871 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2022-11-20 18:58:03,871 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-20 18:58:03,871 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-20 18:58:03,871 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2022-11-20 18:58:03,871 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-11-20 18:58:03,872 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-20 18:58:03,872 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-11-20 18:58:03,872 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 4de94aaabb885b39de7c063dad9a583cbef1a5037a721fe952ddb512087f6e33 [2022-11-20 18:58:04,170 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-20 18:58:04,203 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-20 18:58:04,206 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-20 18:58:04,207 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-20 18:58:04,208 INFO L275 PluginConnector]: CDTParser initialized [2022-11-20 18:58:04,209 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.safe_analog_estimation_convergence.c [2022-11-20 18:58:07,413 INFO L500 CDTParser]: Created temporary CDT project at NULL [2022-11-20 18:58:07,634 INFO L351 CDTParser]: Found 1 translation units. [2022-11-20 18:58:07,634 INFO L172 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.safe_analog_estimation_convergence.c [2022-11-20 18:58:07,654 INFO L394 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/data/a502eb636/9612de8ec4e343f7b87f07506325d392/FLAG774495737 [2022-11-20 18:58:07,671 INFO L402 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/data/a502eb636/9612de8ec4e343f7b87f07506325d392 [2022-11-20 18:58:07,674 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-20 18:58:07,676 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-20 18:58:07,677 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-20 18:58:07,677 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-20 18:58:07,681 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-20 18:58:07,682 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.11 06:58:07" (1/1) ... [2022-11-20 18:58:07,684 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@662c7be and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:58:07, skipping insertion in model container [2022-11-20 18:58:07,684 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.11 06:58:07" (1/1) ... [2022-11-20 18:58:07,692 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-20 18:58:07,733 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-20 18:58:07,865 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.safe_analog_estimation_convergence.c[1120,1133] [2022-11-20 18:58:08,051 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-20 18:58:08,056 INFO L203 MainTranslator]: Completed pre-run [2022-11-20 18:58:08,067 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.safe_analog_estimation_convergence.c[1120,1133] [2022-11-20 18:58:08,191 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-20 18:58:08,206 INFO L208 MainTranslator]: Completed translation [2022-11-20 18:58:08,207 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:58:08 WrapperNode [2022-11-20 18:58:08,207 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-20 18:58:08,209 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-20 18:58:08,209 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-20 18:58:08,209 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-20 18:58:08,217 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:58:08" (1/1) ... [2022-11-20 18:58:08,241 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:58:08" (1/1) ... [2022-11-20 18:58:08,289 INFO L138 Inliner]: procedures = 11, calls = 5, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 413 [2022-11-20 18:58:08,296 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-20 18:58:08,297 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-20 18:58:08,297 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-20 18:58:08,297 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-20 18:58:08,306 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:58:08" (1/1) ... [2022-11-20 18:58:08,306 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:58:08" (1/1) ... [2022-11-20 18:58:08,317 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:58:08" (1/1) ... [2022-11-20 18:58:08,330 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:58:08" (1/1) ... [2022-11-20 18:58:08,343 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:58:08" (1/1) ... [2022-11-20 18:58:08,361 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:58:08" (1/1) ... [2022-11-20 18:58:08,364 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:58:08" (1/1) ... [2022-11-20 18:58:08,367 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:58:08" (1/1) ... [2022-11-20 18:58:08,385 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-20 18:58:08,386 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-20 18:58:08,386 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-20 18:58:08,386 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-20 18:58:08,387 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:58:08" (1/1) ... [2022-11-20 18:58:08,404 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-20 18:58:08,417 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/z3 [2022-11-20 18:58:08,437 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-20 18:58:08,466 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-20 18:58:08,486 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-20 18:58:08,486 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-20 18:58:08,486 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2022-11-20 18:58:08,486 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2022-11-20 18:58:08,764 INFO L235 CfgBuilder]: Building ICFG [2022-11-20 18:58:08,766 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-20 18:58:10,522 INFO L276 CfgBuilder]: Performing block encoding [2022-11-20 18:58:10,550 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-20 18:58:10,550 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-20 18:58:10,554 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.11 06:58:10 BoogieIcfgContainer [2022-11-20 18:58:10,554 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-20 18:58:10,557 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-20 18:58:10,558 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-20 18:58:10,561 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-20 18:58:10,561 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 20.11 06:58:07" (1/3) ... [2022-11-20 18:58:10,564 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4db024f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.11 06:58:10, skipping insertion in model container [2022-11-20 18:58:10,564 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:58:08" (2/3) ... [2022-11-20 18:58:10,565 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4db024f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.11 06:58:10, skipping insertion in model container [2022-11-20 18:58:10,565 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.11 06:58:10" (3/3) ... [2022-11-20 18:58:10,567 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.safe_analog_estimation_convergence.c [2022-11-20 18:58:10,590 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-20 18:58:10,590 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-20 18:58:10,651 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-20 18:58:10,657 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@32f14b4, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-20 18:58:10,658 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-20 18:58:10,663 INFO L276 IsEmpty]: Start isEmpty. Operand has 13 states, 8 states have (on average 1.375) internal successors, (11), 9 states have internal predecessors, (11), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-20 18:58:10,670 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2022-11-20 18:58:10,670 INFO L187 NwaCegarLoop]: Found error trace [2022-11-20 18:58:10,671 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-20 18:58:10,671 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-20 18:58:10,676 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-20 18:58:10,677 INFO L85 PathProgramCache]: Analyzing trace with hash 694370680, now seen corresponding path program 1 times [2022-11-20 18:58:10,684 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-20 18:58:10,684 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [681976549] [2022-11-20 18:58:10,685 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-20 18:58:10,685 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-20 18:58:12,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-20 18:58:12,342 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-20 18:58:13,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-20 18:58:13,391 INFO L130 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2022-11-20 18:58:13,393 INFO L359 BasicCegarLoop]: Counterexample is feasible [2022-11-20 18:58:13,394 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-11-20 18:58:13,397 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-11-20 18:58:13,402 INFO L444 BasicCegarLoop]: Path program histogram: [1] [2022-11-20 18:58:13,406 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-20 18:58:13,473 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-20 18:58:13,502 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 20.11 06:58:13 BoogieIcfgContainer [2022-11-20 18:58:13,503 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-20 18:58:13,505 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-20 18:58:13,505 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-20 18:58:13,506 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-20 18:58:13,506 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.11 06:58:10" (3/4) ... [2022-11-20 18:58:13,511 INFO L140 WitnessPrinter]: No result that supports witness generation found [2022-11-20 18:58:13,511 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-20 18:58:13,513 INFO L158 Benchmark]: Toolchain (without parser) took 5836.79ms. Allocated memory was 125.8MB in the beginning and 222.3MB in the end (delta: 96.5MB). Free memory was 81.1MB in the beginning and 162.2MB in the end (delta: -81.2MB). Peak memory consumption was 16.7MB. Max. memory is 16.1GB. [2022-11-20 18:58:13,513 INFO L158 Benchmark]: CDTParser took 0.30ms. Allocated memory is still 125.8MB. Free memory is still 94.6MB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-20 18:58:13,514 INFO L158 Benchmark]: CACSL2BoogieTranslator took 530.55ms. Allocated memory is still 125.8MB. Free memory was 80.6MB in the beginning and 59.6MB in the end (delta: 21.0MB). Peak memory consumption was 21.0MB. Max. memory is 16.1GB. [2022-11-20 18:58:13,516 INFO L158 Benchmark]: Boogie Procedure Inliner took 87.58ms. Allocated memory is still 125.8MB. Free memory was 59.6MB in the beginning and 54.2MB in the end (delta: 5.4MB). Peak memory consumption was 6.3MB. Max. memory is 16.1GB. [2022-11-20 18:58:13,516 INFO L158 Benchmark]: Boogie Preprocessor took 88.30ms. Allocated memory is still 125.8MB. Free memory was 54.2MB in the beginning and 51.2MB in the end (delta: 3.0MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-11-20 18:58:13,521 INFO L158 Benchmark]: RCFGBuilder took 2168.92ms. Allocated memory was 125.8MB in the beginning and 180.4MB in the end (delta: 54.5MB). Free memory was 51.2MB in the beginning and 74.2MB in the end (delta: -23.0MB). Peak memory consumption was 70.7MB. Max. memory is 16.1GB. [2022-11-20 18:58:13,522 INFO L158 Benchmark]: TraceAbstraction took 2946.16ms. Allocated memory was 180.4MB in the beginning and 222.3MB in the end (delta: 41.9MB). Free memory was 73.1MB in the beginning and 163.3MB in the end (delta: -90.1MB). Peak memory consumption was 30.5MB. Max. memory is 16.1GB. [2022-11-20 18:58:13,523 INFO L158 Benchmark]: Witness Printer took 6.78ms. Allocated memory is still 222.3MB. Free memory was 163.3MB in the beginning and 162.2MB in the end (delta: 1.0MB). There was no memory consumed. Max. memory is 16.1GB. [2022-11-20 18:58:13,525 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.30ms. Allocated memory is still 125.8MB. Free memory is still 94.6MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 530.55ms. Allocated memory is still 125.8MB. Free memory was 80.6MB in the beginning and 59.6MB in the end (delta: 21.0MB). Peak memory consumption was 21.0MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 87.58ms. Allocated memory is still 125.8MB. Free memory was 59.6MB in the beginning and 54.2MB in the end (delta: 5.4MB). Peak memory consumption was 6.3MB. Max. memory is 16.1GB. * Boogie Preprocessor took 88.30ms. Allocated memory is still 125.8MB. Free memory was 54.2MB in the beginning and 51.2MB in the end (delta: 3.0MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * RCFGBuilder took 2168.92ms. Allocated memory was 125.8MB in the beginning and 180.4MB in the end (delta: 54.5MB). Free memory was 51.2MB in the beginning and 74.2MB in the end (delta: -23.0MB). Peak memory consumption was 70.7MB. Max. memory is 16.1GB. * TraceAbstraction took 2946.16ms. Allocated memory was 180.4MB in the beginning and 222.3MB in the end (delta: 41.9MB). Free memory was 73.1MB in the beginning and 163.3MB in the end (delta: -90.1MB). Peak memory consumption was 30.5MB. Max. memory is 16.1GB. * Witness Printer took 6.78ms. Allocated memory is still 222.3MB. Free memory was 163.3MB in the beginning and 162.2MB in the end (delta: 1.0MB). There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 20]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: overapproximation of bitwiseOr at line 180, overapproximation of bitwiseAnd at line 168, overapproximation of bitwiseComplement at line 294, overapproximation of bitwiseXor at line 292. Possible FailurePath: [L25] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L26] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L28] const SORT_9 mask_SORT_9 = (SORT_9)-1 >> (sizeof(SORT_9) * 8 - 31); [L29] const SORT_9 msb_SORT_9 = (SORT_9)1 << (31 - 1); [L31] const SORT_11 mask_SORT_11 = (SORT_11)-1 >> (sizeof(SORT_11) * 8 - 16); [L32] const SORT_11 msb_SORT_11 = (SORT_11)1 << (16 - 1); [L34] const SORT_12 mask_SORT_12 = (SORT_12)-1 >> (sizeof(SORT_12) * 8 - 8); [L35] const SORT_12 msb_SORT_12 = (SORT_12)1 << (8 - 1); [L37] const SORT_20 mask_SORT_20 = (SORT_20)-1 >> (sizeof(SORT_20) * 8 - 32); [L38] const SORT_20 msb_SORT_20 = (SORT_20)1 << (32 - 1); [L40] const SORT_23 mask_SORT_23 = (SORT_23)-1 >> (sizeof(SORT_23) * 8 - 17); [L41] const SORT_23 msb_SORT_23 = (SORT_23)1 << (17 - 1); [L43] const SORT_26 mask_SORT_26 = (SORT_26)-1 >> (sizeof(SORT_26) * 8 - 18); [L44] const SORT_26 msb_SORT_26 = (SORT_26)1 << (18 - 1); [L46] const SORT_29 mask_SORT_29 = (SORT_29)-1 >> (sizeof(SORT_29) * 8 - 19); [L47] const SORT_29 msb_SORT_29 = (SORT_29)1 << (19 - 1); [L49] const SORT_32 mask_SORT_32 = (SORT_32)-1 >> (sizeof(SORT_32) * 8 - 20); [L50] const SORT_32 msb_SORT_32 = (SORT_32)1 << (20 - 1); [L52] const SORT_35 mask_SORT_35 = (SORT_35)-1 >> (sizeof(SORT_35) * 8 - 21); [L53] const SORT_35 msb_SORT_35 = (SORT_35)1 << (21 - 1); [L55] const SORT_38 mask_SORT_38 = (SORT_38)-1 >> (sizeof(SORT_38) * 8 - 22); [L56] const SORT_38 msb_SORT_38 = (SORT_38)1 << (22 - 1); [L58] const SORT_41 mask_SORT_41 = (SORT_41)-1 >> (sizeof(SORT_41) * 8 - 23); [L59] const SORT_41 msb_SORT_41 = (SORT_41)1 << (23 - 1); [L61] const SORT_44 mask_SORT_44 = (SORT_44)-1 >> (sizeof(SORT_44) * 8 - 24); [L62] const SORT_44 msb_SORT_44 = (SORT_44)1 << (24 - 1); [L64] const SORT_47 mask_SORT_47 = (SORT_47)-1 >> (sizeof(SORT_47) * 8 - 25); [L65] const SORT_47 msb_SORT_47 = (SORT_47)1 << (25 - 1); [L67] const SORT_50 mask_SORT_50 = (SORT_50)-1 >> (sizeof(SORT_50) * 8 - 26); [L68] const SORT_50 msb_SORT_50 = (SORT_50)1 << (26 - 1); [L70] const SORT_53 mask_SORT_53 = (SORT_53)-1 >> (sizeof(SORT_53) * 8 - 27); [L71] const SORT_53 msb_SORT_53 = (SORT_53)1 << (27 - 1); [L73] const SORT_56 mask_SORT_56 = (SORT_56)-1 >> (sizeof(SORT_56) * 8 - 28); [L74] const SORT_56 msb_SORT_56 = (SORT_56)1 << (28 - 1); [L76] const SORT_59 mask_SORT_59 = (SORT_59)-1 >> (sizeof(SORT_59) * 8 - 29); [L77] const SORT_59 msb_SORT_59 = (SORT_59)1 << (29 - 1); [L79] const SORT_62 mask_SORT_62 = (SORT_62)-1 >> (sizeof(SORT_62) * 8 - 30); [L80] const SORT_62 msb_SORT_62 = (SORT_62)1 << (30 - 1); [L82] const SORT_72 mask_SORT_72 = (SORT_72)-1 >> (sizeof(SORT_72) * 8 - 3); [L83] const SORT_72 msb_SORT_72 = (SORT_72)1 << (3 - 1); [L85] const SORT_96 mask_SORT_96 = (SORT_96)-1 >> (sizeof(SORT_96) * 8 - 4); [L86] const SORT_96 msb_SORT_96 = (SORT_96)1 << (4 - 1); [L88] const SORT_101 mask_SORT_101 = (SORT_101)-1 >> (sizeof(SORT_101) * 8 - 14); [L89] const SORT_101 msb_SORT_101 = (SORT_101)1 << (14 - 1); [L91] const SORT_105 mask_SORT_105 = (SORT_105)-1 >> (sizeof(SORT_105) * 8 - 2); [L92] const SORT_105 msb_SORT_105 = (SORT_105)1 << (2 - 1); [L94] const SORT_154 mask_SORT_154 = (SORT_154)-1 >> (sizeof(SORT_154) * 8 - 7); [L95] const SORT_154 msb_SORT_154 = (SORT_154)1 << (7 - 1); [L97] const SORT_1 var_7 = 0; [L98] const SORT_1 var_8 = 1; [L99] const SORT_9 var_10 = 0; [L100] const SORT_12 var_13 = 0; [L101] const SORT_12 var_14 = 200; [L102] const SORT_72 var_73 = 5; [L103] const SORT_11 var_75 = 0; [L104] const SORT_105 var_106 = 1; [L105] const SORT_12 var_112 = 127; [L106] const SORT_11 var_119 = 64; [L107] const SORT_11 var_121 = 1; [L108] const SORT_11 var_123 = 127; [L109] const SORT_11 var_126 = 200; [L110] const SORT_72 var_131 = 4; [L111] const SORT_72 var_134 = 6; [L112] const SORT_96 var_138 = 9; [L113] const SORT_154 var_155 = 64; [L114] const SORT_72 var_166 = 0; [L115] const SORT_96 var_169 = 0; [L117] SORT_1 input_2; [L118] SORT_1 input_3; [L119] SORT_1 input_4; [L121] SORT_1 state_5 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L122] SORT_11 state_17 = __VERIFIER_nondet_ushort() & mask_SORT_11; [L123] SORT_11 state_76 = __VERIFIER_nondet_ushort() & mask_SORT_11; [L124] SORT_96 state_97 = __VERIFIER_nondet_uchar() & mask_SORT_96; [L125] SORT_96 state_100 = __VERIFIER_nondet_uchar() & mask_SORT_96; [L127] SORT_11 init_77_arg_1 = var_75; [L128] state_76 = init_77_arg_1 VAL [init_77_arg_1=0, mask_SORT_1=1, mask_SORT_101=16383, mask_SORT_105=3, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_154=127, mask_SORT_20=4294967295, mask_SORT_23=4294967295, mask_SORT_26=4294967295, mask_SORT_29=4294967295, mask_SORT_32=4294967295, mask_SORT_35=4294967295, mask_SORT_38=4294967295, mask_SORT_41=4294967295, mask_SORT_44=4294967295, mask_SORT_47=4294967295, mask_SORT_50=4294967295, mask_SORT_53=4294967295, mask_SORT_56=4294967295, mask_SORT_59=4294967295, mask_SORT_62=4294967295, mask_SORT_72=7, mask_SORT_9=4294967295, mask_SORT_96=15, msb_SORT_1=1, msb_SORT_101=8192, msb_SORT_105=2, msb_SORT_11=32768, msb_SORT_12=128, msb_SORT_154=64, msb_SORT_20=2147483648, msb_SORT_23=65536, msb_SORT_26=131072, msb_SORT_29=262144, msb_SORT_32=524288, msb_SORT_35=1048576, msb_SORT_38=2097152, msb_SORT_41=4194304, msb_SORT_44=8388608, msb_SORT_47=16777216, msb_SORT_50=33554432, msb_SORT_53=67108864, msb_SORT_56=134217728, msb_SORT_59=268435456, msb_SORT_62=536870912, msb_SORT_72=4, msb_SORT_9=1073741824, msb_SORT_96=8, state_100=0, state_17=0, state_5=4, state_76=0, state_97=0, var_10=0, var_106=1, var_112=127, var_119=64, var_121=1, var_123=127, var_126=200, var_13=0, var_131=4, var_134=6, var_138=9, var_14=200, var_155=64, var_166=0, var_169=0, var_7=0, var_73=5, var_75=0, var_8=1] [L131] input_2 = __VERIFIER_nondet_uchar() [L132] input_3 = __VERIFIER_nondet_uchar() [L133] input_3 = input_3 & mask_SORT_1 [L134] input_4 = __VERIFIER_nondet_uchar() [L135] input_4 = input_4 & mask_SORT_1 [L137] SORT_1 var_84_arg_0 = state_5; [L138] SORT_1 var_84 = ~var_84_arg_0; [L139] SORT_1 var_85_arg_0 = var_84; [L140] SORT_1 var_85 = ~var_85_arg_0; [L141] SORT_1 var_86_arg_0 = state_5; [L142] SORT_1 var_86_arg_1 = var_85; [L143] SORT_1 var_86 = var_86_arg_0 | var_86_arg_1; [L144] var_86 = var_86 & mask_SORT_1 [L145] SORT_1 constr_87_arg_0 = var_86; VAL [constr_87_arg_0=9, init_77_arg_1=0, input_2=1, input_3=0, input_4=2, mask_SORT_1=1, mask_SORT_101=16383, mask_SORT_105=3, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_154=127, mask_SORT_20=4294967295, mask_SORT_23=4294967295, mask_SORT_26=4294967295, mask_SORT_29=4294967295, mask_SORT_32=4294967295, mask_SORT_35=4294967295, mask_SORT_38=4294967295, mask_SORT_41=4294967295, mask_SORT_44=4294967295, mask_SORT_47=4294967295, mask_SORT_50=4294967295, mask_SORT_53=4294967295, mask_SORT_56=4294967295, mask_SORT_59=4294967295, mask_SORT_62=4294967295, mask_SORT_72=7, mask_SORT_9=4294967295, mask_SORT_96=15, msb_SORT_1=1, msb_SORT_101=8192, msb_SORT_105=2, msb_SORT_11=32768, msb_SORT_12=128, msb_SORT_154=64, msb_SORT_20=2147483648, msb_SORT_23=65536, msb_SORT_26=131072, msb_SORT_29=262144, msb_SORT_32=524288, msb_SORT_35=1048576, msb_SORT_38=2097152, msb_SORT_41=4194304, msb_SORT_44=8388608, msb_SORT_47=16777216, msb_SORT_50=33554432, msb_SORT_53=67108864, msb_SORT_56=134217728, msb_SORT_59=268435456, msb_SORT_62=536870912, msb_SORT_72=4, msb_SORT_9=1073741824, msb_SORT_96=8, state_100=0, state_17=0, state_5=4, state_76=0, state_97=0, var_10=0, var_106=1, var_112=127, var_119=64, var_121=1, var_123=127, var_126=200, var_13=0, var_131=4, var_134=6, var_138=9, var_14=200, var_155=64, var_166=0, var_169=0, var_7=0, var_73=5, var_75=0, var_8=1, var_84=2, var_84_arg_0=4, var_85=3, var_85_arg_0=2, var_86=9, var_86_arg_0=4, var_86_arg_1=3] [L146] CALL assume_abort_if_not(constr_87_arg_0) VAL [\old(cond)=9] [L21] COND FALSE !(!cond) [L146] RET assume_abort_if_not(constr_87_arg_0) VAL [constr_87_arg_0=9, init_77_arg_1=0, input_2=1, input_3=0, input_4=2, mask_SORT_1=1, mask_SORT_101=16383, mask_SORT_105=3, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_154=127, mask_SORT_20=4294967295, mask_SORT_23=4294967295, mask_SORT_26=4294967295, mask_SORT_29=4294967295, mask_SORT_32=4294967295, mask_SORT_35=4294967295, mask_SORT_38=4294967295, mask_SORT_41=4294967295, mask_SORT_44=4294967295, mask_SORT_47=4294967295, mask_SORT_50=4294967295, mask_SORT_53=4294967295, mask_SORT_56=4294967295, mask_SORT_59=4294967295, mask_SORT_62=4294967295, mask_SORT_72=7, mask_SORT_9=4294967295, mask_SORT_96=15, msb_SORT_1=1, msb_SORT_101=8192, msb_SORT_105=2, msb_SORT_11=32768, msb_SORT_12=128, msb_SORT_154=64, msb_SORT_20=2147483648, msb_SORT_23=65536, msb_SORT_26=131072, msb_SORT_29=262144, msb_SORT_32=524288, msb_SORT_35=1048576, msb_SORT_38=2097152, msb_SORT_41=4194304, msb_SORT_44=8388608, msb_SORT_47=16777216, msb_SORT_50=33554432, msb_SORT_53=67108864, msb_SORT_56=134217728, msb_SORT_59=268435456, msb_SORT_62=536870912, msb_SORT_72=4, msb_SORT_9=1073741824, msb_SORT_96=8, state_100=0, state_17=0, state_5=4, state_76=0, state_97=0, var_10=0, var_106=1, var_112=127, var_119=64, var_121=1, var_123=127, var_126=200, var_13=0, var_131=4, var_134=6, var_138=9, var_14=200, var_155=64, var_166=0, var_169=0, var_7=0, var_73=5, var_75=0, var_8=1, var_84=2, var_84_arg_0=4, var_85=3, var_85_arg_0=2, var_86=9, var_86_arg_0=4, var_86_arg_1=3] [L147] SORT_1 var_88_arg_0 = var_8; [L148] var_88_arg_0 = var_88_arg_0 & mask_SORT_1 [L149] SORT_11 var_88 = var_88_arg_0; [L150] SORT_11 var_89_arg_0 = state_76; [L151] SORT_11 var_89_arg_1 = var_88; [L152] SORT_1 var_89 = var_89_arg_0 <= var_89_arg_1; [L153] SORT_1 var_90_arg_0 = input_4; [L154] SORT_1 var_90_arg_1 = var_89; [L155] SORT_1 var_90 = var_90_arg_0 ^ var_90_arg_1; [L156] SORT_1 var_91_arg_0 = var_90; [L157] SORT_1 var_91 = ~var_91_arg_0; [L158] SORT_1 var_92_arg_0 = var_90; [L159] SORT_1 var_92 = ~var_92_arg_0; [L160] SORT_1 var_93_arg_0 = var_91; [L161] SORT_1 var_93_arg_1 = var_92; [L162] SORT_1 var_93 = var_93_arg_0 | var_93_arg_1; [L163] var_93 = var_93 & mask_SORT_1 [L164] SORT_1 constr_94_arg_0 = var_93; VAL [constr_87_arg_0=9, constr_94_arg_0=254, init_77_arg_1=0, input_2=1, input_3=0, input_4=2, mask_SORT_1=1, mask_SORT_101=16383, mask_SORT_105=3, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_154=127, mask_SORT_20=4294967295, mask_SORT_23=4294967295, mask_SORT_26=4294967295, mask_SORT_29=4294967295, mask_SORT_32=4294967295, mask_SORT_35=4294967295, mask_SORT_38=4294967295, mask_SORT_41=4294967295, mask_SORT_44=4294967295, mask_SORT_47=4294967295, mask_SORT_50=4294967295, mask_SORT_53=4294967295, mask_SORT_56=4294967295, mask_SORT_59=4294967295, mask_SORT_62=4294967295, mask_SORT_72=7, mask_SORT_9=4294967295, mask_SORT_96=15, msb_SORT_1=1, msb_SORT_101=8192, msb_SORT_105=2, msb_SORT_11=32768, msb_SORT_12=128, msb_SORT_154=64, msb_SORT_20=2147483648, msb_SORT_23=65536, msb_SORT_26=131072, msb_SORT_29=262144, msb_SORT_32=524288, msb_SORT_35=1048576, msb_SORT_38=2097152, msb_SORT_41=4194304, msb_SORT_44=8388608, msb_SORT_47=16777216, msb_SORT_50=33554432, msb_SORT_53=67108864, msb_SORT_56=134217728, msb_SORT_59=268435456, msb_SORT_62=536870912, msb_SORT_72=4, msb_SORT_9=1073741824, msb_SORT_96=8, state_100=0, state_17=0, state_5=4, state_76=0, state_97=0, var_10=0, var_106=1, var_112=127, var_119=64, var_121=1, var_123=127, var_126=200, var_13=0, var_131=4, var_134=6, var_138=9, var_14=200, var_155=64, var_166=0, var_169=0, var_7=0, var_73=5, var_75=0, var_8=1, var_84=2, var_84_arg_0=4, var_85=3, var_85_arg_0=2, var_86=9, var_86_arg_0=4, var_86_arg_1=3, var_88=1, var_88_arg_0=1, var_89=1, var_89_arg_0=0, var_89_arg_1=1, var_90=0, var_90_arg_0=2, var_90_arg_1=1, var_91=254, var_91_arg_0=0, var_92=255, var_92_arg_0=0, var_93=254, var_93_arg_0=254, var_93_arg_1=255] [L165] CALL assume_abort_if_not(constr_94_arg_0) VAL [\old(cond)=254] [L21] COND FALSE !(!cond) [L165] RET assume_abort_if_not(constr_94_arg_0) VAL [constr_87_arg_0=9, constr_94_arg_0=254, init_77_arg_1=0, input_2=1, input_3=0, input_4=2, mask_SORT_1=1, mask_SORT_101=16383, mask_SORT_105=3, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_154=127, mask_SORT_20=4294967295, mask_SORT_23=4294967295, mask_SORT_26=4294967295, mask_SORT_29=4294967295, mask_SORT_32=4294967295, mask_SORT_35=4294967295, mask_SORT_38=4294967295, mask_SORT_41=4294967295, mask_SORT_44=4294967295, mask_SORT_47=4294967295, mask_SORT_50=4294967295, mask_SORT_53=4294967295, mask_SORT_56=4294967295, mask_SORT_59=4294967295, mask_SORT_62=4294967295, mask_SORT_72=7, mask_SORT_9=4294967295, mask_SORT_96=15, msb_SORT_1=1, msb_SORT_101=8192, msb_SORT_105=2, msb_SORT_11=32768, msb_SORT_12=128, msb_SORT_154=64, msb_SORT_20=2147483648, msb_SORT_23=65536, msb_SORT_26=131072, msb_SORT_29=262144, msb_SORT_32=524288, msb_SORT_35=1048576, msb_SORT_38=2097152, msb_SORT_41=4194304, msb_SORT_44=8388608, msb_SORT_47=16777216, msb_SORT_50=33554432, msb_SORT_53=67108864, msb_SORT_56=134217728, msb_SORT_59=268435456, msb_SORT_62=536870912, msb_SORT_72=4, msb_SORT_9=1073741824, msb_SORT_96=8, state_100=0, state_17=0, state_5=4, state_76=0, state_97=0, var_10=0, var_106=1, var_112=127, var_119=64, var_121=1, var_123=127, var_126=200, var_13=0, var_131=4, var_134=6, var_138=9, var_14=200, var_155=64, var_166=0, var_169=0, var_7=0, var_73=5, var_75=0, var_8=1, var_84=2, var_84_arg_0=4, var_85=3, var_85_arg_0=2, var_86=9, var_86_arg_0=4, var_86_arg_1=3, var_88=1, var_88_arg_0=1, var_89=1, var_89_arg_0=0, var_89_arg_1=1, var_90=0, var_90_arg_0=2, var_90_arg_1=1, var_91=254, var_91_arg_0=0, var_92=255, var_92_arg_0=0, var_93=254, var_93_arg_0=254, var_93_arg_1=255] [L167] SORT_72 var_74_arg_0 = var_73; [L168] var_74_arg_0 = var_74_arg_0 & mask_SORT_72 [L169] SORT_11 var_74 = var_74_arg_0; [L170] SORT_11 var_78_arg_0 = var_74; [L171] SORT_11 var_78_arg_1 = state_76; [L172] SORT_1 var_78 = var_78_arg_0 < var_78_arg_1; [L173] SORT_1 var_15_arg_0 = input_3; [L174] SORT_12 var_15_arg_1 = var_14; [L175] SORT_12 var_15_arg_2 = var_13; [L176] SORT_12 var_15 = var_15_arg_0 ? var_15_arg_1 : var_15_arg_2; [L177] var_15 = var_15 & mask_SORT_12 [L178] SORT_12 var_16_arg_0 = var_13; [L179] SORT_12 var_16_arg_1 = var_15; [L180] SORT_11 var_16 = ((SORT_11)var_16_arg_0 << 8) | var_16_arg_1; [L181] SORT_11 var_18_arg_0 = var_16; [L182] SORT_11 var_18_arg_1 = state_17; [L183] SORT_11 var_18 = var_18_arg_0 - var_18_arg_1; [L184] var_18 = var_18 & mask_SORT_11 [L185] SORT_11 var_19_arg_0 = var_18; [L186] SORT_1 var_19 = var_19_arg_0 >> 15; [L187] SORT_1 var_21_arg_0 = var_19; [L188] SORT_9 var_21_arg_1 = var_10; [L189] SORT_20 var_21 = ((SORT_20)var_21_arg_0 << 31) | var_21_arg_1; [L190] var_21 = var_21 & mask_SORT_20 [L191] SORT_11 var_64_arg_0 = var_18; [L192] SORT_1 var_64 = var_64_arg_0 >> 15; [L193] SORT_11 var_61_arg_0 = var_18; [L194] SORT_1 var_61 = var_61_arg_0 >> 15; [L195] SORT_11 var_58_arg_0 = var_18; [L196] SORT_1 var_58 = var_58_arg_0 >> 15; [L197] SORT_11 var_55_arg_0 = var_18; [L198] SORT_1 var_55 = var_55_arg_0 >> 15; [L199] SORT_11 var_52_arg_0 = var_18; [L200] SORT_1 var_52 = var_52_arg_0 >> 15; [L201] SORT_11 var_49_arg_0 = var_18; [L202] SORT_1 var_49 = var_49_arg_0 >> 15; [L203] SORT_11 var_46_arg_0 = var_18; [L204] SORT_1 var_46 = var_46_arg_0 >> 15; [L205] SORT_11 var_43_arg_0 = var_18; [L206] SORT_1 var_43 = var_43_arg_0 >> 15; [L207] SORT_11 var_40_arg_0 = var_18; [L208] SORT_1 var_40 = var_40_arg_0 >> 15; [L209] SORT_11 var_37_arg_0 = var_18; [L210] SORT_1 var_37 = var_37_arg_0 >> 15; [L211] SORT_11 var_34_arg_0 = var_18; [L212] SORT_1 var_34 = var_34_arg_0 >> 15; [L213] SORT_11 var_31_arg_0 = var_18; [L214] SORT_1 var_31 = var_31_arg_0 >> 15; [L215] SORT_11 var_28_arg_0 = var_18; [L216] SORT_1 var_28 = var_28_arg_0 >> 15; [L217] SORT_11 var_25_arg_0 = var_18; [L218] SORT_1 var_25 = var_25_arg_0 >> 15; [L219] SORT_11 var_22_arg_0 = var_18; [L220] SORT_1 var_22 = var_22_arg_0 >> 15; [L221] SORT_1 var_24_arg_0 = var_22; [L222] SORT_11 var_24_arg_1 = var_18; [L223] SORT_23 var_24 = ((SORT_23)var_24_arg_0 << 16) | var_24_arg_1; [L224] var_24 = var_24 & mask_SORT_23 [L225] SORT_1 var_27_arg_0 = var_25; [L226] SORT_23 var_27_arg_1 = var_24; [L227] SORT_26 var_27 = ((SORT_26)var_27_arg_0 << 17) | var_27_arg_1; [L228] var_27 = var_27 & mask_SORT_26 [L229] SORT_1 var_30_arg_0 = var_28; [L230] SORT_26 var_30_arg_1 = var_27; [L231] SORT_29 var_30 = ((SORT_29)var_30_arg_0 << 18) | var_30_arg_1; [L232] var_30 = var_30 & mask_SORT_29 [L233] SORT_1 var_33_arg_0 = var_31; [L234] SORT_29 var_33_arg_1 = var_30; [L235] SORT_32 var_33 = ((SORT_32)var_33_arg_0 << 19) | var_33_arg_1; [L236] var_33 = var_33 & mask_SORT_32 [L237] SORT_1 var_36_arg_0 = var_34; [L238] SORT_32 var_36_arg_1 = var_33; [L239] SORT_35 var_36 = ((SORT_35)var_36_arg_0 << 20) | var_36_arg_1; [L240] var_36 = var_36 & mask_SORT_35 [L241] SORT_1 var_39_arg_0 = var_37; [L242] SORT_35 var_39_arg_1 = var_36; [L243] SORT_38 var_39 = ((SORT_38)var_39_arg_0 << 21) | var_39_arg_1; [L244] var_39 = var_39 & mask_SORT_38 [L245] SORT_1 var_42_arg_0 = var_40; [L246] SORT_38 var_42_arg_1 = var_39; [L247] SORT_41 var_42 = ((SORT_41)var_42_arg_0 << 22) | var_42_arg_1; [L248] var_42 = var_42 & mask_SORT_41 [L249] SORT_1 var_45_arg_0 = var_43; [L250] SORT_41 var_45_arg_1 = var_42; [L251] SORT_44 var_45 = ((SORT_44)var_45_arg_0 << 23) | var_45_arg_1; [L252] var_45 = var_45 & mask_SORT_44 [L253] SORT_1 var_48_arg_0 = var_46; [L254] SORT_44 var_48_arg_1 = var_45; [L255] SORT_47 var_48 = ((SORT_47)var_48_arg_0 << 24) | var_48_arg_1; [L256] var_48 = var_48 & mask_SORT_47 [L257] SORT_1 var_51_arg_0 = var_49; [L258] SORT_47 var_51_arg_1 = var_48; [L259] SORT_50 var_51 = ((SORT_50)var_51_arg_0 << 25) | var_51_arg_1; [L260] var_51 = var_51 & mask_SORT_50 [L261] SORT_1 var_54_arg_0 = var_52; [L262] SORT_50 var_54_arg_1 = var_51; [L263] SORT_53 var_54 = ((SORT_53)var_54_arg_0 << 26) | var_54_arg_1; [L264] var_54 = var_54 & mask_SORT_53 [L265] SORT_1 var_57_arg_0 = var_55; [L266] SORT_53 var_57_arg_1 = var_54; [L267] SORT_56 var_57 = ((SORT_56)var_57_arg_0 << 27) | var_57_arg_1; [L268] var_57 = var_57 & mask_SORT_56 [L269] SORT_1 var_60_arg_0 = var_58; [L270] SORT_56 var_60_arg_1 = var_57; [L271] SORT_59 var_60 = ((SORT_59)var_60_arg_0 << 28) | var_60_arg_1; [L272] var_60 = var_60 & mask_SORT_59 [L273] SORT_1 var_63_arg_0 = var_61; [L274] SORT_59 var_63_arg_1 = var_60; [L275] SORT_62 var_63 = ((SORT_62)var_63_arg_0 << 29) | var_63_arg_1; [L276] var_63 = var_63 & mask_SORT_62 [L277] SORT_1 var_65_arg_0 = var_64; [L278] SORT_62 var_65_arg_1 = var_63; [L279] SORT_9 var_65 = ((SORT_9)var_65_arg_0 << 30) | var_65_arg_1; [L280] SORT_9 var_66_arg_0 = var_65; [L281] var_66_arg_0 = var_66_arg_0 & mask_SORT_9 [L282] SORT_20 var_66 = var_66_arg_0; [L283] SORT_20 var_67_arg_0 = var_21; [L284] SORT_20 var_67_arg_1 = var_66; [L285] SORT_1 var_67 = var_67_arg_0 <= var_67_arg_1; [L286] SORT_1 var_68_arg_0 = var_67; [L287] SORT_1 var_68_arg_1 = var_8; [L288] SORT_1 var_68_arg_2 = var_7; [L289] SORT_1 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L290] SORT_1 var_69_arg_0 = input_3; [L291] SORT_1 var_69_arg_1 = var_68; [L292] SORT_1 var_69 = var_69_arg_0 ^ var_69_arg_1; [L293] SORT_1 var_70_arg_0 = var_69; [L294] SORT_1 var_70 = ~var_70_arg_0; [L295] SORT_1 var_79_arg_0 = var_78; [L296] SORT_1 var_79_arg_1 = var_70; [L297] SORT_1 var_79_arg_2 = var_8; [L298] SORT_1 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L299] SORT_1 var_80_arg_0 = var_79; [L300] SORT_1 var_80 = ~var_80_arg_0; [L301] SORT_1 var_81_arg_0 = var_79; [L302] SORT_1 var_81 = ~var_81_arg_0; [L303] SORT_1 var_82_arg_0 = var_80; [L304] SORT_1 var_82_arg_1 = var_81; [L305] SORT_1 var_82 = var_82_arg_0 & var_82_arg_1; [L306] var_82 = var_82 & mask_SORT_1 [L307] SORT_1 bad_83_arg_0 = var_82; [L308] CALL __VERIFIER_assert(!(bad_83_arg_0)) [L20] COND TRUE !(cond) VAL [\old(cond)=0, cond=0] [L20] reach_error() VAL [\old(cond)=0, cond=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 2 procedures, 13 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 2.8s, OverallIterations: 1, TraceHistogramMax: 2, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: , PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=13occurred in iteration=0, InterpolantAutomatonStates: 0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 1.5s SatisfiabilityAnalysisTime, 0.0s InterpolantComputationTime, 12 NumberOfCodeBlocks, 12 NumberOfCodeBlocksAsserted, 1 NumberOfCheckSat, 0 ConstructedInterpolants, 0 QuantifiedInterpolants, 0 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 0 InterpolantComputations, 0 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2022-11-20 18:58:13,559 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.safe_analog_estimation_convergence.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/config/svcomp-Reach-64bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9 --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 4de94aaabb885b39de7c063dad9a583cbef1a5037a721fe952ddb512087f6e33 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-6b4ec56 [2022-11-20 18:58:16,071 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-20 18:58:16,073 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-20 18:58:16,114 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-20 18:58:16,114 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-20 18:58:16,118 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-20 18:58:16,121 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-20 18:58:16,124 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-20 18:58:16,127 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-20 18:58:16,133 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-20 18:58:16,134 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-20 18:58:16,137 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-20 18:58:16,137 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-20 18:58:16,139 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-20 18:58:16,141 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-20 18:58:16,147 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-20 18:58:16,148 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-20 18:58:16,149 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-20 18:58:16,151 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-20 18:58:16,152 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-20 18:58:16,154 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-20 18:58:16,157 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-20 18:58:16,158 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-20 18:58:16,159 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-20 18:58:16,172 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-20 18:58:16,173 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-20 18:58:16,173 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-20 18:58:16,177 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-20 18:58:16,178 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-20 18:58:16,179 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-20 18:58:16,179 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-20 18:58:16,181 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-20 18:58:16,182 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-20 18:58:16,183 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-20 18:58:16,184 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-20 18:58:16,184 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-20 18:58:16,185 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-20 18:58:16,185 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-20 18:58:16,186 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-20 18:58:16,187 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-20 18:58:16,187 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-20 18:58:16,192 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/config/svcomp-Reach-64bit-Taipan_Bitvector.epf [2022-11-20 18:58:16,239 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-20 18:58:16,247 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-20 18:58:16,248 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-20 18:58:16,249 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-20 18:58:16,250 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-20 18:58:16,250 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-20 18:58:16,250 INFO L138 SettingsManager]: * User list type=DISABLED [2022-11-20 18:58:16,251 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-11-20 18:58:16,251 INFO L138 SettingsManager]: * Explicit value domain=true [2022-11-20 18:58:16,251 INFO L138 SettingsManager]: * Octagon Domain=false [2022-11-20 18:58:16,252 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-11-20 18:58:16,253 INFO L138 SettingsManager]: * Interval Domain=false [2022-11-20 18:58:16,253 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-20 18:58:16,254 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-20 18:58:16,254 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-20 18:58:16,254 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-20 18:58:16,254 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-20 18:58:16,255 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-11-20 18:58:16,255 INFO L138 SettingsManager]: * Use bitvectors instead of ints=true [2022-11-20 18:58:16,256 INFO L138 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2022-11-20 18:58:16,256 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-20 18:58:16,256 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-20 18:58:16,256 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-20 18:58:16,257 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-20 18:58:16,257 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-20 18:58:16,257 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-20 18:58:16,257 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-20 18:58:16,258 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-20 18:58:16,258 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-20 18:58:16,258 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-20 18:58:16,259 INFO L138 SettingsManager]: * Trace refinement strategy=WALRUS [2022-11-20 18:58:16,259 INFO L138 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2022-11-20 18:58:16,259 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-20 18:58:16,260 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-11-20 18:58:16,260 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-11-20 18:58:16,260 INFO L138 SettingsManager]: * Logic for external solver=AUFBV WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 4de94aaabb885b39de7c063dad9a583cbef1a5037a721fe952ddb512087f6e33 [2022-11-20 18:58:16,674 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-20 18:58:16,706 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-20 18:58:16,710 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-20 18:58:16,711 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-20 18:58:16,711 INFO L275 PluginConnector]: CDTParser initialized [2022-11-20 18:58:16,713 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.safe_analog_estimation_convergence.c [2022-11-20 18:58:19,973 INFO L500 CDTParser]: Created temporary CDT project at NULL [2022-11-20 18:58:20,278 INFO L351 CDTParser]: Found 1 translation units. [2022-11-20 18:58:20,279 INFO L172 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.safe_analog_estimation_convergence.c [2022-11-20 18:58:20,294 INFO L394 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/data/68c5c79ff/ec51ad5345d14f909fb5c46a2215f53c/FLAGebe691640 [2022-11-20 18:58:20,308 INFO L402 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/data/68c5c79ff/ec51ad5345d14f909fb5c46a2215f53c [2022-11-20 18:58:20,311 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-20 18:58:20,312 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-20 18:58:20,314 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-20 18:58:20,314 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-20 18:58:20,318 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-20 18:58:20,319 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.11 06:58:20" (1/1) ... [2022-11-20 18:58:20,320 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7a281eb2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:58:20, skipping insertion in model container [2022-11-20 18:58:20,320 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.11 06:58:20" (1/1) ... [2022-11-20 18:58:20,328 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-20 18:58:20,367 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-20 18:58:20,516 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.safe_analog_estimation_convergence.c[1120,1133] [2022-11-20 18:58:20,671 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-20 18:58:20,676 INFO L203 MainTranslator]: Completed pre-run [2022-11-20 18:58:20,690 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.safe_analog_estimation_convergence.c[1120,1133] [2022-11-20 18:58:20,846 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-20 18:58:20,859 INFO L208 MainTranslator]: Completed translation [2022-11-20 18:58:20,859 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:58:20 WrapperNode [2022-11-20 18:58:20,859 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-20 18:58:20,861 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-20 18:58:20,861 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-20 18:58:20,861 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-20 18:58:20,868 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:58:20" (1/1) ... [2022-11-20 18:58:20,886 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:58:20" (1/1) ... [2022-11-20 18:58:20,951 INFO L138 Inliner]: procedures = 11, calls = 5, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 413 [2022-11-20 18:58:20,952 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-20 18:58:20,953 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-20 18:58:20,953 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-20 18:58:20,953 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-20 18:58:20,962 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:58:20" (1/1) ... [2022-11-20 18:58:20,964 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:58:20" (1/1) ... [2022-11-20 18:58:20,981 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:58:20" (1/1) ... [2022-11-20 18:58:20,981 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:58:20" (1/1) ... [2022-11-20 18:58:21,008 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:58:20" (1/1) ... [2022-11-20 18:58:21,011 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:58:20" (1/1) ... [2022-11-20 18:58:21,014 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:58:20" (1/1) ... [2022-11-20 18:58:21,016 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:58:20" (1/1) ... [2022-11-20 18:58:21,037 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-20 18:58:21,038 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-20 18:58:21,038 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-20 18:58:21,038 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-20 18:58:21,039 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:58:20" (1/1) ... [2022-11-20 18:58:21,051 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-20 18:58:21,066 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/z3 [2022-11-20 18:58:21,083 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-20 18:58:21,096 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-20 18:58:21,130 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-20 18:58:21,131 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-20 18:58:21,131 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2022-11-20 18:58:21,132 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2022-11-20 18:58:21,332 INFO L235 CfgBuilder]: Building ICFG [2022-11-20 18:58:21,335 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-20 18:58:21,934 INFO L276 CfgBuilder]: Performing block encoding [2022-11-20 18:58:21,940 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-20 18:58:21,941 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-20 18:58:21,943 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.11 06:58:21 BoogieIcfgContainer [2022-11-20 18:58:21,943 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-20 18:58:21,945 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-20 18:58:21,945 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-20 18:58:21,949 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-20 18:58:21,949 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 20.11 06:58:20" (1/3) ... [2022-11-20 18:58:21,950 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3442f22 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.11 06:58:21, skipping insertion in model container [2022-11-20 18:58:21,950 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:58:20" (2/3) ... [2022-11-20 18:58:21,951 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3442f22 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.11 06:58:21, skipping insertion in model container [2022-11-20 18:58:21,951 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.11 06:58:21" (3/3) ... [2022-11-20 18:58:21,957 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.safe_analog_estimation_convergence.c [2022-11-20 18:58:21,989 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-20 18:58:21,990 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-20 18:58:22,047 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-20 18:58:22,054 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@350e406f, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-20 18:58:22,054 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-20 18:58:22,060 INFO L276 IsEmpty]: Start isEmpty. Operand has 19 states, 14 states have (on average 1.3571428571428572) internal successors, (19), 15 states have internal predecessors, (19), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-20 18:58:22,076 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-11-20 18:58:22,076 INFO L187 NwaCegarLoop]: Found error trace [2022-11-20 18:58:22,077 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-20 18:58:22,078 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-20 18:58:22,085 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-20 18:58:22,086 INFO L85 PathProgramCache]: Analyzing trace with hash -639607165, now seen corresponding path program 1 times [2022-11-20 18:58:22,109 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-20 18:58:22,110 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1336261432] [2022-11-20 18:58:22,110 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-20 18:58:22,110 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-20 18:58:22,111 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/mathsat [2022-11-20 18:58:22,118 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-20 18:58:22,157 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (2)] Waiting until timeout for monitored process [2022-11-20 18:58:22,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-20 18:58:22,383 INFO L263 TraceCheckSpWp]: Trace formula consists of 242 conjuncts, 1 conjunts are in the unsatisfiable core [2022-11-20 18:58:22,389 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-20 18:58:22,422 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-20 18:58:22,423 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-20 18:58:22,424 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-20 18:58:22,425 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1336261432] [2022-11-20 18:58:22,426 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1336261432] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-20 18:58:22,426 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-20 18:58:22,427 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-20 18:58:22,428 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1866279920] [2022-11-20 18:58:22,429 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-20 18:58:22,432 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2022-11-20 18:58:22,433 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-20 18:58:22,463 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2022-11-20 18:58:22,464 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2022-11-20 18:58:22,466 INFO L87 Difference]: Start difference. First operand has 19 states, 14 states have (on average 1.3571428571428572) internal successors, (19), 15 states have internal predecessors, (19), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand has 2 states, 2 states have (on average 6.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-20 18:58:22,485 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-20 18:58:22,485 INFO L93 Difference]: Finished difference Result 32 states and 43 transitions. [2022-11-20 18:58:22,486 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-20 18:58:22,488 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 6.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) Word has length 17 [2022-11-20 18:58:22,488 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-20 18:58:22,495 INFO L225 Difference]: With dead ends: 32 [2022-11-20 18:58:22,496 INFO L226 Difference]: Without dead ends: 15 [2022-11-20 18:58:22,499 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2022-11-20 18:58:22,502 INFO L413 NwaCegarLoop]: 16 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 16 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-20 18:58:22,503 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-20 18:58:22,522 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states. [2022-11-20 18:58:22,545 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 15. [2022-11-20 18:58:22,547 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 11 states have (on average 1.0909090909090908) internal successors, (12), 11 states have internal predecessors, (12), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-20 18:58:22,548 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 16 transitions. [2022-11-20 18:58:22,549 INFO L78 Accepts]: Start accepts. Automaton has 15 states and 16 transitions. Word has length 17 [2022-11-20 18:58:22,549 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-20 18:58:22,550 INFO L495 AbstractCegarLoop]: Abstraction has 15 states and 16 transitions. [2022-11-20 18:58:22,550 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 6.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-20 18:58:22,550 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 16 transitions. [2022-11-20 18:58:22,552 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-11-20 18:58:22,552 INFO L187 NwaCegarLoop]: Found error trace [2022-11-20 18:58:22,553 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-20 18:58:22,569 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (2)] Ended with exit code 0 [2022-11-20 18:58:22,764 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-20 18:58:22,765 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-20 18:58:22,765 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-20 18:58:22,765 INFO L85 PathProgramCache]: Analyzing trace with hash -324183425, now seen corresponding path program 1 times [2022-11-20 18:58:22,766 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-20 18:58:22,766 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [920104801] [2022-11-20 18:58:22,767 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-20 18:58:22,767 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-20 18:58:22,767 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/mathsat [2022-11-20 18:58:22,794 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-20 18:58:22,796 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (3)] Waiting until timeout for monitored process [2022-11-20 18:58:22,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-20 18:58:22,987 INFO L263 TraceCheckSpWp]: Trace formula consists of 242 conjuncts, 18 conjunts are in the unsatisfiable core [2022-11-20 18:58:22,991 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-20 18:58:23,243 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-11-20 18:58:23,244 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-20 18:58:23,244 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-20 18:58:23,244 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [920104801] [2022-11-20 18:58:23,245 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [920104801] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-20 18:58:23,245 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-20 18:58:23,245 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-20 18:58:23,246 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1564160292] [2022-11-20 18:58:23,246 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-20 18:58:23,247 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-20 18:58:23,248 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-20 18:58:23,248 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-20 18:58:23,249 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-20 18:58:23,249 INFO L87 Difference]: Start difference. First operand 15 states and 16 transitions. Second operand has 4 states, 4 states have (on average 2.5) internal successors, (10), 4 states have internal predecessors, (10), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-11-20 18:58:23,447 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-20 18:58:23,447 INFO L93 Difference]: Finished difference Result 29 states and 34 transitions. [2022-11-20 18:58:23,447 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-20 18:58:23,448 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.5) internal successors, (10), 4 states have internal predecessors, (10), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 17 [2022-11-20 18:58:23,448 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-20 18:58:23,449 INFO L225 Difference]: With dead ends: 29 [2022-11-20 18:58:23,449 INFO L226 Difference]: Without dead ends: 27 [2022-11-20 18:58:23,450 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-20 18:58:23,451 INFO L413 NwaCegarLoop]: 20 mSDtfsCounter, 6 mSDsluCounter, 30 mSDsCounter, 0 mSdLazyCounter, 14 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 8 SdHoareTripleChecker+Valid, 50 SdHoareTripleChecker+Invalid, 14 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 14 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-20 18:58:23,451 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [8 Valid, 50 Invalid, 14 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 14 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-20 18:58:23,452 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2022-11-20 18:58:23,459 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 21. [2022-11-20 18:58:23,460 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 15 states have (on average 1.0666666666666667) internal successors, (16), 15 states have internal predecessors, (16), 4 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-11-20 18:58:23,461 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 24 transitions. [2022-11-20 18:58:23,461 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 24 transitions. Word has length 17 [2022-11-20 18:58:23,462 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-20 18:58:23,462 INFO L495 AbstractCegarLoop]: Abstraction has 21 states and 24 transitions. [2022-11-20 18:58:23,462 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.5) internal successors, (10), 4 states have internal predecessors, (10), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-11-20 18:58:23,462 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 24 transitions. [2022-11-20 18:58:23,463 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-11-20 18:58:23,464 INFO L187 NwaCegarLoop]: Found error trace [2022-11-20 18:58:23,464 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 4, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2022-11-20 18:58:23,483 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (3)] Forceful destruction successful, exit code 0 [2022-11-20 18:58:23,677 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-20 18:58:23,677 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-20 18:58:23,678 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-20 18:58:23,678 INFO L85 PathProgramCache]: Analyzing trace with hash 322101155, now seen corresponding path program 1 times [2022-11-20 18:58:23,679 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-20 18:58:23,680 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [236322] [2022-11-20 18:58:23,680 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-20 18:58:23,680 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-20 18:58:23,680 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/mathsat [2022-11-20 18:58:23,681 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-20 18:58:23,683 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (4)] Waiting until timeout for monitored process [2022-11-20 18:58:24,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-20 18:58:24,058 INFO L263 TraceCheckSpWp]: Trace formula consists of 528 conjuncts, 30 conjunts are in the unsatisfiable core [2022-11-20 18:58:24,063 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-20 18:58:24,548 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-11-20 18:58:24,548 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-20 18:58:24,807 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-20 18:58:24,807 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [236322] [2022-11-20 18:58:24,811 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [236322] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-20 18:58:24,812 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [725657466] [2022-11-20 18:58:24,812 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-20 18:58:24,812 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-20 18:58:24,812 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/cvc4 [2022-11-20 18:58:24,815 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-20 18:58:24,834 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/cvc4 --incremental --print-success --lang smt (5)] Waiting until timeout for monitored process [2022-11-20 18:58:25,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-20 18:58:25,418 INFO L263 TraceCheckSpWp]: Trace formula consists of 528 conjuncts, 32 conjunts are in the unsatisfiable core [2022-11-20 18:58:25,423 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-20 18:58:25,769 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-11-20 18:58:25,770 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-20 18:58:25,914 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [725657466] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-20 18:58:25,914 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1608614451] [2022-11-20 18:58:25,914 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-20 18:58:25,914 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-20 18:58:25,915 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/z3 [2022-11-20 18:58:25,918 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-20 18:58:25,942 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-11-20 18:58:26,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-20 18:58:26,222 INFO L263 TraceCheckSpWp]: Trace formula consists of 528 conjuncts, 33 conjunts are in the unsatisfiable core [2022-11-20 18:58:26,227 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-20 18:58:26,547 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-11-20 18:58:26,548 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-20 18:58:26,687 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1608614451] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-20 18:58:26,688 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-20 18:58:26,688 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 6] total 6 [2022-11-20 18:58:26,688 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1410074378] [2022-11-20 18:58:26,688 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-20 18:58:26,689 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-20 18:58:26,689 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-20 18:58:26,689 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-20 18:58:26,690 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2022-11-20 18:58:26,690 INFO L87 Difference]: Start difference. First operand 21 states and 24 transitions. Second operand has 6 states, 6 states have (on average 2.8333333333333335) internal successors, (17), 6 states have internal predecessors, (17), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-11-20 18:58:26,950 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-20 18:58:26,950 INFO L93 Difference]: Finished difference Result 32 states and 37 transitions. [2022-11-20 18:58:26,951 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-20 18:58:26,952 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 2.8333333333333335) internal successors, (17), 6 states have internal predecessors, (17), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 32 [2022-11-20 18:58:26,952 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-20 18:58:26,953 INFO L225 Difference]: With dead ends: 32 [2022-11-20 18:58:26,953 INFO L226 Difference]: Without dead ends: 30 [2022-11-20 18:58:26,953 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 107 GetRequests, 97 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=35, Invalid=55, Unknown=0, NotChecked=0, Total=90 [2022-11-20 18:58:26,954 INFO L413 NwaCegarLoop]: 15 mSDtfsCounter, 8 mSDsluCounter, 35 mSDsCounter, 0 mSdLazyCounter, 22 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 8 SdHoareTripleChecker+Valid, 50 SdHoareTripleChecker+Invalid, 37 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 22 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 15 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-20 18:58:26,955 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [8 Valid, 50 Invalid, 37 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 22 Invalid, 0 Unknown, 15 Unchecked, 0.2s Time] [2022-11-20 18:58:26,956 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2022-11-20 18:58:26,961 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 28. [2022-11-20 18:58:26,962 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 20 states have (on average 1.05) internal successors, (21), 20 states have internal predecessors, (21), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-11-20 18:58:26,963 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 33 transitions. [2022-11-20 18:58:26,963 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 33 transitions. Word has length 32 [2022-11-20 18:58:26,964 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-20 18:58:26,964 INFO L495 AbstractCegarLoop]: Abstraction has 28 states and 33 transitions. [2022-11-20 18:58:26,964 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 2.8333333333333335) internal successors, (17), 6 states have internal predecessors, (17), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-11-20 18:58:26,964 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 33 transitions. [2022-11-20 18:58:26,965 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2022-11-20 18:58:26,966 INFO L187 NwaCegarLoop]: Found error trace [2022-11-20 18:58:26,966 INFO L195 NwaCegarLoop]: trace histogram [6, 6, 6, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1] [2022-11-20 18:58:26,982 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (4)] Forceful destruction successful, exit code 0 [2022-11-20 18:58:27,185 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/cvc4 --incremental --print-success --lang smt (5)] Forceful destruction successful, exit code 0 [2022-11-20 18:58:27,388 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-11-20 18:58:27,581 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/cvc4 --incremental --print-success --lang smt,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-20 18:58:27,582 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-20 18:58:27,582 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-20 18:58:27,582 INFO L85 PathProgramCache]: Analyzing trace with hash -220860929, now seen corresponding path program 2 times [2022-11-20 18:58:27,584 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-20 18:58:27,584 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1558179441] [2022-11-20 18:58:27,584 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-20 18:58:27,584 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-20 18:58:27,584 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/mathsat [2022-11-20 18:58:27,586 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-20 18:58:27,607 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (7)] Waiting until timeout for monitored process [2022-11-20 18:58:28,022 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-20 18:58:28,022 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-20 18:58:28,042 INFO L263 TraceCheckSpWp]: Trace formula consists of 814 conjuncts, 37 conjunts are in the unsatisfiable core [2022-11-20 18:58:28,048 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-20 18:58:28,574 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 0 proven. 19 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-11-20 18:58:28,575 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-20 18:58:28,789 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-20 18:58:28,789 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1558179441] [2022-11-20 18:58:28,789 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1558179441] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-20 18:58:28,790 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [46359402] [2022-11-20 18:58:28,790 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-20 18:58:28,790 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-20 18:58:28,790 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/cvc4 [2022-11-20 18:58:28,791 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-20 18:58:28,822 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/cvc4 --incremental --print-success --lang smt (8)] Waiting until timeout for monitored process [2022-11-20 18:58:29,605 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-20 18:58:29,605 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-20 18:58:29,620 INFO L263 TraceCheckSpWp]: Trace formula consists of 814 conjuncts, 40 conjunts are in the unsatisfiable core [2022-11-20 18:58:29,625 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-20 18:58:30,088 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 0 proven. 19 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-11-20 18:58:30,089 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-20 18:58:30,213 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [46359402] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-20 18:58:30,213 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [125792002] [2022-11-20 18:58:30,213 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-20 18:58:30,213 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-20 18:58:30,214 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/z3 [2022-11-20 18:58:30,218 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-20 18:58:30,246 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-11-20 18:58:30,594 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-20 18:58:30,594 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-20 18:58:30,609 INFO L263 TraceCheckSpWp]: Trace formula consists of 814 conjuncts, 40 conjunts are in the unsatisfiable core [2022-11-20 18:58:30,614 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-20 18:58:31,172 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 0 proven. 19 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-11-20 18:58:31,178 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-20 18:58:31,309 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [125792002] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-20 18:58:31,310 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-20 18:58:31,310 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 7] total 7 [2022-11-20 18:58:31,310 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1494794284] [2022-11-20 18:58:31,310 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-20 18:58:31,311 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-20 18:58:31,311 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-20 18:58:31,312 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-20 18:58:31,312 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2022-11-20 18:58:31,312 INFO L87 Difference]: Start difference. First operand 28 states and 33 transitions. Second operand has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 7 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2022-11-20 18:58:31,828 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-20 18:58:31,828 INFO L93 Difference]: Finished difference Result 39 states and 46 transitions. [2022-11-20 18:58:31,829 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-20 18:58:31,829 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 7 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 47 [2022-11-20 18:58:31,829 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-20 18:58:31,830 INFO L225 Difference]: With dead ends: 39 [2022-11-20 18:58:31,830 INFO L226 Difference]: Without dead ends: 37 [2022-11-20 18:58:31,830 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 153 GetRequests, 141 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=44, Invalid=88, Unknown=0, NotChecked=0, Total=132 [2022-11-20 18:58:31,831 INFO L413 NwaCegarLoop]: 19 mSDtfsCounter, 10 mSDsluCounter, 65 mSDsCounter, 0 mSdLazyCounter, 45 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 10 SdHoareTripleChecker+Valid, 84 SdHoareTripleChecker+Invalid, 69 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 45 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 21 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-11-20 18:58:31,831 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [10 Valid, 84 Invalid, 69 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 45 Invalid, 0 Unknown, 21 Unchecked, 0.4s Time] [2022-11-20 18:58:31,832 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2022-11-20 18:58:31,840 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 35. [2022-11-20 18:58:31,840 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 25 states have (on average 1.04) internal successors, (26), 25 states have internal predecessors, (26), 8 states have call successors, (8), 1 states have call predecessors, (8), 1 states have return successors, (8), 8 states have call predecessors, (8), 8 states have call successors, (8) [2022-11-20 18:58:31,841 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 42 transitions. [2022-11-20 18:58:31,842 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 42 transitions. Word has length 47 [2022-11-20 18:58:31,842 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-20 18:58:31,842 INFO L495 AbstractCegarLoop]: Abstraction has 35 states and 42 transitions. [2022-11-20 18:58:31,842 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 7 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2022-11-20 18:58:31,843 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 42 transitions. [2022-11-20 18:58:31,844 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2022-11-20 18:58:31,847 INFO L187 NwaCegarLoop]: Found error trace [2022-11-20 18:58:31,847 INFO L195 NwaCegarLoop]: trace histogram [8, 8, 8, 4, 4, 4, 4, 4, 4, 4, 3, 3, 1, 1, 1, 1] [2022-11-20 18:58:31,860 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/cvc4 --incremental --print-success --lang smt (8)] Forceful destruction successful, exit code 0 [2022-11-20 18:58:32,072 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (7)] Ended with exit code 0 [2022-11-20 18:58:32,270 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2022-11-20 18:58:32,461 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/cvc4 --incremental --print-success --lang smt,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3,9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-20 18:58:32,461 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-20 18:58:32,462 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-20 18:58:32,462 INFO L85 PathProgramCache]: Analyzing trace with hash -2090804189, now seen corresponding path program 3 times [2022-11-20 18:58:32,464 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-20 18:58:32,464 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1549066122] [2022-11-20 18:58:32,464 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-20 18:58:32,464 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-20 18:58:32,464 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/mathsat [2022-11-20 18:58:32,465 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-20 18:58:32,486 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (10)] Waiting until timeout for monitored process [2022-11-20 18:58:33,058 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2022-11-20 18:58:33,059 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-20 18:58:33,089 INFO L263 TraceCheckSpWp]: Trace formula consists of 1077 conjuncts, 45 conjunts are in the unsatisfiable core [2022-11-20 18:58:33,095 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-20 18:58:33,797 INFO L134 CoverageAnalysis]: Checked inductivity of 151 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2022-11-20 18:58:33,798 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-20 18:58:33,990 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-20 18:58:33,990 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1549066122] [2022-11-20 18:58:33,991 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1549066122] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-20 18:58:33,991 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1473358118] [2022-11-20 18:58:33,991 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-20 18:58:33,991 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-20 18:58:33,991 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/cvc4 [2022-11-20 18:58:33,994 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-20 18:58:34,018 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/cvc4 --incremental --print-success --lang smt (11)] Waiting until timeout for monitored process [2022-11-20 18:58:35,047 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2022-11-20 18:58:35,048 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-20 18:58:35,090 INFO L263 TraceCheckSpWp]: Trace formula consists of 1077 conjuncts, 51 conjunts are in the unsatisfiable core [2022-11-20 18:58:35,094 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-20 18:58:35,706 INFO L134 CoverageAnalysis]: Checked inductivity of 151 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2022-11-20 18:58:35,706 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-20 18:58:35,828 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1473358118] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-20 18:58:35,828 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [35564676] [2022-11-20 18:58:35,828 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-20 18:58:35,828 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-20 18:58:35,828 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/z3 [2022-11-20 18:58:35,830 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-20 18:58:35,854 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-11-20 18:58:36,393 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2022-11-20 18:58:36,393 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-20 18:58:36,414 INFO L263 TraceCheckSpWp]: Trace formula consists of 1077 conjuncts, 47 conjunts are in the unsatisfiable core [2022-11-20 18:58:36,420 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-20 18:58:37,178 INFO L134 CoverageAnalysis]: Checked inductivity of 151 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2022-11-20 18:58:37,178 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-20 18:58:37,329 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [35564676] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-20 18:58:37,329 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-20 18:58:37,329 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 8] total 12 [2022-11-20 18:58:37,330 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1189489001] [2022-11-20 18:58:37,330 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-20 18:58:37,331 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-11-20 18:58:37,331 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-20 18:58:37,331 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-11-20 18:58:37,332 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=138, Unknown=0, NotChecked=0, Total=182 [2022-11-20 18:58:37,333 INFO L87 Difference]: Start difference. First operand 35 states and 42 transitions. Second operand has 12 states, 12 states have (on average 3.6666666666666665) internal successors, (44), 12 states have internal predecessors, (44), 8 states have call successors, (16), 1 states have call predecessors, (16), 1 states have return successors, (16), 8 states have call predecessors, (16), 8 states have call successors, (16) [2022-11-20 18:58:38,118 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-20 18:58:38,118 INFO L93 Difference]: Finished difference Result 50 states and 61 transitions. [2022-11-20 18:58:38,118 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-20 18:58:38,118 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 3.6666666666666665) internal successors, (44), 12 states have internal predecessors, (44), 8 states have call successors, (16), 1 states have call predecessors, (16), 1 states have return successors, (16), 8 states have call predecessors, (16), 8 states have call successors, (16) Word has length 62 [2022-11-20 18:58:38,119 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-20 18:58:38,120 INFO L225 Difference]: With dead ends: 50 [2022-11-20 18:58:38,120 INFO L226 Difference]: Without dead ends: 48 [2022-11-20 18:58:38,120 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 200 GetRequests, 182 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=75, Invalid=231, Unknown=0, NotChecked=0, Total=306 [2022-11-20 18:58:38,121 INFO L413 NwaCegarLoop]: 27 mSDtfsCounter, 28 mSDsluCounter, 56 mSDsCounter, 0 mSdLazyCounter, 111 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 30 SdHoareTripleChecker+Valid, 83 SdHoareTripleChecker+Invalid, 137 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 111 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 16 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-11-20 18:58:38,121 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [30 Valid, 83 Invalid, 137 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 111 Invalid, 0 Unknown, 16 Unchecked, 0.6s Time] [2022-11-20 18:58:38,122 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2022-11-20 18:58:38,131 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 42. [2022-11-20 18:58:38,132 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 30 states have (on average 1.0333333333333334) internal successors, (31), 30 states have internal predecessors, (31), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-11-20 18:58:38,133 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 51 transitions. [2022-11-20 18:58:38,133 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 51 transitions. Word has length 62 [2022-11-20 18:58:38,134 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-20 18:58:38,134 INFO L495 AbstractCegarLoop]: Abstraction has 42 states and 51 transitions. [2022-11-20 18:58:38,134 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 3.6666666666666665) internal successors, (44), 12 states have internal predecessors, (44), 8 states have call successors, (16), 1 states have call predecessors, (16), 1 states have return successors, (16), 8 states have call predecessors, (16), 8 states have call successors, (16) [2022-11-20 18:58:38,134 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 51 transitions. [2022-11-20 18:58:38,136 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2022-11-20 18:58:38,136 INFO L187 NwaCegarLoop]: Found error trace [2022-11-20 18:58:38,136 INFO L195 NwaCegarLoop]: trace histogram [10, 10, 10, 5, 5, 5, 5, 5, 5, 5, 4, 4, 1, 1, 1, 1] [2022-11-20 18:58:38,150 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-11-20 18:58:38,350 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (10)] Forceful destruction successful, exit code 0 [2022-11-20 18:58:38,543 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/cvc4 --incremental --print-success --lang smt (11)] Forceful destruction successful, exit code 0 [2022-11-20 18:58:38,737 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/z3 -smt2 -in SMTLIB2_COMPLIANT=true,10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3,11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/cvc4 --incremental --print-success --lang smt [2022-11-20 18:58:38,737 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-20 18:58:38,737 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-20 18:58:38,738 INFO L85 PathProgramCache]: Analyzing trace with hash -497065601, now seen corresponding path program 4 times [2022-11-20 18:58:38,739 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-20 18:58:38,739 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [385954417] [2022-11-20 18:58:38,739 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-20 18:58:38,739 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-20 18:58:38,739 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/mathsat [2022-11-20 18:58:38,741 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-20 18:58:38,750 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (13)] Waiting until timeout for monitored process [2022-11-20 18:58:39,339 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-20 18:58:39,339 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-20 18:58:39,382 INFO L263 TraceCheckSpWp]: Trace formula consists of 1386 conjuncts, 52 conjunts are in the unsatisfiable core [2022-11-20 18:58:39,386 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-20 18:58:40,252 INFO L134 CoverageAnalysis]: Checked inductivity of 246 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2022-11-20 18:58:40,253 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-20 18:58:40,483 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-20 18:58:40,483 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [385954417] [2022-11-20 18:58:40,483 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [385954417] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-20 18:58:40,483 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1139319425] [2022-11-20 18:58:40,484 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-20 18:58:40,484 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-20 18:58:40,484 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/cvc4 [2022-11-20 18:58:40,490 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-20 18:58:40,511 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/cvc4 --incremental --print-success --lang smt (14)] Waiting until timeout for monitored process [2022-11-20 18:58:41,618 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-20 18:58:41,618 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-20 18:58:41,662 INFO L263 TraceCheckSpWp]: Trace formula consists of 1386 conjuncts, 54 conjunts are in the unsatisfiable core [2022-11-20 18:58:41,668 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-20 18:58:42,339 INFO L134 CoverageAnalysis]: Checked inductivity of 246 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2022-11-20 18:58:42,339 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-20 18:58:42,487 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1139319425] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-20 18:58:42,487 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [305390477] [2022-11-20 18:58:42,488 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-20 18:58:42,488 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-20 18:58:42,488 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/z3 [2022-11-20 18:58:42,489 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-20 18:58:42,523 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-11-20 18:58:43,002 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-20 18:58:43,002 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-20 18:58:43,028 INFO L263 TraceCheckSpWp]: Trace formula consists of 1386 conjuncts, 55 conjunts are in the unsatisfiable core [2022-11-20 18:58:43,056 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-20 18:58:43,797 INFO L134 CoverageAnalysis]: Checked inductivity of 246 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2022-11-20 18:58:43,797 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-20 18:58:43,965 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [305390477] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-20 18:58:43,965 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-20 18:58:43,965 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 9] total 9 [2022-11-20 18:58:43,966 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1110345198] [2022-11-20 18:58:43,966 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-20 18:58:43,966 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-11-20 18:58:43,966 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-20 18:58:43,967 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-11-20 18:58:43,967 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2022-11-20 18:58:43,967 INFO L87 Difference]: Start difference. First operand 42 states and 51 transitions. Second operand has 9 states, 9 states have (on average 3.5555555555555554) internal successors, (32), 9 states have internal predecessors, (32), 5 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 5 states have call predecessors, (10), 5 states have call successors, (10) [2022-11-20 18:58:45,111 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-20 18:58:45,112 INFO L93 Difference]: Finished difference Result 57 states and 70 transitions. [2022-11-20 18:58:45,112 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-20 18:58:45,113 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 3.5555555555555554) internal successors, (32), 9 states have internal predecessors, (32), 5 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 5 states have call predecessors, (10), 5 states have call successors, (10) Word has length 77 [2022-11-20 18:58:45,113 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-20 18:58:45,114 INFO L225 Difference]: With dead ends: 57 [2022-11-20 18:58:45,115 INFO L226 Difference]: Without dead ends: 55 [2022-11-20 18:58:45,115 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 245 GetRequests, 229 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=58, Invalid=182, Unknown=0, NotChecked=0, Total=240 [2022-11-20 18:58:45,116 INFO L413 NwaCegarLoop]: 31 mSDtfsCounter, 23 mSDsluCounter, 138 mSDsCounter, 0 mSdLazyCounter, 212 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 25 SdHoareTripleChecker+Valid, 169 SdHoareTripleChecker+Invalid, 224 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 212 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-11-20 18:58:45,116 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [25 Valid, 169 Invalid, 224 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 212 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2022-11-20 18:58:45,117 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2022-11-20 18:58:45,129 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 49. [2022-11-20 18:58:45,129 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 49 states, 35 states have (on average 1.0285714285714285) internal successors, (36), 35 states have internal predecessors, (36), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2022-11-20 18:58:45,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 60 transitions. [2022-11-20 18:58:45,130 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 60 transitions. Word has length 77 [2022-11-20 18:58:45,131 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-20 18:58:45,131 INFO L495 AbstractCegarLoop]: Abstraction has 49 states and 60 transitions. [2022-11-20 18:58:45,131 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 3.5555555555555554) internal successors, (32), 9 states have internal predecessors, (32), 5 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 5 states have call predecessors, (10), 5 states have call successors, (10) [2022-11-20 18:58:45,132 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 60 transitions. [2022-11-20 18:58:45,133 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2022-11-20 18:58:45,133 INFO L187 NwaCegarLoop]: Found error trace [2022-11-20 18:58:45,133 INFO L195 NwaCegarLoop]: trace histogram [12, 12, 12, 6, 6, 6, 6, 6, 6, 6, 5, 5, 1, 1, 1, 1] [2022-11-20 18:58:45,149 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Forceful destruction successful, exit code 0 [2022-11-20 18:58:45,345 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/cvc4 --incremental --print-success --lang smt (14)] Forceful destruction successful, exit code 0 [2022-11-20 18:58:45,553 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (13)] Forceful destruction successful, exit code 0 [2022-11-20 18:58:45,737 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 15 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/z3 -smt2 -in SMTLIB2_COMPLIANT=true,14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/cvc4 --incremental --print-success --lang smt,13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-20 18:58:45,738 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-20 18:58:45,738 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-20 18:58:45,738 INFO L85 PathProgramCache]: Analyzing trace with hash -1068369757, now seen corresponding path program 5 times [2022-11-20 18:58:45,740 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-20 18:58:45,740 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1849140532] [2022-11-20 18:58:45,740 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-20 18:58:45,741 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-20 18:58:45,741 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/mathsat [2022-11-20 18:58:45,742 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-20 18:58:45,750 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (16)] Waiting until timeout for monitored process [2022-11-20 18:58:46,708 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 9 check-sat command(s) [2022-11-20 18:58:46,708 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-20 18:58:46,756 INFO L263 TraceCheckSpWp]: Trace formula consists of 1672 conjuncts, 59 conjunts are in the unsatisfiable core [2022-11-20 18:58:46,761 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-20 18:58:47,852 INFO L134 CoverageAnalysis]: Checked inductivity of 364 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 264 trivial. 0 not checked. [2022-11-20 18:58:47,852 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-20 18:58:48,066 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-20 18:58:48,066 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1849140532] [2022-11-20 18:58:48,066 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1849140532] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-20 18:58:48,066 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [535861644] [2022-11-20 18:58:48,066 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-20 18:58:48,066 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-20 18:58:48,067 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/cvc4 [2022-11-20 18:58:48,067 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-20 18:58:48,069 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/cvc4 --incremental --print-success --lang smt (17)] Waiting until timeout for monitored process [2022-11-20 18:58:51,555 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 9 check-sat command(s) [2022-11-20 18:58:51,555 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-20 18:58:51,626 INFO L263 TraceCheckSpWp]: Trace formula consists of 1672 conjuncts, 64 conjunts are in the unsatisfiable core [2022-11-20 18:58:51,631 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-20 18:58:52,514 INFO L134 CoverageAnalysis]: Checked inductivity of 364 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 264 trivial. 0 not checked. [2022-11-20 18:58:52,514 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-20 18:58:52,652 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [535861644] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-20 18:58:52,652 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [192989112] [2022-11-20 18:58:52,652 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-20 18:58:52,652 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-20 18:58:52,652 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/z3 [2022-11-20 18:58:52,653 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-20 18:58:52,656 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-11-20 18:58:58,256 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 9 check-sat command(s) [2022-11-20 18:58:58,256 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-20 18:58:58,291 INFO L263 TraceCheckSpWp]: Trace formula consists of 1672 conjuncts, 70 conjunts are in the unsatisfiable core [2022-11-20 18:58:58,299 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-20 18:58:59,178 INFO L134 CoverageAnalysis]: Checked inductivity of 364 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 264 trivial. 0 not checked. [2022-11-20 18:58:59,179 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-20 18:58:59,333 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [192989112] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-20 18:58:59,334 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-20 18:58:59,334 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 10] total 10 [2022-11-20 18:58:59,334 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [477978750] [2022-11-20 18:58:59,334 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-20 18:58:59,335 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-11-20 18:58:59,335 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-20 18:58:59,336 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-11-20 18:58:59,336 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=102, Unknown=0, NotChecked=0, Total=132 [2022-11-20 18:58:59,336 INFO L87 Difference]: Start difference. First operand 49 states and 60 transitions. Second operand has 10 states, 10 states have (on average 3.7) internal successors, (37), 10 states have internal predecessors, (37), 6 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 6 states have call predecessors, (12), 6 states have call successors, (12) [2022-11-20 18:59:00,673 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-20 18:59:00,673 INFO L93 Difference]: Finished difference Result 64 states and 79 transitions. [2022-11-20 18:59:00,678 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-20 18:59:00,678 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 3.7) internal successors, (37), 10 states have internal predecessors, (37), 6 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 6 states have call predecessors, (12), 6 states have call successors, (12) Word has length 92 [2022-11-20 18:59:00,680 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-20 18:59:00,684 INFO L225 Difference]: With dead ends: 64 [2022-11-20 18:59:00,684 INFO L226 Difference]: Without dead ends: 62 [2022-11-20 18:59:00,686 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 291 GetRequests, 273 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=67, Invalid=239, Unknown=0, NotChecked=0, Total=306 [2022-11-20 18:59:00,686 INFO L413 NwaCegarLoop]: 35 mSDtfsCounter, 27 mSDsluCounter, 155 mSDsCounter, 0 mSdLazyCounter, 256 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 29 SdHoareTripleChecker+Valid, 190 SdHoareTripleChecker+Invalid, 271 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 256 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2022-11-20 18:59:00,687 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [29 Valid, 190 Invalid, 271 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 256 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2022-11-20 18:59:00,687 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62 states. [2022-11-20 18:59:00,701 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62 to 56. [2022-11-20 18:59:00,701 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 56 states, 40 states have (on average 1.025) internal successors, (41), 40 states have internal predecessors, (41), 14 states have call successors, (14), 1 states have call predecessors, (14), 1 states have return successors, (14), 14 states have call predecessors, (14), 14 states have call successors, (14) [2022-11-20 18:59:00,702 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 69 transitions. [2022-11-20 18:59:00,702 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 69 transitions. Word has length 92 [2022-11-20 18:59:00,703 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-20 18:59:00,703 INFO L495 AbstractCegarLoop]: Abstraction has 56 states and 69 transitions. [2022-11-20 18:59:00,703 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 3.7) internal successors, (37), 10 states have internal predecessors, (37), 6 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 6 states have call predecessors, (12), 6 states have call successors, (12) [2022-11-20 18:59:00,703 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 69 transitions. [2022-11-20 18:59:00,708 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2022-11-20 18:59:00,710 INFO L187 NwaCegarLoop]: Found error trace [2022-11-20 18:59:00,710 INFO L195 NwaCegarLoop]: trace histogram [14, 14, 14, 7, 7, 7, 7, 7, 7, 7, 6, 6, 1, 1, 1, 1] [2022-11-20 18:59:00,731 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Ended with exit code 0 [2022-11-20 18:59:00,928 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/cvc4 --incremental --print-success --lang smt (17)] Forceful destruction successful, exit code 0 [2022-11-20 18:59:01,137 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (16)] Forceful destruction successful, exit code 0 [2022-11-20 18:59:01,318 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 18 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/z3 -smt2 -in SMTLIB2_COMPLIANT=true,17 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/cvc4 --incremental --print-success --lang smt,16 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-20 18:59:01,318 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-20 18:59:01,319 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-20 18:59:01,319 INFO L85 PathProgramCache]: Analyzing trace with hash -1031686913, now seen corresponding path program 6 times [2022-11-20 18:59:01,321 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-20 18:59:01,321 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [937652900] [2022-11-20 18:59:01,321 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-11-20 18:59:01,321 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-20 18:59:01,321 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/mathsat [2022-11-20 18:59:01,323 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-20 18:59:01,329 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (19)] Waiting until timeout for monitored process [2022-11-20 18:59:02,615 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2022-11-20 18:59:02,615 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-20 18:59:02,673 INFO L263 TraceCheckSpWp]: Trace formula consists of 1935 conjuncts, 394 conjunts are in the unsatisfiable core [2022-11-20 18:59:02,688 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-20 18:59:38,491 WARN L230 Executor]: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1) with exit command (exit)) stderr output: (error "out of memory") [2022-11-20 18:59:38,491 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Ended with exit code 101 [2022-11-20 18:59:38,492 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-20 18:59:38,492 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [937652900] [2022-11-20 18:59:38,493 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_DEPENDING: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") [2022-11-20 18:59:38,493 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [529029557] [2022-11-20 18:59:38,493 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-11-20 18:59:38,493 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-20 18:59:38,493 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/cvc4 [2022-11-20 18:59:38,494 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-20 18:59:38,499 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/cvc4 --incremental --print-success --lang smt (20)] Waiting until timeout for monitored process [2022-11-20 18:59:38,600 FATAL L? ?]: Ignoring exception! de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1) with exit command (exit)) Connection to SMT solver broken at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.convertIOException(Executor.java:314) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.input(Executor.java:158) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Scriptor.declareFun(Scriptor.java:117) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.declareFun(WrapperScript.java:137) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.declareFun(WrapperScript.java:137) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.scripttransfer.HistoryRecordingScript.declareFun(HistoryRecordingScript.java:95) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.ManagedScript.declareFun(ManagedScript.java:172) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.variables.ProgramVarUtils.constructConstantForAuxVar(ProgramVarUtils.java:117) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.UnmodifiableTransFormula.computeClosedFormula(UnmodifiableTransFormula.java:135) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.UnmodifiableTransFormula.(UnmodifiableTransFormula.java:90) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaBuilder.finishConstruction(TransFormulaBuilder.java:320) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.decoupleArrayValues(TransFormulaUtils.java:1296) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckUtils.decoupleArrayValues(TraceCheckUtils.java:387) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.InterpolatingTraceCheck.(InterpolatingTraceCheck.java:87) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:132) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:108) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:1) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getOrConstruct(IpTcStrategyModuleBase.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getInterpolantComputationStatus(IpTcStrategyModuleBase.java:77) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.tryExecuteInterpolantGenerator(AutomatonFreeRefinementEngine.java:266) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.generateProof(AutomatonFreeRefinementEngine.java:147) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.executeStrategy(AutomatonFreeRefinementEngine.java:137) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.(AutomatonFreeRefinementEngine.java:85) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:82) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:336) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:431) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:366) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:348) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:415) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:302) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseSequentialProgram(TraceAbstractionStarter.java:262) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:175) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:154) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:124) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:320) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) Caused by: java.io.IOException: Stream closed at java.base/java.lang.ProcessBuilder$NullOutputStream.write(ProcessBuilder.java:442) at java.base/java.io.OutputStream.write(OutputStream.java:157) at java.base/java.io.BufferedOutputStream.flushBuffer(BufferedOutputStream.java:81) at java.base/java.io.BufferedOutputStream.flush(BufferedOutputStream.java:142) at java.base/sun.nio.cs.StreamEncoder.implFlush(StreamEncoder.java:318) at java.base/sun.nio.cs.StreamEncoder.flush(StreamEncoder.java:153) at java.base/java.io.OutputStreamWriter.flush(OutputStreamWriter.java:251) at java.base/java.io.BufferedWriter.flush(BufferedWriter.java:257) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.input(Executor.java:156) ... 42 more [2022-11-20 18:59:38,602 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1881473630] [2022-11-20 18:59:38,603 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-11-20 18:59:38,603 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-20 18:59:38,603 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/z3 [2022-11-20 18:59:38,626 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-20 18:59:38,658 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2022-11-20 18:59:38,718 FATAL L? ?]: Ignoring exception! java.lang.IllegalStateException: ManagedScript already locked by |v_ULTIMATE.start_main_#t~nondet1#1_22| at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.ManagedScript.lock(ManagedScript.java:82) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.variables.ProgramVarUtils.constructConstantForAuxVar(ProgramVarUtils.java:116) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.UnmodifiableTransFormula.computeClosedFormula(UnmodifiableTransFormula.java:135) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.UnmodifiableTransFormula.(UnmodifiableTransFormula.java:90) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaBuilder.finishConstruction(TransFormulaBuilder.java:320) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.decoupleArrayValues(TransFormulaUtils.java:1296) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckUtils.decoupleArrayValues(TraceCheckUtils.java:387) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.InterpolatingTraceCheck.(InterpolatingTraceCheck.java:87) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:132) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:108) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:1) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getOrConstruct(IpTcStrategyModuleBase.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getInterpolantComputationStatus(IpTcStrategyModuleBase.java:77) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.tryExecuteInterpolantGenerator(AutomatonFreeRefinementEngine.java:266) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.generateProof(AutomatonFreeRefinementEngine.java:147) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.executeStrategy(AutomatonFreeRefinementEngine.java:137) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.(AutomatonFreeRefinementEngine.java:85) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:82) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:336) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:431) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:366) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:348) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:415) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:302) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseSequentialProgram(TraceAbstractionStarter.java:262) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:175) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:154) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:124) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:320) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) [2022-11-20 18:59:38,718 INFO L184 FreeRefinementEngine]: Found 0 perfect and 0 imperfect interpolant sequences. [2022-11-20 18:59:38,718 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [] total 0 [2022-11-20 18:59:38,718 ERROR L170 FreeRefinementEngine]: Strategy WALRUS failed to provide any proof altough trace is infeasible [2022-11-20 18:59:38,718 INFO L359 BasicCegarLoop]: Counterexample might be feasible [2022-11-20 18:59:38,736 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-11-20 18:59:38,745 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Forceful destruction successful, exit code 0 [2022-11-20 18:59:38,940 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/cvc4 --incremental --print-success --lang smt (20)] Forceful destruction successful, exit code 0 [2022-11-20 18:59:39,158 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (19)] Forceful destruction successful, exit code 0 [2022-11-20 18:59:39,338 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 21 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/z3 -smt2 -in SMTLIB2_COMPLIANT=true,20 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/cvc4 --incremental --print-success --lang smt,19 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bc4ccd1d-a2a1-4f99-8c7b-528846170e37/bin/utaipan-6cKwYrpEi9/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-20 18:59:39,341 INFO L444 BasicCegarLoop]: Path program histogram: [6, 1, 1] [2022-11-20 18:59:39,344 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-20 18:59:39,376 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-20 18:59:39,377 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-20 18:59:39,377 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-20 18:59:39,377 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-20 18:59:39,377 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-20 18:59:39,378 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-20 18:59:39,378 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-20 18:59:39,434 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 20.11 06:59:39 BoogieIcfgContainer [2022-11-20 18:59:39,434 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-20 18:59:39,435 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-20 18:59:39,435 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-20 18:59:39,435 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-20 18:59:39,436 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.11 06:58:21" (3/4) ... [2022-11-20 18:59:39,440 INFO L140 WitnessPrinter]: No result that supports witness generation found [2022-11-20 18:59:39,440 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-20 18:59:39,440 INFO L158 Benchmark]: Toolchain (without parser) took 79128.08ms. Allocated memory was 73.4MB in the beginning and 339.7MB in the end (delta: 266.3MB). Free memory was 49.9MB in the beginning and 114.0MB in the end (delta: -64.1MB). Peak memory consumption was 204.0MB. Max. memory is 16.1GB. [2022-11-20 18:59:39,441 INFO L158 Benchmark]: CDTParser took 0.34ms. Allocated memory is still 73.4MB. Free memory is still 50.8MB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-20 18:59:39,441 INFO L158 Benchmark]: CACSL2BoogieTranslator took 546.11ms. Allocated memory was 73.4MB in the beginning and 92.3MB in the end (delta: 18.9MB). Free memory was 49.7MB in the beginning and 65.7MB in the end (delta: -16.0MB). Peak memory consumption was 18.9MB. Max. memory is 16.1GB. [2022-11-20 18:59:39,441 INFO L158 Benchmark]: Boogie Procedure Inliner took 91.22ms. Allocated memory is still 92.3MB. Free memory was 65.7MB in the beginning and 62.2MB in the end (delta: 3.5MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. [2022-11-20 18:59:39,442 INFO L158 Benchmark]: Boogie Preprocessor took 83.95ms. Allocated memory is still 92.3MB. Free memory was 62.2MB in the beginning and 59.4MB in the end (delta: 2.8MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-11-20 18:59:39,442 INFO L158 Benchmark]: RCFGBuilder took 905.40ms. Allocated memory is still 92.3MB. Free memory was 59.4MB in the beginning and 42.9MB in the end (delta: 16.4MB). Peak memory consumption was 21.9MB. Max. memory is 16.1GB. [2022-11-20 18:59:39,442 INFO L158 Benchmark]: TraceAbstraction took 77489.50ms. Allocated memory was 92.3MB in the beginning and 339.7MB in the end (delta: 247.5MB). Free memory was 42.1MB in the beginning and 115.1MB in the end (delta: -72.9MB). Peak memory consumption was 173.7MB. Max. memory is 16.1GB. [2022-11-20 18:59:39,442 INFO L158 Benchmark]: Witness Printer took 5.00ms. Allocated memory is still 339.7MB. Free memory was 115.1MB in the beginning and 114.0MB in the end (delta: 1.1MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-11-20 18:59:39,444 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.34ms. Allocated memory is still 73.4MB. Free memory is still 50.8MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 546.11ms. Allocated memory was 73.4MB in the beginning and 92.3MB in the end (delta: 18.9MB). Free memory was 49.7MB in the beginning and 65.7MB in the end (delta: -16.0MB). Peak memory consumption was 18.9MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 91.22ms. Allocated memory is still 92.3MB. Free memory was 65.7MB in the beginning and 62.2MB in the end (delta: 3.5MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. * Boogie Preprocessor took 83.95ms. Allocated memory is still 92.3MB. Free memory was 62.2MB in the beginning and 59.4MB in the end (delta: 2.8MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * RCFGBuilder took 905.40ms. Allocated memory is still 92.3MB. Free memory was 59.4MB in the beginning and 42.9MB in the end (delta: 16.4MB). Peak memory consumption was 21.9MB. Max. memory is 16.1GB. * TraceAbstraction took 77489.50ms. Allocated memory was 92.3MB in the beginning and 339.7MB in the end (delta: 247.5MB). Free memory was 42.1MB in the beginning and 115.1MB in the end (delta: -72.9MB). Peak memory consumption was 173.7MB. Max. memory is 16.1GB. * Witness Printer took 5.00ms. Allocated memory is still 339.7MB. Free memory was 115.1MB in the beginning and 114.0MB in the end (delta: 1.1MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 20]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: unable to decide satisfiability of path constraint. Possible FailurePath: [L25] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L26] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L28] const SORT_9 mask_SORT_9 = (SORT_9)-1 >> (sizeof(SORT_9) * 8 - 31); [L29] const SORT_9 msb_SORT_9 = (SORT_9)1 << (31 - 1); [L31] const SORT_11 mask_SORT_11 = (SORT_11)-1 >> (sizeof(SORT_11) * 8 - 16); [L32] const SORT_11 msb_SORT_11 = (SORT_11)1 << (16 - 1); [L34] const SORT_12 mask_SORT_12 = (SORT_12)-1 >> (sizeof(SORT_12) * 8 - 8); [L35] const SORT_12 msb_SORT_12 = (SORT_12)1 << (8 - 1); [L37] const SORT_20 mask_SORT_20 = (SORT_20)-1 >> (sizeof(SORT_20) * 8 - 32); [L38] const SORT_20 msb_SORT_20 = (SORT_20)1 << (32 - 1); [L40] const SORT_23 mask_SORT_23 = (SORT_23)-1 >> (sizeof(SORT_23) * 8 - 17); [L41] const SORT_23 msb_SORT_23 = (SORT_23)1 << (17 - 1); [L43] const SORT_26 mask_SORT_26 = (SORT_26)-1 >> (sizeof(SORT_26) * 8 - 18); [L44] const SORT_26 msb_SORT_26 = (SORT_26)1 << (18 - 1); [L46] const SORT_29 mask_SORT_29 = (SORT_29)-1 >> (sizeof(SORT_29) * 8 - 19); [L47] const SORT_29 msb_SORT_29 = (SORT_29)1 << (19 - 1); [L49] const SORT_32 mask_SORT_32 = (SORT_32)-1 >> (sizeof(SORT_32) * 8 - 20); [L50] const SORT_32 msb_SORT_32 = (SORT_32)1 << (20 - 1); [L52] const SORT_35 mask_SORT_35 = (SORT_35)-1 >> (sizeof(SORT_35) * 8 - 21); [L53] const SORT_35 msb_SORT_35 = (SORT_35)1 << (21 - 1); [L55] const SORT_38 mask_SORT_38 = (SORT_38)-1 >> (sizeof(SORT_38) * 8 - 22); [L56] const SORT_38 msb_SORT_38 = (SORT_38)1 << (22 - 1); [L58] const SORT_41 mask_SORT_41 = (SORT_41)-1 >> (sizeof(SORT_41) * 8 - 23); [L59] const SORT_41 msb_SORT_41 = (SORT_41)1 << (23 - 1); [L61] const SORT_44 mask_SORT_44 = (SORT_44)-1 >> (sizeof(SORT_44) * 8 - 24); [L62] const SORT_44 msb_SORT_44 = (SORT_44)1 << (24 - 1); [L64] const SORT_47 mask_SORT_47 = (SORT_47)-1 >> (sizeof(SORT_47) * 8 - 25); [L65] const SORT_47 msb_SORT_47 = (SORT_47)1 << (25 - 1); [L67] const SORT_50 mask_SORT_50 = (SORT_50)-1 >> (sizeof(SORT_50) * 8 - 26); [L68] const SORT_50 msb_SORT_50 = (SORT_50)1 << (26 - 1); [L70] const SORT_53 mask_SORT_53 = (SORT_53)-1 >> (sizeof(SORT_53) * 8 - 27); [L71] const SORT_53 msb_SORT_53 = (SORT_53)1 << (27 - 1); [L73] const SORT_56 mask_SORT_56 = (SORT_56)-1 >> (sizeof(SORT_56) * 8 - 28); [L74] const SORT_56 msb_SORT_56 = (SORT_56)1 << (28 - 1); [L76] const SORT_59 mask_SORT_59 = (SORT_59)-1 >> (sizeof(SORT_59) * 8 - 29); [L77] const SORT_59 msb_SORT_59 = (SORT_59)1 << (29 - 1); [L79] const SORT_62 mask_SORT_62 = (SORT_62)-1 >> (sizeof(SORT_62) * 8 - 30); [L80] const SORT_62 msb_SORT_62 = (SORT_62)1 << (30 - 1); [L82] const SORT_72 mask_SORT_72 = (SORT_72)-1 >> (sizeof(SORT_72) * 8 - 3); [L83] const SORT_72 msb_SORT_72 = (SORT_72)1 << (3 - 1); [L85] const SORT_96 mask_SORT_96 = (SORT_96)-1 >> (sizeof(SORT_96) * 8 - 4); [L86] const SORT_96 msb_SORT_96 = (SORT_96)1 << (4 - 1); [L88] const SORT_101 mask_SORT_101 = (SORT_101)-1 >> (sizeof(SORT_101) * 8 - 14); [L89] const SORT_101 msb_SORT_101 = (SORT_101)1 << (14 - 1); [L91] const SORT_105 mask_SORT_105 = (SORT_105)-1 >> (sizeof(SORT_105) * 8 - 2); [L92] const SORT_105 msb_SORT_105 = (SORT_105)1 << (2 - 1); [L94] const SORT_154 mask_SORT_154 = (SORT_154)-1 >> (sizeof(SORT_154) * 8 - 7); [L95] const SORT_154 msb_SORT_154 = (SORT_154)1 << (7 - 1); [L97] const SORT_1 var_7 = 0; [L98] const SORT_1 var_8 = 1; [L99] const SORT_9 var_10 = 0; [L100] const SORT_12 var_13 = 0; [L101] const SORT_12 var_14 = 200; [L102] const SORT_72 var_73 = 5; [L103] const SORT_11 var_75 = 0; [L104] const SORT_105 var_106 = 1; [L105] const SORT_12 var_112 = 127; [L106] const SORT_11 var_119 = 64; [L107] const SORT_11 var_121 = 1; [L108] const SORT_11 var_123 = 127; [L109] const SORT_11 var_126 = 200; [L110] const SORT_72 var_131 = 4; [L111] const SORT_72 var_134 = 6; [L112] const SORT_96 var_138 = 9; [L113] const SORT_154 var_155 = 64; [L114] const SORT_72 var_166 = 0; [L115] const SORT_96 var_169 = 0; [L117] SORT_1 input_2; [L118] SORT_1 input_3; [L119] SORT_1 input_4; [L121] SORT_1 state_5 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L122] SORT_11 state_17 = __VERIFIER_nondet_ushort() & mask_SORT_11; [L123] SORT_11 state_76 = __VERIFIER_nondet_ushort() & mask_SORT_11; [L124] SORT_96 state_97 = __VERIFIER_nondet_uchar() & mask_SORT_96; [L125] SORT_96 state_100 = __VERIFIER_nondet_uchar() & mask_SORT_96; [L127] SORT_11 init_77_arg_1 = var_75; [L128] state_76 = init_77_arg_1 [L131] input_2 = __VERIFIER_nondet_uchar() [L132] input_3 = __VERIFIER_nondet_uchar() [L133] input_3 = input_3 & mask_SORT_1 [L134] input_4 = __VERIFIER_nondet_uchar() [L135] input_4 = input_4 & mask_SORT_1 [L137] SORT_1 var_84_arg_0 = state_5; [L138] SORT_1 var_84 = ~var_84_arg_0; [L139] SORT_1 var_85_arg_0 = var_84; [L140] SORT_1 var_85 = ~var_85_arg_0; [L141] SORT_1 var_86_arg_0 = state_5; [L142] SORT_1 var_86_arg_1 = var_85; [L143] SORT_1 var_86 = var_86_arg_0 | var_86_arg_1; [L144] var_86 = var_86 & mask_SORT_1 [L145] SORT_1 constr_87_arg_0 = var_86; [L146] CALL assume_abort_if_not(constr_87_arg_0) [L21] COND FALSE !(!cond) [L146] RET assume_abort_if_not(constr_87_arg_0) [L147] SORT_1 var_88_arg_0 = var_8; [L148] var_88_arg_0 = var_88_arg_0 & mask_SORT_1 [L149] SORT_11 var_88 = var_88_arg_0; [L150] SORT_11 var_89_arg_0 = state_76; [L151] SORT_11 var_89_arg_1 = var_88; [L152] SORT_1 var_89 = var_89_arg_0 <= var_89_arg_1; [L153] SORT_1 var_90_arg_0 = input_4; [L154] SORT_1 var_90_arg_1 = var_89; [L155] SORT_1 var_90 = var_90_arg_0 ^ var_90_arg_1; [L156] SORT_1 var_91_arg_0 = var_90; [L157] SORT_1 var_91 = ~var_91_arg_0; [L158] SORT_1 var_92_arg_0 = var_90; [L159] SORT_1 var_92 = ~var_92_arg_0; [L160] SORT_1 var_93_arg_0 = var_91; [L161] SORT_1 var_93_arg_1 = var_92; [L162] SORT_1 var_93 = var_93_arg_0 | var_93_arg_1; [L163] var_93 = var_93 & mask_SORT_1 [L164] SORT_1 constr_94_arg_0 = var_93; [L165] CALL assume_abort_if_not(constr_94_arg_0) [L21] COND FALSE !(!cond) [L165] RET assume_abort_if_not(constr_94_arg_0) [L167] SORT_72 var_74_arg_0 = var_73; [L168] var_74_arg_0 = var_74_arg_0 & mask_SORT_72 [L169] SORT_11 var_74 = var_74_arg_0; [L170] SORT_11 var_78_arg_0 = var_74; [L171] SORT_11 var_78_arg_1 = state_76; [L172] SORT_1 var_78 = var_78_arg_0 < var_78_arg_1; [L173] SORT_1 var_15_arg_0 = input_3; [L174] SORT_12 var_15_arg_1 = var_14; [L175] SORT_12 var_15_arg_2 = var_13; [L176] SORT_12 var_15 = var_15_arg_0 ? var_15_arg_1 : var_15_arg_2; [L177] var_15 = var_15 & mask_SORT_12 [L178] SORT_12 var_16_arg_0 = var_13; [L179] SORT_12 var_16_arg_1 = var_15; [L180] SORT_11 var_16 = ((SORT_11)var_16_arg_0 << 8) | var_16_arg_1; [L181] SORT_11 var_18_arg_0 = var_16; [L182] SORT_11 var_18_arg_1 = state_17; [L183] SORT_11 var_18 = var_18_arg_0 - var_18_arg_1; [L184] var_18 = var_18 & mask_SORT_11 [L185] SORT_11 var_19_arg_0 = var_18; [L186] SORT_1 var_19 = var_19_arg_0 >> 15; [L187] SORT_1 var_21_arg_0 = var_19; [L188] SORT_9 var_21_arg_1 = var_10; [L189] SORT_20 var_21 = ((SORT_20)var_21_arg_0 << 31) | var_21_arg_1; [L190] var_21 = var_21 & mask_SORT_20 [L191] SORT_11 var_64_arg_0 = var_18; [L192] SORT_1 var_64 = var_64_arg_0 >> 15; [L193] SORT_11 var_61_arg_0 = var_18; [L194] SORT_1 var_61 = var_61_arg_0 >> 15; [L195] SORT_11 var_58_arg_0 = var_18; [L196] SORT_1 var_58 = var_58_arg_0 >> 15; [L197] SORT_11 var_55_arg_0 = var_18; [L198] SORT_1 var_55 = var_55_arg_0 >> 15; [L199] SORT_11 var_52_arg_0 = var_18; [L200] SORT_1 var_52 = var_52_arg_0 >> 15; [L201] SORT_11 var_49_arg_0 = var_18; [L202] SORT_1 var_49 = var_49_arg_0 >> 15; [L203] SORT_11 var_46_arg_0 = var_18; [L204] SORT_1 var_46 = var_46_arg_0 >> 15; [L205] SORT_11 var_43_arg_0 = var_18; [L206] SORT_1 var_43 = var_43_arg_0 >> 15; [L207] SORT_11 var_40_arg_0 = var_18; [L208] SORT_1 var_40 = var_40_arg_0 >> 15; [L209] SORT_11 var_37_arg_0 = var_18; [L210] SORT_1 var_37 = var_37_arg_0 >> 15; [L211] SORT_11 var_34_arg_0 = var_18; [L212] SORT_1 var_34 = var_34_arg_0 >> 15; [L213] SORT_11 var_31_arg_0 = var_18; [L214] SORT_1 var_31 = var_31_arg_0 >> 15; [L215] SORT_11 var_28_arg_0 = var_18; [L216] SORT_1 var_28 = var_28_arg_0 >> 15; [L217] SORT_11 var_25_arg_0 = var_18; [L218] SORT_1 var_25 = var_25_arg_0 >> 15; [L219] SORT_11 var_22_arg_0 = var_18; [L220] SORT_1 var_22 = var_22_arg_0 >> 15; [L221] SORT_1 var_24_arg_0 = var_22; [L222] SORT_11 var_24_arg_1 = var_18; [L223] SORT_23 var_24 = ((SORT_23)var_24_arg_0 << 16) | var_24_arg_1; [L224] var_24 = var_24 & mask_SORT_23 [L225] SORT_1 var_27_arg_0 = var_25; [L226] SORT_23 var_27_arg_1 = var_24; [L227] SORT_26 var_27 = ((SORT_26)var_27_arg_0 << 17) | var_27_arg_1; [L228] var_27 = var_27 & mask_SORT_26 [L229] SORT_1 var_30_arg_0 = var_28; [L230] SORT_26 var_30_arg_1 = var_27; [L231] SORT_29 var_30 = ((SORT_29)var_30_arg_0 << 18) | var_30_arg_1; [L232] var_30 = var_30 & mask_SORT_29 [L233] SORT_1 var_33_arg_0 = var_31; [L234] SORT_29 var_33_arg_1 = var_30; [L235] SORT_32 var_33 = ((SORT_32)var_33_arg_0 << 19) | var_33_arg_1; [L236] var_33 = var_33 & mask_SORT_32 [L237] SORT_1 var_36_arg_0 = var_34; [L238] SORT_32 var_36_arg_1 = var_33; [L239] SORT_35 var_36 = ((SORT_35)var_36_arg_0 << 20) | var_36_arg_1; [L240] var_36 = var_36 & mask_SORT_35 [L241] SORT_1 var_39_arg_0 = var_37; [L242] SORT_35 var_39_arg_1 = var_36; [L243] SORT_38 var_39 = ((SORT_38)var_39_arg_0 << 21) | var_39_arg_1; [L244] var_39 = var_39 & mask_SORT_38 [L245] SORT_1 var_42_arg_0 = var_40; [L246] SORT_38 var_42_arg_1 = var_39; [L247] SORT_41 var_42 = ((SORT_41)var_42_arg_0 << 22) | var_42_arg_1; [L248] var_42 = var_42 & mask_SORT_41 [L249] SORT_1 var_45_arg_0 = var_43; [L250] SORT_41 var_45_arg_1 = var_42; [L251] SORT_44 var_45 = ((SORT_44)var_45_arg_0 << 23) | var_45_arg_1; [L252] var_45 = var_45 & mask_SORT_44 [L253] SORT_1 var_48_arg_0 = var_46; [L254] SORT_44 var_48_arg_1 = var_45; [L255] SORT_47 var_48 = ((SORT_47)var_48_arg_0 << 24) | var_48_arg_1; [L256] var_48 = var_48 & mask_SORT_47 [L257] SORT_1 var_51_arg_0 = var_49; [L258] SORT_47 var_51_arg_1 = var_48; [L259] SORT_50 var_51 = ((SORT_50)var_51_arg_0 << 25) | var_51_arg_1; [L260] var_51 = var_51 & mask_SORT_50 [L261] SORT_1 var_54_arg_0 = var_52; [L262] SORT_50 var_54_arg_1 = var_51; [L263] SORT_53 var_54 = ((SORT_53)var_54_arg_0 << 26) | var_54_arg_1; [L264] var_54 = var_54 & mask_SORT_53 [L265] SORT_1 var_57_arg_0 = var_55; [L266] SORT_53 var_57_arg_1 = var_54; [L267] SORT_56 var_57 = ((SORT_56)var_57_arg_0 << 27) | var_57_arg_1; [L268] var_57 = var_57 & mask_SORT_56 [L269] SORT_1 var_60_arg_0 = var_58; [L270] SORT_56 var_60_arg_1 = var_57; [L271] SORT_59 var_60 = ((SORT_59)var_60_arg_0 << 28) | var_60_arg_1; [L272] var_60 = var_60 & mask_SORT_59 [L273] SORT_1 var_63_arg_0 = var_61; [L274] SORT_59 var_63_arg_1 = var_60; [L275] SORT_62 var_63 = ((SORT_62)var_63_arg_0 << 29) | var_63_arg_1; [L276] var_63 = var_63 & mask_SORT_62 [L277] SORT_1 var_65_arg_0 = var_64; [L278] SORT_62 var_65_arg_1 = var_63; [L279] SORT_9 var_65 = ((SORT_9)var_65_arg_0 << 30) | var_65_arg_1; [L280] SORT_9 var_66_arg_0 = var_65; [L281] var_66_arg_0 = var_66_arg_0 & mask_SORT_9 [L282] SORT_20 var_66 = var_66_arg_0; [L283] SORT_20 var_67_arg_0 = var_21; [L284] SORT_20 var_67_arg_1 = var_66; [L285] SORT_1 var_67 = var_67_arg_0 <= var_67_arg_1; [L286] SORT_1 var_68_arg_0 = var_67; [L287] SORT_1 var_68_arg_1 = var_8; [L288] SORT_1 var_68_arg_2 = var_7; [L289] SORT_1 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L290] SORT_1 var_69_arg_0 = input_3; [L291] SORT_1 var_69_arg_1 = var_68; [L292] SORT_1 var_69 = var_69_arg_0 ^ var_69_arg_1; [L293] SORT_1 var_70_arg_0 = var_69; [L294] SORT_1 var_70 = ~var_70_arg_0; [L295] SORT_1 var_79_arg_0 = var_78; [L296] SORT_1 var_79_arg_1 = var_70; [L297] SORT_1 var_79_arg_2 = var_8; [L298] SORT_1 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L299] SORT_1 var_80_arg_0 = var_79; [L300] SORT_1 var_80 = ~var_80_arg_0; [L301] SORT_1 var_81_arg_0 = var_79; [L302] SORT_1 var_81 = ~var_81_arg_0; [L303] SORT_1 var_82_arg_0 = var_80; [L304] SORT_1 var_82_arg_1 = var_81; [L305] SORT_1 var_82 = var_82_arg_0 & var_82_arg_1; [L306] var_82 = var_82 & mask_SORT_1 [L307] SORT_1 bad_83_arg_0 = var_82; [L308] CALL __VERIFIER_assert(!(bad_83_arg_0)) [L20] COND FALSE !(!(cond)) [L308] RET __VERIFIER_assert(!(bad_83_arg_0)) [L310] SORT_96 var_139_arg_0 = state_100; [L311] SORT_96 var_139_arg_1 = var_138; [L312] SORT_1 var_139 = var_139_arg_0 == var_139_arg_1; [L313] SORT_72 var_132_arg_0 = var_131; [L314] var_132_arg_0 = var_132_arg_0 & mask_SORT_72 [L315] SORT_96 var_132 = var_132_arg_0; [L316] SORT_96 var_133_arg_0 = var_132; [L317] SORT_96 var_133_arg_1 = state_97; [L318] SORT_1 var_133 = var_133_arg_0 <= var_133_arg_1; [L319] SORT_72 var_135_arg_0 = var_134; [L320] var_135_arg_0 = var_135_arg_0 & mask_SORT_72 [L321] SORT_96 var_135 = var_135_arg_0; [L322] SORT_96 var_136_arg_0 = state_97; [L323] SORT_96 var_136_arg_1 = var_135; [L324] SORT_1 var_136 = var_136_arg_0 <= var_136_arg_1; [L325] SORT_1 var_137_arg_0 = var_133; [L326] SORT_1 var_137_arg_1 = var_136; [L327] SORT_1 var_137 = var_137_arg_0 & var_137_arg_1; [L328] SORT_1 var_140_arg_0 = var_139; [L329] SORT_1 var_140_arg_1 = var_137; [L330] SORT_1 var_140_arg_2 = var_8; [L331] SORT_1 var_140 = var_140_arg_0 ? var_140_arg_1 : var_140_arg_2; [L332] SORT_1 var_141_arg_0 = input_4; [L333] SORT_1 var_141_arg_1 = var_8; [L334] SORT_1 var_141_arg_2 = var_140; [L335] SORT_1 var_141 = var_141_arg_0 ? var_141_arg_1 : var_141_arg_2; [L336] SORT_1 next_142_arg_1 = var_141; [L337] SORT_12 var_113_arg_0 = var_112; [L338] var_113_arg_0 = (var_113_arg_0 & msb_SORT_12) ? (var_113_arg_0 | ~mask_SORT_12) : (var_113_arg_0 & mask_SORT_12) [L339] SORT_41 var_113 = (int)((signed char)var_113_arg_0); [L340] SORT_11 var_114_arg_0 = state_17; [L341] var_114_arg_0 = (var_114_arg_0 & msb_SORT_11) ? (var_114_arg_0 | ~mask_SORT_11) : (var_114_arg_0 & mask_SORT_11) [L342] SORT_41 var_114 = (int)((short)var_114_arg_0); [L343] SORT_41 var_115_arg_0 = var_113; [L344] SORT_41 var_115_arg_1 = var_114; [L345] SORT_41 var_115 = var_115_arg_0 * var_115_arg_1; [L346] SORT_105 var_107_arg_0 = var_106; [L347] var_107_arg_0 = (var_107_arg_0 & msb_SORT_105) ? (var_107_arg_0 | ~mask_SORT_105) : (var_107_arg_0 & mask_SORT_105) [L348] SORT_26 var_107 = (int)((signed char)var_107_arg_0); [L349] SORT_11 var_108_arg_0 = var_16; [L350] var_108_arg_0 = (var_108_arg_0 & msb_SORT_11) ? (var_108_arg_0 | ~mask_SORT_11) : (var_108_arg_0 & mask_SORT_11) [L351] SORT_26 var_108 = (int)((short)var_108_arg_0); [L352] SORT_26 var_109_arg_0 = var_107; [L353] SORT_26 var_109_arg_1 = var_108; [L354] SORT_26 var_109 = var_109_arg_0 * var_109_arg_1; [L355] var_109 = var_109 & mask_SORT_26 [L356] SORT_26 var_151_arg_0 = var_109; [L357] SORT_1 var_151 = var_151_arg_0 >> 17; [L358] SORT_26 var_149_arg_0 = var_109; [L359] SORT_1 var_149 = var_149_arg_0 >> 17; [L360] SORT_26 var_147_arg_0 = var_109; [L361] SORT_1 var_147 = var_147_arg_0 >> 17; [L362] SORT_26 var_145_arg_0 = var_109; [L363] SORT_1 var_145 = var_145_arg_0 >> 17; [L364] SORT_26 var_143_arg_0 = var_109; [L365] SORT_1 var_143 = var_143_arg_0 >> 17; [L366] SORT_1 var_144_arg_0 = var_143; [L367] SORT_26 var_144_arg_1 = var_109; [L368] SORT_29 var_144 = ((SORT_29)var_144_arg_0 << 18) | var_144_arg_1; [L369] var_144 = var_144 & mask_SORT_29 [L370] SORT_1 var_146_arg_0 = var_145; [L371] SORT_29 var_146_arg_1 = var_144; [L372] SORT_32 var_146 = ((SORT_32)var_146_arg_0 << 19) | var_146_arg_1; [L373] var_146 = var_146 & mask_SORT_32 [L374] SORT_1 var_148_arg_0 = var_147; [L375] SORT_32 var_148_arg_1 = var_146; [L376] SORT_35 var_148 = ((SORT_35)var_148_arg_0 << 20) | var_148_arg_1; [L377] var_148 = var_148 & mask_SORT_35 [L378] SORT_1 var_150_arg_0 = var_149; [L379] SORT_35 var_150_arg_1 = var_148; [L380] SORT_38 var_150 = ((SORT_38)var_150_arg_0 << 21) | var_150_arg_1; [L381] var_150 = var_150 & mask_SORT_38 [L382] SORT_1 var_152_arg_0 = var_151; [L383] SORT_38 var_152_arg_1 = var_150; [L384] SORT_41 var_152 = ((SORT_41)var_152_arg_0 << 22) | var_152_arg_1; [L385] SORT_41 var_153_arg_0 = var_115; [L386] SORT_41 var_153_arg_1 = var_152; [L387] SORT_41 var_153 = var_153_arg_0 + var_153_arg_1; [L388] SORT_154 var_156_arg_0 = var_155; [L389] var_156_arg_0 = var_156_arg_0 & mask_SORT_154 [L390] SORT_41 var_156 = var_156_arg_0; [L391] SORT_41 var_157_arg_0 = var_153; [L392] SORT_41 var_157_arg_1 = var_156; [L393] SORT_41 var_157 = var_157_arg_0 + var_157_arg_1; [L394] SORT_41 var_158_arg_0 = var_157; [L395] SORT_11 var_158 = var_158_arg_0 >> 7; [L396] SORT_1 var_159_arg_0 = input_4; [L397] SORT_11 var_159_arg_1 = var_119; [L398] SORT_11 var_159_arg_2 = var_158; [L399] SORT_11 var_159 = var_159_arg_0 ? var_159_arg_1 : var_159_arg_2; [L400] SORT_11 next_160_arg_1 = var_159; [L401] SORT_1 var_161_arg_0 = var_8; [L402] var_161_arg_0 = var_161_arg_0 & mask_SORT_1 [L403] SORT_11 var_161 = var_161_arg_0; [L404] SORT_11 var_162_arg_0 = state_76; [L405] SORT_11 var_162_arg_1 = var_161; [L406] SORT_11 var_162 = var_162_arg_0 + var_162_arg_1; [L407] var_162 = var_162 & mask_SORT_11 [L408] SORT_11 next_163_arg_1 = var_162; [L409] SORT_72 var_167_arg_0 = var_166; [L410] SORT_1 var_167_arg_1 = input_3; [L411] SORT_96 var_167 = ((SORT_96)var_167_arg_0 << 1) | var_167_arg_1; [L412] SORT_1 var_164_arg_0 = input_3; [L413] var_164_arg_0 = var_164_arg_0 & mask_SORT_1 [L414] SORT_96 var_164 = var_164_arg_0; [L415] SORT_96 var_165_arg_0 = state_97; [L416] SORT_96 var_165_arg_1 = var_164; [L417] SORT_96 var_165 = var_165_arg_0 + var_165_arg_1; [L418] SORT_1 var_168_arg_0 = var_139; [L419] SORT_96 var_168_arg_1 = var_167; [L420] SORT_96 var_168_arg_2 = var_165; [L421] SORT_96 var_168 = var_168_arg_0 ? var_168_arg_1 : var_168_arg_2; [L422] SORT_1 var_170_arg_0 = input_4; [L423] SORT_96 var_170_arg_1 = var_169; [L424] SORT_96 var_170_arg_2 = var_168; [L425] SORT_96 var_170 = var_170_arg_0 ? var_170_arg_1 : var_170_arg_2; [L426] var_170 = var_170 & mask_SORT_96 [L427] SORT_96 next_171_arg_1 = var_170; [L428] SORT_1 var_172_arg_0 = var_8; [L429] var_172_arg_0 = var_172_arg_0 & mask_SORT_1 [L430] SORT_96 var_172 = var_172_arg_0; [L431] SORT_96 var_173_arg_0 = state_100; [L432] SORT_96 var_173_arg_1 = var_172; [L433] SORT_96 var_173 = var_173_arg_0 + var_173_arg_1; [L434] SORT_1 var_174_arg_0 = var_139; [L435] SORT_96 var_174_arg_1 = var_169; [L436] SORT_96 var_174_arg_2 = var_173; [L437] SORT_96 var_174 = var_174_arg_0 ? var_174_arg_1 : var_174_arg_2; [L438] SORT_1 var_175_arg_0 = input_4; [L439] SORT_96 var_175_arg_1 = var_169; [L440] SORT_96 var_175_arg_2 = var_174; [L441] SORT_96 var_175 = var_175_arg_0 ? var_175_arg_1 : var_175_arg_2; [L442] var_175 = var_175 & mask_SORT_96 [L443] SORT_96 next_176_arg_1 = var_175; [L445] state_5 = next_142_arg_1 [L446] state_17 = next_160_arg_1 [L447] state_76 = next_163_arg_1 [L448] state_97 = next_171_arg_1 [L449] state_100 = next_176_arg_1 [L131] input_2 = __VERIFIER_nondet_uchar() [L132] input_3 = __VERIFIER_nondet_uchar() [L133] input_3 = input_3 & mask_SORT_1 [L134] input_4 = __VERIFIER_nondet_uchar() [L135] input_4 = input_4 & mask_SORT_1 [L137] SORT_1 var_84_arg_0 = state_5; [L138] SORT_1 var_84 = ~var_84_arg_0; [L139] SORT_1 var_85_arg_0 = var_84; [L140] SORT_1 var_85 = ~var_85_arg_0; [L141] SORT_1 var_86_arg_0 = state_5; [L142] SORT_1 var_86_arg_1 = var_85; [L143] SORT_1 var_86 = var_86_arg_0 | var_86_arg_1; [L144] var_86 = var_86 & mask_SORT_1 [L145] SORT_1 constr_87_arg_0 = var_86; [L146] CALL assume_abort_if_not(constr_87_arg_0) [L21] COND FALSE !(!cond) [L146] RET assume_abort_if_not(constr_87_arg_0) [L147] SORT_1 var_88_arg_0 = var_8; [L148] var_88_arg_0 = var_88_arg_0 & mask_SORT_1 [L149] SORT_11 var_88 = var_88_arg_0; [L150] SORT_11 var_89_arg_0 = state_76; [L151] SORT_11 var_89_arg_1 = var_88; [L152] SORT_1 var_89 = var_89_arg_0 <= var_89_arg_1; [L153] SORT_1 var_90_arg_0 = input_4; [L154] SORT_1 var_90_arg_1 = var_89; [L155] SORT_1 var_90 = var_90_arg_0 ^ var_90_arg_1; [L156] SORT_1 var_91_arg_0 = var_90; [L157] SORT_1 var_91 = ~var_91_arg_0; [L158] SORT_1 var_92_arg_0 = var_90; [L159] SORT_1 var_92 = ~var_92_arg_0; [L160] SORT_1 var_93_arg_0 = var_91; [L161] SORT_1 var_93_arg_1 = var_92; [L162] SORT_1 var_93 = var_93_arg_0 | var_93_arg_1; [L163] var_93 = var_93 & mask_SORT_1 [L164] SORT_1 constr_94_arg_0 = var_93; [L165] CALL assume_abort_if_not(constr_94_arg_0) [L21] COND FALSE !(!cond) [L165] RET assume_abort_if_not(constr_94_arg_0) [L167] SORT_72 var_74_arg_0 = var_73; [L168] var_74_arg_0 = var_74_arg_0 & mask_SORT_72 [L169] SORT_11 var_74 = var_74_arg_0; [L170] SORT_11 var_78_arg_0 = var_74; [L171] SORT_11 var_78_arg_1 = state_76; [L172] SORT_1 var_78 = var_78_arg_0 < var_78_arg_1; [L173] SORT_1 var_15_arg_0 = input_3; [L174] SORT_12 var_15_arg_1 = var_14; [L175] SORT_12 var_15_arg_2 = var_13; [L176] SORT_12 var_15 = var_15_arg_0 ? var_15_arg_1 : var_15_arg_2; [L177] var_15 = var_15 & mask_SORT_12 [L178] SORT_12 var_16_arg_0 = var_13; [L179] SORT_12 var_16_arg_1 = var_15; [L180] SORT_11 var_16 = ((SORT_11)var_16_arg_0 << 8) | var_16_arg_1; [L181] SORT_11 var_18_arg_0 = var_16; [L182] SORT_11 var_18_arg_1 = state_17; [L183] SORT_11 var_18 = var_18_arg_0 - var_18_arg_1; [L184] var_18 = var_18 & mask_SORT_11 [L185] SORT_11 var_19_arg_0 = var_18; [L186] SORT_1 var_19 = var_19_arg_0 >> 15; [L187] SORT_1 var_21_arg_0 = var_19; [L188] SORT_9 var_21_arg_1 = var_10; [L189] SORT_20 var_21 = ((SORT_20)var_21_arg_0 << 31) | var_21_arg_1; [L190] var_21 = var_21 & mask_SORT_20 [L191] SORT_11 var_64_arg_0 = var_18; [L192] SORT_1 var_64 = var_64_arg_0 >> 15; [L193] SORT_11 var_61_arg_0 = var_18; [L194] SORT_1 var_61 = var_61_arg_0 >> 15; [L195] SORT_11 var_58_arg_0 = var_18; [L196] SORT_1 var_58 = var_58_arg_0 >> 15; [L197] SORT_11 var_55_arg_0 = var_18; [L198] SORT_1 var_55 = var_55_arg_0 >> 15; [L199] SORT_11 var_52_arg_0 = var_18; [L200] SORT_1 var_52 = var_52_arg_0 >> 15; [L201] SORT_11 var_49_arg_0 = var_18; [L202] SORT_1 var_49 = var_49_arg_0 >> 15; [L203] SORT_11 var_46_arg_0 = var_18; [L204] SORT_1 var_46 = var_46_arg_0 >> 15; [L205] SORT_11 var_43_arg_0 = var_18; [L206] SORT_1 var_43 = var_43_arg_0 >> 15; [L207] SORT_11 var_40_arg_0 = var_18; [L208] SORT_1 var_40 = var_40_arg_0 >> 15; [L209] SORT_11 var_37_arg_0 = var_18; [L210] SORT_1 var_37 = var_37_arg_0 >> 15; [L211] SORT_11 var_34_arg_0 = var_18; [L212] SORT_1 var_34 = var_34_arg_0 >> 15; [L213] SORT_11 var_31_arg_0 = var_18; [L214] SORT_1 var_31 = var_31_arg_0 >> 15; [L215] SORT_11 var_28_arg_0 = var_18; [L216] SORT_1 var_28 = var_28_arg_0 >> 15; [L217] SORT_11 var_25_arg_0 = var_18; [L218] SORT_1 var_25 = var_25_arg_0 >> 15; [L219] SORT_11 var_22_arg_0 = var_18; [L220] SORT_1 var_22 = var_22_arg_0 >> 15; [L221] SORT_1 var_24_arg_0 = var_22; [L222] SORT_11 var_24_arg_1 = var_18; [L223] SORT_23 var_24 = ((SORT_23)var_24_arg_0 << 16) | var_24_arg_1; [L224] var_24 = var_24 & mask_SORT_23 [L225] SORT_1 var_27_arg_0 = var_25; [L226] SORT_23 var_27_arg_1 = var_24; [L227] SORT_26 var_27 = ((SORT_26)var_27_arg_0 << 17) | var_27_arg_1; [L228] var_27 = var_27 & mask_SORT_26 [L229] SORT_1 var_30_arg_0 = var_28; [L230] SORT_26 var_30_arg_1 = var_27; [L231] SORT_29 var_30 = ((SORT_29)var_30_arg_0 << 18) | var_30_arg_1; [L232] var_30 = var_30 & mask_SORT_29 [L233] SORT_1 var_33_arg_0 = var_31; [L234] SORT_29 var_33_arg_1 = var_30; [L235] SORT_32 var_33 = ((SORT_32)var_33_arg_0 << 19) | var_33_arg_1; [L236] var_33 = var_33 & mask_SORT_32 [L237] SORT_1 var_36_arg_0 = var_34; [L238] SORT_32 var_36_arg_1 = var_33; [L239] SORT_35 var_36 = ((SORT_35)var_36_arg_0 << 20) | var_36_arg_1; [L240] var_36 = var_36 & mask_SORT_35 [L241] SORT_1 var_39_arg_0 = var_37; [L242] SORT_35 var_39_arg_1 = var_36; [L243] SORT_38 var_39 = ((SORT_38)var_39_arg_0 << 21) | var_39_arg_1; [L244] var_39 = var_39 & mask_SORT_38 [L245] SORT_1 var_42_arg_0 = var_40; [L246] SORT_38 var_42_arg_1 = var_39; [L247] SORT_41 var_42 = ((SORT_41)var_42_arg_0 << 22) | var_42_arg_1; [L248] var_42 = var_42 & mask_SORT_41 [L249] SORT_1 var_45_arg_0 = var_43; [L250] SORT_41 var_45_arg_1 = var_42; [L251] SORT_44 var_45 = ((SORT_44)var_45_arg_0 << 23) | var_45_arg_1; [L252] var_45 = var_45 & mask_SORT_44 [L253] SORT_1 var_48_arg_0 = var_46; [L254] SORT_44 var_48_arg_1 = var_45; [L255] SORT_47 var_48 = ((SORT_47)var_48_arg_0 << 24) | var_48_arg_1; [L256] var_48 = var_48 & mask_SORT_47 [L257] SORT_1 var_51_arg_0 = var_49; [L258] SORT_47 var_51_arg_1 = var_48; [L259] SORT_50 var_51 = ((SORT_50)var_51_arg_0 << 25) | var_51_arg_1; [L260] var_51 = var_51 & mask_SORT_50 [L261] SORT_1 var_54_arg_0 = var_52; [L262] SORT_50 var_54_arg_1 = var_51; [L263] SORT_53 var_54 = ((SORT_53)var_54_arg_0 << 26) | var_54_arg_1; [L264] var_54 = var_54 & mask_SORT_53 [L265] SORT_1 var_57_arg_0 = var_55; [L266] SORT_53 var_57_arg_1 = var_54; [L267] SORT_56 var_57 = ((SORT_56)var_57_arg_0 << 27) | var_57_arg_1; [L268] var_57 = var_57 & mask_SORT_56 [L269] SORT_1 var_60_arg_0 = var_58; [L270] SORT_56 var_60_arg_1 = var_57; [L271] SORT_59 var_60 = ((SORT_59)var_60_arg_0 << 28) | var_60_arg_1; [L272] var_60 = var_60 & mask_SORT_59 [L273] SORT_1 var_63_arg_0 = var_61; [L274] SORT_59 var_63_arg_1 = var_60; [L275] SORT_62 var_63 = ((SORT_62)var_63_arg_0 << 29) | var_63_arg_1; [L276] var_63 = var_63 & mask_SORT_62 [L277] SORT_1 var_65_arg_0 = var_64; [L278] SORT_62 var_65_arg_1 = var_63; [L279] SORT_9 var_65 = ((SORT_9)var_65_arg_0 << 30) | var_65_arg_1; [L280] SORT_9 var_66_arg_0 = var_65; [L281] var_66_arg_0 = var_66_arg_0 & mask_SORT_9 [L282] SORT_20 var_66 = var_66_arg_0; [L283] SORT_20 var_67_arg_0 = var_21; [L284] SORT_20 var_67_arg_1 = var_66; [L285] SORT_1 var_67 = var_67_arg_0 <= var_67_arg_1; [L286] SORT_1 var_68_arg_0 = var_67; [L287] SORT_1 var_68_arg_1 = var_8; [L288] SORT_1 var_68_arg_2 = var_7; [L289] SORT_1 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L290] SORT_1 var_69_arg_0 = input_3; [L291] SORT_1 var_69_arg_1 = var_68; [L292] SORT_1 var_69 = var_69_arg_0 ^ var_69_arg_1; [L293] SORT_1 var_70_arg_0 = var_69; [L294] SORT_1 var_70 = ~var_70_arg_0; [L295] SORT_1 var_79_arg_0 = var_78; [L296] SORT_1 var_79_arg_1 = var_70; [L297] SORT_1 var_79_arg_2 = var_8; [L298] SORT_1 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L299] SORT_1 var_80_arg_0 = var_79; [L300] SORT_1 var_80 = ~var_80_arg_0; [L301] SORT_1 var_81_arg_0 = var_79; [L302] SORT_1 var_81 = ~var_81_arg_0; [L303] SORT_1 var_82_arg_0 = var_80; [L304] SORT_1 var_82_arg_1 = var_81; [L305] SORT_1 var_82 = var_82_arg_0 & var_82_arg_1; [L306] var_82 = var_82 & mask_SORT_1 [L307] SORT_1 bad_83_arg_0 = var_82; [L308] CALL __VERIFIER_assert(!(bad_83_arg_0)) [L20] COND FALSE !(!(cond)) [L308] RET __VERIFIER_assert(!(bad_83_arg_0)) [L310] SORT_96 var_139_arg_0 = state_100; [L311] SORT_96 var_139_arg_1 = var_138; [L312] SORT_1 var_139 = var_139_arg_0 == var_139_arg_1; [L313] SORT_72 var_132_arg_0 = var_131; [L314] var_132_arg_0 = var_132_arg_0 & mask_SORT_72 [L315] SORT_96 var_132 = var_132_arg_0; [L316] SORT_96 var_133_arg_0 = var_132; [L317] SORT_96 var_133_arg_1 = state_97; [L318] SORT_1 var_133 = var_133_arg_0 <= var_133_arg_1; [L319] SORT_72 var_135_arg_0 = var_134; [L320] var_135_arg_0 = var_135_arg_0 & mask_SORT_72 [L321] SORT_96 var_135 = var_135_arg_0; [L322] SORT_96 var_136_arg_0 = state_97; [L323] SORT_96 var_136_arg_1 = var_135; [L324] SORT_1 var_136 = var_136_arg_0 <= var_136_arg_1; [L325] SORT_1 var_137_arg_0 = var_133; [L326] SORT_1 var_137_arg_1 = var_136; [L327] SORT_1 var_137 = var_137_arg_0 & var_137_arg_1; [L328] SORT_1 var_140_arg_0 = var_139; [L329] SORT_1 var_140_arg_1 = var_137; [L330] SORT_1 var_140_arg_2 = var_8; [L331] SORT_1 var_140 = var_140_arg_0 ? var_140_arg_1 : var_140_arg_2; [L332] SORT_1 var_141_arg_0 = input_4; [L333] SORT_1 var_141_arg_1 = var_8; [L334] SORT_1 var_141_arg_2 = var_140; [L335] SORT_1 var_141 = var_141_arg_0 ? var_141_arg_1 : var_141_arg_2; [L336] SORT_1 next_142_arg_1 = var_141; [L337] SORT_12 var_113_arg_0 = var_112; [L338] var_113_arg_0 = (var_113_arg_0 & msb_SORT_12) ? (var_113_arg_0 | ~mask_SORT_12) : (var_113_arg_0 & mask_SORT_12) [L339] SORT_41 var_113 = (int)((signed char)var_113_arg_0); [L340] SORT_11 var_114_arg_0 = state_17; [L341] var_114_arg_0 = (var_114_arg_0 & msb_SORT_11) ? (var_114_arg_0 | ~mask_SORT_11) : (var_114_arg_0 & mask_SORT_11) [L342] SORT_41 var_114 = (int)((short)var_114_arg_0); [L343] SORT_41 var_115_arg_0 = var_113; [L344] SORT_41 var_115_arg_1 = var_114; [L345] SORT_41 var_115 = var_115_arg_0 * var_115_arg_1; [L346] SORT_105 var_107_arg_0 = var_106; [L347] var_107_arg_0 = (var_107_arg_0 & msb_SORT_105) ? (var_107_arg_0 | ~mask_SORT_105) : (var_107_arg_0 & mask_SORT_105) [L348] SORT_26 var_107 = (int)((signed char)var_107_arg_0); [L349] SORT_11 var_108_arg_0 = var_16; [L350] var_108_arg_0 = (var_108_arg_0 & msb_SORT_11) ? (var_108_arg_0 | ~mask_SORT_11) : (var_108_arg_0 & mask_SORT_11) [L351] SORT_26 var_108 = (int)((short)var_108_arg_0); [L352] SORT_26 var_109_arg_0 = var_107; [L353] SORT_26 var_109_arg_1 = var_108; [L354] SORT_26 var_109 = var_109_arg_0 * var_109_arg_1; [L355] var_109 = var_109 & mask_SORT_26 [L356] SORT_26 var_151_arg_0 = var_109; [L357] SORT_1 var_151 = var_151_arg_0 >> 17; [L358] SORT_26 var_149_arg_0 = var_109; [L359] SORT_1 var_149 = var_149_arg_0 >> 17; [L360] SORT_26 var_147_arg_0 = var_109; [L361] SORT_1 var_147 = var_147_arg_0 >> 17; [L362] SORT_26 var_145_arg_0 = var_109; [L363] SORT_1 var_145 = var_145_arg_0 >> 17; [L364] SORT_26 var_143_arg_0 = var_109; [L365] SORT_1 var_143 = var_143_arg_0 >> 17; [L366] SORT_1 var_144_arg_0 = var_143; [L367] SORT_26 var_144_arg_1 = var_109; [L368] SORT_29 var_144 = ((SORT_29)var_144_arg_0 << 18) | var_144_arg_1; [L369] var_144 = var_144 & mask_SORT_29 [L370] SORT_1 var_146_arg_0 = var_145; [L371] SORT_29 var_146_arg_1 = var_144; [L372] SORT_32 var_146 = ((SORT_32)var_146_arg_0 << 19) | var_146_arg_1; [L373] var_146 = var_146 & mask_SORT_32 [L374] SORT_1 var_148_arg_0 = var_147; [L375] SORT_32 var_148_arg_1 = var_146; [L376] SORT_35 var_148 = ((SORT_35)var_148_arg_0 << 20) | var_148_arg_1; [L377] var_148 = var_148 & mask_SORT_35 [L378] SORT_1 var_150_arg_0 = var_149; [L379] SORT_35 var_150_arg_1 = var_148; [L380] SORT_38 var_150 = ((SORT_38)var_150_arg_0 << 21) | var_150_arg_1; [L381] var_150 = var_150 & mask_SORT_38 [L382] SORT_1 var_152_arg_0 = var_151; [L383] SORT_38 var_152_arg_1 = var_150; [L384] SORT_41 var_152 = ((SORT_41)var_152_arg_0 << 22) | var_152_arg_1; [L385] SORT_41 var_153_arg_0 = var_115; [L386] SORT_41 var_153_arg_1 = var_152; [L387] SORT_41 var_153 = var_153_arg_0 + var_153_arg_1; [L388] SORT_154 var_156_arg_0 = var_155; [L389] var_156_arg_0 = var_156_arg_0 & mask_SORT_154 [L390] SORT_41 var_156 = var_156_arg_0; [L391] SORT_41 var_157_arg_0 = var_153; [L392] SORT_41 var_157_arg_1 = var_156; [L393] SORT_41 var_157 = var_157_arg_0 + var_157_arg_1; [L394] SORT_41 var_158_arg_0 = var_157; [L395] SORT_11 var_158 = var_158_arg_0 >> 7; [L396] SORT_1 var_159_arg_0 = input_4; [L397] SORT_11 var_159_arg_1 = var_119; [L398] SORT_11 var_159_arg_2 = var_158; [L399] SORT_11 var_159 = var_159_arg_0 ? var_159_arg_1 : var_159_arg_2; [L400] SORT_11 next_160_arg_1 = var_159; [L401] SORT_1 var_161_arg_0 = var_8; [L402] var_161_arg_0 = var_161_arg_0 & mask_SORT_1 [L403] SORT_11 var_161 = var_161_arg_0; [L404] SORT_11 var_162_arg_0 = state_76; [L405] SORT_11 var_162_arg_1 = var_161; [L406] SORT_11 var_162 = var_162_arg_0 + var_162_arg_1; [L407] var_162 = var_162 & mask_SORT_11 [L408] SORT_11 next_163_arg_1 = var_162; [L409] SORT_72 var_167_arg_0 = var_166; [L410] SORT_1 var_167_arg_1 = input_3; [L411] SORT_96 var_167 = ((SORT_96)var_167_arg_0 << 1) | var_167_arg_1; [L412] SORT_1 var_164_arg_0 = input_3; [L413] var_164_arg_0 = var_164_arg_0 & mask_SORT_1 [L414] SORT_96 var_164 = var_164_arg_0; [L415] SORT_96 var_165_arg_0 = state_97; [L416] SORT_96 var_165_arg_1 = var_164; [L417] SORT_96 var_165 = var_165_arg_0 + var_165_arg_1; [L418] SORT_1 var_168_arg_0 = var_139; [L419] SORT_96 var_168_arg_1 = var_167; [L420] SORT_96 var_168_arg_2 = var_165; [L421] SORT_96 var_168 = var_168_arg_0 ? var_168_arg_1 : var_168_arg_2; [L422] SORT_1 var_170_arg_0 = input_4; [L423] SORT_96 var_170_arg_1 = var_169; [L424] SORT_96 var_170_arg_2 = var_168; [L425] SORT_96 var_170 = var_170_arg_0 ? var_170_arg_1 : var_170_arg_2; [L426] var_170 = var_170 & mask_SORT_96 [L427] SORT_96 next_171_arg_1 = var_170; [L428] SORT_1 var_172_arg_0 = var_8; [L429] var_172_arg_0 = var_172_arg_0 & mask_SORT_1 [L430] SORT_96 var_172 = var_172_arg_0; [L431] SORT_96 var_173_arg_0 = state_100; [L432] SORT_96 var_173_arg_1 = var_172; [L433] SORT_96 var_173 = var_173_arg_0 + var_173_arg_1; [L434] SORT_1 var_174_arg_0 = var_139; [L435] SORT_96 var_174_arg_1 = var_169; [L436] SORT_96 var_174_arg_2 = var_173; [L437] SORT_96 var_174 = var_174_arg_0 ? var_174_arg_1 : var_174_arg_2; [L438] SORT_1 var_175_arg_0 = input_4; [L439] SORT_96 var_175_arg_1 = var_169; [L440] SORT_96 var_175_arg_2 = var_174; [L441] SORT_96 var_175 = var_175_arg_0 ? var_175_arg_1 : var_175_arg_2; [L442] var_175 = var_175 & mask_SORT_96 [L443] SORT_96 next_176_arg_1 = var_175; [L445] state_5 = next_142_arg_1 [L446] state_17 = next_160_arg_1 [L447] state_76 = next_163_arg_1 [L448] state_97 = next_171_arg_1 [L449] state_100 = next_176_arg_1 [L131] input_2 = __VERIFIER_nondet_uchar() [L132] input_3 = __VERIFIER_nondet_uchar() [L133] input_3 = input_3 & mask_SORT_1 [L134] input_4 = __VERIFIER_nondet_uchar() [L135] input_4 = input_4 & mask_SORT_1 [L137] SORT_1 var_84_arg_0 = state_5; [L138] SORT_1 var_84 = ~var_84_arg_0; [L139] SORT_1 var_85_arg_0 = var_84; [L140] SORT_1 var_85 = ~var_85_arg_0; [L141] SORT_1 var_86_arg_0 = state_5; [L142] SORT_1 var_86_arg_1 = var_85; [L143] SORT_1 var_86 = var_86_arg_0 | var_86_arg_1; [L144] var_86 = var_86 & mask_SORT_1 [L145] SORT_1 constr_87_arg_0 = var_86; [L146] CALL assume_abort_if_not(constr_87_arg_0) [L21] COND FALSE !(!cond) [L146] RET assume_abort_if_not(constr_87_arg_0) [L147] SORT_1 var_88_arg_0 = var_8; [L148] var_88_arg_0 = var_88_arg_0 & mask_SORT_1 [L149] SORT_11 var_88 = var_88_arg_0; [L150] SORT_11 var_89_arg_0 = state_76; [L151] SORT_11 var_89_arg_1 = var_88; [L152] SORT_1 var_89 = var_89_arg_0 <= var_89_arg_1; [L153] SORT_1 var_90_arg_0 = input_4; [L154] SORT_1 var_90_arg_1 = var_89; [L155] SORT_1 var_90 = var_90_arg_0 ^ var_90_arg_1; [L156] SORT_1 var_91_arg_0 = var_90; [L157] SORT_1 var_91 = ~var_91_arg_0; [L158] SORT_1 var_92_arg_0 = var_90; [L159] SORT_1 var_92 = ~var_92_arg_0; [L160] SORT_1 var_93_arg_0 = var_91; [L161] SORT_1 var_93_arg_1 = var_92; [L162] SORT_1 var_93 = var_93_arg_0 | var_93_arg_1; [L163] var_93 = var_93 & mask_SORT_1 [L164] SORT_1 constr_94_arg_0 = var_93; [L165] CALL assume_abort_if_not(constr_94_arg_0) [L21] COND FALSE !(!cond) [L165] RET assume_abort_if_not(constr_94_arg_0) [L167] SORT_72 var_74_arg_0 = var_73; [L168] var_74_arg_0 = var_74_arg_0 & mask_SORT_72 [L169] SORT_11 var_74 = var_74_arg_0; [L170] SORT_11 var_78_arg_0 = var_74; [L171] SORT_11 var_78_arg_1 = state_76; [L172] SORT_1 var_78 = var_78_arg_0 < var_78_arg_1; [L173] SORT_1 var_15_arg_0 = input_3; [L174] SORT_12 var_15_arg_1 = var_14; [L175] SORT_12 var_15_arg_2 = var_13; [L176] SORT_12 var_15 = var_15_arg_0 ? var_15_arg_1 : var_15_arg_2; [L177] var_15 = var_15 & mask_SORT_12 [L178] SORT_12 var_16_arg_0 = var_13; [L179] SORT_12 var_16_arg_1 = var_15; [L180] SORT_11 var_16 = ((SORT_11)var_16_arg_0 << 8) | var_16_arg_1; [L181] SORT_11 var_18_arg_0 = var_16; [L182] SORT_11 var_18_arg_1 = state_17; [L183] SORT_11 var_18 = var_18_arg_0 - var_18_arg_1; [L184] var_18 = var_18 & mask_SORT_11 [L185] SORT_11 var_19_arg_0 = var_18; [L186] SORT_1 var_19 = var_19_arg_0 >> 15; [L187] SORT_1 var_21_arg_0 = var_19; [L188] SORT_9 var_21_arg_1 = var_10; [L189] SORT_20 var_21 = ((SORT_20)var_21_arg_0 << 31) | var_21_arg_1; [L190] var_21 = var_21 & mask_SORT_20 [L191] SORT_11 var_64_arg_0 = var_18; [L192] SORT_1 var_64 = var_64_arg_0 >> 15; [L193] SORT_11 var_61_arg_0 = var_18; [L194] SORT_1 var_61 = var_61_arg_0 >> 15; [L195] SORT_11 var_58_arg_0 = var_18; [L196] SORT_1 var_58 = var_58_arg_0 >> 15; [L197] SORT_11 var_55_arg_0 = var_18; [L198] SORT_1 var_55 = var_55_arg_0 >> 15; [L199] SORT_11 var_52_arg_0 = var_18; [L200] SORT_1 var_52 = var_52_arg_0 >> 15; [L201] SORT_11 var_49_arg_0 = var_18; [L202] SORT_1 var_49 = var_49_arg_0 >> 15; [L203] SORT_11 var_46_arg_0 = var_18; [L204] SORT_1 var_46 = var_46_arg_0 >> 15; [L205] SORT_11 var_43_arg_0 = var_18; [L206] SORT_1 var_43 = var_43_arg_0 >> 15; [L207] SORT_11 var_40_arg_0 = var_18; [L208] SORT_1 var_40 = var_40_arg_0 >> 15; [L209] SORT_11 var_37_arg_0 = var_18; [L210] SORT_1 var_37 = var_37_arg_0 >> 15; [L211] SORT_11 var_34_arg_0 = var_18; [L212] SORT_1 var_34 = var_34_arg_0 >> 15; [L213] SORT_11 var_31_arg_0 = var_18; [L214] SORT_1 var_31 = var_31_arg_0 >> 15; [L215] SORT_11 var_28_arg_0 = var_18; [L216] SORT_1 var_28 = var_28_arg_0 >> 15; [L217] SORT_11 var_25_arg_0 = var_18; [L218] SORT_1 var_25 = var_25_arg_0 >> 15; [L219] SORT_11 var_22_arg_0 = var_18; [L220] SORT_1 var_22 = var_22_arg_0 >> 15; [L221] SORT_1 var_24_arg_0 = var_22; [L222] SORT_11 var_24_arg_1 = var_18; [L223] SORT_23 var_24 = ((SORT_23)var_24_arg_0 << 16) | var_24_arg_1; [L224] var_24 = var_24 & mask_SORT_23 [L225] SORT_1 var_27_arg_0 = var_25; [L226] SORT_23 var_27_arg_1 = var_24; [L227] SORT_26 var_27 = ((SORT_26)var_27_arg_0 << 17) | var_27_arg_1; [L228] var_27 = var_27 & mask_SORT_26 [L229] SORT_1 var_30_arg_0 = var_28; [L230] SORT_26 var_30_arg_1 = var_27; [L231] SORT_29 var_30 = ((SORT_29)var_30_arg_0 << 18) | var_30_arg_1; [L232] var_30 = var_30 & mask_SORT_29 [L233] SORT_1 var_33_arg_0 = var_31; [L234] SORT_29 var_33_arg_1 = var_30; [L235] SORT_32 var_33 = ((SORT_32)var_33_arg_0 << 19) | var_33_arg_1; [L236] var_33 = var_33 & mask_SORT_32 [L237] SORT_1 var_36_arg_0 = var_34; [L238] SORT_32 var_36_arg_1 = var_33; [L239] SORT_35 var_36 = ((SORT_35)var_36_arg_0 << 20) | var_36_arg_1; [L240] var_36 = var_36 & mask_SORT_35 [L241] SORT_1 var_39_arg_0 = var_37; [L242] SORT_35 var_39_arg_1 = var_36; [L243] SORT_38 var_39 = ((SORT_38)var_39_arg_0 << 21) | var_39_arg_1; [L244] var_39 = var_39 & mask_SORT_38 [L245] SORT_1 var_42_arg_0 = var_40; [L246] SORT_38 var_42_arg_1 = var_39; [L247] SORT_41 var_42 = ((SORT_41)var_42_arg_0 << 22) | var_42_arg_1; [L248] var_42 = var_42 & mask_SORT_41 [L249] SORT_1 var_45_arg_0 = var_43; [L250] SORT_41 var_45_arg_1 = var_42; [L251] SORT_44 var_45 = ((SORT_44)var_45_arg_0 << 23) | var_45_arg_1; [L252] var_45 = var_45 & mask_SORT_44 [L253] SORT_1 var_48_arg_0 = var_46; [L254] SORT_44 var_48_arg_1 = var_45; [L255] SORT_47 var_48 = ((SORT_47)var_48_arg_0 << 24) | var_48_arg_1; [L256] var_48 = var_48 & mask_SORT_47 [L257] SORT_1 var_51_arg_0 = var_49; [L258] SORT_47 var_51_arg_1 = var_48; [L259] SORT_50 var_51 = ((SORT_50)var_51_arg_0 << 25) | var_51_arg_1; [L260] var_51 = var_51 & mask_SORT_50 [L261] SORT_1 var_54_arg_0 = var_52; [L262] SORT_50 var_54_arg_1 = var_51; [L263] SORT_53 var_54 = ((SORT_53)var_54_arg_0 << 26) | var_54_arg_1; [L264] var_54 = var_54 & mask_SORT_53 [L265] SORT_1 var_57_arg_0 = var_55; [L266] SORT_53 var_57_arg_1 = var_54; [L267] SORT_56 var_57 = ((SORT_56)var_57_arg_0 << 27) | var_57_arg_1; [L268] var_57 = var_57 & mask_SORT_56 [L269] SORT_1 var_60_arg_0 = var_58; [L270] SORT_56 var_60_arg_1 = var_57; [L271] SORT_59 var_60 = ((SORT_59)var_60_arg_0 << 28) | var_60_arg_1; [L272] var_60 = var_60 & mask_SORT_59 [L273] SORT_1 var_63_arg_0 = var_61; [L274] SORT_59 var_63_arg_1 = var_60; [L275] SORT_62 var_63 = ((SORT_62)var_63_arg_0 << 29) | var_63_arg_1; [L276] var_63 = var_63 & mask_SORT_62 [L277] SORT_1 var_65_arg_0 = var_64; [L278] SORT_62 var_65_arg_1 = var_63; [L279] SORT_9 var_65 = ((SORT_9)var_65_arg_0 << 30) | var_65_arg_1; [L280] SORT_9 var_66_arg_0 = var_65; [L281] var_66_arg_0 = var_66_arg_0 & mask_SORT_9 [L282] SORT_20 var_66 = var_66_arg_0; [L283] SORT_20 var_67_arg_0 = var_21; [L284] SORT_20 var_67_arg_1 = var_66; [L285] SORT_1 var_67 = var_67_arg_0 <= var_67_arg_1; [L286] SORT_1 var_68_arg_0 = var_67; [L287] SORT_1 var_68_arg_1 = var_8; [L288] SORT_1 var_68_arg_2 = var_7; [L289] SORT_1 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L290] SORT_1 var_69_arg_0 = input_3; [L291] SORT_1 var_69_arg_1 = var_68; [L292] SORT_1 var_69 = var_69_arg_0 ^ var_69_arg_1; [L293] SORT_1 var_70_arg_0 = var_69; [L294] SORT_1 var_70 = ~var_70_arg_0; [L295] SORT_1 var_79_arg_0 = var_78; [L296] SORT_1 var_79_arg_1 = var_70; [L297] SORT_1 var_79_arg_2 = var_8; [L298] SORT_1 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L299] SORT_1 var_80_arg_0 = var_79; [L300] SORT_1 var_80 = ~var_80_arg_0; [L301] SORT_1 var_81_arg_0 = var_79; [L302] SORT_1 var_81 = ~var_81_arg_0; [L303] SORT_1 var_82_arg_0 = var_80; [L304] SORT_1 var_82_arg_1 = var_81; [L305] SORT_1 var_82 = var_82_arg_0 & var_82_arg_1; [L306] var_82 = var_82 & mask_SORT_1 [L307] SORT_1 bad_83_arg_0 = var_82; [L308] CALL __VERIFIER_assert(!(bad_83_arg_0)) [L20] COND FALSE !(!(cond)) [L308] RET __VERIFIER_assert(!(bad_83_arg_0)) [L310] SORT_96 var_139_arg_0 = state_100; [L311] SORT_96 var_139_arg_1 = var_138; [L312] SORT_1 var_139 = var_139_arg_0 == var_139_arg_1; [L313] SORT_72 var_132_arg_0 = var_131; [L314] var_132_arg_0 = var_132_arg_0 & mask_SORT_72 [L315] SORT_96 var_132 = var_132_arg_0; [L316] SORT_96 var_133_arg_0 = var_132; [L317] SORT_96 var_133_arg_1 = state_97; [L318] SORT_1 var_133 = var_133_arg_0 <= var_133_arg_1; [L319] SORT_72 var_135_arg_0 = var_134; [L320] var_135_arg_0 = var_135_arg_0 & mask_SORT_72 [L321] SORT_96 var_135 = var_135_arg_0; [L322] SORT_96 var_136_arg_0 = state_97; [L323] SORT_96 var_136_arg_1 = var_135; [L324] SORT_1 var_136 = var_136_arg_0 <= var_136_arg_1; [L325] SORT_1 var_137_arg_0 = var_133; [L326] SORT_1 var_137_arg_1 = var_136; [L327] SORT_1 var_137 = var_137_arg_0 & var_137_arg_1; [L328] SORT_1 var_140_arg_0 = var_139; [L329] SORT_1 var_140_arg_1 = var_137; [L330] SORT_1 var_140_arg_2 = var_8; [L331] SORT_1 var_140 = var_140_arg_0 ? var_140_arg_1 : var_140_arg_2; [L332] SORT_1 var_141_arg_0 = input_4; [L333] SORT_1 var_141_arg_1 = var_8; [L334] SORT_1 var_141_arg_2 = var_140; [L335] SORT_1 var_141 = var_141_arg_0 ? var_141_arg_1 : var_141_arg_2; [L336] SORT_1 next_142_arg_1 = var_141; [L337] SORT_12 var_113_arg_0 = var_112; [L338] var_113_arg_0 = (var_113_arg_0 & msb_SORT_12) ? (var_113_arg_0 | ~mask_SORT_12) : (var_113_arg_0 & mask_SORT_12) [L339] SORT_41 var_113 = (int)((signed char)var_113_arg_0); [L340] SORT_11 var_114_arg_0 = state_17; [L341] var_114_arg_0 = (var_114_arg_0 & msb_SORT_11) ? (var_114_arg_0 | ~mask_SORT_11) : (var_114_arg_0 & mask_SORT_11) [L342] SORT_41 var_114 = (int)((short)var_114_arg_0); [L343] SORT_41 var_115_arg_0 = var_113; [L344] SORT_41 var_115_arg_1 = var_114; [L345] SORT_41 var_115 = var_115_arg_0 * var_115_arg_1; [L346] SORT_105 var_107_arg_0 = var_106; [L347] var_107_arg_0 = (var_107_arg_0 & msb_SORT_105) ? (var_107_arg_0 | ~mask_SORT_105) : (var_107_arg_0 & mask_SORT_105) [L348] SORT_26 var_107 = (int)((signed char)var_107_arg_0); [L349] SORT_11 var_108_arg_0 = var_16; [L350] var_108_arg_0 = (var_108_arg_0 & msb_SORT_11) ? (var_108_arg_0 | ~mask_SORT_11) : (var_108_arg_0 & mask_SORT_11) [L351] SORT_26 var_108 = (int)((short)var_108_arg_0); [L352] SORT_26 var_109_arg_0 = var_107; [L353] SORT_26 var_109_arg_1 = var_108; [L354] SORT_26 var_109 = var_109_arg_0 * var_109_arg_1; [L355] var_109 = var_109 & mask_SORT_26 [L356] SORT_26 var_151_arg_0 = var_109; [L357] SORT_1 var_151 = var_151_arg_0 >> 17; [L358] SORT_26 var_149_arg_0 = var_109; [L359] SORT_1 var_149 = var_149_arg_0 >> 17; [L360] SORT_26 var_147_arg_0 = var_109; [L361] SORT_1 var_147 = var_147_arg_0 >> 17; [L362] SORT_26 var_145_arg_0 = var_109; [L363] SORT_1 var_145 = var_145_arg_0 >> 17; [L364] SORT_26 var_143_arg_0 = var_109; [L365] SORT_1 var_143 = var_143_arg_0 >> 17; [L366] SORT_1 var_144_arg_0 = var_143; [L367] SORT_26 var_144_arg_1 = var_109; [L368] SORT_29 var_144 = ((SORT_29)var_144_arg_0 << 18) | var_144_arg_1; [L369] var_144 = var_144 & mask_SORT_29 [L370] SORT_1 var_146_arg_0 = var_145; [L371] SORT_29 var_146_arg_1 = var_144; [L372] SORT_32 var_146 = ((SORT_32)var_146_arg_0 << 19) | var_146_arg_1; [L373] var_146 = var_146 & mask_SORT_32 [L374] SORT_1 var_148_arg_0 = var_147; [L375] SORT_32 var_148_arg_1 = var_146; [L376] SORT_35 var_148 = ((SORT_35)var_148_arg_0 << 20) | var_148_arg_1; [L377] var_148 = var_148 & mask_SORT_35 [L378] SORT_1 var_150_arg_0 = var_149; [L379] SORT_35 var_150_arg_1 = var_148; [L380] SORT_38 var_150 = ((SORT_38)var_150_arg_0 << 21) | var_150_arg_1; [L381] var_150 = var_150 & mask_SORT_38 [L382] SORT_1 var_152_arg_0 = var_151; [L383] SORT_38 var_152_arg_1 = var_150; [L384] SORT_41 var_152 = ((SORT_41)var_152_arg_0 << 22) | var_152_arg_1; [L385] SORT_41 var_153_arg_0 = var_115; [L386] SORT_41 var_153_arg_1 = var_152; [L387] SORT_41 var_153 = var_153_arg_0 + var_153_arg_1; [L388] SORT_154 var_156_arg_0 = var_155; [L389] var_156_arg_0 = var_156_arg_0 & mask_SORT_154 [L390] SORT_41 var_156 = var_156_arg_0; [L391] SORT_41 var_157_arg_0 = var_153; [L392] SORT_41 var_157_arg_1 = var_156; [L393] SORT_41 var_157 = var_157_arg_0 + var_157_arg_1; [L394] SORT_41 var_158_arg_0 = var_157; [L395] SORT_11 var_158 = var_158_arg_0 >> 7; [L396] SORT_1 var_159_arg_0 = input_4; [L397] SORT_11 var_159_arg_1 = var_119; [L398] SORT_11 var_159_arg_2 = var_158; [L399] SORT_11 var_159 = var_159_arg_0 ? var_159_arg_1 : var_159_arg_2; [L400] SORT_11 next_160_arg_1 = var_159; [L401] SORT_1 var_161_arg_0 = var_8; [L402] var_161_arg_0 = var_161_arg_0 & mask_SORT_1 [L403] SORT_11 var_161 = var_161_arg_0; [L404] SORT_11 var_162_arg_0 = state_76; [L405] SORT_11 var_162_arg_1 = var_161; [L406] SORT_11 var_162 = var_162_arg_0 + var_162_arg_1; [L407] var_162 = var_162 & mask_SORT_11 [L408] SORT_11 next_163_arg_1 = var_162; [L409] SORT_72 var_167_arg_0 = var_166; [L410] SORT_1 var_167_arg_1 = input_3; [L411] SORT_96 var_167 = ((SORT_96)var_167_arg_0 << 1) | var_167_arg_1; [L412] SORT_1 var_164_arg_0 = input_3; [L413] var_164_arg_0 = var_164_arg_0 & mask_SORT_1 [L414] SORT_96 var_164 = var_164_arg_0; [L415] SORT_96 var_165_arg_0 = state_97; [L416] SORT_96 var_165_arg_1 = var_164; [L417] SORT_96 var_165 = var_165_arg_0 + var_165_arg_1; [L418] SORT_1 var_168_arg_0 = var_139; [L419] SORT_96 var_168_arg_1 = var_167; [L420] SORT_96 var_168_arg_2 = var_165; [L421] SORT_96 var_168 = var_168_arg_0 ? var_168_arg_1 : var_168_arg_2; [L422] SORT_1 var_170_arg_0 = input_4; [L423] SORT_96 var_170_arg_1 = var_169; [L424] SORT_96 var_170_arg_2 = var_168; [L425] SORT_96 var_170 = var_170_arg_0 ? var_170_arg_1 : var_170_arg_2; [L426] var_170 = var_170 & mask_SORT_96 [L427] SORT_96 next_171_arg_1 = var_170; [L428] SORT_1 var_172_arg_0 = var_8; [L429] var_172_arg_0 = var_172_arg_0 & mask_SORT_1 [L430] SORT_96 var_172 = var_172_arg_0; [L431] SORT_96 var_173_arg_0 = state_100; [L432] SORT_96 var_173_arg_1 = var_172; [L433] SORT_96 var_173 = var_173_arg_0 + var_173_arg_1; [L434] SORT_1 var_174_arg_0 = var_139; [L435] SORT_96 var_174_arg_1 = var_169; [L436] SORT_96 var_174_arg_2 = var_173; [L437] SORT_96 var_174 = var_174_arg_0 ? var_174_arg_1 : var_174_arg_2; [L438] SORT_1 var_175_arg_0 = input_4; [L439] SORT_96 var_175_arg_1 = var_169; [L440] SORT_96 var_175_arg_2 = var_174; [L441] SORT_96 var_175 = var_175_arg_0 ? var_175_arg_1 : var_175_arg_2; [L442] var_175 = var_175 & mask_SORT_96 [L443] SORT_96 next_176_arg_1 = var_175; [L445] state_5 = next_142_arg_1 [L446] state_17 = next_160_arg_1 [L447] state_76 = next_163_arg_1 [L448] state_97 = next_171_arg_1 [L449] state_100 = next_176_arg_1 [L131] input_2 = __VERIFIER_nondet_uchar() [L132] input_3 = __VERIFIER_nondet_uchar() [L133] input_3 = input_3 & mask_SORT_1 [L134] input_4 = __VERIFIER_nondet_uchar() [L135] input_4 = input_4 & mask_SORT_1 [L137] SORT_1 var_84_arg_0 = state_5; [L138] SORT_1 var_84 = ~var_84_arg_0; [L139] SORT_1 var_85_arg_0 = var_84; [L140] SORT_1 var_85 = ~var_85_arg_0; [L141] SORT_1 var_86_arg_0 = state_5; [L142] SORT_1 var_86_arg_1 = var_85; [L143] SORT_1 var_86 = var_86_arg_0 | var_86_arg_1; [L144] var_86 = var_86 & mask_SORT_1 [L145] SORT_1 constr_87_arg_0 = var_86; [L146] CALL assume_abort_if_not(constr_87_arg_0) [L21] COND FALSE !(!cond) [L146] RET assume_abort_if_not(constr_87_arg_0) [L147] SORT_1 var_88_arg_0 = var_8; [L148] var_88_arg_0 = var_88_arg_0 & mask_SORT_1 [L149] SORT_11 var_88 = var_88_arg_0; [L150] SORT_11 var_89_arg_0 = state_76; [L151] SORT_11 var_89_arg_1 = var_88; [L152] SORT_1 var_89 = var_89_arg_0 <= var_89_arg_1; [L153] SORT_1 var_90_arg_0 = input_4; [L154] SORT_1 var_90_arg_1 = var_89; [L155] SORT_1 var_90 = var_90_arg_0 ^ var_90_arg_1; [L156] SORT_1 var_91_arg_0 = var_90; [L157] SORT_1 var_91 = ~var_91_arg_0; [L158] SORT_1 var_92_arg_0 = var_90; [L159] SORT_1 var_92 = ~var_92_arg_0; [L160] SORT_1 var_93_arg_0 = var_91; [L161] SORT_1 var_93_arg_1 = var_92; [L162] SORT_1 var_93 = var_93_arg_0 | var_93_arg_1; [L163] var_93 = var_93 & mask_SORT_1 [L164] SORT_1 constr_94_arg_0 = var_93; [L165] CALL assume_abort_if_not(constr_94_arg_0) [L21] COND FALSE !(!cond) [L165] RET assume_abort_if_not(constr_94_arg_0) [L167] SORT_72 var_74_arg_0 = var_73; [L168] var_74_arg_0 = var_74_arg_0 & mask_SORT_72 [L169] SORT_11 var_74 = var_74_arg_0; [L170] SORT_11 var_78_arg_0 = var_74; [L171] SORT_11 var_78_arg_1 = state_76; [L172] SORT_1 var_78 = var_78_arg_0 < var_78_arg_1; [L173] SORT_1 var_15_arg_0 = input_3; [L174] SORT_12 var_15_arg_1 = var_14; [L175] SORT_12 var_15_arg_2 = var_13; [L176] SORT_12 var_15 = var_15_arg_0 ? var_15_arg_1 : var_15_arg_2; [L177] var_15 = var_15 & mask_SORT_12 [L178] SORT_12 var_16_arg_0 = var_13; [L179] SORT_12 var_16_arg_1 = var_15; [L180] SORT_11 var_16 = ((SORT_11)var_16_arg_0 << 8) | var_16_arg_1; [L181] SORT_11 var_18_arg_0 = var_16; [L182] SORT_11 var_18_arg_1 = state_17; [L183] SORT_11 var_18 = var_18_arg_0 - var_18_arg_1; [L184] var_18 = var_18 & mask_SORT_11 [L185] SORT_11 var_19_arg_0 = var_18; [L186] SORT_1 var_19 = var_19_arg_0 >> 15; [L187] SORT_1 var_21_arg_0 = var_19; [L188] SORT_9 var_21_arg_1 = var_10; [L189] SORT_20 var_21 = ((SORT_20)var_21_arg_0 << 31) | var_21_arg_1; [L190] var_21 = var_21 & mask_SORT_20 [L191] SORT_11 var_64_arg_0 = var_18; [L192] SORT_1 var_64 = var_64_arg_0 >> 15; [L193] SORT_11 var_61_arg_0 = var_18; [L194] SORT_1 var_61 = var_61_arg_0 >> 15; [L195] SORT_11 var_58_arg_0 = var_18; [L196] SORT_1 var_58 = var_58_arg_0 >> 15; [L197] SORT_11 var_55_arg_0 = var_18; [L198] SORT_1 var_55 = var_55_arg_0 >> 15; [L199] SORT_11 var_52_arg_0 = var_18; [L200] SORT_1 var_52 = var_52_arg_0 >> 15; [L201] SORT_11 var_49_arg_0 = var_18; [L202] SORT_1 var_49 = var_49_arg_0 >> 15; [L203] SORT_11 var_46_arg_0 = var_18; [L204] SORT_1 var_46 = var_46_arg_0 >> 15; [L205] SORT_11 var_43_arg_0 = var_18; [L206] SORT_1 var_43 = var_43_arg_0 >> 15; [L207] SORT_11 var_40_arg_0 = var_18; [L208] SORT_1 var_40 = var_40_arg_0 >> 15; [L209] SORT_11 var_37_arg_0 = var_18; [L210] SORT_1 var_37 = var_37_arg_0 >> 15; [L211] SORT_11 var_34_arg_0 = var_18; [L212] SORT_1 var_34 = var_34_arg_0 >> 15; [L213] SORT_11 var_31_arg_0 = var_18; [L214] SORT_1 var_31 = var_31_arg_0 >> 15; [L215] SORT_11 var_28_arg_0 = var_18; [L216] SORT_1 var_28 = var_28_arg_0 >> 15; [L217] SORT_11 var_25_arg_0 = var_18; [L218] SORT_1 var_25 = var_25_arg_0 >> 15; [L219] SORT_11 var_22_arg_0 = var_18; [L220] SORT_1 var_22 = var_22_arg_0 >> 15; [L221] SORT_1 var_24_arg_0 = var_22; [L222] SORT_11 var_24_arg_1 = var_18; [L223] SORT_23 var_24 = ((SORT_23)var_24_arg_0 << 16) | var_24_arg_1; [L224] var_24 = var_24 & mask_SORT_23 [L225] SORT_1 var_27_arg_0 = var_25; [L226] SORT_23 var_27_arg_1 = var_24; [L227] SORT_26 var_27 = ((SORT_26)var_27_arg_0 << 17) | var_27_arg_1; [L228] var_27 = var_27 & mask_SORT_26 [L229] SORT_1 var_30_arg_0 = var_28; [L230] SORT_26 var_30_arg_1 = var_27; [L231] SORT_29 var_30 = ((SORT_29)var_30_arg_0 << 18) | var_30_arg_1; [L232] var_30 = var_30 & mask_SORT_29 [L233] SORT_1 var_33_arg_0 = var_31; [L234] SORT_29 var_33_arg_1 = var_30; [L235] SORT_32 var_33 = ((SORT_32)var_33_arg_0 << 19) | var_33_arg_1; [L236] var_33 = var_33 & mask_SORT_32 [L237] SORT_1 var_36_arg_0 = var_34; [L238] SORT_32 var_36_arg_1 = var_33; [L239] SORT_35 var_36 = ((SORT_35)var_36_arg_0 << 20) | var_36_arg_1; [L240] var_36 = var_36 & mask_SORT_35 [L241] SORT_1 var_39_arg_0 = var_37; [L242] SORT_35 var_39_arg_1 = var_36; [L243] SORT_38 var_39 = ((SORT_38)var_39_arg_0 << 21) | var_39_arg_1; [L244] var_39 = var_39 & mask_SORT_38 [L245] SORT_1 var_42_arg_0 = var_40; [L246] SORT_38 var_42_arg_1 = var_39; [L247] SORT_41 var_42 = ((SORT_41)var_42_arg_0 << 22) | var_42_arg_1; [L248] var_42 = var_42 & mask_SORT_41 [L249] SORT_1 var_45_arg_0 = var_43; [L250] SORT_41 var_45_arg_1 = var_42; [L251] SORT_44 var_45 = ((SORT_44)var_45_arg_0 << 23) | var_45_arg_1; [L252] var_45 = var_45 & mask_SORT_44 [L253] SORT_1 var_48_arg_0 = var_46; [L254] SORT_44 var_48_arg_1 = var_45; [L255] SORT_47 var_48 = ((SORT_47)var_48_arg_0 << 24) | var_48_arg_1; [L256] var_48 = var_48 & mask_SORT_47 [L257] SORT_1 var_51_arg_0 = var_49; [L258] SORT_47 var_51_arg_1 = var_48; [L259] SORT_50 var_51 = ((SORT_50)var_51_arg_0 << 25) | var_51_arg_1; [L260] var_51 = var_51 & mask_SORT_50 [L261] SORT_1 var_54_arg_0 = var_52; [L262] SORT_50 var_54_arg_1 = var_51; [L263] SORT_53 var_54 = ((SORT_53)var_54_arg_0 << 26) | var_54_arg_1; [L264] var_54 = var_54 & mask_SORT_53 [L265] SORT_1 var_57_arg_0 = var_55; [L266] SORT_53 var_57_arg_1 = var_54; [L267] SORT_56 var_57 = ((SORT_56)var_57_arg_0 << 27) | var_57_arg_1; [L268] var_57 = var_57 & mask_SORT_56 [L269] SORT_1 var_60_arg_0 = var_58; [L270] SORT_56 var_60_arg_1 = var_57; [L271] SORT_59 var_60 = ((SORT_59)var_60_arg_0 << 28) | var_60_arg_1; [L272] var_60 = var_60 & mask_SORT_59 [L273] SORT_1 var_63_arg_0 = var_61; [L274] SORT_59 var_63_arg_1 = var_60; [L275] SORT_62 var_63 = ((SORT_62)var_63_arg_0 << 29) | var_63_arg_1; [L276] var_63 = var_63 & mask_SORT_62 [L277] SORT_1 var_65_arg_0 = var_64; [L278] SORT_62 var_65_arg_1 = var_63; [L279] SORT_9 var_65 = ((SORT_9)var_65_arg_0 << 30) | var_65_arg_1; [L280] SORT_9 var_66_arg_0 = var_65; [L281] var_66_arg_0 = var_66_arg_0 & mask_SORT_9 [L282] SORT_20 var_66 = var_66_arg_0; [L283] SORT_20 var_67_arg_0 = var_21; [L284] SORT_20 var_67_arg_1 = var_66; [L285] SORT_1 var_67 = var_67_arg_0 <= var_67_arg_1; [L286] SORT_1 var_68_arg_0 = var_67; [L287] SORT_1 var_68_arg_1 = var_8; [L288] SORT_1 var_68_arg_2 = var_7; [L289] SORT_1 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L290] SORT_1 var_69_arg_0 = input_3; [L291] SORT_1 var_69_arg_1 = var_68; [L292] SORT_1 var_69 = var_69_arg_0 ^ var_69_arg_1; [L293] SORT_1 var_70_arg_0 = var_69; [L294] SORT_1 var_70 = ~var_70_arg_0; [L295] SORT_1 var_79_arg_0 = var_78; [L296] SORT_1 var_79_arg_1 = var_70; [L297] SORT_1 var_79_arg_2 = var_8; [L298] SORT_1 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L299] SORT_1 var_80_arg_0 = var_79; [L300] SORT_1 var_80 = ~var_80_arg_0; [L301] SORT_1 var_81_arg_0 = var_79; [L302] SORT_1 var_81 = ~var_81_arg_0; [L303] SORT_1 var_82_arg_0 = var_80; [L304] SORT_1 var_82_arg_1 = var_81; [L305] SORT_1 var_82 = var_82_arg_0 & var_82_arg_1; [L306] var_82 = var_82 & mask_SORT_1 [L307] SORT_1 bad_83_arg_0 = var_82; [L308] CALL __VERIFIER_assert(!(bad_83_arg_0)) [L20] COND FALSE !(!(cond)) [L308] RET __VERIFIER_assert(!(bad_83_arg_0)) [L310] SORT_96 var_139_arg_0 = state_100; [L311] SORT_96 var_139_arg_1 = var_138; [L312] SORT_1 var_139 = var_139_arg_0 == var_139_arg_1; [L313] SORT_72 var_132_arg_0 = var_131; [L314] var_132_arg_0 = var_132_arg_0 & mask_SORT_72 [L315] SORT_96 var_132 = var_132_arg_0; [L316] SORT_96 var_133_arg_0 = var_132; [L317] SORT_96 var_133_arg_1 = state_97; [L318] SORT_1 var_133 = var_133_arg_0 <= var_133_arg_1; [L319] SORT_72 var_135_arg_0 = var_134; [L320] var_135_arg_0 = var_135_arg_0 & mask_SORT_72 [L321] SORT_96 var_135 = var_135_arg_0; [L322] SORT_96 var_136_arg_0 = state_97; [L323] SORT_96 var_136_arg_1 = var_135; [L324] SORT_1 var_136 = var_136_arg_0 <= var_136_arg_1; [L325] SORT_1 var_137_arg_0 = var_133; [L326] SORT_1 var_137_arg_1 = var_136; [L327] SORT_1 var_137 = var_137_arg_0 & var_137_arg_1; [L328] SORT_1 var_140_arg_0 = var_139; [L329] SORT_1 var_140_arg_1 = var_137; [L330] SORT_1 var_140_arg_2 = var_8; [L331] SORT_1 var_140 = var_140_arg_0 ? var_140_arg_1 : var_140_arg_2; [L332] SORT_1 var_141_arg_0 = input_4; [L333] SORT_1 var_141_arg_1 = var_8; [L334] SORT_1 var_141_arg_2 = var_140; [L335] SORT_1 var_141 = var_141_arg_0 ? var_141_arg_1 : var_141_arg_2; [L336] SORT_1 next_142_arg_1 = var_141; [L337] SORT_12 var_113_arg_0 = var_112; [L338] var_113_arg_0 = (var_113_arg_0 & msb_SORT_12) ? (var_113_arg_0 | ~mask_SORT_12) : (var_113_arg_0 & mask_SORT_12) [L339] SORT_41 var_113 = (int)((signed char)var_113_arg_0); [L340] SORT_11 var_114_arg_0 = state_17; [L341] var_114_arg_0 = (var_114_arg_0 & msb_SORT_11) ? (var_114_arg_0 | ~mask_SORT_11) : (var_114_arg_0 & mask_SORT_11) [L342] SORT_41 var_114 = (int)((short)var_114_arg_0); [L343] SORT_41 var_115_arg_0 = var_113; [L344] SORT_41 var_115_arg_1 = var_114; [L345] SORT_41 var_115 = var_115_arg_0 * var_115_arg_1; [L346] SORT_105 var_107_arg_0 = var_106; [L347] var_107_arg_0 = (var_107_arg_0 & msb_SORT_105) ? (var_107_arg_0 | ~mask_SORT_105) : (var_107_arg_0 & mask_SORT_105) [L348] SORT_26 var_107 = (int)((signed char)var_107_arg_0); [L349] SORT_11 var_108_arg_0 = var_16; [L350] var_108_arg_0 = (var_108_arg_0 & msb_SORT_11) ? (var_108_arg_0 | ~mask_SORT_11) : (var_108_arg_0 & mask_SORT_11) [L351] SORT_26 var_108 = (int)((short)var_108_arg_0); [L352] SORT_26 var_109_arg_0 = var_107; [L353] SORT_26 var_109_arg_1 = var_108; [L354] SORT_26 var_109 = var_109_arg_0 * var_109_arg_1; [L355] var_109 = var_109 & mask_SORT_26 [L356] SORT_26 var_151_arg_0 = var_109; [L357] SORT_1 var_151 = var_151_arg_0 >> 17; [L358] SORT_26 var_149_arg_0 = var_109; [L359] SORT_1 var_149 = var_149_arg_0 >> 17; [L360] SORT_26 var_147_arg_0 = var_109; [L361] SORT_1 var_147 = var_147_arg_0 >> 17; [L362] SORT_26 var_145_arg_0 = var_109; [L363] SORT_1 var_145 = var_145_arg_0 >> 17; [L364] SORT_26 var_143_arg_0 = var_109; [L365] SORT_1 var_143 = var_143_arg_0 >> 17; [L366] SORT_1 var_144_arg_0 = var_143; [L367] SORT_26 var_144_arg_1 = var_109; [L368] SORT_29 var_144 = ((SORT_29)var_144_arg_0 << 18) | var_144_arg_1; [L369] var_144 = var_144 & mask_SORT_29 [L370] SORT_1 var_146_arg_0 = var_145; [L371] SORT_29 var_146_arg_1 = var_144; [L372] SORT_32 var_146 = ((SORT_32)var_146_arg_0 << 19) | var_146_arg_1; [L373] var_146 = var_146 & mask_SORT_32 [L374] SORT_1 var_148_arg_0 = var_147; [L375] SORT_32 var_148_arg_1 = var_146; [L376] SORT_35 var_148 = ((SORT_35)var_148_arg_0 << 20) | var_148_arg_1; [L377] var_148 = var_148 & mask_SORT_35 [L378] SORT_1 var_150_arg_0 = var_149; [L379] SORT_35 var_150_arg_1 = var_148; [L380] SORT_38 var_150 = ((SORT_38)var_150_arg_0 << 21) | var_150_arg_1; [L381] var_150 = var_150 & mask_SORT_38 [L382] SORT_1 var_152_arg_0 = var_151; [L383] SORT_38 var_152_arg_1 = var_150; [L384] SORT_41 var_152 = ((SORT_41)var_152_arg_0 << 22) | var_152_arg_1; [L385] SORT_41 var_153_arg_0 = var_115; [L386] SORT_41 var_153_arg_1 = var_152; [L387] SORT_41 var_153 = var_153_arg_0 + var_153_arg_1; [L388] SORT_154 var_156_arg_0 = var_155; [L389] var_156_arg_0 = var_156_arg_0 & mask_SORT_154 [L390] SORT_41 var_156 = var_156_arg_0; [L391] SORT_41 var_157_arg_0 = var_153; [L392] SORT_41 var_157_arg_1 = var_156; [L393] SORT_41 var_157 = var_157_arg_0 + var_157_arg_1; [L394] SORT_41 var_158_arg_0 = var_157; [L395] SORT_11 var_158 = var_158_arg_0 >> 7; [L396] SORT_1 var_159_arg_0 = input_4; [L397] SORT_11 var_159_arg_1 = var_119; [L398] SORT_11 var_159_arg_2 = var_158; [L399] SORT_11 var_159 = var_159_arg_0 ? var_159_arg_1 : var_159_arg_2; [L400] SORT_11 next_160_arg_1 = var_159; [L401] SORT_1 var_161_arg_0 = var_8; [L402] var_161_arg_0 = var_161_arg_0 & mask_SORT_1 [L403] SORT_11 var_161 = var_161_arg_0; [L404] SORT_11 var_162_arg_0 = state_76; [L405] SORT_11 var_162_arg_1 = var_161; [L406] SORT_11 var_162 = var_162_arg_0 + var_162_arg_1; [L407] var_162 = var_162 & mask_SORT_11 [L408] SORT_11 next_163_arg_1 = var_162; [L409] SORT_72 var_167_arg_0 = var_166; [L410] SORT_1 var_167_arg_1 = input_3; [L411] SORT_96 var_167 = ((SORT_96)var_167_arg_0 << 1) | var_167_arg_1; [L412] SORT_1 var_164_arg_0 = input_3; [L413] var_164_arg_0 = var_164_arg_0 & mask_SORT_1 [L414] SORT_96 var_164 = var_164_arg_0; [L415] SORT_96 var_165_arg_0 = state_97; [L416] SORT_96 var_165_arg_1 = var_164; [L417] SORT_96 var_165 = var_165_arg_0 + var_165_arg_1; [L418] SORT_1 var_168_arg_0 = var_139; [L419] SORT_96 var_168_arg_1 = var_167; [L420] SORT_96 var_168_arg_2 = var_165; [L421] SORT_96 var_168 = var_168_arg_0 ? var_168_arg_1 : var_168_arg_2; [L422] SORT_1 var_170_arg_0 = input_4; [L423] SORT_96 var_170_arg_1 = var_169; [L424] SORT_96 var_170_arg_2 = var_168; [L425] SORT_96 var_170 = var_170_arg_0 ? var_170_arg_1 : var_170_arg_2; [L426] var_170 = var_170 & mask_SORT_96 [L427] SORT_96 next_171_arg_1 = var_170; [L428] SORT_1 var_172_arg_0 = var_8; [L429] var_172_arg_0 = var_172_arg_0 & mask_SORT_1 [L430] SORT_96 var_172 = var_172_arg_0; [L431] SORT_96 var_173_arg_0 = state_100; [L432] SORT_96 var_173_arg_1 = var_172; [L433] SORT_96 var_173 = var_173_arg_0 + var_173_arg_1; [L434] SORT_1 var_174_arg_0 = var_139; [L435] SORT_96 var_174_arg_1 = var_169; [L436] SORT_96 var_174_arg_2 = var_173; [L437] SORT_96 var_174 = var_174_arg_0 ? var_174_arg_1 : var_174_arg_2; [L438] SORT_1 var_175_arg_0 = input_4; [L439] SORT_96 var_175_arg_1 = var_169; [L440] SORT_96 var_175_arg_2 = var_174; [L441] SORT_96 var_175 = var_175_arg_0 ? var_175_arg_1 : var_175_arg_2; [L442] var_175 = var_175 & mask_SORT_96 [L443] SORT_96 next_176_arg_1 = var_175; [L445] state_5 = next_142_arg_1 [L446] state_17 = next_160_arg_1 [L447] state_76 = next_163_arg_1 [L448] state_97 = next_171_arg_1 [L449] state_100 = next_176_arg_1 [L131] input_2 = __VERIFIER_nondet_uchar() [L132] input_3 = __VERIFIER_nondet_uchar() [L133] input_3 = input_3 & mask_SORT_1 [L134] input_4 = __VERIFIER_nondet_uchar() [L135] input_4 = input_4 & mask_SORT_1 [L137] SORT_1 var_84_arg_0 = state_5; [L138] SORT_1 var_84 = ~var_84_arg_0; [L139] SORT_1 var_85_arg_0 = var_84; [L140] SORT_1 var_85 = ~var_85_arg_0; [L141] SORT_1 var_86_arg_0 = state_5; [L142] SORT_1 var_86_arg_1 = var_85; [L143] SORT_1 var_86 = var_86_arg_0 | var_86_arg_1; [L144] var_86 = var_86 & mask_SORT_1 [L145] SORT_1 constr_87_arg_0 = var_86; [L146] CALL assume_abort_if_not(constr_87_arg_0) [L21] COND FALSE !(!cond) [L146] RET assume_abort_if_not(constr_87_arg_0) [L147] SORT_1 var_88_arg_0 = var_8; [L148] var_88_arg_0 = var_88_arg_0 & mask_SORT_1 [L149] SORT_11 var_88 = var_88_arg_0; [L150] SORT_11 var_89_arg_0 = state_76; [L151] SORT_11 var_89_arg_1 = var_88; [L152] SORT_1 var_89 = var_89_arg_0 <= var_89_arg_1; [L153] SORT_1 var_90_arg_0 = input_4; [L154] SORT_1 var_90_arg_1 = var_89; [L155] SORT_1 var_90 = var_90_arg_0 ^ var_90_arg_1; [L156] SORT_1 var_91_arg_0 = var_90; [L157] SORT_1 var_91 = ~var_91_arg_0; [L158] SORT_1 var_92_arg_0 = var_90; [L159] SORT_1 var_92 = ~var_92_arg_0; [L160] SORT_1 var_93_arg_0 = var_91; [L161] SORT_1 var_93_arg_1 = var_92; [L162] SORT_1 var_93 = var_93_arg_0 | var_93_arg_1; [L163] var_93 = var_93 & mask_SORT_1 [L164] SORT_1 constr_94_arg_0 = var_93; [L165] CALL assume_abort_if_not(constr_94_arg_0) [L21] COND FALSE !(!cond) [L165] RET assume_abort_if_not(constr_94_arg_0) [L167] SORT_72 var_74_arg_0 = var_73; [L168] var_74_arg_0 = var_74_arg_0 & mask_SORT_72 [L169] SORT_11 var_74 = var_74_arg_0; [L170] SORT_11 var_78_arg_0 = var_74; [L171] SORT_11 var_78_arg_1 = state_76; [L172] SORT_1 var_78 = var_78_arg_0 < var_78_arg_1; [L173] SORT_1 var_15_arg_0 = input_3; [L174] SORT_12 var_15_arg_1 = var_14; [L175] SORT_12 var_15_arg_2 = var_13; [L176] SORT_12 var_15 = var_15_arg_0 ? var_15_arg_1 : var_15_arg_2; [L177] var_15 = var_15 & mask_SORT_12 [L178] SORT_12 var_16_arg_0 = var_13; [L179] SORT_12 var_16_arg_1 = var_15; [L180] SORT_11 var_16 = ((SORT_11)var_16_arg_0 << 8) | var_16_arg_1; [L181] SORT_11 var_18_arg_0 = var_16; [L182] SORT_11 var_18_arg_1 = state_17; [L183] SORT_11 var_18 = var_18_arg_0 - var_18_arg_1; [L184] var_18 = var_18 & mask_SORT_11 [L185] SORT_11 var_19_arg_0 = var_18; [L186] SORT_1 var_19 = var_19_arg_0 >> 15; [L187] SORT_1 var_21_arg_0 = var_19; [L188] SORT_9 var_21_arg_1 = var_10; [L189] SORT_20 var_21 = ((SORT_20)var_21_arg_0 << 31) | var_21_arg_1; [L190] var_21 = var_21 & mask_SORT_20 [L191] SORT_11 var_64_arg_0 = var_18; [L192] SORT_1 var_64 = var_64_arg_0 >> 15; [L193] SORT_11 var_61_arg_0 = var_18; [L194] SORT_1 var_61 = var_61_arg_0 >> 15; [L195] SORT_11 var_58_arg_0 = var_18; [L196] SORT_1 var_58 = var_58_arg_0 >> 15; [L197] SORT_11 var_55_arg_0 = var_18; [L198] SORT_1 var_55 = var_55_arg_0 >> 15; [L199] SORT_11 var_52_arg_0 = var_18; [L200] SORT_1 var_52 = var_52_arg_0 >> 15; [L201] SORT_11 var_49_arg_0 = var_18; [L202] SORT_1 var_49 = var_49_arg_0 >> 15; [L203] SORT_11 var_46_arg_0 = var_18; [L204] SORT_1 var_46 = var_46_arg_0 >> 15; [L205] SORT_11 var_43_arg_0 = var_18; [L206] SORT_1 var_43 = var_43_arg_0 >> 15; [L207] SORT_11 var_40_arg_0 = var_18; [L208] SORT_1 var_40 = var_40_arg_0 >> 15; [L209] SORT_11 var_37_arg_0 = var_18; [L210] SORT_1 var_37 = var_37_arg_0 >> 15; [L211] SORT_11 var_34_arg_0 = var_18; [L212] SORT_1 var_34 = var_34_arg_0 >> 15; [L213] SORT_11 var_31_arg_0 = var_18; [L214] SORT_1 var_31 = var_31_arg_0 >> 15; [L215] SORT_11 var_28_arg_0 = var_18; [L216] SORT_1 var_28 = var_28_arg_0 >> 15; [L217] SORT_11 var_25_arg_0 = var_18; [L218] SORT_1 var_25 = var_25_arg_0 >> 15; [L219] SORT_11 var_22_arg_0 = var_18; [L220] SORT_1 var_22 = var_22_arg_0 >> 15; [L221] SORT_1 var_24_arg_0 = var_22; [L222] SORT_11 var_24_arg_1 = var_18; [L223] SORT_23 var_24 = ((SORT_23)var_24_arg_0 << 16) | var_24_arg_1; [L224] var_24 = var_24 & mask_SORT_23 [L225] SORT_1 var_27_arg_0 = var_25; [L226] SORT_23 var_27_arg_1 = var_24; [L227] SORT_26 var_27 = ((SORT_26)var_27_arg_0 << 17) | var_27_arg_1; [L228] var_27 = var_27 & mask_SORT_26 [L229] SORT_1 var_30_arg_0 = var_28; [L230] SORT_26 var_30_arg_1 = var_27; [L231] SORT_29 var_30 = ((SORT_29)var_30_arg_0 << 18) | var_30_arg_1; [L232] var_30 = var_30 & mask_SORT_29 [L233] SORT_1 var_33_arg_0 = var_31; [L234] SORT_29 var_33_arg_1 = var_30; [L235] SORT_32 var_33 = ((SORT_32)var_33_arg_0 << 19) | var_33_arg_1; [L236] var_33 = var_33 & mask_SORT_32 [L237] SORT_1 var_36_arg_0 = var_34; [L238] SORT_32 var_36_arg_1 = var_33; [L239] SORT_35 var_36 = ((SORT_35)var_36_arg_0 << 20) | var_36_arg_1; [L240] var_36 = var_36 & mask_SORT_35 [L241] SORT_1 var_39_arg_0 = var_37; [L242] SORT_35 var_39_arg_1 = var_36; [L243] SORT_38 var_39 = ((SORT_38)var_39_arg_0 << 21) | var_39_arg_1; [L244] var_39 = var_39 & mask_SORT_38 [L245] SORT_1 var_42_arg_0 = var_40; [L246] SORT_38 var_42_arg_1 = var_39; [L247] SORT_41 var_42 = ((SORT_41)var_42_arg_0 << 22) | var_42_arg_1; [L248] var_42 = var_42 & mask_SORT_41 [L249] SORT_1 var_45_arg_0 = var_43; [L250] SORT_41 var_45_arg_1 = var_42; [L251] SORT_44 var_45 = ((SORT_44)var_45_arg_0 << 23) | var_45_arg_1; [L252] var_45 = var_45 & mask_SORT_44 [L253] SORT_1 var_48_arg_0 = var_46; [L254] SORT_44 var_48_arg_1 = var_45; [L255] SORT_47 var_48 = ((SORT_47)var_48_arg_0 << 24) | var_48_arg_1; [L256] var_48 = var_48 & mask_SORT_47 [L257] SORT_1 var_51_arg_0 = var_49; [L258] SORT_47 var_51_arg_1 = var_48; [L259] SORT_50 var_51 = ((SORT_50)var_51_arg_0 << 25) | var_51_arg_1; [L260] var_51 = var_51 & mask_SORT_50 [L261] SORT_1 var_54_arg_0 = var_52; [L262] SORT_50 var_54_arg_1 = var_51; [L263] SORT_53 var_54 = ((SORT_53)var_54_arg_0 << 26) | var_54_arg_1; [L264] var_54 = var_54 & mask_SORT_53 [L265] SORT_1 var_57_arg_0 = var_55; [L266] SORT_53 var_57_arg_1 = var_54; [L267] SORT_56 var_57 = ((SORT_56)var_57_arg_0 << 27) | var_57_arg_1; [L268] var_57 = var_57 & mask_SORT_56 [L269] SORT_1 var_60_arg_0 = var_58; [L270] SORT_56 var_60_arg_1 = var_57; [L271] SORT_59 var_60 = ((SORT_59)var_60_arg_0 << 28) | var_60_arg_1; [L272] var_60 = var_60 & mask_SORT_59 [L273] SORT_1 var_63_arg_0 = var_61; [L274] SORT_59 var_63_arg_1 = var_60; [L275] SORT_62 var_63 = ((SORT_62)var_63_arg_0 << 29) | var_63_arg_1; [L276] var_63 = var_63 & mask_SORT_62 [L277] SORT_1 var_65_arg_0 = var_64; [L278] SORT_62 var_65_arg_1 = var_63; [L279] SORT_9 var_65 = ((SORT_9)var_65_arg_0 << 30) | var_65_arg_1; [L280] SORT_9 var_66_arg_0 = var_65; [L281] var_66_arg_0 = var_66_arg_0 & mask_SORT_9 [L282] SORT_20 var_66 = var_66_arg_0; [L283] SORT_20 var_67_arg_0 = var_21; [L284] SORT_20 var_67_arg_1 = var_66; [L285] SORT_1 var_67 = var_67_arg_0 <= var_67_arg_1; [L286] SORT_1 var_68_arg_0 = var_67; [L287] SORT_1 var_68_arg_1 = var_8; [L288] SORT_1 var_68_arg_2 = var_7; [L289] SORT_1 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L290] SORT_1 var_69_arg_0 = input_3; [L291] SORT_1 var_69_arg_1 = var_68; [L292] SORT_1 var_69 = var_69_arg_0 ^ var_69_arg_1; [L293] SORT_1 var_70_arg_0 = var_69; [L294] SORT_1 var_70 = ~var_70_arg_0; [L295] SORT_1 var_79_arg_0 = var_78; [L296] SORT_1 var_79_arg_1 = var_70; [L297] SORT_1 var_79_arg_2 = var_8; [L298] SORT_1 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L299] SORT_1 var_80_arg_0 = var_79; [L300] SORT_1 var_80 = ~var_80_arg_0; [L301] SORT_1 var_81_arg_0 = var_79; [L302] SORT_1 var_81 = ~var_81_arg_0; [L303] SORT_1 var_82_arg_0 = var_80; [L304] SORT_1 var_82_arg_1 = var_81; [L305] SORT_1 var_82 = var_82_arg_0 & var_82_arg_1; [L306] var_82 = var_82 & mask_SORT_1 [L307] SORT_1 bad_83_arg_0 = var_82; [L308] CALL __VERIFIER_assert(!(bad_83_arg_0)) [L20] COND FALSE !(!(cond)) [L308] RET __VERIFIER_assert(!(bad_83_arg_0)) [L310] SORT_96 var_139_arg_0 = state_100; [L311] SORT_96 var_139_arg_1 = var_138; [L312] SORT_1 var_139 = var_139_arg_0 == var_139_arg_1; [L313] SORT_72 var_132_arg_0 = var_131; [L314] var_132_arg_0 = var_132_arg_0 & mask_SORT_72 [L315] SORT_96 var_132 = var_132_arg_0; [L316] SORT_96 var_133_arg_0 = var_132; [L317] SORT_96 var_133_arg_1 = state_97; [L318] SORT_1 var_133 = var_133_arg_0 <= var_133_arg_1; [L319] SORT_72 var_135_arg_0 = var_134; [L320] var_135_arg_0 = var_135_arg_0 & mask_SORT_72 [L321] SORT_96 var_135 = var_135_arg_0; [L322] SORT_96 var_136_arg_0 = state_97; [L323] SORT_96 var_136_arg_1 = var_135; [L324] SORT_1 var_136 = var_136_arg_0 <= var_136_arg_1; [L325] SORT_1 var_137_arg_0 = var_133; [L326] SORT_1 var_137_arg_1 = var_136; [L327] SORT_1 var_137 = var_137_arg_0 & var_137_arg_1; [L328] SORT_1 var_140_arg_0 = var_139; [L329] SORT_1 var_140_arg_1 = var_137; [L330] SORT_1 var_140_arg_2 = var_8; [L331] SORT_1 var_140 = var_140_arg_0 ? var_140_arg_1 : var_140_arg_2; [L332] SORT_1 var_141_arg_0 = input_4; [L333] SORT_1 var_141_arg_1 = var_8; [L334] SORT_1 var_141_arg_2 = var_140; [L335] SORT_1 var_141 = var_141_arg_0 ? var_141_arg_1 : var_141_arg_2; [L336] SORT_1 next_142_arg_1 = var_141; [L337] SORT_12 var_113_arg_0 = var_112; [L338] var_113_arg_0 = (var_113_arg_0 & msb_SORT_12) ? (var_113_arg_0 | ~mask_SORT_12) : (var_113_arg_0 & mask_SORT_12) [L339] SORT_41 var_113 = (int)((signed char)var_113_arg_0); [L340] SORT_11 var_114_arg_0 = state_17; [L341] var_114_arg_0 = (var_114_arg_0 & msb_SORT_11) ? (var_114_arg_0 | ~mask_SORT_11) : (var_114_arg_0 & mask_SORT_11) [L342] SORT_41 var_114 = (int)((short)var_114_arg_0); [L343] SORT_41 var_115_arg_0 = var_113; [L344] SORT_41 var_115_arg_1 = var_114; [L345] SORT_41 var_115 = var_115_arg_0 * var_115_arg_1; [L346] SORT_105 var_107_arg_0 = var_106; [L347] var_107_arg_0 = (var_107_arg_0 & msb_SORT_105) ? (var_107_arg_0 | ~mask_SORT_105) : (var_107_arg_0 & mask_SORT_105) [L348] SORT_26 var_107 = (int)((signed char)var_107_arg_0); [L349] SORT_11 var_108_arg_0 = var_16; [L350] var_108_arg_0 = (var_108_arg_0 & msb_SORT_11) ? (var_108_arg_0 | ~mask_SORT_11) : (var_108_arg_0 & mask_SORT_11) [L351] SORT_26 var_108 = (int)((short)var_108_arg_0); [L352] SORT_26 var_109_arg_0 = var_107; [L353] SORT_26 var_109_arg_1 = var_108; [L354] SORT_26 var_109 = var_109_arg_0 * var_109_arg_1; [L355] var_109 = var_109 & mask_SORT_26 [L356] SORT_26 var_151_arg_0 = var_109; [L357] SORT_1 var_151 = var_151_arg_0 >> 17; [L358] SORT_26 var_149_arg_0 = var_109; [L359] SORT_1 var_149 = var_149_arg_0 >> 17; [L360] SORT_26 var_147_arg_0 = var_109; [L361] SORT_1 var_147 = var_147_arg_0 >> 17; [L362] SORT_26 var_145_arg_0 = var_109; [L363] SORT_1 var_145 = var_145_arg_0 >> 17; [L364] SORT_26 var_143_arg_0 = var_109; [L365] SORT_1 var_143 = var_143_arg_0 >> 17; [L366] SORT_1 var_144_arg_0 = var_143; [L367] SORT_26 var_144_arg_1 = var_109; [L368] SORT_29 var_144 = ((SORT_29)var_144_arg_0 << 18) | var_144_arg_1; [L369] var_144 = var_144 & mask_SORT_29 [L370] SORT_1 var_146_arg_0 = var_145; [L371] SORT_29 var_146_arg_1 = var_144; [L372] SORT_32 var_146 = ((SORT_32)var_146_arg_0 << 19) | var_146_arg_1; [L373] var_146 = var_146 & mask_SORT_32 [L374] SORT_1 var_148_arg_0 = var_147; [L375] SORT_32 var_148_arg_1 = var_146; [L376] SORT_35 var_148 = ((SORT_35)var_148_arg_0 << 20) | var_148_arg_1; [L377] var_148 = var_148 & mask_SORT_35 [L378] SORT_1 var_150_arg_0 = var_149; [L379] SORT_35 var_150_arg_1 = var_148; [L380] SORT_38 var_150 = ((SORT_38)var_150_arg_0 << 21) | var_150_arg_1; [L381] var_150 = var_150 & mask_SORT_38 [L382] SORT_1 var_152_arg_0 = var_151; [L383] SORT_38 var_152_arg_1 = var_150; [L384] SORT_41 var_152 = ((SORT_41)var_152_arg_0 << 22) | var_152_arg_1; [L385] SORT_41 var_153_arg_0 = var_115; [L386] SORT_41 var_153_arg_1 = var_152; [L387] SORT_41 var_153 = var_153_arg_0 + var_153_arg_1; [L388] SORT_154 var_156_arg_0 = var_155; [L389] var_156_arg_0 = var_156_arg_0 & mask_SORT_154 [L390] SORT_41 var_156 = var_156_arg_0; [L391] SORT_41 var_157_arg_0 = var_153; [L392] SORT_41 var_157_arg_1 = var_156; [L393] SORT_41 var_157 = var_157_arg_0 + var_157_arg_1; [L394] SORT_41 var_158_arg_0 = var_157; [L395] SORT_11 var_158 = var_158_arg_0 >> 7; [L396] SORT_1 var_159_arg_0 = input_4; [L397] SORT_11 var_159_arg_1 = var_119; [L398] SORT_11 var_159_arg_2 = var_158; [L399] SORT_11 var_159 = var_159_arg_0 ? var_159_arg_1 : var_159_arg_2; [L400] SORT_11 next_160_arg_1 = var_159; [L401] SORT_1 var_161_arg_0 = var_8; [L402] var_161_arg_0 = var_161_arg_0 & mask_SORT_1 [L403] SORT_11 var_161 = var_161_arg_0; [L404] SORT_11 var_162_arg_0 = state_76; [L405] SORT_11 var_162_arg_1 = var_161; [L406] SORT_11 var_162 = var_162_arg_0 + var_162_arg_1; [L407] var_162 = var_162 & mask_SORT_11 [L408] SORT_11 next_163_arg_1 = var_162; [L409] SORT_72 var_167_arg_0 = var_166; [L410] SORT_1 var_167_arg_1 = input_3; [L411] SORT_96 var_167 = ((SORT_96)var_167_arg_0 << 1) | var_167_arg_1; [L412] SORT_1 var_164_arg_0 = input_3; [L413] var_164_arg_0 = var_164_arg_0 & mask_SORT_1 [L414] SORT_96 var_164 = var_164_arg_0; [L415] SORT_96 var_165_arg_0 = state_97; [L416] SORT_96 var_165_arg_1 = var_164; [L417] SORT_96 var_165 = var_165_arg_0 + var_165_arg_1; [L418] SORT_1 var_168_arg_0 = var_139; [L419] SORT_96 var_168_arg_1 = var_167; [L420] SORT_96 var_168_arg_2 = var_165; [L421] SORT_96 var_168 = var_168_arg_0 ? var_168_arg_1 : var_168_arg_2; [L422] SORT_1 var_170_arg_0 = input_4; [L423] SORT_96 var_170_arg_1 = var_169; [L424] SORT_96 var_170_arg_2 = var_168; [L425] SORT_96 var_170 = var_170_arg_0 ? var_170_arg_1 : var_170_arg_2; [L426] var_170 = var_170 & mask_SORT_96 [L427] SORT_96 next_171_arg_1 = var_170; [L428] SORT_1 var_172_arg_0 = var_8; [L429] var_172_arg_0 = var_172_arg_0 & mask_SORT_1 [L430] SORT_96 var_172 = var_172_arg_0; [L431] SORT_96 var_173_arg_0 = state_100; [L432] SORT_96 var_173_arg_1 = var_172; [L433] SORT_96 var_173 = var_173_arg_0 + var_173_arg_1; [L434] SORT_1 var_174_arg_0 = var_139; [L435] SORT_96 var_174_arg_1 = var_169; [L436] SORT_96 var_174_arg_2 = var_173; [L437] SORT_96 var_174 = var_174_arg_0 ? var_174_arg_1 : var_174_arg_2; [L438] SORT_1 var_175_arg_0 = input_4; [L439] SORT_96 var_175_arg_1 = var_169; [L440] SORT_96 var_175_arg_2 = var_174; [L441] SORT_96 var_175 = var_175_arg_0 ? var_175_arg_1 : var_175_arg_2; [L442] var_175 = var_175 & mask_SORT_96 [L443] SORT_96 next_176_arg_1 = var_175; [L445] state_5 = next_142_arg_1 [L446] state_17 = next_160_arg_1 [L447] state_76 = next_163_arg_1 [L448] state_97 = next_171_arg_1 [L449] state_100 = next_176_arg_1 [L131] input_2 = __VERIFIER_nondet_uchar() [L132] input_3 = __VERIFIER_nondet_uchar() [L133] input_3 = input_3 & mask_SORT_1 [L134] input_4 = __VERIFIER_nondet_uchar() [L135] input_4 = input_4 & mask_SORT_1 [L137] SORT_1 var_84_arg_0 = state_5; [L138] SORT_1 var_84 = ~var_84_arg_0; [L139] SORT_1 var_85_arg_0 = var_84; [L140] SORT_1 var_85 = ~var_85_arg_0; [L141] SORT_1 var_86_arg_0 = state_5; [L142] SORT_1 var_86_arg_1 = var_85; [L143] SORT_1 var_86 = var_86_arg_0 | var_86_arg_1; [L144] var_86 = var_86 & mask_SORT_1 [L145] SORT_1 constr_87_arg_0 = var_86; [L146] CALL assume_abort_if_not(constr_87_arg_0) [L21] COND FALSE !(!cond) [L146] RET assume_abort_if_not(constr_87_arg_0) [L147] SORT_1 var_88_arg_0 = var_8; [L148] var_88_arg_0 = var_88_arg_0 & mask_SORT_1 [L149] SORT_11 var_88 = var_88_arg_0; [L150] SORT_11 var_89_arg_0 = state_76; [L151] SORT_11 var_89_arg_1 = var_88; [L152] SORT_1 var_89 = var_89_arg_0 <= var_89_arg_1; [L153] SORT_1 var_90_arg_0 = input_4; [L154] SORT_1 var_90_arg_1 = var_89; [L155] SORT_1 var_90 = var_90_arg_0 ^ var_90_arg_1; [L156] SORT_1 var_91_arg_0 = var_90; [L157] SORT_1 var_91 = ~var_91_arg_0; [L158] SORT_1 var_92_arg_0 = var_90; [L159] SORT_1 var_92 = ~var_92_arg_0; [L160] SORT_1 var_93_arg_0 = var_91; [L161] SORT_1 var_93_arg_1 = var_92; [L162] SORT_1 var_93 = var_93_arg_0 | var_93_arg_1; [L163] var_93 = var_93 & mask_SORT_1 [L164] SORT_1 constr_94_arg_0 = var_93; [L165] CALL assume_abort_if_not(constr_94_arg_0) [L21] COND FALSE !(!cond) [L165] RET assume_abort_if_not(constr_94_arg_0) [L167] SORT_72 var_74_arg_0 = var_73; [L168] var_74_arg_0 = var_74_arg_0 & mask_SORT_72 [L169] SORT_11 var_74 = var_74_arg_0; [L170] SORT_11 var_78_arg_0 = var_74; [L171] SORT_11 var_78_arg_1 = state_76; [L172] SORT_1 var_78 = var_78_arg_0 < var_78_arg_1; [L173] SORT_1 var_15_arg_0 = input_3; [L174] SORT_12 var_15_arg_1 = var_14; [L175] SORT_12 var_15_arg_2 = var_13; [L176] SORT_12 var_15 = var_15_arg_0 ? var_15_arg_1 : var_15_arg_2; [L177] var_15 = var_15 & mask_SORT_12 [L178] SORT_12 var_16_arg_0 = var_13; [L179] SORT_12 var_16_arg_1 = var_15; [L180] SORT_11 var_16 = ((SORT_11)var_16_arg_0 << 8) | var_16_arg_1; [L181] SORT_11 var_18_arg_0 = var_16; [L182] SORT_11 var_18_arg_1 = state_17; [L183] SORT_11 var_18 = var_18_arg_0 - var_18_arg_1; [L184] var_18 = var_18 & mask_SORT_11 [L185] SORT_11 var_19_arg_0 = var_18; [L186] SORT_1 var_19 = var_19_arg_0 >> 15; [L187] SORT_1 var_21_arg_0 = var_19; [L188] SORT_9 var_21_arg_1 = var_10; [L189] SORT_20 var_21 = ((SORT_20)var_21_arg_0 << 31) | var_21_arg_1; [L190] var_21 = var_21 & mask_SORT_20 [L191] SORT_11 var_64_arg_0 = var_18; [L192] SORT_1 var_64 = var_64_arg_0 >> 15; [L193] SORT_11 var_61_arg_0 = var_18; [L194] SORT_1 var_61 = var_61_arg_0 >> 15; [L195] SORT_11 var_58_arg_0 = var_18; [L196] SORT_1 var_58 = var_58_arg_0 >> 15; [L197] SORT_11 var_55_arg_0 = var_18; [L198] SORT_1 var_55 = var_55_arg_0 >> 15; [L199] SORT_11 var_52_arg_0 = var_18; [L200] SORT_1 var_52 = var_52_arg_0 >> 15; [L201] SORT_11 var_49_arg_0 = var_18; [L202] SORT_1 var_49 = var_49_arg_0 >> 15; [L203] SORT_11 var_46_arg_0 = var_18; [L204] SORT_1 var_46 = var_46_arg_0 >> 15; [L205] SORT_11 var_43_arg_0 = var_18; [L206] SORT_1 var_43 = var_43_arg_0 >> 15; [L207] SORT_11 var_40_arg_0 = var_18; [L208] SORT_1 var_40 = var_40_arg_0 >> 15; [L209] SORT_11 var_37_arg_0 = var_18; [L210] SORT_1 var_37 = var_37_arg_0 >> 15; [L211] SORT_11 var_34_arg_0 = var_18; [L212] SORT_1 var_34 = var_34_arg_0 >> 15; [L213] SORT_11 var_31_arg_0 = var_18; [L214] SORT_1 var_31 = var_31_arg_0 >> 15; [L215] SORT_11 var_28_arg_0 = var_18; [L216] SORT_1 var_28 = var_28_arg_0 >> 15; [L217] SORT_11 var_25_arg_0 = var_18; [L218] SORT_1 var_25 = var_25_arg_0 >> 15; [L219] SORT_11 var_22_arg_0 = var_18; [L220] SORT_1 var_22 = var_22_arg_0 >> 15; [L221] SORT_1 var_24_arg_0 = var_22; [L222] SORT_11 var_24_arg_1 = var_18; [L223] SORT_23 var_24 = ((SORT_23)var_24_arg_0 << 16) | var_24_arg_1; [L224] var_24 = var_24 & mask_SORT_23 [L225] SORT_1 var_27_arg_0 = var_25; [L226] SORT_23 var_27_arg_1 = var_24; [L227] SORT_26 var_27 = ((SORT_26)var_27_arg_0 << 17) | var_27_arg_1; [L228] var_27 = var_27 & mask_SORT_26 [L229] SORT_1 var_30_arg_0 = var_28; [L230] SORT_26 var_30_arg_1 = var_27; [L231] SORT_29 var_30 = ((SORT_29)var_30_arg_0 << 18) | var_30_arg_1; [L232] var_30 = var_30 & mask_SORT_29 [L233] SORT_1 var_33_arg_0 = var_31; [L234] SORT_29 var_33_arg_1 = var_30; [L235] SORT_32 var_33 = ((SORT_32)var_33_arg_0 << 19) | var_33_arg_1; [L236] var_33 = var_33 & mask_SORT_32 [L237] SORT_1 var_36_arg_0 = var_34; [L238] SORT_32 var_36_arg_1 = var_33; [L239] SORT_35 var_36 = ((SORT_35)var_36_arg_0 << 20) | var_36_arg_1; [L240] var_36 = var_36 & mask_SORT_35 [L241] SORT_1 var_39_arg_0 = var_37; [L242] SORT_35 var_39_arg_1 = var_36; [L243] SORT_38 var_39 = ((SORT_38)var_39_arg_0 << 21) | var_39_arg_1; [L244] var_39 = var_39 & mask_SORT_38 [L245] SORT_1 var_42_arg_0 = var_40; [L246] SORT_38 var_42_arg_1 = var_39; [L247] SORT_41 var_42 = ((SORT_41)var_42_arg_0 << 22) | var_42_arg_1; [L248] var_42 = var_42 & mask_SORT_41 [L249] SORT_1 var_45_arg_0 = var_43; [L250] SORT_41 var_45_arg_1 = var_42; [L251] SORT_44 var_45 = ((SORT_44)var_45_arg_0 << 23) | var_45_arg_1; [L252] var_45 = var_45 & mask_SORT_44 [L253] SORT_1 var_48_arg_0 = var_46; [L254] SORT_44 var_48_arg_1 = var_45; [L255] SORT_47 var_48 = ((SORT_47)var_48_arg_0 << 24) | var_48_arg_1; [L256] var_48 = var_48 & mask_SORT_47 [L257] SORT_1 var_51_arg_0 = var_49; [L258] SORT_47 var_51_arg_1 = var_48; [L259] SORT_50 var_51 = ((SORT_50)var_51_arg_0 << 25) | var_51_arg_1; [L260] var_51 = var_51 & mask_SORT_50 [L261] SORT_1 var_54_arg_0 = var_52; [L262] SORT_50 var_54_arg_1 = var_51; [L263] SORT_53 var_54 = ((SORT_53)var_54_arg_0 << 26) | var_54_arg_1; [L264] var_54 = var_54 & mask_SORT_53 [L265] SORT_1 var_57_arg_0 = var_55; [L266] SORT_53 var_57_arg_1 = var_54; [L267] SORT_56 var_57 = ((SORT_56)var_57_arg_0 << 27) | var_57_arg_1; [L268] var_57 = var_57 & mask_SORT_56 [L269] SORT_1 var_60_arg_0 = var_58; [L270] SORT_56 var_60_arg_1 = var_57; [L271] SORT_59 var_60 = ((SORT_59)var_60_arg_0 << 28) | var_60_arg_1; [L272] var_60 = var_60 & mask_SORT_59 [L273] SORT_1 var_63_arg_0 = var_61; [L274] SORT_59 var_63_arg_1 = var_60; [L275] SORT_62 var_63 = ((SORT_62)var_63_arg_0 << 29) | var_63_arg_1; [L276] var_63 = var_63 & mask_SORT_62 [L277] SORT_1 var_65_arg_0 = var_64; [L278] SORT_62 var_65_arg_1 = var_63; [L279] SORT_9 var_65 = ((SORT_9)var_65_arg_0 << 30) | var_65_arg_1; [L280] SORT_9 var_66_arg_0 = var_65; [L281] var_66_arg_0 = var_66_arg_0 & mask_SORT_9 [L282] SORT_20 var_66 = var_66_arg_0; [L283] SORT_20 var_67_arg_0 = var_21; [L284] SORT_20 var_67_arg_1 = var_66; [L285] SORT_1 var_67 = var_67_arg_0 <= var_67_arg_1; [L286] SORT_1 var_68_arg_0 = var_67; [L287] SORT_1 var_68_arg_1 = var_8; [L288] SORT_1 var_68_arg_2 = var_7; [L289] SORT_1 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L290] SORT_1 var_69_arg_0 = input_3; [L291] SORT_1 var_69_arg_1 = var_68; [L292] SORT_1 var_69 = var_69_arg_0 ^ var_69_arg_1; [L293] SORT_1 var_70_arg_0 = var_69; [L294] SORT_1 var_70 = ~var_70_arg_0; [L295] SORT_1 var_79_arg_0 = var_78; [L296] SORT_1 var_79_arg_1 = var_70; [L297] SORT_1 var_79_arg_2 = var_8; [L298] SORT_1 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L299] SORT_1 var_80_arg_0 = var_79; [L300] SORT_1 var_80 = ~var_80_arg_0; [L301] SORT_1 var_81_arg_0 = var_79; [L302] SORT_1 var_81 = ~var_81_arg_0; [L303] SORT_1 var_82_arg_0 = var_80; [L304] SORT_1 var_82_arg_1 = var_81; [L305] SORT_1 var_82 = var_82_arg_0 & var_82_arg_1; [L306] var_82 = var_82 & mask_SORT_1 [L307] SORT_1 bad_83_arg_0 = var_82; [L308] CALL __VERIFIER_assert(!(bad_83_arg_0)) [L20] COND FALSE !(!(cond)) [L308] RET __VERIFIER_assert(!(bad_83_arg_0)) [L310] SORT_96 var_139_arg_0 = state_100; [L311] SORT_96 var_139_arg_1 = var_138; [L312] SORT_1 var_139 = var_139_arg_0 == var_139_arg_1; [L313] SORT_72 var_132_arg_0 = var_131; [L314] var_132_arg_0 = var_132_arg_0 & mask_SORT_72 [L315] SORT_96 var_132 = var_132_arg_0; [L316] SORT_96 var_133_arg_0 = var_132; [L317] SORT_96 var_133_arg_1 = state_97; [L318] SORT_1 var_133 = var_133_arg_0 <= var_133_arg_1; [L319] SORT_72 var_135_arg_0 = var_134; [L320] var_135_arg_0 = var_135_arg_0 & mask_SORT_72 [L321] SORT_96 var_135 = var_135_arg_0; [L322] SORT_96 var_136_arg_0 = state_97; [L323] SORT_96 var_136_arg_1 = var_135; [L324] SORT_1 var_136 = var_136_arg_0 <= var_136_arg_1; [L325] SORT_1 var_137_arg_0 = var_133; [L326] SORT_1 var_137_arg_1 = var_136; [L327] SORT_1 var_137 = var_137_arg_0 & var_137_arg_1; [L328] SORT_1 var_140_arg_0 = var_139; [L329] SORT_1 var_140_arg_1 = var_137; [L330] SORT_1 var_140_arg_2 = var_8; [L331] SORT_1 var_140 = var_140_arg_0 ? var_140_arg_1 : var_140_arg_2; [L332] SORT_1 var_141_arg_0 = input_4; [L333] SORT_1 var_141_arg_1 = var_8; [L334] SORT_1 var_141_arg_2 = var_140; [L335] SORT_1 var_141 = var_141_arg_0 ? var_141_arg_1 : var_141_arg_2; [L336] SORT_1 next_142_arg_1 = var_141; [L337] SORT_12 var_113_arg_0 = var_112; [L338] var_113_arg_0 = (var_113_arg_0 & msb_SORT_12) ? (var_113_arg_0 | ~mask_SORT_12) : (var_113_arg_0 & mask_SORT_12) [L339] SORT_41 var_113 = (int)((signed char)var_113_arg_0); [L340] SORT_11 var_114_arg_0 = state_17; [L341] var_114_arg_0 = (var_114_arg_0 & msb_SORT_11) ? (var_114_arg_0 | ~mask_SORT_11) : (var_114_arg_0 & mask_SORT_11) [L342] SORT_41 var_114 = (int)((short)var_114_arg_0); [L343] SORT_41 var_115_arg_0 = var_113; [L344] SORT_41 var_115_arg_1 = var_114; [L345] SORT_41 var_115 = var_115_arg_0 * var_115_arg_1; [L346] SORT_105 var_107_arg_0 = var_106; [L347] var_107_arg_0 = (var_107_arg_0 & msb_SORT_105) ? (var_107_arg_0 | ~mask_SORT_105) : (var_107_arg_0 & mask_SORT_105) [L348] SORT_26 var_107 = (int)((signed char)var_107_arg_0); [L349] SORT_11 var_108_arg_0 = var_16; [L350] var_108_arg_0 = (var_108_arg_0 & msb_SORT_11) ? (var_108_arg_0 | ~mask_SORT_11) : (var_108_arg_0 & mask_SORT_11) [L351] SORT_26 var_108 = (int)((short)var_108_arg_0); [L352] SORT_26 var_109_arg_0 = var_107; [L353] SORT_26 var_109_arg_1 = var_108; [L354] SORT_26 var_109 = var_109_arg_0 * var_109_arg_1; [L355] var_109 = var_109 & mask_SORT_26 [L356] SORT_26 var_151_arg_0 = var_109; [L357] SORT_1 var_151 = var_151_arg_0 >> 17; [L358] SORT_26 var_149_arg_0 = var_109; [L359] SORT_1 var_149 = var_149_arg_0 >> 17; [L360] SORT_26 var_147_arg_0 = var_109; [L361] SORT_1 var_147 = var_147_arg_0 >> 17; [L362] SORT_26 var_145_arg_0 = var_109; [L363] SORT_1 var_145 = var_145_arg_0 >> 17; [L364] SORT_26 var_143_arg_0 = var_109; [L365] SORT_1 var_143 = var_143_arg_0 >> 17; [L366] SORT_1 var_144_arg_0 = var_143; [L367] SORT_26 var_144_arg_1 = var_109; [L368] SORT_29 var_144 = ((SORT_29)var_144_arg_0 << 18) | var_144_arg_1; [L369] var_144 = var_144 & mask_SORT_29 [L370] SORT_1 var_146_arg_0 = var_145; [L371] SORT_29 var_146_arg_1 = var_144; [L372] SORT_32 var_146 = ((SORT_32)var_146_arg_0 << 19) | var_146_arg_1; [L373] var_146 = var_146 & mask_SORT_32 [L374] SORT_1 var_148_arg_0 = var_147; [L375] SORT_32 var_148_arg_1 = var_146; [L376] SORT_35 var_148 = ((SORT_35)var_148_arg_0 << 20) | var_148_arg_1; [L377] var_148 = var_148 & mask_SORT_35 [L378] SORT_1 var_150_arg_0 = var_149; [L379] SORT_35 var_150_arg_1 = var_148; [L380] SORT_38 var_150 = ((SORT_38)var_150_arg_0 << 21) | var_150_arg_1; [L381] var_150 = var_150 & mask_SORT_38 [L382] SORT_1 var_152_arg_0 = var_151; [L383] SORT_38 var_152_arg_1 = var_150; [L384] SORT_41 var_152 = ((SORT_41)var_152_arg_0 << 22) | var_152_arg_1; [L385] SORT_41 var_153_arg_0 = var_115; [L386] SORT_41 var_153_arg_1 = var_152; [L387] SORT_41 var_153 = var_153_arg_0 + var_153_arg_1; [L388] SORT_154 var_156_arg_0 = var_155; [L389] var_156_arg_0 = var_156_arg_0 & mask_SORT_154 [L390] SORT_41 var_156 = var_156_arg_0; [L391] SORT_41 var_157_arg_0 = var_153; [L392] SORT_41 var_157_arg_1 = var_156; [L393] SORT_41 var_157 = var_157_arg_0 + var_157_arg_1; [L394] SORT_41 var_158_arg_0 = var_157; [L395] SORT_11 var_158 = var_158_arg_0 >> 7; [L396] SORT_1 var_159_arg_0 = input_4; [L397] SORT_11 var_159_arg_1 = var_119; [L398] SORT_11 var_159_arg_2 = var_158; [L399] SORT_11 var_159 = var_159_arg_0 ? var_159_arg_1 : var_159_arg_2; [L400] SORT_11 next_160_arg_1 = var_159; [L401] SORT_1 var_161_arg_0 = var_8; [L402] var_161_arg_0 = var_161_arg_0 & mask_SORT_1 [L403] SORT_11 var_161 = var_161_arg_0; [L404] SORT_11 var_162_arg_0 = state_76; [L405] SORT_11 var_162_arg_1 = var_161; [L406] SORT_11 var_162 = var_162_arg_0 + var_162_arg_1; [L407] var_162 = var_162 & mask_SORT_11 [L408] SORT_11 next_163_arg_1 = var_162; [L409] SORT_72 var_167_arg_0 = var_166; [L410] SORT_1 var_167_arg_1 = input_3; [L411] SORT_96 var_167 = ((SORT_96)var_167_arg_0 << 1) | var_167_arg_1; [L412] SORT_1 var_164_arg_0 = input_3; [L413] var_164_arg_0 = var_164_arg_0 & mask_SORT_1 [L414] SORT_96 var_164 = var_164_arg_0; [L415] SORT_96 var_165_arg_0 = state_97; [L416] SORT_96 var_165_arg_1 = var_164; [L417] SORT_96 var_165 = var_165_arg_0 + var_165_arg_1; [L418] SORT_1 var_168_arg_0 = var_139; [L419] SORT_96 var_168_arg_1 = var_167; [L420] SORT_96 var_168_arg_2 = var_165; [L421] SORT_96 var_168 = var_168_arg_0 ? var_168_arg_1 : var_168_arg_2; [L422] SORT_1 var_170_arg_0 = input_4; [L423] SORT_96 var_170_arg_1 = var_169; [L424] SORT_96 var_170_arg_2 = var_168; [L425] SORT_96 var_170 = var_170_arg_0 ? var_170_arg_1 : var_170_arg_2; [L426] var_170 = var_170 & mask_SORT_96 [L427] SORT_96 next_171_arg_1 = var_170; [L428] SORT_1 var_172_arg_0 = var_8; [L429] var_172_arg_0 = var_172_arg_0 & mask_SORT_1 [L430] SORT_96 var_172 = var_172_arg_0; [L431] SORT_96 var_173_arg_0 = state_100; [L432] SORT_96 var_173_arg_1 = var_172; [L433] SORT_96 var_173 = var_173_arg_0 + var_173_arg_1; [L434] SORT_1 var_174_arg_0 = var_139; [L435] SORT_96 var_174_arg_1 = var_169; [L436] SORT_96 var_174_arg_2 = var_173; [L437] SORT_96 var_174 = var_174_arg_0 ? var_174_arg_1 : var_174_arg_2; [L438] SORT_1 var_175_arg_0 = input_4; [L439] SORT_96 var_175_arg_1 = var_169; [L440] SORT_96 var_175_arg_2 = var_174; [L441] SORT_96 var_175 = var_175_arg_0 ? var_175_arg_1 : var_175_arg_2; [L442] var_175 = var_175 & mask_SORT_96 [L443] SORT_96 next_176_arg_1 = var_175; [L445] state_5 = next_142_arg_1 [L446] state_17 = next_160_arg_1 [L447] state_76 = next_163_arg_1 [L448] state_97 = next_171_arg_1 [L449] state_100 = next_176_arg_1 [L131] input_2 = __VERIFIER_nondet_uchar() [L132] input_3 = __VERIFIER_nondet_uchar() [L133] input_3 = input_3 & mask_SORT_1 [L134] input_4 = __VERIFIER_nondet_uchar() [L135] input_4 = input_4 & mask_SORT_1 [L137] SORT_1 var_84_arg_0 = state_5; [L138] SORT_1 var_84 = ~var_84_arg_0; [L139] SORT_1 var_85_arg_0 = var_84; [L140] SORT_1 var_85 = ~var_85_arg_0; [L141] SORT_1 var_86_arg_0 = state_5; [L142] SORT_1 var_86_arg_1 = var_85; [L143] SORT_1 var_86 = var_86_arg_0 | var_86_arg_1; [L144] var_86 = var_86 & mask_SORT_1 [L145] SORT_1 constr_87_arg_0 = var_86; [L146] CALL assume_abort_if_not(constr_87_arg_0) [L21] COND FALSE !(!cond) [L146] RET assume_abort_if_not(constr_87_arg_0) [L147] SORT_1 var_88_arg_0 = var_8; [L148] var_88_arg_0 = var_88_arg_0 & mask_SORT_1 [L149] SORT_11 var_88 = var_88_arg_0; [L150] SORT_11 var_89_arg_0 = state_76; [L151] SORT_11 var_89_arg_1 = var_88; [L152] SORT_1 var_89 = var_89_arg_0 <= var_89_arg_1; [L153] SORT_1 var_90_arg_0 = input_4; [L154] SORT_1 var_90_arg_1 = var_89; [L155] SORT_1 var_90 = var_90_arg_0 ^ var_90_arg_1; [L156] SORT_1 var_91_arg_0 = var_90; [L157] SORT_1 var_91 = ~var_91_arg_0; [L158] SORT_1 var_92_arg_0 = var_90; [L159] SORT_1 var_92 = ~var_92_arg_0; [L160] SORT_1 var_93_arg_0 = var_91; [L161] SORT_1 var_93_arg_1 = var_92; [L162] SORT_1 var_93 = var_93_arg_0 | var_93_arg_1; [L163] var_93 = var_93 & mask_SORT_1 [L164] SORT_1 constr_94_arg_0 = var_93; [L165] CALL assume_abort_if_not(constr_94_arg_0) [L21] COND FALSE !(!cond) [L165] RET assume_abort_if_not(constr_94_arg_0) [L167] SORT_72 var_74_arg_0 = var_73; [L168] var_74_arg_0 = var_74_arg_0 & mask_SORT_72 [L169] SORT_11 var_74 = var_74_arg_0; [L170] SORT_11 var_78_arg_0 = var_74; [L171] SORT_11 var_78_arg_1 = state_76; [L172] SORT_1 var_78 = var_78_arg_0 < var_78_arg_1; [L173] SORT_1 var_15_arg_0 = input_3; [L174] SORT_12 var_15_arg_1 = var_14; [L175] SORT_12 var_15_arg_2 = var_13; [L176] SORT_12 var_15 = var_15_arg_0 ? var_15_arg_1 : var_15_arg_2; [L177] var_15 = var_15 & mask_SORT_12 [L178] SORT_12 var_16_arg_0 = var_13; [L179] SORT_12 var_16_arg_1 = var_15; [L180] SORT_11 var_16 = ((SORT_11)var_16_arg_0 << 8) | var_16_arg_1; [L181] SORT_11 var_18_arg_0 = var_16; [L182] SORT_11 var_18_arg_1 = state_17; [L183] SORT_11 var_18 = var_18_arg_0 - var_18_arg_1; [L184] var_18 = var_18 & mask_SORT_11 [L185] SORT_11 var_19_arg_0 = var_18; [L186] SORT_1 var_19 = var_19_arg_0 >> 15; [L187] SORT_1 var_21_arg_0 = var_19; [L188] SORT_9 var_21_arg_1 = var_10; [L189] SORT_20 var_21 = ((SORT_20)var_21_arg_0 << 31) | var_21_arg_1; [L190] var_21 = var_21 & mask_SORT_20 [L191] SORT_11 var_64_arg_0 = var_18; [L192] SORT_1 var_64 = var_64_arg_0 >> 15; [L193] SORT_11 var_61_arg_0 = var_18; [L194] SORT_1 var_61 = var_61_arg_0 >> 15; [L195] SORT_11 var_58_arg_0 = var_18; [L196] SORT_1 var_58 = var_58_arg_0 >> 15; [L197] SORT_11 var_55_arg_0 = var_18; [L198] SORT_1 var_55 = var_55_arg_0 >> 15; [L199] SORT_11 var_52_arg_0 = var_18; [L200] SORT_1 var_52 = var_52_arg_0 >> 15; [L201] SORT_11 var_49_arg_0 = var_18; [L202] SORT_1 var_49 = var_49_arg_0 >> 15; [L203] SORT_11 var_46_arg_0 = var_18; [L204] SORT_1 var_46 = var_46_arg_0 >> 15; [L205] SORT_11 var_43_arg_0 = var_18; [L206] SORT_1 var_43 = var_43_arg_0 >> 15; [L207] SORT_11 var_40_arg_0 = var_18; [L208] SORT_1 var_40 = var_40_arg_0 >> 15; [L209] SORT_11 var_37_arg_0 = var_18; [L210] SORT_1 var_37 = var_37_arg_0 >> 15; [L211] SORT_11 var_34_arg_0 = var_18; [L212] SORT_1 var_34 = var_34_arg_0 >> 15; [L213] SORT_11 var_31_arg_0 = var_18; [L214] SORT_1 var_31 = var_31_arg_0 >> 15; [L215] SORT_11 var_28_arg_0 = var_18; [L216] SORT_1 var_28 = var_28_arg_0 >> 15; [L217] SORT_11 var_25_arg_0 = var_18; [L218] SORT_1 var_25 = var_25_arg_0 >> 15; [L219] SORT_11 var_22_arg_0 = var_18; [L220] SORT_1 var_22 = var_22_arg_0 >> 15; [L221] SORT_1 var_24_arg_0 = var_22; [L222] SORT_11 var_24_arg_1 = var_18; [L223] SORT_23 var_24 = ((SORT_23)var_24_arg_0 << 16) | var_24_arg_1; [L224] var_24 = var_24 & mask_SORT_23 [L225] SORT_1 var_27_arg_0 = var_25; [L226] SORT_23 var_27_arg_1 = var_24; [L227] SORT_26 var_27 = ((SORT_26)var_27_arg_0 << 17) | var_27_arg_1; [L228] var_27 = var_27 & mask_SORT_26 [L229] SORT_1 var_30_arg_0 = var_28; [L230] SORT_26 var_30_arg_1 = var_27; [L231] SORT_29 var_30 = ((SORT_29)var_30_arg_0 << 18) | var_30_arg_1; [L232] var_30 = var_30 & mask_SORT_29 [L233] SORT_1 var_33_arg_0 = var_31; [L234] SORT_29 var_33_arg_1 = var_30; [L235] SORT_32 var_33 = ((SORT_32)var_33_arg_0 << 19) | var_33_arg_1; [L236] var_33 = var_33 & mask_SORT_32 [L237] SORT_1 var_36_arg_0 = var_34; [L238] SORT_32 var_36_arg_1 = var_33; [L239] SORT_35 var_36 = ((SORT_35)var_36_arg_0 << 20) | var_36_arg_1; [L240] var_36 = var_36 & mask_SORT_35 [L241] SORT_1 var_39_arg_0 = var_37; [L242] SORT_35 var_39_arg_1 = var_36; [L243] SORT_38 var_39 = ((SORT_38)var_39_arg_0 << 21) | var_39_arg_1; [L244] var_39 = var_39 & mask_SORT_38 [L245] SORT_1 var_42_arg_0 = var_40; [L246] SORT_38 var_42_arg_1 = var_39; [L247] SORT_41 var_42 = ((SORT_41)var_42_arg_0 << 22) | var_42_arg_1; [L248] var_42 = var_42 & mask_SORT_41 [L249] SORT_1 var_45_arg_0 = var_43; [L250] SORT_41 var_45_arg_1 = var_42; [L251] SORT_44 var_45 = ((SORT_44)var_45_arg_0 << 23) | var_45_arg_1; [L252] var_45 = var_45 & mask_SORT_44 [L253] SORT_1 var_48_arg_0 = var_46; [L254] SORT_44 var_48_arg_1 = var_45; [L255] SORT_47 var_48 = ((SORT_47)var_48_arg_0 << 24) | var_48_arg_1; [L256] var_48 = var_48 & mask_SORT_47 [L257] SORT_1 var_51_arg_0 = var_49; [L258] SORT_47 var_51_arg_1 = var_48; [L259] SORT_50 var_51 = ((SORT_50)var_51_arg_0 << 25) | var_51_arg_1; [L260] var_51 = var_51 & mask_SORT_50 [L261] SORT_1 var_54_arg_0 = var_52; [L262] SORT_50 var_54_arg_1 = var_51; [L263] SORT_53 var_54 = ((SORT_53)var_54_arg_0 << 26) | var_54_arg_1; [L264] var_54 = var_54 & mask_SORT_53 [L265] SORT_1 var_57_arg_0 = var_55; [L266] SORT_53 var_57_arg_1 = var_54; [L267] SORT_56 var_57 = ((SORT_56)var_57_arg_0 << 27) | var_57_arg_1; [L268] var_57 = var_57 & mask_SORT_56 [L269] SORT_1 var_60_arg_0 = var_58; [L270] SORT_56 var_60_arg_1 = var_57; [L271] SORT_59 var_60 = ((SORT_59)var_60_arg_0 << 28) | var_60_arg_1; [L272] var_60 = var_60 & mask_SORT_59 [L273] SORT_1 var_63_arg_0 = var_61; [L274] SORT_59 var_63_arg_1 = var_60; [L275] SORT_62 var_63 = ((SORT_62)var_63_arg_0 << 29) | var_63_arg_1; [L276] var_63 = var_63 & mask_SORT_62 [L277] SORT_1 var_65_arg_0 = var_64; [L278] SORT_62 var_65_arg_1 = var_63; [L279] SORT_9 var_65 = ((SORT_9)var_65_arg_0 << 30) | var_65_arg_1; [L280] SORT_9 var_66_arg_0 = var_65; [L281] var_66_arg_0 = var_66_arg_0 & mask_SORT_9 [L282] SORT_20 var_66 = var_66_arg_0; [L283] SORT_20 var_67_arg_0 = var_21; [L284] SORT_20 var_67_arg_1 = var_66; [L285] SORT_1 var_67 = var_67_arg_0 <= var_67_arg_1; [L286] SORT_1 var_68_arg_0 = var_67; [L287] SORT_1 var_68_arg_1 = var_8; [L288] SORT_1 var_68_arg_2 = var_7; [L289] SORT_1 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L290] SORT_1 var_69_arg_0 = input_3; [L291] SORT_1 var_69_arg_1 = var_68; [L292] SORT_1 var_69 = var_69_arg_0 ^ var_69_arg_1; [L293] SORT_1 var_70_arg_0 = var_69; [L294] SORT_1 var_70 = ~var_70_arg_0; [L295] SORT_1 var_79_arg_0 = var_78; [L296] SORT_1 var_79_arg_1 = var_70; [L297] SORT_1 var_79_arg_2 = var_8; [L298] SORT_1 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L299] SORT_1 var_80_arg_0 = var_79; [L300] SORT_1 var_80 = ~var_80_arg_0; [L301] SORT_1 var_81_arg_0 = var_79; [L302] SORT_1 var_81 = ~var_81_arg_0; [L303] SORT_1 var_82_arg_0 = var_80; [L304] SORT_1 var_82_arg_1 = var_81; [L305] SORT_1 var_82 = var_82_arg_0 & var_82_arg_1; [L306] var_82 = var_82 & mask_SORT_1 [L307] SORT_1 bad_83_arg_0 = var_82; [L308] CALL __VERIFIER_assert(!(bad_83_arg_0)) [L20] COND TRUE !(cond) [L20] reach_error() - StatisticsResult: Ultimate Automizer benchmark data CFG has 2 procedures, 19 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 77.3s, OverallIterations: 8, TraceHistogramMax: 14, PathProgramHistogramMax: 6, EmptinessCheckTime: 0.0s, AutomataDifference: 4.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 110 SdHoareTripleChecker+Valid, 3.3s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 102 mSDsluCounter, 642 SdHoareTripleChecker+Invalid, 3.0s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 52 IncrementalHoareTripleChecker+Unchecked, 479 mSDsCounter, 40 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 660 IncrementalHoareTripleChecker+Invalid, 752 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 40 mSolverCounterUnsat, 163 mSDtfsCounter, 660 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 1029 GetRequests, 952 SyntacticMatches, 10 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 116 ImplicationChecksByTransitivity, 2.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=56occurred in iteration=7, InterpolantAutomatonStates: 49, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 7 MinimizatonAttempts, 28 StatesRemovedByMinimization, 6 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 1.9s SsaConstructionTime, 15.4s SatisfiabilityAnalysisTime, 49.2s InterpolantComputationTime, 1071 NumberOfCodeBlocks, 1047 NumberOfCodeBlocksAsserted, 65 NumberOfCheckSat, 947 ConstructedInterpolants, 35 QuantifiedInterpolants, 17399 SizeOfPredicates, 693 NumberOfNonLiveVariables, 18850 ConjunctsInSsa, 1122 ConjunctsInUnsatCore, 17 InterpolantComputations, 2 PerfectInterpolantSequences, 1928/2618 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Result: UNKNOWN