./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 4e7fbc69 Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/config/svcomp-Reach-64bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 0cfed53fd6b4f79a916e28ee79b804b829089e910b2920e7660f6197a58c3e45 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-4e7fbc6 [2022-11-23 15:39:10,474 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-23 15:39:10,477 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-23 15:39:10,520 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-23 15:39:10,522 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-23 15:39:10,527 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-23 15:39:10,529 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-23 15:39:10,533 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-23 15:39:10,535 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-23 15:39:10,541 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-23 15:39:10,543 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-23 15:39:10,545 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-23 15:39:10,547 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-23 15:39:10,549 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-23 15:39:10,551 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-23 15:39:10,554 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-23 15:39:10,557 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-23 15:39:10,558 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-23 15:39:10,559 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-23 15:39:10,566 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-23 15:39:10,568 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-23 15:39:10,571 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-23 15:39:10,573 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-23 15:39:10,574 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-23 15:39:10,584 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-23 15:39:10,585 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-23 15:39:10,586 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-23 15:39:10,588 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-23 15:39:10,589 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-23 15:39:10,590 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-23 15:39:10,590 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-23 15:39:10,591 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-23 15:39:10,593 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-23 15:39:10,595 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-23 15:39:10,596 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-23 15:39:10,596 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-23 15:39:10,597 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-23 15:39:10,597 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-23 15:39:10,598 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-23 15:39:10,599 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-23 15:39:10,601 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-23 15:39:10,602 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/config/svcomp-Reach-64bit-Taipan_Default.epf [2022-11-23 15:39:10,652 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-23 15:39:10,653 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-23 15:39:10,654 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-23 15:39:10,654 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-23 15:39:10,655 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-23 15:39:10,655 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-23 15:39:10,656 INFO L138 SettingsManager]: * User list type=DISABLED [2022-11-23 15:39:10,656 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-11-23 15:39:10,656 INFO L138 SettingsManager]: * Explicit value domain=true [2022-11-23 15:39:10,657 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2022-11-23 15:39:10,658 INFO L138 SettingsManager]: * Octagon Domain=false [2022-11-23 15:39:10,658 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-11-23 15:39:10,659 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2022-11-23 15:39:10,659 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2022-11-23 15:39:10,659 INFO L138 SettingsManager]: * Interval Domain=false [2022-11-23 15:39:10,660 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2022-11-23 15:39:10,660 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2022-11-23 15:39:10,660 INFO L138 SettingsManager]: * Simplification Technique=POLY_PAC [2022-11-23 15:39:10,661 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-23 15:39:10,661 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-23 15:39:10,662 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-23 15:39:10,662 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-23 15:39:10,662 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-23 15:39:10,663 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-23 15:39:10,663 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-23 15:39:10,663 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-23 15:39:10,663 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-23 15:39:10,664 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-23 15:39:10,664 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-23 15:39:10,665 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-23 15:39:10,665 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-23 15:39:10,665 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2022-11-23 15:39:10,666 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-23 15:39:10,666 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-23 15:39:10,666 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2022-11-23 15:39:10,667 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-11-23 15:39:10,667 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-23 15:39:10,667 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-11-23 15:39:10,667 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 0cfed53fd6b4f79a916e28ee79b804b829089e910b2920e7660f6197a58c3e45 [2022-11-23 15:39:11,008 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-23 15:39:11,047 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-23 15:39:11,050 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-23 15:39:11,052 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-23 15:39:11,052 INFO L275 PluginConnector]: CDTParser initialized [2022-11-23 15:39:11,054 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c [2022-11-23 15:39:14,449 INFO L500 CDTParser]: Created temporary CDT project at NULL [2022-11-23 15:39:14,774 INFO L351 CDTParser]: Found 1 translation units. [2022-11-23 15:39:14,774 INFO L172 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c [2022-11-23 15:39:14,786 INFO L394 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/data/19ec7bd00/36abe20bbc204a7198e6f4a27b7c0c50/FLAGf6bc7ad6e [2022-11-23 15:39:14,802 INFO L402 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/data/19ec7bd00/36abe20bbc204a7198e6f4a27b7c0c50 [2022-11-23 15:39:14,805 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-23 15:39:14,807 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-23 15:39:14,808 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-23 15:39:14,809 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-23 15:39:14,813 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-23 15:39:14,814 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 03:39:14" (1/1) ... [2022-11-23 15:39:14,815 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@15aa3c8a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:39:14, skipping insertion in model container [2022-11-23 15:39:14,816 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 03:39:14" (1/1) ... [2022-11-23 15:39:14,824 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-23 15:39:14,864 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-23 15:39:15,060 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c[1116,1129] [2022-11-23 15:39:15,241 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-23 15:39:15,248 INFO L203 MainTranslator]: Completed pre-run [2022-11-23 15:39:15,275 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c[1116,1129] [2022-11-23 15:39:15,382 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-23 15:39:15,396 INFO L208 MainTranslator]: Completed translation [2022-11-23 15:39:15,399 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:39:15 WrapperNode [2022-11-23 15:39:15,399 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-23 15:39:15,401 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-23 15:39:15,401 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-23 15:39:15,401 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-23 15:39:15,420 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:39:15" (1/1) ... [2022-11-23 15:39:15,437 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:39:15" (1/1) ... [2022-11-23 15:39:15,533 INFO L138 Inliner]: procedures = 11, calls = 6, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 608 [2022-11-23 15:39:15,534 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-23 15:39:15,535 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-23 15:39:15,535 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-23 15:39:15,535 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-23 15:39:15,545 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:39:15" (1/1) ... [2022-11-23 15:39:15,545 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:39:15" (1/1) ... [2022-11-23 15:39:15,570 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:39:15" (1/1) ... [2022-11-23 15:39:15,583 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:39:15" (1/1) ... [2022-11-23 15:39:15,626 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:39:15" (1/1) ... [2022-11-23 15:39:15,630 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:39:15" (1/1) ... [2022-11-23 15:39:15,634 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:39:15" (1/1) ... [2022-11-23 15:39:15,638 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:39:15" (1/1) ... [2022-11-23 15:39:15,663 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-23 15:39:15,664 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-23 15:39:15,664 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-23 15:39:15,665 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-23 15:39:15,666 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:39:15" (1/1) ... [2022-11-23 15:39:15,695 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-23 15:39:15,711 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/z3 [2022-11-23 15:39:15,728 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-23 15:39:15,755 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-23 15:39:15,783 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-23 15:39:15,783 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-23 15:39:15,784 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2022-11-23 15:39:15,784 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2022-11-23 15:39:16,039 INFO L235 CfgBuilder]: Building ICFG [2022-11-23 15:39:16,052 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-23 15:39:18,665 INFO L276 CfgBuilder]: Performing block encoding [2022-11-23 15:39:18,716 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-23 15:39:18,716 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-23 15:39:18,722 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 03:39:18 BoogieIcfgContainer [2022-11-23 15:39:18,723 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-23 15:39:18,727 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-23 15:39:18,727 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-23 15:39:18,731 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-23 15:39:18,731 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 03:39:14" (1/3) ... [2022-11-23 15:39:18,734 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@171eb098 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 03:39:18, skipping insertion in model container [2022-11-23 15:39:18,734 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:39:15" (2/3) ... [2022-11-23 15:39:18,735 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@171eb098 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 03:39:18, skipping insertion in model container [2022-11-23 15:39:18,736 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 03:39:18" (3/3) ... [2022-11-23 15:39:18,737 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c [2022-11-23 15:39:18,760 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-23 15:39:18,761 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-23 15:39:18,846 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-23 15:39:18,856 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@59a3fbd5, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-23 15:39:18,856 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-23 15:39:18,860 INFO L276 IsEmpty]: Start isEmpty. Operand has 15 states, 9 states have (on average 1.3333333333333333) internal successors, (12), 10 states have internal predecessors, (12), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-23 15:39:18,868 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-11-23 15:39:18,868 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 15:39:18,870 INFO L195 NwaCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-23 15:39:18,870 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-23 15:39:18,882 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 15:39:18,883 INFO L85 PathProgramCache]: Analyzing trace with hash -1909333156, now seen corresponding path program 1 times [2022-11-23 15:39:18,895 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-23 15:39:18,895 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1987464229] [2022-11-23 15:39:18,895 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 15:39:18,896 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 15:39:19,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 15:39:21,661 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-11-23 15:39:21,661 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-23 15:39:21,662 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1987464229] [2022-11-23 15:39:21,663 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1987464229] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-23 15:39:21,663 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-23 15:39:21,663 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-23 15:39:21,665 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [749786602] [2022-11-23 15:39:21,666 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-23 15:39:21,672 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-23 15:39:21,673 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-23 15:39:21,721 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-23 15:39:21,723 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-23 15:39:21,727 INFO L87 Difference]: Start difference. First operand has 15 states, 9 states have (on average 1.3333333333333333) internal successors, (12), 10 states have internal predecessors, (12), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 4 states, 4 states have (on average 2.0) internal successors, (8), 4 states have internal predecessors, (8), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-11-23 15:39:22,109 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 15:39:22,109 INFO L93 Difference]: Finished difference Result 37 states and 49 transitions. [2022-11-23 15:39:22,112 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-23 15:39:22,114 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.0) internal successors, (8), 4 states have internal predecessors, (8), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 16 [2022-11-23 15:39:22,115 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-23 15:39:22,122 INFO L225 Difference]: With dead ends: 37 [2022-11-23 15:39:22,123 INFO L226 Difference]: Without dead ends: 23 [2022-11-23 15:39:22,127 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-23 15:39:22,133 INFO L413 NwaCegarLoop]: 20 mSDtfsCounter, 8 mSDsluCounter, 26 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 11 SdHoareTripleChecker+Valid, 46 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-23 15:39:22,134 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [11 Valid, 46 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-11-23 15:39:22,155 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2022-11-23 15:39:22,182 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 22. [2022-11-23 15:39:22,184 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 14 states have (on average 1.0714285714285714) internal successors, (15), 14 states have internal predecessors, (15), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-11-23 15:39:22,187 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 27 transitions. [2022-11-23 15:39:22,189 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 27 transitions. Word has length 16 [2022-11-23 15:39:22,191 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-23 15:39:22,192 INFO L495 AbstractCegarLoop]: Abstraction has 22 states and 27 transitions. [2022-11-23 15:39:22,192 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.0) internal successors, (8), 4 states have internal predecessors, (8), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-11-23 15:39:22,192 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 27 transitions. [2022-11-23 15:39:22,194 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-11-23 15:39:22,195 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 15:39:22,195 INFO L195 NwaCegarLoop]: trace histogram [6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1] [2022-11-23 15:39:22,195 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-11-23 15:39:22,196 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-23 15:39:22,196 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 15:39:22,196 INFO L85 PathProgramCache]: Analyzing trace with hash -1140009903, now seen corresponding path program 1 times [2022-11-23 15:39:22,197 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-23 15:39:22,197 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [627654953] [2022-11-23 15:39:22,198 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 15:39:22,198 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 15:39:29,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 15:39:29,830 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-23 15:39:37,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 15:39:37,556 INFO L130 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2022-11-23 15:39:37,557 INFO L359 BasicCegarLoop]: Counterexample is feasible [2022-11-23 15:39:37,559 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-11-23 15:39:37,562 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-11-23 15:39:37,566 INFO L444 BasicCegarLoop]: Path program histogram: [1, 1] [2022-11-23 15:39:37,570 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-23 15:39:37,728 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-23 15:39:37,729 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-23 15:39:37,761 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 23.11 03:39:37 BoogieIcfgContainer [2022-11-23 15:39:37,761 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-23 15:39:37,762 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-23 15:39:37,762 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-23 15:39:37,762 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-23 15:39:37,763 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 03:39:18" (3/4) ... [2022-11-23 15:39:37,766 INFO L140 WitnessPrinter]: No result that supports witness generation found [2022-11-23 15:39:37,766 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-23 15:39:37,767 INFO L158 Benchmark]: Toolchain (without parser) took 22960.54ms. Allocated memory was 178.3MB in the beginning and 501.2MB in the end (delta: 323.0MB). Free memory was 148.5MB in the beginning and 341.4MB in the end (delta: -192.9MB). Peak memory consumption was 133.2MB. Max. memory is 16.1GB. [2022-11-23 15:39:37,768 INFO L158 Benchmark]: CDTParser took 0.30ms. Allocated memory is still 117.4MB. Free memory is still 82.6MB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-23 15:39:37,768 INFO L158 Benchmark]: CACSL2BoogieTranslator took 591.40ms. Allocated memory is still 178.3MB. Free memory was 148.5MB in the beginning and 124.0MB in the end (delta: 24.6MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. [2022-11-23 15:39:37,769 INFO L158 Benchmark]: Boogie Procedure Inliner took 133.27ms. Allocated memory is still 178.3MB. Free memory was 124.0MB in the beginning and 117.7MB in the end (delta: 6.3MB). Peak memory consumption was 6.3MB. Max. memory is 16.1GB. [2022-11-23 15:39:37,770 INFO L158 Benchmark]: Boogie Preprocessor took 128.89ms. Allocated memory is still 178.3MB. Free memory was 117.7MB in the beginning and 114.2MB in the end (delta: 3.4MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. [2022-11-23 15:39:37,771 INFO L158 Benchmark]: RCFGBuilder took 3058.44ms. Allocated memory was 178.3MB in the beginning and 270.5MB in the end (delta: 92.3MB). Free memory was 114.2MB in the beginning and 151.5MB in the end (delta: -37.3MB). Peak memory consumption was 138.3MB. Max. memory is 16.1GB. [2022-11-23 15:39:37,771 INFO L158 Benchmark]: TraceAbstraction took 19034.41ms. Allocated memory was 270.5MB in the beginning and 501.2MB in the end (delta: 230.7MB). Free memory was 150.5MB in the beginning and 342.4MB in the end (delta: -192.0MB). Peak memory consumption was 213.8MB. Max. memory is 16.1GB. [2022-11-23 15:39:37,772 INFO L158 Benchmark]: Witness Printer took 4.70ms. Allocated memory is still 501.2MB. Free memory was 342.4MB in the beginning and 341.4MB in the end (delta: 1.1MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-11-23 15:39:37,775 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.30ms. Allocated memory is still 117.4MB. Free memory is still 82.6MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 591.40ms. Allocated memory is still 178.3MB. Free memory was 148.5MB in the beginning and 124.0MB in the end (delta: 24.6MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 133.27ms. Allocated memory is still 178.3MB. Free memory was 124.0MB in the beginning and 117.7MB in the end (delta: 6.3MB). Peak memory consumption was 6.3MB. Max. memory is 16.1GB. * Boogie Preprocessor took 128.89ms. Allocated memory is still 178.3MB. Free memory was 117.7MB in the beginning and 114.2MB in the end (delta: 3.4MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. * RCFGBuilder took 3058.44ms. Allocated memory was 178.3MB in the beginning and 270.5MB in the end (delta: 92.3MB). Free memory was 114.2MB in the beginning and 151.5MB in the end (delta: -37.3MB). Peak memory consumption was 138.3MB. Max. memory is 16.1GB. * TraceAbstraction took 19034.41ms. Allocated memory was 270.5MB in the beginning and 501.2MB in the end (delta: 230.7MB). Free memory was 150.5MB in the beginning and 342.4MB in the end (delta: -192.0MB). Peak memory consumption was 213.8MB. Max. memory is 16.1GB. * Witness Printer took 4.70ms. Allocated memory is still 501.2MB. Free memory was 342.4MB in the beginning and 341.4MB in the end (delta: 1.1MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation The program execution was not completely translated back. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 20]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: overapproximation of bitwiseOr at line 289, overapproximation of bitwiseComplement at line 154, overapproximation of bitwiseAnd at line 157. Possible FailurePath: [L25] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L26] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L28] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 32); [L29] const SORT_3 msb_SORT_3 = (SORT_3)1 << (32 - 1); [L31] const SORT_11 mask_SORT_11 = (SORT_11)-1 >> (sizeof(SORT_11) * 8 - 5); [L32] const SORT_11 msb_SORT_11 = (SORT_11)1 << (5 - 1); [L34] const SORT_13 mask_SORT_13 = (SORT_13)-1 >> (sizeof(SORT_13) * 8 - 4); [L35] const SORT_13 msb_SORT_13 = (SORT_13)1 << (4 - 1); [L37] const SORT_19 mask_SORT_19 = (SORT_19)-1 >> (sizeof(SORT_19) * 8 - 3); [L38] const SORT_19 msb_SORT_19 = (SORT_19)1 << (3 - 1); [L40] const SORT_40 mask_SORT_40 = (SORT_40)-1 >> (sizeof(SORT_40) * 8 - 2); [L41] const SORT_40 msb_SORT_40 = (SORT_40)1 << (2 - 1); [L43] const SORT_13 var_15 = 8; [L44] const SORT_19 var_20 = 7; [L45] const SORT_19 var_25 = 6; [L46] const SORT_19 var_30 = 5; [L47] const SORT_19 var_35 = 4; [L48] const SORT_40 var_41 = 3; [L49] const SORT_40 var_46 = 2; [L50] const SORT_1 var_51 = 1; [L51] const SORT_13 var_64 = 9; [L52] const SORT_11 var_81 = 0; [L53] const SORT_1 var_111 = 0; [L54] const SORT_3 var_268 = 0; [L56] SORT_1 input_2; [L57] SORT_3 input_4; [L58] SORT_1 input_5; [L59] SORT_1 input_6; [L60] SORT_1 input_7; [L61] SORT_1 input_8; [L62] SORT_3 input_9; [L63] SORT_1 input_109; [L65] SORT_3 state_10 = __VERIFIER_nondet_uint() & mask_SORT_3; [L66] SORT_11 state_12 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L67] SORT_3 state_18 = __VERIFIER_nondet_uint() & mask_SORT_3; [L68] SORT_3 state_24 = __VERIFIER_nondet_uint() & mask_SORT_3; [L69] SORT_3 state_29 = __VERIFIER_nondet_uint() & mask_SORT_3; [L70] SORT_3 state_34 = __VERIFIER_nondet_uint() & mask_SORT_3; [L71] SORT_3 state_39 = __VERIFIER_nondet_uint() & mask_SORT_3; [L72] SORT_3 state_45 = __VERIFIER_nondet_uint() & mask_SORT_3; [L73] SORT_3 state_50 = __VERIFIER_nondet_uint() & mask_SORT_3; [L74] SORT_3 state_55 = __VERIFIER_nondet_uint() & mask_SORT_3; [L75] SORT_11 state_60 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L76] SORT_1 state_68 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L77] SORT_1 state_69 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L78] SORT_11 state_72 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L79] SORT_3 state_87 = __VERIFIER_nondet_uint() & mask_SORT_3; [L80] SORT_1 state_91 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L81] SORT_11 state_136 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L83] SORT_1 init_92_arg_1 = var_51; [L84] state_91 = init_92_arg_1 VAL [init_92_arg_1=1, mask_SORT_1=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_3=4294967295, mask_SORT_40=3, msb_SORT_1=1, msb_SORT_11=16, msb_SORT_13=8, msb_SORT_19=4, msb_SORT_3=2147483648, msb_SORT_40=2, state_10=2147483657, state_12=1, state_136=14, state_18=2147483657, state_24=2147483657, state_29=2147483657, state_34=2147483652, state_39=2147483652, state_45=2147483652, state_50=2147483652, state_55=2147483652, state_60=0, state_68=37, state_69=255, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L87] input_2 = __VERIFIER_nondet_uchar() [L88] input_4 = __VERIFIER_nondet_uint() [L89] input_5 = __VERIFIER_nondet_uchar() [L90] input_6 = __VERIFIER_nondet_uchar() [L91] input_7 = __VERIFIER_nondet_uchar() [L92] input_7 = input_7 & mask_SORT_1 [L93] input_8 = __VERIFIER_nondet_uchar() [L94] input_9 = __VERIFIER_nondet_uint() [L95] input_109 = __VERIFIER_nondet_uchar() [L97] SORT_1 var_93_arg_0 = input_7; [L98] SORT_1 var_93_arg_1 = state_91; [L99] SORT_1 var_93 = var_93_arg_0 == var_93_arg_1; [L100] SORT_1 var_94_arg_0 = var_51; [L101] SORT_1 var_94 = ~var_94_arg_0; [L102] SORT_1 var_95_arg_0 = var_93; [L103] SORT_1 var_95_arg_1 = var_94; [L104] SORT_1 var_95 = var_95_arg_0 | var_95_arg_1; [L105] var_95 = var_95 & mask_SORT_1 [L106] SORT_1 constr_96_arg_0 = var_95; VAL [constr_96_arg_0=247, init_92_arg_1=1, input_109=1, input_2=2, input_4=2147483652, input_5=20, input_6=0, input_7=0, input_8=0, input_9=2147483657, mask_SORT_1=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_3=4294967295, mask_SORT_40=3, msb_SORT_1=1, msb_SORT_11=16, msb_SORT_13=8, msb_SORT_19=4, msb_SORT_3=2147483648, msb_SORT_40=2, state_10=2147483657, state_12=1, state_136=14, state_18=2147483657, state_24=2147483657, state_29=2147483657, state_34=2147483652, state_39=2147483652, state_45=2147483652, state_50=2147483652, state_55=2147483652, state_60=0, state_68=37, state_69=255, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_93=0, var_93_arg_0=0, var_93_arg_1=1, var_94=247, var_94_arg_0=1, var_95=247, var_95_arg_0=0, var_95_arg_1=247] [L107] CALL assume_abort_if_not(constr_96_arg_0) VAL [unknown-#in~cond-unknown=247] [L21] COND FALSE !(!cond) [L107] RET assume_abort_if_not(constr_96_arg_0) VAL [constr_96_arg_0=247, init_92_arg_1=1, input_109=1, input_2=2, input_4=2147483652, input_5=20, input_6=0, input_7=0, input_8=0, input_9=2147483657, mask_SORT_1=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_3=4294967295, mask_SORT_40=3, msb_SORT_1=1, msb_SORT_11=16, msb_SORT_13=8, msb_SORT_19=4, msb_SORT_3=2147483648, msb_SORT_40=2, state_10=2147483657, state_12=1, state_136=14, state_18=2147483657, state_24=2147483657, state_29=2147483657, state_34=2147483652, state_39=2147483652, state_45=2147483652, state_50=2147483652, state_55=2147483652, state_60=0, state_68=37, state_69=255, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_93=0, var_93_arg_0=0, var_93_arg_1=1, var_94=247, var_94_arg_0=1, var_95=247, var_95_arg_0=0, var_95_arg_1=247] [L108] SORT_13 var_65_arg_0 = var_64; [L109] var_65_arg_0 = var_65_arg_0 & mask_SORT_13 [L110] SORT_11 var_65 = var_65_arg_0; [L111] SORT_11 var_66_arg_0 = state_60; [L112] SORT_11 var_66_arg_1 = var_65; [L113] SORT_1 var_66 = var_66_arg_0 == var_66_arg_1; [L114] SORT_1 var_97_arg_0 = var_66; [L115] SORT_1 var_97 = ~var_97_arg_0; [L116] SORT_1 var_98_arg_0 = input_6; [L117] SORT_1 var_98 = ~var_98_arg_0; [L118] SORT_1 var_99_arg_0 = var_97; [L119] SORT_1 var_99_arg_1 = var_98; [L120] SORT_1 var_99 = var_99_arg_0 | var_99_arg_1; [L121] SORT_1 var_100_arg_0 = var_51; [L122] SORT_1 var_100 = ~var_100_arg_0; [L123] SORT_1 var_101_arg_0 = var_99; [L124] SORT_1 var_101_arg_1 = var_100; [L125] SORT_1 var_101 = var_101_arg_0 | var_101_arg_1; [L126] var_101 = var_101 & mask_SORT_1 [L127] SORT_1 constr_102_arg_0 = var_101; VAL [constr_102_arg_0=18, constr_96_arg_0=247, init_92_arg_1=1, input_109=1, input_2=2, input_4=2147483652, input_5=20, input_6=0, input_7=0, input_8=0, input_9=2147483657, mask_SORT_1=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_3=4294967295, mask_SORT_40=3, msb_SORT_1=1, msb_SORT_11=16, msb_SORT_13=8, msb_SORT_19=4, msb_SORT_3=2147483648, msb_SORT_40=2, state_10=2147483657, state_12=1, state_136=14, state_18=2147483657, state_24=2147483657, state_29=2147483657, state_34=2147483652, state_39=2147483652, state_45=2147483652, state_50=2147483652, state_55=2147483652, state_60=0, state_68=37, state_69=255, state_72=0, state_87=0, state_91=1, var_100=11, var_100_arg_0=1, var_101=18, var_101_arg_0=11, var_101_arg_1=11, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_65=0, var_65_arg_0=0, var_66=1, var_66_arg_0=0, var_66_arg_1=0, var_81=0, var_93=0, var_93_arg_0=0, var_93_arg_1=1, var_94=247, var_94_arg_0=1, var_95=247, var_95_arg_0=0, var_95_arg_1=247, var_97=11, var_97_arg_0=1, var_98=8, var_98_arg_0=0, var_99=11, var_99_arg_0=11, var_99_arg_1=8] [L128] CALL assume_abort_if_not(constr_102_arg_0) VAL [unknown-#in~cond-unknown=18] [L21] COND FALSE !(!cond) [L128] RET assume_abort_if_not(constr_102_arg_0) VAL [constr_102_arg_0=18, constr_96_arg_0=247, init_92_arg_1=1, input_109=1, input_2=2, input_4=2147483652, input_5=20, input_6=0, input_7=0, input_8=0, input_9=2147483657, mask_SORT_1=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_3=4294967295, mask_SORT_40=3, msb_SORT_1=1, msb_SORT_11=16, msb_SORT_13=8, msb_SORT_19=4, msb_SORT_3=2147483648, msb_SORT_40=2, state_10=2147483657, state_12=1, state_136=14, state_18=2147483657, state_24=2147483657, state_29=2147483657, state_34=2147483652, state_39=2147483652, state_45=2147483652, state_50=2147483652, state_55=2147483652, state_60=0, state_68=37, state_69=255, state_72=0, state_87=0, state_91=1, var_100=11, var_100_arg_0=1, var_101=18, var_101_arg_0=11, var_101_arg_1=11, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_65=0, var_65_arg_0=0, var_66=1, var_66_arg_0=0, var_66_arg_1=0, var_81=0, var_93=0, var_93_arg_0=0, var_93_arg_1=1, var_94=247, var_94_arg_0=1, var_95=247, var_95_arg_0=0, var_95_arg_1=247, var_97=11, var_97_arg_0=1, var_98=8, var_98_arg_0=0, var_99=11, var_99_arg_0=11, var_99_arg_1=8] [L129] SORT_11 var_61_arg_0 = state_60; [L130] SORT_1 var_61 = var_61_arg_0 != 0; [L131] SORT_1 var_62_arg_0 = var_61; [L132] SORT_1 var_62 = ~var_62_arg_0; [L133] SORT_1 var_103_arg_0 = var_62; [L134] SORT_1 var_103 = ~var_103_arg_0; [L135] SORT_1 var_104_arg_0 = input_5; [L136] SORT_1 var_104 = ~var_104_arg_0; [L137] SORT_1 var_105_arg_0 = var_103; [L138] SORT_1 var_105_arg_1 = var_104; [L139] SORT_1 var_105 = var_105_arg_0 | var_105_arg_1; [L140] SORT_1 var_106_arg_0 = var_51; [L141] SORT_1 var_106 = ~var_106_arg_0; [L142] SORT_1 var_107_arg_0 = var_105; [L143] SORT_1 var_107_arg_1 = var_106; [L144] SORT_1 var_107 = var_107_arg_0 | var_107_arg_1; [L145] var_107 = var_107 & mask_SORT_1 [L146] SORT_1 constr_108_arg_0 = var_107; VAL [constr_102_arg_0=18, constr_108_arg_0=19, constr_96_arg_0=247, init_92_arg_1=1, input_109=1, input_2=2, input_4=2147483652, input_5=20, input_6=0, input_7=0, input_8=0, input_9=2147483657, mask_SORT_1=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_3=4294967295, mask_SORT_40=3, msb_SORT_1=1, msb_SORT_11=16, msb_SORT_13=8, msb_SORT_19=4, msb_SORT_3=2147483648, msb_SORT_40=2, state_10=2147483657, state_12=1, state_136=14, state_18=2147483657, state_24=2147483657, state_29=2147483657, state_34=2147483652, state_39=2147483652, state_45=2147483652, state_50=2147483652, state_55=2147483652, state_60=0, state_68=37, state_69=255, state_72=0, state_87=0, state_91=1, var_100=11, var_100_arg_0=1, var_101=18, var_101_arg_0=11, var_101_arg_1=11, var_103=255, var_103_arg_0=3, var_104=255, var_104_arg_0=20, var_105=255, var_105_arg_0=255, var_105_arg_1=255, var_106=1, var_106_arg_0=1, var_107=19, var_107_arg_0=255, var_107_arg_1=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_61=0, var_61_arg_0=0, var_62=3, var_62_arg_0=0, var_64=9, var_65=0, var_65_arg_0=0, var_66=1, var_66_arg_0=0, var_66_arg_1=0, var_81=0, var_93=0, var_93_arg_0=0, var_93_arg_1=1, var_94=247, var_94_arg_0=1, var_95=247, var_95_arg_0=0, var_95_arg_1=247, var_97=11, var_97_arg_0=1, var_98=8, var_98_arg_0=0, var_99=11, var_99_arg_0=11, var_99_arg_1=8] [L147] CALL assume_abort_if_not(constr_108_arg_0) VAL [unknown-#in~cond-unknown=19] [L21] COND FALSE !(!cond) [L147] RET assume_abort_if_not(constr_108_arg_0) VAL [constr_102_arg_0=18, constr_108_arg_0=19, constr_96_arg_0=247, init_92_arg_1=1, input_109=1, input_2=2, input_4=2147483652, input_5=20, input_6=0, input_7=0, input_8=0, input_9=2147483657, mask_SORT_1=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_3=4294967295, mask_SORT_40=3, msb_SORT_1=1, msb_SORT_11=16, msb_SORT_13=8, msb_SORT_19=4, msb_SORT_3=2147483648, msb_SORT_40=2, state_10=2147483657, state_12=1, state_136=14, state_18=2147483657, state_24=2147483657, state_29=2147483657, state_34=2147483652, state_39=2147483652, state_45=2147483652, state_50=2147483652, state_55=2147483652, state_60=0, state_68=37, state_69=255, state_72=0, state_87=0, state_91=1, var_100=11, var_100_arg_0=1, var_101=18, var_101_arg_0=11, var_101_arg_1=11, var_103=255, var_103_arg_0=3, var_104=255, var_104_arg_0=20, var_105=255, var_105_arg_0=255, var_105_arg_1=255, var_106=1, var_106_arg_0=1, var_107=19, var_107_arg_0=255, var_107_arg_1=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_61=0, var_61_arg_0=0, var_62=3, var_62_arg_0=0, var_64=9, var_65=0, var_65_arg_0=0, var_66=1, var_66_arg_0=0, var_66_arg_1=0, var_81=0, var_93=0, var_93_arg_0=0, var_93_arg_1=1, var_94=247, var_94_arg_0=1, var_95=247, var_95_arg_0=0, var_95_arg_1=247, var_97=11, var_97_arg_0=1, var_98=8, var_98_arg_0=0, var_99=11, var_99_arg_0=11, var_99_arg_1=8] [L149] SORT_1 var_112_arg_0 = state_91; [L150] SORT_1 var_112_arg_1 = var_111; [L151] SORT_1 var_112_arg_2 = var_51; [L152] SORT_1 var_112 = var_112_arg_0 ? var_112_arg_1 : var_112_arg_2; [L153] SORT_1 var_70_arg_0 = state_69; [L154] SORT_1 var_70 = ~var_70_arg_0; [L155] SORT_1 var_71_arg_0 = state_68; [L156] SORT_1 var_71_arg_1 = var_70; [L157] SORT_1 var_71 = var_71_arg_0 & var_71_arg_1; [L158] SORT_11 var_73_arg_0 = state_72; [L159] SORT_1 var_73 = var_73_arg_0 != 0; [L160] SORT_1 var_74_arg_0 = var_71; [L161] SORT_1 var_74_arg_1 = var_73; [L162] SORT_1 var_74 = var_74_arg_0 & var_74_arg_1; [L163] SORT_1 var_75_arg_0 = state_68; [L164] SORT_1 var_75 = ~var_75_arg_0; [L165] SORT_1 var_76_arg_0 = input_6; [L166] SORT_1 var_76_arg_1 = var_75; [L167] SORT_1 var_76 = var_76_arg_0 & var_76_arg_1; [L168] SORT_1 var_77_arg_0 = var_76; [L169] var_77_arg_0 = var_77_arg_0 & mask_SORT_1 [L170] SORT_11 var_77 = var_77_arg_0; [L171] SORT_11 var_78_arg_0 = state_72; [L172] SORT_11 var_78_arg_1 = var_77; [L173] SORT_11 var_78 = var_78_arg_0 + var_78_arg_1; [L174] SORT_1 var_79_arg_0 = input_5; [L175] var_79_arg_0 = var_79_arg_0 & mask_SORT_1 [L176] SORT_11 var_79 = var_79_arg_0; [L177] SORT_11 var_80_arg_0 = var_78; [L178] SORT_11 var_80_arg_1 = var_79; [L179] SORT_11 var_80 = var_80_arg_0 - var_80_arg_1; [L180] SORT_1 var_82_arg_0 = input_7; [L181] SORT_11 var_82_arg_1 = var_81; [L182] SORT_11 var_82_arg_2 = var_80; [L183] SORT_11 var_82 = var_82_arg_0 ? var_82_arg_1 : var_82_arg_2; [L184] var_82 = var_82 & mask_SORT_11 [L185] SORT_11 var_83_arg_0 = var_82; [L186] SORT_1 var_83 = var_83_arg_0 != 0; [L187] SORT_1 var_84_arg_0 = var_83; [L188] SORT_1 var_84 = ~var_84_arg_0; [L189] SORT_1 var_85_arg_0 = var_74; [L190] SORT_1 var_85_arg_1 = var_84; [L191] SORT_1 var_85 = var_85_arg_0 & var_85_arg_1; [L192] SORT_1 var_86_arg_0 = var_85; [L193] SORT_1 var_86 = ~var_86_arg_0; [L194] SORT_11 var_14_arg_0 = state_12; [L195] SORT_13 var_14 = var_14_arg_0 >> 0; [L196] var_14 = var_14 & mask_SORT_13 [L197] SORT_13 var_56_arg_0 = var_14; [L198] SORT_1 var_56 = var_56_arg_0 != 0; [L199] SORT_1 var_57_arg_0 = var_56; [L200] SORT_1 var_57 = ~var_57_arg_0; [L201] var_57 = var_57 & mask_SORT_1 [L202] SORT_1 var_52_arg_0 = var_51; [L203] var_52_arg_0 = var_52_arg_0 & mask_SORT_1 [L204] SORT_13 var_52 = var_52_arg_0; [L205] SORT_13 var_53_arg_0 = var_14; [L206] SORT_13 var_53_arg_1 = var_52; [L207] SORT_1 var_53 = var_53_arg_0 == var_53_arg_1; [L208] SORT_40 var_47_arg_0 = var_46; [L209] var_47_arg_0 = var_47_arg_0 & mask_SORT_40 [L210] SORT_13 var_47 = var_47_arg_0; [L211] SORT_13 var_48_arg_0 = var_14; [L212] SORT_13 var_48_arg_1 = var_47; [L213] SORT_1 var_48 = var_48_arg_0 == var_48_arg_1; [L214] SORT_40 var_42_arg_0 = var_41; [L215] var_42_arg_0 = var_42_arg_0 & mask_SORT_40 [L216] SORT_13 var_42 = var_42_arg_0; [L217] SORT_13 var_43_arg_0 = var_14; [L218] SORT_13 var_43_arg_1 = var_42; [L219] SORT_1 var_43 = var_43_arg_0 == var_43_arg_1; [L220] SORT_19 var_36_arg_0 = var_35; [L221] var_36_arg_0 = var_36_arg_0 & mask_SORT_19 [L222] SORT_13 var_36 = var_36_arg_0; [L223] SORT_13 var_37_arg_0 = var_14; [L224] SORT_13 var_37_arg_1 = var_36; [L225] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L226] SORT_19 var_31_arg_0 = var_30; [L227] var_31_arg_0 = var_31_arg_0 & mask_SORT_19 [L228] SORT_13 var_31 = var_31_arg_0; [L229] SORT_13 var_32_arg_0 = var_14; [L230] SORT_13 var_32_arg_1 = var_31; [L231] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L232] SORT_19 var_26_arg_0 = var_25; [L233] var_26_arg_0 = var_26_arg_0 & mask_SORT_19 [L234] SORT_13 var_26 = var_26_arg_0; [L235] SORT_13 var_27_arg_0 = var_14; [L236] SORT_13 var_27_arg_1 = var_26; [L237] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L238] SORT_19 var_21_arg_0 = var_20; [L239] var_21_arg_0 = var_21_arg_0 & mask_SORT_19 [L240] SORT_13 var_21 = var_21_arg_0; [L241] SORT_13 var_22_arg_0 = var_14; [L242] SORT_13 var_22_arg_1 = var_21; [L243] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L244] SORT_13 var_16_arg_0 = var_14; [L245] SORT_13 var_16_arg_1 = var_15; [L246] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1; [L247] SORT_1 var_17_arg_0 = var_16; [L248] SORT_3 var_17_arg_1 = state_10; [L249] SORT_3 var_17_arg_2 = input_9; [L250] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2; [L251] SORT_1 var_23_arg_0 = var_22; [L252] SORT_3 var_23_arg_1 = state_18; [L253] SORT_3 var_23_arg_2 = var_17; [L254] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L255] SORT_1 var_28_arg_0 = var_27; [L256] SORT_3 var_28_arg_1 = state_24; [L257] SORT_3 var_28_arg_2 = var_23; [L258] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L259] SORT_1 var_33_arg_0 = var_32; [L260] SORT_3 var_33_arg_1 = state_29; [L261] SORT_3 var_33_arg_2 = var_28; [L262] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L263] SORT_1 var_38_arg_0 = var_37; [L264] SORT_3 var_38_arg_1 = state_34; [L265] SORT_3 var_38_arg_2 = var_33; [L266] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L267] SORT_1 var_44_arg_0 = var_43; [L268] SORT_3 var_44_arg_1 = state_39; [L269] SORT_3 var_44_arg_2 = var_38; [L270] SORT_3 var_44 = var_44_arg_0 ? var_44_arg_1 : var_44_arg_2; [L271] SORT_1 var_49_arg_0 = var_48; [L272] SORT_3 var_49_arg_1 = state_45; [L273] SORT_3 var_49_arg_2 = var_44; [L274] SORT_3 var_49 = var_49_arg_0 ? var_49_arg_1 : var_49_arg_2; [L275] SORT_1 var_54_arg_0 = var_53; [L276] SORT_3 var_54_arg_1 = state_50; [L277] SORT_3 var_54_arg_2 = var_49; [L278] SORT_3 var_54 = var_54_arg_0 ? var_54_arg_1 : var_54_arg_2; [L279] SORT_1 var_58_arg_0 = var_57; [L280] SORT_3 var_58_arg_1 = state_55; [L281] SORT_3 var_58_arg_2 = var_54; [L282] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2; [L283] var_58 = var_58 & mask_SORT_3 [L284] SORT_3 var_88_arg_0 = state_87; [L285] SORT_3 var_88_arg_1 = var_58; [L286] SORT_1 var_88 = var_88_arg_0 == var_88_arg_1; [L287] SORT_1 var_89_arg_0 = var_86; [L288] SORT_1 var_89_arg_1 = var_88; [L289] SORT_1 var_89 = var_89_arg_0 | var_89_arg_1; [L290] SORT_1 var_110_arg_0 = state_91; [L291] SORT_1 var_110_arg_1 = input_109; [L292] SORT_1 var_110_arg_2 = var_89; [L293] SORT_1 var_110 = var_110_arg_0 ? var_110_arg_1 : var_110_arg_2; [L294] SORT_1 var_113_arg_0 = var_110; [L295] SORT_1 var_113 = ~var_113_arg_0; [L296] SORT_1 var_114_arg_0 = var_112; [L297] SORT_1 var_114_arg_1 = var_113; [L298] SORT_1 var_114 = var_114_arg_0 & var_114_arg_1; [L299] var_114 = var_114 & mask_SORT_1 [L300] SORT_1 bad_115_arg_0 = var_114; [L301] CALL __VERIFIER_assert(!(bad_115_arg_0)) [L20] COND FALSE !(!(cond)) VAL [cond=1, unknown-#in~cond-unknown=1] [L301] RET __VERIFIER_assert(!(bad_115_arg_0)) [L303] SORT_11 var_137_arg_0 = state_136; [L304] SORT_13 var_137 = var_137_arg_0 >> 0; [L305] var_137 = var_137 & mask_SORT_13 [L306] SORT_13 var_194_arg_0 = var_137; [L307] SORT_13 var_194_arg_1 = var_15; [L308] SORT_1 var_194 = var_194_arg_0 == var_194_arg_1; [L309] SORT_1 var_195_arg_0 = input_6; [L310] SORT_1 var_195_arg_1 = var_194; [L311] SORT_1 var_195 = var_195_arg_0 & var_195_arg_1; [L312] var_195 = var_195 & mask_SORT_1 [L313] SORT_1 var_267_arg_0 = var_195; [L314] SORT_3 var_267_arg_1 = input_4; [L315] SORT_3 var_267_arg_2 = state_10; [L316] SORT_3 var_267 = var_267_arg_0 ? var_267_arg_1 : var_267_arg_2; [L317] SORT_1 var_269_arg_0 = input_7; [L318] SORT_3 var_269_arg_1 = var_268; [L319] SORT_3 var_269_arg_2 = var_267; [L320] SORT_3 var_269 = var_269_arg_0 ? var_269_arg_1 : var_269_arg_2; [L321] SORT_3 next_270_arg_1 = var_269; [L322] SORT_1 var_119_arg_0 = input_6; [L323] SORT_1 var_119_arg_1 = input_5; [L324] SORT_1 var_119 = var_119_arg_0 | var_119_arg_1; [L325] SORT_1 var_120_arg_0 = var_119; [L326] SORT_1 var_120_arg_1 = input_7; [L327] SORT_1 var_120 = var_120_arg_0 | var_120_arg_1; [L328] var_120 = var_120 & mask_SORT_1 [L329] SORT_1 var_198_arg_0 = input_5; [L330] var_198_arg_0 = var_198_arg_0 & mask_SORT_1 [L331] SORT_11 var_198 = var_198_arg_0; [L332] SORT_11 var_199_arg_0 = state_12; [L333] SORT_11 var_199_arg_1 = var_198; [L334] SORT_11 var_199 = var_199_arg_0 + var_199_arg_1; [L335] SORT_1 var_271_arg_0 = var_120; [L336] SORT_11 var_271_arg_1 = var_199; [L337] SORT_11 var_271_arg_2 = state_12; [L338] SORT_11 var_271 = var_271_arg_0 ? var_271_arg_1 : var_271_arg_2; [L339] SORT_1 var_272_arg_0 = input_7; [L340] SORT_11 var_272_arg_1 = var_81; [L341] SORT_11 var_272_arg_2 = var_271; [L342] SORT_11 var_272 = var_272_arg_0 ? var_272_arg_1 : var_272_arg_2; [L343] SORT_11 next_273_arg_1 = var_272; [L344] SORT_19 var_187_arg_0 = var_20; [L345] var_187_arg_0 = var_187_arg_0 & mask_SORT_19 [L346] SORT_13 var_187 = var_187_arg_0; [L347] SORT_13 var_188_arg_0 = var_137; [L348] SORT_13 var_188_arg_1 = var_187; [L349] SORT_1 var_188 = var_188_arg_0 == var_188_arg_1; [L350] SORT_1 var_189_arg_0 = input_6; [L351] SORT_1 var_189_arg_1 = var_188; [L352] SORT_1 var_189 = var_189_arg_0 & var_189_arg_1; [L353] var_189 = var_189 & mask_SORT_1 [L354] SORT_1 var_274_arg_0 = var_189; [L355] SORT_3 var_274_arg_1 = input_4; [L356] SORT_3 var_274_arg_2 = state_18; [L357] SORT_3 var_274 = var_274_arg_0 ? var_274_arg_1 : var_274_arg_2; [L358] SORT_1 var_275_arg_0 = input_7; [L359] SORT_3 var_275_arg_1 = var_268; [L360] SORT_3 var_275_arg_2 = var_274; [L361] SORT_3 var_275 = var_275_arg_0 ? var_275_arg_1 : var_275_arg_2; [L362] SORT_3 next_276_arg_1 = var_275; [L363] SORT_19 var_180_arg_0 = var_25; [L364] var_180_arg_0 = var_180_arg_0 & mask_SORT_19 [L365] SORT_13 var_180 = var_180_arg_0; [L366] SORT_13 var_181_arg_0 = var_137; [L367] SORT_13 var_181_arg_1 = var_180; [L368] SORT_1 var_181 = var_181_arg_0 == var_181_arg_1; [L369] SORT_1 var_182_arg_0 = input_6; [L370] SORT_1 var_182_arg_1 = var_181; [L371] SORT_1 var_182 = var_182_arg_0 & var_182_arg_1; [L372] var_182 = var_182 & mask_SORT_1 [L373] SORT_1 var_277_arg_0 = var_182; [L374] SORT_3 var_277_arg_1 = input_4; [L375] SORT_3 var_277_arg_2 = state_24; [L376] SORT_3 var_277 = var_277_arg_0 ? var_277_arg_1 : var_277_arg_2; [L377] SORT_1 var_278_arg_0 = input_7; [L378] SORT_3 var_278_arg_1 = var_268; [L379] SORT_3 var_278_arg_2 = var_277; [L380] SORT_3 var_278 = var_278_arg_0 ? var_278_arg_1 : var_278_arg_2; [L381] SORT_3 next_279_arg_1 = var_278; [L382] SORT_19 var_173_arg_0 = var_30; [L383] var_173_arg_0 = var_173_arg_0 & mask_SORT_19 [L384] SORT_13 var_173 = var_173_arg_0; [L385] SORT_13 var_174_arg_0 = var_137; [L386] SORT_13 var_174_arg_1 = var_173; [L387] SORT_1 var_174 = var_174_arg_0 == var_174_arg_1; [L388] SORT_1 var_175_arg_0 = input_6; [L389] SORT_1 var_175_arg_1 = var_174; [L390] SORT_1 var_175 = var_175_arg_0 & var_175_arg_1; [L391] var_175 = var_175 & mask_SORT_1 [L392] SORT_1 var_280_arg_0 = var_175; [L393] SORT_3 var_280_arg_1 = input_4; [L394] SORT_3 var_280_arg_2 = state_29; [L395] SORT_3 var_280 = var_280_arg_0 ? var_280_arg_1 : var_280_arg_2; [L396] SORT_1 var_281_arg_0 = input_7; [L397] SORT_3 var_281_arg_1 = var_268; [L398] SORT_3 var_281_arg_2 = var_280; [L399] SORT_3 var_281 = var_281_arg_0 ? var_281_arg_1 : var_281_arg_2; [L400] SORT_3 next_282_arg_1 = var_281; [L401] SORT_19 var_166_arg_0 = var_35; [L402] var_166_arg_0 = var_166_arg_0 & mask_SORT_19 [L403] SORT_13 var_166 = var_166_arg_0; [L404] SORT_13 var_167_arg_0 = var_137; [L405] SORT_13 var_167_arg_1 = var_166; [L406] SORT_1 var_167 = var_167_arg_0 == var_167_arg_1; [L407] SORT_1 var_168_arg_0 = input_6; [L408] SORT_1 var_168_arg_1 = var_167; [L409] SORT_1 var_168 = var_168_arg_0 & var_168_arg_1; [L410] var_168 = var_168 & mask_SORT_1 [L411] SORT_1 var_283_arg_0 = var_168; [L412] SORT_3 var_283_arg_1 = input_4; [L413] SORT_3 var_283_arg_2 = state_34; [L414] SORT_3 var_283 = var_283_arg_0 ? var_283_arg_1 : var_283_arg_2; [L415] SORT_1 var_284_arg_0 = input_7; [L416] SORT_3 var_284_arg_1 = var_268; [L417] SORT_3 var_284_arg_2 = var_283; [L418] SORT_3 var_284 = var_284_arg_0 ? var_284_arg_1 : var_284_arg_2; [L419] SORT_3 next_285_arg_1 = var_284; [L420] SORT_40 var_159_arg_0 = var_41; [L421] var_159_arg_0 = var_159_arg_0 & mask_SORT_40 [L422] SORT_13 var_159 = var_159_arg_0; [L423] SORT_13 var_160_arg_0 = var_137; [L424] SORT_13 var_160_arg_1 = var_159; [L425] SORT_1 var_160 = var_160_arg_0 == var_160_arg_1; [L426] SORT_1 var_161_arg_0 = input_6; [L427] SORT_1 var_161_arg_1 = var_160; [L428] SORT_1 var_161 = var_161_arg_0 & var_161_arg_1; [L429] var_161 = var_161 & mask_SORT_1 [L430] SORT_1 var_286_arg_0 = var_161; [L431] SORT_3 var_286_arg_1 = input_4; [L432] SORT_3 var_286_arg_2 = state_39; [L433] SORT_3 var_286 = var_286_arg_0 ? var_286_arg_1 : var_286_arg_2; [L434] SORT_1 var_287_arg_0 = input_7; [L435] SORT_3 var_287_arg_1 = var_268; [L436] SORT_3 var_287_arg_2 = var_286; [L437] SORT_3 var_287 = var_287_arg_0 ? var_287_arg_1 : var_287_arg_2; [L438] SORT_3 next_288_arg_1 = var_287; [L439] SORT_40 var_152_arg_0 = var_46; [L440] var_152_arg_0 = var_152_arg_0 & mask_SORT_40 [L441] SORT_13 var_152 = var_152_arg_0; [L442] SORT_13 var_153_arg_0 = var_137; [L443] SORT_13 var_153_arg_1 = var_152; [L444] SORT_1 var_153 = var_153_arg_0 == var_153_arg_1; [L445] SORT_1 var_154_arg_0 = input_6; [L446] SORT_1 var_154_arg_1 = var_153; [L447] SORT_1 var_154 = var_154_arg_0 & var_154_arg_1; [L448] var_154 = var_154 & mask_SORT_1 [L449] SORT_1 var_289_arg_0 = var_154; [L450] SORT_3 var_289_arg_1 = input_4; [L451] SORT_3 var_289_arg_2 = state_45; [L452] SORT_3 var_289 = var_289_arg_0 ? var_289_arg_1 : var_289_arg_2; [L453] SORT_1 var_290_arg_0 = input_7; [L454] SORT_3 var_290_arg_1 = var_268; [L455] SORT_3 var_290_arg_2 = var_289; [L456] SORT_3 var_290 = var_290_arg_0 ? var_290_arg_1 : var_290_arg_2; [L457] SORT_3 next_291_arg_1 = var_290; [L458] SORT_1 var_145_arg_0 = var_51; [L459] var_145_arg_0 = var_145_arg_0 & mask_SORT_1 [L460] SORT_13 var_145 = var_145_arg_0; [L461] SORT_13 var_146_arg_0 = var_137; [L462] SORT_13 var_146_arg_1 = var_145; [L463] SORT_1 var_146 = var_146_arg_0 == var_146_arg_1; [L464] SORT_1 var_147_arg_0 = input_6; [L465] SORT_1 var_147_arg_1 = var_146; [L466] SORT_1 var_147 = var_147_arg_0 & var_147_arg_1; [L467] var_147 = var_147 & mask_SORT_1 [L468] SORT_1 var_292_arg_0 = var_147; [L469] SORT_3 var_292_arg_1 = input_4; [L470] SORT_3 var_292_arg_2 = state_50; [L471] SORT_3 var_292 = var_292_arg_0 ? var_292_arg_1 : var_292_arg_2; [L472] SORT_1 var_293_arg_0 = input_7; [L473] SORT_3 var_293_arg_1 = var_268; [L474] SORT_3 var_293_arg_2 = var_292; [L475] SORT_3 var_293 = var_293_arg_0 ? var_293_arg_1 : var_293_arg_2; [L476] SORT_3 next_294_arg_1 = var_293; [L477] SORT_13 var_138_arg_0 = var_137; [L478] SORT_1 var_138 = var_138_arg_0 != 0; [L479] SORT_1 var_139_arg_0 = var_138; [L480] SORT_1 var_139 = ~var_139_arg_0; [L481] SORT_1 var_140_arg_0 = input_6; [L482] SORT_1 var_140_arg_1 = var_139; [L483] SORT_1 var_140 = var_140_arg_0 & var_140_arg_1; [L484] var_140 = var_140 & mask_SORT_1 [L485] SORT_1 var_295_arg_0 = var_140; [L486] SORT_3 var_295_arg_1 = input_4; [L487] SORT_3 var_295_arg_2 = state_55; [L488] SORT_3 var_295 = var_295_arg_0 ? var_295_arg_1 : var_295_arg_2; [L489] SORT_1 var_296_arg_0 = input_7; [L490] SORT_3 var_296_arg_1 = var_268; [L491] SORT_3 var_296_arg_2 = var_295; [L492] SORT_3 var_296 = var_296_arg_0 ? var_296_arg_1 : var_296_arg_2; [L493] SORT_3 next_297_arg_1 = var_296; [L494] SORT_1 var_298_arg_0 = input_6; [L495] var_298_arg_0 = var_298_arg_0 & mask_SORT_1 [L496] SORT_11 var_298 = var_298_arg_0; [L497] SORT_11 var_299_arg_0 = state_60; [L498] SORT_11 var_299_arg_1 = var_298; [L499] SORT_11 var_299 = var_299_arg_0 + var_299_arg_1; [L500] SORT_1 var_300_arg_0 = input_5; [L501] var_300_arg_0 = var_300_arg_0 & mask_SORT_1 [L502] SORT_11 var_300 = var_300_arg_0; [L503] SORT_11 var_301_arg_0 = var_299; [L504] SORT_11 var_301_arg_1 = var_300; [L505] SORT_11 var_301 = var_301_arg_0 - var_301_arg_1; [L506] SORT_1 var_302_arg_0 = input_7; [L507] SORT_11 var_302_arg_1 = var_81; [L508] SORT_11 var_302_arg_2 = var_301; [L509] SORT_11 var_302 = var_302_arg_0 ? var_302_arg_1 : var_302_arg_2; [L510] var_302 = var_302 & mask_SORT_11 [L511] SORT_11 next_303_arg_1 = var_302; [L512] SORT_1 var_228_arg_0 = state_68; [L513] SORT_1 var_228 = ~var_228_arg_0; [L514] var_228 = var_228 & mask_SORT_1 [L515] SORT_1 var_224_arg_0 = input_8; [L516] SORT_1 var_224_arg_1 = input_6; [L517] SORT_1 var_224 = var_224_arg_0 & var_224_arg_1; [L518] SORT_1 var_225_arg_0 = state_68; [L519] SORT_1 var_225_arg_1 = var_224; [L520] SORT_1 var_225 = var_225_arg_0 | var_225_arg_1; [L521] SORT_1 var_304_arg_0 = var_228; [L522] SORT_1 var_304_arg_1 = var_225; [L523] SORT_1 var_304_arg_2 = state_68; [L524] SORT_1 var_304 = var_304_arg_0 ? var_304_arg_1 : var_304_arg_2; [L525] SORT_1 var_305_arg_0 = input_7; [L526] SORT_1 var_305_arg_1 = var_111; [L527] SORT_1 var_305_arg_2 = var_304; [L528] SORT_1 var_305 = var_305_arg_0 ? var_305_arg_1 : var_305_arg_2; [L529] SORT_1 next_306_arg_1 = var_305; [L530] SORT_1 var_236_arg_0 = var_85; [L531] SORT_1 var_236_arg_1 = state_69; [L532] SORT_1 var_236 = var_236_arg_0 | var_236_arg_1; [L533] SORT_1 var_307_arg_0 = var_51; [L534] SORT_1 var_307_arg_1 = var_236; [L535] SORT_1 var_307_arg_2 = state_69; [L536] SORT_1 var_307 = var_307_arg_0 ? var_307_arg_1 : var_307_arg_2; [L537] SORT_1 var_308_arg_0 = input_7; [L538] SORT_1 var_308_arg_1 = var_111; [L539] SORT_1 var_308_arg_2 = var_307; [L540] SORT_1 var_308 = var_308_arg_0 ? var_308_arg_1 : var_308_arg_2; [L541] SORT_1 next_309_arg_1 = var_308; [L542] SORT_1 var_248_arg_0 = input_6; [L543] SORT_1 var_248_arg_1 = input_5; [L544] SORT_1 var_248 = var_248_arg_0 | var_248_arg_1; [L545] SORT_1 var_249_arg_0 = var_248; [L546] SORT_1 var_249_arg_1 = input_7; [L547] SORT_1 var_249 = var_249_arg_0 | var_249_arg_1; [L548] SORT_1 var_250_arg_0 = var_249; [L549] SORT_1 var_250_arg_1 = state_68; [L550] SORT_1 var_250 = var_250_arg_0 | var_250_arg_1; [L551] var_250 = var_250 & mask_SORT_1 [L552] SORT_1 var_310_arg_0 = var_250; [L553] SORT_11 var_310_arg_1 = var_82; [L554] SORT_11 var_310_arg_2 = state_72; [L555] SORT_11 var_310 = var_310_arg_0 ? var_310_arg_1 : var_310_arg_2; [L556] SORT_1 var_311_arg_0 = input_7; [L557] SORT_11 var_311_arg_1 = var_81; [L558] SORT_11 var_311_arg_2 = var_310; [L559] SORT_11 var_311 = var_311_arg_0 ? var_311_arg_1 : var_311_arg_2; [L560] var_311 = var_311 & mask_SORT_11 [L561] SORT_11 next_312_arg_1 = var_311; [L562] SORT_1 var_233_arg_0 = var_224; [L563] SORT_1 var_233_arg_1 = var_228; [L564] SORT_1 var_233 = var_233_arg_0 & var_233_arg_1; [L565] var_233 = var_233 & mask_SORT_1 [L566] SORT_1 var_313_arg_0 = var_233; [L567] SORT_3 var_313_arg_1 = input_4; [L568] SORT_3 var_313_arg_2 = state_87; [L569] SORT_3 var_313 = var_313_arg_0 ? var_313_arg_1 : var_313_arg_2; [L570] SORT_1 var_314_arg_0 = input_7; [L571] SORT_3 var_314_arg_1 = var_268; [L572] SORT_3 var_314_arg_2 = var_313; [L573] SORT_3 var_314 = var_314_arg_0 ? var_314_arg_1 : var_314_arg_2; [L574] var_314 = var_314 & mask_SORT_3 [L575] SORT_3 next_315_arg_1 = var_314; [L576] SORT_1 next_316_arg_1 = var_111; [L577] SORT_1 var_204_arg_0 = input_6; [L578] var_204_arg_0 = var_204_arg_0 & mask_SORT_1 [L579] SORT_11 var_204 = var_204_arg_0; [L580] SORT_11 var_205_arg_0 = state_136; [L581] SORT_11 var_205_arg_1 = var_204; [L582] SORT_11 var_205 = var_205_arg_0 + var_205_arg_1; [L583] SORT_1 var_317_arg_0 = var_120; [L584] SORT_11 var_317_arg_1 = var_205; [L585] SORT_11 var_317_arg_2 = state_136; [L586] SORT_11 var_317 = var_317_arg_0 ? var_317_arg_1 : var_317_arg_2; [L587] SORT_1 var_318_arg_0 = input_7; [L588] SORT_11 var_318_arg_1 = var_81; [L589] SORT_11 var_318_arg_2 = var_317; [L590] SORT_11 var_318 = var_318_arg_0 ? var_318_arg_1 : var_318_arg_2; [L591] SORT_11 next_319_arg_1 = var_318; [L593] state_10 = next_270_arg_1 [L594] state_12 = next_273_arg_1 [L595] state_18 = next_276_arg_1 [L596] state_24 = next_279_arg_1 [L597] state_29 = next_282_arg_1 [L598] state_34 = next_285_arg_1 [L599] state_39 = next_288_arg_1 [L600] state_45 = next_291_arg_1 [L601] state_50 = next_294_arg_1 [L602] state_55 = next_297_arg_1 [L603] state_60 = next_303_arg_1 [L604] state_68 = next_306_arg_1 [L605] state_69 = next_309_arg_1 [L606] state_72 = next_312_arg_1 [L607] state_87 = next_315_arg_1 [L608] state_91 = next_316_arg_1 [L609] state_136 = next_319_arg_1 VAL [bad_115_arg_0=0, constr_102_arg_0=18, constr_108_arg_0=19, constr_96_arg_0=247, init_92_arg_1=1, input_109=1, input_2=2, input_4=2147483652, input_5=20, input_6=0, input_7=0, input_8=0, input_9=2147483657, mask_SORT_1=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_3=4294967295, mask_SORT_40=3, msb_SORT_1=1, msb_SORT_11=16, msb_SORT_13=8, msb_SORT_19=4, msb_SORT_3=2147483648, msb_SORT_40=2, next_270_arg_1=2147483657, next_273_arg_1=1, next_276_arg_1=2147483657, next_279_arg_1=2147483657, next_282_arg_1=2147483657, next_285_arg_1=2147483652, next_288_arg_1=2147483652, next_291_arg_1=2147483652, next_294_arg_1=2147483652, next_297_arg_1=2147483652, next_303_arg_1=236, next_306_arg_1=37, next_309_arg_1=255, next_312_arg_1=16, next_315_arg_1=0, next_316_arg_1=0, next_319_arg_1=14, state_10=2147483657, state_12=1, state_136=14, state_18=2147483657, state_24=2147483657, state_29=2147483657, state_34=2147483652, state_39=2147483652, state_45=2147483652, state_50=2147483652, state_55=2147483652, state_60=236, state_68=37, state_69=255, state_72=16, state_87=0, state_91=0, var_100=11, var_100_arg_0=1, var_101=18, var_101_arg_0=11, var_101_arg_1=11, var_103=255, var_103_arg_0=3, var_104=255, var_104_arg_0=20, var_105=255, var_105_arg_0=255, var_105_arg_1=255, var_106=1, var_106_arg_0=1, var_107=19, var_107_arg_0=255, var_107_arg_1=1, var_110=1, var_110_arg_0=1, var_110_arg_1=1, var_110_arg_2=1, var_111=0, var_112=0, var_112_arg_0=1, var_112_arg_1=0, var_112_arg_2=1, var_113=255, var_113_arg_0=1, var_114=0, var_114_arg_0=0, var_114_arg_1=255, var_119=20, var_119_arg_0=0, var_119_arg_1=20, var_120=0, var_120_arg_0=20, var_120_arg_1=0, var_137=7, var_137_arg_0=14, var_138=1, var_138_arg_0=7, var_139=255, var_139_arg_0=1, var_14=0, var_140=0, var_140_arg_0=0, var_140_arg_1=255, var_145=1, var_145_arg_0=1, var_146=0, var_146_arg_0=7, var_146_arg_1=1, var_147=0, var_147_arg_0=0, var_147_arg_1=0, var_14_arg_0=1, var_15=8, var_152=0, var_152_arg_0=0, var_153=0, var_153_arg_0=7, var_153_arg_1=0, var_154=0, var_154_arg_0=0, var_154_arg_1=0, var_159=3, var_159_arg_0=3, var_16=0, var_160=0, var_160_arg_0=7, var_160_arg_1=3, var_161=0, var_161_arg_0=0, var_161_arg_1=0, var_166=0, var_166_arg_0=0, var_167=0, var_167_arg_0=7, var_167_arg_1=0, var_168=0, var_168_arg_0=0, var_168_arg_1=0, var_16_arg_0=0, var_16_arg_1=8, var_17=2147483657, var_173=5, var_173_arg_0=5, var_174=0, var_174_arg_0=7, var_174_arg_1=5, var_175=0, var_175_arg_0=0, var_175_arg_1=0, var_17_arg_0=0, var_17_arg_1=2147483657, var_17_arg_2=2147483657, var_180=7, var_180_arg_0=7, var_181=1, var_181_arg_0=7, var_181_arg_1=7, var_182=0, var_182_arg_0=0, var_182_arg_1=1, var_187=7, var_187_arg_0=7, var_188=1, var_188_arg_0=7, var_188_arg_1=7, var_189=0, var_189_arg_0=0, var_189_arg_1=1, var_194=0, var_194_arg_0=7, var_194_arg_1=8, var_195=0, var_195_arg_0=0, var_195_arg_1=0, var_198=0, var_198_arg_0=0, var_199=1, var_199_arg_0=1, var_199_arg_1=0, var_20=7, var_204=0, var_204_arg_0=0, var_205=14, var_205_arg_0=14, var_205_arg_1=0, var_21=7, var_21_arg_0=7, var_22=0, var_224=0, var_224_arg_0=0, var_224_arg_1=0, var_225=37, var_225_arg_0=37, var_225_arg_1=0, var_228=0, var_228_arg_0=37, var_22_arg_0=0, var_22_arg_1=7, var_23=2147483657, var_233=0, var_233_arg_0=0, var_233_arg_1=0, var_236=255, var_236_arg_0=0, var_236_arg_1=255, var_23_arg_0=0, var_23_arg_1=2147483657, var_23_arg_2=2147483657, var_248=20, var_248_arg_0=0, var_248_arg_1=20, var_249=20, var_249_arg_0=20, var_249_arg_1=0, var_25=6, var_250=1, var_250_arg_0=20, var_250_arg_1=37, var_26=250, var_267=2147483657, var_267_arg_0=0, var_267_arg_1=2147483652, var_267_arg_2=2147483657, var_268=0, var_269=2147483657, var_269_arg_0=0, var_269_arg_1=0, var_269_arg_2=2147483657, var_26_arg_0=250, var_27=0, var_271=1, var_271_arg_0=0, var_271_arg_1=1, var_271_arg_2=1, var_272=1, var_272_arg_0=0, var_272_arg_1=0, var_272_arg_2=1, var_274=2147483657, var_274_arg_0=0, var_274_arg_1=2147483652, var_274_arg_2=2147483657, var_275=2147483657, var_275_arg_0=0, var_275_arg_1=0, var_275_arg_2=2147483657, var_277=2147483657, var_277_arg_0=0, var_277_arg_1=2147483652, var_277_arg_2=2147483657, var_278=2147483657, var_278_arg_0=0, var_278_arg_1=0, var_278_arg_2=2147483657, var_27_arg_0=0, var_27_arg_1=250, var_28=2147483657, var_280=2147483657, var_280_arg_0=0, var_280_arg_1=2147483652, var_280_arg_2=2147483657, var_281=2147483657, var_281_arg_0=0, var_281_arg_1=0, var_281_arg_2=2147483657, var_283=2147483652, var_283_arg_0=0, var_283_arg_1=2147483652, var_283_arg_2=2147483652, var_284=2147483652, var_284_arg_0=0, var_284_arg_1=0, var_284_arg_2=2147483652, var_286=2147483652, var_286_arg_0=0, var_286_arg_1=2147483652, var_286_arg_2=2147483652, var_287=2147483652, var_287_arg_0=0, var_287_arg_1=0, var_287_arg_2=2147483652, var_289=2147483652, var_289_arg_0=0, var_289_arg_1=2147483652, var_289_arg_2=2147483652, var_28_arg_0=0, var_28_arg_1=2147483657, var_28_arg_2=2147483657, var_290=2147483652, var_290_arg_0=0, var_290_arg_1=0, var_290_arg_2=2147483652, var_292=2147483652, var_292_arg_0=0, var_292_arg_1=2147483652, var_292_arg_2=2147483652, var_293=2147483652, var_293_arg_0=0, var_293_arg_1=0, var_293_arg_2=2147483652, var_295=2147483652, var_295_arg_0=0, var_295_arg_1=2147483652, var_295_arg_2=2147483652, var_296=2147483652, var_296_arg_0=0, var_296_arg_1=0, var_296_arg_2=2147483652, var_298=0, var_298_arg_0=0, var_299=0, var_299_arg_0=0, var_299_arg_1=0, var_30=5, var_300=20, var_300_arg_0=20, var_301=236, var_301_arg_0=0, var_301_arg_1=20, var_302=236, var_302_arg_0=0, var_302_arg_1=0, var_302_arg_2=236, var_304=37, var_304_arg_0=0, var_304_arg_1=37, var_304_arg_2=37, var_305=37, var_305_arg_0=0, var_305_arg_1=0, var_305_arg_2=37, var_307=255, var_307_arg_0=1, var_307_arg_1=255, var_307_arg_2=255, var_308=255, var_308_arg_0=0, var_308_arg_1=0, var_308_arg_2=255, var_31=5, var_310=1, var_310_arg_0=1, var_310_arg_1=1, var_310_arg_2=0, var_311=16, var_311_arg_0=0, var_311_arg_1=0, var_311_arg_2=1, var_313=0, var_313_arg_0=0, var_313_arg_1=2147483652, var_313_arg_2=0, var_314=0, var_314_arg_0=0, var_314_arg_1=0, var_314_arg_2=0, var_317=14, var_317_arg_0=0, var_317_arg_1=14, var_317_arg_2=14, var_318=14, var_318_arg_0=0, var_318_arg_1=0, var_318_arg_2=14, var_31_arg_0=5, var_32=0, var_32_arg_0=0, var_32_arg_1=5, var_33=2147483657, var_33_arg_0=0, var_33_arg_1=2147483657, var_33_arg_2=2147483657, var_35=4, var_36=0, var_36_arg_0=0, var_37=1, var_37_arg_0=0, var_37_arg_1=0, var_38=2147483652, var_38_arg_0=1, var_38_arg_1=2147483652, var_38_arg_2=2147483657, var_41=3, var_42=3, var_42_arg_0=3, var_43=0, var_43_arg_0=0, var_43_arg_1=3, var_44=2147483652, var_44_arg_0=0, var_44_arg_1=2147483652, var_44_arg_2=2147483652, var_46=2, var_47=0, var_47_arg_0=0, var_48=1, var_48_arg_0=0, var_48_arg_1=0, var_49=2147483652, var_49_arg_0=1, var_49_arg_1=2147483652, var_49_arg_2=2147483652, var_51=1, var_52=1, var_52_arg_0=1, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54=2147483652, var_54_arg_0=0, var_54_arg_1=2147483652, var_54_arg_2=2147483652, var_56=0, var_56_arg_0=0, var_57=0, var_57_arg_0=0, var_58=0, var_58_arg_0=0, var_58_arg_1=2147483652, var_58_arg_2=2147483652, var_61=0, var_61_arg_0=0, var_62=3, var_62_arg_0=0, var_64=9, var_65=0, var_65_arg_0=0, var_66=1, var_66_arg_0=0, var_66_arg_1=0, var_70=1, var_70_arg_0=255, var_71=10, var_71_arg_0=37, var_71_arg_1=1, var_73=0, var_73_arg_0=0, var_74=0, var_74_arg_0=10, var_74_arg_1=0, var_75=255, var_75_arg_0=37, var_76=0, var_76_arg_0=0, var_76_arg_1=255, var_77=0, var_77_arg_0=0, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_79=255, var_79_arg_0=255, var_80=1, var_80_arg_0=0, var_80_arg_1=255, var_81=0, var_82=1, var_82_arg_0=0, var_82_arg_1=0, var_82_arg_2=1, var_83=1, var_83_arg_0=1, var_84=255, var_84_arg_0=1, var_85=0, var_85_arg_0=0, var_85_arg_1=255, var_86=2, var_86_arg_0=0, var_88=1, var_88_arg_0=0, var_88_arg_1=0, var_89=1, var_89_arg_0=2, var_89_arg_1=1, var_93=0, var_93_arg_0=0, var_93_arg_1=1, var_94=247, var_94_arg_0=1, var_95=247, var_95_arg_0=0, var_95_arg_1=247, var_97=11, var_97_arg_0=1, var_98=8, var_98_arg_0=0, var_99=11, var_99_arg_0=11, var_99_arg_1=8] [L87] input_2 = __VERIFIER_nondet_uchar() [L88] input_4 = __VERIFIER_nondet_uint() [L89] input_5 = __VERIFIER_nondet_uchar() [L90] input_6 = __VERIFIER_nondet_uchar() [L91] input_7 = __VERIFIER_nondet_uchar() [L92] input_7 = input_7 & mask_SORT_1 [L93] input_8 = __VERIFIER_nondet_uchar() [L94] input_9 = __VERIFIER_nondet_uint() [L95] input_109 = __VERIFIER_nondet_uchar() [L97] SORT_1 var_93_arg_0 = input_7; [L98] SORT_1 var_93_arg_1 = state_91; [L99] SORT_1 var_93 = var_93_arg_0 == var_93_arg_1; [L100] SORT_1 var_94_arg_0 = var_51; [L101] SORT_1 var_94 = ~var_94_arg_0; [L102] SORT_1 var_95_arg_0 = var_93; [L103] SORT_1 var_95_arg_1 = var_94; [L104] SORT_1 var_95 = var_95_arg_0 | var_95_arg_1; [L105] var_95 = var_95 & mask_SORT_1 [L106] SORT_1 constr_96_arg_0 = var_95; VAL [bad_115_arg_0=0, constr_102_arg_0=18, constr_108_arg_0=19, constr_96_arg_0=21, init_92_arg_1=1, input_109=12, input_2=5, input_4=2147483658, input_5=251, input_6=17, input_7=0, input_8=6, input_9=2147483657, mask_SORT_1=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_3=4294967295, mask_SORT_40=3, msb_SORT_1=1, msb_SORT_11=16, msb_SORT_13=8, msb_SORT_19=4, msb_SORT_3=2147483648, msb_SORT_40=2, next_270_arg_1=2147483657, next_273_arg_1=1, next_276_arg_1=2147483657, next_279_arg_1=2147483657, next_282_arg_1=2147483657, next_285_arg_1=2147483652, next_288_arg_1=2147483652, next_291_arg_1=2147483652, next_294_arg_1=2147483652, next_297_arg_1=2147483652, next_303_arg_1=236, next_306_arg_1=37, next_309_arg_1=255, next_312_arg_1=16, next_315_arg_1=0, next_316_arg_1=0, next_319_arg_1=14, state_10=2147483657, state_12=1, state_136=14, state_18=2147483657, state_24=2147483657, state_29=2147483657, state_34=2147483652, state_39=2147483652, state_45=2147483652, state_50=2147483652, state_55=2147483652, state_60=236, state_68=37, state_69=255, state_72=16, state_87=0, state_91=0, var_100=11, var_100_arg_0=1, var_101=18, var_101_arg_0=11, var_101_arg_1=11, var_103=255, var_103_arg_0=3, var_104=255, var_104_arg_0=20, var_105=255, var_105_arg_0=255, var_105_arg_1=255, var_106=1, var_106_arg_0=1, var_107=19, var_107_arg_0=255, var_107_arg_1=1, var_110=1, var_110_arg_0=1, var_110_arg_1=1, var_110_arg_2=1, var_111=0, var_112=0, var_112_arg_0=1, var_112_arg_1=0, var_112_arg_2=1, var_113=255, var_113_arg_0=1, var_114=0, var_114_arg_0=0, var_114_arg_1=255, var_119=20, var_119_arg_0=0, var_119_arg_1=20, var_120=0, var_120_arg_0=20, var_120_arg_1=0, var_137=7, var_137_arg_0=14, var_138=1, var_138_arg_0=7, var_139=255, var_139_arg_0=1, var_14=0, var_140=0, var_140_arg_0=0, var_140_arg_1=255, var_145=1, var_145_arg_0=1, var_146=0, var_146_arg_0=7, var_146_arg_1=1, var_147=0, var_147_arg_0=0, var_147_arg_1=0, var_14_arg_0=1, var_15=8, var_152=0, var_152_arg_0=0, var_153=0, var_153_arg_0=7, var_153_arg_1=0, var_154=0, var_154_arg_0=0, var_154_arg_1=0, var_159=3, var_159_arg_0=3, var_16=0, var_160=0, var_160_arg_0=7, var_160_arg_1=3, var_161=0, var_161_arg_0=0, var_161_arg_1=0, var_166=0, var_166_arg_0=0, var_167=0, var_167_arg_0=7, var_167_arg_1=0, var_168=0, var_168_arg_0=0, var_168_arg_1=0, var_16_arg_0=0, var_16_arg_1=8, var_17=2147483657, var_173=5, var_173_arg_0=5, var_174=0, var_174_arg_0=7, var_174_arg_1=5, var_175=0, var_175_arg_0=0, var_175_arg_1=0, var_17_arg_0=0, var_17_arg_1=2147483657, var_17_arg_2=2147483657, var_180=7, var_180_arg_0=7, var_181=1, var_181_arg_0=7, var_181_arg_1=7, var_182=0, var_182_arg_0=0, var_182_arg_1=1, var_187=7, var_187_arg_0=7, var_188=1, var_188_arg_0=7, var_188_arg_1=7, var_189=0, var_189_arg_0=0, var_189_arg_1=1, var_194=0, var_194_arg_0=7, var_194_arg_1=8, var_195=0, var_195_arg_0=0, var_195_arg_1=0, var_198=0, var_198_arg_0=0, var_199=1, var_199_arg_0=1, var_199_arg_1=0, var_20=7, var_204=0, var_204_arg_0=0, var_205=14, var_205_arg_0=14, var_205_arg_1=0, var_21=7, var_21_arg_0=7, var_22=0, var_224=0, var_224_arg_0=0, var_224_arg_1=0, var_225=37, var_225_arg_0=37, var_225_arg_1=0, var_228=0, var_228_arg_0=37, var_22_arg_0=0, var_22_arg_1=7, var_23=2147483657, var_233=0, var_233_arg_0=0, var_233_arg_1=0, var_236=255, var_236_arg_0=0, var_236_arg_1=255, var_23_arg_0=0, var_23_arg_1=2147483657, var_23_arg_2=2147483657, var_248=20, var_248_arg_0=0, var_248_arg_1=20, var_249=20, var_249_arg_0=20, var_249_arg_1=0, var_25=6, var_250=1, var_250_arg_0=20, var_250_arg_1=37, var_26=250, var_267=2147483657, var_267_arg_0=0, var_267_arg_1=2147483652, var_267_arg_2=2147483657, var_268=0, var_269=2147483657, var_269_arg_0=0, var_269_arg_1=0, var_269_arg_2=2147483657, var_26_arg_0=250, var_27=0, var_271=1, var_271_arg_0=0, var_271_arg_1=1, var_271_arg_2=1, var_272=1, var_272_arg_0=0, var_272_arg_1=0, var_272_arg_2=1, var_274=2147483657, var_274_arg_0=0, var_274_arg_1=2147483652, var_274_arg_2=2147483657, var_275=2147483657, var_275_arg_0=0, var_275_arg_1=0, var_275_arg_2=2147483657, var_277=2147483657, var_277_arg_0=0, var_277_arg_1=2147483652, var_277_arg_2=2147483657, var_278=2147483657, var_278_arg_0=0, var_278_arg_1=0, var_278_arg_2=2147483657, var_27_arg_0=0, var_27_arg_1=250, var_28=2147483657, var_280=2147483657, var_280_arg_0=0, var_280_arg_1=2147483652, var_280_arg_2=2147483657, var_281=2147483657, var_281_arg_0=0, var_281_arg_1=0, var_281_arg_2=2147483657, var_283=2147483652, var_283_arg_0=0, var_283_arg_1=2147483652, var_283_arg_2=2147483652, var_284=2147483652, var_284_arg_0=0, var_284_arg_1=0, var_284_arg_2=2147483652, var_286=2147483652, var_286_arg_0=0, var_286_arg_1=2147483652, var_286_arg_2=2147483652, var_287=2147483652, var_287_arg_0=0, var_287_arg_1=0, var_287_arg_2=2147483652, var_289=2147483652, var_289_arg_0=0, var_289_arg_1=2147483652, var_289_arg_2=2147483652, var_28_arg_0=0, var_28_arg_1=2147483657, var_28_arg_2=2147483657, var_290=2147483652, var_290_arg_0=0, var_290_arg_1=0, var_290_arg_2=2147483652, var_292=2147483652, var_292_arg_0=0, var_292_arg_1=2147483652, var_292_arg_2=2147483652, var_293=2147483652, var_293_arg_0=0, var_293_arg_1=0, var_293_arg_2=2147483652, var_295=2147483652, var_295_arg_0=0, var_295_arg_1=2147483652, var_295_arg_2=2147483652, var_296=2147483652, var_296_arg_0=0, var_296_arg_1=0, var_296_arg_2=2147483652, var_298=0, var_298_arg_0=0, var_299=0, var_299_arg_0=0, var_299_arg_1=0, var_30=5, var_300=20, var_300_arg_0=20, var_301=236, var_301_arg_0=0, var_301_arg_1=20, var_302=236, var_302_arg_0=0, var_302_arg_1=0, var_302_arg_2=236, var_304=37, var_304_arg_0=0, var_304_arg_1=37, var_304_arg_2=37, var_305=37, var_305_arg_0=0, var_305_arg_1=0, var_305_arg_2=37, var_307=255, var_307_arg_0=1, var_307_arg_1=255, var_307_arg_2=255, var_308=255, var_308_arg_0=0, var_308_arg_1=0, var_308_arg_2=255, var_31=5, var_310=1, var_310_arg_0=1, var_310_arg_1=1, var_310_arg_2=0, var_311=16, var_311_arg_0=0, var_311_arg_1=0, var_311_arg_2=1, var_313=0, var_313_arg_0=0, var_313_arg_1=2147483652, var_313_arg_2=0, var_314=0, var_314_arg_0=0, var_314_arg_1=0, var_314_arg_2=0, var_317=14, var_317_arg_0=0, var_317_arg_1=14, var_317_arg_2=14, var_318=14, var_318_arg_0=0, var_318_arg_1=0, var_318_arg_2=14, var_31_arg_0=5, var_32=0, var_32_arg_0=0, var_32_arg_1=5, var_33=2147483657, var_33_arg_0=0, var_33_arg_1=2147483657, var_33_arg_2=2147483657, var_35=4, var_36=0, var_36_arg_0=0, var_37=1, var_37_arg_0=0, var_37_arg_1=0, var_38=2147483652, var_38_arg_0=1, var_38_arg_1=2147483652, var_38_arg_2=2147483657, var_41=3, var_42=3, var_42_arg_0=3, var_43=0, var_43_arg_0=0, var_43_arg_1=3, var_44=2147483652, var_44_arg_0=0, var_44_arg_1=2147483652, var_44_arg_2=2147483652, var_46=2, var_47=0, var_47_arg_0=0, var_48=1, var_48_arg_0=0, var_48_arg_1=0, var_49=2147483652, var_49_arg_0=1, var_49_arg_1=2147483652, var_49_arg_2=2147483652, var_51=1, var_52=1, var_52_arg_0=1, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54=2147483652, var_54_arg_0=0, var_54_arg_1=2147483652, var_54_arg_2=2147483652, var_56=0, var_56_arg_0=0, var_57=0, var_57_arg_0=0, var_58=0, var_58_arg_0=0, var_58_arg_1=2147483652, var_58_arg_2=2147483652, var_61=0, var_61_arg_0=0, var_62=3, var_62_arg_0=0, var_64=9, var_65=0, var_65_arg_0=0, var_66=1, var_66_arg_0=0, var_66_arg_1=0, var_70=1, var_70_arg_0=255, var_71=10, var_71_arg_0=37, var_71_arg_1=1, var_73=0, var_73_arg_0=0, var_74=0, var_74_arg_0=10, var_74_arg_1=0, var_75=255, var_75_arg_0=37, var_76=0, var_76_arg_0=0, var_76_arg_1=255, var_77=0, var_77_arg_0=0, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_79=255, var_79_arg_0=255, var_80=1, var_80_arg_0=0, var_80_arg_1=255, var_81=0, var_82=1, var_82_arg_0=0, var_82_arg_1=0, var_82_arg_2=1, var_83=1, var_83_arg_0=1, var_84=255, var_84_arg_0=1, var_85=0, var_85_arg_0=0, var_85_arg_1=255, var_86=2, var_86_arg_0=0, var_88=1, var_88_arg_0=0, var_88_arg_1=0, var_89=1, var_89_arg_0=2, var_89_arg_1=1, var_93=1, var_93_arg_0=0, var_93_arg_1=0, var_94=255, var_94_arg_0=1, var_95=21, var_95_arg_0=1, var_95_arg_1=255, var_97=11, var_97_arg_0=1, var_98=8, var_98_arg_0=0, var_99=11, var_99_arg_0=11, var_99_arg_1=8] [L107] CALL assume_abort_if_not(constr_96_arg_0) VAL [unknown-#in~cond-unknown=21] [L21] COND FALSE !(!cond) [L107] RET assume_abort_if_not(constr_96_arg_0) VAL [bad_115_arg_0=0, constr_102_arg_0=18, constr_108_arg_0=19, constr_96_arg_0=21, init_92_arg_1=1, input_109=12, input_2=5, input_4=2147483658, input_5=251, input_6=17, input_7=0, input_8=6, input_9=2147483657, mask_SORT_1=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_3=4294967295, mask_SORT_40=3, msb_SORT_1=1, msb_SORT_11=16, msb_SORT_13=8, msb_SORT_19=4, msb_SORT_3=2147483648, msb_SORT_40=2, next_270_arg_1=2147483657, next_273_arg_1=1, next_276_arg_1=2147483657, next_279_arg_1=2147483657, next_282_arg_1=2147483657, next_285_arg_1=2147483652, next_288_arg_1=2147483652, next_291_arg_1=2147483652, next_294_arg_1=2147483652, next_297_arg_1=2147483652, next_303_arg_1=236, next_306_arg_1=37, next_309_arg_1=255, next_312_arg_1=16, next_315_arg_1=0, next_316_arg_1=0, next_319_arg_1=14, state_10=2147483657, state_12=1, state_136=14, state_18=2147483657, state_24=2147483657, state_29=2147483657, state_34=2147483652, state_39=2147483652, state_45=2147483652, state_50=2147483652, state_55=2147483652, state_60=236, state_68=37, state_69=255, state_72=16, state_87=0, state_91=0, var_100=11, var_100_arg_0=1, var_101=18, var_101_arg_0=11, var_101_arg_1=11, var_103=255, var_103_arg_0=3, var_104=255, var_104_arg_0=20, var_105=255, var_105_arg_0=255, var_105_arg_1=255, var_106=1, var_106_arg_0=1, var_107=19, var_107_arg_0=255, var_107_arg_1=1, var_110=1, var_110_arg_0=1, var_110_arg_1=1, var_110_arg_2=1, var_111=0, var_112=0, var_112_arg_0=1, var_112_arg_1=0, var_112_arg_2=1, var_113=255, var_113_arg_0=1, var_114=0, var_114_arg_0=0, var_114_arg_1=255, var_119=20, var_119_arg_0=0, var_119_arg_1=20, var_120=0, var_120_arg_0=20, var_120_arg_1=0, var_137=7, var_137_arg_0=14, var_138=1, var_138_arg_0=7, var_139=255, var_139_arg_0=1, var_14=0, var_140=0, var_140_arg_0=0, var_140_arg_1=255, var_145=1, var_145_arg_0=1, var_146=0, var_146_arg_0=7, var_146_arg_1=1, var_147=0, var_147_arg_0=0, var_147_arg_1=0, var_14_arg_0=1, var_15=8, var_152=0, var_152_arg_0=0, var_153=0, var_153_arg_0=7, var_153_arg_1=0, var_154=0, var_154_arg_0=0, var_154_arg_1=0, var_159=3, var_159_arg_0=3, var_16=0, var_160=0, var_160_arg_0=7, var_160_arg_1=3, var_161=0, var_161_arg_0=0, var_161_arg_1=0, var_166=0, var_166_arg_0=0, var_167=0, var_167_arg_0=7, var_167_arg_1=0, var_168=0, var_168_arg_0=0, var_168_arg_1=0, var_16_arg_0=0, var_16_arg_1=8, var_17=2147483657, var_173=5, var_173_arg_0=5, var_174=0, var_174_arg_0=7, var_174_arg_1=5, var_175=0, var_175_arg_0=0, var_175_arg_1=0, var_17_arg_0=0, var_17_arg_1=2147483657, var_17_arg_2=2147483657, var_180=7, var_180_arg_0=7, var_181=1, var_181_arg_0=7, var_181_arg_1=7, var_182=0, var_182_arg_0=0, var_182_arg_1=1, var_187=7, var_187_arg_0=7, var_188=1, var_188_arg_0=7, var_188_arg_1=7, var_189=0, var_189_arg_0=0, var_189_arg_1=1, var_194=0, var_194_arg_0=7, var_194_arg_1=8, var_195=0, var_195_arg_0=0, var_195_arg_1=0, var_198=0, var_198_arg_0=0, var_199=1, var_199_arg_0=1, var_199_arg_1=0, var_20=7, var_204=0, var_204_arg_0=0, var_205=14, var_205_arg_0=14, var_205_arg_1=0, var_21=7, var_21_arg_0=7, var_22=0, var_224=0, var_224_arg_0=0, var_224_arg_1=0, var_225=37, var_225_arg_0=37, var_225_arg_1=0, var_228=0, var_228_arg_0=37, var_22_arg_0=0, var_22_arg_1=7, var_23=2147483657, var_233=0, var_233_arg_0=0, var_233_arg_1=0, var_236=255, var_236_arg_0=0, var_236_arg_1=255, var_23_arg_0=0, var_23_arg_1=2147483657, var_23_arg_2=2147483657, var_248=20, var_248_arg_0=0, var_248_arg_1=20, var_249=20, var_249_arg_0=20, var_249_arg_1=0, var_25=6, var_250=1, var_250_arg_0=20, var_250_arg_1=37, var_26=250, var_267=2147483657, var_267_arg_0=0, var_267_arg_1=2147483652, var_267_arg_2=2147483657, var_268=0, var_269=2147483657, var_269_arg_0=0, var_269_arg_1=0, var_269_arg_2=2147483657, var_26_arg_0=250, var_27=0, var_271=1, var_271_arg_0=0, var_271_arg_1=1, var_271_arg_2=1, var_272=1, var_272_arg_0=0, var_272_arg_1=0, var_272_arg_2=1, var_274=2147483657, var_274_arg_0=0, var_274_arg_1=2147483652, var_274_arg_2=2147483657, var_275=2147483657, var_275_arg_0=0, var_275_arg_1=0, var_275_arg_2=2147483657, var_277=2147483657, var_277_arg_0=0, var_277_arg_1=2147483652, var_277_arg_2=2147483657, var_278=2147483657, var_278_arg_0=0, var_278_arg_1=0, var_278_arg_2=2147483657, var_27_arg_0=0, var_27_arg_1=250, var_28=2147483657, var_280=2147483657, var_280_arg_0=0, var_280_arg_1=2147483652, var_280_arg_2=2147483657, var_281=2147483657, var_281_arg_0=0, var_281_arg_1=0, var_281_arg_2=2147483657, var_283=2147483652, var_283_arg_0=0, var_283_arg_1=2147483652, var_283_arg_2=2147483652, var_284=2147483652, var_284_arg_0=0, var_284_arg_1=0, var_284_arg_2=2147483652, var_286=2147483652, var_286_arg_0=0, var_286_arg_1=2147483652, var_286_arg_2=2147483652, var_287=2147483652, var_287_arg_0=0, var_287_arg_1=0, var_287_arg_2=2147483652, var_289=2147483652, var_289_arg_0=0, var_289_arg_1=2147483652, var_289_arg_2=2147483652, var_28_arg_0=0, var_28_arg_1=2147483657, var_28_arg_2=2147483657, var_290=2147483652, var_290_arg_0=0, var_290_arg_1=0, var_290_arg_2=2147483652, var_292=2147483652, var_292_arg_0=0, var_292_arg_1=2147483652, var_292_arg_2=2147483652, var_293=2147483652, var_293_arg_0=0, var_293_arg_1=0, var_293_arg_2=2147483652, var_295=2147483652, var_295_arg_0=0, var_295_arg_1=2147483652, var_295_arg_2=2147483652, var_296=2147483652, var_296_arg_0=0, var_296_arg_1=0, var_296_arg_2=2147483652, var_298=0, var_298_arg_0=0, var_299=0, var_299_arg_0=0, var_299_arg_1=0, var_30=5, var_300=20, var_300_arg_0=20, var_301=236, var_301_arg_0=0, var_301_arg_1=20, var_302=236, var_302_arg_0=0, var_302_arg_1=0, var_302_arg_2=236, var_304=37, var_304_arg_0=0, var_304_arg_1=37, var_304_arg_2=37, var_305=37, var_305_arg_0=0, var_305_arg_1=0, var_305_arg_2=37, var_307=255, var_307_arg_0=1, var_307_arg_1=255, var_307_arg_2=255, var_308=255, var_308_arg_0=0, var_308_arg_1=0, var_308_arg_2=255, var_31=5, var_310=1, var_310_arg_0=1, var_310_arg_1=1, var_310_arg_2=0, var_311=16, var_311_arg_0=0, var_311_arg_1=0, var_311_arg_2=1, var_313=0, var_313_arg_0=0, var_313_arg_1=2147483652, var_313_arg_2=0, var_314=0, var_314_arg_0=0, var_314_arg_1=0, var_314_arg_2=0, var_317=14, var_317_arg_0=0, var_317_arg_1=14, var_317_arg_2=14, var_318=14, var_318_arg_0=0, var_318_arg_1=0, var_318_arg_2=14, var_31_arg_0=5, var_32=0, var_32_arg_0=0, var_32_arg_1=5, var_33=2147483657, var_33_arg_0=0, var_33_arg_1=2147483657, var_33_arg_2=2147483657, var_35=4, var_36=0, var_36_arg_0=0, var_37=1, var_37_arg_0=0, var_37_arg_1=0, var_38=2147483652, var_38_arg_0=1, var_38_arg_1=2147483652, var_38_arg_2=2147483657, var_41=3, var_42=3, var_42_arg_0=3, var_43=0, var_43_arg_0=0, var_43_arg_1=3, var_44=2147483652, var_44_arg_0=0, var_44_arg_1=2147483652, var_44_arg_2=2147483652, var_46=2, var_47=0, var_47_arg_0=0, var_48=1, var_48_arg_0=0, var_48_arg_1=0, var_49=2147483652, var_49_arg_0=1, var_49_arg_1=2147483652, var_49_arg_2=2147483652, var_51=1, var_52=1, var_52_arg_0=1, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54=2147483652, var_54_arg_0=0, var_54_arg_1=2147483652, var_54_arg_2=2147483652, var_56=0, var_56_arg_0=0, var_57=0, var_57_arg_0=0, var_58=0, var_58_arg_0=0, var_58_arg_1=2147483652, var_58_arg_2=2147483652, var_61=0, var_61_arg_0=0, var_62=3, var_62_arg_0=0, var_64=9, var_65=0, var_65_arg_0=0, var_66=1, var_66_arg_0=0, var_66_arg_1=0, var_70=1, var_70_arg_0=255, var_71=10, var_71_arg_0=37, var_71_arg_1=1, var_73=0, var_73_arg_0=0, var_74=0, var_74_arg_0=10, var_74_arg_1=0, var_75=255, var_75_arg_0=37, var_76=0, var_76_arg_0=0, var_76_arg_1=255, var_77=0, var_77_arg_0=0, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_79=255, var_79_arg_0=255, var_80=1, var_80_arg_0=0, var_80_arg_1=255, var_81=0, var_82=1, var_82_arg_0=0, var_82_arg_1=0, var_82_arg_2=1, var_83=1, var_83_arg_0=1, var_84=255, var_84_arg_0=1, var_85=0, var_85_arg_0=0, var_85_arg_1=255, var_86=2, var_86_arg_0=0, var_88=1, var_88_arg_0=0, var_88_arg_1=0, var_89=1, var_89_arg_0=2, var_89_arg_1=1, var_93=1, var_93_arg_0=0, var_93_arg_1=0, var_94=255, var_94_arg_0=1, var_95=21, var_95_arg_0=1, var_95_arg_1=255, var_97=11, var_97_arg_0=1, var_98=8, var_98_arg_0=0, var_99=11, var_99_arg_0=11, var_99_arg_1=8] [L108] SORT_13 var_65_arg_0 = var_64; [L109] var_65_arg_0 = var_65_arg_0 & mask_SORT_13 [L110] SORT_11 var_65 = var_65_arg_0; [L111] SORT_11 var_66_arg_0 = state_60; [L112] SORT_11 var_66_arg_1 = var_65; [L113] SORT_1 var_66 = var_66_arg_0 == var_66_arg_1; [L114] SORT_1 var_97_arg_0 = var_66; [L115] SORT_1 var_97 = ~var_97_arg_0; [L116] SORT_1 var_98_arg_0 = input_6; [L117] SORT_1 var_98 = ~var_98_arg_0; [L118] SORT_1 var_99_arg_0 = var_97; [L119] SORT_1 var_99_arg_1 = var_98; [L120] SORT_1 var_99 = var_99_arg_0 | var_99_arg_1; [L121] SORT_1 var_100_arg_0 = var_51; [L122] SORT_1 var_100 = ~var_100_arg_0; [L123] SORT_1 var_101_arg_0 = var_99; [L124] SORT_1 var_101_arg_1 = var_100; [L125] SORT_1 var_101 = var_101_arg_0 | var_101_arg_1; [L126] var_101 = var_101 & mask_SORT_1 [L127] SORT_1 constr_102_arg_0 = var_101; VAL [bad_115_arg_0=0, constr_102_arg_0=13, constr_108_arg_0=19, constr_96_arg_0=21, init_92_arg_1=1, input_109=12, input_2=5, input_4=2147483658, input_5=251, input_6=17, input_7=0, input_8=6, input_9=2147483657, mask_SORT_1=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_3=4294967295, mask_SORT_40=3, msb_SORT_1=1, msb_SORT_11=16, msb_SORT_13=8, msb_SORT_19=4, msb_SORT_3=2147483648, msb_SORT_40=2, next_270_arg_1=2147483657, next_273_arg_1=1, next_276_arg_1=2147483657, next_279_arg_1=2147483657, next_282_arg_1=2147483657, next_285_arg_1=2147483652, next_288_arg_1=2147483652, next_291_arg_1=2147483652, next_294_arg_1=2147483652, next_297_arg_1=2147483652, next_303_arg_1=236, next_306_arg_1=37, next_309_arg_1=255, next_312_arg_1=16, next_315_arg_1=0, next_316_arg_1=0, next_319_arg_1=14, state_10=2147483657, state_12=1, state_136=14, state_18=2147483657, state_24=2147483657, state_29=2147483657, state_34=2147483652, state_39=2147483652, state_45=2147483652, state_50=2147483652, state_55=2147483652, state_60=236, state_68=37, state_69=255, state_72=16, state_87=0, state_91=0, var_100=13, var_100_arg_0=1, var_101=13, var_101_arg_0=24, var_101_arg_1=13, var_103=255, var_103_arg_0=3, var_104=255, var_104_arg_0=20, var_105=255, var_105_arg_0=255, var_105_arg_1=255, var_106=1, var_106_arg_0=1, var_107=19, var_107_arg_0=255, var_107_arg_1=1, var_110=1, var_110_arg_0=1, var_110_arg_1=1, var_110_arg_2=1, var_111=0, var_112=0, var_112_arg_0=1, var_112_arg_1=0, var_112_arg_2=1, var_113=255, var_113_arg_0=1, var_114=0, var_114_arg_0=0, var_114_arg_1=255, var_119=20, var_119_arg_0=0, var_119_arg_1=20, var_120=0, var_120_arg_0=20, var_120_arg_1=0, var_137=7, var_137_arg_0=14, var_138=1, var_138_arg_0=7, var_139=255, var_139_arg_0=1, var_14=0, var_140=0, var_140_arg_0=0, var_140_arg_1=255, var_145=1, var_145_arg_0=1, var_146=0, var_146_arg_0=7, var_146_arg_1=1, var_147=0, var_147_arg_0=0, var_147_arg_1=0, var_14_arg_0=1, var_15=8, var_152=0, var_152_arg_0=0, var_153=0, var_153_arg_0=7, var_153_arg_1=0, var_154=0, var_154_arg_0=0, var_154_arg_1=0, var_159=3, var_159_arg_0=3, var_16=0, var_160=0, var_160_arg_0=7, var_160_arg_1=3, var_161=0, var_161_arg_0=0, var_161_arg_1=0, var_166=0, var_166_arg_0=0, var_167=0, var_167_arg_0=7, var_167_arg_1=0, var_168=0, var_168_arg_0=0, var_168_arg_1=0, var_16_arg_0=0, var_16_arg_1=8, var_17=2147483657, var_173=5, var_173_arg_0=5, var_174=0, var_174_arg_0=7, var_174_arg_1=5, var_175=0, var_175_arg_0=0, var_175_arg_1=0, var_17_arg_0=0, var_17_arg_1=2147483657, var_17_arg_2=2147483657, var_180=7, var_180_arg_0=7, var_181=1, var_181_arg_0=7, var_181_arg_1=7, var_182=0, var_182_arg_0=0, var_182_arg_1=1, var_187=7, var_187_arg_0=7, var_188=1, var_188_arg_0=7, var_188_arg_1=7, var_189=0, var_189_arg_0=0, var_189_arg_1=1, var_194=0, var_194_arg_0=7, var_194_arg_1=8, var_195=0, var_195_arg_0=0, var_195_arg_1=0, var_198=0, var_198_arg_0=0, var_199=1, var_199_arg_0=1, var_199_arg_1=0, var_20=7, var_204=0, var_204_arg_0=0, var_205=14, var_205_arg_0=14, var_205_arg_1=0, var_21=7, var_21_arg_0=7, var_22=0, var_224=0, var_224_arg_0=0, var_224_arg_1=0, var_225=37, var_225_arg_0=37, var_225_arg_1=0, var_228=0, var_228_arg_0=37, var_22_arg_0=0, var_22_arg_1=7, var_23=2147483657, var_233=0, var_233_arg_0=0, var_233_arg_1=0, var_236=255, var_236_arg_0=0, var_236_arg_1=255, var_23_arg_0=0, var_23_arg_1=2147483657, var_23_arg_2=2147483657, var_248=20, var_248_arg_0=0, var_248_arg_1=20, var_249=20, var_249_arg_0=20, var_249_arg_1=0, var_25=6, var_250=1, var_250_arg_0=20, var_250_arg_1=37, var_26=250, var_267=2147483657, var_267_arg_0=0, var_267_arg_1=2147483652, var_267_arg_2=2147483657, var_268=0, var_269=2147483657, var_269_arg_0=0, var_269_arg_1=0, var_269_arg_2=2147483657, var_26_arg_0=250, var_27=0, var_271=1, var_271_arg_0=0, var_271_arg_1=1, var_271_arg_2=1, var_272=1, var_272_arg_0=0, var_272_arg_1=0, var_272_arg_2=1, var_274=2147483657, var_274_arg_0=0, var_274_arg_1=2147483652, var_274_arg_2=2147483657, var_275=2147483657, var_275_arg_0=0, var_275_arg_1=0, var_275_arg_2=2147483657, var_277=2147483657, var_277_arg_0=0, var_277_arg_1=2147483652, var_277_arg_2=2147483657, var_278=2147483657, var_278_arg_0=0, var_278_arg_1=0, var_278_arg_2=2147483657, var_27_arg_0=0, var_27_arg_1=250, var_28=2147483657, var_280=2147483657, var_280_arg_0=0, var_280_arg_1=2147483652, var_280_arg_2=2147483657, var_281=2147483657, var_281_arg_0=0, var_281_arg_1=0, var_281_arg_2=2147483657, var_283=2147483652, var_283_arg_0=0, var_283_arg_1=2147483652, var_283_arg_2=2147483652, var_284=2147483652, var_284_arg_0=0, var_284_arg_1=0, var_284_arg_2=2147483652, var_286=2147483652, var_286_arg_0=0, var_286_arg_1=2147483652, var_286_arg_2=2147483652, var_287=2147483652, var_287_arg_0=0, var_287_arg_1=0, var_287_arg_2=2147483652, var_289=2147483652, var_289_arg_0=0, var_289_arg_1=2147483652, var_289_arg_2=2147483652, var_28_arg_0=0, var_28_arg_1=2147483657, var_28_arg_2=2147483657, var_290=2147483652, var_290_arg_0=0, var_290_arg_1=0, var_290_arg_2=2147483652, var_292=2147483652, var_292_arg_0=0, var_292_arg_1=2147483652, var_292_arg_2=2147483652, var_293=2147483652, var_293_arg_0=0, var_293_arg_1=0, var_293_arg_2=2147483652, var_295=2147483652, var_295_arg_0=0, var_295_arg_1=2147483652, var_295_arg_2=2147483652, var_296=2147483652, var_296_arg_0=0, var_296_arg_1=0, var_296_arg_2=2147483652, var_298=0, var_298_arg_0=0, var_299=0, var_299_arg_0=0, var_299_arg_1=0, var_30=5, var_300=20, var_300_arg_0=20, var_301=236, var_301_arg_0=0, var_301_arg_1=20, var_302=236, var_302_arg_0=0, var_302_arg_1=0, var_302_arg_2=236, var_304=37, var_304_arg_0=0, var_304_arg_1=37, var_304_arg_2=37, var_305=37, var_305_arg_0=0, var_305_arg_1=0, var_305_arg_2=37, var_307=255, var_307_arg_0=1, var_307_arg_1=255, var_307_arg_2=255, var_308=255, var_308_arg_0=0, var_308_arg_1=0, var_308_arg_2=255, var_31=5, var_310=1, var_310_arg_0=1, var_310_arg_1=1, var_310_arg_2=0, var_311=16, var_311_arg_0=0, var_311_arg_1=0, var_311_arg_2=1, var_313=0, var_313_arg_0=0, var_313_arg_1=2147483652, var_313_arg_2=0, var_314=0, var_314_arg_0=0, var_314_arg_1=0, var_314_arg_2=0, var_317=14, var_317_arg_0=0, var_317_arg_1=14, var_317_arg_2=14, var_318=14, var_318_arg_0=0, var_318_arg_1=0, var_318_arg_2=14, var_31_arg_0=5, var_32=0, var_32_arg_0=0, var_32_arg_1=5, var_33=2147483657, var_33_arg_0=0, var_33_arg_1=2147483657, var_33_arg_2=2147483657, var_35=4, var_36=0, var_36_arg_0=0, var_37=1, var_37_arg_0=0, var_37_arg_1=0, var_38=2147483652, var_38_arg_0=1, var_38_arg_1=2147483652, var_38_arg_2=2147483657, var_41=3, var_42=3, var_42_arg_0=3, var_43=0, var_43_arg_0=0, var_43_arg_1=3, var_44=2147483652, var_44_arg_0=0, var_44_arg_1=2147483652, var_44_arg_2=2147483652, var_46=2, var_47=0, var_47_arg_0=0, var_48=1, var_48_arg_0=0, var_48_arg_1=0, var_49=2147483652, var_49_arg_0=1, var_49_arg_1=2147483652, var_49_arg_2=2147483652, var_51=1, var_52=1, var_52_arg_0=1, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54=2147483652, var_54_arg_0=0, var_54_arg_1=2147483652, var_54_arg_2=2147483652, var_56=0, var_56_arg_0=0, var_57=0, var_57_arg_0=0, var_58=0, var_58_arg_0=0, var_58_arg_1=2147483652, var_58_arg_2=2147483652, var_61=0, var_61_arg_0=0, var_62=3, var_62_arg_0=0, var_64=9, var_65=0, var_65_arg_0=0, var_66=0, var_66_arg_0=236, var_66_arg_1=0, var_70=1, var_70_arg_0=255, var_71=10, var_71_arg_0=37, var_71_arg_1=1, var_73=0, var_73_arg_0=0, var_74=0, var_74_arg_0=10, var_74_arg_1=0, var_75=255, var_75_arg_0=37, var_76=0, var_76_arg_0=0, var_76_arg_1=255, var_77=0, var_77_arg_0=0, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_79=255, var_79_arg_0=255, var_80=1, var_80_arg_0=0, var_80_arg_1=255, var_81=0, var_82=1, var_82_arg_0=0, var_82_arg_1=0, var_82_arg_2=1, var_83=1, var_83_arg_0=1, var_84=255, var_84_arg_0=1, var_85=0, var_85_arg_0=0, var_85_arg_1=255, var_86=2, var_86_arg_0=0, var_88=1, var_88_arg_0=0, var_88_arg_1=0, var_89=1, var_89_arg_0=2, var_89_arg_1=1, var_93=1, var_93_arg_0=0, var_93_arg_1=0, var_94=255, var_94_arg_0=1, var_95=21, var_95_arg_0=1, var_95_arg_1=255, var_97=24, var_97_arg_0=0, var_98=24, var_98_arg_0=17, var_99=24, var_99_arg_0=24, var_99_arg_1=24] [L128] CALL assume_abort_if_not(constr_102_arg_0) VAL [unknown-#in~cond-unknown=13] [L21] COND FALSE !(!cond) [L128] RET assume_abort_if_not(constr_102_arg_0) VAL [bad_115_arg_0=0, constr_102_arg_0=13, constr_108_arg_0=19, constr_96_arg_0=21, init_92_arg_1=1, input_109=12, input_2=5, input_4=2147483658, input_5=251, input_6=17, input_7=0, input_8=6, input_9=2147483657, mask_SORT_1=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_3=4294967295, mask_SORT_40=3, msb_SORT_1=1, msb_SORT_11=16, msb_SORT_13=8, msb_SORT_19=4, msb_SORT_3=2147483648, msb_SORT_40=2, next_270_arg_1=2147483657, next_273_arg_1=1, next_276_arg_1=2147483657, next_279_arg_1=2147483657, next_282_arg_1=2147483657, next_285_arg_1=2147483652, next_288_arg_1=2147483652, next_291_arg_1=2147483652, next_294_arg_1=2147483652, next_297_arg_1=2147483652, next_303_arg_1=236, next_306_arg_1=37, next_309_arg_1=255, next_312_arg_1=16, next_315_arg_1=0, next_316_arg_1=0, next_319_arg_1=14, state_10=2147483657, state_12=1, state_136=14, state_18=2147483657, state_24=2147483657, state_29=2147483657, state_34=2147483652, state_39=2147483652, state_45=2147483652, state_50=2147483652, state_55=2147483652, state_60=236, state_68=37, state_69=255, state_72=16, state_87=0, state_91=0, var_100=13, var_100_arg_0=1, var_101=13, var_101_arg_0=24, var_101_arg_1=13, var_103=255, var_103_arg_0=3, var_104=255, var_104_arg_0=20, var_105=255, var_105_arg_0=255, var_105_arg_1=255, var_106=1, var_106_arg_0=1, var_107=19, var_107_arg_0=255, var_107_arg_1=1, var_110=1, var_110_arg_0=1, var_110_arg_1=1, var_110_arg_2=1, var_111=0, var_112=0, var_112_arg_0=1, var_112_arg_1=0, var_112_arg_2=1, var_113=255, var_113_arg_0=1, var_114=0, var_114_arg_0=0, var_114_arg_1=255, var_119=20, var_119_arg_0=0, var_119_arg_1=20, var_120=0, var_120_arg_0=20, var_120_arg_1=0, var_137=7, var_137_arg_0=14, var_138=1, var_138_arg_0=7, var_139=255, var_139_arg_0=1, var_14=0, var_140=0, var_140_arg_0=0, var_140_arg_1=255, var_145=1, var_145_arg_0=1, var_146=0, var_146_arg_0=7, var_146_arg_1=1, var_147=0, var_147_arg_0=0, var_147_arg_1=0, var_14_arg_0=1, var_15=8, var_152=0, var_152_arg_0=0, var_153=0, var_153_arg_0=7, var_153_arg_1=0, var_154=0, var_154_arg_0=0, var_154_arg_1=0, var_159=3, var_159_arg_0=3, var_16=0, var_160=0, var_160_arg_0=7, var_160_arg_1=3, var_161=0, var_161_arg_0=0, var_161_arg_1=0, var_166=0, var_166_arg_0=0, var_167=0, var_167_arg_0=7, var_167_arg_1=0, var_168=0, var_168_arg_0=0, var_168_arg_1=0, var_16_arg_0=0, var_16_arg_1=8, var_17=2147483657, var_173=5, var_173_arg_0=5, var_174=0, var_174_arg_0=7, var_174_arg_1=5, var_175=0, var_175_arg_0=0, var_175_arg_1=0, var_17_arg_0=0, var_17_arg_1=2147483657, var_17_arg_2=2147483657, var_180=7, var_180_arg_0=7, var_181=1, var_181_arg_0=7, var_181_arg_1=7, var_182=0, var_182_arg_0=0, var_182_arg_1=1, var_187=7, var_187_arg_0=7, var_188=1, var_188_arg_0=7, var_188_arg_1=7, var_189=0, var_189_arg_0=0, var_189_arg_1=1, var_194=0, var_194_arg_0=7, var_194_arg_1=8, var_195=0, var_195_arg_0=0, var_195_arg_1=0, var_198=0, var_198_arg_0=0, var_199=1, var_199_arg_0=1, var_199_arg_1=0, var_20=7, var_204=0, var_204_arg_0=0, var_205=14, var_205_arg_0=14, var_205_arg_1=0, var_21=7, var_21_arg_0=7, var_22=0, var_224=0, var_224_arg_0=0, var_224_arg_1=0, var_225=37, var_225_arg_0=37, var_225_arg_1=0, var_228=0, var_228_arg_0=37, var_22_arg_0=0, var_22_arg_1=7, var_23=2147483657, var_233=0, var_233_arg_0=0, var_233_arg_1=0, var_236=255, var_236_arg_0=0, var_236_arg_1=255, var_23_arg_0=0, var_23_arg_1=2147483657, var_23_arg_2=2147483657, var_248=20, var_248_arg_0=0, var_248_arg_1=20, var_249=20, var_249_arg_0=20, var_249_arg_1=0, var_25=6, var_250=1, var_250_arg_0=20, var_250_arg_1=37, var_26=250, var_267=2147483657, var_267_arg_0=0, var_267_arg_1=2147483652, var_267_arg_2=2147483657, var_268=0, var_269=2147483657, var_269_arg_0=0, var_269_arg_1=0, var_269_arg_2=2147483657, var_26_arg_0=250, var_27=0, var_271=1, var_271_arg_0=0, var_271_arg_1=1, var_271_arg_2=1, var_272=1, var_272_arg_0=0, var_272_arg_1=0, var_272_arg_2=1, var_274=2147483657, var_274_arg_0=0, var_274_arg_1=2147483652, var_274_arg_2=2147483657, var_275=2147483657, var_275_arg_0=0, var_275_arg_1=0, var_275_arg_2=2147483657, var_277=2147483657, var_277_arg_0=0, var_277_arg_1=2147483652, var_277_arg_2=2147483657, var_278=2147483657, var_278_arg_0=0, var_278_arg_1=0, var_278_arg_2=2147483657, var_27_arg_0=0, var_27_arg_1=250, var_28=2147483657, var_280=2147483657, var_280_arg_0=0, var_280_arg_1=2147483652, var_280_arg_2=2147483657, var_281=2147483657, var_281_arg_0=0, var_281_arg_1=0, var_281_arg_2=2147483657, var_283=2147483652, var_283_arg_0=0, var_283_arg_1=2147483652, var_283_arg_2=2147483652, var_284=2147483652, var_284_arg_0=0, var_284_arg_1=0, var_284_arg_2=2147483652, var_286=2147483652, var_286_arg_0=0, var_286_arg_1=2147483652, var_286_arg_2=2147483652, var_287=2147483652, var_287_arg_0=0, var_287_arg_1=0, var_287_arg_2=2147483652, var_289=2147483652, var_289_arg_0=0, var_289_arg_1=2147483652, var_289_arg_2=2147483652, var_28_arg_0=0, var_28_arg_1=2147483657, var_28_arg_2=2147483657, var_290=2147483652, var_290_arg_0=0, var_290_arg_1=0, var_290_arg_2=2147483652, var_292=2147483652, var_292_arg_0=0, var_292_arg_1=2147483652, var_292_arg_2=2147483652, var_293=2147483652, var_293_arg_0=0, var_293_arg_1=0, var_293_arg_2=2147483652, var_295=2147483652, var_295_arg_0=0, var_295_arg_1=2147483652, var_295_arg_2=2147483652, var_296=2147483652, var_296_arg_0=0, var_296_arg_1=0, var_296_arg_2=2147483652, var_298=0, var_298_arg_0=0, var_299=0, var_299_arg_0=0, var_299_arg_1=0, var_30=5, var_300=20, var_300_arg_0=20, var_301=236, var_301_arg_0=0, var_301_arg_1=20, var_302=236, var_302_arg_0=0, var_302_arg_1=0, var_302_arg_2=236, var_304=37, var_304_arg_0=0, var_304_arg_1=37, var_304_arg_2=37, var_305=37, var_305_arg_0=0, var_305_arg_1=0, var_305_arg_2=37, var_307=255, var_307_arg_0=1, var_307_arg_1=255, var_307_arg_2=255, var_308=255, var_308_arg_0=0, var_308_arg_1=0, var_308_arg_2=255, var_31=5, var_310=1, var_310_arg_0=1, var_310_arg_1=1, var_310_arg_2=0, var_311=16, var_311_arg_0=0, var_311_arg_1=0, var_311_arg_2=1, var_313=0, var_313_arg_0=0, var_313_arg_1=2147483652, var_313_arg_2=0, var_314=0, var_314_arg_0=0, var_314_arg_1=0, var_314_arg_2=0, var_317=14, var_317_arg_0=0, var_317_arg_1=14, var_317_arg_2=14, var_318=14, var_318_arg_0=0, var_318_arg_1=0, var_318_arg_2=14, var_31_arg_0=5, var_32=0, var_32_arg_0=0, var_32_arg_1=5, var_33=2147483657, var_33_arg_0=0, var_33_arg_1=2147483657, var_33_arg_2=2147483657, var_35=4, var_36=0, var_36_arg_0=0, var_37=1, var_37_arg_0=0, var_37_arg_1=0, var_38=2147483652, var_38_arg_0=1, var_38_arg_1=2147483652, var_38_arg_2=2147483657, var_41=3, var_42=3, var_42_arg_0=3, var_43=0, var_43_arg_0=0, var_43_arg_1=3, var_44=2147483652, var_44_arg_0=0, var_44_arg_1=2147483652, var_44_arg_2=2147483652, var_46=2, var_47=0, var_47_arg_0=0, var_48=1, var_48_arg_0=0, var_48_arg_1=0, var_49=2147483652, var_49_arg_0=1, var_49_arg_1=2147483652, var_49_arg_2=2147483652, var_51=1, var_52=1, var_52_arg_0=1, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54=2147483652, var_54_arg_0=0, var_54_arg_1=2147483652, var_54_arg_2=2147483652, var_56=0, var_56_arg_0=0, var_57=0, var_57_arg_0=0, var_58=0, var_58_arg_0=0, var_58_arg_1=2147483652, var_58_arg_2=2147483652, var_61=0, var_61_arg_0=0, var_62=3, var_62_arg_0=0, var_64=9, var_65=0, var_65_arg_0=0, var_66=0, var_66_arg_0=236, var_66_arg_1=0, var_70=1, var_70_arg_0=255, var_71=10, var_71_arg_0=37, var_71_arg_1=1, var_73=0, var_73_arg_0=0, var_74=0, var_74_arg_0=10, var_74_arg_1=0, var_75=255, var_75_arg_0=37, var_76=0, var_76_arg_0=0, var_76_arg_1=255, var_77=0, var_77_arg_0=0, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_79=255, var_79_arg_0=255, var_80=1, var_80_arg_0=0, var_80_arg_1=255, var_81=0, var_82=1, var_82_arg_0=0, var_82_arg_1=0, var_82_arg_2=1, var_83=1, var_83_arg_0=1, var_84=255, var_84_arg_0=1, var_85=0, var_85_arg_0=0, var_85_arg_1=255, var_86=2, var_86_arg_0=0, var_88=1, var_88_arg_0=0, var_88_arg_1=0, var_89=1, var_89_arg_0=2, var_89_arg_1=1, var_93=1, var_93_arg_0=0, var_93_arg_1=0, var_94=255, var_94_arg_0=1, var_95=21, var_95_arg_0=1, var_95_arg_1=255, var_97=24, var_97_arg_0=0, var_98=24, var_98_arg_0=17, var_99=24, var_99_arg_0=24, var_99_arg_1=24] [L129] SORT_11 var_61_arg_0 = state_60; [L130] SORT_1 var_61 = var_61_arg_0 != 0; [L131] SORT_1 var_62_arg_0 = var_61; [L132] SORT_1 var_62 = ~var_62_arg_0; [L133] SORT_1 var_103_arg_0 = var_62; [L134] SORT_1 var_103 = ~var_103_arg_0; [L135] SORT_1 var_104_arg_0 = input_5; [L136] SORT_1 var_104 = ~var_104_arg_0; [L137] SORT_1 var_105_arg_0 = var_103; [L138] SORT_1 var_105_arg_1 = var_104; [L139] SORT_1 var_105 = var_105_arg_0 | var_105_arg_1; [L140] SORT_1 var_106_arg_0 = var_51; [L141] SORT_1 var_106 = ~var_106_arg_0; [L142] SORT_1 var_107_arg_0 = var_105; [L143] SORT_1 var_107_arg_1 = var_106; [L144] SORT_1 var_107 = var_107_arg_0 | var_107_arg_1; [L145] var_107 = var_107 & mask_SORT_1 [L146] SORT_1 constr_108_arg_0 = var_107; VAL [bad_115_arg_0=0, constr_102_arg_0=13, constr_108_arg_0=22, constr_96_arg_0=21, init_92_arg_1=1, input_109=12, input_2=5, input_4=2147483658, input_5=251, input_6=17, input_7=0, input_8=6, input_9=2147483657, mask_SORT_1=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_3=4294967295, mask_SORT_40=3, msb_SORT_1=1, msb_SORT_11=16, msb_SORT_13=8, msb_SORT_19=4, msb_SORT_3=2147483648, msb_SORT_40=2, next_270_arg_1=2147483657, next_273_arg_1=1, next_276_arg_1=2147483657, next_279_arg_1=2147483657, next_282_arg_1=2147483657, next_285_arg_1=2147483652, next_288_arg_1=2147483652, next_291_arg_1=2147483652, next_294_arg_1=2147483652, next_297_arg_1=2147483652, next_303_arg_1=236, next_306_arg_1=37, next_309_arg_1=255, next_312_arg_1=16, next_315_arg_1=0, next_316_arg_1=0, next_319_arg_1=14, state_10=2147483657, state_12=1, state_136=14, state_18=2147483657, state_24=2147483657, state_29=2147483657, state_34=2147483652, state_39=2147483652, state_45=2147483652, state_50=2147483652, state_55=2147483652, state_60=236, state_68=37, state_69=255, state_72=16, state_87=0, state_91=0, var_100=13, var_100_arg_0=1, var_101=13, var_101_arg_0=24, var_101_arg_1=13, var_103=0, var_103_arg_0=8, var_104=22, var_104_arg_0=251, var_105=22, var_105_arg_0=0, var_105_arg_1=22, var_106=22, var_106_arg_0=1, var_107=22, var_107_arg_0=22, var_107_arg_1=22, var_110=1, var_110_arg_0=1, var_110_arg_1=1, var_110_arg_2=1, var_111=0, var_112=0, var_112_arg_0=1, var_112_arg_1=0, var_112_arg_2=1, var_113=255, var_113_arg_0=1, var_114=0, var_114_arg_0=0, var_114_arg_1=255, var_119=20, var_119_arg_0=0, var_119_arg_1=20, var_120=0, var_120_arg_0=20, var_120_arg_1=0, var_137=7, var_137_arg_0=14, var_138=1, var_138_arg_0=7, var_139=255, var_139_arg_0=1, var_14=0, var_140=0, var_140_arg_0=0, var_140_arg_1=255, var_145=1, var_145_arg_0=1, var_146=0, var_146_arg_0=7, var_146_arg_1=1, var_147=0, var_147_arg_0=0, var_147_arg_1=0, var_14_arg_0=1, var_15=8, var_152=0, var_152_arg_0=0, var_153=0, var_153_arg_0=7, var_153_arg_1=0, var_154=0, var_154_arg_0=0, var_154_arg_1=0, var_159=3, var_159_arg_0=3, var_16=0, var_160=0, var_160_arg_0=7, var_160_arg_1=3, var_161=0, var_161_arg_0=0, var_161_arg_1=0, var_166=0, var_166_arg_0=0, var_167=0, var_167_arg_0=7, var_167_arg_1=0, var_168=0, var_168_arg_0=0, var_168_arg_1=0, var_16_arg_0=0, var_16_arg_1=8, var_17=2147483657, var_173=5, var_173_arg_0=5, var_174=0, var_174_arg_0=7, var_174_arg_1=5, var_175=0, var_175_arg_0=0, var_175_arg_1=0, var_17_arg_0=0, var_17_arg_1=2147483657, var_17_arg_2=2147483657, var_180=7, var_180_arg_0=7, var_181=1, var_181_arg_0=7, var_181_arg_1=7, var_182=0, var_182_arg_0=0, var_182_arg_1=1, var_187=7, var_187_arg_0=7, var_188=1, var_188_arg_0=7, var_188_arg_1=7, var_189=0, var_189_arg_0=0, var_189_arg_1=1, var_194=0, var_194_arg_0=7, var_194_arg_1=8, var_195=0, var_195_arg_0=0, var_195_arg_1=0, var_198=0, var_198_arg_0=0, var_199=1, var_199_arg_0=1, var_199_arg_1=0, var_20=7, var_204=0, var_204_arg_0=0, var_205=14, var_205_arg_0=14, var_205_arg_1=0, var_21=7, var_21_arg_0=7, var_22=0, var_224=0, var_224_arg_0=0, var_224_arg_1=0, var_225=37, var_225_arg_0=37, var_225_arg_1=0, var_228=0, var_228_arg_0=37, var_22_arg_0=0, var_22_arg_1=7, var_23=2147483657, var_233=0, var_233_arg_0=0, var_233_arg_1=0, var_236=255, var_236_arg_0=0, var_236_arg_1=255, var_23_arg_0=0, var_23_arg_1=2147483657, var_23_arg_2=2147483657, var_248=20, var_248_arg_0=0, var_248_arg_1=20, var_249=20, var_249_arg_0=20, var_249_arg_1=0, var_25=6, var_250=1, var_250_arg_0=20, var_250_arg_1=37, var_26=250, var_267=2147483657, var_267_arg_0=0, var_267_arg_1=2147483652, var_267_arg_2=2147483657, var_268=0, var_269=2147483657, var_269_arg_0=0, var_269_arg_1=0, var_269_arg_2=2147483657, var_26_arg_0=250, var_27=0, var_271=1, var_271_arg_0=0, var_271_arg_1=1, var_271_arg_2=1, var_272=1, var_272_arg_0=0, var_272_arg_1=0, var_272_arg_2=1, var_274=2147483657, var_274_arg_0=0, var_274_arg_1=2147483652, var_274_arg_2=2147483657, var_275=2147483657, var_275_arg_0=0, var_275_arg_1=0, var_275_arg_2=2147483657, var_277=2147483657, var_277_arg_0=0, var_277_arg_1=2147483652, var_277_arg_2=2147483657, var_278=2147483657, var_278_arg_0=0, var_278_arg_1=0, var_278_arg_2=2147483657, var_27_arg_0=0, var_27_arg_1=250, var_28=2147483657, var_280=2147483657, var_280_arg_0=0, var_280_arg_1=2147483652, var_280_arg_2=2147483657, var_281=2147483657, var_281_arg_0=0, var_281_arg_1=0, var_281_arg_2=2147483657, var_283=2147483652, var_283_arg_0=0, var_283_arg_1=2147483652, var_283_arg_2=2147483652, var_284=2147483652, var_284_arg_0=0, var_284_arg_1=0, var_284_arg_2=2147483652, var_286=2147483652, var_286_arg_0=0, var_286_arg_1=2147483652, var_286_arg_2=2147483652, var_287=2147483652, var_287_arg_0=0, var_287_arg_1=0, var_287_arg_2=2147483652, var_289=2147483652, var_289_arg_0=0, var_289_arg_1=2147483652, var_289_arg_2=2147483652, var_28_arg_0=0, var_28_arg_1=2147483657, var_28_arg_2=2147483657, var_290=2147483652, var_290_arg_0=0, var_290_arg_1=0, var_290_arg_2=2147483652, var_292=2147483652, var_292_arg_0=0, var_292_arg_1=2147483652, var_292_arg_2=2147483652, var_293=2147483652, var_293_arg_0=0, var_293_arg_1=0, var_293_arg_2=2147483652, var_295=2147483652, var_295_arg_0=0, var_295_arg_1=2147483652, var_295_arg_2=2147483652, var_296=2147483652, var_296_arg_0=0, var_296_arg_1=0, var_296_arg_2=2147483652, var_298=0, var_298_arg_0=0, var_299=0, var_299_arg_0=0, var_299_arg_1=0, var_30=5, var_300=20, var_300_arg_0=20, var_301=236, var_301_arg_0=0, var_301_arg_1=20, var_302=236, var_302_arg_0=0, var_302_arg_1=0, var_302_arg_2=236, var_304=37, var_304_arg_0=0, var_304_arg_1=37, var_304_arg_2=37, var_305=37, var_305_arg_0=0, var_305_arg_1=0, var_305_arg_2=37, var_307=255, var_307_arg_0=1, var_307_arg_1=255, var_307_arg_2=255, var_308=255, var_308_arg_0=0, var_308_arg_1=0, var_308_arg_2=255, var_31=5, var_310=1, var_310_arg_0=1, var_310_arg_1=1, var_310_arg_2=0, var_311=16, var_311_arg_0=0, var_311_arg_1=0, var_311_arg_2=1, var_313=0, var_313_arg_0=0, var_313_arg_1=2147483652, var_313_arg_2=0, var_314=0, var_314_arg_0=0, var_314_arg_1=0, var_314_arg_2=0, var_317=14, var_317_arg_0=0, var_317_arg_1=14, var_317_arg_2=14, var_318=14, var_318_arg_0=0, var_318_arg_1=0, var_318_arg_2=14, var_31_arg_0=5, var_32=0, var_32_arg_0=0, var_32_arg_1=5, var_33=2147483657, var_33_arg_0=0, var_33_arg_1=2147483657, var_33_arg_2=2147483657, var_35=4, var_36=0, var_36_arg_0=0, var_37=1, var_37_arg_0=0, var_37_arg_1=0, var_38=2147483652, var_38_arg_0=1, var_38_arg_1=2147483652, var_38_arg_2=2147483657, var_41=3, var_42=3, var_42_arg_0=3, var_43=0, var_43_arg_0=0, var_43_arg_1=3, var_44=2147483652, var_44_arg_0=0, var_44_arg_1=2147483652, var_44_arg_2=2147483652, var_46=2, var_47=0, var_47_arg_0=0, var_48=1, var_48_arg_0=0, var_48_arg_1=0, var_49=2147483652, var_49_arg_0=1, var_49_arg_1=2147483652, var_49_arg_2=2147483652, var_51=1, var_52=1, var_52_arg_0=1, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54=2147483652, var_54_arg_0=0, var_54_arg_1=2147483652, var_54_arg_2=2147483652, var_56=0, var_56_arg_0=0, var_57=0, var_57_arg_0=0, var_58=0, var_58_arg_0=0, var_58_arg_1=2147483652, var_58_arg_2=2147483652, var_61=1, var_61_arg_0=236, var_62=8, var_62_arg_0=1, var_64=9, var_65=0, var_65_arg_0=0, var_66=0, var_66_arg_0=236, var_66_arg_1=0, var_70=1, var_70_arg_0=255, var_71=10, var_71_arg_0=37, var_71_arg_1=1, var_73=0, var_73_arg_0=0, var_74=0, var_74_arg_0=10, var_74_arg_1=0, var_75=255, var_75_arg_0=37, var_76=0, var_76_arg_0=0, var_76_arg_1=255, var_77=0, var_77_arg_0=0, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_79=255, var_79_arg_0=255, var_80=1, var_80_arg_0=0, var_80_arg_1=255, var_81=0, var_82=1, var_82_arg_0=0, var_82_arg_1=0, var_82_arg_2=1, var_83=1, var_83_arg_0=1, var_84=255, var_84_arg_0=1, var_85=0, var_85_arg_0=0, var_85_arg_1=255, var_86=2, var_86_arg_0=0, var_88=1, var_88_arg_0=0, var_88_arg_1=0, var_89=1, var_89_arg_0=2, var_89_arg_1=1, var_93=1, var_93_arg_0=0, var_93_arg_1=0, var_94=255, var_94_arg_0=1, var_95=21, var_95_arg_0=1, var_95_arg_1=255, var_97=24, var_97_arg_0=0, var_98=24, var_98_arg_0=17, var_99=24, var_99_arg_0=24, var_99_arg_1=24] [L147] CALL assume_abort_if_not(constr_108_arg_0) VAL [unknown-#in~cond-unknown=22] [L21] COND FALSE !(!cond) [L147] RET assume_abort_if_not(constr_108_arg_0) VAL [bad_115_arg_0=0, constr_102_arg_0=13, constr_108_arg_0=22, constr_96_arg_0=21, init_92_arg_1=1, input_109=12, input_2=5, input_4=2147483658, input_5=251, input_6=17, input_7=0, input_8=6, input_9=2147483657, mask_SORT_1=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_3=4294967295, mask_SORT_40=3, msb_SORT_1=1, msb_SORT_11=16, msb_SORT_13=8, msb_SORT_19=4, msb_SORT_3=2147483648, msb_SORT_40=2, next_270_arg_1=2147483657, next_273_arg_1=1, next_276_arg_1=2147483657, next_279_arg_1=2147483657, next_282_arg_1=2147483657, next_285_arg_1=2147483652, next_288_arg_1=2147483652, next_291_arg_1=2147483652, next_294_arg_1=2147483652, next_297_arg_1=2147483652, next_303_arg_1=236, next_306_arg_1=37, next_309_arg_1=255, next_312_arg_1=16, next_315_arg_1=0, next_316_arg_1=0, next_319_arg_1=14, state_10=2147483657, state_12=1, state_136=14, state_18=2147483657, state_24=2147483657, state_29=2147483657, state_34=2147483652, state_39=2147483652, state_45=2147483652, state_50=2147483652, state_55=2147483652, state_60=236, state_68=37, state_69=255, state_72=16, state_87=0, state_91=0, var_100=13, var_100_arg_0=1, var_101=13, var_101_arg_0=24, var_101_arg_1=13, var_103=0, var_103_arg_0=8, var_104=22, var_104_arg_0=251, var_105=22, var_105_arg_0=0, var_105_arg_1=22, var_106=22, var_106_arg_0=1, var_107=22, var_107_arg_0=22, var_107_arg_1=22, var_110=1, var_110_arg_0=1, var_110_arg_1=1, var_110_arg_2=1, var_111=0, var_112=0, var_112_arg_0=1, var_112_arg_1=0, var_112_arg_2=1, var_113=255, var_113_arg_0=1, var_114=0, var_114_arg_0=0, var_114_arg_1=255, var_119=20, var_119_arg_0=0, var_119_arg_1=20, var_120=0, var_120_arg_0=20, var_120_arg_1=0, var_137=7, var_137_arg_0=14, var_138=1, var_138_arg_0=7, var_139=255, var_139_arg_0=1, var_14=0, var_140=0, var_140_arg_0=0, var_140_arg_1=255, var_145=1, var_145_arg_0=1, var_146=0, var_146_arg_0=7, var_146_arg_1=1, var_147=0, var_147_arg_0=0, var_147_arg_1=0, var_14_arg_0=1, var_15=8, var_152=0, var_152_arg_0=0, var_153=0, var_153_arg_0=7, var_153_arg_1=0, var_154=0, var_154_arg_0=0, var_154_arg_1=0, var_159=3, var_159_arg_0=3, var_16=0, var_160=0, var_160_arg_0=7, var_160_arg_1=3, var_161=0, var_161_arg_0=0, var_161_arg_1=0, var_166=0, var_166_arg_0=0, var_167=0, var_167_arg_0=7, var_167_arg_1=0, var_168=0, var_168_arg_0=0, var_168_arg_1=0, var_16_arg_0=0, var_16_arg_1=8, var_17=2147483657, var_173=5, var_173_arg_0=5, var_174=0, var_174_arg_0=7, var_174_arg_1=5, var_175=0, var_175_arg_0=0, var_175_arg_1=0, var_17_arg_0=0, var_17_arg_1=2147483657, var_17_arg_2=2147483657, var_180=7, var_180_arg_0=7, var_181=1, var_181_arg_0=7, var_181_arg_1=7, var_182=0, var_182_arg_0=0, var_182_arg_1=1, var_187=7, var_187_arg_0=7, var_188=1, var_188_arg_0=7, var_188_arg_1=7, var_189=0, var_189_arg_0=0, var_189_arg_1=1, var_194=0, var_194_arg_0=7, var_194_arg_1=8, var_195=0, var_195_arg_0=0, var_195_arg_1=0, var_198=0, var_198_arg_0=0, var_199=1, var_199_arg_0=1, var_199_arg_1=0, var_20=7, var_204=0, var_204_arg_0=0, var_205=14, var_205_arg_0=14, var_205_arg_1=0, var_21=7, var_21_arg_0=7, var_22=0, var_224=0, var_224_arg_0=0, var_224_arg_1=0, var_225=37, var_225_arg_0=37, var_225_arg_1=0, var_228=0, var_228_arg_0=37, var_22_arg_0=0, var_22_arg_1=7, var_23=2147483657, var_233=0, var_233_arg_0=0, var_233_arg_1=0, var_236=255, var_236_arg_0=0, var_236_arg_1=255, var_23_arg_0=0, var_23_arg_1=2147483657, var_23_arg_2=2147483657, var_248=20, var_248_arg_0=0, var_248_arg_1=20, var_249=20, var_249_arg_0=20, var_249_arg_1=0, var_25=6, var_250=1, var_250_arg_0=20, var_250_arg_1=37, var_26=250, var_267=2147483657, var_267_arg_0=0, var_267_arg_1=2147483652, var_267_arg_2=2147483657, var_268=0, var_269=2147483657, var_269_arg_0=0, var_269_arg_1=0, var_269_arg_2=2147483657, var_26_arg_0=250, var_27=0, var_271=1, var_271_arg_0=0, var_271_arg_1=1, var_271_arg_2=1, var_272=1, var_272_arg_0=0, var_272_arg_1=0, var_272_arg_2=1, var_274=2147483657, var_274_arg_0=0, var_274_arg_1=2147483652, var_274_arg_2=2147483657, var_275=2147483657, var_275_arg_0=0, var_275_arg_1=0, var_275_arg_2=2147483657, var_277=2147483657, var_277_arg_0=0, var_277_arg_1=2147483652, var_277_arg_2=2147483657, var_278=2147483657, var_278_arg_0=0, var_278_arg_1=0, var_278_arg_2=2147483657, var_27_arg_0=0, var_27_arg_1=250, var_28=2147483657, var_280=2147483657, var_280_arg_0=0, var_280_arg_1=2147483652, var_280_arg_2=2147483657, var_281=2147483657, var_281_arg_0=0, var_281_arg_1=0, var_281_arg_2=2147483657, var_283=2147483652, var_283_arg_0=0, var_283_arg_1=2147483652, var_283_arg_2=2147483652, var_284=2147483652, var_284_arg_0=0, var_284_arg_1=0, var_284_arg_2=2147483652, var_286=2147483652, var_286_arg_0=0, var_286_arg_1=2147483652, var_286_arg_2=2147483652, var_287=2147483652, var_287_arg_0=0, var_287_arg_1=0, var_287_arg_2=2147483652, var_289=2147483652, var_289_arg_0=0, var_289_arg_1=2147483652, var_289_arg_2=2147483652, var_28_arg_0=0, var_28_arg_1=2147483657, var_28_arg_2=2147483657, var_290=2147483652, var_290_arg_0=0, var_290_arg_1=0, var_290_arg_2=2147483652, var_292=2147483652, var_292_arg_0=0, var_292_arg_1=2147483652, var_292_arg_2=2147483652, var_293=2147483652, var_293_arg_0=0, var_293_arg_1=0, var_293_arg_2=2147483652, var_295=2147483652, var_295_arg_0=0, var_295_arg_1=2147483652, var_295_arg_2=2147483652, var_296=2147483652, var_296_arg_0=0, var_296_arg_1=0, var_296_arg_2=2147483652, var_298=0, var_298_arg_0=0, var_299=0, var_299_arg_0=0, var_299_arg_1=0, var_30=5, var_300=20, var_300_arg_0=20, var_301=236, var_301_arg_0=0, var_301_arg_1=20, var_302=236, var_302_arg_0=0, var_302_arg_1=0, var_302_arg_2=236, var_304=37, var_304_arg_0=0, var_304_arg_1=37, var_304_arg_2=37, var_305=37, var_305_arg_0=0, var_305_arg_1=0, var_305_arg_2=37, var_307=255, var_307_arg_0=1, var_307_arg_1=255, var_307_arg_2=255, var_308=255, var_308_arg_0=0, var_308_arg_1=0, var_308_arg_2=255, var_31=5, var_310=1, var_310_arg_0=1, var_310_arg_1=1, var_310_arg_2=0, var_311=16, var_311_arg_0=0, var_311_arg_1=0, var_311_arg_2=1, var_313=0, var_313_arg_0=0, var_313_arg_1=2147483652, var_313_arg_2=0, var_314=0, var_314_arg_0=0, var_314_arg_1=0, var_314_arg_2=0, var_317=14, var_317_arg_0=0, var_317_arg_1=14, var_317_arg_2=14, var_318=14, var_318_arg_0=0, var_318_arg_1=0, var_318_arg_2=14, var_31_arg_0=5, var_32=0, var_32_arg_0=0, var_32_arg_1=5, var_33=2147483657, var_33_arg_0=0, var_33_arg_1=2147483657, var_33_arg_2=2147483657, var_35=4, var_36=0, var_36_arg_0=0, var_37=1, var_37_arg_0=0, var_37_arg_1=0, var_38=2147483652, var_38_arg_0=1, var_38_arg_1=2147483652, var_38_arg_2=2147483657, var_41=3, var_42=3, var_42_arg_0=3, var_43=0, var_43_arg_0=0, var_43_arg_1=3, var_44=2147483652, var_44_arg_0=0, var_44_arg_1=2147483652, var_44_arg_2=2147483652, var_46=2, var_47=0, var_47_arg_0=0, var_48=1, var_48_arg_0=0, var_48_arg_1=0, var_49=2147483652, var_49_arg_0=1, var_49_arg_1=2147483652, var_49_arg_2=2147483652, var_51=1, var_52=1, var_52_arg_0=1, var_53=0, var_53_arg_0=0, var_53_arg_1=1, var_54=2147483652, var_54_arg_0=0, var_54_arg_1=2147483652, var_54_arg_2=2147483652, var_56=0, var_56_arg_0=0, var_57=0, var_57_arg_0=0, var_58=0, var_58_arg_0=0, var_58_arg_1=2147483652, var_58_arg_2=2147483652, var_61=1, var_61_arg_0=236, var_62=8, var_62_arg_0=1, var_64=9, var_65=0, var_65_arg_0=0, var_66=0, var_66_arg_0=236, var_66_arg_1=0, var_70=1, var_70_arg_0=255, var_71=10, var_71_arg_0=37, var_71_arg_1=1, var_73=0, var_73_arg_0=0, var_74=0, var_74_arg_0=10, var_74_arg_1=0, var_75=255, var_75_arg_0=37, var_76=0, var_76_arg_0=0, var_76_arg_1=255, var_77=0, var_77_arg_0=0, var_78=0, var_78_arg_0=0, var_78_arg_1=0, var_79=255, var_79_arg_0=255, var_80=1, var_80_arg_0=0, var_80_arg_1=255, var_81=0, var_82=1, var_82_arg_0=0, var_82_arg_1=0, var_82_arg_2=1, var_83=1, var_83_arg_0=1, var_84=255, var_84_arg_0=1, var_85=0, var_85_arg_0=0, var_85_arg_1=255, var_86=2, var_86_arg_0=0, var_88=1, var_88_arg_0=0, var_88_arg_1=0, var_89=1, var_89_arg_0=2, var_89_arg_1=1, var_93=1, var_93_arg_0=0, var_93_arg_1=0, var_94=255, var_94_arg_0=1, var_95=21, var_95_arg_0=1, var_95_arg_1=255, var_97=24, var_97_arg_0=0, var_98=24, var_98_arg_0=17, var_99=24, var_99_arg_0=24, var_99_arg_1=24] [L149] SORT_1 var_112_arg_0 = state_91; [L150] SORT_1 var_112_arg_1 = var_111; [L151] SORT_1 var_112_arg_2 = var_51; [L152] SORT_1 var_112 = var_112_arg_0 ? var_112_arg_1 : var_112_arg_2; [L153] SORT_1 var_70_arg_0 = state_69; [L154] SORT_1 var_70 = ~var_70_arg_0; [L155] SORT_1 var_71_arg_0 = state_68; [L156] SORT_1 var_71_arg_1 = var_70; [L157] SORT_1 var_71 = var_71_arg_0 & var_71_arg_1; [L158] SORT_11 var_73_arg_0 = state_72; [L159] SORT_1 var_73 = var_73_arg_0 != 0; [L160] SORT_1 var_74_arg_0 = var_71; [L161] SORT_1 var_74_arg_1 = var_73; [L162] SORT_1 var_74 = var_74_arg_0 & var_74_arg_1; [L163] SORT_1 var_75_arg_0 = state_68; [L164] SORT_1 var_75 = ~var_75_arg_0; [L165] SORT_1 var_76_arg_0 = input_6; [L166] SORT_1 var_76_arg_1 = var_75; [L167] SORT_1 var_76 = var_76_arg_0 & var_76_arg_1; [L168] SORT_1 var_77_arg_0 = var_76; [L169] var_77_arg_0 = var_77_arg_0 & mask_SORT_1 [L170] SORT_11 var_77 = var_77_arg_0; [L171] SORT_11 var_78_arg_0 = state_72; [L172] SORT_11 var_78_arg_1 = var_77; [L173] SORT_11 var_78 = var_78_arg_0 + var_78_arg_1; [L174] SORT_1 var_79_arg_0 = input_5; [L175] var_79_arg_0 = var_79_arg_0 & mask_SORT_1 [L176] SORT_11 var_79 = var_79_arg_0; [L177] SORT_11 var_80_arg_0 = var_78; [L178] SORT_11 var_80_arg_1 = var_79; [L179] SORT_11 var_80 = var_80_arg_0 - var_80_arg_1; [L180] SORT_1 var_82_arg_0 = input_7; [L181] SORT_11 var_82_arg_1 = var_81; [L182] SORT_11 var_82_arg_2 = var_80; [L183] SORT_11 var_82 = var_82_arg_0 ? var_82_arg_1 : var_82_arg_2; [L184] var_82 = var_82 & mask_SORT_11 [L185] SORT_11 var_83_arg_0 = var_82; [L186] SORT_1 var_83 = var_83_arg_0 != 0; [L187] SORT_1 var_84_arg_0 = var_83; [L188] SORT_1 var_84 = ~var_84_arg_0; [L189] SORT_1 var_85_arg_0 = var_74; [L190] SORT_1 var_85_arg_1 = var_84; [L191] SORT_1 var_85 = var_85_arg_0 & var_85_arg_1; [L192] SORT_1 var_86_arg_0 = var_85; [L193] SORT_1 var_86 = ~var_86_arg_0; [L194] SORT_11 var_14_arg_0 = state_12; [L195] SORT_13 var_14 = var_14_arg_0 >> 0; [L196] var_14 = var_14 & mask_SORT_13 [L197] SORT_13 var_56_arg_0 = var_14; [L198] SORT_1 var_56 = var_56_arg_0 != 0; [L199] SORT_1 var_57_arg_0 = var_56; [L200] SORT_1 var_57 = ~var_57_arg_0; [L201] var_57 = var_57 & mask_SORT_1 [L202] SORT_1 var_52_arg_0 = var_51; [L203] var_52_arg_0 = var_52_arg_0 & mask_SORT_1 [L204] SORT_13 var_52 = var_52_arg_0; [L205] SORT_13 var_53_arg_0 = var_14; [L206] SORT_13 var_53_arg_1 = var_52; [L207] SORT_1 var_53 = var_53_arg_0 == var_53_arg_1; [L208] SORT_40 var_47_arg_0 = var_46; [L209] var_47_arg_0 = var_47_arg_0 & mask_SORT_40 [L210] SORT_13 var_47 = var_47_arg_0; [L211] SORT_13 var_48_arg_0 = var_14; [L212] SORT_13 var_48_arg_1 = var_47; [L213] SORT_1 var_48 = var_48_arg_0 == var_48_arg_1; [L214] SORT_40 var_42_arg_0 = var_41; [L215] var_42_arg_0 = var_42_arg_0 & mask_SORT_40 [L216] SORT_13 var_42 = var_42_arg_0; [L217] SORT_13 var_43_arg_0 = var_14; [L218] SORT_13 var_43_arg_1 = var_42; [L219] SORT_1 var_43 = var_43_arg_0 == var_43_arg_1; [L220] SORT_19 var_36_arg_0 = var_35; [L221] var_36_arg_0 = var_36_arg_0 & mask_SORT_19 [L222] SORT_13 var_36 = var_36_arg_0; [L223] SORT_13 var_37_arg_0 = var_14; [L224] SORT_13 var_37_arg_1 = var_36; [L225] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L226] SORT_19 var_31_arg_0 = var_30; [L227] var_31_arg_0 = var_31_arg_0 & mask_SORT_19 [L228] SORT_13 var_31 = var_31_arg_0; [L229] SORT_13 var_32_arg_0 = var_14; [L230] SORT_13 var_32_arg_1 = var_31; [L231] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L232] SORT_19 var_26_arg_0 = var_25; [L233] var_26_arg_0 = var_26_arg_0 & mask_SORT_19 [L234] SORT_13 var_26 = var_26_arg_0; [L235] SORT_13 var_27_arg_0 = var_14; [L236] SORT_13 var_27_arg_1 = var_26; [L237] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L238] SORT_19 var_21_arg_0 = var_20; [L239] var_21_arg_0 = var_21_arg_0 & mask_SORT_19 [L240] SORT_13 var_21 = var_21_arg_0; [L241] SORT_13 var_22_arg_0 = var_14; [L242] SORT_13 var_22_arg_1 = var_21; [L243] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L244] SORT_13 var_16_arg_0 = var_14; [L245] SORT_13 var_16_arg_1 = var_15; [L246] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1; [L247] SORT_1 var_17_arg_0 = var_16; [L248] SORT_3 var_17_arg_1 = state_10; [L249] SORT_3 var_17_arg_2 = input_9; [L250] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2; [L251] SORT_1 var_23_arg_0 = var_22; [L252] SORT_3 var_23_arg_1 = state_18; [L253] SORT_3 var_23_arg_2 = var_17; [L254] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L255] SORT_1 var_28_arg_0 = var_27; [L256] SORT_3 var_28_arg_1 = state_24; [L257] SORT_3 var_28_arg_2 = var_23; [L258] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L259] SORT_1 var_33_arg_0 = var_32; [L260] SORT_3 var_33_arg_1 = state_29; [L261] SORT_3 var_33_arg_2 = var_28; [L262] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L263] SORT_1 var_38_arg_0 = var_37; [L264] SORT_3 var_38_arg_1 = state_34; [L265] SORT_3 var_38_arg_2 = var_33; [L266] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L267] SORT_1 var_44_arg_0 = var_43; [L268] SORT_3 var_44_arg_1 = state_39; [L269] SORT_3 var_44_arg_2 = var_38; [L270] SORT_3 var_44 = var_44_arg_0 ? var_44_arg_1 : var_44_arg_2; [L271] SORT_1 var_49_arg_0 = var_48; [L272] SORT_3 var_49_arg_1 = state_45; [L273] SORT_3 var_49_arg_2 = var_44; [L274] SORT_3 var_49 = var_49_arg_0 ? var_49_arg_1 : var_49_arg_2; [L275] SORT_1 var_54_arg_0 = var_53; [L276] SORT_3 var_54_arg_1 = state_50; [L277] SORT_3 var_54_arg_2 = var_49; [L278] SORT_3 var_54 = var_54_arg_0 ? var_54_arg_1 : var_54_arg_2; [L279] SORT_1 var_58_arg_0 = var_57; [L280] SORT_3 var_58_arg_1 = state_55; [L281] SORT_3 var_58_arg_2 = var_54; [L282] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2; [L283] var_58 = var_58 & mask_SORT_3 [L284] SORT_3 var_88_arg_0 = state_87; [L285] SORT_3 var_88_arg_1 = var_58; [L286] SORT_1 var_88 = var_88_arg_0 == var_88_arg_1; [L287] SORT_1 var_89_arg_0 = var_86; [L288] SORT_1 var_89_arg_1 = var_88; [L289] SORT_1 var_89 = var_89_arg_0 | var_89_arg_1; [L290] SORT_1 var_110_arg_0 = state_91; [L291] SORT_1 var_110_arg_1 = input_109; [L292] SORT_1 var_110_arg_2 = var_89; [L293] SORT_1 var_110 = var_110_arg_0 ? var_110_arg_1 : var_110_arg_2; [L294] SORT_1 var_113_arg_0 = var_110; [L295] SORT_1 var_113 = ~var_113_arg_0; [L296] SORT_1 var_114_arg_0 = var_112; [L297] SORT_1 var_114_arg_1 = var_113; [L298] SORT_1 var_114 = var_114_arg_0 & var_114_arg_1; [L299] var_114 = var_114 & mask_SORT_1 [L300] SORT_1 bad_115_arg_0 = var_114; [L301] CALL __VERIFIER_assert(!(bad_115_arg_0)) [L20] COND TRUE !(cond) VAL [cond=0, unknown-#in~cond-unknown=0] [L20] reach_error() VAL [cond=0, unknown-#in~cond-unknown=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 2 procedures, 15 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 18.7s, OverallIterations: 2, TraceHistogramMax: 6, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 0.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 11 SdHoareTripleChecker+Valid, 0.3s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 8 mSDsluCounter, 46 SdHoareTripleChecker+Invalid, 0.3s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 26 mSDsCounter, 1 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 15 IncrementalHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 1 mSolverCounterUnsat, 20 mSDtfsCounter, 15 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=22occurred in iteration=1, InterpolantAutomatonStates: 5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 1 MinimizatonAttempts, 1 StatesRemovedByMinimization, 1 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 8.2s SatisfiabilityAnalysisTime, 2.0s InterpolantComputationTime, 47 NumberOfCodeBlocks, 47 NumberOfCodeBlocksAsserted, 2 NumberOfCheckSat, 15 ConstructedInterpolants, 0 QuantifiedInterpolants, 81 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 1 InterpolantComputations, 1 PerfectInterpolantSequences, 6/6 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2022-11-23 15:39:37,817 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/config/svcomp-Reach-64bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 0cfed53fd6b4f79a916e28ee79b804b829089e910b2920e7660f6197a58c3e45 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-4e7fbc6 [2022-11-23 15:39:40,441 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-23 15:39:40,444 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-23 15:39:40,487 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-23 15:39:40,488 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-23 15:39:40,492 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-23 15:39:40,494 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-23 15:39:40,498 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-23 15:39:40,500 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-23 15:39:40,507 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-23 15:39:40,508 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-23 15:39:40,510 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-23 15:39:40,510 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-23 15:39:40,511 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-23 15:39:40,513 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-23 15:39:40,520 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-23 15:39:40,521 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-23 15:39:40,522 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-23 15:39:40,523 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-23 15:39:40,525 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-23 15:39:40,526 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-23 15:39:40,528 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-23 15:39:40,529 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-23 15:39:40,530 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-23 15:39:40,533 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-23 15:39:40,534 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-23 15:39:40,534 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-23 15:39:40,535 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-23 15:39:40,536 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-23 15:39:40,537 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-23 15:39:40,537 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-23 15:39:40,538 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-23 15:39:40,539 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-23 15:39:40,540 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-23 15:39:40,541 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-23 15:39:40,542 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-23 15:39:40,543 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-23 15:39:40,543 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-23 15:39:40,544 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-23 15:39:40,545 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-23 15:39:40,546 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-23 15:39:40,546 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/config/svcomp-Reach-64bit-Taipan_Bitvector.epf [2022-11-23 15:39:40,597 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-23 15:39:40,597 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-23 15:39:40,599 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-23 15:39:40,599 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-23 15:39:40,600 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-23 15:39:40,600 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-23 15:39:40,600 INFO L138 SettingsManager]: * User list type=DISABLED [2022-11-23 15:39:40,601 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-11-23 15:39:40,601 INFO L138 SettingsManager]: * Explicit value domain=true [2022-11-23 15:39:40,601 INFO L138 SettingsManager]: * Octagon Domain=false [2022-11-23 15:39:40,602 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-11-23 15:39:40,602 INFO L138 SettingsManager]: * Interval Domain=false [2022-11-23 15:39:40,603 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-23 15:39:40,603 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-23 15:39:40,604 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-23 15:39:40,604 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-23 15:39:40,604 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-23 15:39:40,604 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-11-23 15:39:40,605 INFO L138 SettingsManager]: * Use bitvectors instead of ints=true [2022-11-23 15:39:40,605 INFO L138 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2022-11-23 15:39:40,605 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-23 15:39:40,606 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-23 15:39:40,606 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-23 15:39:40,606 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-23 15:39:40,606 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-23 15:39:40,607 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-23 15:39:40,607 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-23 15:39:40,607 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-23 15:39:40,607 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-23 15:39:40,607 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-23 15:39:40,608 INFO L138 SettingsManager]: * Trace refinement strategy=WALRUS [2022-11-23 15:39:40,608 INFO L138 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2022-11-23 15:39:40,608 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-23 15:39:40,609 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-11-23 15:39:40,609 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-11-23 15:39:40,609 INFO L138 SettingsManager]: * Logic for external solver=AUFBV WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 0cfed53fd6b4f79a916e28ee79b804b829089e910b2920e7660f6197a58c3e45 [2022-11-23 15:39:41,066 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-23 15:39:41,102 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-23 15:39:41,104 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-23 15:39:41,106 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-23 15:39:41,107 INFO L275 PluginConnector]: CDTParser initialized [2022-11-23 15:39:41,110 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c [2022-11-23 15:39:44,259 INFO L500 CDTParser]: Created temporary CDT project at NULL [2022-11-23 15:39:44,565 INFO L351 CDTParser]: Found 1 translation units. [2022-11-23 15:39:44,566 INFO L172 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c [2022-11-23 15:39:44,592 INFO L394 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/data/929f1eff5/64751a1aeddd459cbcccdbe3c7b31722/FLAG986dc2cc7 [2022-11-23 15:39:44,611 INFO L402 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/data/929f1eff5/64751a1aeddd459cbcccdbe3c7b31722 [2022-11-23 15:39:44,614 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-23 15:39:44,616 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-23 15:39:44,618 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-23 15:39:44,618 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-23 15:39:44,626 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-23 15:39:44,627 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 03:39:44" (1/1) ... [2022-11-23 15:39:44,629 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@57339812 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:39:44, skipping insertion in model container [2022-11-23 15:39:44,629 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 03:39:44" (1/1) ... [2022-11-23 15:39:44,638 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-23 15:39:44,697 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-23 15:39:44,942 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c[1116,1129] [2022-11-23 15:39:45,215 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-23 15:39:45,223 INFO L203 MainTranslator]: Completed pre-run [2022-11-23 15:39:45,234 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c[1116,1129] [2022-11-23 15:39:45,354 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-23 15:39:45,381 INFO L208 MainTranslator]: Completed translation [2022-11-23 15:39:45,382 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:39:45 WrapperNode [2022-11-23 15:39:45,382 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-23 15:39:45,383 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-23 15:39:45,383 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-23 15:39:45,384 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-23 15:39:45,419 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:39:45" (1/1) ... [2022-11-23 15:39:45,450 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:39:45" (1/1) ... [2022-11-23 15:39:45,520 INFO L138 Inliner]: procedures = 11, calls = 6, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 608 [2022-11-23 15:39:45,520 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-23 15:39:45,521 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-23 15:39:45,521 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-23 15:39:45,521 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-23 15:39:45,543 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:39:45" (1/1) ... [2022-11-23 15:39:45,543 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:39:45" (1/1) ... [2022-11-23 15:39:45,548 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:39:45" (1/1) ... [2022-11-23 15:39:45,549 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:39:45" (1/1) ... [2022-11-23 15:39:45,591 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:39:45" (1/1) ... [2022-11-23 15:39:45,602 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:39:45" (1/1) ... [2022-11-23 15:39:45,605 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:39:45" (1/1) ... [2022-11-23 15:39:45,607 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:39:45" (1/1) ... [2022-11-23 15:39:45,613 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-23 15:39:45,614 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-23 15:39:45,614 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-23 15:39:45,614 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-23 15:39:45,623 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:39:45" (1/1) ... [2022-11-23 15:39:45,629 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-23 15:39:45,643 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/z3 [2022-11-23 15:39:45,655 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-23 15:39:45,683 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-23 15:39:45,703 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-23 15:39:45,704 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-23 15:39:45,704 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2022-11-23 15:39:45,704 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2022-11-23 15:39:45,926 INFO L235 CfgBuilder]: Building ICFG [2022-11-23 15:39:45,928 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-23 15:39:46,653 INFO L276 CfgBuilder]: Performing block encoding [2022-11-23 15:39:46,664 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-23 15:39:46,665 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-23 15:39:46,667 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 03:39:46 BoogieIcfgContainer [2022-11-23 15:39:46,667 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-23 15:39:46,669 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-23 15:39:46,669 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-23 15:39:46,672 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-23 15:39:46,673 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 03:39:44" (1/3) ... [2022-11-23 15:39:46,675 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3f9329a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 03:39:46, skipping insertion in model container [2022-11-23 15:39:46,675 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:39:45" (2/3) ... [2022-11-23 15:39:46,676 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3f9329a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 03:39:46, skipping insertion in model container [2022-11-23 15:39:46,676 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 03:39:46" (3/3) ... [2022-11-23 15:39:46,677 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c [2022-11-23 15:39:46,699 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-23 15:39:46,699 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-23 15:39:46,759 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-23 15:39:46,765 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@1c4cec9, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-23 15:39:46,765 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-23 15:39:46,770 INFO L276 IsEmpty]: Start isEmpty. Operand has 21 states, 15 states have (on average 1.3333333333333333) internal successors, (20), 16 states have internal predecessors, (20), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-23 15:39:46,778 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-11-23 15:39:46,778 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 15:39:46,779 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-23 15:39:46,779 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-23 15:39:46,784 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 15:39:46,784 INFO L85 PathProgramCache]: Analyzing trace with hash 1714165879, now seen corresponding path program 1 times [2022-11-23 15:39:46,798 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-23 15:39:46,799 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1593971513] [2022-11-23 15:39:46,799 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 15:39:46,800 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-23 15:39:46,800 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/mathsat [2022-11-23 15:39:46,805 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-23 15:39:46,811 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (2)] Waiting until timeout for monitored process [2022-11-23 15:39:47,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 15:39:47,146 INFO L263 TraceCheckSpWp]: Trace formula consists of 260 conjuncts, 1 conjunts are in the unsatisfiable core [2022-11-23 15:39:47,153 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 15:39:47,185 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2022-11-23 15:39:47,185 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-23 15:39:47,186 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-23 15:39:47,186 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1593971513] [2022-11-23 15:39:47,186 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1593971513] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-23 15:39:47,187 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-23 15:39:47,187 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-23 15:39:47,190 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2146722220] [2022-11-23 15:39:47,191 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-23 15:39:47,195 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2022-11-23 15:39:47,196 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-23 15:39:47,245 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2022-11-23 15:39:47,246 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2022-11-23 15:39:47,248 INFO L87 Difference]: Start difference. First operand has 21 states, 15 states have (on average 1.3333333333333333) internal successors, (20), 16 states have internal predecessors, (20), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 6.5) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) [2022-11-23 15:39:47,275 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 15:39:47,275 INFO L93 Difference]: Finished difference Result 36 states and 50 transitions. [2022-11-23 15:39:47,276 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-23 15:39:47,278 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 6.5) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) Word has length 23 [2022-11-23 15:39:47,279 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-23 15:39:47,287 INFO L225 Difference]: With dead ends: 36 [2022-11-23 15:39:47,287 INFO L226 Difference]: Without dead ends: 17 [2022-11-23 15:39:47,292 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2022-11-23 15:39:47,297 INFO L413 NwaCegarLoop]: 19 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 19 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-23 15:39:47,303 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 19 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-23 15:39:47,320 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states. [2022-11-23 15:39:47,336 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 17. [2022-11-23 15:39:47,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 12 states have (on average 1.0833333333333333) internal successors, (13), 12 states have internal predecessors, (13), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-23 15:39:47,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 19 transitions. [2022-11-23 15:39:47,340 INFO L78 Accepts]: Start accepts. Automaton has 17 states and 19 transitions. Word has length 23 [2022-11-23 15:39:47,340 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-23 15:39:47,341 INFO L495 AbstractCegarLoop]: Abstraction has 17 states and 19 transitions. [2022-11-23 15:39:47,341 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 6.5) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) [2022-11-23 15:39:47,341 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 19 transitions. [2022-11-23 15:39:47,343 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-11-23 15:39:47,343 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 15:39:47,343 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-23 15:39:47,358 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (2)] Forceful destruction successful, exit code 0 [2022-11-23 15:39:47,556 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-23 15:39:47,557 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-23 15:39:47,558 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 15:39:47,558 INFO L85 PathProgramCache]: Analyzing trace with hash 35444913, now seen corresponding path program 1 times [2022-11-23 15:39:47,559 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-23 15:39:47,559 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [682594240] [2022-11-23 15:39:47,559 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 15:39:47,559 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-23 15:39:47,559 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/mathsat [2022-11-23 15:39:47,561 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-23 15:39:47,562 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (3)] Waiting until timeout for monitored process [2022-11-23 15:39:47,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 15:39:47,860 INFO L263 TraceCheckSpWp]: Trace formula consists of 260 conjuncts, 14 conjunts are in the unsatisfiable core [2022-11-23 15:39:47,866 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 15:39:48,119 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-11-23 15:39:48,120 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-23 15:39:48,120 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-23 15:39:48,120 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [682594240] [2022-11-23 15:39:48,121 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [682594240] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-23 15:39:48,121 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-23 15:39:48,121 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-23 15:39:48,121 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1705769238] [2022-11-23 15:39:48,122 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-23 15:39:48,123 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-23 15:39:48,123 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-23 15:39:48,124 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-23 15:39:48,124 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-23 15:39:48,125 INFO L87 Difference]: Start difference. First operand 17 states and 19 transitions. Second operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-11-23 15:39:48,287 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 15:39:48,287 INFO L93 Difference]: Finished difference Result 35 states and 43 transitions. [2022-11-23 15:39:48,288 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-23 15:39:48,288 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 23 [2022-11-23 15:39:48,289 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-23 15:39:48,290 INFO L225 Difference]: With dead ends: 35 [2022-11-23 15:39:48,290 INFO L226 Difference]: Without dead ends: 33 [2022-11-23 15:39:48,290 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 20 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-23 15:39:48,291 INFO L413 NwaCegarLoop]: 26 mSDtfsCounter, 7 mSDsluCounter, 38 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 10 SdHoareTripleChecker+Valid, 64 SdHoareTripleChecker+Invalid, 17 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-23 15:39:48,292 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [10 Valid, 64 Invalid, 17 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 17 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-23 15:39:48,293 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2022-11-23 15:39:48,310 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 25. [2022-11-23 15:39:48,310 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 17 states have (on average 1.0588235294117647) internal successors, (18), 17 states have internal predecessors, (18), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-11-23 15:39:48,314 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 30 transitions. [2022-11-23 15:39:48,314 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 30 transitions. Word has length 23 [2022-11-23 15:39:48,315 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-23 15:39:48,320 INFO L495 AbstractCegarLoop]: Abstraction has 25 states and 30 transitions. [2022-11-23 15:39:48,320 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-11-23 15:39:48,321 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 30 transitions. [2022-11-23 15:39:48,322 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2022-11-23 15:39:48,323 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 15:39:48,323 INFO L195 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2022-11-23 15:39:48,344 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (3)] Forceful destruction successful, exit code 0 [2022-11-23 15:39:48,544 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-23 15:39:48,545 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-23 15:39:48,545 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 15:39:48,545 INFO L85 PathProgramCache]: Analyzing trace with hash -1946900509, now seen corresponding path program 1 times [2022-11-23 15:39:48,548 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-23 15:39:48,548 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1070095233] [2022-11-23 15:39:48,548 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 15:39:48,548 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-23 15:39:48,549 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/mathsat [2022-11-23 15:39:48,553 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-23 15:39:48,555 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (4)] Waiting until timeout for monitored process [2022-11-23 15:39:49,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 15:39:49,124 INFO L263 TraceCheckSpWp]: Trace formula consists of 752 conjuncts, 47 conjunts are in the unsatisfiable core [2022-11-23 15:39:49,135 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 15:39:49,863 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2022-11-23 15:39:49,864 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 15:39:50,302 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-23 15:39:50,303 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1070095233] [2022-11-23 15:39:50,307 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1070095233] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 15:39:50,308 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [157846101] [2022-11-23 15:39:50,309 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 15:39:50,309 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-23 15:39:50,309 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/cvc4 [2022-11-23 15:39:50,312 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-23 15:39:50,344 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt (5)] Waiting until timeout for monitored process [2022-11-23 15:39:51,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 15:39:51,240 INFO L263 TraceCheckSpWp]: Trace formula consists of 752 conjuncts, 46 conjunts are in the unsatisfiable core [2022-11-23 15:39:51,250 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 15:39:51,727 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2022-11-23 15:39:51,727 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 15:39:51,959 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [157846101] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 15:39:51,960 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [717726189] [2022-11-23 15:39:51,960 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 15:39:51,960 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 15:39:51,960 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/z3 [2022-11-23 15:39:51,965 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-23 15:39:51,994 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-11-23 15:39:52,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 15:39:52,380 INFO L263 TraceCheckSpWp]: Trace formula consists of 752 conjuncts, 50 conjunts are in the unsatisfiable core [2022-11-23 15:39:52,387 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 15:39:52,926 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2022-11-23 15:39:52,927 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 15:39:53,080 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [717726189] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 15:39:53,080 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-23 15:39:53,081 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 11] total 16 [2022-11-23 15:39:53,081 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1434586502] [2022-11-23 15:39:53,081 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-23 15:39:53,082 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-11-23 15:39:53,082 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-23 15:39:53,083 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-11-23 15:39:53,083 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=298, Unknown=0, NotChecked=0, Total=342 [2022-11-23 15:39:53,084 INFO L87 Difference]: Start difference. First operand 25 states and 30 transitions. Second operand has 16 states, 13 states have (on average 2.769230769230769) internal successors, (36), 16 states have internal predecessors, (36), 8 states have call successors, (15), 1 states have call predecessors, (15), 2 states have return successors, (15), 5 states have call predecessors, (15), 8 states have call successors, (15) [2022-11-23 15:39:54,025 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 15:39:54,026 INFO L93 Difference]: Finished difference Result 44 states and 55 transitions. [2022-11-23 15:39:54,026 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-23 15:39:54,027 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 13 states have (on average 2.769230769230769) internal successors, (36), 16 states have internal predecessors, (36), 8 states have call successors, (15), 1 states have call predecessors, (15), 2 states have return successors, (15), 5 states have call predecessors, (15), 8 states have call successors, (15) Word has length 44 [2022-11-23 15:39:54,027 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-23 15:39:54,028 INFO L225 Difference]: With dead ends: 44 [2022-11-23 15:39:54,028 INFO L226 Difference]: Without dead ends: 42 [2022-11-23 15:39:54,029 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 147 GetRequests, 123 SyntacticMatches, 1 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 68 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=103, Invalid=497, Unknown=0, NotChecked=0, Total=600 [2022-11-23 15:39:54,029 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 41 mSDsluCounter, 78 mSDsCounter, 0 mSdLazyCounter, 225 mSolverCounterSat, 16 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 44 SdHoareTripleChecker+Valid, 90 SdHoareTripleChecker+Invalid, 241 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 16 IncrementalHoareTripleChecker+Valid, 225 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-11-23 15:39:54,030 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [44 Valid, 90 Invalid, 241 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [16 Valid, 225 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-11-23 15:39:54,031 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2022-11-23 15:39:54,039 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 34. [2022-11-23 15:39:54,040 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 23 states have (on average 1.0434782608695652) internal successors, (24), 23 states have internal predecessors, (24), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2022-11-23 15:39:54,041 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 42 transitions. [2022-11-23 15:39:54,041 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 42 transitions. Word has length 44 [2022-11-23 15:39:54,042 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-23 15:39:54,042 INFO L495 AbstractCegarLoop]: Abstraction has 34 states and 42 transitions. [2022-11-23 15:39:54,042 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 13 states have (on average 2.769230769230769) internal successors, (36), 16 states have internal predecessors, (36), 8 states have call successors, (15), 1 states have call predecessors, (15), 2 states have return successors, (15), 5 states have call predecessors, (15), 8 states have call successors, (15) [2022-11-23 15:39:54,042 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 42 transitions. [2022-11-23 15:39:54,044 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2022-11-23 15:39:54,044 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 15:39:54,044 INFO L195 NwaCegarLoop]: trace histogram [9, 9, 9, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1] [2022-11-23 15:39:54,071 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (4)] Forceful destruction successful, exit code 0 [2022-11-23 15:39:54,284 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt (5)] Forceful destruction successful, exit code 0 [2022-11-23 15:39:54,477 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-11-23 15:39:54,671 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 15:39:54,671 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-23 15:39:54,672 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 15:39:54,672 INFO L85 PathProgramCache]: Analyzing trace with hash -964514831, now seen corresponding path program 2 times [2022-11-23 15:39:54,674 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-23 15:39:54,674 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1252928984] [2022-11-23 15:39:54,674 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-23 15:39:54,675 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-23 15:39:54,675 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/mathsat [2022-11-23 15:39:54,679 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-23 15:39:54,738 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (7)] Waiting until timeout for monitored process [2022-11-23 15:39:55,305 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-23 15:39:55,305 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-23 15:39:55,344 INFO L263 TraceCheckSpWp]: Trace formula consists of 1244 conjuncts, 173 conjunts are in the unsatisfiable core [2022-11-23 15:39:55,370 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 15:39:59,914 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 15 proven. 64 refuted. 0 times theorem prover too weak. 90 trivial. 0 not checked. [2022-11-23 15:39:59,914 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 15:40:01,114 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-23 15:40:01,114 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1252928984] [2022-11-23 15:40:01,115 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1252928984] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 15:40:01,115 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1712606851] [2022-11-23 15:40:01,115 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-23 15:40:01,115 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-23 15:40:01,115 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/cvc4 [2022-11-23 15:40:01,117 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-23 15:40:01,133 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt (8)] Waiting until timeout for monitored process [2022-11-23 15:40:02,248 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-23 15:40:02,248 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-23 15:40:02,299 INFO L263 TraceCheckSpWp]: Trace formula consists of 1244 conjuncts, 162 conjunts are in the unsatisfiable core [2022-11-23 15:40:02,312 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 15:40:06,410 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 12 proven. 55 refuted. 0 times theorem prover too weak. 102 trivial. 0 not checked. [2022-11-23 15:40:06,410 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 15:40:28,336 WARN L233 SmtUtils]: Spent 19.18s on a formula simplification. DAG size of input: 133 DAG size of output: 109 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-23 15:40:28,407 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1712606851] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 15:40:28,407 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1562945089] [2022-11-23 15:40:28,407 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-23 15:40:28,408 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 15:40:28,408 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/z3 [2022-11-23 15:40:28,416 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-23 15:40:28,439 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-11-23 15:40:29,020 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-23 15:40:29,021 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-23 15:40:29,045 INFO L263 TraceCheckSpWp]: Trace formula consists of 1244 conjuncts, 178 conjunts are in the unsatisfiable core [2022-11-23 15:40:29,059 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 15:40:32,766 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 15 proven. 64 refuted. 0 times theorem prover too weak. 90 trivial. 0 not checked. [2022-11-23 15:40:32,767 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 15:40:49,976 WARN L233 SmtUtils]: Spent 16.56s on a formula simplification. DAG size of input: 123 DAG size of output: 106 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-23 15:40:50,044 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1562945089] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 15:40:50,044 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-23 15:40:50,045 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 12, 16] total 30 [2022-11-23 15:40:50,045 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [378846376] [2022-11-23 15:40:50,045 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-23 15:40:50,045 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 30 states [2022-11-23 15:40:50,046 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-23 15:40:50,046 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2022-11-23 15:40:50,050 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=140, Invalid=981, Unknown=1, NotChecked=0, Total=1122 [2022-11-23 15:40:50,050 INFO L87 Difference]: Start difference. First operand 34 states and 42 transitions. Second operand has 30 states, 22 states have (on average 2.6818181818181817) internal successors, (59), 30 states have internal predecessors, (59), 17 states have call successors, (27), 1 states have call predecessors, (27), 2 states have return successors, (27), 12 states have call predecessors, (27), 17 states have call successors, (27) [2022-11-23 15:40:54,028 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 15:40:54,028 INFO L93 Difference]: Finished difference Result 53 states and 67 transitions. [2022-11-23 15:40:54,029 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-11-23 15:40:54,029 INFO L78 Accepts]: Start accepts. Automaton has has 30 states, 22 states have (on average 2.6818181818181817) internal successors, (59), 30 states have internal predecessors, (59), 17 states have call successors, (27), 1 states have call predecessors, (27), 2 states have return successors, (27), 12 states have call predecessors, (27), 17 states have call successors, (27) Word has length 65 [2022-11-23 15:40:54,030 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-23 15:40:54,031 INFO L225 Difference]: With dead ends: 53 [2022-11-23 15:40:54,031 INFO L226 Difference]: Without dead ends: 51 [2022-11-23 15:40:54,032 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 213 GetRequests, 172 SyntacticMatches, 0 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 310 ImplicationChecksByTransitivity, 44.0s TimeCoverageRelationStatistics Valid=282, Invalid=1523, Unknown=1, NotChecked=0, Total=1806 [2022-11-23 15:40:54,033 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 71 mSDsluCounter, 127 mSDsCounter, 0 mSdLazyCounter, 547 mSolverCounterSat, 33 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 75 SdHoareTripleChecker+Valid, 139 SdHoareTripleChecker+Invalid, 580 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 33 IncrementalHoareTripleChecker+Valid, 547 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.8s IncrementalHoareTripleChecker+Time [2022-11-23 15:40:54,033 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [75 Valid, 139 Invalid, 580 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [33 Valid, 547 Invalid, 0 Unknown, 0 Unchecked, 2.8s Time] [2022-11-23 15:40:54,034 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2022-11-23 15:40:54,049 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 43. [2022-11-23 15:40:54,049 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 29 states have (on average 1.0344827586206897) internal successors, (30), 29 states have internal predecessors, (30), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2022-11-23 15:40:54,051 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 54 transitions. [2022-11-23 15:40:54,052 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 54 transitions. Word has length 65 [2022-11-23 15:40:54,052 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-23 15:40:54,052 INFO L495 AbstractCegarLoop]: Abstraction has 43 states and 54 transitions. [2022-11-23 15:40:54,053 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 30 states, 22 states have (on average 2.6818181818181817) internal successors, (59), 30 states have internal predecessors, (59), 17 states have call successors, (27), 1 states have call predecessors, (27), 2 states have return successors, (27), 12 states have call predecessors, (27), 17 states have call successors, (27) [2022-11-23 15:40:54,053 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 54 transitions. [2022-11-23 15:40:54,055 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2022-11-23 15:40:54,055 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 15:40:54,056 INFO L195 NwaCegarLoop]: trace histogram [12, 12, 12, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 1, 1, 1, 1] [2022-11-23 15:40:54,080 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (7)] Forceful destruction successful, exit code 0 [2022-11-23 15:40:54,278 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt (8)] Forceful destruction successful, exit code 0 [2022-11-23 15:40:54,484 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-11-23 15:40:54,671 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3,8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt,9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 15:40:54,672 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-23 15:40:54,672 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 15:40:54,672 INFO L85 PathProgramCache]: Analyzing trace with hash -1024500573, now seen corresponding path program 3 times [2022-11-23 15:40:54,674 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-23 15:40:54,674 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [118592182] [2022-11-23 15:40:54,674 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-23 15:40:54,674 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-23 15:40:54,674 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/mathsat [2022-11-23 15:40:54,675 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-23 15:40:54,677 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (10)] Waiting until timeout for monitored process [2022-11-23 15:40:55,814 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2022-11-23 15:40:55,814 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-23 15:40:55,867 INFO L263 TraceCheckSpWp]: Trace formula consists of 1687 conjuncts, 427 conjunts are in the unsatisfiable core [2022-11-23 15:40:55,886 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 15:41:12,153 WARN L233 SmtUtils]: Spent 11.14s on a formula simplification. DAG size of input: 226 DAG size of output: 194 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-23 15:47:20,805 WARN L230 Executor]: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1) with exit command (exit)) stderr output: (error "out of memory") [2022-11-23 15:47:20,806 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Ended with exit code 101 [2022-11-23 15:47:20,807 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-23 15:47:20,807 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [118592182] [2022-11-23 15:47:20,808 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_DEPENDING: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") [2022-11-23 15:47:20,808 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1067469213] [2022-11-23 15:47:20,808 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-23 15:47:20,808 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-23 15:47:20,809 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/cvc4 [2022-11-23 15:47:20,810 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-23 15:47:20,811 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt (11)] Waiting until timeout for monitored process [2022-11-23 15:47:21,000 FATAL L? ?]: Ignoring exception! de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1) with exit command (exit)) Connection to SMT solver broken at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.convertIOException(Executor.java:314) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.input(Executor.java:158) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Scriptor.declareFun(Scriptor.java:117) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.declareFun(WrapperScript.java:137) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.declareFun(WrapperScript.java:137) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.scripttransfer.HistoryRecordingScript.declareFun(HistoryRecordingScript.java:95) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.ManagedScript.declareFun(ManagedScript.java:172) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.variables.ProgramVarUtils.constructConstantForAuxVar(ProgramVarUtils.java:117) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.UnmodifiableTransFormula.computeClosedFormula(UnmodifiableTransFormula.java:135) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.UnmodifiableTransFormula.(UnmodifiableTransFormula.java:90) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaBuilder.finishConstruction(TransFormulaBuilder.java:320) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.decoupleArrayValues(TransFormulaUtils.java:1296) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckUtils.decoupleArrayValues(TraceCheckUtils.java:387) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.InterpolatingTraceCheck.(InterpolatingTraceCheck.java:87) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:132) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:108) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:1) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getOrConstruct(IpTcStrategyModuleBase.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getInterpolantComputationStatus(IpTcStrategyModuleBase.java:77) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.tryExecuteInterpolantGenerator(AutomatonFreeRefinementEngine.java:266) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.generateProof(AutomatonFreeRefinementEngine.java:147) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.executeStrategy(AutomatonFreeRefinementEngine.java:137) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.(AutomatonFreeRefinementEngine.java:85) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:82) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:336) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:431) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:366) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:348) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:415) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:302) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseSequentialProgram(TraceAbstractionStarter.java:262) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:175) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:154) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:124) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:320) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) Caused by: java.io.IOException: Stream closed at java.base/java.lang.ProcessBuilder$NullOutputStream.write(ProcessBuilder.java:442) at java.base/java.io.OutputStream.write(OutputStream.java:157) at java.base/java.io.BufferedOutputStream.flushBuffer(BufferedOutputStream.java:81) at java.base/java.io.BufferedOutputStream.flush(BufferedOutputStream.java:142) at java.base/sun.nio.cs.StreamEncoder.implFlush(StreamEncoder.java:318) at java.base/sun.nio.cs.StreamEncoder.flush(StreamEncoder.java:153) at java.base/java.io.OutputStreamWriter.flush(OutputStreamWriter.java:251) at java.base/java.io.BufferedWriter.flush(BufferedWriter.java:257) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.input(Executor.java:156) ... 42 more [2022-11-23 15:47:21,002 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [211570717] [2022-11-23 15:47:21,002 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-23 15:47:21,003 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 15:47:21,003 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/z3 [2022-11-23 15:47:21,031 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-23 15:47:21,044 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-11-23 15:47:21,159 FATAL L? ?]: Ignoring exception! java.lang.IllegalStateException: ManagedScript already locked by |v_ULTIMATE.start_main_#t~nondet11#1_13| at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.ManagedScript.lock(ManagedScript.java:82) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.variables.ProgramVarUtils.constructConstantForAuxVar(ProgramVarUtils.java:116) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.UnmodifiableTransFormula.computeClosedFormula(UnmodifiableTransFormula.java:135) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.UnmodifiableTransFormula.(UnmodifiableTransFormula.java:90) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaBuilder.finishConstruction(TransFormulaBuilder.java:320) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.decoupleArrayValues(TransFormulaUtils.java:1296) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckUtils.decoupleArrayValues(TraceCheckUtils.java:387) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.InterpolatingTraceCheck.(InterpolatingTraceCheck.java:87) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:132) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:108) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:1) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getOrConstruct(IpTcStrategyModuleBase.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getInterpolantComputationStatus(IpTcStrategyModuleBase.java:77) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.tryExecuteInterpolantGenerator(AutomatonFreeRefinementEngine.java:266) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.generateProof(AutomatonFreeRefinementEngine.java:147) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.executeStrategy(AutomatonFreeRefinementEngine.java:137) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.(AutomatonFreeRefinementEngine.java:85) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:82) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:336) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:431) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:366) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:348) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:415) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:302) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseSequentialProgram(TraceAbstractionStarter.java:262) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:175) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:154) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:124) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:320) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) [2022-11-23 15:47:21,160 INFO L184 FreeRefinementEngine]: Found 0 perfect and 0 imperfect interpolant sequences. [2022-11-23 15:47:21,160 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [] total 0 [2022-11-23 15:47:21,161 ERROR L170 FreeRefinementEngine]: Strategy WALRUS failed to provide any proof altough trace is infeasible [2022-11-23 15:47:21,161 INFO L359 BasicCegarLoop]: Counterexample might be feasible [2022-11-23 15:47:21,170 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-11-23 15:47:21,184 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-11-23 15:47:21,380 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt (11)] Forceful destruction successful, exit code 0 [2022-11-23 15:47:21,595 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (10)] Forceful destruction successful, exit code 0 [2022-11-23 15:47:21,778 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true,11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt,10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5021261b-397a-43d7-ad73-a6c3132bd2b4/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-23 15:47:21,782 INFO L444 BasicCegarLoop]: Path program histogram: [3, 1, 1] [2022-11-23 15:47:21,785 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-23 15:47:21,821 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-23 15:47:21,822 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-23 15:47:21,822 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-23 15:47:21,822 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-23 15:47:21,868 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 23.11 03:47:21 BoogieIcfgContainer [2022-11-23 15:47:21,869 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-23 15:47:21,869 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-23 15:47:21,870 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-23 15:47:21,870 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-23 15:47:21,870 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 03:39:46" (3/4) ... [2022-11-23 15:47:21,874 INFO L140 WitnessPrinter]: No result that supports witness generation found [2022-11-23 15:47:21,874 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-23 15:47:21,875 INFO L158 Benchmark]: Toolchain (without parser) took 457258.84ms. Allocated memory was 83.9MB in the beginning and 346.0MB in the end (delta: 262.1MB). Free memory was 60.1MB in the beginning and 103.2MB in the end (delta: -43.1MB). Peak memory consumption was 220.9MB. Max. memory is 16.1GB. [2022-11-23 15:47:21,875 INFO L158 Benchmark]: CDTParser took 0.26ms. Allocated memory is still 83.9MB. Free memory is still 61.2MB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-23 15:47:21,875 INFO L158 Benchmark]: CACSL2BoogieTranslator took 764.70ms. Allocated memory is still 83.9MB. Free memory was 59.8MB in the beginning and 59.3MB in the end (delta: 517.7kB). Peak memory consumption was 28.8MB. Max. memory is 16.1GB. [2022-11-23 15:47:21,876 INFO L158 Benchmark]: Boogie Procedure Inliner took 137.25ms. Allocated memory is still 83.9MB. Free memory was 59.3MB in the beginning and 54.1MB in the end (delta: 5.2MB). Peak memory consumption was 6.3MB. Max. memory is 16.1GB. [2022-11-23 15:47:21,876 INFO L158 Benchmark]: Boogie Preprocessor took 91.89ms. Allocated memory is still 83.9MB. Free memory was 54.1MB in the beginning and 50.9MB in the end (delta: 3.2MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-11-23 15:47:21,876 INFO L158 Benchmark]: RCFGBuilder took 1053.62ms. Allocated memory was 83.9MB in the beginning and 109.1MB in the end (delta: 25.2MB). Free memory was 50.9MB in the beginning and 65.4MB in the end (delta: -14.5MB). Peak memory consumption was 33.2MB. Max. memory is 16.1GB. [2022-11-23 15:47:21,877 INFO L158 Benchmark]: TraceAbstraction took 455199.86ms. Allocated memory was 109.1MB in the beginning and 346.0MB in the end (delta: 237.0MB). Free memory was 64.8MB in the beginning and 104.2MB in the end (delta: -39.4MB). Peak memory consumption was 210.6MB. Max. memory is 16.1GB. [2022-11-23 15:47:21,877 INFO L158 Benchmark]: Witness Printer took 4.72ms. Allocated memory is still 346.0MB. Free memory was 104.2MB in the beginning and 103.2MB in the end (delta: 1.1MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-11-23 15:47:21,879 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.26ms. Allocated memory is still 83.9MB. Free memory is still 61.2MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 764.70ms. Allocated memory is still 83.9MB. Free memory was 59.8MB in the beginning and 59.3MB in the end (delta: 517.7kB). Peak memory consumption was 28.8MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 137.25ms. Allocated memory is still 83.9MB. Free memory was 59.3MB in the beginning and 54.1MB in the end (delta: 5.2MB). Peak memory consumption was 6.3MB. Max. memory is 16.1GB. * Boogie Preprocessor took 91.89ms. Allocated memory is still 83.9MB. Free memory was 54.1MB in the beginning and 50.9MB in the end (delta: 3.2MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * RCFGBuilder took 1053.62ms. Allocated memory was 83.9MB in the beginning and 109.1MB in the end (delta: 25.2MB). Free memory was 50.9MB in the beginning and 65.4MB in the end (delta: -14.5MB). Peak memory consumption was 33.2MB. Max. memory is 16.1GB. * TraceAbstraction took 455199.86ms. Allocated memory was 109.1MB in the beginning and 346.0MB in the end (delta: 237.0MB). Free memory was 64.8MB in the beginning and 104.2MB in the end (delta: -39.4MB). Peak memory consumption was 210.6MB. Max. memory is 16.1GB. * Witness Printer took 4.72ms. Allocated memory is still 346.0MB. Free memory was 104.2MB in the beginning and 103.2MB in the end (delta: 1.1MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 20]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: unable to decide satisfiability of path constraint. Possible FailurePath: [L25] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L26] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L28] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 32); [L29] const SORT_3 msb_SORT_3 = (SORT_3)1 << (32 - 1); [L31] const SORT_11 mask_SORT_11 = (SORT_11)-1 >> (sizeof(SORT_11) * 8 - 5); [L32] const SORT_11 msb_SORT_11 = (SORT_11)1 << (5 - 1); [L34] const SORT_13 mask_SORT_13 = (SORT_13)-1 >> (sizeof(SORT_13) * 8 - 4); [L35] const SORT_13 msb_SORT_13 = (SORT_13)1 << (4 - 1); [L37] const SORT_19 mask_SORT_19 = (SORT_19)-1 >> (sizeof(SORT_19) * 8 - 3); [L38] const SORT_19 msb_SORT_19 = (SORT_19)1 << (3 - 1); [L40] const SORT_40 mask_SORT_40 = (SORT_40)-1 >> (sizeof(SORT_40) * 8 - 2); [L41] const SORT_40 msb_SORT_40 = (SORT_40)1 << (2 - 1); [L43] const SORT_13 var_15 = 8; [L44] const SORT_19 var_20 = 7; [L45] const SORT_19 var_25 = 6; [L46] const SORT_19 var_30 = 5; [L47] const SORT_19 var_35 = 4; [L48] const SORT_40 var_41 = 3; [L49] const SORT_40 var_46 = 2; [L50] const SORT_1 var_51 = 1; [L51] const SORT_13 var_64 = 9; [L52] const SORT_11 var_81 = 0; [L53] const SORT_1 var_111 = 0; [L54] const SORT_3 var_268 = 0; [L56] SORT_1 input_2; [L57] SORT_3 input_4; [L58] SORT_1 input_5; [L59] SORT_1 input_6; [L60] SORT_1 input_7; [L61] SORT_1 input_8; [L62] SORT_3 input_9; [L63] SORT_1 input_109; [L65] SORT_3 state_10 = __VERIFIER_nondet_uint() & mask_SORT_3; [L66] SORT_11 state_12 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L67] SORT_3 state_18 = __VERIFIER_nondet_uint() & mask_SORT_3; [L68] SORT_3 state_24 = __VERIFIER_nondet_uint() & mask_SORT_3; [L69] SORT_3 state_29 = __VERIFIER_nondet_uint() & mask_SORT_3; [L70] SORT_3 state_34 = __VERIFIER_nondet_uint() & mask_SORT_3; [L71] SORT_3 state_39 = __VERIFIER_nondet_uint() & mask_SORT_3; [L72] SORT_3 state_45 = __VERIFIER_nondet_uint() & mask_SORT_3; [L73] SORT_3 state_50 = __VERIFIER_nondet_uint() & mask_SORT_3; [L74] SORT_3 state_55 = __VERIFIER_nondet_uint() & mask_SORT_3; [L75] SORT_11 state_60 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L76] SORT_1 state_68 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L77] SORT_1 state_69 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L78] SORT_11 state_72 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L79] SORT_3 state_87 = __VERIFIER_nondet_uint() & mask_SORT_3; [L80] SORT_1 state_91 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L81] SORT_11 state_136 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L83] SORT_1 init_92_arg_1 = var_51; [L84] state_91 = init_92_arg_1 [L87] input_2 = __VERIFIER_nondet_uchar() [L88] input_4 = __VERIFIER_nondet_uint() [L89] input_5 = __VERIFIER_nondet_uchar() [L90] input_6 = __VERIFIER_nondet_uchar() [L91] input_7 = __VERIFIER_nondet_uchar() [L92] input_7 = input_7 & mask_SORT_1 [L93] input_8 = __VERIFIER_nondet_uchar() [L94] input_9 = __VERIFIER_nondet_uint() [L95] input_109 = __VERIFIER_nondet_uchar() [L97] SORT_1 var_93_arg_0 = input_7; [L98] SORT_1 var_93_arg_1 = state_91; [L99] SORT_1 var_93 = var_93_arg_0 == var_93_arg_1; [L100] SORT_1 var_94_arg_0 = var_51; [L101] SORT_1 var_94 = ~var_94_arg_0; [L102] SORT_1 var_95_arg_0 = var_93; [L103] SORT_1 var_95_arg_1 = var_94; [L104] SORT_1 var_95 = var_95_arg_0 | var_95_arg_1; [L105] var_95 = var_95 & mask_SORT_1 [L106] SORT_1 constr_96_arg_0 = var_95; [L107] CALL assume_abort_if_not(constr_96_arg_0) [L21] COND FALSE !(!cond) [L107] RET assume_abort_if_not(constr_96_arg_0) [L108] SORT_13 var_65_arg_0 = var_64; [L109] var_65_arg_0 = var_65_arg_0 & mask_SORT_13 [L110] SORT_11 var_65 = var_65_arg_0; [L111] SORT_11 var_66_arg_0 = state_60; [L112] SORT_11 var_66_arg_1 = var_65; [L113] SORT_1 var_66 = var_66_arg_0 == var_66_arg_1; [L114] SORT_1 var_97_arg_0 = var_66; [L115] SORT_1 var_97 = ~var_97_arg_0; [L116] SORT_1 var_98_arg_0 = input_6; [L117] SORT_1 var_98 = ~var_98_arg_0; [L118] SORT_1 var_99_arg_0 = var_97; [L119] SORT_1 var_99_arg_1 = var_98; [L120] SORT_1 var_99 = var_99_arg_0 | var_99_arg_1; [L121] SORT_1 var_100_arg_0 = var_51; [L122] SORT_1 var_100 = ~var_100_arg_0; [L123] SORT_1 var_101_arg_0 = var_99; [L124] SORT_1 var_101_arg_1 = var_100; [L125] SORT_1 var_101 = var_101_arg_0 | var_101_arg_1; [L126] var_101 = var_101 & mask_SORT_1 [L127] SORT_1 constr_102_arg_0 = var_101; [L128] CALL assume_abort_if_not(constr_102_arg_0) [L21] COND FALSE !(!cond) [L128] RET assume_abort_if_not(constr_102_arg_0) [L129] SORT_11 var_61_arg_0 = state_60; [L130] SORT_1 var_61 = var_61_arg_0 != 0; [L131] SORT_1 var_62_arg_0 = var_61; [L132] SORT_1 var_62 = ~var_62_arg_0; [L133] SORT_1 var_103_arg_0 = var_62; [L134] SORT_1 var_103 = ~var_103_arg_0; [L135] SORT_1 var_104_arg_0 = input_5; [L136] SORT_1 var_104 = ~var_104_arg_0; [L137] SORT_1 var_105_arg_0 = var_103; [L138] SORT_1 var_105_arg_1 = var_104; [L139] SORT_1 var_105 = var_105_arg_0 | var_105_arg_1; [L140] SORT_1 var_106_arg_0 = var_51; [L141] SORT_1 var_106 = ~var_106_arg_0; [L142] SORT_1 var_107_arg_0 = var_105; [L143] SORT_1 var_107_arg_1 = var_106; [L144] SORT_1 var_107 = var_107_arg_0 | var_107_arg_1; [L145] var_107 = var_107 & mask_SORT_1 [L146] SORT_1 constr_108_arg_0 = var_107; [L147] CALL assume_abort_if_not(constr_108_arg_0) [L21] COND FALSE !(!cond) [L147] RET assume_abort_if_not(constr_108_arg_0) [L149] SORT_1 var_112_arg_0 = state_91; [L150] SORT_1 var_112_arg_1 = var_111; [L151] SORT_1 var_112_arg_2 = var_51; [L152] SORT_1 var_112 = var_112_arg_0 ? var_112_arg_1 : var_112_arg_2; [L153] SORT_1 var_70_arg_0 = state_69; [L154] SORT_1 var_70 = ~var_70_arg_0; [L155] SORT_1 var_71_arg_0 = state_68; [L156] SORT_1 var_71_arg_1 = var_70; [L157] SORT_1 var_71 = var_71_arg_0 & var_71_arg_1; [L158] SORT_11 var_73_arg_0 = state_72; [L159] SORT_1 var_73 = var_73_arg_0 != 0; [L160] SORT_1 var_74_arg_0 = var_71; [L161] SORT_1 var_74_arg_1 = var_73; [L162] SORT_1 var_74 = var_74_arg_0 & var_74_arg_1; [L163] SORT_1 var_75_arg_0 = state_68; [L164] SORT_1 var_75 = ~var_75_arg_0; [L165] SORT_1 var_76_arg_0 = input_6; [L166] SORT_1 var_76_arg_1 = var_75; [L167] SORT_1 var_76 = var_76_arg_0 & var_76_arg_1; [L168] SORT_1 var_77_arg_0 = var_76; [L169] var_77_arg_0 = var_77_arg_0 & mask_SORT_1 [L170] SORT_11 var_77 = var_77_arg_0; [L171] SORT_11 var_78_arg_0 = state_72; [L172] SORT_11 var_78_arg_1 = var_77; [L173] SORT_11 var_78 = var_78_arg_0 + var_78_arg_1; [L174] SORT_1 var_79_arg_0 = input_5; [L175] var_79_arg_0 = var_79_arg_0 & mask_SORT_1 [L176] SORT_11 var_79 = var_79_arg_0; [L177] SORT_11 var_80_arg_0 = var_78; [L178] SORT_11 var_80_arg_1 = var_79; [L179] SORT_11 var_80 = var_80_arg_0 - var_80_arg_1; [L180] SORT_1 var_82_arg_0 = input_7; [L181] SORT_11 var_82_arg_1 = var_81; [L182] SORT_11 var_82_arg_2 = var_80; [L183] SORT_11 var_82 = var_82_arg_0 ? var_82_arg_1 : var_82_arg_2; [L184] var_82 = var_82 & mask_SORT_11 [L185] SORT_11 var_83_arg_0 = var_82; [L186] SORT_1 var_83 = var_83_arg_0 != 0; [L187] SORT_1 var_84_arg_0 = var_83; [L188] SORT_1 var_84 = ~var_84_arg_0; [L189] SORT_1 var_85_arg_0 = var_74; [L190] SORT_1 var_85_arg_1 = var_84; [L191] SORT_1 var_85 = var_85_arg_0 & var_85_arg_1; [L192] SORT_1 var_86_arg_0 = var_85; [L193] SORT_1 var_86 = ~var_86_arg_0; [L194] SORT_11 var_14_arg_0 = state_12; [L195] SORT_13 var_14 = var_14_arg_0 >> 0; [L196] var_14 = var_14 & mask_SORT_13 [L197] SORT_13 var_56_arg_0 = var_14; [L198] SORT_1 var_56 = var_56_arg_0 != 0; [L199] SORT_1 var_57_arg_0 = var_56; [L200] SORT_1 var_57 = ~var_57_arg_0; [L201] var_57 = var_57 & mask_SORT_1 [L202] SORT_1 var_52_arg_0 = var_51; [L203] var_52_arg_0 = var_52_arg_0 & mask_SORT_1 [L204] SORT_13 var_52 = var_52_arg_0; [L205] SORT_13 var_53_arg_0 = var_14; [L206] SORT_13 var_53_arg_1 = var_52; [L207] SORT_1 var_53 = var_53_arg_0 == var_53_arg_1; [L208] SORT_40 var_47_arg_0 = var_46; [L209] var_47_arg_0 = var_47_arg_0 & mask_SORT_40 [L210] SORT_13 var_47 = var_47_arg_0; [L211] SORT_13 var_48_arg_0 = var_14; [L212] SORT_13 var_48_arg_1 = var_47; [L213] SORT_1 var_48 = var_48_arg_0 == var_48_arg_1; [L214] SORT_40 var_42_arg_0 = var_41; [L215] var_42_arg_0 = var_42_arg_0 & mask_SORT_40 [L216] SORT_13 var_42 = var_42_arg_0; [L217] SORT_13 var_43_arg_0 = var_14; [L218] SORT_13 var_43_arg_1 = var_42; [L219] SORT_1 var_43 = var_43_arg_0 == var_43_arg_1; [L220] SORT_19 var_36_arg_0 = var_35; [L221] var_36_arg_0 = var_36_arg_0 & mask_SORT_19 [L222] SORT_13 var_36 = var_36_arg_0; [L223] SORT_13 var_37_arg_0 = var_14; [L224] SORT_13 var_37_arg_1 = var_36; [L225] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L226] SORT_19 var_31_arg_0 = var_30; [L227] var_31_arg_0 = var_31_arg_0 & mask_SORT_19 [L228] SORT_13 var_31 = var_31_arg_0; [L229] SORT_13 var_32_arg_0 = var_14; [L230] SORT_13 var_32_arg_1 = var_31; [L231] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L232] SORT_19 var_26_arg_0 = var_25; [L233] var_26_arg_0 = var_26_arg_0 & mask_SORT_19 [L234] SORT_13 var_26 = var_26_arg_0; [L235] SORT_13 var_27_arg_0 = var_14; [L236] SORT_13 var_27_arg_1 = var_26; [L237] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L238] SORT_19 var_21_arg_0 = var_20; [L239] var_21_arg_0 = var_21_arg_0 & mask_SORT_19 [L240] SORT_13 var_21 = var_21_arg_0; [L241] SORT_13 var_22_arg_0 = var_14; [L242] SORT_13 var_22_arg_1 = var_21; [L243] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L244] SORT_13 var_16_arg_0 = var_14; [L245] SORT_13 var_16_arg_1 = var_15; [L246] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1; [L247] SORT_1 var_17_arg_0 = var_16; [L248] SORT_3 var_17_arg_1 = state_10; [L249] SORT_3 var_17_arg_2 = input_9; [L250] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2; [L251] SORT_1 var_23_arg_0 = var_22; [L252] SORT_3 var_23_arg_1 = state_18; [L253] SORT_3 var_23_arg_2 = var_17; [L254] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L255] SORT_1 var_28_arg_0 = var_27; [L256] SORT_3 var_28_arg_1 = state_24; [L257] SORT_3 var_28_arg_2 = var_23; [L258] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L259] SORT_1 var_33_arg_0 = var_32; [L260] SORT_3 var_33_arg_1 = state_29; [L261] SORT_3 var_33_arg_2 = var_28; [L262] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L263] SORT_1 var_38_arg_0 = var_37; [L264] SORT_3 var_38_arg_1 = state_34; [L265] SORT_3 var_38_arg_2 = var_33; [L266] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L267] SORT_1 var_44_arg_0 = var_43; [L268] SORT_3 var_44_arg_1 = state_39; [L269] SORT_3 var_44_arg_2 = var_38; [L270] SORT_3 var_44 = var_44_arg_0 ? var_44_arg_1 : var_44_arg_2; [L271] SORT_1 var_49_arg_0 = var_48; [L272] SORT_3 var_49_arg_1 = state_45; [L273] SORT_3 var_49_arg_2 = var_44; [L274] SORT_3 var_49 = var_49_arg_0 ? var_49_arg_1 : var_49_arg_2; [L275] SORT_1 var_54_arg_0 = var_53; [L276] SORT_3 var_54_arg_1 = state_50; [L277] SORT_3 var_54_arg_2 = var_49; [L278] SORT_3 var_54 = var_54_arg_0 ? var_54_arg_1 : var_54_arg_2; [L279] SORT_1 var_58_arg_0 = var_57; [L280] SORT_3 var_58_arg_1 = state_55; [L281] SORT_3 var_58_arg_2 = var_54; [L282] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2; [L283] var_58 = var_58 & mask_SORT_3 [L284] SORT_3 var_88_arg_0 = state_87; [L285] SORT_3 var_88_arg_1 = var_58; [L286] SORT_1 var_88 = var_88_arg_0 == var_88_arg_1; [L287] SORT_1 var_89_arg_0 = var_86; [L288] SORT_1 var_89_arg_1 = var_88; [L289] SORT_1 var_89 = var_89_arg_0 | var_89_arg_1; [L290] SORT_1 var_110_arg_0 = state_91; [L291] SORT_1 var_110_arg_1 = input_109; [L292] SORT_1 var_110_arg_2 = var_89; [L293] SORT_1 var_110 = var_110_arg_0 ? var_110_arg_1 : var_110_arg_2; [L294] SORT_1 var_113_arg_0 = var_110; [L295] SORT_1 var_113 = ~var_113_arg_0; [L296] SORT_1 var_114_arg_0 = var_112; [L297] SORT_1 var_114_arg_1 = var_113; [L298] SORT_1 var_114 = var_114_arg_0 & var_114_arg_1; [L299] var_114 = var_114 & mask_SORT_1 [L300] SORT_1 bad_115_arg_0 = var_114; [L301] CALL __VERIFIER_assert(!(bad_115_arg_0)) [L20] COND FALSE !(!(cond)) [L301] RET __VERIFIER_assert(!(bad_115_arg_0)) [L303] SORT_11 var_137_arg_0 = state_136; [L304] SORT_13 var_137 = var_137_arg_0 >> 0; [L305] var_137 = var_137 & mask_SORT_13 [L306] SORT_13 var_194_arg_0 = var_137; [L307] SORT_13 var_194_arg_1 = var_15; [L308] SORT_1 var_194 = var_194_arg_0 == var_194_arg_1; [L309] SORT_1 var_195_arg_0 = input_6; [L310] SORT_1 var_195_arg_1 = var_194; [L311] SORT_1 var_195 = var_195_arg_0 & var_195_arg_1; [L312] var_195 = var_195 & mask_SORT_1 [L313] SORT_1 var_267_arg_0 = var_195; [L314] SORT_3 var_267_arg_1 = input_4; [L315] SORT_3 var_267_arg_2 = state_10; [L316] SORT_3 var_267 = var_267_arg_0 ? var_267_arg_1 : var_267_arg_2; [L317] SORT_1 var_269_arg_0 = input_7; [L318] SORT_3 var_269_arg_1 = var_268; [L319] SORT_3 var_269_arg_2 = var_267; [L320] SORT_3 var_269 = var_269_arg_0 ? var_269_arg_1 : var_269_arg_2; [L321] SORT_3 next_270_arg_1 = var_269; [L322] SORT_1 var_119_arg_0 = input_6; [L323] SORT_1 var_119_arg_1 = input_5; [L324] SORT_1 var_119 = var_119_arg_0 | var_119_arg_1; [L325] SORT_1 var_120_arg_0 = var_119; [L326] SORT_1 var_120_arg_1 = input_7; [L327] SORT_1 var_120 = var_120_arg_0 | var_120_arg_1; [L328] var_120 = var_120 & mask_SORT_1 [L329] SORT_1 var_198_arg_0 = input_5; [L330] var_198_arg_0 = var_198_arg_0 & mask_SORT_1 [L331] SORT_11 var_198 = var_198_arg_0; [L332] SORT_11 var_199_arg_0 = state_12; [L333] SORT_11 var_199_arg_1 = var_198; [L334] SORT_11 var_199 = var_199_arg_0 + var_199_arg_1; [L335] SORT_1 var_271_arg_0 = var_120; [L336] SORT_11 var_271_arg_1 = var_199; [L337] SORT_11 var_271_arg_2 = state_12; [L338] SORT_11 var_271 = var_271_arg_0 ? var_271_arg_1 : var_271_arg_2; [L339] SORT_1 var_272_arg_0 = input_7; [L340] SORT_11 var_272_arg_1 = var_81; [L341] SORT_11 var_272_arg_2 = var_271; [L342] SORT_11 var_272 = var_272_arg_0 ? var_272_arg_1 : var_272_arg_2; [L343] SORT_11 next_273_arg_1 = var_272; [L344] SORT_19 var_187_arg_0 = var_20; [L345] var_187_arg_0 = var_187_arg_0 & mask_SORT_19 [L346] SORT_13 var_187 = var_187_arg_0; [L347] SORT_13 var_188_arg_0 = var_137; [L348] SORT_13 var_188_arg_1 = var_187; [L349] SORT_1 var_188 = var_188_arg_0 == var_188_arg_1; [L350] SORT_1 var_189_arg_0 = input_6; [L351] SORT_1 var_189_arg_1 = var_188; [L352] SORT_1 var_189 = var_189_arg_0 & var_189_arg_1; [L353] var_189 = var_189 & mask_SORT_1 [L354] SORT_1 var_274_arg_0 = var_189; [L355] SORT_3 var_274_arg_1 = input_4; [L356] SORT_3 var_274_arg_2 = state_18; [L357] SORT_3 var_274 = var_274_arg_0 ? var_274_arg_1 : var_274_arg_2; [L358] SORT_1 var_275_arg_0 = input_7; [L359] SORT_3 var_275_arg_1 = var_268; [L360] SORT_3 var_275_arg_2 = var_274; [L361] SORT_3 var_275 = var_275_arg_0 ? var_275_arg_1 : var_275_arg_2; [L362] SORT_3 next_276_arg_1 = var_275; [L363] SORT_19 var_180_arg_0 = var_25; [L364] var_180_arg_0 = var_180_arg_0 & mask_SORT_19 [L365] SORT_13 var_180 = var_180_arg_0; [L366] SORT_13 var_181_arg_0 = var_137; [L367] SORT_13 var_181_arg_1 = var_180; [L368] SORT_1 var_181 = var_181_arg_0 == var_181_arg_1; [L369] SORT_1 var_182_arg_0 = input_6; [L370] SORT_1 var_182_arg_1 = var_181; [L371] SORT_1 var_182 = var_182_arg_0 & var_182_arg_1; [L372] var_182 = var_182 & mask_SORT_1 [L373] SORT_1 var_277_arg_0 = var_182; [L374] SORT_3 var_277_arg_1 = input_4; [L375] SORT_3 var_277_arg_2 = state_24; [L376] SORT_3 var_277 = var_277_arg_0 ? var_277_arg_1 : var_277_arg_2; [L377] SORT_1 var_278_arg_0 = input_7; [L378] SORT_3 var_278_arg_1 = var_268; [L379] SORT_3 var_278_arg_2 = var_277; [L380] SORT_3 var_278 = var_278_arg_0 ? var_278_arg_1 : var_278_arg_2; [L381] SORT_3 next_279_arg_1 = var_278; [L382] SORT_19 var_173_arg_0 = var_30; [L383] var_173_arg_0 = var_173_arg_0 & mask_SORT_19 [L384] SORT_13 var_173 = var_173_arg_0; [L385] SORT_13 var_174_arg_0 = var_137; [L386] SORT_13 var_174_arg_1 = var_173; [L387] SORT_1 var_174 = var_174_arg_0 == var_174_arg_1; [L388] SORT_1 var_175_arg_0 = input_6; [L389] SORT_1 var_175_arg_1 = var_174; [L390] SORT_1 var_175 = var_175_arg_0 & var_175_arg_1; [L391] var_175 = var_175 & mask_SORT_1 [L392] SORT_1 var_280_arg_0 = var_175; [L393] SORT_3 var_280_arg_1 = input_4; [L394] SORT_3 var_280_arg_2 = state_29; [L395] SORT_3 var_280 = var_280_arg_0 ? var_280_arg_1 : var_280_arg_2; [L396] SORT_1 var_281_arg_0 = input_7; [L397] SORT_3 var_281_arg_1 = var_268; [L398] SORT_3 var_281_arg_2 = var_280; [L399] SORT_3 var_281 = var_281_arg_0 ? var_281_arg_1 : var_281_arg_2; [L400] SORT_3 next_282_arg_1 = var_281; [L401] SORT_19 var_166_arg_0 = var_35; [L402] var_166_arg_0 = var_166_arg_0 & mask_SORT_19 [L403] SORT_13 var_166 = var_166_arg_0; [L404] SORT_13 var_167_arg_0 = var_137; [L405] SORT_13 var_167_arg_1 = var_166; [L406] SORT_1 var_167 = var_167_arg_0 == var_167_arg_1; [L407] SORT_1 var_168_arg_0 = input_6; [L408] SORT_1 var_168_arg_1 = var_167; [L409] SORT_1 var_168 = var_168_arg_0 & var_168_arg_1; [L410] var_168 = var_168 & mask_SORT_1 [L411] SORT_1 var_283_arg_0 = var_168; [L412] SORT_3 var_283_arg_1 = input_4; [L413] SORT_3 var_283_arg_2 = state_34; [L414] SORT_3 var_283 = var_283_arg_0 ? var_283_arg_1 : var_283_arg_2; [L415] SORT_1 var_284_arg_0 = input_7; [L416] SORT_3 var_284_arg_1 = var_268; [L417] SORT_3 var_284_arg_2 = var_283; [L418] SORT_3 var_284 = var_284_arg_0 ? var_284_arg_1 : var_284_arg_2; [L419] SORT_3 next_285_arg_1 = var_284; [L420] SORT_40 var_159_arg_0 = var_41; [L421] var_159_arg_0 = var_159_arg_0 & mask_SORT_40 [L422] SORT_13 var_159 = var_159_arg_0; [L423] SORT_13 var_160_arg_0 = var_137; [L424] SORT_13 var_160_arg_1 = var_159; [L425] SORT_1 var_160 = var_160_arg_0 == var_160_arg_1; [L426] SORT_1 var_161_arg_0 = input_6; [L427] SORT_1 var_161_arg_1 = var_160; [L428] SORT_1 var_161 = var_161_arg_0 & var_161_arg_1; [L429] var_161 = var_161 & mask_SORT_1 [L430] SORT_1 var_286_arg_0 = var_161; [L431] SORT_3 var_286_arg_1 = input_4; [L432] SORT_3 var_286_arg_2 = state_39; [L433] SORT_3 var_286 = var_286_arg_0 ? var_286_arg_1 : var_286_arg_2; [L434] SORT_1 var_287_arg_0 = input_7; [L435] SORT_3 var_287_arg_1 = var_268; [L436] SORT_3 var_287_arg_2 = var_286; [L437] SORT_3 var_287 = var_287_arg_0 ? var_287_arg_1 : var_287_arg_2; [L438] SORT_3 next_288_arg_1 = var_287; [L439] SORT_40 var_152_arg_0 = var_46; [L440] var_152_arg_0 = var_152_arg_0 & mask_SORT_40 [L441] SORT_13 var_152 = var_152_arg_0; [L442] SORT_13 var_153_arg_0 = var_137; [L443] SORT_13 var_153_arg_1 = var_152; [L444] SORT_1 var_153 = var_153_arg_0 == var_153_arg_1; [L445] SORT_1 var_154_arg_0 = input_6; [L446] SORT_1 var_154_arg_1 = var_153; [L447] SORT_1 var_154 = var_154_arg_0 & var_154_arg_1; [L448] var_154 = var_154 & mask_SORT_1 [L449] SORT_1 var_289_arg_0 = var_154; [L450] SORT_3 var_289_arg_1 = input_4; [L451] SORT_3 var_289_arg_2 = state_45; [L452] SORT_3 var_289 = var_289_arg_0 ? var_289_arg_1 : var_289_arg_2; [L453] SORT_1 var_290_arg_0 = input_7; [L454] SORT_3 var_290_arg_1 = var_268; [L455] SORT_3 var_290_arg_2 = var_289; [L456] SORT_3 var_290 = var_290_arg_0 ? var_290_arg_1 : var_290_arg_2; [L457] SORT_3 next_291_arg_1 = var_290; [L458] SORT_1 var_145_arg_0 = var_51; [L459] var_145_arg_0 = var_145_arg_0 & mask_SORT_1 [L460] SORT_13 var_145 = var_145_arg_0; [L461] SORT_13 var_146_arg_0 = var_137; [L462] SORT_13 var_146_arg_1 = var_145; [L463] SORT_1 var_146 = var_146_arg_0 == var_146_arg_1; [L464] SORT_1 var_147_arg_0 = input_6; [L465] SORT_1 var_147_arg_1 = var_146; [L466] SORT_1 var_147 = var_147_arg_0 & var_147_arg_1; [L467] var_147 = var_147 & mask_SORT_1 [L468] SORT_1 var_292_arg_0 = var_147; [L469] SORT_3 var_292_arg_1 = input_4; [L470] SORT_3 var_292_arg_2 = state_50; [L471] SORT_3 var_292 = var_292_arg_0 ? var_292_arg_1 : var_292_arg_2; [L472] SORT_1 var_293_arg_0 = input_7; [L473] SORT_3 var_293_arg_1 = var_268; [L474] SORT_3 var_293_arg_2 = var_292; [L475] SORT_3 var_293 = var_293_arg_0 ? var_293_arg_1 : var_293_arg_2; [L476] SORT_3 next_294_arg_1 = var_293; [L477] SORT_13 var_138_arg_0 = var_137; [L478] SORT_1 var_138 = var_138_arg_0 != 0; [L479] SORT_1 var_139_arg_0 = var_138; [L480] SORT_1 var_139 = ~var_139_arg_0; [L481] SORT_1 var_140_arg_0 = input_6; [L482] SORT_1 var_140_arg_1 = var_139; [L483] SORT_1 var_140 = var_140_arg_0 & var_140_arg_1; [L484] var_140 = var_140 & mask_SORT_1 [L485] SORT_1 var_295_arg_0 = var_140; [L486] SORT_3 var_295_arg_1 = input_4; [L487] SORT_3 var_295_arg_2 = state_55; [L488] SORT_3 var_295 = var_295_arg_0 ? var_295_arg_1 : var_295_arg_2; [L489] SORT_1 var_296_arg_0 = input_7; [L490] SORT_3 var_296_arg_1 = var_268; [L491] SORT_3 var_296_arg_2 = var_295; [L492] SORT_3 var_296 = var_296_arg_0 ? var_296_arg_1 : var_296_arg_2; [L493] SORT_3 next_297_arg_1 = var_296; [L494] SORT_1 var_298_arg_0 = input_6; [L495] var_298_arg_0 = var_298_arg_0 & mask_SORT_1 [L496] SORT_11 var_298 = var_298_arg_0; [L497] SORT_11 var_299_arg_0 = state_60; [L498] SORT_11 var_299_arg_1 = var_298; [L499] SORT_11 var_299 = var_299_arg_0 + var_299_arg_1; [L500] SORT_1 var_300_arg_0 = input_5; [L501] var_300_arg_0 = var_300_arg_0 & mask_SORT_1 [L502] SORT_11 var_300 = var_300_arg_0; [L503] SORT_11 var_301_arg_0 = var_299; [L504] SORT_11 var_301_arg_1 = var_300; [L505] SORT_11 var_301 = var_301_arg_0 - var_301_arg_1; [L506] SORT_1 var_302_arg_0 = input_7; [L507] SORT_11 var_302_arg_1 = var_81; [L508] SORT_11 var_302_arg_2 = var_301; [L509] SORT_11 var_302 = var_302_arg_0 ? var_302_arg_1 : var_302_arg_2; [L510] var_302 = var_302 & mask_SORT_11 [L511] SORT_11 next_303_arg_1 = var_302; [L512] SORT_1 var_228_arg_0 = state_68; [L513] SORT_1 var_228 = ~var_228_arg_0; [L514] var_228 = var_228 & mask_SORT_1 [L515] SORT_1 var_224_arg_0 = input_8; [L516] SORT_1 var_224_arg_1 = input_6; [L517] SORT_1 var_224 = var_224_arg_0 & var_224_arg_1; [L518] SORT_1 var_225_arg_0 = state_68; [L519] SORT_1 var_225_arg_1 = var_224; [L520] SORT_1 var_225 = var_225_arg_0 | var_225_arg_1; [L521] SORT_1 var_304_arg_0 = var_228; [L522] SORT_1 var_304_arg_1 = var_225; [L523] SORT_1 var_304_arg_2 = state_68; [L524] SORT_1 var_304 = var_304_arg_0 ? var_304_arg_1 : var_304_arg_2; [L525] SORT_1 var_305_arg_0 = input_7; [L526] SORT_1 var_305_arg_1 = var_111; [L527] SORT_1 var_305_arg_2 = var_304; [L528] SORT_1 var_305 = var_305_arg_0 ? var_305_arg_1 : var_305_arg_2; [L529] SORT_1 next_306_arg_1 = var_305; [L530] SORT_1 var_236_arg_0 = var_85; [L531] SORT_1 var_236_arg_1 = state_69; [L532] SORT_1 var_236 = var_236_arg_0 | var_236_arg_1; [L533] SORT_1 var_307_arg_0 = var_51; [L534] SORT_1 var_307_arg_1 = var_236; [L535] SORT_1 var_307_arg_2 = state_69; [L536] SORT_1 var_307 = var_307_arg_0 ? var_307_arg_1 : var_307_arg_2; [L537] SORT_1 var_308_arg_0 = input_7; [L538] SORT_1 var_308_arg_1 = var_111; [L539] SORT_1 var_308_arg_2 = var_307; [L540] SORT_1 var_308 = var_308_arg_0 ? var_308_arg_1 : var_308_arg_2; [L541] SORT_1 next_309_arg_1 = var_308; [L542] SORT_1 var_248_arg_0 = input_6; [L543] SORT_1 var_248_arg_1 = input_5; [L544] SORT_1 var_248 = var_248_arg_0 | var_248_arg_1; [L545] SORT_1 var_249_arg_0 = var_248; [L546] SORT_1 var_249_arg_1 = input_7; [L547] SORT_1 var_249 = var_249_arg_0 | var_249_arg_1; [L548] SORT_1 var_250_arg_0 = var_249; [L549] SORT_1 var_250_arg_1 = state_68; [L550] SORT_1 var_250 = var_250_arg_0 | var_250_arg_1; [L551] var_250 = var_250 & mask_SORT_1 [L552] SORT_1 var_310_arg_0 = var_250; [L553] SORT_11 var_310_arg_1 = var_82; [L554] SORT_11 var_310_arg_2 = state_72; [L555] SORT_11 var_310 = var_310_arg_0 ? var_310_arg_1 : var_310_arg_2; [L556] SORT_1 var_311_arg_0 = input_7; [L557] SORT_11 var_311_arg_1 = var_81; [L558] SORT_11 var_311_arg_2 = var_310; [L559] SORT_11 var_311 = var_311_arg_0 ? var_311_arg_1 : var_311_arg_2; [L560] var_311 = var_311 & mask_SORT_11 [L561] SORT_11 next_312_arg_1 = var_311; [L562] SORT_1 var_233_arg_0 = var_224; [L563] SORT_1 var_233_arg_1 = var_228; [L564] SORT_1 var_233 = var_233_arg_0 & var_233_arg_1; [L565] var_233 = var_233 & mask_SORT_1 [L566] SORT_1 var_313_arg_0 = var_233; [L567] SORT_3 var_313_arg_1 = input_4; [L568] SORT_3 var_313_arg_2 = state_87; [L569] SORT_3 var_313 = var_313_arg_0 ? var_313_arg_1 : var_313_arg_2; [L570] SORT_1 var_314_arg_0 = input_7; [L571] SORT_3 var_314_arg_1 = var_268; [L572] SORT_3 var_314_arg_2 = var_313; [L573] SORT_3 var_314 = var_314_arg_0 ? var_314_arg_1 : var_314_arg_2; [L574] var_314 = var_314 & mask_SORT_3 [L575] SORT_3 next_315_arg_1 = var_314; [L576] SORT_1 next_316_arg_1 = var_111; [L577] SORT_1 var_204_arg_0 = input_6; [L578] var_204_arg_0 = var_204_arg_0 & mask_SORT_1 [L579] SORT_11 var_204 = var_204_arg_0; [L580] SORT_11 var_205_arg_0 = state_136; [L581] SORT_11 var_205_arg_1 = var_204; [L582] SORT_11 var_205 = var_205_arg_0 + var_205_arg_1; [L583] SORT_1 var_317_arg_0 = var_120; [L584] SORT_11 var_317_arg_1 = var_205; [L585] SORT_11 var_317_arg_2 = state_136; [L586] SORT_11 var_317 = var_317_arg_0 ? var_317_arg_1 : var_317_arg_2; [L587] SORT_1 var_318_arg_0 = input_7; [L588] SORT_11 var_318_arg_1 = var_81; [L589] SORT_11 var_318_arg_2 = var_317; [L590] SORT_11 var_318 = var_318_arg_0 ? var_318_arg_1 : var_318_arg_2; [L591] SORT_11 next_319_arg_1 = var_318; [L593] state_10 = next_270_arg_1 [L594] state_12 = next_273_arg_1 [L595] state_18 = next_276_arg_1 [L596] state_24 = next_279_arg_1 [L597] state_29 = next_282_arg_1 [L598] state_34 = next_285_arg_1 [L599] state_39 = next_288_arg_1 [L600] state_45 = next_291_arg_1 [L601] state_50 = next_294_arg_1 [L602] state_55 = next_297_arg_1 [L603] state_60 = next_303_arg_1 [L604] state_68 = next_306_arg_1 [L605] state_69 = next_309_arg_1 [L606] state_72 = next_312_arg_1 [L607] state_87 = next_315_arg_1 [L608] state_91 = next_316_arg_1 [L609] state_136 = next_319_arg_1 [L87] input_2 = __VERIFIER_nondet_uchar() [L88] input_4 = __VERIFIER_nondet_uint() [L89] input_5 = __VERIFIER_nondet_uchar() [L90] input_6 = __VERIFIER_nondet_uchar() [L91] input_7 = __VERIFIER_nondet_uchar() [L92] input_7 = input_7 & mask_SORT_1 [L93] input_8 = __VERIFIER_nondet_uchar() [L94] input_9 = __VERIFIER_nondet_uint() [L95] input_109 = __VERIFIER_nondet_uchar() [L97] SORT_1 var_93_arg_0 = input_7; [L98] SORT_1 var_93_arg_1 = state_91; [L99] SORT_1 var_93 = var_93_arg_0 == var_93_arg_1; [L100] SORT_1 var_94_arg_0 = var_51; [L101] SORT_1 var_94 = ~var_94_arg_0; [L102] SORT_1 var_95_arg_0 = var_93; [L103] SORT_1 var_95_arg_1 = var_94; [L104] SORT_1 var_95 = var_95_arg_0 | var_95_arg_1; [L105] var_95 = var_95 & mask_SORT_1 [L106] SORT_1 constr_96_arg_0 = var_95; [L107] CALL assume_abort_if_not(constr_96_arg_0) [L21] COND FALSE !(!cond) [L107] RET assume_abort_if_not(constr_96_arg_0) [L108] SORT_13 var_65_arg_0 = var_64; [L109] var_65_arg_0 = var_65_arg_0 & mask_SORT_13 [L110] SORT_11 var_65 = var_65_arg_0; [L111] SORT_11 var_66_arg_0 = state_60; [L112] SORT_11 var_66_arg_1 = var_65; [L113] SORT_1 var_66 = var_66_arg_0 == var_66_arg_1; [L114] SORT_1 var_97_arg_0 = var_66; [L115] SORT_1 var_97 = ~var_97_arg_0; [L116] SORT_1 var_98_arg_0 = input_6; [L117] SORT_1 var_98 = ~var_98_arg_0; [L118] SORT_1 var_99_arg_0 = var_97; [L119] SORT_1 var_99_arg_1 = var_98; [L120] SORT_1 var_99 = var_99_arg_0 | var_99_arg_1; [L121] SORT_1 var_100_arg_0 = var_51; [L122] SORT_1 var_100 = ~var_100_arg_0; [L123] SORT_1 var_101_arg_0 = var_99; [L124] SORT_1 var_101_arg_1 = var_100; [L125] SORT_1 var_101 = var_101_arg_0 | var_101_arg_1; [L126] var_101 = var_101 & mask_SORT_1 [L127] SORT_1 constr_102_arg_0 = var_101; [L128] CALL assume_abort_if_not(constr_102_arg_0) [L21] COND FALSE !(!cond) [L128] RET assume_abort_if_not(constr_102_arg_0) [L129] SORT_11 var_61_arg_0 = state_60; [L130] SORT_1 var_61 = var_61_arg_0 != 0; [L131] SORT_1 var_62_arg_0 = var_61; [L132] SORT_1 var_62 = ~var_62_arg_0; [L133] SORT_1 var_103_arg_0 = var_62; [L134] SORT_1 var_103 = ~var_103_arg_0; [L135] SORT_1 var_104_arg_0 = input_5; [L136] SORT_1 var_104 = ~var_104_arg_0; [L137] SORT_1 var_105_arg_0 = var_103; [L138] SORT_1 var_105_arg_1 = var_104; [L139] SORT_1 var_105 = var_105_arg_0 | var_105_arg_1; [L140] SORT_1 var_106_arg_0 = var_51; [L141] SORT_1 var_106 = ~var_106_arg_0; [L142] SORT_1 var_107_arg_0 = var_105; [L143] SORT_1 var_107_arg_1 = var_106; [L144] SORT_1 var_107 = var_107_arg_0 | var_107_arg_1; [L145] var_107 = var_107 & mask_SORT_1 [L146] SORT_1 constr_108_arg_0 = var_107; [L147] CALL assume_abort_if_not(constr_108_arg_0) [L21] COND FALSE !(!cond) [L147] RET assume_abort_if_not(constr_108_arg_0) [L149] SORT_1 var_112_arg_0 = state_91; [L150] SORT_1 var_112_arg_1 = var_111; [L151] SORT_1 var_112_arg_2 = var_51; [L152] SORT_1 var_112 = var_112_arg_0 ? var_112_arg_1 : var_112_arg_2; [L153] SORT_1 var_70_arg_0 = state_69; [L154] SORT_1 var_70 = ~var_70_arg_0; [L155] SORT_1 var_71_arg_0 = state_68; [L156] SORT_1 var_71_arg_1 = var_70; [L157] SORT_1 var_71 = var_71_arg_0 & var_71_arg_1; [L158] SORT_11 var_73_arg_0 = state_72; [L159] SORT_1 var_73 = var_73_arg_0 != 0; [L160] SORT_1 var_74_arg_0 = var_71; [L161] SORT_1 var_74_arg_1 = var_73; [L162] SORT_1 var_74 = var_74_arg_0 & var_74_arg_1; [L163] SORT_1 var_75_arg_0 = state_68; [L164] SORT_1 var_75 = ~var_75_arg_0; [L165] SORT_1 var_76_arg_0 = input_6; [L166] SORT_1 var_76_arg_1 = var_75; [L167] SORT_1 var_76 = var_76_arg_0 & var_76_arg_1; [L168] SORT_1 var_77_arg_0 = var_76; [L169] var_77_arg_0 = var_77_arg_0 & mask_SORT_1 [L170] SORT_11 var_77 = var_77_arg_0; [L171] SORT_11 var_78_arg_0 = state_72; [L172] SORT_11 var_78_arg_1 = var_77; [L173] SORT_11 var_78 = var_78_arg_0 + var_78_arg_1; [L174] SORT_1 var_79_arg_0 = input_5; [L175] var_79_arg_0 = var_79_arg_0 & mask_SORT_1 [L176] SORT_11 var_79 = var_79_arg_0; [L177] SORT_11 var_80_arg_0 = var_78; [L178] SORT_11 var_80_arg_1 = var_79; [L179] SORT_11 var_80 = var_80_arg_0 - var_80_arg_1; [L180] SORT_1 var_82_arg_0 = input_7; [L181] SORT_11 var_82_arg_1 = var_81; [L182] SORT_11 var_82_arg_2 = var_80; [L183] SORT_11 var_82 = var_82_arg_0 ? var_82_arg_1 : var_82_arg_2; [L184] var_82 = var_82 & mask_SORT_11 [L185] SORT_11 var_83_arg_0 = var_82; [L186] SORT_1 var_83 = var_83_arg_0 != 0; [L187] SORT_1 var_84_arg_0 = var_83; [L188] SORT_1 var_84 = ~var_84_arg_0; [L189] SORT_1 var_85_arg_0 = var_74; [L190] SORT_1 var_85_arg_1 = var_84; [L191] SORT_1 var_85 = var_85_arg_0 & var_85_arg_1; [L192] SORT_1 var_86_arg_0 = var_85; [L193] SORT_1 var_86 = ~var_86_arg_0; [L194] SORT_11 var_14_arg_0 = state_12; [L195] SORT_13 var_14 = var_14_arg_0 >> 0; [L196] var_14 = var_14 & mask_SORT_13 [L197] SORT_13 var_56_arg_0 = var_14; [L198] SORT_1 var_56 = var_56_arg_0 != 0; [L199] SORT_1 var_57_arg_0 = var_56; [L200] SORT_1 var_57 = ~var_57_arg_0; [L201] var_57 = var_57 & mask_SORT_1 [L202] SORT_1 var_52_arg_0 = var_51; [L203] var_52_arg_0 = var_52_arg_0 & mask_SORT_1 [L204] SORT_13 var_52 = var_52_arg_0; [L205] SORT_13 var_53_arg_0 = var_14; [L206] SORT_13 var_53_arg_1 = var_52; [L207] SORT_1 var_53 = var_53_arg_0 == var_53_arg_1; [L208] SORT_40 var_47_arg_0 = var_46; [L209] var_47_arg_0 = var_47_arg_0 & mask_SORT_40 [L210] SORT_13 var_47 = var_47_arg_0; [L211] SORT_13 var_48_arg_0 = var_14; [L212] SORT_13 var_48_arg_1 = var_47; [L213] SORT_1 var_48 = var_48_arg_0 == var_48_arg_1; [L214] SORT_40 var_42_arg_0 = var_41; [L215] var_42_arg_0 = var_42_arg_0 & mask_SORT_40 [L216] SORT_13 var_42 = var_42_arg_0; [L217] SORT_13 var_43_arg_0 = var_14; [L218] SORT_13 var_43_arg_1 = var_42; [L219] SORT_1 var_43 = var_43_arg_0 == var_43_arg_1; [L220] SORT_19 var_36_arg_0 = var_35; [L221] var_36_arg_0 = var_36_arg_0 & mask_SORT_19 [L222] SORT_13 var_36 = var_36_arg_0; [L223] SORT_13 var_37_arg_0 = var_14; [L224] SORT_13 var_37_arg_1 = var_36; [L225] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L226] SORT_19 var_31_arg_0 = var_30; [L227] var_31_arg_0 = var_31_arg_0 & mask_SORT_19 [L228] SORT_13 var_31 = var_31_arg_0; [L229] SORT_13 var_32_arg_0 = var_14; [L230] SORT_13 var_32_arg_1 = var_31; [L231] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L232] SORT_19 var_26_arg_0 = var_25; [L233] var_26_arg_0 = var_26_arg_0 & mask_SORT_19 [L234] SORT_13 var_26 = var_26_arg_0; [L235] SORT_13 var_27_arg_0 = var_14; [L236] SORT_13 var_27_arg_1 = var_26; [L237] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L238] SORT_19 var_21_arg_0 = var_20; [L239] var_21_arg_0 = var_21_arg_0 & mask_SORT_19 [L240] SORT_13 var_21 = var_21_arg_0; [L241] SORT_13 var_22_arg_0 = var_14; [L242] SORT_13 var_22_arg_1 = var_21; [L243] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L244] SORT_13 var_16_arg_0 = var_14; [L245] SORT_13 var_16_arg_1 = var_15; [L246] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1; [L247] SORT_1 var_17_arg_0 = var_16; [L248] SORT_3 var_17_arg_1 = state_10; [L249] SORT_3 var_17_arg_2 = input_9; [L250] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2; [L251] SORT_1 var_23_arg_0 = var_22; [L252] SORT_3 var_23_arg_1 = state_18; [L253] SORT_3 var_23_arg_2 = var_17; [L254] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L255] SORT_1 var_28_arg_0 = var_27; [L256] SORT_3 var_28_arg_1 = state_24; [L257] SORT_3 var_28_arg_2 = var_23; [L258] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L259] SORT_1 var_33_arg_0 = var_32; [L260] SORT_3 var_33_arg_1 = state_29; [L261] SORT_3 var_33_arg_2 = var_28; [L262] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L263] SORT_1 var_38_arg_0 = var_37; [L264] SORT_3 var_38_arg_1 = state_34; [L265] SORT_3 var_38_arg_2 = var_33; [L266] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L267] SORT_1 var_44_arg_0 = var_43; [L268] SORT_3 var_44_arg_1 = state_39; [L269] SORT_3 var_44_arg_2 = var_38; [L270] SORT_3 var_44 = var_44_arg_0 ? var_44_arg_1 : var_44_arg_2; [L271] SORT_1 var_49_arg_0 = var_48; [L272] SORT_3 var_49_arg_1 = state_45; [L273] SORT_3 var_49_arg_2 = var_44; [L274] SORT_3 var_49 = var_49_arg_0 ? var_49_arg_1 : var_49_arg_2; [L275] SORT_1 var_54_arg_0 = var_53; [L276] SORT_3 var_54_arg_1 = state_50; [L277] SORT_3 var_54_arg_2 = var_49; [L278] SORT_3 var_54 = var_54_arg_0 ? var_54_arg_1 : var_54_arg_2; [L279] SORT_1 var_58_arg_0 = var_57; [L280] SORT_3 var_58_arg_1 = state_55; [L281] SORT_3 var_58_arg_2 = var_54; [L282] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2; [L283] var_58 = var_58 & mask_SORT_3 [L284] SORT_3 var_88_arg_0 = state_87; [L285] SORT_3 var_88_arg_1 = var_58; [L286] SORT_1 var_88 = var_88_arg_0 == var_88_arg_1; [L287] SORT_1 var_89_arg_0 = var_86; [L288] SORT_1 var_89_arg_1 = var_88; [L289] SORT_1 var_89 = var_89_arg_0 | var_89_arg_1; [L290] SORT_1 var_110_arg_0 = state_91; [L291] SORT_1 var_110_arg_1 = input_109; [L292] SORT_1 var_110_arg_2 = var_89; [L293] SORT_1 var_110 = var_110_arg_0 ? var_110_arg_1 : var_110_arg_2; [L294] SORT_1 var_113_arg_0 = var_110; [L295] SORT_1 var_113 = ~var_113_arg_0; [L296] SORT_1 var_114_arg_0 = var_112; [L297] SORT_1 var_114_arg_1 = var_113; [L298] SORT_1 var_114 = var_114_arg_0 & var_114_arg_1; [L299] var_114 = var_114 & mask_SORT_1 [L300] SORT_1 bad_115_arg_0 = var_114; [L301] CALL __VERIFIER_assert(!(bad_115_arg_0)) [L20] COND FALSE !(!(cond)) [L301] RET __VERIFIER_assert(!(bad_115_arg_0)) [L303] SORT_11 var_137_arg_0 = state_136; [L304] SORT_13 var_137 = var_137_arg_0 >> 0; [L305] var_137 = var_137 & mask_SORT_13 [L306] SORT_13 var_194_arg_0 = var_137; [L307] SORT_13 var_194_arg_1 = var_15; [L308] SORT_1 var_194 = var_194_arg_0 == var_194_arg_1; [L309] SORT_1 var_195_arg_0 = input_6; [L310] SORT_1 var_195_arg_1 = var_194; [L311] SORT_1 var_195 = var_195_arg_0 & var_195_arg_1; [L312] var_195 = var_195 & mask_SORT_1 [L313] SORT_1 var_267_arg_0 = var_195; [L314] SORT_3 var_267_arg_1 = input_4; [L315] SORT_3 var_267_arg_2 = state_10; [L316] SORT_3 var_267 = var_267_arg_0 ? var_267_arg_1 : var_267_arg_2; [L317] SORT_1 var_269_arg_0 = input_7; [L318] SORT_3 var_269_arg_1 = var_268; [L319] SORT_3 var_269_arg_2 = var_267; [L320] SORT_3 var_269 = var_269_arg_0 ? var_269_arg_1 : var_269_arg_2; [L321] SORT_3 next_270_arg_1 = var_269; [L322] SORT_1 var_119_arg_0 = input_6; [L323] SORT_1 var_119_arg_1 = input_5; [L324] SORT_1 var_119 = var_119_arg_0 | var_119_arg_1; [L325] SORT_1 var_120_arg_0 = var_119; [L326] SORT_1 var_120_arg_1 = input_7; [L327] SORT_1 var_120 = var_120_arg_0 | var_120_arg_1; [L328] var_120 = var_120 & mask_SORT_1 [L329] SORT_1 var_198_arg_0 = input_5; [L330] var_198_arg_0 = var_198_arg_0 & mask_SORT_1 [L331] SORT_11 var_198 = var_198_arg_0; [L332] SORT_11 var_199_arg_0 = state_12; [L333] SORT_11 var_199_arg_1 = var_198; [L334] SORT_11 var_199 = var_199_arg_0 + var_199_arg_1; [L335] SORT_1 var_271_arg_0 = var_120; [L336] SORT_11 var_271_arg_1 = var_199; [L337] SORT_11 var_271_arg_2 = state_12; [L338] SORT_11 var_271 = var_271_arg_0 ? var_271_arg_1 : var_271_arg_2; [L339] SORT_1 var_272_arg_0 = input_7; [L340] SORT_11 var_272_arg_1 = var_81; [L341] SORT_11 var_272_arg_2 = var_271; [L342] SORT_11 var_272 = var_272_arg_0 ? var_272_arg_1 : var_272_arg_2; [L343] SORT_11 next_273_arg_1 = var_272; [L344] SORT_19 var_187_arg_0 = var_20; [L345] var_187_arg_0 = var_187_arg_0 & mask_SORT_19 [L346] SORT_13 var_187 = var_187_arg_0; [L347] SORT_13 var_188_arg_0 = var_137; [L348] SORT_13 var_188_arg_1 = var_187; [L349] SORT_1 var_188 = var_188_arg_0 == var_188_arg_1; [L350] SORT_1 var_189_arg_0 = input_6; [L351] SORT_1 var_189_arg_1 = var_188; [L352] SORT_1 var_189 = var_189_arg_0 & var_189_arg_1; [L353] var_189 = var_189 & mask_SORT_1 [L354] SORT_1 var_274_arg_0 = var_189; [L355] SORT_3 var_274_arg_1 = input_4; [L356] SORT_3 var_274_arg_2 = state_18; [L357] SORT_3 var_274 = var_274_arg_0 ? var_274_arg_1 : var_274_arg_2; [L358] SORT_1 var_275_arg_0 = input_7; [L359] SORT_3 var_275_arg_1 = var_268; [L360] SORT_3 var_275_arg_2 = var_274; [L361] SORT_3 var_275 = var_275_arg_0 ? var_275_arg_1 : var_275_arg_2; [L362] SORT_3 next_276_arg_1 = var_275; [L363] SORT_19 var_180_arg_0 = var_25; [L364] var_180_arg_0 = var_180_arg_0 & mask_SORT_19 [L365] SORT_13 var_180 = var_180_arg_0; [L366] SORT_13 var_181_arg_0 = var_137; [L367] SORT_13 var_181_arg_1 = var_180; [L368] SORT_1 var_181 = var_181_arg_0 == var_181_arg_1; [L369] SORT_1 var_182_arg_0 = input_6; [L370] SORT_1 var_182_arg_1 = var_181; [L371] SORT_1 var_182 = var_182_arg_0 & var_182_arg_1; [L372] var_182 = var_182 & mask_SORT_1 [L373] SORT_1 var_277_arg_0 = var_182; [L374] SORT_3 var_277_arg_1 = input_4; [L375] SORT_3 var_277_arg_2 = state_24; [L376] SORT_3 var_277 = var_277_arg_0 ? var_277_arg_1 : var_277_arg_2; [L377] SORT_1 var_278_arg_0 = input_7; [L378] SORT_3 var_278_arg_1 = var_268; [L379] SORT_3 var_278_arg_2 = var_277; [L380] SORT_3 var_278 = var_278_arg_0 ? var_278_arg_1 : var_278_arg_2; [L381] SORT_3 next_279_arg_1 = var_278; [L382] SORT_19 var_173_arg_0 = var_30; [L383] var_173_arg_0 = var_173_arg_0 & mask_SORT_19 [L384] SORT_13 var_173 = var_173_arg_0; [L385] SORT_13 var_174_arg_0 = var_137; [L386] SORT_13 var_174_arg_1 = var_173; [L387] SORT_1 var_174 = var_174_arg_0 == var_174_arg_1; [L388] SORT_1 var_175_arg_0 = input_6; [L389] SORT_1 var_175_arg_1 = var_174; [L390] SORT_1 var_175 = var_175_arg_0 & var_175_arg_1; [L391] var_175 = var_175 & mask_SORT_1 [L392] SORT_1 var_280_arg_0 = var_175; [L393] SORT_3 var_280_arg_1 = input_4; [L394] SORT_3 var_280_arg_2 = state_29; [L395] SORT_3 var_280 = var_280_arg_0 ? var_280_arg_1 : var_280_arg_2; [L396] SORT_1 var_281_arg_0 = input_7; [L397] SORT_3 var_281_arg_1 = var_268; [L398] SORT_3 var_281_arg_2 = var_280; [L399] SORT_3 var_281 = var_281_arg_0 ? var_281_arg_1 : var_281_arg_2; [L400] SORT_3 next_282_arg_1 = var_281; [L401] SORT_19 var_166_arg_0 = var_35; [L402] var_166_arg_0 = var_166_arg_0 & mask_SORT_19 [L403] SORT_13 var_166 = var_166_arg_0; [L404] SORT_13 var_167_arg_0 = var_137; [L405] SORT_13 var_167_arg_1 = var_166; [L406] SORT_1 var_167 = var_167_arg_0 == var_167_arg_1; [L407] SORT_1 var_168_arg_0 = input_6; [L408] SORT_1 var_168_arg_1 = var_167; [L409] SORT_1 var_168 = var_168_arg_0 & var_168_arg_1; [L410] var_168 = var_168 & mask_SORT_1 [L411] SORT_1 var_283_arg_0 = var_168; [L412] SORT_3 var_283_arg_1 = input_4; [L413] SORT_3 var_283_arg_2 = state_34; [L414] SORT_3 var_283 = var_283_arg_0 ? var_283_arg_1 : var_283_arg_2; [L415] SORT_1 var_284_arg_0 = input_7; [L416] SORT_3 var_284_arg_1 = var_268; [L417] SORT_3 var_284_arg_2 = var_283; [L418] SORT_3 var_284 = var_284_arg_0 ? var_284_arg_1 : var_284_arg_2; [L419] SORT_3 next_285_arg_1 = var_284; [L420] SORT_40 var_159_arg_0 = var_41; [L421] var_159_arg_0 = var_159_arg_0 & mask_SORT_40 [L422] SORT_13 var_159 = var_159_arg_0; [L423] SORT_13 var_160_arg_0 = var_137; [L424] SORT_13 var_160_arg_1 = var_159; [L425] SORT_1 var_160 = var_160_arg_0 == var_160_arg_1; [L426] SORT_1 var_161_arg_0 = input_6; [L427] SORT_1 var_161_arg_1 = var_160; [L428] SORT_1 var_161 = var_161_arg_0 & var_161_arg_1; [L429] var_161 = var_161 & mask_SORT_1 [L430] SORT_1 var_286_arg_0 = var_161; [L431] SORT_3 var_286_arg_1 = input_4; [L432] SORT_3 var_286_arg_2 = state_39; [L433] SORT_3 var_286 = var_286_arg_0 ? var_286_arg_1 : var_286_arg_2; [L434] SORT_1 var_287_arg_0 = input_7; [L435] SORT_3 var_287_arg_1 = var_268; [L436] SORT_3 var_287_arg_2 = var_286; [L437] SORT_3 var_287 = var_287_arg_0 ? var_287_arg_1 : var_287_arg_2; [L438] SORT_3 next_288_arg_1 = var_287; [L439] SORT_40 var_152_arg_0 = var_46; [L440] var_152_arg_0 = var_152_arg_0 & mask_SORT_40 [L441] SORT_13 var_152 = var_152_arg_0; [L442] SORT_13 var_153_arg_0 = var_137; [L443] SORT_13 var_153_arg_1 = var_152; [L444] SORT_1 var_153 = var_153_arg_0 == var_153_arg_1; [L445] SORT_1 var_154_arg_0 = input_6; [L446] SORT_1 var_154_arg_1 = var_153; [L447] SORT_1 var_154 = var_154_arg_0 & var_154_arg_1; [L448] var_154 = var_154 & mask_SORT_1 [L449] SORT_1 var_289_arg_0 = var_154; [L450] SORT_3 var_289_arg_1 = input_4; [L451] SORT_3 var_289_arg_2 = state_45; [L452] SORT_3 var_289 = var_289_arg_0 ? var_289_arg_1 : var_289_arg_2; [L453] SORT_1 var_290_arg_0 = input_7; [L454] SORT_3 var_290_arg_1 = var_268; [L455] SORT_3 var_290_arg_2 = var_289; [L456] SORT_3 var_290 = var_290_arg_0 ? var_290_arg_1 : var_290_arg_2; [L457] SORT_3 next_291_arg_1 = var_290; [L458] SORT_1 var_145_arg_0 = var_51; [L459] var_145_arg_0 = var_145_arg_0 & mask_SORT_1 [L460] SORT_13 var_145 = var_145_arg_0; [L461] SORT_13 var_146_arg_0 = var_137; [L462] SORT_13 var_146_arg_1 = var_145; [L463] SORT_1 var_146 = var_146_arg_0 == var_146_arg_1; [L464] SORT_1 var_147_arg_0 = input_6; [L465] SORT_1 var_147_arg_1 = var_146; [L466] SORT_1 var_147 = var_147_arg_0 & var_147_arg_1; [L467] var_147 = var_147 & mask_SORT_1 [L468] SORT_1 var_292_arg_0 = var_147; [L469] SORT_3 var_292_arg_1 = input_4; [L470] SORT_3 var_292_arg_2 = state_50; [L471] SORT_3 var_292 = var_292_arg_0 ? var_292_arg_1 : var_292_arg_2; [L472] SORT_1 var_293_arg_0 = input_7; [L473] SORT_3 var_293_arg_1 = var_268; [L474] SORT_3 var_293_arg_2 = var_292; [L475] SORT_3 var_293 = var_293_arg_0 ? var_293_arg_1 : var_293_arg_2; [L476] SORT_3 next_294_arg_1 = var_293; [L477] SORT_13 var_138_arg_0 = var_137; [L478] SORT_1 var_138 = var_138_arg_0 != 0; [L479] SORT_1 var_139_arg_0 = var_138; [L480] SORT_1 var_139 = ~var_139_arg_0; [L481] SORT_1 var_140_arg_0 = input_6; [L482] SORT_1 var_140_arg_1 = var_139; [L483] SORT_1 var_140 = var_140_arg_0 & var_140_arg_1; [L484] var_140 = var_140 & mask_SORT_1 [L485] SORT_1 var_295_arg_0 = var_140; [L486] SORT_3 var_295_arg_1 = input_4; [L487] SORT_3 var_295_arg_2 = state_55; [L488] SORT_3 var_295 = var_295_arg_0 ? var_295_arg_1 : var_295_arg_2; [L489] SORT_1 var_296_arg_0 = input_7; [L490] SORT_3 var_296_arg_1 = var_268; [L491] SORT_3 var_296_arg_2 = var_295; [L492] SORT_3 var_296 = var_296_arg_0 ? var_296_arg_1 : var_296_arg_2; [L493] SORT_3 next_297_arg_1 = var_296; [L494] SORT_1 var_298_arg_0 = input_6; [L495] var_298_arg_0 = var_298_arg_0 & mask_SORT_1 [L496] SORT_11 var_298 = var_298_arg_0; [L497] SORT_11 var_299_arg_0 = state_60; [L498] SORT_11 var_299_arg_1 = var_298; [L499] SORT_11 var_299 = var_299_arg_0 + var_299_arg_1; [L500] SORT_1 var_300_arg_0 = input_5; [L501] var_300_arg_0 = var_300_arg_0 & mask_SORT_1 [L502] SORT_11 var_300 = var_300_arg_0; [L503] SORT_11 var_301_arg_0 = var_299; [L504] SORT_11 var_301_arg_1 = var_300; [L505] SORT_11 var_301 = var_301_arg_0 - var_301_arg_1; [L506] SORT_1 var_302_arg_0 = input_7; [L507] SORT_11 var_302_arg_1 = var_81; [L508] SORT_11 var_302_arg_2 = var_301; [L509] SORT_11 var_302 = var_302_arg_0 ? var_302_arg_1 : var_302_arg_2; [L510] var_302 = var_302 & mask_SORT_11 [L511] SORT_11 next_303_arg_1 = var_302; [L512] SORT_1 var_228_arg_0 = state_68; [L513] SORT_1 var_228 = ~var_228_arg_0; [L514] var_228 = var_228 & mask_SORT_1 [L515] SORT_1 var_224_arg_0 = input_8; [L516] SORT_1 var_224_arg_1 = input_6; [L517] SORT_1 var_224 = var_224_arg_0 & var_224_arg_1; [L518] SORT_1 var_225_arg_0 = state_68; [L519] SORT_1 var_225_arg_1 = var_224; [L520] SORT_1 var_225 = var_225_arg_0 | var_225_arg_1; [L521] SORT_1 var_304_arg_0 = var_228; [L522] SORT_1 var_304_arg_1 = var_225; [L523] SORT_1 var_304_arg_2 = state_68; [L524] SORT_1 var_304 = var_304_arg_0 ? var_304_arg_1 : var_304_arg_2; [L525] SORT_1 var_305_arg_0 = input_7; [L526] SORT_1 var_305_arg_1 = var_111; [L527] SORT_1 var_305_arg_2 = var_304; [L528] SORT_1 var_305 = var_305_arg_0 ? var_305_arg_1 : var_305_arg_2; [L529] SORT_1 next_306_arg_1 = var_305; [L530] SORT_1 var_236_arg_0 = var_85; [L531] SORT_1 var_236_arg_1 = state_69; [L532] SORT_1 var_236 = var_236_arg_0 | var_236_arg_1; [L533] SORT_1 var_307_arg_0 = var_51; [L534] SORT_1 var_307_arg_1 = var_236; [L535] SORT_1 var_307_arg_2 = state_69; [L536] SORT_1 var_307 = var_307_arg_0 ? var_307_arg_1 : var_307_arg_2; [L537] SORT_1 var_308_arg_0 = input_7; [L538] SORT_1 var_308_arg_1 = var_111; [L539] SORT_1 var_308_arg_2 = var_307; [L540] SORT_1 var_308 = var_308_arg_0 ? var_308_arg_1 : var_308_arg_2; [L541] SORT_1 next_309_arg_1 = var_308; [L542] SORT_1 var_248_arg_0 = input_6; [L543] SORT_1 var_248_arg_1 = input_5; [L544] SORT_1 var_248 = var_248_arg_0 | var_248_arg_1; [L545] SORT_1 var_249_arg_0 = var_248; [L546] SORT_1 var_249_arg_1 = input_7; [L547] SORT_1 var_249 = var_249_arg_0 | var_249_arg_1; [L548] SORT_1 var_250_arg_0 = var_249; [L549] SORT_1 var_250_arg_1 = state_68; [L550] SORT_1 var_250 = var_250_arg_0 | var_250_arg_1; [L551] var_250 = var_250 & mask_SORT_1 [L552] SORT_1 var_310_arg_0 = var_250; [L553] SORT_11 var_310_arg_1 = var_82; [L554] SORT_11 var_310_arg_2 = state_72; [L555] SORT_11 var_310 = var_310_arg_0 ? var_310_arg_1 : var_310_arg_2; [L556] SORT_1 var_311_arg_0 = input_7; [L557] SORT_11 var_311_arg_1 = var_81; [L558] SORT_11 var_311_arg_2 = var_310; [L559] SORT_11 var_311 = var_311_arg_0 ? var_311_arg_1 : var_311_arg_2; [L560] var_311 = var_311 & mask_SORT_11 [L561] SORT_11 next_312_arg_1 = var_311; [L562] SORT_1 var_233_arg_0 = var_224; [L563] SORT_1 var_233_arg_1 = var_228; [L564] SORT_1 var_233 = var_233_arg_0 & var_233_arg_1; [L565] var_233 = var_233 & mask_SORT_1 [L566] SORT_1 var_313_arg_0 = var_233; [L567] SORT_3 var_313_arg_1 = input_4; [L568] SORT_3 var_313_arg_2 = state_87; [L569] SORT_3 var_313 = var_313_arg_0 ? var_313_arg_1 : var_313_arg_2; [L570] SORT_1 var_314_arg_0 = input_7; [L571] SORT_3 var_314_arg_1 = var_268; [L572] SORT_3 var_314_arg_2 = var_313; [L573] SORT_3 var_314 = var_314_arg_0 ? var_314_arg_1 : var_314_arg_2; [L574] var_314 = var_314 & mask_SORT_3 [L575] SORT_3 next_315_arg_1 = var_314; [L576] SORT_1 next_316_arg_1 = var_111; [L577] SORT_1 var_204_arg_0 = input_6; [L578] var_204_arg_0 = var_204_arg_0 & mask_SORT_1 [L579] SORT_11 var_204 = var_204_arg_0; [L580] SORT_11 var_205_arg_0 = state_136; [L581] SORT_11 var_205_arg_1 = var_204; [L582] SORT_11 var_205 = var_205_arg_0 + var_205_arg_1; [L583] SORT_1 var_317_arg_0 = var_120; [L584] SORT_11 var_317_arg_1 = var_205; [L585] SORT_11 var_317_arg_2 = state_136; [L586] SORT_11 var_317 = var_317_arg_0 ? var_317_arg_1 : var_317_arg_2; [L587] SORT_1 var_318_arg_0 = input_7; [L588] SORT_11 var_318_arg_1 = var_81; [L589] SORT_11 var_318_arg_2 = var_317; [L590] SORT_11 var_318 = var_318_arg_0 ? var_318_arg_1 : var_318_arg_2; [L591] SORT_11 next_319_arg_1 = var_318; [L593] state_10 = next_270_arg_1 [L594] state_12 = next_273_arg_1 [L595] state_18 = next_276_arg_1 [L596] state_24 = next_279_arg_1 [L597] state_29 = next_282_arg_1 [L598] state_34 = next_285_arg_1 [L599] state_39 = next_288_arg_1 [L600] state_45 = next_291_arg_1 [L601] state_50 = next_294_arg_1 [L602] state_55 = next_297_arg_1 [L603] state_60 = next_303_arg_1 [L604] state_68 = next_306_arg_1 [L605] state_69 = next_309_arg_1 [L606] state_72 = next_312_arg_1 [L607] state_87 = next_315_arg_1 [L608] state_91 = next_316_arg_1 [L609] state_136 = next_319_arg_1 [L87] input_2 = __VERIFIER_nondet_uchar() [L88] input_4 = __VERIFIER_nondet_uint() [L89] input_5 = __VERIFIER_nondet_uchar() [L90] input_6 = __VERIFIER_nondet_uchar() [L91] input_7 = __VERIFIER_nondet_uchar() [L92] input_7 = input_7 & mask_SORT_1 [L93] input_8 = __VERIFIER_nondet_uchar() [L94] input_9 = __VERIFIER_nondet_uint() [L95] input_109 = __VERIFIER_nondet_uchar() [L97] SORT_1 var_93_arg_0 = input_7; [L98] SORT_1 var_93_arg_1 = state_91; [L99] SORT_1 var_93 = var_93_arg_0 == var_93_arg_1; [L100] SORT_1 var_94_arg_0 = var_51; [L101] SORT_1 var_94 = ~var_94_arg_0; [L102] SORT_1 var_95_arg_0 = var_93; [L103] SORT_1 var_95_arg_1 = var_94; [L104] SORT_1 var_95 = var_95_arg_0 | var_95_arg_1; [L105] var_95 = var_95 & mask_SORT_1 [L106] SORT_1 constr_96_arg_0 = var_95; [L107] CALL assume_abort_if_not(constr_96_arg_0) [L21] COND FALSE !(!cond) [L107] RET assume_abort_if_not(constr_96_arg_0) [L108] SORT_13 var_65_arg_0 = var_64; [L109] var_65_arg_0 = var_65_arg_0 & mask_SORT_13 [L110] SORT_11 var_65 = var_65_arg_0; [L111] SORT_11 var_66_arg_0 = state_60; [L112] SORT_11 var_66_arg_1 = var_65; [L113] SORT_1 var_66 = var_66_arg_0 == var_66_arg_1; [L114] SORT_1 var_97_arg_0 = var_66; [L115] SORT_1 var_97 = ~var_97_arg_0; [L116] SORT_1 var_98_arg_0 = input_6; [L117] SORT_1 var_98 = ~var_98_arg_0; [L118] SORT_1 var_99_arg_0 = var_97; [L119] SORT_1 var_99_arg_1 = var_98; [L120] SORT_1 var_99 = var_99_arg_0 | var_99_arg_1; [L121] SORT_1 var_100_arg_0 = var_51; [L122] SORT_1 var_100 = ~var_100_arg_0; [L123] SORT_1 var_101_arg_0 = var_99; [L124] SORT_1 var_101_arg_1 = var_100; [L125] SORT_1 var_101 = var_101_arg_0 | var_101_arg_1; [L126] var_101 = var_101 & mask_SORT_1 [L127] SORT_1 constr_102_arg_0 = var_101; [L128] CALL assume_abort_if_not(constr_102_arg_0) [L21] COND FALSE !(!cond) [L128] RET assume_abort_if_not(constr_102_arg_0) [L129] SORT_11 var_61_arg_0 = state_60; [L130] SORT_1 var_61 = var_61_arg_0 != 0; [L131] SORT_1 var_62_arg_0 = var_61; [L132] SORT_1 var_62 = ~var_62_arg_0; [L133] SORT_1 var_103_arg_0 = var_62; [L134] SORT_1 var_103 = ~var_103_arg_0; [L135] SORT_1 var_104_arg_0 = input_5; [L136] SORT_1 var_104 = ~var_104_arg_0; [L137] SORT_1 var_105_arg_0 = var_103; [L138] SORT_1 var_105_arg_1 = var_104; [L139] SORT_1 var_105 = var_105_arg_0 | var_105_arg_1; [L140] SORT_1 var_106_arg_0 = var_51; [L141] SORT_1 var_106 = ~var_106_arg_0; [L142] SORT_1 var_107_arg_0 = var_105; [L143] SORT_1 var_107_arg_1 = var_106; [L144] SORT_1 var_107 = var_107_arg_0 | var_107_arg_1; [L145] var_107 = var_107 & mask_SORT_1 [L146] SORT_1 constr_108_arg_0 = var_107; [L147] CALL assume_abort_if_not(constr_108_arg_0) [L21] COND FALSE !(!cond) [L147] RET assume_abort_if_not(constr_108_arg_0) [L149] SORT_1 var_112_arg_0 = state_91; [L150] SORT_1 var_112_arg_1 = var_111; [L151] SORT_1 var_112_arg_2 = var_51; [L152] SORT_1 var_112 = var_112_arg_0 ? var_112_arg_1 : var_112_arg_2; [L153] SORT_1 var_70_arg_0 = state_69; [L154] SORT_1 var_70 = ~var_70_arg_0; [L155] SORT_1 var_71_arg_0 = state_68; [L156] SORT_1 var_71_arg_1 = var_70; [L157] SORT_1 var_71 = var_71_arg_0 & var_71_arg_1; [L158] SORT_11 var_73_arg_0 = state_72; [L159] SORT_1 var_73 = var_73_arg_0 != 0; [L160] SORT_1 var_74_arg_0 = var_71; [L161] SORT_1 var_74_arg_1 = var_73; [L162] SORT_1 var_74 = var_74_arg_0 & var_74_arg_1; [L163] SORT_1 var_75_arg_0 = state_68; [L164] SORT_1 var_75 = ~var_75_arg_0; [L165] SORT_1 var_76_arg_0 = input_6; [L166] SORT_1 var_76_arg_1 = var_75; [L167] SORT_1 var_76 = var_76_arg_0 & var_76_arg_1; [L168] SORT_1 var_77_arg_0 = var_76; [L169] var_77_arg_0 = var_77_arg_0 & mask_SORT_1 [L170] SORT_11 var_77 = var_77_arg_0; [L171] SORT_11 var_78_arg_0 = state_72; [L172] SORT_11 var_78_arg_1 = var_77; [L173] SORT_11 var_78 = var_78_arg_0 + var_78_arg_1; [L174] SORT_1 var_79_arg_0 = input_5; [L175] var_79_arg_0 = var_79_arg_0 & mask_SORT_1 [L176] SORT_11 var_79 = var_79_arg_0; [L177] SORT_11 var_80_arg_0 = var_78; [L178] SORT_11 var_80_arg_1 = var_79; [L179] SORT_11 var_80 = var_80_arg_0 - var_80_arg_1; [L180] SORT_1 var_82_arg_0 = input_7; [L181] SORT_11 var_82_arg_1 = var_81; [L182] SORT_11 var_82_arg_2 = var_80; [L183] SORT_11 var_82 = var_82_arg_0 ? var_82_arg_1 : var_82_arg_2; [L184] var_82 = var_82 & mask_SORT_11 [L185] SORT_11 var_83_arg_0 = var_82; [L186] SORT_1 var_83 = var_83_arg_0 != 0; [L187] SORT_1 var_84_arg_0 = var_83; [L188] SORT_1 var_84 = ~var_84_arg_0; [L189] SORT_1 var_85_arg_0 = var_74; [L190] SORT_1 var_85_arg_1 = var_84; [L191] SORT_1 var_85 = var_85_arg_0 & var_85_arg_1; [L192] SORT_1 var_86_arg_0 = var_85; [L193] SORT_1 var_86 = ~var_86_arg_0; [L194] SORT_11 var_14_arg_0 = state_12; [L195] SORT_13 var_14 = var_14_arg_0 >> 0; [L196] var_14 = var_14 & mask_SORT_13 [L197] SORT_13 var_56_arg_0 = var_14; [L198] SORT_1 var_56 = var_56_arg_0 != 0; [L199] SORT_1 var_57_arg_0 = var_56; [L200] SORT_1 var_57 = ~var_57_arg_0; [L201] var_57 = var_57 & mask_SORT_1 [L202] SORT_1 var_52_arg_0 = var_51; [L203] var_52_arg_0 = var_52_arg_0 & mask_SORT_1 [L204] SORT_13 var_52 = var_52_arg_0; [L205] SORT_13 var_53_arg_0 = var_14; [L206] SORT_13 var_53_arg_1 = var_52; [L207] SORT_1 var_53 = var_53_arg_0 == var_53_arg_1; [L208] SORT_40 var_47_arg_0 = var_46; [L209] var_47_arg_0 = var_47_arg_0 & mask_SORT_40 [L210] SORT_13 var_47 = var_47_arg_0; [L211] SORT_13 var_48_arg_0 = var_14; [L212] SORT_13 var_48_arg_1 = var_47; [L213] SORT_1 var_48 = var_48_arg_0 == var_48_arg_1; [L214] SORT_40 var_42_arg_0 = var_41; [L215] var_42_arg_0 = var_42_arg_0 & mask_SORT_40 [L216] SORT_13 var_42 = var_42_arg_0; [L217] SORT_13 var_43_arg_0 = var_14; [L218] SORT_13 var_43_arg_1 = var_42; [L219] SORT_1 var_43 = var_43_arg_0 == var_43_arg_1; [L220] SORT_19 var_36_arg_0 = var_35; [L221] var_36_arg_0 = var_36_arg_0 & mask_SORT_19 [L222] SORT_13 var_36 = var_36_arg_0; [L223] SORT_13 var_37_arg_0 = var_14; [L224] SORT_13 var_37_arg_1 = var_36; [L225] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L226] SORT_19 var_31_arg_0 = var_30; [L227] var_31_arg_0 = var_31_arg_0 & mask_SORT_19 [L228] SORT_13 var_31 = var_31_arg_0; [L229] SORT_13 var_32_arg_0 = var_14; [L230] SORT_13 var_32_arg_1 = var_31; [L231] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L232] SORT_19 var_26_arg_0 = var_25; [L233] var_26_arg_0 = var_26_arg_0 & mask_SORT_19 [L234] SORT_13 var_26 = var_26_arg_0; [L235] SORT_13 var_27_arg_0 = var_14; [L236] SORT_13 var_27_arg_1 = var_26; [L237] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L238] SORT_19 var_21_arg_0 = var_20; [L239] var_21_arg_0 = var_21_arg_0 & mask_SORT_19 [L240] SORT_13 var_21 = var_21_arg_0; [L241] SORT_13 var_22_arg_0 = var_14; [L242] SORT_13 var_22_arg_1 = var_21; [L243] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L244] SORT_13 var_16_arg_0 = var_14; [L245] SORT_13 var_16_arg_1 = var_15; [L246] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1; [L247] SORT_1 var_17_arg_0 = var_16; [L248] SORT_3 var_17_arg_1 = state_10; [L249] SORT_3 var_17_arg_2 = input_9; [L250] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2; [L251] SORT_1 var_23_arg_0 = var_22; [L252] SORT_3 var_23_arg_1 = state_18; [L253] SORT_3 var_23_arg_2 = var_17; [L254] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L255] SORT_1 var_28_arg_0 = var_27; [L256] SORT_3 var_28_arg_1 = state_24; [L257] SORT_3 var_28_arg_2 = var_23; [L258] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L259] SORT_1 var_33_arg_0 = var_32; [L260] SORT_3 var_33_arg_1 = state_29; [L261] SORT_3 var_33_arg_2 = var_28; [L262] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L263] SORT_1 var_38_arg_0 = var_37; [L264] SORT_3 var_38_arg_1 = state_34; [L265] SORT_3 var_38_arg_2 = var_33; [L266] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L267] SORT_1 var_44_arg_0 = var_43; [L268] SORT_3 var_44_arg_1 = state_39; [L269] SORT_3 var_44_arg_2 = var_38; [L270] SORT_3 var_44 = var_44_arg_0 ? var_44_arg_1 : var_44_arg_2; [L271] SORT_1 var_49_arg_0 = var_48; [L272] SORT_3 var_49_arg_1 = state_45; [L273] SORT_3 var_49_arg_2 = var_44; [L274] SORT_3 var_49 = var_49_arg_0 ? var_49_arg_1 : var_49_arg_2; [L275] SORT_1 var_54_arg_0 = var_53; [L276] SORT_3 var_54_arg_1 = state_50; [L277] SORT_3 var_54_arg_2 = var_49; [L278] SORT_3 var_54 = var_54_arg_0 ? var_54_arg_1 : var_54_arg_2; [L279] SORT_1 var_58_arg_0 = var_57; [L280] SORT_3 var_58_arg_1 = state_55; [L281] SORT_3 var_58_arg_2 = var_54; [L282] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2; [L283] var_58 = var_58 & mask_SORT_3 [L284] SORT_3 var_88_arg_0 = state_87; [L285] SORT_3 var_88_arg_1 = var_58; [L286] SORT_1 var_88 = var_88_arg_0 == var_88_arg_1; [L287] SORT_1 var_89_arg_0 = var_86; [L288] SORT_1 var_89_arg_1 = var_88; [L289] SORT_1 var_89 = var_89_arg_0 | var_89_arg_1; [L290] SORT_1 var_110_arg_0 = state_91; [L291] SORT_1 var_110_arg_1 = input_109; [L292] SORT_1 var_110_arg_2 = var_89; [L293] SORT_1 var_110 = var_110_arg_0 ? var_110_arg_1 : var_110_arg_2; [L294] SORT_1 var_113_arg_0 = var_110; [L295] SORT_1 var_113 = ~var_113_arg_0; [L296] SORT_1 var_114_arg_0 = var_112; [L297] SORT_1 var_114_arg_1 = var_113; [L298] SORT_1 var_114 = var_114_arg_0 & var_114_arg_1; [L299] var_114 = var_114 & mask_SORT_1 [L300] SORT_1 bad_115_arg_0 = var_114; [L301] CALL __VERIFIER_assert(!(bad_115_arg_0)) [L20] COND FALSE !(!(cond)) [L301] RET __VERIFIER_assert(!(bad_115_arg_0)) [L303] SORT_11 var_137_arg_0 = state_136; [L304] SORT_13 var_137 = var_137_arg_0 >> 0; [L305] var_137 = var_137 & mask_SORT_13 [L306] SORT_13 var_194_arg_0 = var_137; [L307] SORT_13 var_194_arg_1 = var_15; [L308] SORT_1 var_194 = var_194_arg_0 == var_194_arg_1; [L309] SORT_1 var_195_arg_0 = input_6; [L310] SORT_1 var_195_arg_1 = var_194; [L311] SORT_1 var_195 = var_195_arg_0 & var_195_arg_1; [L312] var_195 = var_195 & mask_SORT_1 [L313] SORT_1 var_267_arg_0 = var_195; [L314] SORT_3 var_267_arg_1 = input_4; [L315] SORT_3 var_267_arg_2 = state_10; [L316] SORT_3 var_267 = var_267_arg_0 ? var_267_arg_1 : var_267_arg_2; [L317] SORT_1 var_269_arg_0 = input_7; [L318] SORT_3 var_269_arg_1 = var_268; [L319] SORT_3 var_269_arg_2 = var_267; [L320] SORT_3 var_269 = var_269_arg_0 ? var_269_arg_1 : var_269_arg_2; [L321] SORT_3 next_270_arg_1 = var_269; [L322] SORT_1 var_119_arg_0 = input_6; [L323] SORT_1 var_119_arg_1 = input_5; [L324] SORT_1 var_119 = var_119_arg_0 | var_119_arg_1; [L325] SORT_1 var_120_arg_0 = var_119; [L326] SORT_1 var_120_arg_1 = input_7; [L327] SORT_1 var_120 = var_120_arg_0 | var_120_arg_1; [L328] var_120 = var_120 & mask_SORT_1 [L329] SORT_1 var_198_arg_0 = input_5; [L330] var_198_arg_0 = var_198_arg_0 & mask_SORT_1 [L331] SORT_11 var_198 = var_198_arg_0; [L332] SORT_11 var_199_arg_0 = state_12; [L333] SORT_11 var_199_arg_1 = var_198; [L334] SORT_11 var_199 = var_199_arg_0 + var_199_arg_1; [L335] SORT_1 var_271_arg_0 = var_120; [L336] SORT_11 var_271_arg_1 = var_199; [L337] SORT_11 var_271_arg_2 = state_12; [L338] SORT_11 var_271 = var_271_arg_0 ? var_271_arg_1 : var_271_arg_2; [L339] SORT_1 var_272_arg_0 = input_7; [L340] SORT_11 var_272_arg_1 = var_81; [L341] SORT_11 var_272_arg_2 = var_271; [L342] SORT_11 var_272 = var_272_arg_0 ? var_272_arg_1 : var_272_arg_2; [L343] SORT_11 next_273_arg_1 = var_272; [L344] SORT_19 var_187_arg_0 = var_20; [L345] var_187_arg_0 = var_187_arg_0 & mask_SORT_19 [L346] SORT_13 var_187 = var_187_arg_0; [L347] SORT_13 var_188_arg_0 = var_137; [L348] SORT_13 var_188_arg_1 = var_187; [L349] SORT_1 var_188 = var_188_arg_0 == var_188_arg_1; [L350] SORT_1 var_189_arg_0 = input_6; [L351] SORT_1 var_189_arg_1 = var_188; [L352] SORT_1 var_189 = var_189_arg_0 & var_189_arg_1; [L353] var_189 = var_189 & mask_SORT_1 [L354] SORT_1 var_274_arg_0 = var_189; [L355] SORT_3 var_274_arg_1 = input_4; [L356] SORT_3 var_274_arg_2 = state_18; [L357] SORT_3 var_274 = var_274_arg_0 ? var_274_arg_1 : var_274_arg_2; [L358] SORT_1 var_275_arg_0 = input_7; [L359] SORT_3 var_275_arg_1 = var_268; [L360] SORT_3 var_275_arg_2 = var_274; [L361] SORT_3 var_275 = var_275_arg_0 ? var_275_arg_1 : var_275_arg_2; [L362] SORT_3 next_276_arg_1 = var_275; [L363] SORT_19 var_180_arg_0 = var_25; [L364] var_180_arg_0 = var_180_arg_0 & mask_SORT_19 [L365] SORT_13 var_180 = var_180_arg_0; [L366] SORT_13 var_181_arg_0 = var_137; [L367] SORT_13 var_181_arg_1 = var_180; [L368] SORT_1 var_181 = var_181_arg_0 == var_181_arg_1; [L369] SORT_1 var_182_arg_0 = input_6; [L370] SORT_1 var_182_arg_1 = var_181; [L371] SORT_1 var_182 = var_182_arg_0 & var_182_arg_1; [L372] var_182 = var_182 & mask_SORT_1 [L373] SORT_1 var_277_arg_0 = var_182; [L374] SORT_3 var_277_arg_1 = input_4; [L375] SORT_3 var_277_arg_2 = state_24; [L376] SORT_3 var_277 = var_277_arg_0 ? var_277_arg_1 : var_277_arg_2; [L377] SORT_1 var_278_arg_0 = input_7; [L378] SORT_3 var_278_arg_1 = var_268; [L379] SORT_3 var_278_arg_2 = var_277; [L380] SORT_3 var_278 = var_278_arg_0 ? var_278_arg_1 : var_278_arg_2; [L381] SORT_3 next_279_arg_1 = var_278; [L382] SORT_19 var_173_arg_0 = var_30; [L383] var_173_arg_0 = var_173_arg_0 & mask_SORT_19 [L384] SORT_13 var_173 = var_173_arg_0; [L385] SORT_13 var_174_arg_0 = var_137; [L386] SORT_13 var_174_arg_1 = var_173; [L387] SORT_1 var_174 = var_174_arg_0 == var_174_arg_1; [L388] SORT_1 var_175_arg_0 = input_6; [L389] SORT_1 var_175_arg_1 = var_174; [L390] SORT_1 var_175 = var_175_arg_0 & var_175_arg_1; [L391] var_175 = var_175 & mask_SORT_1 [L392] SORT_1 var_280_arg_0 = var_175; [L393] SORT_3 var_280_arg_1 = input_4; [L394] SORT_3 var_280_arg_2 = state_29; [L395] SORT_3 var_280 = var_280_arg_0 ? var_280_arg_1 : var_280_arg_2; [L396] SORT_1 var_281_arg_0 = input_7; [L397] SORT_3 var_281_arg_1 = var_268; [L398] SORT_3 var_281_arg_2 = var_280; [L399] SORT_3 var_281 = var_281_arg_0 ? var_281_arg_1 : var_281_arg_2; [L400] SORT_3 next_282_arg_1 = var_281; [L401] SORT_19 var_166_arg_0 = var_35; [L402] var_166_arg_0 = var_166_arg_0 & mask_SORT_19 [L403] SORT_13 var_166 = var_166_arg_0; [L404] SORT_13 var_167_arg_0 = var_137; [L405] SORT_13 var_167_arg_1 = var_166; [L406] SORT_1 var_167 = var_167_arg_0 == var_167_arg_1; [L407] SORT_1 var_168_arg_0 = input_6; [L408] SORT_1 var_168_arg_1 = var_167; [L409] SORT_1 var_168 = var_168_arg_0 & var_168_arg_1; [L410] var_168 = var_168 & mask_SORT_1 [L411] SORT_1 var_283_arg_0 = var_168; [L412] SORT_3 var_283_arg_1 = input_4; [L413] SORT_3 var_283_arg_2 = state_34; [L414] SORT_3 var_283 = var_283_arg_0 ? var_283_arg_1 : var_283_arg_2; [L415] SORT_1 var_284_arg_0 = input_7; [L416] SORT_3 var_284_arg_1 = var_268; [L417] SORT_3 var_284_arg_2 = var_283; [L418] SORT_3 var_284 = var_284_arg_0 ? var_284_arg_1 : var_284_arg_2; [L419] SORT_3 next_285_arg_1 = var_284; [L420] SORT_40 var_159_arg_0 = var_41; [L421] var_159_arg_0 = var_159_arg_0 & mask_SORT_40 [L422] SORT_13 var_159 = var_159_arg_0; [L423] SORT_13 var_160_arg_0 = var_137; [L424] SORT_13 var_160_arg_1 = var_159; [L425] SORT_1 var_160 = var_160_arg_0 == var_160_arg_1; [L426] SORT_1 var_161_arg_0 = input_6; [L427] SORT_1 var_161_arg_1 = var_160; [L428] SORT_1 var_161 = var_161_arg_0 & var_161_arg_1; [L429] var_161 = var_161 & mask_SORT_1 [L430] SORT_1 var_286_arg_0 = var_161; [L431] SORT_3 var_286_arg_1 = input_4; [L432] SORT_3 var_286_arg_2 = state_39; [L433] SORT_3 var_286 = var_286_arg_0 ? var_286_arg_1 : var_286_arg_2; [L434] SORT_1 var_287_arg_0 = input_7; [L435] SORT_3 var_287_arg_1 = var_268; [L436] SORT_3 var_287_arg_2 = var_286; [L437] SORT_3 var_287 = var_287_arg_0 ? var_287_arg_1 : var_287_arg_2; [L438] SORT_3 next_288_arg_1 = var_287; [L439] SORT_40 var_152_arg_0 = var_46; [L440] var_152_arg_0 = var_152_arg_0 & mask_SORT_40 [L441] SORT_13 var_152 = var_152_arg_0; [L442] SORT_13 var_153_arg_0 = var_137; [L443] SORT_13 var_153_arg_1 = var_152; [L444] SORT_1 var_153 = var_153_arg_0 == var_153_arg_1; [L445] SORT_1 var_154_arg_0 = input_6; [L446] SORT_1 var_154_arg_1 = var_153; [L447] SORT_1 var_154 = var_154_arg_0 & var_154_arg_1; [L448] var_154 = var_154 & mask_SORT_1 [L449] SORT_1 var_289_arg_0 = var_154; [L450] SORT_3 var_289_arg_1 = input_4; [L451] SORT_3 var_289_arg_2 = state_45; [L452] SORT_3 var_289 = var_289_arg_0 ? var_289_arg_1 : var_289_arg_2; [L453] SORT_1 var_290_arg_0 = input_7; [L454] SORT_3 var_290_arg_1 = var_268; [L455] SORT_3 var_290_arg_2 = var_289; [L456] SORT_3 var_290 = var_290_arg_0 ? var_290_arg_1 : var_290_arg_2; [L457] SORT_3 next_291_arg_1 = var_290; [L458] SORT_1 var_145_arg_0 = var_51; [L459] var_145_arg_0 = var_145_arg_0 & mask_SORT_1 [L460] SORT_13 var_145 = var_145_arg_0; [L461] SORT_13 var_146_arg_0 = var_137; [L462] SORT_13 var_146_arg_1 = var_145; [L463] SORT_1 var_146 = var_146_arg_0 == var_146_arg_1; [L464] SORT_1 var_147_arg_0 = input_6; [L465] SORT_1 var_147_arg_1 = var_146; [L466] SORT_1 var_147 = var_147_arg_0 & var_147_arg_1; [L467] var_147 = var_147 & mask_SORT_1 [L468] SORT_1 var_292_arg_0 = var_147; [L469] SORT_3 var_292_arg_1 = input_4; [L470] SORT_3 var_292_arg_2 = state_50; [L471] SORT_3 var_292 = var_292_arg_0 ? var_292_arg_1 : var_292_arg_2; [L472] SORT_1 var_293_arg_0 = input_7; [L473] SORT_3 var_293_arg_1 = var_268; [L474] SORT_3 var_293_arg_2 = var_292; [L475] SORT_3 var_293 = var_293_arg_0 ? var_293_arg_1 : var_293_arg_2; [L476] SORT_3 next_294_arg_1 = var_293; [L477] SORT_13 var_138_arg_0 = var_137; [L478] SORT_1 var_138 = var_138_arg_0 != 0; [L479] SORT_1 var_139_arg_0 = var_138; [L480] SORT_1 var_139 = ~var_139_arg_0; [L481] SORT_1 var_140_arg_0 = input_6; [L482] SORT_1 var_140_arg_1 = var_139; [L483] SORT_1 var_140 = var_140_arg_0 & var_140_arg_1; [L484] var_140 = var_140 & mask_SORT_1 [L485] SORT_1 var_295_arg_0 = var_140; [L486] SORT_3 var_295_arg_1 = input_4; [L487] SORT_3 var_295_arg_2 = state_55; [L488] SORT_3 var_295 = var_295_arg_0 ? var_295_arg_1 : var_295_arg_2; [L489] SORT_1 var_296_arg_0 = input_7; [L490] SORT_3 var_296_arg_1 = var_268; [L491] SORT_3 var_296_arg_2 = var_295; [L492] SORT_3 var_296 = var_296_arg_0 ? var_296_arg_1 : var_296_arg_2; [L493] SORT_3 next_297_arg_1 = var_296; [L494] SORT_1 var_298_arg_0 = input_6; [L495] var_298_arg_0 = var_298_arg_0 & mask_SORT_1 [L496] SORT_11 var_298 = var_298_arg_0; [L497] SORT_11 var_299_arg_0 = state_60; [L498] SORT_11 var_299_arg_1 = var_298; [L499] SORT_11 var_299 = var_299_arg_0 + var_299_arg_1; [L500] SORT_1 var_300_arg_0 = input_5; [L501] var_300_arg_0 = var_300_arg_0 & mask_SORT_1 [L502] SORT_11 var_300 = var_300_arg_0; [L503] SORT_11 var_301_arg_0 = var_299; [L504] SORT_11 var_301_arg_1 = var_300; [L505] SORT_11 var_301 = var_301_arg_0 - var_301_arg_1; [L506] SORT_1 var_302_arg_0 = input_7; [L507] SORT_11 var_302_arg_1 = var_81; [L508] SORT_11 var_302_arg_2 = var_301; [L509] SORT_11 var_302 = var_302_arg_0 ? var_302_arg_1 : var_302_arg_2; [L510] var_302 = var_302 & mask_SORT_11 [L511] SORT_11 next_303_arg_1 = var_302; [L512] SORT_1 var_228_arg_0 = state_68; [L513] SORT_1 var_228 = ~var_228_arg_0; [L514] var_228 = var_228 & mask_SORT_1 [L515] SORT_1 var_224_arg_0 = input_8; [L516] SORT_1 var_224_arg_1 = input_6; [L517] SORT_1 var_224 = var_224_arg_0 & var_224_arg_1; [L518] SORT_1 var_225_arg_0 = state_68; [L519] SORT_1 var_225_arg_1 = var_224; [L520] SORT_1 var_225 = var_225_arg_0 | var_225_arg_1; [L521] SORT_1 var_304_arg_0 = var_228; [L522] SORT_1 var_304_arg_1 = var_225; [L523] SORT_1 var_304_arg_2 = state_68; [L524] SORT_1 var_304 = var_304_arg_0 ? var_304_arg_1 : var_304_arg_2; [L525] SORT_1 var_305_arg_0 = input_7; [L526] SORT_1 var_305_arg_1 = var_111; [L527] SORT_1 var_305_arg_2 = var_304; [L528] SORT_1 var_305 = var_305_arg_0 ? var_305_arg_1 : var_305_arg_2; [L529] SORT_1 next_306_arg_1 = var_305; [L530] SORT_1 var_236_arg_0 = var_85; [L531] SORT_1 var_236_arg_1 = state_69; [L532] SORT_1 var_236 = var_236_arg_0 | var_236_arg_1; [L533] SORT_1 var_307_arg_0 = var_51; [L534] SORT_1 var_307_arg_1 = var_236; [L535] SORT_1 var_307_arg_2 = state_69; [L536] SORT_1 var_307 = var_307_arg_0 ? var_307_arg_1 : var_307_arg_2; [L537] SORT_1 var_308_arg_0 = input_7; [L538] SORT_1 var_308_arg_1 = var_111; [L539] SORT_1 var_308_arg_2 = var_307; [L540] SORT_1 var_308 = var_308_arg_0 ? var_308_arg_1 : var_308_arg_2; [L541] SORT_1 next_309_arg_1 = var_308; [L542] SORT_1 var_248_arg_0 = input_6; [L543] SORT_1 var_248_arg_1 = input_5; [L544] SORT_1 var_248 = var_248_arg_0 | var_248_arg_1; [L545] SORT_1 var_249_arg_0 = var_248; [L546] SORT_1 var_249_arg_1 = input_7; [L547] SORT_1 var_249 = var_249_arg_0 | var_249_arg_1; [L548] SORT_1 var_250_arg_0 = var_249; [L549] SORT_1 var_250_arg_1 = state_68; [L550] SORT_1 var_250 = var_250_arg_0 | var_250_arg_1; [L551] var_250 = var_250 & mask_SORT_1 [L552] SORT_1 var_310_arg_0 = var_250; [L553] SORT_11 var_310_arg_1 = var_82; [L554] SORT_11 var_310_arg_2 = state_72; [L555] SORT_11 var_310 = var_310_arg_0 ? var_310_arg_1 : var_310_arg_2; [L556] SORT_1 var_311_arg_0 = input_7; [L557] SORT_11 var_311_arg_1 = var_81; [L558] SORT_11 var_311_arg_2 = var_310; [L559] SORT_11 var_311 = var_311_arg_0 ? var_311_arg_1 : var_311_arg_2; [L560] var_311 = var_311 & mask_SORT_11 [L561] SORT_11 next_312_arg_1 = var_311; [L562] SORT_1 var_233_arg_0 = var_224; [L563] SORT_1 var_233_arg_1 = var_228; [L564] SORT_1 var_233 = var_233_arg_0 & var_233_arg_1; [L565] var_233 = var_233 & mask_SORT_1 [L566] SORT_1 var_313_arg_0 = var_233; [L567] SORT_3 var_313_arg_1 = input_4; [L568] SORT_3 var_313_arg_2 = state_87; [L569] SORT_3 var_313 = var_313_arg_0 ? var_313_arg_1 : var_313_arg_2; [L570] SORT_1 var_314_arg_0 = input_7; [L571] SORT_3 var_314_arg_1 = var_268; [L572] SORT_3 var_314_arg_2 = var_313; [L573] SORT_3 var_314 = var_314_arg_0 ? var_314_arg_1 : var_314_arg_2; [L574] var_314 = var_314 & mask_SORT_3 [L575] SORT_3 next_315_arg_1 = var_314; [L576] SORT_1 next_316_arg_1 = var_111; [L577] SORT_1 var_204_arg_0 = input_6; [L578] var_204_arg_0 = var_204_arg_0 & mask_SORT_1 [L579] SORT_11 var_204 = var_204_arg_0; [L580] SORT_11 var_205_arg_0 = state_136; [L581] SORT_11 var_205_arg_1 = var_204; [L582] SORT_11 var_205 = var_205_arg_0 + var_205_arg_1; [L583] SORT_1 var_317_arg_0 = var_120; [L584] SORT_11 var_317_arg_1 = var_205; [L585] SORT_11 var_317_arg_2 = state_136; [L586] SORT_11 var_317 = var_317_arg_0 ? var_317_arg_1 : var_317_arg_2; [L587] SORT_1 var_318_arg_0 = input_7; [L588] SORT_11 var_318_arg_1 = var_81; [L589] SORT_11 var_318_arg_2 = var_317; [L590] SORT_11 var_318 = var_318_arg_0 ? var_318_arg_1 : var_318_arg_2; [L591] SORT_11 next_319_arg_1 = var_318; [L593] state_10 = next_270_arg_1 [L594] state_12 = next_273_arg_1 [L595] state_18 = next_276_arg_1 [L596] state_24 = next_279_arg_1 [L597] state_29 = next_282_arg_1 [L598] state_34 = next_285_arg_1 [L599] state_39 = next_288_arg_1 [L600] state_45 = next_291_arg_1 [L601] state_50 = next_294_arg_1 [L602] state_55 = next_297_arg_1 [L603] state_60 = next_303_arg_1 [L604] state_68 = next_306_arg_1 [L605] state_69 = next_309_arg_1 [L606] state_72 = next_312_arg_1 [L607] state_87 = next_315_arg_1 [L608] state_91 = next_316_arg_1 [L609] state_136 = next_319_arg_1 [L87] input_2 = __VERIFIER_nondet_uchar() [L88] input_4 = __VERIFIER_nondet_uint() [L89] input_5 = __VERIFIER_nondet_uchar() [L90] input_6 = __VERIFIER_nondet_uchar() [L91] input_7 = __VERIFIER_nondet_uchar() [L92] input_7 = input_7 & mask_SORT_1 [L93] input_8 = __VERIFIER_nondet_uchar() [L94] input_9 = __VERIFIER_nondet_uint() [L95] input_109 = __VERIFIER_nondet_uchar() [L97] SORT_1 var_93_arg_0 = input_7; [L98] SORT_1 var_93_arg_1 = state_91; [L99] SORT_1 var_93 = var_93_arg_0 == var_93_arg_1; [L100] SORT_1 var_94_arg_0 = var_51; [L101] SORT_1 var_94 = ~var_94_arg_0; [L102] SORT_1 var_95_arg_0 = var_93; [L103] SORT_1 var_95_arg_1 = var_94; [L104] SORT_1 var_95 = var_95_arg_0 | var_95_arg_1; [L105] var_95 = var_95 & mask_SORT_1 [L106] SORT_1 constr_96_arg_0 = var_95; [L107] CALL assume_abort_if_not(constr_96_arg_0) [L21] COND FALSE !(!cond) [L107] RET assume_abort_if_not(constr_96_arg_0) [L108] SORT_13 var_65_arg_0 = var_64; [L109] var_65_arg_0 = var_65_arg_0 & mask_SORT_13 [L110] SORT_11 var_65 = var_65_arg_0; [L111] SORT_11 var_66_arg_0 = state_60; [L112] SORT_11 var_66_arg_1 = var_65; [L113] SORT_1 var_66 = var_66_arg_0 == var_66_arg_1; [L114] SORT_1 var_97_arg_0 = var_66; [L115] SORT_1 var_97 = ~var_97_arg_0; [L116] SORT_1 var_98_arg_0 = input_6; [L117] SORT_1 var_98 = ~var_98_arg_0; [L118] SORT_1 var_99_arg_0 = var_97; [L119] SORT_1 var_99_arg_1 = var_98; [L120] SORT_1 var_99 = var_99_arg_0 | var_99_arg_1; [L121] SORT_1 var_100_arg_0 = var_51; [L122] SORT_1 var_100 = ~var_100_arg_0; [L123] SORT_1 var_101_arg_0 = var_99; [L124] SORT_1 var_101_arg_1 = var_100; [L125] SORT_1 var_101 = var_101_arg_0 | var_101_arg_1; [L126] var_101 = var_101 & mask_SORT_1 [L127] SORT_1 constr_102_arg_0 = var_101; [L128] CALL assume_abort_if_not(constr_102_arg_0) [L21] COND FALSE !(!cond) [L128] RET assume_abort_if_not(constr_102_arg_0) [L129] SORT_11 var_61_arg_0 = state_60; [L130] SORT_1 var_61 = var_61_arg_0 != 0; [L131] SORT_1 var_62_arg_0 = var_61; [L132] SORT_1 var_62 = ~var_62_arg_0; [L133] SORT_1 var_103_arg_0 = var_62; [L134] SORT_1 var_103 = ~var_103_arg_0; [L135] SORT_1 var_104_arg_0 = input_5; [L136] SORT_1 var_104 = ~var_104_arg_0; [L137] SORT_1 var_105_arg_0 = var_103; [L138] SORT_1 var_105_arg_1 = var_104; [L139] SORT_1 var_105 = var_105_arg_0 | var_105_arg_1; [L140] SORT_1 var_106_arg_0 = var_51; [L141] SORT_1 var_106 = ~var_106_arg_0; [L142] SORT_1 var_107_arg_0 = var_105; [L143] SORT_1 var_107_arg_1 = var_106; [L144] SORT_1 var_107 = var_107_arg_0 | var_107_arg_1; [L145] var_107 = var_107 & mask_SORT_1 [L146] SORT_1 constr_108_arg_0 = var_107; [L147] CALL assume_abort_if_not(constr_108_arg_0) [L21] COND FALSE !(!cond) [L147] RET assume_abort_if_not(constr_108_arg_0) [L149] SORT_1 var_112_arg_0 = state_91; [L150] SORT_1 var_112_arg_1 = var_111; [L151] SORT_1 var_112_arg_2 = var_51; [L152] SORT_1 var_112 = var_112_arg_0 ? var_112_arg_1 : var_112_arg_2; [L153] SORT_1 var_70_arg_0 = state_69; [L154] SORT_1 var_70 = ~var_70_arg_0; [L155] SORT_1 var_71_arg_0 = state_68; [L156] SORT_1 var_71_arg_1 = var_70; [L157] SORT_1 var_71 = var_71_arg_0 & var_71_arg_1; [L158] SORT_11 var_73_arg_0 = state_72; [L159] SORT_1 var_73 = var_73_arg_0 != 0; [L160] SORT_1 var_74_arg_0 = var_71; [L161] SORT_1 var_74_arg_1 = var_73; [L162] SORT_1 var_74 = var_74_arg_0 & var_74_arg_1; [L163] SORT_1 var_75_arg_0 = state_68; [L164] SORT_1 var_75 = ~var_75_arg_0; [L165] SORT_1 var_76_arg_0 = input_6; [L166] SORT_1 var_76_arg_1 = var_75; [L167] SORT_1 var_76 = var_76_arg_0 & var_76_arg_1; [L168] SORT_1 var_77_arg_0 = var_76; [L169] var_77_arg_0 = var_77_arg_0 & mask_SORT_1 [L170] SORT_11 var_77 = var_77_arg_0; [L171] SORT_11 var_78_arg_0 = state_72; [L172] SORT_11 var_78_arg_1 = var_77; [L173] SORT_11 var_78 = var_78_arg_0 + var_78_arg_1; [L174] SORT_1 var_79_arg_0 = input_5; [L175] var_79_arg_0 = var_79_arg_0 & mask_SORT_1 [L176] SORT_11 var_79 = var_79_arg_0; [L177] SORT_11 var_80_arg_0 = var_78; [L178] SORT_11 var_80_arg_1 = var_79; [L179] SORT_11 var_80 = var_80_arg_0 - var_80_arg_1; [L180] SORT_1 var_82_arg_0 = input_7; [L181] SORT_11 var_82_arg_1 = var_81; [L182] SORT_11 var_82_arg_2 = var_80; [L183] SORT_11 var_82 = var_82_arg_0 ? var_82_arg_1 : var_82_arg_2; [L184] var_82 = var_82 & mask_SORT_11 [L185] SORT_11 var_83_arg_0 = var_82; [L186] SORT_1 var_83 = var_83_arg_0 != 0; [L187] SORT_1 var_84_arg_0 = var_83; [L188] SORT_1 var_84 = ~var_84_arg_0; [L189] SORT_1 var_85_arg_0 = var_74; [L190] SORT_1 var_85_arg_1 = var_84; [L191] SORT_1 var_85 = var_85_arg_0 & var_85_arg_1; [L192] SORT_1 var_86_arg_0 = var_85; [L193] SORT_1 var_86 = ~var_86_arg_0; [L194] SORT_11 var_14_arg_0 = state_12; [L195] SORT_13 var_14 = var_14_arg_0 >> 0; [L196] var_14 = var_14 & mask_SORT_13 [L197] SORT_13 var_56_arg_0 = var_14; [L198] SORT_1 var_56 = var_56_arg_0 != 0; [L199] SORT_1 var_57_arg_0 = var_56; [L200] SORT_1 var_57 = ~var_57_arg_0; [L201] var_57 = var_57 & mask_SORT_1 [L202] SORT_1 var_52_arg_0 = var_51; [L203] var_52_arg_0 = var_52_arg_0 & mask_SORT_1 [L204] SORT_13 var_52 = var_52_arg_0; [L205] SORT_13 var_53_arg_0 = var_14; [L206] SORT_13 var_53_arg_1 = var_52; [L207] SORT_1 var_53 = var_53_arg_0 == var_53_arg_1; [L208] SORT_40 var_47_arg_0 = var_46; [L209] var_47_arg_0 = var_47_arg_0 & mask_SORT_40 [L210] SORT_13 var_47 = var_47_arg_0; [L211] SORT_13 var_48_arg_0 = var_14; [L212] SORT_13 var_48_arg_1 = var_47; [L213] SORT_1 var_48 = var_48_arg_0 == var_48_arg_1; [L214] SORT_40 var_42_arg_0 = var_41; [L215] var_42_arg_0 = var_42_arg_0 & mask_SORT_40 [L216] SORT_13 var_42 = var_42_arg_0; [L217] SORT_13 var_43_arg_0 = var_14; [L218] SORT_13 var_43_arg_1 = var_42; [L219] SORT_1 var_43 = var_43_arg_0 == var_43_arg_1; [L220] SORT_19 var_36_arg_0 = var_35; [L221] var_36_arg_0 = var_36_arg_0 & mask_SORT_19 [L222] SORT_13 var_36 = var_36_arg_0; [L223] SORT_13 var_37_arg_0 = var_14; [L224] SORT_13 var_37_arg_1 = var_36; [L225] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L226] SORT_19 var_31_arg_0 = var_30; [L227] var_31_arg_0 = var_31_arg_0 & mask_SORT_19 [L228] SORT_13 var_31 = var_31_arg_0; [L229] SORT_13 var_32_arg_0 = var_14; [L230] SORT_13 var_32_arg_1 = var_31; [L231] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L232] SORT_19 var_26_arg_0 = var_25; [L233] var_26_arg_0 = var_26_arg_0 & mask_SORT_19 [L234] SORT_13 var_26 = var_26_arg_0; [L235] SORT_13 var_27_arg_0 = var_14; [L236] SORT_13 var_27_arg_1 = var_26; [L237] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L238] SORT_19 var_21_arg_0 = var_20; [L239] var_21_arg_0 = var_21_arg_0 & mask_SORT_19 [L240] SORT_13 var_21 = var_21_arg_0; [L241] SORT_13 var_22_arg_0 = var_14; [L242] SORT_13 var_22_arg_1 = var_21; [L243] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L244] SORT_13 var_16_arg_0 = var_14; [L245] SORT_13 var_16_arg_1 = var_15; [L246] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1; [L247] SORT_1 var_17_arg_0 = var_16; [L248] SORT_3 var_17_arg_1 = state_10; [L249] SORT_3 var_17_arg_2 = input_9; [L250] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2; [L251] SORT_1 var_23_arg_0 = var_22; [L252] SORT_3 var_23_arg_1 = state_18; [L253] SORT_3 var_23_arg_2 = var_17; [L254] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L255] SORT_1 var_28_arg_0 = var_27; [L256] SORT_3 var_28_arg_1 = state_24; [L257] SORT_3 var_28_arg_2 = var_23; [L258] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L259] SORT_1 var_33_arg_0 = var_32; [L260] SORT_3 var_33_arg_1 = state_29; [L261] SORT_3 var_33_arg_2 = var_28; [L262] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L263] SORT_1 var_38_arg_0 = var_37; [L264] SORT_3 var_38_arg_1 = state_34; [L265] SORT_3 var_38_arg_2 = var_33; [L266] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L267] SORT_1 var_44_arg_0 = var_43; [L268] SORT_3 var_44_arg_1 = state_39; [L269] SORT_3 var_44_arg_2 = var_38; [L270] SORT_3 var_44 = var_44_arg_0 ? var_44_arg_1 : var_44_arg_2; [L271] SORT_1 var_49_arg_0 = var_48; [L272] SORT_3 var_49_arg_1 = state_45; [L273] SORT_3 var_49_arg_2 = var_44; [L274] SORT_3 var_49 = var_49_arg_0 ? var_49_arg_1 : var_49_arg_2; [L275] SORT_1 var_54_arg_0 = var_53; [L276] SORT_3 var_54_arg_1 = state_50; [L277] SORT_3 var_54_arg_2 = var_49; [L278] SORT_3 var_54 = var_54_arg_0 ? var_54_arg_1 : var_54_arg_2; [L279] SORT_1 var_58_arg_0 = var_57; [L280] SORT_3 var_58_arg_1 = state_55; [L281] SORT_3 var_58_arg_2 = var_54; [L282] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2; [L283] var_58 = var_58 & mask_SORT_3 [L284] SORT_3 var_88_arg_0 = state_87; [L285] SORT_3 var_88_arg_1 = var_58; [L286] SORT_1 var_88 = var_88_arg_0 == var_88_arg_1; [L287] SORT_1 var_89_arg_0 = var_86; [L288] SORT_1 var_89_arg_1 = var_88; [L289] SORT_1 var_89 = var_89_arg_0 | var_89_arg_1; [L290] SORT_1 var_110_arg_0 = state_91; [L291] SORT_1 var_110_arg_1 = input_109; [L292] SORT_1 var_110_arg_2 = var_89; [L293] SORT_1 var_110 = var_110_arg_0 ? var_110_arg_1 : var_110_arg_2; [L294] SORT_1 var_113_arg_0 = var_110; [L295] SORT_1 var_113 = ~var_113_arg_0; [L296] SORT_1 var_114_arg_0 = var_112; [L297] SORT_1 var_114_arg_1 = var_113; [L298] SORT_1 var_114 = var_114_arg_0 & var_114_arg_1; [L299] var_114 = var_114 & mask_SORT_1 [L300] SORT_1 bad_115_arg_0 = var_114; [L301] CALL __VERIFIER_assert(!(bad_115_arg_0)) [L20] COND TRUE !(cond) [L20] reach_error() - StatisticsResult: Ultimate Automizer benchmark data CFG has 2 procedures, 21 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 455.0s, OverallIterations: 5, TraceHistogramMax: 12, PathProgramHistogramMax: 3, EmptinessCheckTime: 0.0s, AutomataDifference: 5.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 129 SdHoareTripleChecker+Valid, 3.5s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 119 mSDsluCounter, 312 SdHoareTripleChecker+Invalid, 3.3s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 243 mSDsCounter, 49 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 789 IncrementalHoareTripleChecker+Invalid, 838 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 49 mSolverCounterUnsat, 69 mSDtfsCounter, 789 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 405 GetRequests, 337 SyntacticMatches, 1 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 378 ImplicationChecksByTransitivity, 45.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=43occurred in iteration=4, InterpolantAutomatonStates: 33, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 4 MinimizatonAttempts, 24 StatesRemovedByMinimization, 3 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 1.1s SsaConstructionTime, 3.5s SatisfiabilityAnalysisTime, 441.0s InterpolantComputationTime, 459 NumberOfCodeBlocks, 447 NumberOfCodeBlocksAsserted, 17 NumberOfCheckSat, 365 ConstructedInterpolants, 22 QuantifiedInterpolants, 5163 SizeOfPredicates, 729 NumberOfNonLiveVariables, 8195 ConjunctsInSsa, 1098 ConjunctsInUnsatCore, 8 InterpolantComputations, 2 PerfectInterpolantSequences, 483/735 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Result: UNKNOWN