./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.loyd.1.prop1-func-interl.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 4e7fbc69 Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.loyd.1.prop1-func-interl.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/config/svcomp-Reach-64bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 26db93204ab32e8f9e21f7eb034d2307b8352a18baf9236ed38d699dc2a3b5eb --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-4e7fbc6 [2022-11-23 15:38:30,698 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-23 15:38:30,700 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-23 15:38:30,717 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-23 15:38:30,717 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-23 15:38:30,718 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-23 15:38:30,720 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-23 15:38:30,721 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-23 15:38:30,723 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-23 15:38:30,724 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-23 15:38:30,725 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-23 15:38:30,726 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-23 15:38:30,727 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-23 15:38:30,728 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-23 15:38:30,729 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-23 15:38:30,730 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-23 15:38:30,731 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-23 15:38:30,732 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-23 15:38:30,734 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-23 15:38:30,736 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-23 15:38:30,737 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-23 15:38:30,739 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-23 15:38:30,741 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-23 15:38:30,741 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-23 15:38:30,745 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-23 15:38:30,745 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-23 15:38:30,745 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-23 15:38:30,747 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-23 15:38:30,747 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-23 15:38:30,748 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-23 15:38:30,748 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-23 15:38:30,749 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-23 15:38:30,750 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-23 15:38:30,751 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-23 15:38:30,752 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-23 15:38:30,752 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-23 15:38:30,753 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-23 15:38:30,753 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-23 15:38:30,754 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-23 15:38:30,767 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-23 15:38:30,768 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-23 15:38:30,769 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/config/svcomp-Reach-64bit-Taipan_Default.epf [2022-11-23 15:38:30,802 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-23 15:38:30,802 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-23 15:38:30,803 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-23 15:38:30,803 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-23 15:38:30,804 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-23 15:38:30,804 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-23 15:38:30,804 INFO L138 SettingsManager]: * User list type=DISABLED [2022-11-23 15:38:30,805 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-11-23 15:38:30,805 INFO L138 SettingsManager]: * Explicit value domain=true [2022-11-23 15:38:30,805 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2022-11-23 15:38:30,806 INFO L138 SettingsManager]: * Octagon Domain=false [2022-11-23 15:38:30,806 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-11-23 15:38:30,806 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2022-11-23 15:38:30,807 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2022-11-23 15:38:30,807 INFO L138 SettingsManager]: * Interval Domain=false [2022-11-23 15:38:30,807 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2022-11-23 15:38:30,807 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2022-11-23 15:38:30,808 INFO L138 SettingsManager]: * Simplification Technique=POLY_PAC [2022-11-23 15:38:30,808 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-23 15:38:30,808 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-23 15:38:30,809 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-23 15:38:30,809 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-23 15:38:30,809 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-23 15:38:30,809 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-23 15:38:30,810 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-23 15:38:30,810 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-23 15:38:30,810 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-23 15:38:30,810 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-23 15:38:30,810 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-23 15:38:30,811 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-23 15:38:30,811 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-23 15:38:30,811 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2022-11-23 15:38:30,811 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-23 15:38:30,812 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-23 15:38:30,812 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2022-11-23 15:38:30,812 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-11-23 15:38:30,812 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-23 15:38:30,813 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-11-23 15:38:30,813 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 26db93204ab32e8f9e21f7eb034d2307b8352a18baf9236ed38d699dc2a3b5eb [2022-11-23 15:38:31,087 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-23 15:38:31,107 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-23 15:38:31,109 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-23 15:38:31,111 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-23 15:38:31,111 INFO L275 PluginConnector]: CDTParser initialized [2022-11-23 15:38:31,112 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.loyd.1.prop1-func-interl.c [2022-11-23 15:38:34,148 INFO L500 CDTParser]: Created temporary CDT project at NULL [2022-11-23 15:38:34,459 INFO L351 CDTParser]: Found 1 translation units. [2022-11-23 15:38:34,459 INFO L172 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.loyd.1.prop1-func-interl.c [2022-11-23 15:38:34,478 INFO L394 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/data/0a3b49521/f2511bcb28bb4e009d00ebc3fdfc4dc5/FLAGd506603d0 [2022-11-23 15:38:34,573 INFO L402 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/data/0a3b49521/f2511bcb28bb4e009d00ebc3fdfc4dc5 [2022-11-23 15:38:34,576 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-23 15:38:34,578 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-23 15:38:34,580 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-23 15:38:34,580 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-23 15:38:34,596 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-23 15:38:34,599 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 03:38:34" (1/1) ... [2022-11-23 15:38:34,600 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@bf9f5db and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:38:34, skipping insertion in model container [2022-11-23 15:38:34,601 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 03:38:34" (1/1) ... [2022-11-23 15:38:34,613 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-23 15:38:34,690 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-23 15:38:34,907 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.loyd.1.prop1-func-interl.c[1014,1027] [2022-11-23 15:38:35,180 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-23 15:38:35,186 INFO L203 MainTranslator]: Completed pre-run [2022-11-23 15:38:35,198 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.loyd.1.prop1-func-interl.c[1014,1027] [2022-11-23 15:38:35,322 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-23 15:38:35,334 INFO L208 MainTranslator]: Completed translation [2022-11-23 15:38:35,335 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:38:35 WrapperNode [2022-11-23 15:38:35,335 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-23 15:38:35,336 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-23 15:38:35,336 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-23 15:38:35,337 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-23 15:38:35,358 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:38:35" (1/1) ... [2022-11-23 15:38:35,382 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:38:35" (1/1) ... [2022-11-23 15:38:35,490 INFO L138 Inliner]: procedures = 11, calls = 3, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 966 [2022-11-23 15:38:35,491 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-23 15:38:35,492 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-23 15:38:35,492 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-23 15:38:35,492 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-23 15:38:35,502 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:38:35" (1/1) ... [2022-11-23 15:38:35,502 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:38:35" (1/1) ... [2022-11-23 15:38:35,514 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:38:35" (1/1) ... [2022-11-23 15:38:35,515 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:38:35" (1/1) ... [2022-11-23 15:38:35,575 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:38:35" (1/1) ... [2022-11-23 15:38:35,580 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:38:35" (1/1) ... [2022-11-23 15:38:35,601 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:38:35" (1/1) ... [2022-11-23 15:38:35,606 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:38:35" (1/1) ... [2022-11-23 15:38:35,616 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-23 15:38:35,616 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-23 15:38:35,617 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-23 15:38:35,617 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-23 15:38:35,618 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:38:35" (1/1) ... [2022-11-23 15:38:35,636 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-23 15:38:35,649 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/z3 [2022-11-23 15:38:35,664 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-23 15:38:35,690 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-23 15:38:35,714 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-23 15:38:35,714 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-23 15:38:36,039 INFO L235 CfgBuilder]: Building ICFG [2022-11-23 15:38:36,041 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-23 15:39:08,312 INFO L276 CfgBuilder]: Performing block encoding [2022-11-23 15:39:08,360 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-23 15:39:08,360 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-23 15:39:08,364 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 03:39:08 BoogieIcfgContainer [2022-11-23 15:39:08,364 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-23 15:39:08,371 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-23 15:39:08,371 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-23 15:39:08,375 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-23 15:39:08,375 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 03:38:34" (1/3) ... [2022-11-23 15:39:08,379 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6ba36b5b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 03:39:08, skipping insertion in model container [2022-11-23 15:39:08,379 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:38:35" (2/3) ... [2022-11-23 15:39:08,380 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6ba36b5b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 03:39:08, skipping insertion in model container [2022-11-23 15:39:08,380 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 03:39:08" (3/3) ... [2022-11-23 15:39:08,382 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.loyd.1.prop1-func-interl.c [2022-11-23 15:39:08,405 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-23 15:39:08,406 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-23 15:39:08,466 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-23 15:39:08,474 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@7a80f200, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-23 15:39:08,474 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-23 15:39:08,480 INFO L276 IsEmpty]: Start isEmpty. Operand has 7 states, 5 states have (on average 1.6) internal successors, (8), 6 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 15:39:08,488 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2022-11-23 15:39:08,488 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 15:39:08,489 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1] [2022-11-23 15:39:08,490 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-23 15:39:08,496 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 15:39:08,496 INFO L85 PathProgramCache]: Analyzing trace with hash 1827279, now seen corresponding path program 1 times [2022-11-23 15:39:08,506 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-23 15:39:08,507 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2048623732] [2022-11-23 15:39:08,507 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 15:39:08,507 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 15:39:08,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 15:39:09,447 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-23 15:39:09,448 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-23 15:39:09,449 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2048623732] [2022-11-23 15:39:09,450 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2048623732] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-23 15:39:09,450 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-23 15:39:09,450 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-23 15:39:09,453 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [19287405] [2022-11-23 15:39:09,454 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-23 15:39:09,460 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-23 15:39:09,461 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-23 15:39:09,502 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-23 15:39:09,503 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-23 15:39:09,506 INFO L87 Difference]: Start difference. First operand has 7 states, 5 states have (on average 1.6) internal successors, (8), 6 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 1.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 15:39:11,648 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.09s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-11-23 15:39:11,682 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 15:39:11,683 INFO L93 Difference]: Finished difference Result 15 states and 20 transitions. [2022-11-23 15:39:11,684 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-23 15:39:11,686 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 4 [2022-11-23 15:39:11,686 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-23 15:39:11,694 INFO L225 Difference]: With dead ends: 15 [2022-11-23 15:39:11,694 INFO L226 Difference]: Without dead ends: 9 [2022-11-23 15:39:11,696 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-23 15:39:11,700 INFO L413 NwaCegarLoop]: 2 mSDtfsCounter, 3 mSDsluCounter, 4 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 1 mSolverCounterUnsat, 1 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 6 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 1 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.1s IncrementalHoareTripleChecker+Time [2022-11-23 15:39:11,702 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 6 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 7 Invalid, 1 Unknown, 0 Unchecked, 2.1s Time] [2022-11-23 15:39:11,723 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9 states. [2022-11-23 15:39:11,736 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9 to 8. [2022-11-23 15:39:11,737 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 7 states have (on average 1.1428571428571428) internal successors, (8), 7 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 15:39:11,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 8 transitions. [2022-11-23 15:39:11,740 INFO L78 Accepts]: Start accepts. Automaton has 8 states and 8 transitions. Word has length 4 [2022-11-23 15:39:11,740 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-23 15:39:11,740 INFO L495 AbstractCegarLoop]: Abstraction has 8 states and 8 transitions. [2022-11-23 15:39:11,741 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 1.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 15:39:11,741 INFO L276 IsEmpty]: Start isEmpty. Operand 8 states and 8 transitions. [2022-11-23 15:39:11,741 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2022-11-23 15:39:11,742 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 15:39:11,742 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1] [2022-11-23 15:39:11,742 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-11-23 15:39:11,743 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-23 15:39:11,743 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 15:39:11,744 INFO L85 PathProgramCache]: Analyzing trace with hash -1393329571, now seen corresponding path program 1 times [2022-11-23 15:39:11,744 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-23 15:39:11,744 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [451849355] [2022-11-23 15:39:11,745 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 15:39:11,745 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 15:39:11,860 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-23 15:39:11,860 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1475262369] [2022-11-23 15:39:11,860 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 15:39:11,861 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 15:39:11,861 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/z3 [2022-11-23 15:39:11,866 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-23 15:39:11,894 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-11-23 15:41:45,463 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 15:41:45,464 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-23 15:42:42,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 15:42:42,632 INFO L130 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2022-11-23 15:42:42,633 INFO L359 BasicCegarLoop]: Counterexample is feasible [2022-11-23 15:42:42,639 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-11-23 15:42:42,862 WARN L435 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forcibly destroying the process [2022-11-23 15:42:42,893 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 137 [2022-11-23 15:42:42,893 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 15:42:42,897 INFO L444 BasicCegarLoop]: Path program histogram: [1, 1] [2022-11-23 15:42:42,900 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-23 15:42:43,005 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-23 15:42:43,006 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-23 15:42:43,041 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 23.11 03:42:43 BoogieIcfgContainer [2022-11-23 15:42:43,041 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-23 15:42:43,042 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-23 15:42:43,042 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-23 15:42:43,042 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-23 15:42:43,043 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 03:39:08" (3/4) ... [2022-11-23 15:42:43,046 INFO L140 WitnessPrinter]: No result that supports witness generation found [2022-11-23 15:42:43,046 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-23 15:42:43,047 INFO L158 Benchmark]: Toolchain (without parser) took 248468.87ms. Allocated memory was 148.9MB in the beginning and 960.5MB in the end (delta: 811.6MB). Free memory was 121.4MB in the beginning and 452.6MB in the end (delta: -331.3MB). Peak memory consumption was 479.5MB. Max. memory is 16.1GB. [2022-11-23 15:42:43,047 INFO L158 Benchmark]: CDTParser took 0.25ms. Allocated memory is still 107.0MB. Free memory was 75.3MB in the beginning and 75.2MB in the end (delta: 91.6kB). There was no memory consumed. Max. memory is 16.1GB. [2022-11-23 15:42:43,048 INFO L158 Benchmark]: CACSL2BoogieTranslator took 755.72ms. Allocated memory is still 148.9MB. Free memory was 121.4MB in the beginning and 85.4MB in the end (delta: 35.9MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. [2022-11-23 15:42:43,049 INFO L158 Benchmark]: Boogie Procedure Inliner took 154.99ms. Allocated memory is still 148.9MB. Free memory was 85.4MB in the beginning and 75.0MB in the end (delta: 10.5MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. [2022-11-23 15:42:43,049 INFO L158 Benchmark]: Boogie Preprocessor took 124.14ms. Allocated memory is still 148.9MB. Free memory was 75.0MB in the beginning and 68.7MB in the end (delta: 6.3MB). Peak memory consumption was 6.3MB. Max. memory is 16.1GB. [2022-11-23 15:42:43,050 INFO L158 Benchmark]: RCFGBuilder took 32747.76ms. Allocated memory was 148.9MB in the beginning and 960.5MB in the end (delta: 811.6MB). Free memory was 68.7MB in the beginning and 662.4MB in the end (delta: -593.7MB). Peak memory consumption was 542.6MB. Max. memory is 16.1GB. [2022-11-23 15:42:43,050 INFO L158 Benchmark]: TraceAbstraction took 214670.32ms. Allocated memory is still 960.5MB. Free memory was 661.3MB in the beginning and 453.7MB in the end (delta: 207.6MB). Peak memory consumption was 207.6MB. Max. memory is 16.1GB. [2022-11-23 15:42:43,051 INFO L158 Benchmark]: Witness Printer took 4.65ms. Allocated memory is still 960.5MB. Free memory was 453.7MB in the beginning and 452.6MB in the end (delta: 1.0MB). There was no memory consumed. Max. memory is 16.1GB. [2022-11-23 15:42:43,054 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.25ms. Allocated memory is still 107.0MB. Free memory was 75.3MB in the beginning and 75.2MB in the end (delta: 91.6kB). There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 755.72ms. Allocated memory is still 148.9MB. Free memory was 121.4MB in the beginning and 85.4MB in the end (delta: 35.9MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 154.99ms. Allocated memory is still 148.9MB. Free memory was 85.4MB in the beginning and 75.0MB in the end (delta: 10.5MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. * Boogie Preprocessor took 124.14ms. Allocated memory is still 148.9MB. Free memory was 75.0MB in the beginning and 68.7MB in the end (delta: 6.3MB). Peak memory consumption was 6.3MB. Max. memory is 16.1GB. * RCFGBuilder took 32747.76ms. Allocated memory was 148.9MB in the beginning and 960.5MB in the end (delta: 811.6MB). Free memory was 68.7MB in the beginning and 662.4MB in the end (delta: -593.7MB). Peak memory consumption was 542.6MB. Max. memory is 16.1GB. * TraceAbstraction took 214670.32ms. Allocated memory is still 960.5MB. Free memory was 661.3MB in the beginning and 453.7MB in the end (delta: 207.6MB). Peak memory consumption was 207.6MB. Max. memory is 16.1GB. * Witness Printer took 4.65ms. Allocated memory is still 960.5MB. Free memory was 453.7MB in the beginning and 452.6MB in the end (delta: 1.0MB). There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation The program execution was not completely translated back. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 20]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: overapproximation of bitwiseOr at line 119, overapproximation of bitwiseAnd at line 99, overapproximation of bitwiseComplement at line 110, overapproximation of bitwiseXor at line 160. Possible FailurePath: [L25] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L26] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L28] const SORT_2 mask_SORT_2 = (SORT_2)-1 >> (sizeof(SORT_2) * 8 - 8); [L29] const SORT_2 msb_SORT_2 = (SORT_2)1 << (8 - 1); [L31] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 24); [L32] const SORT_3 msb_SORT_3 = (SORT_3)1 << (24 - 1); [L34] const SORT_4 mask_SORT_4 = (SORT_4)-1 >> (sizeof(SORT_4) * 8 - 32); [L35] const SORT_4 msb_SORT_4 = (SORT_4)1 << (32 - 1); [L37] const SORT_2 var_5 = 0; [L38] const SORT_1 var_22 = 0; [L39] const SORT_4 var_34 = 0; [L40] const SORT_3 var_35 = 0; [L41] const SORT_4 var_37 = 2; [L42] const SORT_4 var_42 = 1; [L43] const SORT_2 var_49 = 0; [L44] const SORT_2 var_51 = 1; [L45] const SORT_2 var_54 = 2; [L46] const SORT_4 var_56 = 3; [L47] const SORT_2 var_58 = 3; [L48] const SORT_4 var_60 = 4; [L49] const SORT_2 var_62 = 4; [L50] const SORT_2 var_64 = 5; [L51] const SORT_4 var_200 = 5; [L53] SORT_1 input_33; [L54] SORT_1 input_72; [L55] SORT_1 input_89; [L56] SORT_1 input_104; [L57] SORT_1 input_237; [L59] SORT_2 state_6 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L60] SORT_2 state_8 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L61] SORT_2 state_10 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L62] SORT_2 state_12 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L63] SORT_2 state_14 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L64] SORT_2 state_16 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L65] SORT_2 state_18 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L66] SORT_2 state_20 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L67] SORT_1 state_23 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L68] SORT_1 state_25 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L69] SORT_1 state_27 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L70] SORT_1 state_29 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L72] SORT_2 init_7_arg_1 = var_5; [L73] state_6 = init_7_arg_1 [L74] SORT_2 init_9_arg_1 = var_5; [L75] state_8 = init_9_arg_1 [L76] SORT_2 init_11_arg_1 = var_5; [L77] state_10 = init_11_arg_1 [L78] SORT_2 init_13_arg_1 = var_5; [L79] state_12 = init_13_arg_1 [L80] SORT_2 init_15_arg_1 = var_5; [L81] state_14 = init_15_arg_1 [L82] SORT_2 init_17_arg_1 = var_5; [L83] state_16 = init_17_arg_1 [L84] SORT_2 init_19_arg_1 = var_5; [L85] state_18 = init_19_arg_1 [L86] SORT_2 init_21_arg_1 = var_5; [L87] state_20 = init_21_arg_1 [L88] SORT_1 init_24_arg_1 = var_22; [L89] state_23 = init_24_arg_1 [L90] SORT_1 init_26_arg_1 = var_22; [L91] state_25 = init_26_arg_1 [L92] SORT_1 init_28_arg_1 = var_22; [L93] state_27 = init_28_arg_1 [L94] SORT_1 init_30_arg_1 = var_22; [L95] state_29 = init_30_arg_1 VAL [init_11_arg_1=0, init_13_arg_1=0, init_15_arg_1=0, init_17_arg_1=0, init_19_arg_1=0, init_21_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_28_arg_1=0, init_30_arg_1=0, init_7_arg_1=0, init_9_arg_1=0, mask_SORT_1=1, mask_SORT_2=255, mask_SORT_3=4294967295, mask_SORT_4=4294967295, msb_SORT_1=1, msb_SORT_2=128, msb_SORT_3=8388608, msb_SORT_4=2147483648, state_10=0, state_12=0, state_14=0, state_16=0, state_18=0, state_20=0, state_23=0, state_25=0, state_27=0, state_29=0, state_6=0, state_8=0, var_200=5, var_22=0, var_34=0, var_35=0, var_37=2, var_42=1, var_49=0, var_5=0, var_51=1, var_54=2, var_56=3, var_58=3, var_60=4, var_62=4, var_64=5] [L98] input_33 = __VERIFIER_nondet_uchar() [L99] input_33 = input_33 & mask_SORT_1 [L100] input_72 = __VERIFIER_nondet_uchar() [L101] input_72 = input_72 & mask_SORT_1 [L102] input_89 = __VERIFIER_nondet_uchar() [L103] input_89 = input_89 & mask_SORT_1 [L104] input_104 = __VERIFIER_nondet_uchar() [L105] input_104 = input_104 & mask_SORT_1 [L106] input_237 = __VERIFIER_nondet_uchar() [L109] SORT_1 var_31_arg_0 = state_27; [L110] SORT_1 var_31_arg_1 = ~state_29; [L111] var_31_arg_1 = var_31_arg_1 & mask_SORT_1 [L112] SORT_1 var_31 = var_31_arg_0 & var_31_arg_1; [L113] var_31 = var_31 & mask_SORT_1 [L114] SORT_1 bad_32_arg_0 = var_31; [L115] CALL __VERIFIER_assert(!(bad_32_arg_0)) [L20] COND FALSE !(!(cond)) VAL [cond=1, unknown-#in~cond-unknown=1] [L115] RET __VERIFIER_assert(!(bad_32_arg_0)) [L117] SORT_3 var_36_arg_0 = var_35; [L118] SORT_2 var_36_arg_1 = state_18; [L119] SORT_4 var_36 = ((SORT_4)var_36_arg_0 << 8) | var_36_arg_1; [L120] var_36 = var_36 & mask_SORT_4 [L121] SORT_3 var_38_arg_0 = var_35; [L122] SORT_2 var_38_arg_1 = state_20; [L123] SORT_4 var_38 = ((SORT_4)var_38_arg_0 << 8) | var_38_arg_1; [L124] var_38 = var_38 & mask_SORT_4 [L125] SORT_4 var_39_arg_0 = var_37; [L126] SORT_4 var_39_arg_1 = var_38; [L127] SORT_4 var_39 = var_39_arg_0 * var_39_arg_1; [L128] SORT_4 var_40_arg_0 = var_36; [L129] SORT_4 var_40_arg_1 = var_39; [L130] SORT_4 var_40 = var_40_arg_0 + var_40_arg_1; [L131] var_40 = var_40 & mask_SORT_4 [L132] SORT_4 var_41_arg_0 = var_34; [L133] SORT_4 var_41_arg_1 = var_40; [L134] SORT_1 var_41 = var_41_arg_0 == var_41_arg_1; [L135] SORT_4 var_43_arg_0 = var_42; [L136] SORT_4 var_43_arg_1 = var_38; [L137] SORT_4 var_43 = var_43_arg_0 + var_43_arg_1; [L138] SORT_4 var_44_arg_0 = var_37; [L139] SORT_4 var_44_arg_1 = var_43; [L140] SORT_4 var_44 = var_44_arg_0 * var_44_arg_1; [L141] SORT_4 var_45_arg_0 = var_36; [L142] SORT_4 var_45_arg_1 = var_44; [L143] SORT_4 var_45 = var_45_arg_0 + var_45_arg_1; [L144] var_45 = var_45 & mask_SORT_4 [L145] SORT_4 var_46_arg_0 = var_34; [L146] SORT_4 var_46_arg_1 = var_45; [L147] SORT_1 var_46 = var_46_arg_0 == var_46_arg_1; [L148] SORT_1 var_47_arg_0 = var_41; [L149] SORT_1 var_47_arg_1 = var_46; [L150] SORT_1 var_47 = var_47_arg_0 | var_47_arg_1; [L151] SORT_1 var_48_arg_0 = input_33; [L152] SORT_1 var_48_arg_1 = var_47; [L153] SORT_1 var_48 = var_48_arg_0 & var_48_arg_1; [L154] var_48 = var_48 & mask_SORT_1 [L155] SORT_4 var_50_arg_0 = var_42; [L156] SORT_4 var_50_arg_1 = var_45; [L157] SORT_1 var_50 = var_50_arg_0 == var_50_arg_1; [L158] SORT_2 var_52_arg_0 = var_51; [L159] SORT_2 var_52_arg_1 = state_8; [L160] SORT_2 var_52 = var_52_arg_0 ^ var_52_arg_1; [L161] var_52 = var_52 & mask_SORT_2 [L162] SORT_4 var_53_arg_0 = var_37; [L163] SORT_4 var_53_arg_1 = var_45; [L164] SORT_1 var_53 = var_53_arg_0 == var_53_arg_1; [L165] SORT_2 var_55_arg_0 = var_54; [L166] SORT_2 var_55_arg_1 = state_10; [L167] SORT_2 var_55 = var_55_arg_0 ^ var_55_arg_1; [L168] var_55 = var_55 & mask_SORT_2 [L169] SORT_4 var_57_arg_0 = var_56; [L170] SORT_4 var_57_arg_1 = var_45; [L171] SORT_1 var_57 = var_57_arg_0 == var_57_arg_1; [L172] SORT_2 var_59_arg_0 = var_58; [L173] SORT_2 var_59_arg_1 = state_12; [L174] SORT_2 var_59 = var_59_arg_0 ^ var_59_arg_1; [L175] var_59 = var_59 & mask_SORT_2 [L176] SORT_4 var_61_arg_0 = var_60; [L177] SORT_4 var_61_arg_1 = var_45; [L178] SORT_1 var_61 = var_61_arg_0 == var_61_arg_1; [L179] SORT_2 var_63_arg_0 = var_62; [L180] SORT_2 var_63_arg_1 = state_14; [L181] SORT_2 var_63 = var_63_arg_0 ^ var_63_arg_1; [L182] var_63 = var_63 & mask_SORT_2 [L183] SORT_2 var_65_arg_0 = var_64; [L184] SORT_2 var_65_arg_1 = state_16; [L185] SORT_2 var_65 = var_65_arg_0 ^ var_65_arg_1; [L186] var_65 = var_65 & mask_SORT_2 [L187] SORT_1 var_66_arg_0 = var_61; [L188] SORT_2 var_66_arg_1 = var_63; [L189] SORT_2 var_66_arg_2 = var_65; [L190] SORT_2 var_66 = var_66_arg_0 ? var_66_arg_1 : var_66_arg_2; [L191] SORT_1 var_67_arg_0 = var_57; [L192] SORT_2 var_67_arg_1 = var_59; [L193] SORT_2 var_67_arg_2 = var_66; [L194] SORT_2 var_67 = var_67_arg_0 ? var_67_arg_1 : var_67_arg_2; [L195] SORT_1 var_68_arg_0 = var_53; [L196] SORT_2 var_68_arg_1 = var_55; [L197] SORT_2 var_68_arg_2 = var_67; [L198] SORT_2 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L199] SORT_1 var_69_arg_0 = var_50; [L200] SORT_2 var_69_arg_1 = var_52; [L201] SORT_2 var_69_arg_2 = var_68; [L202] SORT_2 var_69 = var_69_arg_0 ? var_69_arg_1 : var_69_arg_2; [L203] SORT_1 var_70_arg_0 = var_46; [L204] SORT_2 var_70_arg_1 = state_6; [L205] SORT_2 var_70_arg_2 = var_69; [L206] SORT_2 var_70 = var_70_arg_0 ? var_70_arg_1 : var_70_arg_2; [L207] SORT_1 var_71_arg_0 = var_46; [L208] SORT_2 var_71_arg_1 = var_49; [L209] SORT_2 var_71_arg_2 = var_70; [L210] SORT_2 var_71 = var_71_arg_0 ? var_71_arg_1 : var_71_arg_2; [L211] SORT_4 var_73_arg_0 = var_38; [L212] SORT_4 var_73_arg_1 = var_42; [L213] SORT_4 var_73 = var_73_arg_0 - var_73_arg_1; [L214] SORT_4 var_74_arg_0 = var_37; [L215] SORT_4 var_74_arg_1 = var_73; [L216] SORT_4 var_74 = var_74_arg_0 * var_74_arg_1; [L217] SORT_4 var_75_arg_0 = var_36; [L218] SORT_4 var_75_arg_1 = var_74; [L219] SORT_4 var_75 = var_75_arg_0 + var_75_arg_1; [L220] var_75 = var_75 & mask_SORT_4 [L221] SORT_4 var_76_arg_0 = var_34; [L222] SORT_4 var_76_arg_1 = var_75; [L223] SORT_1 var_76 = var_76_arg_0 == var_76_arg_1; [L224] SORT_1 var_77_arg_0 = var_41; [L225] SORT_1 var_77_arg_1 = var_76; [L226] SORT_1 var_77 = var_77_arg_0 | var_77_arg_1; [L227] SORT_1 var_78_arg_0 = input_72; [L228] SORT_1 var_78_arg_1 = var_77; [L229] SORT_1 var_78 = var_78_arg_0 & var_78_arg_1; [L230] var_78 = var_78 & mask_SORT_1 [L231] SORT_4 var_79_arg_0 = var_42; [L232] SORT_4 var_79_arg_1 = var_75; [L233] SORT_1 var_79 = var_79_arg_0 == var_79_arg_1; [L234] SORT_4 var_80_arg_0 = var_37; [L235] SORT_4 var_80_arg_1 = var_75; [L236] SORT_1 var_80 = var_80_arg_0 == var_80_arg_1; [L237] SORT_4 var_81_arg_0 = var_56; [L238] SORT_4 var_81_arg_1 = var_75; [L239] SORT_1 var_81 = var_81_arg_0 == var_81_arg_1; [L240] SORT_4 var_82_arg_0 = var_60; [L241] SORT_4 var_82_arg_1 = var_75; [L242] SORT_1 var_82 = var_82_arg_0 == var_82_arg_1; [L243] SORT_1 var_83_arg_0 = var_82; [L244] SORT_2 var_83_arg_1 = var_63; [L245] SORT_2 var_83_arg_2 = var_65; [L246] SORT_2 var_83 = var_83_arg_0 ? var_83_arg_1 : var_83_arg_2; [L247] SORT_1 var_84_arg_0 = var_81; [L248] SORT_2 var_84_arg_1 = var_59; [L249] SORT_2 var_84_arg_2 = var_83; [L250] SORT_2 var_84 = var_84_arg_0 ? var_84_arg_1 : var_84_arg_2; [L251] SORT_1 var_85_arg_0 = var_80; [L252] SORT_2 var_85_arg_1 = var_55; [L253] SORT_2 var_85_arg_2 = var_84; [L254] SORT_2 var_85 = var_85_arg_0 ? var_85_arg_1 : var_85_arg_2; [L255] SORT_1 var_86_arg_0 = var_79; [L256] SORT_2 var_86_arg_1 = var_52; [L257] SORT_2 var_86_arg_2 = var_85; [L258] SORT_2 var_86 = var_86_arg_0 ? var_86_arg_1 : var_86_arg_2; [L259] SORT_1 var_87_arg_0 = var_76; [L260] SORT_2 var_87_arg_1 = state_6; [L261] SORT_2 var_87_arg_2 = var_86; [L262] SORT_2 var_87 = var_87_arg_0 ? var_87_arg_1 : var_87_arg_2; [L263] SORT_1 var_88_arg_0 = var_76; [L264] SORT_2 var_88_arg_1 = var_49; [L265] SORT_2 var_88_arg_2 = var_87; [L266] SORT_2 var_88 = var_88_arg_0 ? var_88_arg_1 : var_88_arg_2; [L267] SORT_4 var_90_arg_0 = var_42; [L268] SORT_4 var_90_arg_1 = var_40; [L269] SORT_4 var_90 = var_90_arg_0 + var_90_arg_1; [L270] var_90 = var_90 & mask_SORT_4 [L271] SORT_4 var_91_arg_0 = var_34; [L272] SORT_4 var_91_arg_1 = var_90; [L273] SORT_1 var_91 = var_91_arg_0 == var_91_arg_1; [L274] SORT_1 var_92_arg_0 = var_41; [L275] SORT_1 var_92_arg_1 = var_91; [L276] SORT_1 var_92 = var_92_arg_0 | var_92_arg_1; [L277] SORT_1 var_93_arg_0 = input_89; [L278] SORT_1 var_93_arg_1 = var_92; [L279] SORT_1 var_93 = var_93_arg_0 & var_93_arg_1; [L280] var_93 = var_93 & mask_SORT_1 [L281] SORT_4 var_94_arg_0 = var_42; [L282] SORT_4 var_94_arg_1 = var_90; [L283] SORT_1 var_94 = var_94_arg_0 == var_94_arg_1; [L284] SORT_4 var_95_arg_0 = var_37; [L285] SORT_4 var_95_arg_1 = var_90; [L286] SORT_1 var_95 = var_95_arg_0 == var_95_arg_1; [L287] SORT_4 var_96_arg_0 = var_56; [L288] SORT_4 var_96_arg_1 = var_90; [L289] SORT_1 var_96 = var_96_arg_0 == var_96_arg_1; [L290] SORT_4 var_97_arg_0 = var_60; [L291] SORT_4 var_97_arg_1 = var_90; [L292] SORT_1 var_97 = var_97_arg_0 == var_97_arg_1; [L293] SORT_1 var_98_arg_0 = var_97; [L294] SORT_2 var_98_arg_1 = var_63; [L295] SORT_2 var_98_arg_2 = var_65; [L296] SORT_2 var_98 = var_98_arg_0 ? var_98_arg_1 : var_98_arg_2; [L297] SORT_1 var_99_arg_0 = var_96; [L298] SORT_2 var_99_arg_1 = var_59; [L299] SORT_2 var_99_arg_2 = var_98; [L300] SORT_2 var_99 = var_99_arg_0 ? var_99_arg_1 : var_99_arg_2; [L301] SORT_1 var_100_arg_0 = var_95; [L302] SORT_2 var_100_arg_1 = var_55; [L303] SORT_2 var_100_arg_2 = var_99; [L304] SORT_2 var_100 = var_100_arg_0 ? var_100_arg_1 : var_100_arg_2; [L305] SORT_1 var_101_arg_0 = var_94; [L306] SORT_2 var_101_arg_1 = var_52; [L307] SORT_2 var_101_arg_2 = var_100; [L308] SORT_2 var_101 = var_101_arg_0 ? var_101_arg_1 : var_101_arg_2; [L309] SORT_1 var_102_arg_0 = var_91; [L310] SORT_2 var_102_arg_1 = state_6; [L311] SORT_2 var_102_arg_2 = var_101; [L312] SORT_2 var_102 = var_102_arg_0 ? var_102_arg_1 : var_102_arg_2; [L313] SORT_1 var_103_arg_0 = var_91; [L314] SORT_2 var_103_arg_1 = var_49; [L315] SORT_2 var_103_arg_2 = var_102; [L316] SORT_2 var_103 = var_103_arg_0 ? var_103_arg_1 : var_103_arg_2; [L317] SORT_4 var_105_arg_0 = var_40; [L318] SORT_4 var_105_arg_1 = var_42; [L319] SORT_4 var_105 = var_105_arg_0 - var_105_arg_1; [L320] var_105 = var_105 & mask_SORT_4 [L321] SORT_4 var_106_arg_0 = var_34; [L322] SORT_4 var_106_arg_1 = var_105; [L323] SORT_1 var_106 = var_106_arg_0 == var_106_arg_1; [L324] SORT_1 var_107_arg_0 = var_106; [L325] SORT_1 var_107_arg_1 = var_41; [L326] SORT_1 var_107 = var_107_arg_0 | var_107_arg_1; [L327] SORT_1 var_108_arg_0 = input_104; [L328] SORT_1 var_108_arg_1 = var_107; [L329] SORT_1 var_108 = var_108_arg_0 & var_108_arg_1; [L330] var_108 = var_108 & mask_SORT_1 [L331] SORT_4 var_109_arg_0 = var_42; [L332] SORT_4 var_109_arg_1 = var_105; [L333] SORT_1 var_109 = var_109_arg_0 == var_109_arg_1; [L334] SORT_4 var_110_arg_0 = var_37; [L335] SORT_4 var_110_arg_1 = var_105; [L336] SORT_1 var_110 = var_110_arg_0 == var_110_arg_1; [L337] SORT_4 var_111_arg_0 = var_56; [L338] SORT_4 var_111_arg_1 = var_105; [L339] SORT_1 var_111 = var_111_arg_0 == var_111_arg_1; [L340] SORT_4 var_112_arg_0 = var_60; [L341] SORT_4 var_112_arg_1 = var_105; [L342] SORT_1 var_112 = var_112_arg_0 == var_112_arg_1; [L343] SORT_1 var_113_arg_0 = var_112; [L344] SORT_2 var_113_arg_1 = var_63; [L345] SORT_2 var_113_arg_2 = var_65; [L346] SORT_2 var_113 = var_113_arg_0 ? var_113_arg_1 : var_113_arg_2; [L347] SORT_1 var_114_arg_0 = var_111; [L348] SORT_2 var_114_arg_1 = var_59; [L349] SORT_2 var_114_arg_2 = var_113; [L350] SORT_2 var_114 = var_114_arg_0 ? var_114_arg_1 : var_114_arg_2; [L351] SORT_1 var_115_arg_0 = var_110; [L352] SORT_2 var_115_arg_1 = var_55; [L353] SORT_2 var_115_arg_2 = var_114; [L354] SORT_2 var_115 = var_115_arg_0 ? var_115_arg_1 : var_115_arg_2; [L355] SORT_1 var_116_arg_0 = var_109; [L356] SORT_2 var_116_arg_1 = var_52; [L357] SORT_2 var_116_arg_2 = var_115; [L358] SORT_2 var_116 = var_116_arg_0 ? var_116_arg_1 : var_116_arg_2; [L359] SORT_1 var_117_arg_0 = var_106; [L360] SORT_2 var_117_arg_1 = state_6; [L361] SORT_2 var_117_arg_2 = var_116; [L362] SORT_2 var_117 = var_117_arg_0 ? var_117_arg_1 : var_117_arg_2; [L363] SORT_1 var_118_arg_0 = var_106; [L364] SORT_2 var_118_arg_1 = var_49; [L365] SORT_2 var_118_arg_2 = var_117; [L366] SORT_2 var_118 = var_118_arg_0 ? var_118_arg_1 : var_118_arg_2; [L367] SORT_1 var_119_arg_0 = var_108; [L368] SORT_2 var_119_arg_1 = var_118; [L369] SORT_2 var_119_arg_2 = state_6; [L370] SORT_2 var_119 = var_119_arg_0 ? var_119_arg_1 : var_119_arg_2; [L371] SORT_1 var_120_arg_0 = var_93; [L372] SORT_2 var_120_arg_1 = var_103; [L373] SORT_2 var_120_arg_2 = var_119; [L374] SORT_2 var_120 = var_120_arg_0 ? var_120_arg_1 : var_120_arg_2; [L375] SORT_1 var_121_arg_0 = var_78; [L376] SORT_2 var_121_arg_1 = var_88; [L377] SORT_2 var_121_arg_2 = var_120; [L378] SORT_2 var_121 = var_121_arg_0 ? var_121_arg_1 : var_121_arg_2; [L379] SORT_1 var_122_arg_0 = var_48; [L380] SORT_2 var_122_arg_1 = var_71; [L381] SORT_2 var_122_arg_2 = var_121; [L382] SORT_2 var_122 = var_122_arg_0 ? var_122_arg_1 : var_122_arg_2; [L383] var_122 = var_122 & mask_SORT_2 [L384] SORT_2 next_123_arg_1 = var_122; [L385] SORT_4 var_124_arg_0 = var_42; [L386] SORT_4 var_124_arg_1 = var_40; [L387] SORT_1 var_124 = var_124_arg_0 == var_124_arg_1; [L388] SORT_1 var_125_arg_0 = var_124; [L389] SORT_1 var_125_arg_1 = var_50; [L390] SORT_1 var_125 = var_125_arg_0 | var_125_arg_1; [L391] SORT_1 var_126_arg_0 = input_33; [L392] SORT_1 var_126_arg_1 = var_125; [L393] SORT_1 var_126 = var_126_arg_0 & var_126_arg_1; [L394] var_126 = var_126 & mask_SORT_1 [L395] SORT_1 var_127_arg_0 = var_50; [L396] SORT_2 var_127_arg_1 = var_49; [L397] SORT_2 var_127_arg_2 = var_70; [L398] SORT_2 var_127 = var_127_arg_0 ? var_127_arg_1 : var_127_arg_2; [L399] SORT_1 var_128_arg_0 = var_124; [L400] SORT_1 var_128_arg_1 = var_79; [L401] SORT_1 var_128 = var_128_arg_0 | var_128_arg_1; [L402] SORT_1 var_129_arg_0 = input_72; [L403] SORT_1 var_129_arg_1 = var_128; [L404] SORT_1 var_129 = var_129_arg_0 & var_129_arg_1; [L405] var_129 = var_129 & mask_SORT_1 [L406] SORT_1 var_130_arg_0 = var_79; [L407] SORT_2 var_130_arg_1 = var_49; [L408] SORT_2 var_130_arg_2 = var_87; [L409] SORT_2 var_130 = var_130_arg_0 ? var_130_arg_1 : var_130_arg_2; [L410] SORT_1 var_131_arg_0 = var_124; [L411] SORT_1 var_131_arg_1 = var_94; [L412] SORT_1 var_131 = var_131_arg_0 | var_131_arg_1; [L413] SORT_1 var_132_arg_0 = input_89; [L414] SORT_1 var_132_arg_1 = var_131; [L415] SORT_1 var_132 = var_132_arg_0 & var_132_arg_1; [L416] var_132 = var_132 & mask_SORT_1 [L417] SORT_1 var_133_arg_0 = var_94; [L418] SORT_2 var_133_arg_1 = var_49; [L419] SORT_2 var_133_arg_2 = var_102; [L420] SORT_2 var_133 = var_133_arg_0 ? var_133_arg_1 : var_133_arg_2; [L421] SORT_1 var_134_arg_0 = var_109; [L422] SORT_1 var_134_arg_1 = var_124; [L423] SORT_1 var_134 = var_134_arg_0 | var_134_arg_1; [L424] SORT_1 var_135_arg_0 = input_104; [L425] SORT_1 var_135_arg_1 = var_134; [L426] SORT_1 var_135 = var_135_arg_0 & var_135_arg_1; [L427] var_135 = var_135 & mask_SORT_1 [L428] SORT_1 var_136_arg_0 = var_109; [L429] SORT_2 var_136_arg_1 = var_49; [L430] SORT_2 var_136_arg_2 = var_117; [L431] SORT_2 var_136 = var_136_arg_0 ? var_136_arg_1 : var_136_arg_2; [L432] SORT_1 var_137_arg_0 = var_135; [L433] SORT_2 var_137_arg_1 = var_136; [L434] SORT_2 var_137_arg_2 = var_52; [L435] SORT_2 var_137 = var_137_arg_0 ? var_137_arg_1 : var_137_arg_2; [L436] SORT_1 var_138_arg_0 = var_132; [L437] SORT_2 var_138_arg_1 = var_133; [L438] SORT_2 var_138_arg_2 = var_137; [L439] SORT_2 var_138 = var_138_arg_0 ? var_138_arg_1 : var_138_arg_2; [L440] SORT_1 var_139_arg_0 = var_129; [L441] SORT_2 var_139_arg_1 = var_130; [L442] SORT_2 var_139_arg_2 = var_138; [L443] SORT_2 var_139 = var_139_arg_0 ? var_139_arg_1 : var_139_arg_2; [L444] SORT_1 var_140_arg_0 = var_126; [L445] SORT_2 var_140_arg_1 = var_127; [L446] SORT_2 var_140_arg_2 = var_139; [L447] SORT_2 var_140 = var_140_arg_0 ? var_140_arg_1 : var_140_arg_2; [L448] SORT_2 var_141_arg_0 = var_51; [L449] SORT_2 var_141_arg_1 = var_140; [L450] SORT_2 var_141 = var_141_arg_0 ^ var_141_arg_1; [L451] SORT_2 next_142_arg_1 = var_141; [L452] SORT_4 var_143_arg_0 = var_37; [L453] SORT_4 var_143_arg_1 = var_40; [L454] SORT_1 var_143 = var_143_arg_0 == var_143_arg_1; [L455] SORT_1 var_144_arg_0 = var_143; [L456] SORT_1 var_144_arg_1 = var_53; [L457] SORT_1 var_144 = var_144_arg_0 | var_144_arg_1; [L458] SORT_1 var_145_arg_0 = input_33; [L459] SORT_1 var_145_arg_1 = var_144; [L460] SORT_1 var_145 = var_145_arg_0 & var_145_arg_1; [L461] var_145 = var_145 & mask_SORT_1 [L462] SORT_1 var_146_arg_0 = var_53; [L463] SORT_2 var_146_arg_1 = var_49; [L464] SORT_2 var_146_arg_2 = var_70; [L465] SORT_2 var_146 = var_146_arg_0 ? var_146_arg_1 : var_146_arg_2; [L466] SORT_1 var_147_arg_0 = var_143; [L467] SORT_1 var_147_arg_1 = var_80; [L468] SORT_1 var_147 = var_147_arg_0 | var_147_arg_1; [L469] SORT_1 var_148_arg_0 = input_72; [L470] SORT_1 var_148_arg_1 = var_147; [L471] SORT_1 var_148 = var_148_arg_0 & var_148_arg_1; [L472] var_148 = var_148 & mask_SORT_1 [L473] SORT_1 var_149_arg_0 = var_80; [L474] SORT_2 var_149_arg_1 = var_49; [L475] SORT_2 var_149_arg_2 = var_87; [L476] SORT_2 var_149 = var_149_arg_0 ? var_149_arg_1 : var_149_arg_2; [L477] SORT_1 var_150_arg_0 = var_143; [L478] SORT_1 var_150_arg_1 = var_95; [L479] SORT_1 var_150 = var_150_arg_0 | var_150_arg_1; [L480] SORT_1 var_151_arg_0 = input_89; [L481] SORT_1 var_151_arg_1 = var_150; [L482] SORT_1 var_151 = var_151_arg_0 & var_151_arg_1; [L483] var_151 = var_151 & mask_SORT_1 [L484] SORT_1 var_152_arg_0 = var_95; [L485] SORT_2 var_152_arg_1 = var_49; [L486] SORT_2 var_152_arg_2 = var_102; [L487] SORT_2 var_152 = var_152_arg_0 ? var_152_arg_1 : var_152_arg_2; [L488] SORT_1 var_153_arg_0 = var_110; [L489] SORT_1 var_153_arg_1 = var_143; [L490] SORT_1 var_153 = var_153_arg_0 | var_153_arg_1; [L491] SORT_1 var_154_arg_0 = input_104; [L492] SORT_1 var_154_arg_1 = var_153; [L493] SORT_1 var_154 = var_154_arg_0 & var_154_arg_1; [L494] var_154 = var_154 & mask_SORT_1 [L495] SORT_1 var_155_arg_0 = var_110; [L496] SORT_2 var_155_arg_1 = var_49; [L497] SORT_2 var_155_arg_2 = var_117; [L498] SORT_2 var_155 = var_155_arg_0 ? var_155_arg_1 : var_155_arg_2; [L499] SORT_1 var_156_arg_0 = var_154; [L500] SORT_2 var_156_arg_1 = var_155; [L501] SORT_2 var_156_arg_2 = var_55; [L502] SORT_2 var_156 = var_156_arg_0 ? var_156_arg_1 : var_156_arg_2; [L503] SORT_1 var_157_arg_0 = var_151; [L504] SORT_2 var_157_arg_1 = var_152; [L505] SORT_2 var_157_arg_2 = var_156; [L506] SORT_2 var_157 = var_157_arg_0 ? var_157_arg_1 : var_157_arg_2; [L507] SORT_1 var_158_arg_0 = var_148; [L508] SORT_2 var_158_arg_1 = var_149; [L509] SORT_2 var_158_arg_2 = var_157; [L510] SORT_2 var_158 = var_158_arg_0 ? var_158_arg_1 : var_158_arg_2; [L511] SORT_1 var_159_arg_0 = var_145; [L512] SORT_2 var_159_arg_1 = var_146; [L513] SORT_2 var_159_arg_2 = var_158; [L514] SORT_2 var_159 = var_159_arg_0 ? var_159_arg_1 : var_159_arg_2; [L515] SORT_2 var_160_arg_0 = var_54; [L516] SORT_2 var_160_arg_1 = var_159; [L517] SORT_2 var_160 = var_160_arg_0 ^ var_160_arg_1; [L518] SORT_2 next_161_arg_1 = var_160; [L519] SORT_4 var_162_arg_0 = var_56; [L520] SORT_4 var_162_arg_1 = var_40; [L521] SORT_1 var_162 = var_162_arg_0 == var_162_arg_1; [L522] SORT_1 var_163_arg_0 = var_162; [L523] SORT_1 var_163_arg_1 = var_57; [L524] SORT_1 var_163 = var_163_arg_0 | var_163_arg_1; [L525] SORT_1 var_164_arg_0 = input_33; [L526] SORT_1 var_164_arg_1 = var_163; [L527] SORT_1 var_164 = var_164_arg_0 & var_164_arg_1; [L528] var_164 = var_164 & mask_SORT_1 [L529] SORT_1 var_165_arg_0 = var_57; [L530] SORT_2 var_165_arg_1 = var_49; [L531] SORT_2 var_165_arg_2 = var_70; [L532] SORT_2 var_165 = var_165_arg_0 ? var_165_arg_1 : var_165_arg_2; [L533] SORT_1 var_166_arg_0 = var_162; [L534] SORT_1 var_166_arg_1 = var_81; [L535] SORT_1 var_166 = var_166_arg_0 | var_166_arg_1; [L536] SORT_1 var_167_arg_0 = input_72; [L537] SORT_1 var_167_arg_1 = var_166; [L538] SORT_1 var_167 = var_167_arg_0 & var_167_arg_1; [L539] var_167 = var_167 & mask_SORT_1 [L540] SORT_1 var_168_arg_0 = var_81; [L541] SORT_2 var_168_arg_1 = var_49; [L542] SORT_2 var_168_arg_2 = var_87; [L543] SORT_2 var_168 = var_168_arg_0 ? var_168_arg_1 : var_168_arg_2; [L544] SORT_1 var_169_arg_0 = var_162; [L545] SORT_1 var_169_arg_1 = var_96; [L546] SORT_1 var_169 = var_169_arg_0 | var_169_arg_1; [L547] SORT_1 var_170_arg_0 = input_89; [L548] SORT_1 var_170_arg_1 = var_169; [L549] SORT_1 var_170 = var_170_arg_0 & var_170_arg_1; [L550] var_170 = var_170 & mask_SORT_1 [L551] SORT_1 var_171_arg_0 = var_96; [L552] SORT_2 var_171_arg_1 = var_49; [L553] SORT_2 var_171_arg_2 = var_102; [L554] SORT_2 var_171 = var_171_arg_0 ? var_171_arg_1 : var_171_arg_2; [L555] SORT_1 var_172_arg_0 = var_111; [L556] SORT_1 var_172_arg_1 = var_162; [L557] SORT_1 var_172 = var_172_arg_0 | var_172_arg_1; [L558] SORT_1 var_173_arg_0 = input_104; [L559] SORT_1 var_173_arg_1 = var_172; [L560] SORT_1 var_173 = var_173_arg_0 & var_173_arg_1; [L561] var_173 = var_173 & mask_SORT_1 [L562] SORT_1 var_174_arg_0 = var_111; [L563] SORT_2 var_174_arg_1 = var_49; [L564] SORT_2 var_174_arg_2 = var_117; [L565] SORT_2 var_174 = var_174_arg_0 ? var_174_arg_1 : var_174_arg_2; [L566] SORT_1 var_175_arg_0 = var_173; [L567] SORT_2 var_175_arg_1 = var_174; [L568] SORT_2 var_175_arg_2 = var_59; [L569] SORT_2 var_175 = var_175_arg_0 ? var_175_arg_1 : var_175_arg_2; [L570] SORT_1 var_176_arg_0 = var_170; [L571] SORT_2 var_176_arg_1 = var_171; [L572] SORT_2 var_176_arg_2 = var_175; [L573] SORT_2 var_176 = var_176_arg_0 ? var_176_arg_1 : var_176_arg_2; [L574] SORT_1 var_177_arg_0 = var_167; [L575] SORT_2 var_177_arg_1 = var_168; [L576] SORT_2 var_177_arg_2 = var_176; [L577] SORT_2 var_177 = var_177_arg_0 ? var_177_arg_1 : var_177_arg_2; [L578] SORT_1 var_178_arg_0 = var_164; [L579] SORT_2 var_178_arg_1 = var_165; [L580] SORT_2 var_178_arg_2 = var_177; [L581] SORT_2 var_178 = var_178_arg_0 ? var_178_arg_1 : var_178_arg_2; [L582] SORT_2 var_179_arg_0 = var_58; [L583] SORT_2 var_179_arg_1 = var_178; [L584] SORT_2 var_179 = var_179_arg_0 ^ var_179_arg_1; [L585] SORT_2 next_180_arg_1 = var_179; [L586] SORT_4 var_181_arg_0 = var_60; [L587] SORT_4 var_181_arg_1 = var_40; [L588] SORT_1 var_181 = var_181_arg_0 == var_181_arg_1; [L589] SORT_1 var_182_arg_0 = var_181; [L590] SORT_1 var_182_arg_1 = var_61; [L591] SORT_1 var_182 = var_182_arg_0 | var_182_arg_1; [L592] SORT_1 var_183_arg_0 = input_33; [L593] SORT_1 var_183_arg_1 = var_182; [L594] SORT_1 var_183 = var_183_arg_0 & var_183_arg_1; [L595] var_183 = var_183 & mask_SORT_1 [L596] SORT_1 var_184_arg_0 = var_61; [L597] SORT_2 var_184_arg_1 = var_49; [L598] SORT_2 var_184_arg_2 = var_70; [L599] SORT_2 var_184 = var_184_arg_0 ? var_184_arg_1 : var_184_arg_2; [L600] SORT_1 var_185_arg_0 = var_181; [L601] SORT_1 var_185_arg_1 = var_82; [L602] SORT_1 var_185 = var_185_arg_0 | var_185_arg_1; [L603] SORT_1 var_186_arg_0 = input_72; [L604] SORT_1 var_186_arg_1 = var_185; [L605] SORT_1 var_186 = var_186_arg_0 & var_186_arg_1; [L606] var_186 = var_186 & mask_SORT_1 [L607] SORT_1 var_187_arg_0 = var_82; [L608] SORT_2 var_187_arg_1 = var_49; [L609] SORT_2 var_187_arg_2 = var_87; [L610] SORT_2 var_187 = var_187_arg_0 ? var_187_arg_1 : var_187_arg_2; [L611] SORT_1 var_188_arg_0 = var_181; [L612] SORT_1 var_188_arg_1 = var_97; [L613] SORT_1 var_188 = var_188_arg_0 | var_188_arg_1; [L614] SORT_1 var_189_arg_0 = input_89; [L615] SORT_1 var_189_arg_1 = var_188; [L616] SORT_1 var_189 = var_189_arg_0 & var_189_arg_1; [L617] var_189 = var_189 & mask_SORT_1 [L618] SORT_1 var_190_arg_0 = var_97; [L619] SORT_2 var_190_arg_1 = var_49; [L620] SORT_2 var_190_arg_2 = var_102; [L621] SORT_2 var_190 = var_190_arg_0 ? var_190_arg_1 : var_190_arg_2; [L622] SORT_1 var_191_arg_0 = var_112; [L623] SORT_1 var_191_arg_1 = var_181; [L624] SORT_1 var_191 = var_191_arg_0 | var_191_arg_1; [L625] SORT_1 var_192_arg_0 = input_104; [L626] SORT_1 var_192_arg_1 = var_191; [L627] SORT_1 var_192 = var_192_arg_0 & var_192_arg_1; [L628] var_192 = var_192 & mask_SORT_1 [L629] SORT_1 var_193_arg_0 = var_112; [L630] SORT_2 var_193_arg_1 = var_49; [L631] SORT_2 var_193_arg_2 = var_117; [L632] SORT_2 var_193 = var_193_arg_0 ? var_193_arg_1 : var_193_arg_2; [L633] SORT_1 var_194_arg_0 = var_192; [L634] SORT_2 var_194_arg_1 = var_193; [L635] SORT_2 var_194_arg_2 = var_63; [L636] SORT_2 var_194 = var_194_arg_0 ? var_194_arg_1 : var_194_arg_2; [L637] SORT_1 var_195_arg_0 = var_189; [L638] SORT_2 var_195_arg_1 = var_190; [L639] SORT_2 var_195_arg_2 = var_194; [L640] SORT_2 var_195 = var_195_arg_0 ? var_195_arg_1 : var_195_arg_2; [L641] SORT_1 var_196_arg_0 = var_186; [L642] SORT_2 var_196_arg_1 = var_187; [L643] SORT_2 var_196_arg_2 = var_195; [L644] SORT_2 var_196 = var_196_arg_0 ? var_196_arg_1 : var_196_arg_2; [L645] SORT_1 var_197_arg_0 = var_183; [L646] SORT_2 var_197_arg_1 = var_184; [L647] SORT_2 var_197_arg_2 = var_196; [L648] SORT_2 var_197 = var_197_arg_0 ? var_197_arg_1 : var_197_arg_2; [L649] SORT_2 var_198_arg_0 = var_62; [L650] SORT_2 var_198_arg_1 = var_197; [L651] SORT_2 var_198 = var_198_arg_0 ^ var_198_arg_1; [L652] SORT_2 next_199_arg_1 = var_198; [L653] SORT_4 var_201_arg_0 = var_200; [L654] SORT_4 var_201_arg_1 = var_40; [L655] SORT_1 var_201 = var_201_arg_0 == var_201_arg_1; [L656] SORT_4 var_202_arg_0 = var_200; [L657] SORT_4 var_202_arg_1 = var_45; [L658] SORT_1 var_202 = var_202_arg_0 == var_202_arg_1; [L659] SORT_1 var_203_arg_0 = var_201; [L660] SORT_1 var_203_arg_1 = var_202; [L661] SORT_1 var_203 = var_203_arg_0 | var_203_arg_1; [L662] SORT_1 var_204_arg_0 = input_33; [L663] SORT_1 var_204_arg_1 = var_203; [L664] SORT_1 var_204 = var_204_arg_0 & var_204_arg_1; [L665] var_204 = var_204 & mask_SORT_1 [L666] SORT_1 var_205_arg_0 = var_202; [L667] SORT_2 var_205_arg_1 = var_49; [L668] SORT_2 var_205_arg_2 = var_70; [L669] SORT_2 var_205 = var_205_arg_0 ? var_205_arg_1 : var_205_arg_2; [L670] SORT_4 var_206_arg_0 = var_200; [L671] SORT_4 var_206_arg_1 = var_75; [L672] SORT_1 var_206 = var_206_arg_0 == var_206_arg_1; [L673] SORT_1 var_207_arg_0 = var_201; [L674] SORT_1 var_207_arg_1 = var_206; [L675] SORT_1 var_207 = var_207_arg_0 | var_207_arg_1; [L676] SORT_1 var_208_arg_0 = input_72; [L677] SORT_1 var_208_arg_1 = var_207; [L678] SORT_1 var_208 = var_208_arg_0 & var_208_arg_1; [L679] var_208 = var_208 & mask_SORT_1 [L680] SORT_1 var_209_arg_0 = var_206; [L681] SORT_2 var_209_arg_1 = var_49; [L682] SORT_2 var_209_arg_2 = var_87; [L683] SORT_2 var_209 = var_209_arg_0 ? var_209_arg_1 : var_209_arg_2; [L684] SORT_4 var_210_arg_0 = var_200; [L685] SORT_4 var_210_arg_1 = var_90; [L686] SORT_1 var_210 = var_210_arg_0 == var_210_arg_1; [L687] SORT_1 var_211_arg_0 = var_201; [L688] SORT_1 var_211_arg_1 = var_210; [L689] SORT_1 var_211 = var_211_arg_0 | var_211_arg_1; [L690] SORT_1 var_212_arg_0 = input_89; [L691] SORT_1 var_212_arg_1 = var_211; [L692] SORT_1 var_212 = var_212_arg_0 & var_212_arg_1; [L693] var_212 = var_212 & mask_SORT_1 [L694] SORT_1 var_213_arg_0 = var_210; [L695] SORT_2 var_213_arg_1 = var_49; [L696] SORT_2 var_213_arg_2 = var_102; [L697] SORT_2 var_213 = var_213_arg_0 ? var_213_arg_1 : var_213_arg_2; [L698] SORT_4 var_214_arg_0 = var_200; [L699] SORT_4 var_214_arg_1 = var_105; [L700] SORT_1 var_214 = var_214_arg_0 == var_214_arg_1; [L701] SORT_1 var_215_arg_0 = var_214; [L702] SORT_1 var_215_arg_1 = var_201; [L703] SORT_1 var_215 = var_215_arg_0 | var_215_arg_1; [L704] SORT_1 var_216_arg_0 = input_104; [L705] SORT_1 var_216_arg_1 = var_215; [L706] SORT_1 var_216 = var_216_arg_0 & var_216_arg_1; [L707] var_216 = var_216 & mask_SORT_1 [L708] SORT_1 var_217_arg_0 = var_214; [L709] SORT_2 var_217_arg_1 = var_49; [L710] SORT_2 var_217_arg_2 = var_117; [L711] SORT_2 var_217 = var_217_arg_0 ? var_217_arg_1 : var_217_arg_2; [L712] SORT_1 var_218_arg_0 = var_216; [L713] SORT_2 var_218_arg_1 = var_217; [L714] SORT_2 var_218_arg_2 = var_65; [L715] SORT_2 var_218 = var_218_arg_0 ? var_218_arg_1 : var_218_arg_2; [L716] SORT_1 var_219_arg_0 = var_212; [L717] SORT_2 var_219_arg_1 = var_213; [L718] SORT_2 var_219_arg_2 = var_218; [L719] SORT_2 var_219 = var_219_arg_0 ? var_219_arg_1 : var_219_arg_2; [L720] SORT_1 var_220_arg_0 = var_208; [L721] SORT_2 var_220_arg_1 = var_209; [L722] SORT_2 var_220_arg_2 = var_219; [L723] SORT_2 var_220 = var_220_arg_0 ? var_220_arg_1 : var_220_arg_2; [L724] SORT_1 var_221_arg_0 = var_204; [L725] SORT_2 var_221_arg_1 = var_205; [L726] SORT_2 var_221_arg_2 = var_220; [L727] SORT_2 var_221 = var_221_arg_0 ? var_221_arg_1 : var_221_arg_2; [L728] SORT_2 var_222_arg_0 = var_64; [L729] SORT_2 var_222_arg_1 = var_221; [L730] SORT_2 var_222 = var_222_arg_0 ^ var_222_arg_1; [L731] SORT_2 next_223_arg_1 = var_222; [L732] SORT_4 var_224_arg_0 = var_42; [L733] SORT_4 var_224_arg_1 = var_36; [L734] SORT_4 var_224 = var_224_arg_0 + var_224_arg_1; [L735] SORT_4 var_225_arg_0 = var_224; [L736] SORT_2 var_225 = var_225_arg_0 >> 0; [L737] SORT_4 var_226_arg_0 = var_36; [L738] SORT_4 var_226_arg_1 = var_42; [L739] SORT_4 var_226 = var_226_arg_0 - var_226_arg_1; [L740] SORT_4 var_227_arg_0 = var_226; [L741] SORT_2 var_227 = var_227_arg_0 >> 0; [L742] SORT_1 var_228_arg_0 = input_104; [L743] SORT_2 var_228_arg_1 = var_227; [L744] SORT_2 var_228_arg_2 = state_18; [L745] SORT_2 var_228 = var_228_arg_0 ? var_228_arg_1 : var_228_arg_2; [L746] SORT_1 var_229_arg_0 = input_89; [L747] SORT_2 var_229_arg_1 = var_225; [L748] SORT_2 var_229_arg_2 = var_228; [L749] SORT_2 var_229 = var_229_arg_0 ? var_229_arg_1 : var_229_arg_2; [L750] var_229 = var_229 & mask_SORT_2 [L751] SORT_2 next_230_arg_1 = var_229; [L752] SORT_4 var_231_arg_0 = var_43; [L753] SORT_2 var_231 = var_231_arg_0 >> 0; [L754] SORT_4 var_232_arg_0 = var_73; [L755] SORT_2 var_232 = var_232_arg_0 >> 0; [L756] SORT_1 var_233_arg_0 = input_72; [L757] SORT_2 var_233_arg_1 = var_232; [L758] SORT_2 var_233_arg_2 = state_20; [L759] SORT_2 var_233 = var_233_arg_0 ? var_233_arg_1 : var_233_arg_2; [L760] SORT_1 var_234_arg_0 = input_33; [L761] SORT_2 var_234_arg_1 = var_231; [L762] SORT_2 var_234_arg_2 = var_233; [L763] SORT_2 var_234 = var_234_arg_0 ? var_234_arg_1 : var_234_arg_2; [L764] var_234 = var_234 & mask_SORT_2 [L765] SORT_2 next_235_arg_1 = var_234; [L766] SORT_1 next_236_arg_1 = state_23; [L767] SORT_1 var_238_arg_0 = ~state_25; [L768] var_238_arg_0 = var_238_arg_0 & mask_SORT_1 [L769] SORT_1 var_238_arg_1 = ~input_237; [L770] var_238_arg_1 = var_238_arg_1 & mask_SORT_1 [L771] SORT_1 var_238 = var_238_arg_0 & var_238_arg_1; [L772] SORT_1 next_239_arg_1 = ~var_238; [L773] next_239_arg_1 = next_239_arg_1 & mask_SORT_1 [L774] SORT_1 var_240_arg_0 = state_27; [L775] SORT_1 var_240_arg_1 = input_237; [L776] SORT_1 var_240 = var_240_arg_0 | var_240_arg_1; [L777] SORT_1 next_241_arg_1 = var_240; [L778] SORT_4 var_242_arg_0 = var_36; [L779] SORT_4 var_242_arg_1 = var_34; [L780] SORT_1 var_242 = var_242_arg_0 <= var_242_arg_1; [L781] SORT_1 var_243_arg_0 = ~state_23; [L782] var_243_arg_0 = var_243_arg_0 & mask_SORT_1 [L783] SORT_1 var_243_arg_1 = ~var_242; [L784] var_243_arg_1 = var_243_arg_1 & mask_SORT_1 [L785] SORT_1 var_243 = var_243_arg_0 & var_243_arg_1; [L786] SORT_1 var_244_arg_0 = ~input_104; [L787] var_244_arg_0 = var_244_arg_0 & mask_SORT_1 [L788] SORT_1 var_244_arg_1 = var_243; [L789] SORT_1 var_244 = var_244_arg_0 | var_244_arg_1; [L790] SORT_4 var_245_arg_0 = var_42; [L791] SORT_4 var_245_arg_1 = var_36; [L792] SORT_1 var_245 = var_245_arg_0 <= var_245_arg_1; [L793] SORT_1 var_246_arg_0 = ~state_23; [L794] var_246_arg_0 = var_246_arg_0 & mask_SORT_1 [L795] SORT_1 var_246_arg_1 = ~var_245; [L796] var_246_arg_1 = var_246_arg_1 & mask_SORT_1 [L797] SORT_1 var_246 = var_246_arg_0 & var_246_arg_1; [L798] SORT_1 var_247_arg_0 = ~input_89; [L799] var_247_arg_0 = var_247_arg_0 & mask_SORT_1 [L800] SORT_1 var_247_arg_1 = var_246; [L801] SORT_1 var_247 = var_247_arg_0 | var_247_arg_1; [L802] SORT_1 var_248_arg_0 = var_244; [L803] SORT_1 var_248_arg_1 = var_247; [L804] SORT_1 var_248 = var_248_arg_0 & var_248_arg_1; [L805] SORT_4 var_249_arg_0 = var_38; [L806] SORT_4 var_249_arg_1 = var_34; [L807] SORT_1 var_249 = var_249_arg_0 <= var_249_arg_1; [L808] SORT_1 var_250_arg_0 = ~state_23; [L809] var_250_arg_0 = var_250_arg_0 & mask_SORT_1 [L810] SORT_1 var_250_arg_1 = ~var_249; [L811] var_250_arg_1 = var_250_arg_1 & mask_SORT_1 [L812] SORT_1 var_250 = var_250_arg_0 & var_250_arg_1; [L813] SORT_1 var_251_arg_0 = ~input_72; [L814] var_251_arg_0 = var_251_arg_0 & mask_SORT_1 [L815] SORT_1 var_251_arg_1 = var_250; [L816] SORT_1 var_251 = var_251_arg_0 | var_251_arg_1; [L817] SORT_1 var_252_arg_0 = var_248; [L818] SORT_1 var_252_arg_1 = var_251; [L819] SORT_1 var_252 = var_252_arg_0 & var_252_arg_1; [L820] SORT_4 var_253_arg_0 = var_37; [L821] SORT_4 var_253_arg_1 = var_38; [L822] SORT_1 var_253 = var_253_arg_0 <= var_253_arg_1; [L823] SORT_1 var_254_arg_0 = ~state_23; [L824] var_254_arg_0 = var_254_arg_0 & mask_SORT_1 [L825] SORT_1 var_254_arg_1 = ~var_253; [L826] var_254_arg_1 = var_254_arg_1 & mask_SORT_1 [L827] SORT_1 var_254 = var_254_arg_0 & var_254_arg_1; [L828] SORT_1 var_255_arg_0 = ~input_33; [L829] var_255_arg_0 = var_255_arg_0 & mask_SORT_1 [L830] SORT_1 var_255_arg_1 = var_254; [L831] SORT_1 var_255 = var_255_arg_0 | var_255_arg_1; [L832] SORT_1 var_256_arg_0 = var_252; [L833] SORT_1 var_256_arg_1 = var_255; [L834] SORT_1 var_256 = var_256_arg_0 & var_256_arg_1; [L835] SORT_2 var_257_arg_0 = var_64; [L836] SORT_2 var_257_arg_1 = state_6; [L837] SORT_1 var_257 = var_257_arg_0 == var_257_arg_1; [L838] SORT_2 var_258_arg_0 = var_62; [L839] SORT_2 var_258_arg_1 = var_52; [L840] SORT_1 var_258 = var_258_arg_0 == var_258_arg_1; [L841] SORT_1 var_259_arg_0 = var_257; [L842] SORT_1 var_259_arg_1 = var_258; [L843] SORT_1 var_259 = var_259_arg_0 & var_259_arg_1; [L844] SORT_2 var_260_arg_0 = var_58; [L845] SORT_2 var_260_arg_1 = var_55; [L846] SORT_1 var_260 = var_260_arg_0 == var_260_arg_1; [L847] SORT_1 var_261_arg_0 = var_259; [L848] SORT_1 var_261_arg_1 = var_260; [L849] SORT_1 var_261 = var_261_arg_0 & var_261_arg_1; [L850] SORT_2 var_262_arg_0 = var_54; [L851] SORT_2 var_262_arg_1 = var_59; [L852] SORT_1 var_262 = var_262_arg_0 == var_262_arg_1; [L853] SORT_1 var_263_arg_0 = var_261; [L854] SORT_1 var_263_arg_1 = var_262; [L855] SORT_1 var_263 = var_263_arg_0 & var_263_arg_1; [L856] SORT_2 var_264_arg_0 = var_51; [L857] SORT_2 var_264_arg_1 = var_63; [L858] SORT_1 var_264 = var_264_arg_0 == var_264_arg_1; [L859] SORT_1 var_265_arg_0 = var_263; [L860] SORT_1 var_265_arg_1 = var_264; [L861] SORT_1 var_265 = var_265_arg_0 & var_265_arg_1; [L862] SORT_2 var_266_arg_0 = var_49; [L863] SORT_2 var_266_arg_1 = var_65; [L864] SORT_1 var_266 = var_266_arg_0 == var_266_arg_1; [L865] SORT_1 var_267_arg_0 = var_265; [L866] SORT_1 var_267_arg_1 = var_266; [L867] SORT_1 var_267 = var_267_arg_0 & var_267_arg_1; [L868] SORT_1 var_268_arg_0 = ~state_25; [L869] var_268_arg_0 = var_268_arg_0 & mask_SORT_1 [L870] SORT_1 var_268_arg_1 = var_267; [L871] SORT_1 var_268 = var_268_arg_0 & var_268_arg_1; [L872] SORT_1 var_269_arg_0 = ~input_237; [L873] var_269_arg_0 = var_269_arg_0 & mask_SORT_1 [L874] SORT_1 var_269_arg_1 = var_268; [L875] SORT_1 var_269 = var_269_arg_0 | var_269_arg_1; [L876] SORT_1 var_270_arg_0 = var_256; [L877] SORT_1 var_270_arg_1 = var_269; [L878] SORT_1 var_270 = var_270_arg_0 & var_270_arg_1; [L879] SORT_1 var_271_arg_0 = input_104; [L880] SORT_1 var_271_arg_1 = input_89; [L881] SORT_1 var_271 = var_271_arg_0 | var_271_arg_1; [L882] SORT_1 var_272_arg_0 = input_72; [L883] SORT_1 var_272_arg_1 = var_271; [L884] SORT_1 var_272 = var_272_arg_0 | var_272_arg_1; [L885] SORT_1 var_273_arg_0 = input_33; [L886] SORT_1 var_273_arg_1 = var_272; [L887] SORT_1 var_273 = var_273_arg_0 | var_273_arg_1; [L888] SORT_1 var_274_arg_0 = input_237; [L889] SORT_1 var_274_arg_1 = var_273; [L890] SORT_1 var_274 = var_274_arg_0 | var_274_arg_1; [L891] SORT_1 var_275_arg_0 = var_270; [L892] SORT_1 var_275_arg_1 = var_274; [L893] SORT_1 var_275 = var_275_arg_0 & var_275_arg_1; [L894] SORT_1 var_276_arg_0 = input_104; [L895] SORT_1 var_276_arg_1 = input_89; [L896] SORT_1 var_276 = var_276_arg_0 & var_276_arg_1; [L897] SORT_1 var_277_arg_0 = input_72; [L898] SORT_1 var_277_arg_1 = var_271; [L899] SORT_1 var_277 = var_277_arg_0 & var_277_arg_1; [L900] SORT_1 var_278_arg_0 = var_276; [L901] SORT_1 var_278_arg_1 = var_277; [L902] SORT_1 var_278 = var_278_arg_0 | var_278_arg_1; [L903] SORT_1 var_279_arg_0 = input_33; [L904] SORT_1 var_279_arg_1 = var_272; [L905] SORT_1 var_279 = var_279_arg_0 & var_279_arg_1; [L906] SORT_1 var_280_arg_0 = var_278; [L907] SORT_1 var_280_arg_1 = var_279; [L908] SORT_1 var_280 = var_280_arg_0 | var_280_arg_1; [L909] SORT_1 var_281_arg_0 = input_237; [L910] SORT_1 var_281_arg_1 = var_273; [L911] SORT_1 var_281 = var_281_arg_0 & var_281_arg_1; [L912] SORT_1 var_282_arg_0 = var_280; [L913] SORT_1 var_282_arg_1 = var_281; [L914] SORT_1 var_282 = var_282_arg_0 | var_282_arg_1; [L915] SORT_1 var_283_arg_0 = var_275; [L916] SORT_1 var_283_arg_1 = ~var_282; [L917] var_283_arg_1 = var_283_arg_1 & mask_SORT_1 [L918] SORT_1 var_283 = var_283_arg_0 & var_283_arg_1; [L919] SORT_1 var_284_arg_0 = ~state_25; [L920] var_284_arg_0 = var_284_arg_0 & mask_SORT_1 [L921] SORT_1 var_284_arg_1 = state_27; [L922] SORT_1 var_284 = var_284_arg_0 & var_284_arg_1; [L923] SORT_1 var_285_arg_0 = ~state_23; [L924] var_285_arg_0 = var_285_arg_0 & mask_SORT_1 [L925] SORT_1 var_285_arg_1 = ~var_284; [L926] var_285_arg_1 = var_285_arg_1 & mask_SORT_1 [L927] SORT_1 var_285 = var_285_arg_0 & var_285_arg_1; [L928] SORT_1 var_286_arg_0 = ~state_25; [L929] var_286_arg_0 = var_286_arg_0 & mask_SORT_1 [L930] SORT_1 var_286_arg_1 = state_27; [L931] SORT_1 var_286 = var_286_arg_0 | var_286_arg_1; [L932] SORT_1 var_287_arg_0 = var_285; [L933] SORT_1 var_287_arg_1 = var_286; [L934] SORT_1 var_287 = var_287_arg_0 & var_287_arg_1; [L935] SORT_1 var_288_arg_0 = var_283; [L936] SORT_1 var_288_arg_1 = var_287; [L937] SORT_1 var_288 = var_288_arg_0 & var_288_arg_1; [L938] SORT_1 var_289_arg_0 = var_238; [L939] SORT_1 var_289_arg_1 = var_240; [L940] SORT_1 var_289 = var_289_arg_0 & var_289_arg_1; [L941] SORT_1 var_290_arg_0 = ~state_23; [L942] var_290_arg_0 = var_290_arg_0 & mask_SORT_1 [L943] SORT_1 var_290_arg_1 = ~var_289; [L944] var_290_arg_1 = var_290_arg_1 & mask_SORT_1 [L945] SORT_1 var_290 = var_290_arg_0 & var_290_arg_1; [L946] SORT_1 var_291_arg_0 = var_238; [L947] SORT_1 var_291_arg_1 = var_240; [L948] SORT_1 var_291 = var_291_arg_0 | var_291_arg_1; [L949] SORT_1 var_292_arg_0 = var_290; [L950] SORT_1 var_292_arg_1 = var_291; [L951] SORT_1 var_292 = var_292_arg_0 & var_292_arg_1; [L952] SORT_1 var_293_arg_0 = var_288; [L953] SORT_1 var_293_arg_1 = var_292; [L954] SORT_1 var_293 = var_293_arg_0 & var_293_arg_1; [L955] SORT_1 var_294_arg_0 = var_293; [L956] SORT_1 var_294_arg_1 = ~state_29; [L957] var_294_arg_1 = var_294_arg_1 & mask_SORT_1 [L958] SORT_1 var_294 = var_294_arg_0 & var_294_arg_1; [L959] SORT_1 next_295_arg_1 = ~var_294; [L960] next_295_arg_1 = next_295_arg_1 & mask_SORT_1 [L962] state_6 = next_123_arg_1 [L963] state_8 = next_142_arg_1 [L964] state_10 = next_161_arg_1 [L965] state_12 = next_180_arg_1 [L966] state_14 = next_199_arg_1 [L967] state_16 = next_223_arg_1 [L968] state_18 = next_230_arg_1 [L969] state_20 = next_235_arg_1 [L970] state_23 = next_236_arg_1 [L971] state_25 = next_239_arg_1 [L972] state_27 = next_241_arg_1 [L973] state_29 = next_295_arg_1 VAL [bad_32_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_15_arg_1=0, init_17_arg_1=0, init_19_arg_1=0, init_21_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_28_arg_1=0, init_30_arg_1=0, init_7_arg_1=0, init_9_arg_1=0, input_104=4, input_237=5, input_33=255, input_72=3, input_89=0, mask_SORT_1=1, mask_SORT_2=255, mask_SORT_3=4294967295, mask_SORT_4=4294967295, msb_SORT_1=1, msb_SORT_2=128, msb_SORT_3=8388608, msb_SORT_4=2147483648, next_123_arg_1=61, next_142_arg_1=37, next_161_arg_1=0, next_180_arg_1=202, next_199_arg_1=4, next_223_arg_1=5, next_230_arg_1=255, next_235_arg_1=78, next_236_arg_1=0, next_239_arg_1=19, next_241_arg_1=5, next_295_arg_1=73, state_10=0, state_12=202, state_14=4, state_16=5, state_18=255, state_20=78, state_23=0, state_25=19, state_27=5, state_29=73, state_6=61, state_8=37, var_100=6, var_100_arg_0=0, var_100_arg_1=2, var_100_arg_2=6, var_101=6, var_101_arg_0=0, var_101_arg_1=7, var_101_arg_2=6, var_102=6, var_102_arg_0=0, var_102_arg_1=0, var_102_arg_2=6, var_103=6, var_103_arg_0=0, var_103_arg_1=0, var_103_arg_2=6, var_105=4294967295, var_105_arg_0=0, var_105_arg_1=1, var_106=0, var_106_arg_0=0, var_106_arg_1=4294967295, var_107=1, var_107_arg_0=0, var_107_arg_1=1, var_108=0, var_108_arg_0=4, var_108_arg_1=1, var_109=0, var_109_arg_0=1, var_109_arg_1=4294967295, var_110=0, var_110_arg_0=2, var_110_arg_1=4294967295, var_111=0, var_111_arg_0=3, var_111_arg_1=4294967295, var_112=0, var_112_arg_0=4, var_112_arg_1=4294967295, var_113=3, var_113_arg_0=0, var_113_arg_1=2, var_113_arg_2=3, var_114=3, var_114_arg_0=0, var_114_arg_1=6, var_114_arg_2=3, var_115=3, var_115_arg_0=0, var_115_arg_1=2, var_115_arg_2=3, var_116=3, var_116_arg_0=0, var_116_arg_1=7, var_116_arg_2=3, var_117=3, var_117_arg_0=0, var_117_arg_1=0, var_117_arg_2=3, var_118=3, var_118_arg_0=0, var_118_arg_1=0, var_118_arg_2=3, var_119=0, var_119_arg_0=0, var_119_arg_1=3, var_119_arg_2=0, var_120=0, var_120_arg_0=0, var_120_arg_1=6, var_120_arg_2=0, var_121=0, var_121_arg_0=0, var_121_arg_1=2, var_121_arg_2=0, var_122=61, var_122_arg_0=2, var_122_arg_1=3, var_122_arg_2=0, var_124=0, var_124_arg_0=1, var_124_arg_1=0, var_125=0, var_125_arg_0=0, var_125_arg_1=0, var_126=0, var_126_arg_0=255, var_126_arg_1=0, var_127=3, var_127_arg_0=0, var_127_arg_1=0, var_127_arg_2=3, var_128=0, var_128_arg_0=0, var_128_arg_1=0, var_129=0, var_129_arg_0=3, var_129_arg_1=0, var_130=2, var_130_arg_0=0, var_130_arg_1=0, var_130_arg_2=2, var_131=0, var_131_arg_0=0, var_131_arg_1=0, var_132=0, var_132_arg_0=0, var_132_arg_1=0, var_133=6, var_133_arg_0=0, var_133_arg_1=0, var_133_arg_2=6, var_134=0, var_134_arg_0=0, var_134_arg_1=0, var_135=0, var_135_arg_0=4, var_135_arg_1=0, var_136=3, var_136_arg_0=0, var_136_arg_1=0, var_136_arg_2=3, var_137=7, var_137_arg_0=0, var_137_arg_1=3, var_137_arg_2=7, var_138=7, var_138_arg_0=0, var_138_arg_1=6, var_138_arg_2=7, var_139=7, var_139_arg_0=0, var_139_arg_1=2, var_139_arg_2=7, var_140=7, var_140_arg_0=0, var_140_arg_1=3, var_140_arg_2=7, var_141=37, var_141_arg_0=1, var_141_arg_1=7, var_143=0, var_143_arg_0=2, var_143_arg_1=0, var_144=0, var_144_arg_0=0, var_144_arg_1=0, var_145=0, var_145_arg_0=255, var_145_arg_1=0, var_146=3, var_146_arg_0=0, var_146_arg_1=0, var_146_arg_2=3, var_147=0, var_147_arg_0=0, var_147_arg_1=0, var_148=0, var_148_arg_0=3, var_148_arg_1=0, var_149=2, var_149_arg_0=0, var_149_arg_1=0, var_149_arg_2=2, var_150=0, var_150_arg_0=0, var_150_arg_1=0, var_151=0, var_151_arg_0=0, var_151_arg_1=0, var_152=6, var_152_arg_0=0, var_152_arg_1=0, var_152_arg_2=6, var_153=0, var_153_arg_0=0, var_153_arg_1=0, var_154=0, var_154_arg_0=4, var_154_arg_1=0, var_155=3, var_155_arg_0=0, var_155_arg_1=0, var_155_arg_2=3, var_156=2, var_156_arg_0=0, var_156_arg_1=3, var_156_arg_2=2, var_157=2, var_157_arg_0=0, var_157_arg_1=6, var_157_arg_2=2, var_158=2, var_158_arg_0=0, var_158_arg_1=2, var_158_arg_2=2, var_159=2, var_159_arg_0=0, var_159_arg_1=3, var_159_arg_2=2, var_160=0, var_160_arg_0=2, var_160_arg_1=2, var_162=0, var_162_arg_0=3, var_162_arg_1=0, var_163=0, var_163_arg_0=0, var_163_arg_1=0, var_164=0, var_164_arg_0=255, var_164_arg_1=0, var_165=3, var_165_arg_0=0, var_165_arg_1=0, var_165_arg_2=3, var_166=0, var_166_arg_0=0, var_166_arg_1=0, var_167=0, var_167_arg_0=3, var_167_arg_1=0, var_168=2, var_168_arg_0=0, var_168_arg_1=0, var_168_arg_2=2, var_169=1, var_169_arg_0=0, var_169_arg_1=1, var_170=0, var_170_arg_0=0, var_170_arg_1=1, var_171=0, var_171_arg_0=1, var_171_arg_1=0, var_171_arg_2=6, var_172=0, var_172_arg_0=0, var_172_arg_1=0, var_173=0, var_173_arg_0=4, var_173_arg_1=0, var_174=3, var_174_arg_0=0, var_174_arg_1=0, var_174_arg_2=3, var_175=6, var_175_arg_0=0, var_175_arg_1=3, var_175_arg_2=6, var_176=6, var_176_arg_0=0, var_176_arg_1=0, var_176_arg_2=6, var_177=6, var_177_arg_0=0, var_177_arg_1=2, var_177_arg_2=6, var_178=6, var_178_arg_0=0, var_178_arg_1=3, var_178_arg_2=6, var_179=202, var_179_arg_0=3, var_179_arg_1=6, var_181=0, var_181_arg_0=4, var_181_arg_1=0, var_182=0, var_182_arg_0=0, var_182_arg_1=0, var_183=0, var_183_arg_0=255, var_183_arg_1=0, var_184=3, var_184_arg_0=0, var_184_arg_1=0, var_184_arg_2=3, var_185=1, var_185_arg_0=0, var_185_arg_1=1, var_186=1, var_186_arg_0=3, var_186_arg_1=1, var_187=0, var_187_arg_0=1, var_187_arg_1=0, var_187_arg_2=2, var_188=0, var_188_arg_0=0, var_188_arg_1=0, var_189=0, var_189_arg_0=0, var_189_arg_1=0, var_190=6, var_190_arg_0=0, var_190_arg_1=0, var_190_arg_2=6, var_191=0, var_191_arg_0=0, var_191_arg_1=0, var_192=0, var_192_arg_0=4, var_192_arg_1=0, var_193=3, var_193_arg_0=0, var_193_arg_1=0, var_193_arg_2=3, var_194=2, var_194_arg_0=0, var_194_arg_1=3, var_194_arg_2=2, var_195=2, var_195_arg_0=0, var_195_arg_1=6, var_195_arg_2=2, var_196=0, var_196_arg_0=1, var_196_arg_1=0, var_196_arg_2=2, var_197=0, var_197_arg_0=0, var_197_arg_1=3, var_197_arg_2=0, var_198=4, var_198_arg_0=4, var_198_arg_1=0, var_200=5, var_201=0, var_201_arg_0=5, var_201_arg_1=0, var_202=1, var_202_arg_0=5, var_202_arg_1=5, var_203=1, var_203_arg_0=0, var_203_arg_1=1, var_204=1, var_204_arg_0=255, var_204_arg_1=1, var_205=0, var_205_arg_0=1, var_205_arg_1=0, var_205_arg_2=3, var_206=0, var_206_arg_0=5, var_206_arg_1=4, var_207=0, var_207_arg_0=0, var_207_arg_1=0, var_208=0, var_208_arg_0=3, var_208_arg_1=0, var_209=2, var_209_arg_0=0, var_209_arg_1=0, var_209_arg_2=2, var_210=0, var_210_arg_0=5, var_210_arg_1=3, var_211=0, var_211_arg_0=0, var_211_arg_1=0, var_212=0, var_212_arg_0=0, var_212_arg_1=0, var_213=6, var_213_arg_0=0, var_213_arg_1=0, var_213_arg_2=6, var_214=0, var_214_arg_0=5, var_214_arg_1=4294967295, var_215=0, var_215_arg_0=0, var_215_arg_1=0, var_216=0, var_216_arg_0=4, var_216_arg_1=0, var_217=3, var_217_arg_0=0, var_217_arg_1=0, var_217_arg_2=3, var_218=3, var_218_arg_0=0, var_218_arg_1=3, var_218_arg_2=3, var_219=3, var_219_arg_0=0, var_219_arg_1=6, var_219_arg_2=3, var_22=0, var_220=3, var_220_arg_0=0, var_220_arg_1=2, var_220_arg_2=3, var_221=0, var_221_arg_0=1, var_221_arg_1=0, var_221_arg_2=3, var_222=5, var_222_arg_0=5, var_222_arg_1=0, var_224=1, var_224_arg_0=1, var_224_arg_1=0, var_225=1, var_225_arg_0=1, var_226=4294967295, var_226_arg_0=0, var_226_arg_1=1, var_227=255, var_227_arg_0=4294967295, var_228=255, var_228_arg_0=4, var_228_arg_1=255, var_228_arg_2=0, var_229=255, var_229_arg_0=0, var_229_arg_1=1, var_229_arg_2=255, var_231=1, var_231_arg_0=1, var_232=255, var_232_arg_0=4294967295, var_233=255, var_233_arg_0=3, var_233_arg_1=255, var_233_arg_2=0, var_234=78, var_234_arg_0=255, var_234_arg_1=1, var_234_arg_2=255, var_238=3, var_238_arg_0=2, var_238_arg_1=1, var_240=5, var_240_arg_0=0, var_240_arg_1=5, var_242=1, var_242_arg_0=0, var_242_arg_1=0, var_243=255, var_243_arg_0=2, var_243_arg_1=1, var_244=254, var_244_arg_0=253, var_244_arg_1=255, var_245=0, var_245_arg_0=1, var_245_arg_1=0, var_246=4, var_246_arg_0=3, var_246_arg_1=2, var_247=253, var_247_arg_0=253, var_247_arg_1=4, var_248=3, var_248_arg_0=254, var_248_arg_1=253, var_249=1, var_249_arg_0=0, var_249_arg_1=0, var_250=3, var_250_arg_0=3, var_250_arg_1=2, var_251=2, var_251_arg_0=2, var_251_arg_1=3, var_252=255, var_252_arg_0=3, var_252_arg_1=2, var_253=0, var_253_arg_0=2, var_253_arg_1=0, var_254=3, var_254_arg_0=4, var_254_arg_1=5, var_255=254, var_255_arg_0=4, var_255_arg_1=3, var_256=3, var_256_arg_0=255, var_256_arg_1=254, var_257=0, var_257_arg_0=5, var_257_arg_1=0, var_258=0, var_258_arg_0=4, var_258_arg_1=7, var_259=0, var_259_arg_0=0, var_259_arg_1=0, var_260=0, var_260_arg_0=3, var_260_arg_1=2, var_261=0, var_261_arg_0=0, var_261_arg_1=0, var_262=0, var_262_arg_0=2, var_262_arg_1=6, var_263=0, var_263_arg_0=0, var_263_arg_1=0, var_264=0, var_264_arg_0=1, var_264_arg_1=2, var_265=0, var_265_arg_0=0, var_265_arg_1=0, var_266=0, var_266_arg_0=0, var_266_arg_1=3, var_267=0, var_267_arg_0=0, var_267_arg_1=0, var_268=0, var_268_arg_0=1, var_268_arg_1=0, var_269=4, var_269_arg_0=4, var_269_arg_1=0, var_270=2, var_270_arg_0=3, var_270_arg_1=4, var_271=4, var_271_arg_0=4, var_271_arg_1=0, var_272=2, var_272_arg_0=3, var_272_arg_1=4, var_273=3, var_273_arg_0=255, var_273_arg_1=2, var_274=4, var_274_arg_0=5, var_274_arg_1=3, var_275=2, var_275_arg_0=2, var_275_arg_1=4, var_276=0, var_276_arg_0=4, var_276_arg_1=0, var_277=3, var_277_arg_0=3, var_277_arg_1=4, var_278=3, var_278_arg_0=0, var_278_arg_1=3, var_279=4, var_279_arg_0=255, var_279_arg_1=2, var_280=0, var_280_arg_0=3, var_280_arg_1=4, var_281=255, var_281_arg_0=5, var_281_arg_1=3, var_282=255, var_282_arg_0=0, var_282_arg_1=255, var_283=1, var_283_arg_0=2, var_283_arg_1=3, var_284=0, var_284_arg_0=1, var_284_arg_1=0, var_285=0, var_285_arg_0=254, var_285_arg_1=255, var_286=5, var_286_arg_0=5, var_286_arg_1=0, var_287=0, var_287_arg_0=0, var_287_arg_1=5, var_288=0, var_288_arg_0=1, var_288_arg_1=0, var_289=97, var_289_arg_0=3, var_289_arg_1=5, var_290=2, var_290_arg_0=2, var_290_arg_1=3, var_291=4, var_291_arg_0=3, var_291_arg_1=5, var_292=1, var_292_arg_0=2, var_292_arg_1=4, var_293=0, var_293_arg_0=0, var_293_arg_1=1, var_294=0, var_294_arg_0=0, var_294_arg_1=2, var_31=0, var_31_arg_0=0, var_31_arg_1=2, var_34=0, var_35=0, var_36=0, var_36_arg_0=0, var_36_arg_1=0, var_37=2, var_38=0, var_38_arg_0=0, var_38_arg_1=0, var_39=0, var_39_arg_0=2, var_39_arg_1=0, var_40=0, var_40_arg_0=0, var_40_arg_1=0, var_41=1, var_41_arg_0=0, var_41_arg_1=0, var_42=1, var_43=1, var_43_arg_0=1, var_43_arg_1=0, var_44=2, var_44_arg_0=2, var_44_arg_1=1, var_45=5, var_45_arg_0=0, var_45_arg_1=2, var_46=0, var_46_arg_0=0, var_46_arg_1=5, var_47=1, var_47_arg_0=1, var_47_arg_1=0, var_48=2, var_48_arg_0=255, var_48_arg_1=1, var_49=0, var_5=0, var_50=0, var_50_arg_0=1, var_50_arg_1=5, var_51=1, var_52=7, var_52_arg_0=1, var_52_arg_1=0, var_53=0, var_53_arg_0=2, var_53_arg_1=5, var_54=2, var_55=2, var_55_arg_0=2, var_55_arg_1=0, var_56=3, var_57=0, var_57_arg_0=3, var_57_arg_1=5, var_58=3, var_59=6, var_59_arg_0=3, var_59_arg_1=0, var_60=4, var_61=0, var_61_arg_0=4, var_61_arg_1=5, var_62=4, var_63=2, var_63_arg_0=4, var_63_arg_1=0, var_64=5, var_65=3, var_65_arg_0=5, var_65_arg_1=0, var_66=3, var_66_arg_0=0, var_66_arg_1=2, var_66_arg_2=3, var_67=3, var_67_arg_0=0, var_67_arg_1=6, var_67_arg_2=3, var_68=3, var_68_arg_0=0, var_68_arg_1=2, var_68_arg_2=3, var_69=3, var_69_arg_0=0, var_69_arg_1=7, var_69_arg_2=3, var_70=3, var_70_arg_0=0, var_70_arg_1=0, var_70_arg_2=3, var_71=3, var_71_arg_0=0, var_71_arg_1=0, var_71_arg_2=3, var_73=4294967295, var_73_arg_0=0, var_73_arg_1=1, var_74=4294967294, var_74_arg_0=2, var_74_arg_1=4294967295, var_75=4, var_75_arg_0=0, var_75_arg_1=4294967294, var_76=0, var_76_arg_0=0, var_76_arg_1=4, var_77=1, var_77_arg_0=1, var_77_arg_1=0, var_78=0, var_78_arg_0=3, var_78_arg_1=1, var_79=0, var_79_arg_0=1, var_79_arg_1=4, var_80=0, var_80_arg_0=2, var_80_arg_1=4, var_81=0, var_81_arg_0=3, var_81_arg_1=4, var_82=1, var_82_arg_0=4, var_82_arg_1=4, var_83=2, var_83_arg_0=1, var_83_arg_1=2, var_83_arg_2=3, var_84=2, var_84_arg_0=0, var_84_arg_1=6, var_84_arg_2=2, var_85=2, var_85_arg_0=0, var_85_arg_1=2, var_85_arg_2=2, var_86=2, var_86_arg_0=0, var_86_arg_1=7, var_86_arg_2=2, var_87=2, var_87_arg_0=0, var_87_arg_1=0, var_87_arg_2=2, var_88=2, var_88_arg_0=0, var_88_arg_1=0, var_88_arg_2=2, var_90=3, var_90_arg_0=1, var_90_arg_1=0, var_91=0, var_91_arg_0=0, var_91_arg_1=3, var_92=1, var_92_arg_0=1, var_92_arg_1=0, var_93=0, var_93_arg_0=0, var_93_arg_1=1, var_94=0, var_94_arg_0=1, var_94_arg_1=3, var_95=0, var_95_arg_0=2, var_95_arg_1=3, var_96=1, var_96_arg_0=3, var_96_arg_1=3, var_97=0, var_97_arg_0=4, var_97_arg_1=3, var_98=3, var_98_arg_0=0, var_98_arg_1=2, var_98_arg_2=3, var_99=6, var_99_arg_0=1, var_99_arg_1=6, var_99_arg_2=3] [L98] input_33 = __VERIFIER_nondet_uchar() [L99] input_33 = input_33 & mask_SORT_1 [L100] input_72 = __VERIFIER_nondet_uchar() [L101] input_72 = input_72 & mask_SORT_1 [L102] input_89 = __VERIFIER_nondet_uchar() [L103] input_89 = input_89 & mask_SORT_1 [L104] input_104 = __VERIFIER_nondet_uchar() [L105] input_104 = input_104 & mask_SORT_1 [L106] input_237 = __VERIFIER_nondet_uchar() [L109] SORT_1 var_31_arg_0 = state_27; [L110] SORT_1 var_31_arg_1 = ~state_29; [L111] var_31_arg_1 = var_31_arg_1 & mask_SORT_1 [L112] SORT_1 var_31 = var_31_arg_0 & var_31_arg_1; [L113] var_31 = var_31 & mask_SORT_1 [L114] SORT_1 bad_32_arg_0 = var_31; [L115] CALL __VERIFIER_assert(!(bad_32_arg_0)) [L20] COND TRUE !(cond) VAL [cond=0, unknown-#in~cond-unknown=0] [L20] reach_error() VAL [cond=0, unknown-#in~cond-unknown=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 7 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 214.4s, OverallIterations: 2, TraceHistogramMax: 2, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 2.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 1 mSolverCounterUnknown, 3 SdHoareTripleChecker+Valid, 2.1s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 3 mSDsluCounter, 6 SdHoareTripleChecker+Invalid, 2.1s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 4 mSDsCounter, 1 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 7 IncrementalHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 1 mSolverCounterUnsat, 2 mSDtfsCounter, 7 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=8occurred in iteration=1, InterpolantAutomatonStates: 5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 1 MinimizatonAttempts, 1 StatesRemovedByMinimization, 1 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.2s SsaConstructionTime, 153.2s SatisfiabilityAnalysisTime, 0.7s InterpolantComputationTime, 11 NumberOfCodeBlocks, 11 NumberOfCodeBlocksAsserted, 2 NumberOfCheckSat, 3 ConstructedInterpolants, 0 QuantifiedInterpolants, 8 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 1 InterpolantComputations, 1 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2022-11-23 15:42:43,138 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.loyd.1.prop1-func-interl.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/config/svcomp-Reach-64bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 26db93204ab32e8f9e21f7eb034d2307b8352a18baf9236ed38d699dc2a3b5eb --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-4e7fbc6 [2022-11-23 15:42:45,659 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-23 15:42:45,662 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-23 15:42:45,703 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-23 15:42:45,704 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-23 15:42:45,707 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-23 15:42:45,710 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-23 15:42:45,713 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-23 15:42:45,716 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-23 15:42:45,721 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-23 15:42:45,722 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-23 15:42:45,725 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-23 15:42:45,725 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-23 15:42:45,728 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-23 15:42:45,729 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-23 15:42:45,736 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-23 15:42:45,737 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-23 15:42:45,738 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-23 15:42:45,740 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-23 15:42:45,744 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-23 15:42:45,746 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-23 15:42:45,749 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-23 15:42:45,750 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-23 15:42:45,751 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-23 15:42:45,761 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-23 15:42:45,761 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-23 15:42:45,762 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-23 15:42:45,764 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-23 15:42:45,764 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-23 15:42:45,766 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-23 15:42:45,766 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-23 15:42:45,767 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-23 15:42:45,769 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-23 15:42:45,784 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-23 15:42:45,785 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-23 15:42:45,785 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-23 15:42:45,786 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-23 15:42:45,786 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-23 15:42:45,786 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-23 15:42:45,787 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-23 15:42:45,788 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-23 15:42:45,793 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/config/svcomp-Reach-64bit-Taipan_Bitvector.epf [2022-11-23 15:42:45,831 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-23 15:42:45,831 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-23 15:42:45,833 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-23 15:42:45,833 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-23 15:42:45,834 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-23 15:42:45,834 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-23 15:42:45,834 INFO L138 SettingsManager]: * User list type=DISABLED [2022-11-23 15:42:45,835 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-11-23 15:42:45,835 INFO L138 SettingsManager]: * Explicit value domain=true [2022-11-23 15:42:45,835 INFO L138 SettingsManager]: * Octagon Domain=false [2022-11-23 15:42:45,836 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-11-23 15:42:45,836 INFO L138 SettingsManager]: * Interval Domain=false [2022-11-23 15:42:45,837 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-23 15:42:45,837 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-23 15:42:45,838 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-23 15:42:45,838 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-23 15:42:45,838 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-23 15:42:45,838 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-11-23 15:42:45,838 INFO L138 SettingsManager]: * Use bitvectors instead of ints=true [2022-11-23 15:42:45,839 INFO L138 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2022-11-23 15:42:45,839 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-23 15:42:45,839 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-23 15:42:45,839 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-23 15:42:45,839 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-23 15:42:45,840 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-23 15:42:45,840 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-23 15:42:45,840 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-23 15:42:45,840 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-23 15:42:45,840 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-23 15:42:45,840 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-23 15:42:45,841 INFO L138 SettingsManager]: * Trace refinement strategy=WALRUS [2022-11-23 15:42:45,841 INFO L138 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2022-11-23 15:42:45,841 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-23 15:42:45,841 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-11-23 15:42:45,842 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-11-23 15:42:45,842 INFO L138 SettingsManager]: * Logic for external solver=AUFBV WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 26db93204ab32e8f9e21f7eb034d2307b8352a18baf9236ed38d699dc2a3b5eb [2022-11-23 15:42:46,280 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-23 15:42:46,313 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-23 15:42:46,317 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-23 15:42:46,318 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-23 15:42:46,320 INFO L275 PluginConnector]: CDTParser initialized [2022-11-23 15:42:46,322 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.loyd.1.prop1-func-interl.c [2022-11-23 15:42:49,439 INFO L500 CDTParser]: Created temporary CDT project at NULL [2022-11-23 15:42:49,735 INFO L351 CDTParser]: Found 1 translation units. [2022-11-23 15:42:49,735 INFO L172 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.loyd.1.prop1-func-interl.c [2022-11-23 15:42:49,746 INFO L394 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/data/d55023beb/22d927e15c734045989d306b51552c3c/FLAG901fb0b5c [2022-11-23 15:42:49,764 INFO L402 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/data/d55023beb/22d927e15c734045989d306b51552c3c [2022-11-23 15:42:49,766 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-23 15:42:49,768 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-23 15:42:49,770 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-23 15:42:49,770 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-23 15:42:49,780 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-23 15:42:49,781 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 03:42:49" (1/1) ... [2022-11-23 15:42:49,782 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@490e9b17 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:42:49, skipping insertion in model container [2022-11-23 15:42:49,783 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 03:42:49" (1/1) ... [2022-11-23 15:42:49,792 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-23 15:42:49,874 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-23 15:42:50,117 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.loyd.1.prop1-func-interl.c[1014,1027] [2022-11-23 15:42:50,418 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-23 15:42:50,434 INFO L203 MainTranslator]: Completed pre-run [2022-11-23 15:42:50,448 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.loyd.1.prop1-func-interl.c[1014,1027] [2022-11-23 15:42:50,528 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-23 15:42:50,540 INFO L208 MainTranslator]: Completed translation [2022-11-23 15:42:50,541 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:42:50 WrapperNode [2022-11-23 15:42:50,541 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-23 15:42:50,542 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-23 15:42:50,542 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-23 15:42:50,542 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-23 15:42:50,550 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:42:50" (1/1) ... [2022-11-23 15:42:50,572 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:42:50" (1/1) ... [2022-11-23 15:42:50,651 INFO L138 Inliner]: procedures = 11, calls = 3, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 966 [2022-11-23 15:42:50,651 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-23 15:42:50,652 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-23 15:42:50,652 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-23 15:42:50,652 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-23 15:42:50,664 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:42:50" (1/1) ... [2022-11-23 15:42:50,665 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:42:50" (1/1) ... [2022-11-23 15:42:50,674 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:42:50" (1/1) ... [2022-11-23 15:42:50,674 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:42:50" (1/1) ... [2022-11-23 15:42:50,698 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:42:50" (1/1) ... [2022-11-23 15:42:50,703 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:42:50" (1/1) ... [2022-11-23 15:42:50,708 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:42:50" (1/1) ... [2022-11-23 15:42:50,712 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:42:50" (1/1) ... [2022-11-23 15:42:50,721 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-23 15:42:50,722 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-23 15:42:50,723 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-23 15:42:50,723 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-23 15:42:50,724 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:42:50" (1/1) ... [2022-11-23 15:42:50,746 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-23 15:42:50,760 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/z3 [2022-11-23 15:42:50,780 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-23 15:42:50,783 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-23 15:42:50,820 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-23 15:42:50,821 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-23 15:42:51,150 INFO L235 CfgBuilder]: Building ICFG [2022-11-23 15:42:51,151 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-23 15:42:52,964 INFO L276 CfgBuilder]: Performing block encoding [2022-11-23 15:42:52,975 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-23 15:42:52,976 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-23 15:42:52,978 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 03:42:52 BoogieIcfgContainer [2022-11-23 15:42:52,978 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-23 15:42:52,981 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-23 15:42:52,982 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-23 15:42:52,985 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-23 15:42:52,985 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 03:42:49" (1/3) ... [2022-11-23 15:42:52,987 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3d81b4c5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 03:42:52, skipping insertion in model container [2022-11-23 15:42:52,987 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:42:50" (2/3) ... [2022-11-23 15:42:52,989 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3d81b4c5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 03:42:52, skipping insertion in model container [2022-11-23 15:42:52,990 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 03:42:52" (3/3) ... [2022-11-23 15:42:52,991 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.loyd.1.prop1-func-interl.c [2022-11-23 15:42:53,012 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-23 15:42:53,012 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-23 15:42:53,068 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-23 15:42:53,074 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@2faf3bc8, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-23 15:42:53,075 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-23 15:42:53,079 INFO L276 IsEmpty]: Start isEmpty. Operand has 11 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 10 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 15:42:53,087 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2022-11-23 15:42:53,088 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 15:42:53,088 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2022-11-23 15:42:53,089 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-23 15:42:53,096 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 15:42:53,096 INFO L85 PathProgramCache]: Analyzing trace with hash 28698761, now seen corresponding path program 1 times [2022-11-23 15:42:53,110 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-23 15:42:53,111 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [721068587] [2022-11-23 15:42:53,111 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 15:42:53,112 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-23 15:42:53,112 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/mathsat [2022-11-23 15:42:53,122 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-23 15:42:53,158 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (2)] Waiting until timeout for monitored process [2022-11-23 15:42:53,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 15:42:53,387 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 10 conjunts are in the unsatisfiable core [2022-11-23 15:42:53,394 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 15:42:53,485 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-23 15:42:53,494 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-23 15:42:53,495 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-23 15:42:53,495 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [721068587] [2022-11-23 15:42:53,496 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [721068587] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-23 15:42:53,496 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-23 15:42:53,496 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-23 15:42:53,498 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [422945271] [2022-11-23 15:42:53,499 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-23 15:42:53,503 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-23 15:42:53,504 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-23 15:42:53,540 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-23 15:42:53,541 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-23 15:42:53,543 INFO L87 Difference]: Start difference. First operand has 11 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 10 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 15:42:53,750 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 15:42:53,750 INFO L93 Difference]: Finished difference Result 20 states and 30 transitions. [2022-11-23 15:42:53,752 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-23 15:42:53,753 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 5 [2022-11-23 15:42:53,753 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-23 15:42:53,763 INFO L225 Difference]: With dead ends: 20 [2022-11-23 15:42:53,765 INFO L226 Difference]: Without dead ends: 11 [2022-11-23 15:42:53,768 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-23 15:42:53,774 INFO L413 NwaCegarLoop]: 5 mSDtfsCounter, 4 mSDsluCounter, 8 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 13 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-23 15:42:53,779 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 13 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-23 15:42:53,805 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11 states. [2022-11-23 15:42:53,818 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11 to 9. [2022-11-23 15:42:53,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 8 states have (on average 1.125) internal successors, (9), 8 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 15:42:53,820 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 9 transitions. [2022-11-23 15:42:53,822 INFO L78 Accepts]: Start accepts. Automaton has 9 states and 9 transitions. Word has length 5 [2022-11-23 15:42:53,822 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-23 15:42:53,823 INFO L495 AbstractCegarLoop]: Abstraction has 9 states and 9 transitions. [2022-11-23 15:42:53,823 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 15:42:53,823 INFO L276 IsEmpty]: Start isEmpty. Operand 9 states and 9 transitions. [2022-11-23 15:42:53,824 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2022-11-23 15:42:53,824 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 15:42:53,824 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1] [2022-11-23 15:42:53,848 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (2)] Forceful destruction successful, exit code 0 [2022-11-23 15:42:54,038 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-23 15:42:54,038 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-23 15:42:54,039 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 15:42:54,039 INFO L85 PathProgramCache]: Analyzing trace with hash 271073635, now seen corresponding path program 1 times [2022-11-23 15:42:54,044 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-23 15:42:54,044 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [562755852] [2022-11-23 15:42:54,044 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 15:42:54,045 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-23 15:42:54,045 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/mathsat [2022-11-23 15:42:54,046 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-23 15:42:54,053 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (3)] Waiting until timeout for monitored process [2022-11-23 15:42:54,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 15:42:54,695 INFO L263 TraceCheckSpWp]: Trace formula consists of 866 conjuncts, 53 conjunts are in the unsatisfiable core [2022-11-23 15:42:54,705 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 15:42:55,176 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-23 15:42:55,177 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 15:42:55,889 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-23 15:42:55,890 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-23 15:42:55,890 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [562755852] [2022-11-23 15:42:55,891 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [562755852] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-23 15:42:55,896 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1578378430] [2022-11-23 15:42:55,896 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 15:42:55,897 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-23 15:42:55,897 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/cvc4 [2022-11-23 15:42:55,928 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-23 15:42:55,950 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt (4)] Waiting until timeout for monitored process [2022-11-23 15:42:57,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 15:42:57,066 INFO L263 TraceCheckSpWp]: Trace formula consists of 866 conjuncts, 52 conjunts are in the unsatisfiable core [2022-11-23 15:42:57,076 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 15:42:57,310 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-23 15:42:57,310 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 15:43:00,306 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-23 15:43:00,306 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1578378430] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-23 15:43:00,306 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1105864576] [2022-11-23 15:43:00,307 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 15:43:00,307 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 15:43:00,307 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/z3 [2022-11-23 15:43:00,314 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-23 15:43:00,347 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-11-23 15:43:00,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 15:43:00,857 INFO L263 TraceCheckSpWp]: Trace formula consists of 866 conjuncts, 52 conjunts are in the unsatisfiable core [2022-11-23 15:43:00,868 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 15:43:01,241 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-23 15:43:01,243 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 15:43:06,057 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-23 15:43:06,059 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1105864576] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-23 15:43:06,064 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-23 15:43:06,065 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 6, 6] total 14 [2022-11-23 15:43:06,066 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1434751001] [2022-11-23 15:43:06,066 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-23 15:43:06,067 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-11-23 15:43:06,068 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-23 15:43:06,068 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-11-23 15:43:06,070 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=137, Unknown=3, NotChecked=0, Total=182 [2022-11-23 15:43:06,071 INFO L87 Difference]: Start difference. First operand 9 states and 9 transitions. Second operand has 14 states, 14 states have (on average 2.142857142857143) internal successors, (30), 14 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 15:43:07,052 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 15:43:07,053 INFO L93 Difference]: Finished difference Result 16 states and 16 transitions. [2022-11-23 15:43:07,053 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-23 15:43:07,054 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 2.142857142857143) internal successors, (30), 14 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 8 [2022-11-23 15:43:07,054 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-23 15:43:07,054 INFO L225 Difference]: With dead ends: 16 [2022-11-23 15:43:07,054 INFO L226 Difference]: Without dead ends: 14 [2022-11-23 15:43:07,055 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 30 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 37 ImplicationChecksByTransitivity, 8.4s TimeCoverageRelationStatistics Valid=75, Invalid=194, Unknown=3, NotChecked=0, Total=272 [2022-11-23 15:43:07,056 INFO L413 NwaCegarLoop]: 4 mSDtfsCounter, 16 mSDsluCounter, 16 mSDsCounter, 0 mSdLazyCounter, 28 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 20 SdHoareTripleChecker+Invalid, 33 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 28 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-11-23 15:43:07,057 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [16 Valid, 20 Invalid, 33 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 28 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2022-11-23 15:43:07,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14 states. [2022-11-23 15:43:07,062 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14 to 12. [2022-11-23 15:43:07,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 11 states have (on average 1.0909090909090908) internal successors, (12), 11 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 15:43:07,064 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 12 transitions. [2022-11-23 15:43:07,064 INFO L78 Accepts]: Start accepts. Automaton has 12 states and 12 transitions. Word has length 8 [2022-11-23 15:43:07,065 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-23 15:43:07,065 INFO L495 AbstractCegarLoop]: Abstraction has 12 states and 12 transitions. [2022-11-23 15:43:07,066 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 2.142857142857143) internal successors, (30), 14 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 15:43:07,066 INFO L276 IsEmpty]: Start isEmpty. Operand 12 states and 12 transitions. [2022-11-23 15:43:07,067 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-11-23 15:43:07,067 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 15:43:07,068 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1] [2022-11-23 15:43:07,093 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (3)] Forceful destruction successful, exit code 0 [2022-11-23 15:43:07,308 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt (4)] Ended with exit code 0 [2022-11-23 15:43:07,498 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2022-11-23 15:43:07,688 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 15:43:07,689 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-23 15:43:07,690 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 15:43:07,690 INFO L85 PathProgramCache]: Analyzing trace with hash 1020920393, now seen corresponding path program 2 times [2022-11-23 15:43:07,693 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-23 15:43:07,694 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [864497015] [2022-11-23 15:43:07,694 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-23 15:43:07,694 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-23 15:43:07,694 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/mathsat [2022-11-23 15:43:07,696 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-23 15:43:07,708 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (6)] Waiting until timeout for monitored process [2022-11-23 15:43:08,653 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-23 15:43:08,654 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-23 15:43:08,721 INFO L263 TraceCheckSpWp]: Trace formula consists of 1669 conjuncts, 147 conjunts are in the unsatisfiable core [2022-11-23 15:43:08,737 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 15:43:10,223 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-23 15:43:10,223 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 15:47:17,784 WARN L859 $PredicateComparison]: unable to prove that (let ((.cse0 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_1~0#1|))) (or (forall ((|v_ULTIMATE.start_main_~var_270_arg_0~0#1_9| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_283_arg_1~0#1_10| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_263_arg_0~0#1_9| (_ BitVec 8)) (|ULTIMATE.start_main_~input_237~0#1| (_ BitVec 8)) (|ULTIMATE.start_main_~state_27~0#1| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_268_arg_0~0#1_10| (_ BitVec 8)) (|ULTIMATE.start_main_~state_29~0#1| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_275_arg_1~0#1_9| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_265_arg_1~0#1_9| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_267_arg_1~0#1_9| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_288_arg_1~0#1_9| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_293_arg_1~0#1_9| (_ BitVec 8))) (let ((.cse3 ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse0 ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) |ULTIMATE.start_main_~state_29~0#1|)))))))) (.cse1 ((_ zero_extend 24) |ULTIMATE.start_main_~state_27~0#1|))) (or (= (_ bv0 8) ((_ extract 7 0) (bvand .cse0 ((_ zero_extend 24) ((_ extract 7 0) (let ((.cse2 ((_ zero_extend 24) |ULTIMATE.start_main_~input_237~0#1|))) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvor .cse1 .cse2))) ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse0 ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse0 ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_293_arg_1~0#1_9|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_288_arg_1~0#1_9|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_283_arg_1~0#1_10|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_275_arg_1~0#1_9|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvor ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_263_arg_0~0#1_9|) (_ bv1 32)))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_265_arg_1~0#1_9|)))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_267_arg_1~0#1_9|)))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_268_arg_0~0#1_10|)))) ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse0 ((_ zero_extend 24) ((_ extract 7 0) (bvnot .cse2))))))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_270_arg_0~0#1_9|)))))))))))))))) .cse3)))))))))))))))))))))) (not (= ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse3 .cse1))) .cse0)) (_ bv0 8)))))) (let ((.cse139 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_2~0#1|)) (.cse138 ((_ zero_extend 24) |c_ULTIMATE.start_main_~var_58~0#1|)) (.cse140 ((_ zero_extend 24) |c_ULTIMATE.start_main_~var_54~0#1|))) (let ((.cse27 (forall ((|v_ULTIMATE.start_main_~var_167_arg_0~0#1_10| (_ BitVec 8))) (= ((_ extract 7 0) (bvand .cse0 ((_ zero_extend 24) ((_ extract 7 0) (bvand (_ bv1 32) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_167_arg_0~0#1_10|)))))) (_ bv0 8)))) (.cse39 (forall ((|v_ULTIMATE.start_main_~var_177_arg_1~0#1_10| (_ BitVec 8))) (not (= ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse139 ((_ zero_extend 24) ((_ extract 7 0) (bvxor .cse138 ((_ zero_extend 24) ((_ extract 7 0) (bvxor .cse138 ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_177_arg_1~0#1_10|)))))))))))))) .cse140))))) (let ((.cse36 (forall ((|v_ULTIMATE.start_main_~var_176_arg_1~0#1_10| (_ BitVec 8))) (not (= ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvxor ((_ zero_extend 24) ((_ extract 7 0) (bvxor .cse138 ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_176_arg_1~0#1_10|)))))))))) .cse138))) .cse139))) .cse140)))) (.cse16 (forall ((|v_ULTIMATE.start_main_~var_167_arg_0~0#1_10| (_ BitVec 8))) (not (= ((_ extract 7 0) (bvand .cse0 ((_ zero_extend 24) ((_ extract 7 0) (bvand (_ bv1 32) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_167_arg_0~0#1_10|)))))) (_ bv0 8))))) (.cse63 (forall ((|v_ULTIMATE.start_main_~var_175_arg_1~0#1_10| (_ BitVec 8))) (not (= ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvxor ((_ zero_extend 24) ((_ extract 7 0) (bvxor .cse138 ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_175_arg_1~0#1_10|)))))))))))) .cse138))) .cse139))) .cse140)))) (.cse141 (or .cse27 .cse39)) (.cse59 (forall ((|v_ULTIMATE.start_main_~var_164_arg_0~0#1_10| (_ BitVec 8))) (= ((_ extract 7 0) (bvand .cse0 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_164_arg_0~0#1_10|) (_ bv1 32)))))) (_ bv0 8)))) (.cse60 (forall ((|v_ULTIMATE.start_main_~var_178_arg_1~0#1_10| (_ BitVec 8))) (not (= .cse140 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvxor .cse138 ((_ zero_extend 24) ((_ extract 7 0) (bvxor .cse138 ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_178_arg_1~0#1_10|))))))))) .cse139)))))))) (let ((.cse66 (forall ((|v_ULTIMATE.start_main_~var_164_arg_0~0#1_10| (_ BitVec 8))) (not (= ((_ extract 7 0) (bvand .cse0 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_164_arg_0~0#1_10|) (_ bv1 32)))))) (_ bv0 8))))) (.cse78 (or .cse59 .cse60)) (.cse67 (and (or .cse16 .cse63) .cse141)) (.cse116 (and .cse141 (or .cse16 .cse36))) (.cse21 (forall ((|v_ULTIMATE.start_main_~var_170_arg_0~0#1_10| (_ BitVec 8))) (not (= ((_ extract 7 0) (bvand .cse0 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_170_arg_0~0#1_10|) (_ bv1 32)))))) (_ bv0 8))))) (.cse25 (forall ((|v_ULTIMATE.start_main_~var_170_arg_0~0#1_10| (_ BitVec 8))) (= ((_ extract 7 0) (bvand .cse0 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_170_arg_0~0#1_10|) (_ bv1 32)))))) (_ bv0 8)))) (.cse61 (and .cse27 .cse16)) (.cse32 (bvneg |c_ULTIMATE.start_main_~var_42~0#1|)) (.cse33 ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_20~0#1|)) (.cse34 ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_18~0#1|))) (let ((.cse19 (not (= ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvxor .cse138 ((_ zero_extend 24) ((_ extract 7 0) (bvxor .cse138 ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse139 ((_ zero_extend 24) ((_ extract 7 0) (bvxor ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_12~0#1|) .cse138)))))))))))))))))))) .cse139))) .cse140))) (.cse70 (forall ((|v_ULTIMATE.start_main_~var_44_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse136 (bvand (bvor .cse34 (bvshl |v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse137 (bvand (bvadd (bvmul (bvand (bvor .cse33 (bvshl |v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_37~0#1|) .cse136) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_44_arg_1~0#1_10|) .cse136) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse136 (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_74_arg_1~0#1_10|)) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse32 .cse137) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (= |c_ULTIMATE.start_main_~var_56~0#1| .cse137) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd |c_ULTIMATE.start_main_~var_42~0#1| .cse137))))))))) (.cse71 (forall ((|v_ULTIMATE.start_main_~var_44_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse134 (bvand (bvor .cse34 (bvshl |v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse135 (bvand (bvadd (bvmul (bvand (bvor .cse33 (bvshl |v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_37~0#1|) .cse134) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse134 (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_74_arg_1~0#1_10|)) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse32 .cse135) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_44_arg_1~0#1_10|) .cse134) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (= |c_ULTIMATE.start_main_~var_56~0#1| .cse135) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd |c_ULTIMATE.start_main_~var_42~0#1| .cse135))))))))) (.cse62 (and (or .cse61 .cse21) (or .cse25 .cse61))) (.cse55 (and (or .cse67 .cse21) (or .cse116 .cse25))) (.cse26 (and (or .cse66 .cse36) .cse78)) (.cse28 (and (or .cse66 .cse39) .cse78))) (let ((.cse13 (forall ((|v_ULTIMATE.start_main_~var_44_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse133 (bvand (bvor .cse34 (bvshl |v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse132 (bvand (bvadd (bvmul (bvand (bvor .cse33 (bvshl |v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_37~0#1|) .cse133) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (not (= |c_ULTIMATE.start_main_~var_56~0#1| .cse132)) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse133 (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_74_arg_1~0#1_10|)) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse32 .cse132) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_44_arg_1~0#1_10|) .cse133) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd |c_ULTIMATE.start_main_~var_42~0#1| .cse132))))))))) (.cse8 (forall ((|v_ULTIMATE.start_main_~var_44_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse130 (bvand (bvor .cse34 (bvshl |v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse131 (bvand (bvadd (bvmul (bvand (bvor .cse33 (bvshl |v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_37~0#1|) .cse130) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_44_arg_1~0#1_10|) .cse130) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (not (= |c_ULTIMATE.start_main_~var_56~0#1| .cse131)) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse130 (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_74_arg_1~0#1_10|)) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse32 .cse131) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd |c_ULTIMATE.start_main_~var_42~0#1| .cse131))))))))) (.cse14 (forall ((|v_ULTIMATE.start_main_~var_44_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse128 (bvand (bvor .cse34 (bvshl |v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse129 (bvand (bvadd (bvmul (bvand (bvor .cse33 (bvshl |v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_37~0#1|) .cse128) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_44_arg_1~0#1_10|) .cse128) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd |c_ULTIMATE.start_main_~var_42~0#1| .cse129))) (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse128 (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_74_arg_1~0#1_10|)) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (not (= |c_ULTIMATE.start_main_~var_56~0#1| .cse129)) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse32 .cse129) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)))))))) (.cse23 (forall ((|v_ULTIMATE.start_main_~var_44_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse126 (bvand (bvor .cse34 (bvshl |v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse127 (bvand (bvadd (bvmul (bvand (bvor .cse33 (bvshl |v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_37~0#1|) .cse126) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_44_arg_1~0#1_10|) .cse126) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse126 (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_74_arg_1~0#1_10|)) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (not (= |c_ULTIMATE.start_main_~var_56~0#1| .cse127)) (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse32 .cse127) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd |c_ULTIMATE.start_main_~var_42~0#1| .cse127))))))))) (.cse7 (let ((.cse125 (or .cse27 .cse28))) (and (or (and .cse125 (or .cse16 (and .cse78 (or .cse66 .cse63)))) .cse21) (or (and .cse125 (or .cse16 .cse26)) .cse25)))) (.cse43 (forall ((|v_ULTIMATE.start_main_~var_44_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse123 (bvand (bvor .cse34 (bvshl |v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse124 (bvand (bvadd (bvmul (bvand (bvor .cse33 (bvshl |v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_37~0#1|) .cse123) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_44_arg_1~0#1_10|) .cse123) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd |c_ULTIMATE.start_main_~var_42~0#1| .cse124))) (not (= |c_ULTIMATE.start_main_~var_56~0#1| .cse124)) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse123 (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_74_arg_1~0#1_10|)) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse32 .cse124) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))))))) (.cse10 (forall ((|v_ULTIMATE.start_main_~var_44_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse121 (bvand (bvor .cse34 (bvshl |v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse122 (bvand (bvadd (bvmul (bvand (bvor .cse33 (bvshl |v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_37~0#1|) .cse121) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_44_arg_1~0#1_10|) .cse121) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse121 (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_74_arg_1~0#1_10|)) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (not (= |c_ULTIMATE.start_main_~var_56~0#1| .cse122)) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse32 .cse122) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd |c_ULTIMATE.start_main_~var_42~0#1| .cse122))))))))) (.cse42 (forall ((|v_ULTIMATE.start_main_~var_44_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse120 (bvand (bvor .cse34 (bvshl |v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse119 (bvand (bvadd (bvmul (bvand (bvor .cse33 (bvshl |v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_37~0#1|) .cse120) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd |c_ULTIMATE.start_main_~var_42~0#1| .cse119))) (not (= |c_ULTIMATE.start_main_~var_56~0#1| .cse119)) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse120 (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_74_arg_1~0#1_10|)) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse32 .cse119) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_44_arg_1~0#1_10|) .cse120) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)))))))) (.cse4 (and (or .cse62 .cse59 .cse60) (or .cse55 .cse66))) (.cse22 (forall ((|v_ULTIMATE.start_main_~var_44_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse117 (bvand (bvor .cse34 (bvshl |v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse118 (bvand (bvadd (bvmul (bvand (bvor .cse33 (bvshl |v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_37~0#1|) .cse117) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse117 (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_74_arg_1~0#1_10|)) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (not (= |c_ULTIMATE.start_main_~var_56~0#1| .cse118)) (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse32 .cse118) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_44_arg_1~0#1_10|) .cse117) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd |c_ULTIMATE.start_main_~var_42~0#1| .cse118))))))))) (.cse12 (let ((.cse115 (or .cse61 .cse59 .cse60))) (and (or (and .cse115 (or .cse67 .cse66)) .cse21) (or .cse25 (and (or .cse116 .cse66) .cse115))))) (.cse6 (forall ((|v_ULTIMATE.start_main_~var_44_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse114 (bvand (bvor .cse34 (bvshl |v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse113 (bvand (bvadd (bvmul (bvand (bvor .cse33 (bvshl |v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_37~0#1|) .cse114) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd |c_ULTIMATE.start_main_~var_42~0#1| .cse113))) (not (= |c_ULTIMATE.start_main_~var_56~0#1| .cse113)) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse114 (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_74_arg_1~0#1_10|)) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse32 .cse113) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_44_arg_1~0#1_10|) .cse114) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)))))))) (.cse9 (forall ((|v_ULTIMATE.start_main_~var_44_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse111 (bvand (bvor .cse34 (bvshl |v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse112 (bvand (bvadd (bvmul (bvand (bvor .cse33 (bvshl |v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_37~0#1|) .cse111) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_44_arg_1~0#1_10|) .cse111) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd |c_ULTIMATE.start_main_~var_42~0#1| .cse112))) (not (= |c_ULTIMATE.start_main_~var_56~0#1| .cse112)) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse111 (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_74_arg_1~0#1_10|)) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse32 .cse112) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)))))))) (.cse5 (forall ((|v_ULTIMATE.start_main_~var_44_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse110 (bvand (bvor .cse34 (bvshl |v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse109 (bvand (bvadd (bvmul (bvand (bvor .cse33 (bvshl |v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_37~0#1|) .cse110) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd |c_ULTIMATE.start_main_~var_42~0#1| .cse109))) (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse110 (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_74_arg_1~0#1_10|)) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (not (= |c_ULTIMATE.start_main_~var_56~0#1| .cse109)) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse32 .cse109) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_44_arg_1~0#1_10|) .cse110) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)))))))) (.cse35 (forall ((|v_ULTIMATE.start_main_~var_44_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse107 (bvand (bvor .cse34 (bvshl |v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse108 (bvand (bvadd (bvmul (bvand (bvor .cse33 (bvshl |v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_37~0#1|) .cse107) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_44_arg_1~0#1_10|) .cse107) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse107 (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_74_arg_1~0#1_10|)) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse32 .cse108) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (= |c_ULTIMATE.start_main_~var_56~0#1| .cse108) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd |c_ULTIMATE.start_main_~var_42~0#1| .cse108))))))))) (.cse53 (forall ((|v_ULTIMATE.start_main_~var_44_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse106 (bvand (bvor .cse34 (bvshl |v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse105 (bvand (bvadd (bvmul (bvand (bvor .cse33 (bvshl |v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_37~0#1|) .cse106) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd |c_ULTIMATE.start_main_~var_42~0#1| .cse105))) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse106 (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_74_arg_1~0#1_10|)) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse32 .cse105) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_44_arg_1~0#1_10|) .cse106) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (= |c_ULTIMATE.start_main_~var_56~0#1| .cse105)))))) (.cse37 (forall ((|v_ULTIMATE.start_main_~var_44_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse103 (bvand (bvor .cse34 (bvshl |v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse104 (bvand (bvadd (bvmul (bvand (bvor .cse33 (bvshl |v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_37~0#1|) .cse103) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse103 (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_74_arg_1~0#1_10|)) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse32 .cse104) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_44_arg_1~0#1_10|) .cse103) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (= |c_ULTIMATE.start_main_~var_56~0#1| .cse104) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd |c_ULTIMATE.start_main_~var_42~0#1| .cse104))))))))) (.cse54 (forall ((|v_ULTIMATE.start_main_~var_44_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse101 (bvand (bvor .cse34 (bvshl |v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse102 (bvand (bvadd (bvmul (bvand (bvor .cse33 (bvshl |v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_37~0#1|) .cse101) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_44_arg_1~0#1_10|) .cse101) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd |c_ULTIMATE.start_main_~var_42~0#1| .cse102))) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse101 (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_74_arg_1~0#1_10|)) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse32 .cse102) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (= |c_ULTIMATE.start_main_~var_56~0#1| .cse102)))))) (.cse48 (forall ((|v_ULTIMATE.start_main_~var_44_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse100 (bvand (bvor .cse34 (bvshl |v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse99 (bvand (bvadd (bvmul (bvand (bvor .cse33 (bvshl |v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_37~0#1|) .cse100) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd |c_ULTIMATE.start_main_~var_42~0#1| .cse99))) (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse100 (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_74_arg_1~0#1_10|)) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse32 .cse99) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_44_arg_1~0#1_10|) .cse100) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (= |c_ULTIMATE.start_main_~var_56~0#1| .cse99)))))) (.cse15 (forall ((|v_ULTIMATE.start_main_~var_173_arg_0~0#1_10| (_ BitVec 8))) (= ((_ extract 7 0) (bvand .cse0 ((_ zero_extend 24) ((_ extract 7 0) (bvand (_ bv1 32) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_173_arg_0~0#1_10|)))))) (_ bv0 8)))) (.cse64 (forall ((|v_ULTIMATE.start_main_~var_44_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse97 (bvand (bvor .cse34 (bvshl |v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse98 (bvand (bvadd (bvmul (bvand (bvor .cse33 (bvshl |v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_37~0#1|) .cse97) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_44_arg_1~0#1_10|) .cse97) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd |c_ULTIMATE.start_main_~var_42~0#1| .cse98))) (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse97 (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_74_arg_1~0#1_10|)) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse32 .cse98) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (= |c_ULTIMATE.start_main_~var_56~0#1| .cse98)))))) (.cse11 (forall ((|v_ULTIMATE.start_main_~var_44_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse95 (bvand (bvor .cse34 (bvshl |v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse96 (bvand (bvadd (bvmul (bvand (bvor .cse33 (bvshl |v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_37~0#1|) .cse95) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse95 (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_74_arg_1~0#1_10|)) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (not (= |c_ULTIMATE.start_main_~var_56~0#1| .cse96)) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse32 .cse96) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_44_arg_1~0#1_10|) .cse95) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd |c_ULTIMATE.start_main_~var_42~0#1| .cse96))))))))) (.cse41 (forall ((|v_ULTIMATE.start_main_~var_44_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse93 (bvand (bvor .cse34 (bvshl |v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse94 (bvand (bvadd (bvmul (bvand (bvor .cse33 (bvshl |v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_37~0#1|) .cse93) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_44_arg_1~0#1_10|) .cse93) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd |c_ULTIMATE.start_main_~var_42~0#1| .cse94))) (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse93 (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_74_arg_1~0#1_10|)) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (not (= |c_ULTIMATE.start_main_~var_56~0#1| .cse94)) (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse32 .cse94) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))))))) (.cse40 (forall ((|v_ULTIMATE.start_main_~var_44_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse92 (bvand (bvor .cse34 (bvshl |v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse91 (bvand (bvadd (bvmul (bvand (bvor .cse33 (bvshl |v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_37~0#1|) .cse92) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd |c_ULTIMATE.start_main_~var_42~0#1| .cse91))) (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse92 (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_74_arg_1~0#1_10|)) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (not (= |c_ULTIMATE.start_main_~var_56~0#1| .cse91)) (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse32 .cse91) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_44_arg_1~0#1_10|) .cse92) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)))))))) (.cse45 (forall ((|v_ULTIMATE.start_main_~var_44_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse89 (bvand (bvor .cse34 (bvshl |v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse90 (bvand (bvadd (bvmul (bvand (bvor .cse33 (bvshl |v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_37~0#1|) .cse89) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_44_arg_1~0#1_10|) .cse89) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse89 (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_74_arg_1~0#1_10|)) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse32 .cse90) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (= |c_ULTIMATE.start_main_~var_56~0#1| .cse90) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd |c_ULTIMATE.start_main_~var_42~0#1| .cse90))))))))) (.cse56 (forall ((|v_ULTIMATE.start_main_~var_44_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse87 (bvand (bvor .cse34 (bvshl |v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse88 (bvand (bvadd (bvmul (bvand (bvor .cse33 (bvshl |v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_37~0#1|) .cse87) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse87 (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_74_arg_1~0#1_10|)) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse32 .cse88) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_44_arg_1~0#1_10|) .cse87) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (= |c_ULTIMATE.start_main_~var_56~0#1| .cse88) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd |c_ULTIMATE.start_main_~var_42~0#1| .cse88))))))))) (.cse47 (forall ((|v_ULTIMATE.start_main_~var_44_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse85 (bvand (bvor .cse34 (bvshl |v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse86 (bvand (bvadd (bvmul (bvand (bvor .cse33 (bvshl |v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_37~0#1|) .cse85) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_44_arg_1~0#1_10|) .cse85) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (not (= |c_ULTIMATE.start_main_~var_56~0#1| .cse86)) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse85 (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_74_arg_1~0#1_10|)) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse32 .cse86) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd |c_ULTIMATE.start_main_~var_42~0#1| .cse86))))))))) (.cse49 (forall ((|v_ULTIMATE.start_main_~var_44_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse84 (bvand (bvor .cse34 (bvshl |v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse83 (bvand (bvadd (bvmul (bvand (bvor .cse33 (bvshl |v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_37~0#1|) .cse84) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (not (= |c_ULTIMATE.start_main_~var_56~0#1| .cse83)) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse84 (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_74_arg_1~0#1_10|)) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse32 .cse83) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_44_arg_1~0#1_10|) .cse84) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd |c_ULTIMATE.start_main_~var_42~0#1| .cse83))))))))) (.cse29 (forall ((|v_ULTIMATE.start_main_~var_173_arg_0~0#1_10| (_ BitVec 8))) (not (= ((_ extract 7 0) (bvand .cse0 ((_ zero_extend 24) ((_ extract 7 0) (bvand (_ bv1 32) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_173_arg_0~0#1_10|)))))) (_ bv0 8))))) (.cse72 (or .cse27 (and (or .cse39 .cse70) (or .cse28 .cse71)))) (.cse52 (forall ((|v_ULTIMATE.start_main_~var_44_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse81 (bvand (bvor .cse34 (bvshl |v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse82 (bvand (bvadd (bvmul (bvand (bvor .cse33 (bvshl |v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_37~0#1|) .cse81) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_44_arg_1~0#1_10|) .cse81) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse81 (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_74_arg_1~0#1_10|)) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse32 .cse82) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (= |c_ULTIMATE.start_main_~var_56~0#1| .cse82) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd |c_ULTIMATE.start_main_~var_42~0#1| .cse82))))))))) (.cse51 (forall ((|v_ULTIMATE.start_main_~var_44_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse79 (bvand (bvor .cse34 (bvshl |v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse80 (bvand (bvadd (bvmul (bvand (bvor .cse33 (bvshl |v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_37~0#1|) .cse79) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse79 (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_74_arg_1~0#1_10|)) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse32 .cse80) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_44_arg_1~0#1_10|) .cse79) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (= |c_ULTIMATE.start_main_~var_56~0#1| .cse80) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd |c_ULTIMATE.start_main_~var_42~0#1| .cse80))))))))) (.cse17 (and .cse78 (or .cse66 .cse19))) (.cse20 (forall ((|v_ULTIMATE.start_main_~var_44_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse76 (bvand (bvor .cse34 (bvshl |v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse77 (bvand (bvadd (bvmul (bvand (bvor .cse33 (bvshl |v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_37~0#1|) .cse76) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_44_arg_1~0#1_10|) .cse76) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd |c_ULTIMATE.start_main_~var_42~0#1| .cse77))) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse76 (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_74_arg_1~0#1_10|)) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse32 .cse77) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (= |c_ULTIMATE.start_main_~var_56~0#1| .cse77)))))) (.cse18 (forall ((|v_ULTIMATE.start_main_~var_44_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse75 (bvand (bvor .cse34 (bvshl |v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse74 (bvand (bvadd (bvmul (bvand (bvor .cse33 (bvshl |v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_37~0#1|) .cse75) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd |c_ULTIMATE.start_main_~var_42~0#1| .cse74))) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse75 (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_74_arg_1~0#1_10|)) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse32 .cse74) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_44_arg_1~0#1_10|) .cse75) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (= |c_ULTIMATE.start_main_~var_56~0#1| .cse74))))))) (and (or (and (or .cse4 .cse5) (or .cse4 .cse6) (or .cse7 .cse8) (or .cse9 .cse7) (or .cse7 .cse10) (or .cse11 .cse12) (or .cse4 .cse13) (or .cse7 .cse14)) .cse15) (or .cse16 (and (or .cse17 .cse18) (or .cse19 .cse20))) (or (let ((.cse24 (or .cse27 (and (or .cse22 .cse28) (or .cse28 .cse23))))) (and (or .cse21 (and (or (and (or .cse22 .cse17) (or .cse17 .cse23)) .cse16) .cse24)) (or .cse25 (and (or .cse16 (and (or .cse22 .cse26) (or .cse23 .cse26))) .cse24)))) .cse29) (or (forall ((|v_ULTIMATE.start_main_~var_44_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse31 (bvand (bvor .cse34 (bvshl |v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse30 (bvand (bvadd (bvmul (bvand (bvor .cse33 (bvshl |v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_37~0#1|) .cse31) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd |c_ULTIMATE.start_main_~var_42~0#1| .cse30))) (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse31 (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_74_arg_1~0#1_10|)) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse32 .cse30) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_44_arg_1~0#1_10|) .cse31) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (= |c_ULTIMATE.start_main_~var_56~0#1| .cse30))))) .cse17) (or .cse25 .cse16 .cse10 .cse29 .cse26) (or (let ((.cse38 (or .cse27 (and (or .cse35 .cse39) (or .cse37 .cse28))))) (and (or .cse25 (and (or .cse16 (and (or .cse35 .cse36) (or .cse37 .cse26))) .cse38)) (or .cse21 (and .cse38 (or .cse16 (and (or .cse35 .cse19) (or .cse17 .cse37))))))) .cse29) (or .cse27 .cse25 .cse28 .cse40 .cse29) (or .cse17 .cse16 .cse14 .cse21 .cse29) (or .cse27 .cse25 .cse41 .cse28 .cse29) (or .cse25 .cse16 .cse11 .cse29 .cse26) (or .cse29 (let ((.cse44 (or .cse27 (and (or .cse42 .cse28) (or .cse28 .cse43))))) (and (or .cse25 (and (or .cse16 (and (or .cse42 .cse26) (or .cse43 .cse26))) .cse44)) (or (and (or .cse16 (and (or .cse17 .cse43) (or .cse42 .cse17))) .cse44) .cse21)))) (or .cse27 .cse25 .cse14 .cse28 .cse29) (or .cse25 .cse45 .cse29 .cse36) (or .cse17 .cse16 .cse10 .cse21 .cse29) (or .cse25 .cse16 (and (or .cse5 .cse26) (or .cse14 .cse26)) .cse29) (or (let ((.cse46 (or .cse27 (and (or .cse13 .cse28) (or .cse8 .cse28))))) (and (or .cse21 (and .cse46 (or .cse16 (and (or .cse17 .cse13) (or .cse17 .cse8))))) (or (and (or .cse16 (and (or .cse8 .cse26) (or .cse13 .cse26))) .cse46) .cse25))) .cse29) (or .cse27 .cse10 .cse21 .cse28 .cse29) (or .cse27 .cse14 .cse21 .cse28 .cse29) (or (and (or .cse7 .cse23) (or .cse7 .cse41) (or .cse7 .cse47) (or .cse7 .cse43)) .cse15) (or .cse17 .cse48 .cse29) (or .cse27 .cse25 .cse10 .cse28 .cse29) (or .cse17 .cse16 .cse21 .cse11 .cse29) (or .cse27 .cse25 .cse28 .cse29 .cse5) (or (and (or .cse42 .cse4) (or .cse4 .cse49) (or .cse4 .cse40) (or .cse22 .cse12)) .cse15) (or .cse27 .cse21 .cse28 .cse29 .cse5) (or (let ((.cse50 (or .cse27 (and (or .cse6 .cse28) (or .cse9 .cse28))))) (and (or (and .cse50 (or (and (or .cse6 .cse26) (or .cse9 .cse26)) .cse16)) .cse25) (or (and .cse50 (or .cse16 (and (or .cse17 .cse6) (or .cse9 .cse17)))) .cse21))) .cse29) (or .cse27 .cse21 .cse28 .cse11 .cse29) (or .cse17 .cse16 .cse21 .cse29 .cse5) (or .cse25 (and (or .cse51 .cse26) (or .cse52 .cse36))) (or (and (or (and (or .cse28 .cse53) (or .cse39 .cse54)) .cse27) (or .cse16 (and (or .cse19 .cse54) (or .cse17 .cse53)))) .cse29) (or (and (or .cse40 .cse26) (or .cse41 .cse26)) .cse25 .cse16 .cse29) (or (let ((.cse65 (and (or .cse63 .cse21) (or .cse25 .cse36)))) (and (or .cse35 .cse55) (or (and (or (and .cse25 .cse21) .cse56) (forall ((|v_ULTIMATE.start_main_~var_44_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse58 (bvand (bvor .cse34 (bvshl |v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (forall ((|v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse57 (bvand (bvadd (bvmul (bvand (bvor .cse33 (bvshl |v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_37~0#1|) .cse58) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd |c_ULTIMATE.start_main_~var_42~0#1| .cse57))) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse32 .cse57) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (= |c_ULTIMATE.start_main_~var_56~0#1| .cse57)))) (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse58 (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_74_arg_1~0#1_10|)) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (not (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_44_arg_1~0#1_10|) .cse58) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))))))) .cse59 .cse60) (or .cse59 (and (or .cse61 .cse53) (or .cse62 .cse37)) .cse60) (or .cse63 .cse64) (or .cse45 .cse65) (or .cse66 (and (or .cse67 .cse53) (or .cse55 .cse37))) (or .cse67 .cse54) (or .cse66 (and (or .cse48 .cse63) (or .cse65 .cse56))))) .cse15) (or .cse19 .cse64 .cse29) (or (forall ((|v_ULTIMATE.start_main_~var_44_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ BitVec 32)) (|v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ BitVec 32))) (let ((.cse68 (bvand (bvor .cse34 (bvshl |v_ULTIMATE.start_main_~var_36_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (let ((.cse69 (bvand (bvadd (bvmul (bvand (bvor .cse33 (bvshl |v_ULTIMATE.start_main_~var_38_arg_0~0#1_10| (_ bv8 32))) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|) |c_ULTIMATE.start_main_~var_37~0#1|) .cse68) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|))) (or (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_44_arg_1~0#1_10|) .cse68) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_4~0#1| (bvadd |c_ULTIMATE.start_main_~var_42~0#1| .cse69))) (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse68 (bvmul |c_ULTIMATE.start_main_~var_37~0#1| |v_ULTIMATE.start_main_~var_74_arg_1~0#1_10|)) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (= |c_ULTIMATE.start_main_~var_56~0#1| (bvand (bvadd .cse32 .cse69) |c_ULTIMATE.start_main_~mask_SORT_4~0#1|)) (= |c_ULTIMATE.start_main_~var_56~0#1| .cse69))))) .cse19) (or .cse25 .cse56 .cse29 .cse26) (or .cse27 .cse25 .cse28 .cse11 .cse29) (or .cse21 (and (or .cse27 (and (or .cse41 .cse28) (or .cse28 .cse40))) (or .cse16 (and (or .cse17 .cse41) (or .cse17 .cse40)))) .cse29) (or .cse19 .cse21 .cse45 .cse29) (or .cse17 .cse21 .cse56 .cse29) (or .cse25 (and (or .cse16 (and (or .cse70 .cse36) (or .cse71 .cse26))) .cse72)) (or (let ((.cse73 (or (and (or .cse47 .cse28) (or .cse28 .cse49)) .cse27))) (and (or .cse21 (and .cse73 (or .cse16 (and (or .cse17 .cse49) (or .cse17 .cse47))))) (or .cse25 (and (or .cse16 (and (or .cse49 .cse26) (or .cse47 .cse26))) .cse73)))) .cse29) (or .cse21 (and .cse72 (or (and (or .cse19 .cse70) (or .cse17 .cse71)) .cse16))) (or (and (or .cse19 .cse52) (or .cse51 .cse17)) .cse21) (or .cse27 (and (or .cse39 .cse20) (or .cse18 .cse28)))))))))))) is different from true [2022-11-23 15:51:23,471 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 5 not checked. [2022-11-23 15:51:23,472 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-23 15:51:23,472 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [864497015] [2022-11-23 15:51:23,472 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [864497015] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-23 15:51:23,472 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1563477636] [2022-11-23 15:51:23,473 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-23 15:51:23,473 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-23 15:51:23,473 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/cvc4 [2022-11-23 15:51:23,478 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-23 15:51:23,481 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cab8fdd8-b829-436b-bb60-412a61eb92ae/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt (7)] Waiting until timeout for monitored process [2022-11-23 15:51:25,065 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-23 15:51:25,065 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-23 15:51:25,129 INFO L263 TraceCheckSpWp]: Trace formula consists of 1669 conjuncts, 194 conjunts are in the unsatisfiable core [2022-11-23 15:51:25,142 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 15:52:32,204 WARN L233 SmtUtils]: Spent 1.05m on a formula simplification. DAG size of input: 187 DAG size of output: 170 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-23 15:52:34,882 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-23 15:52:34,883 INFO L328 TraceCheckSpWp]: Computing backward predicates...