./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.safe_intersymbol_analog_estimation_convergence.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 4e7fbc69 Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.safe_intersymbol_analog_estimation_convergence.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/config/svcomp-Reach-64bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash df7f37b318c8d1f9d7b6d8bdd6b9d05156ce656d1a634258cfc85f6ce0601b19 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-4e7fbc6 [2022-11-23 16:11:03,139 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-23 16:11:03,142 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-23 16:11:03,185 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-23 16:11:03,185 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-23 16:11:03,186 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-23 16:11:03,187 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-23 16:11:03,189 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-23 16:11:03,190 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-23 16:11:03,191 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-23 16:11:03,192 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-23 16:11:03,193 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-23 16:11:03,194 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-23 16:11:03,195 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-23 16:11:03,196 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-23 16:11:03,197 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-23 16:11:03,198 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-23 16:11:03,201 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-23 16:11:03,203 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-23 16:11:03,210 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-23 16:11:03,213 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-23 16:11:03,219 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-23 16:11:03,221 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-23 16:11:03,222 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-23 16:11:03,232 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-23 16:11:03,232 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-23 16:11:03,232 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-23 16:11:03,233 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-23 16:11:03,234 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-23 16:11:03,235 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-23 16:11:03,235 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-23 16:11:03,236 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-23 16:11:03,237 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-23 16:11:03,238 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-23 16:11:03,239 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-23 16:11:03,239 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-23 16:11:03,240 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-23 16:11:03,240 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-23 16:11:03,240 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-23 16:11:03,241 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-23 16:11:03,245 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-23 16:11:03,247 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/config/svcomp-Reach-64bit-Taipan_Default.epf [2022-11-23 16:11:03,289 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-23 16:11:03,289 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-23 16:11:03,290 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-23 16:11:03,290 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-23 16:11:03,291 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-23 16:11:03,291 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-23 16:11:03,291 INFO L138 SettingsManager]: * User list type=DISABLED [2022-11-23 16:11:03,291 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-11-23 16:11:03,292 INFO L138 SettingsManager]: * Explicit value domain=true [2022-11-23 16:11:03,292 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2022-11-23 16:11:03,293 INFO L138 SettingsManager]: * Octagon Domain=false [2022-11-23 16:11:03,293 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-11-23 16:11:03,293 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2022-11-23 16:11:03,293 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2022-11-23 16:11:03,294 INFO L138 SettingsManager]: * Interval Domain=false [2022-11-23 16:11:03,294 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2022-11-23 16:11:03,294 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2022-11-23 16:11:03,294 INFO L138 SettingsManager]: * Simplification Technique=POLY_PAC [2022-11-23 16:11:03,295 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-23 16:11:03,296 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-23 16:11:03,296 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-23 16:11:03,296 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-23 16:11:03,296 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-23 16:11:03,296 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-23 16:11:03,296 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-23 16:11:03,297 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-23 16:11:03,297 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-23 16:11:03,297 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-23 16:11:03,297 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-23 16:11:03,297 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-23 16:11:03,297 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-23 16:11:03,298 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2022-11-23 16:11:03,299 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-23 16:11:03,299 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-23 16:11:03,300 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2022-11-23 16:11:03,300 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-11-23 16:11:03,300 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-23 16:11:03,300 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-11-23 16:11:03,300 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> df7f37b318c8d1f9d7b6d8bdd6b9d05156ce656d1a634258cfc85f6ce0601b19 [2022-11-23 16:11:03,578 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-23 16:11:03,599 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-23 16:11:03,602 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-23 16:11:03,603 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-23 16:11:03,606 INFO L275 PluginConnector]: CDTParser initialized [2022-11-23 16:11:03,608 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.safe_intersymbol_analog_estimation_convergence.c [2022-11-23 16:11:06,607 INFO L500 CDTParser]: Created temporary CDT project at NULL [2022-11-23 16:11:06,870 INFO L351 CDTParser]: Found 1 translation units. [2022-11-23 16:11:06,871 INFO L172 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.safe_intersymbol_analog_estimation_convergence.c [2022-11-23 16:11:06,904 INFO L394 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/data/340473ddf/4e9dba21dfb94245996d6f456daa4f4c/FLAG426ffe39f [2022-11-23 16:11:06,921 INFO L402 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/data/340473ddf/4e9dba21dfb94245996d6f456daa4f4c [2022-11-23 16:11:06,923 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-23 16:11:06,924 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-23 16:11:06,926 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-23 16:11:06,926 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-23 16:11:06,931 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-23 16:11:06,932 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 04:11:06" (1/1) ... [2022-11-23 16:11:06,933 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@346f3a8a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:11:06, skipping insertion in model container [2022-11-23 16:11:06,933 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 04:11:06" (1/1) ... [2022-11-23 16:11:06,942 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-23 16:11:06,983 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-23 16:11:07,125 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.safe_intersymbol_analog_estimation_convergence.c[1132,1145] [2022-11-23 16:11:07,344 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-23 16:11:07,356 INFO L203 MainTranslator]: Completed pre-run [2022-11-23 16:11:07,365 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.safe_intersymbol_analog_estimation_convergence.c[1132,1145] [2022-11-23 16:11:07,485 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-23 16:11:07,498 INFO L208 MainTranslator]: Completed translation [2022-11-23 16:11:07,498 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:11:07 WrapperNode [2022-11-23 16:11:07,498 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-23 16:11:07,500 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-23 16:11:07,500 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-23 16:11:07,500 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-23 16:11:07,516 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:11:07" (1/1) ... [2022-11-23 16:11:07,545 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:11:07" (1/1) ... [2022-11-23 16:11:07,607 INFO L138 Inliner]: procedures = 11, calls = 5, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 639 [2022-11-23 16:11:07,607 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-23 16:11:07,608 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-23 16:11:07,608 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-23 16:11:07,608 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-23 16:11:07,619 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:11:07" (1/1) ... [2022-11-23 16:11:07,619 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:11:07" (1/1) ... [2022-11-23 16:11:07,630 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:11:07" (1/1) ... [2022-11-23 16:11:07,630 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:11:07" (1/1) ... [2022-11-23 16:11:07,677 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:11:07" (1/1) ... [2022-11-23 16:11:07,681 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:11:07" (1/1) ... [2022-11-23 16:11:07,702 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:11:07" (1/1) ... [2022-11-23 16:11:07,707 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:11:07" (1/1) ... [2022-11-23 16:11:07,735 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-23 16:11:07,736 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-23 16:11:07,736 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-23 16:11:07,736 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-23 16:11:07,737 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:11:07" (1/1) ... [2022-11-23 16:11:07,745 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-23 16:11:07,756 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/z3 [2022-11-23 16:11:07,774 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-23 16:11:07,802 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-23 16:11:07,824 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-23 16:11:07,824 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-23 16:11:07,824 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2022-11-23 16:11:07,825 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2022-11-23 16:11:08,106 INFO L235 CfgBuilder]: Building ICFG [2022-11-23 16:11:08,108 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-23 16:11:12,857 INFO L276 CfgBuilder]: Performing block encoding [2022-11-23 16:11:12,887 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-23 16:11:12,887 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-23 16:11:12,890 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 04:11:12 BoogieIcfgContainer [2022-11-23 16:11:12,890 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-23 16:11:12,893 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-23 16:11:12,893 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-23 16:11:12,896 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-23 16:11:12,897 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 04:11:06" (1/3) ... [2022-11-23 16:11:12,897 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6b116743 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 04:11:12, skipping insertion in model container [2022-11-23 16:11:12,898 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:11:07" (2/3) ... [2022-11-23 16:11:12,898 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6b116743 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 04:11:12, skipping insertion in model container [2022-11-23 16:11:12,898 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 04:11:12" (3/3) ... [2022-11-23 16:11:12,900 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.safe_intersymbol_analog_estimation_convergence.c [2022-11-23 16:11:12,919 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-23 16:11:12,920 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-23 16:11:12,966 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-23 16:11:12,973 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@1343c001, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-23 16:11:12,973 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-23 16:11:12,977 INFO L276 IsEmpty]: Start isEmpty. Operand has 13 states, 8 states have (on average 1.375) internal successors, (11), 9 states have internal predecessors, (11), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-23 16:11:12,985 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2022-11-23 16:11:12,985 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 16:11:12,986 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-23 16:11:12,987 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-23 16:11:12,992 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 16:11:12,992 INFO L85 PathProgramCache]: Analyzing trace with hash 823453399, now seen corresponding path program 1 times [2022-11-23 16:11:13,002 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-23 16:11:13,003 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [118552923] [2022-11-23 16:11:13,003 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 16:11:13,004 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 16:11:18,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 16:11:18,979 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-23 16:11:22,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 16:11:22,219 INFO L130 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2022-11-23 16:11:22,223 INFO L359 BasicCegarLoop]: Counterexample is feasible [2022-11-23 16:11:22,224 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-11-23 16:11:22,227 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-11-23 16:11:22,232 INFO L444 BasicCegarLoop]: Path program histogram: [1] [2022-11-23 16:11:22,236 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-23 16:11:22,320 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-23 16:11:22,338 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 23.11 04:11:22 BoogieIcfgContainer [2022-11-23 16:11:22,339 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-23 16:11:22,339 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-23 16:11:22,340 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-23 16:11:22,340 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-23 16:11:22,340 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 04:11:12" (3/4) ... [2022-11-23 16:11:22,344 INFO L140 WitnessPrinter]: No result that supports witness generation found [2022-11-23 16:11:22,344 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-23 16:11:22,345 INFO L158 Benchmark]: Toolchain (without parser) took 15420.31ms. Allocated memory was 163.6MB in the beginning and 541.1MB in the end (delta: 377.5MB). Free memory was 115.3MB in the beginning and 417.4MB in the end (delta: -302.1MB). Peak memory consumption was 77.4MB. Max. memory is 16.1GB. [2022-11-23 16:11:22,346 INFO L158 Benchmark]: CDTParser took 0.32ms. Allocated memory is still 163.6MB. Free memory was 133.8MB in the beginning and 133.7MB in the end (delta: 80.9kB). There was no memory consumed. Max. memory is 16.1GB. [2022-11-23 16:11:22,346 INFO L158 Benchmark]: CACSL2BoogieTranslator took 572.82ms. Allocated memory is still 163.6MB. Free memory was 115.3MB in the beginning and 86.4MB in the end (delta: 28.9MB). Peak memory consumption was 29.4MB. Max. memory is 16.1GB. [2022-11-23 16:11:22,347 INFO L158 Benchmark]: Boogie Procedure Inliner took 107.83ms. Allocated memory is still 163.6MB. Free memory was 86.4MB in the beginning and 78.1MB in the end (delta: 8.4MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2022-11-23 16:11:22,347 INFO L158 Benchmark]: Boogie Preprocessor took 127.12ms. Allocated memory is still 163.6MB. Free memory was 78.1MB in the beginning and 73.9MB in the end (delta: 4.2MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. [2022-11-23 16:11:22,348 INFO L158 Benchmark]: RCFGBuilder took 5154.56ms. Allocated memory was 163.6MB in the beginning and 308.3MB in the end (delta: 144.7MB). Free memory was 73.9MB in the beginning and 236.2MB in the end (delta: -162.4MB). Peak memory consumption was 140.8MB. Max. memory is 16.1GB. [2022-11-23 16:11:22,349 INFO L158 Benchmark]: TraceAbstraction took 9446.30ms. Allocated memory was 308.3MB in the beginning and 541.1MB in the end (delta: 232.8MB). Free memory was 236.2MB in the beginning and 417.4MB in the end (delta: -181.2MB). Peak memory consumption was 288.8MB. Max. memory is 16.1GB. [2022-11-23 16:11:22,349 INFO L158 Benchmark]: Witness Printer took 4.59ms. Allocated memory is still 541.1MB. Free memory is still 417.4MB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-23 16:11:22,352 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.32ms. Allocated memory is still 163.6MB. Free memory was 133.8MB in the beginning and 133.7MB in the end (delta: 80.9kB). There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 572.82ms. Allocated memory is still 163.6MB. Free memory was 115.3MB in the beginning and 86.4MB in the end (delta: 28.9MB). Peak memory consumption was 29.4MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 107.83ms. Allocated memory is still 163.6MB. Free memory was 86.4MB in the beginning and 78.1MB in the end (delta: 8.4MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Preprocessor took 127.12ms. Allocated memory is still 163.6MB. Free memory was 78.1MB in the beginning and 73.9MB in the end (delta: 4.2MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. * RCFGBuilder took 5154.56ms. Allocated memory was 163.6MB in the beginning and 308.3MB in the end (delta: 144.7MB). Free memory was 73.9MB in the beginning and 236.2MB in the end (delta: -162.4MB). Peak memory consumption was 140.8MB. Max. memory is 16.1GB. * TraceAbstraction took 9446.30ms. Allocated memory was 308.3MB in the beginning and 541.1MB in the end (delta: 232.8MB). Free memory was 236.2MB in the beginning and 417.4MB in the end (delta: -181.2MB). Peak memory consumption was 288.8MB. Max. memory is 16.1GB. * Witness Printer took 4.59ms. Allocated memory is still 541.1MB. Free memory is still 417.4MB. There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation The program execution was not completely translated back. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 20]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: overapproximation of bitwiseOr at line 201, overapproximation of bitwiseAnd at line 192, overapproximation of bitwiseComplement at line 198, overapproximation of bitwiseXor at line 424. Possible FailurePath: [L25] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L26] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L28] const SORT_9 mask_SORT_9 = (SORT_9)-1 >> (sizeof(SORT_9) * 8 - 31); [L29] const SORT_9 msb_SORT_9 = (SORT_9)1 << (31 - 1); [L31] const SORT_11 mask_SORT_11 = (SORT_11)-1 >> (sizeof(SORT_11) * 8 - 16); [L32] const SORT_11 msb_SORT_11 = (SORT_11)1 << (16 - 1); [L34] const SORT_12 mask_SORT_12 = (SORT_12)-1 >> (sizeof(SORT_12) * 8 - 3); [L35] const SORT_12 msb_SORT_12 = (SORT_12)1 << (3 - 1); [L37] const SORT_15 mask_SORT_15 = (SORT_15)-1 >> (sizeof(SORT_15) * 8 - 4); [L38] const SORT_15 msb_SORT_15 = (SORT_15)1 << (4 - 1); [L40] const SORT_17 mask_SORT_17 = (SORT_17)-1 >> (sizeof(SORT_17) * 8 - 5); [L41] const SORT_17 msb_SORT_17 = (SORT_17)1 << (5 - 1); [L43] const SORT_19 mask_SORT_19 = (SORT_19)-1 >> (sizeof(SORT_19) * 8 - 6); [L44] const SORT_19 msb_SORT_19 = (SORT_19)1 << (6 - 1); [L46] const SORT_21 mask_SORT_21 = (SORT_21)-1 >> (sizeof(SORT_21) * 8 - 7); [L47] const SORT_21 msb_SORT_21 = (SORT_21)1 << (7 - 1); [L49] const SORT_23 mask_SORT_23 = (SORT_23)-1 >> (sizeof(SORT_23) * 8 - 8); [L50] const SORT_23 msb_SORT_23 = (SORT_23)1 << (8 - 1); [L52] const SORT_25 mask_SORT_25 = (SORT_25)-1 >> (sizeof(SORT_25) * 8 - 9); [L53] const SORT_25 msb_SORT_25 = (SORT_25)1 << (9 - 1); [L55] const SORT_27 mask_SORT_27 = (SORT_27)-1 >> (sizeof(SORT_27) * 8 - 10); [L56] const SORT_27 msb_SORT_27 = (SORT_27)1 << (10 - 1); [L58] const SORT_29 mask_SORT_29 = (SORT_29)-1 >> (sizeof(SORT_29) * 8 - 11); [L59] const SORT_29 msb_SORT_29 = (SORT_29)1 << (11 - 1); [L61] const SORT_31 mask_SORT_31 = (SORT_31)-1 >> (sizeof(SORT_31) * 8 - 12); [L62] const SORT_31 msb_SORT_31 = (SORT_31)1 << (12 - 1); [L64] const SORT_33 mask_SORT_33 = (SORT_33)-1 >> (sizeof(SORT_33) * 8 - 13); [L65] const SORT_33 msb_SORT_33 = (SORT_33)1 << (13 - 1); [L67] const SORT_35 mask_SORT_35 = (SORT_35)-1 >> (sizeof(SORT_35) * 8 - 14); [L68] const SORT_35 msb_SORT_35 = (SORT_35)1 << (14 - 1); [L70] const SORT_37 mask_SORT_37 = (SORT_37)-1 >> (sizeof(SORT_37) * 8 - 15); [L71] const SORT_37 msb_SORT_37 = (SORT_37)1 << (15 - 1); [L73] const SORT_62 mask_SORT_62 = (SORT_62)-1 >> (sizeof(SORT_62) * 8 - 32); [L74] const SORT_62 msb_SORT_62 = (SORT_62)1 << (32 - 1); [L76] const SORT_65 mask_SORT_65 = (SORT_65)-1 >> (sizeof(SORT_65) * 8 - 17); [L77] const SORT_65 msb_SORT_65 = (SORT_65)1 << (17 - 1); [L79] const SORT_68 mask_SORT_68 = (SORT_68)-1 >> (sizeof(SORT_68) * 8 - 18); [L80] const SORT_68 msb_SORT_68 = (SORT_68)1 << (18 - 1); [L82] const SORT_71 mask_SORT_71 = (SORT_71)-1 >> (sizeof(SORT_71) * 8 - 19); [L83] const SORT_71 msb_SORT_71 = (SORT_71)1 << (19 - 1); [L85] const SORT_74 mask_SORT_74 = (SORT_74)-1 >> (sizeof(SORT_74) * 8 - 20); [L86] const SORT_74 msb_SORT_74 = (SORT_74)1 << (20 - 1); [L88] const SORT_77 mask_SORT_77 = (SORT_77)-1 >> (sizeof(SORT_77) * 8 - 21); [L89] const SORT_77 msb_SORT_77 = (SORT_77)1 << (21 - 1); [L91] const SORT_80 mask_SORT_80 = (SORT_80)-1 >> (sizeof(SORT_80) * 8 - 22); [L92] const SORT_80 msb_SORT_80 = (SORT_80)1 << (22 - 1); [L94] const SORT_83 mask_SORT_83 = (SORT_83)-1 >> (sizeof(SORT_83) * 8 - 23); [L95] const SORT_83 msb_SORT_83 = (SORT_83)1 << (23 - 1); [L97] const SORT_86 mask_SORT_86 = (SORT_86)-1 >> (sizeof(SORT_86) * 8 - 24); [L98] const SORT_86 msb_SORT_86 = (SORT_86)1 << (24 - 1); [L100] const SORT_89 mask_SORT_89 = (SORT_89)-1 >> (sizeof(SORT_89) * 8 - 25); [L101] const SORT_89 msb_SORT_89 = (SORT_89)1 << (25 - 1); [L103] const SORT_92 mask_SORT_92 = (SORT_92)-1 >> (sizeof(SORT_92) * 8 - 26); [L104] const SORT_92 msb_SORT_92 = (SORT_92)1 << (26 - 1); [L106] const SORT_95 mask_SORT_95 = (SORT_95)-1 >> (sizeof(SORT_95) * 8 - 27); [L107] const SORT_95 msb_SORT_95 = (SORT_95)1 << (27 - 1); [L109] const SORT_98 mask_SORT_98 = (SORT_98)-1 >> (sizeof(SORT_98) * 8 - 28); [L110] const SORT_98 msb_SORT_98 = (SORT_98)1 << (28 - 1); [L112] const SORT_101 mask_SORT_101 = (SORT_101)-1 >> (sizeof(SORT_101) * 8 - 29); [L113] const SORT_101 msb_SORT_101 = (SORT_101)1 << (29 - 1); [L115] const SORT_104 mask_SORT_104 = (SORT_104)-1 >> (sizeof(SORT_104) * 8 - 30); [L116] const SORT_104 msb_SORT_104 = (SORT_104)1 << (30 - 1); [L118] const SORT_153 mask_SORT_153 = (SORT_153)-1 >> (sizeof(SORT_153) * 8 - 2); [L119] const SORT_153 msb_SORT_153 = (SORT_153)1 << (2 - 1); [L121] const SORT_1 var_7 = 0; [L122] const SORT_1 var_8 = 1; [L123] const SORT_9 var_10 = 0; [L124] const SORT_12 var_13 = 4; [L125] const SORT_12 var_114 = 5; [L126] const SORT_11 var_116 = 0; [L127] const SORT_11 var_150 = 64; [L128] const SORT_153 var_154 = 1; [L129] const SORT_23 var_189 = 127; [L130] const SORT_11 var_197 = 1; [L131] const SORT_11 var_199 = 127; [L132] const SORT_12 var_247 = 6; [L133] const SORT_15 var_251 = 9; [L134] const SORT_21 var_269 = 64; [L135] const SORT_12 var_282 = 0; [L136] const SORT_15 var_285 = 0; [L138] SORT_1 input_2; [L139] SORT_1 input_3; [L140] SORT_1 input_4; [L142] SORT_1 state_5 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L143] SORT_1 state_40 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L144] SORT_11 state_56 = __VERIFIER_nondet_ushort() & mask_SORT_11; [L145] SORT_1 state_58 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L146] SORT_11 state_117 = __VERIFIER_nondet_ushort() & mask_SORT_11; [L147] SORT_15 state_137 = __VERIFIER_nondet_uchar() & mask_SORT_15; [L148] SORT_15 state_140 = __VERIFIER_nondet_uchar() & mask_SORT_15; [L149] SORT_11 state_144 = __VERIFIER_nondet_ushort() & mask_SORT_11; [L151] SORT_11 init_118_arg_1 = var_116; [L152] state_117 = init_118_arg_1 VAL [init_118_arg_1=0, mask_SORT_1=1, mask_SORT_101=4294967295, mask_SORT_104=4294967295, mask_SORT_11=65535, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_153=3, mask_SORT_17=31, mask_SORT_19=63, mask_SORT_21=127, mask_SORT_23=255, mask_SORT_25=511, mask_SORT_27=1023, mask_SORT_29=2047, mask_SORT_31=4095, mask_SORT_33=8191, mask_SORT_35=16383, mask_SORT_37=32767, mask_SORT_62=4294967295, mask_SORT_65=4294967295, mask_SORT_68=4294967295, mask_SORT_71=4294967295, mask_SORT_74=4294967295, mask_SORT_77=4294967295, mask_SORT_80=4294967295, mask_SORT_83=4294967295, mask_SORT_86=4294967295, mask_SORT_89=4294967295, mask_SORT_9=4294967295, mask_SORT_92=4294967295, mask_SORT_95=4294967295, mask_SORT_98=4294967295, msb_SORT_1=1, msb_SORT_101=268435456, msb_SORT_104=536870912, msb_SORT_11=32768, msb_SORT_12=4, msb_SORT_15=8, msb_SORT_153=2, msb_SORT_17=16, msb_SORT_19=32, msb_SORT_21=64, msb_SORT_23=128, msb_SORT_25=256, msb_SORT_27=512, msb_SORT_29=1024, msb_SORT_31=2048, msb_SORT_33=4096, msb_SORT_35=8192, msb_SORT_37=16384, msb_SORT_62=2147483648, msb_SORT_65=65536, msb_SORT_68=131072, msb_SORT_71=262144, msb_SORT_74=524288, msb_SORT_77=1048576, msb_SORT_80=2097152, msb_SORT_83=4194304, msb_SORT_86=8388608, msb_SORT_89=16777216, msb_SORT_9=1073741824, msb_SORT_92=33554432, msb_SORT_95=67108864, msb_SORT_98=134217728, state_117=0, state_137=0, state_140=0, state_144=0, state_40=0, state_5=9, state_56=32768, state_58=0, var_10=0, var_114=5, var_116=0, var_13=4, var_150=64, var_154=1, var_189=127, var_197=1, var_199=127, var_247=6, var_251=9, var_269=64, var_282=0, var_285=0, var_7=0, var_8=1] [L155] input_2 = __VERIFIER_nondet_uchar() [L156] input_3 = __VERIFIER_nondet_uchar() [L157] input_3 = input_3 & mask_SORT_1 [L158] input_4 = __VERIFIER_nondet_uchar() [L159] input_4 = input_4 & mask_SORT_1 [L161] SORT_1 var_125_arg_0 = state_5; [L162] SORT_1 var_125 = ~var_125_arg_0; [L163] SORT_1 var_126_arg_0 = var_125; [L164] SORT_1 var_126 = ~var_126_arg_0; [L165] SORT_1 var_127_arg_0 = state_5; [L166] SORT_1 var_127_arg_1 = var_126; [L167] SORT_1 var_127 = var_127_arg_0 | var_127_arg_1; [L168] var_127 = var_127 & mask_SORT_1 [L169] SORT_1 constr_128_arg_0 = var_127; VAL [constr_128_arg_0=2, init_118_arg_1=0, input_2=2, input_3=0, input_4=0, mask_SORT_1=1, mask_SORT_101=4294967295, mask_SORT_104=4294967295, mask_SORT_11=65535, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_153=3, mask_SORT_17=31, mask_SORT_19=63, mask_SORT_21=127, mask_SORT_23=255, mask_SORT_25=511, mask_SORT_27=1023, mask_SORT_29=2047, mask_SORT_31=4095, mask_SORT_33=8191, mask_SORT_35=16383, mask_SORT_37=32767, mask_SORT_62=4294967295, mask_SORT_65=4294967295, mask_SORT_68=4294967295, mask_SORT_71=4294967295, mask_SORT_74=4294967295, mask_SORT_77=4294967295, mask_SORT_80=4294967295, mask_SORT_83=4294967295, mask_SORT_86=4294967295, mask_SORT_89=4294967295, mask_SORT_9=4294967295, mask_SORT_92=4294967295, mask_SORT_95=4294967295, mask_SORT_98=4294967295, msb_SORT_1=1, msb_SORT_101=268435456, msb_SORT_104=536870912, msb_SORT_11=32768, msb_SORT_12=4, msb_SORT_15=8, msb_SORT_153=2, msb_SORT_17=16, msb_SORT_19=32, msb_SORT_21=64, msb_SORT_23=128, msb_SORT_25=256, msb_SORT_27=512, msb_SORT_29=1024, msb_SORT_31=2048, msb_SORT_33=4096, msb_SORT_35=8192, msb_SORT_37=16384, msb_SORT_62=2147483648, msb_SORT_65=65536, msb_SORT_68=131072, msb_SORT_71=262144, msb_SORT_74=524288, msb_SORT_77=1048576, msb_SORT_80=2097152, msb_SORT_83=4194304, msb_SORT_86=8388608, msb_SORT_89=16777216, msb_SORT_9=1073741824, msb_SORT_92=33554432, msb_SORT_95=67108864, msb_SORT_98=134217728, state_117=0, state_137=0, state_140=0, state_144=0, state_40=0, state_5=9, state_56=32768, state_58=0, var_10=0, var_114=5, var_116=0, var_125=1, var_125_arg_0=9, var_126=3, var_126_arg_0=1, var_127=2, var_127_arg_0=9, var_127_arg_1=3, var_13=4, var_150=64, var_154=1, var_189=127, var_197=1, var_199=127, var_247=6, var_251=9, var_269=64, var_282=0, var_285=0, var_7=0, var_8=1] [L170] CALL assume_abort_if_not(constr_128_arg_0) VAL [unknown-#in~cond-unknown=2] [L21] COND FALSE !(!cond) [L170] RET assume_abort_if_not(constr_128_arg_0) VAL [constr_128_arg_0=2, init_118_arg_1=0, input_2=2, input_3=0, input_4=0, mask_SORT_1=1, mask_SORT_101=4294967295, mask_SORT_104=4294967295, mask_SORT_11=65535, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_153=3, mask_SORT_17=31, mask_SORT_19=63, mask_SORT_21=127, mask_SORT_23=255, mask_SORT_25=511, mask_SORT_27=1023, mask_SORT_29=2047, mask_SORT_31=4095, mask_SORT_33=8191, mask_SORT_35=16383, mask_SORT_37=32767, mask_SORT_62=4294967295, mask_SORT_65=4294967295, mask_SORT_68=4294967295, mask_SORT_71=4294967295, mask_SORT_74=4294967295, mask_SORT_77=4294967295, mask_SORT_80=4294967295, mask_SORT_83=4294967295, mask_SORT_86=4294967295, mask_SORT_89=4294967295, mask_SORT_9=4294967295, mask_SORT_92=4294967295, mask_SORT_95=4294967295, mask_SORT_98=4294967295, msb_SORT_1=1, msb_SORT_101=268435456, msb_SORT_104=536870912, msb_SORT_11=32768, msb_SORT_12=4, msb_SORT_15=8, msb_SORT_153=2, msb_SORT_17=16, msb_SORT_19=32, msb_SORT_21=64, msb_SORT_23=128, msb_SORT_25=256, msb_SORT_27=512, msb_SORT_29=1024, msb_SORT_31=2048, msb_SORT_33=4096, msb_SORT_35=8192, msb_SORT_37=16384, msb_SORT_62=2147483648, msb_SORT_65=65536, msb_SORT_68=131072, msb_SORT_71=262144, msb_SORT_74=524288, msb_SORT_77=1048576, msb_SORT_80=2097152, msb_SORT_83=4194304, msb_SORT_86=8388608, msb_SORT_89=16777216, msb_SORT_9=1073741824, msb_SORT_92=33554432, msb_SORT_95=67108864, msb_SORT_98=134217728, state_117=0, state_137=0, state_140=0, state_144=0, state_40=0, state_5=9, state_56=32768, state_58=0, var_10=0, var_114=5, var_116=0, var_125=1, var_125_arg_0=9, var_126=3, var_126_arg_0=1, var_127=2, var_127_arg_0=9, var_127_arg_1=3, var_13=4, var_150=64, var_154=1, var_189=127, var_197=1, var_199=127, var_247=6, var_251=9, var_269=64, var_282=0, var_285=0, var_7=0, var_8=1] [L171] SORT_1 var_129_arg_0 = var_8; [L172] var_129_arg_0 = var_129_arg_0 & mask_SORT_1 [L173] SORT_11 var_129 = var_129_arg_0; [L174] SORT_11 var_130_arg_0 = state_117; [L175] SORT_11 var_130_arg_1 = var_129; [L176] SORT_1 var_130 = var_130_arg_0 <= var_130_arg_1; [L177] SORT_1 var_131_arg_0 = input_4; [L178] SORT_1 var_131_arg_1 = var_130; [L179] SORT_1 var_131 = var_131_arg_0 ^ var_131_arg_1; [L180] SORT_1 var_132_arg_0 = var_131; [L181] SORT_1 var_132 = ~var_132_arg_0; [L182] SORT_1 var_133_arg_0 = var_131; [L183] SORT_1 var_133 = ~var_133_arg_0; [L184] SORT_1 var_134_arg_0 = var_132; [L185] SORT_1 var_134_arg_1 = var_133; [L186] SORT_1 var_134 = var_134_arg_0 | var_134_arg_1; [L187] var_134 = var_134 & mask_SORT_1 [L188] SORT_1 constr_135_arg_0 = var_134; VAL [constr_128_arg_0=2, constr_135_arg_0=16, init_118_arg_1=0, input_2=2, input_3=0, input_4=0, mask_SORT_1=1, mask_SORT_101=4294967295, mask_SORT_104=4294967295, mask_SORT_11=65535, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_153=3, mask_SORT_17=31, mask_SORT_19=63, mask_SORT_21=127, mask_SORT_23=255, mask_SORT_25=511, mask_SORT_27=1023, mask_SORT_29=2047, mask_SORT_31=4095, mask_SORT_33=8191, mask_SORT_35=16383, mask_SORT_37=32767, mask_SORT_62=4294967295, mask_SORT_65=4294967295, mask_SORT_68=4294967295, mask_SORT_71=4294967295, mask_SORT_74=4294967295, mask_SORT_77=4294967295, mask_SORT_80=4294967295, mask_SORT_83=4294967295, mask_SORT_86=4294967295, mask_SORT_89=4294967295, mask_SORT_9=4294967295, mask_SORT_92=4294967295, mask_SORT_95=4294967295, mask_SORT_98=4294967295, msb_SORT_1=1, msb_SORT_101=268435456, msb_SORT_104=536870912, msb_SORT_11=32768, msb_SORT_12=4, msb_SORT_15=8, msb_SORT_153=2, msb_SORT_17=16, msb_SORT_19=32, msb_SORT_21=64, msb_SORT_23=128, msb_SORT_25=256, msb_SORT_27=512, msb_SORT_29=1024, msb_SORT_31=2048, msb_SORT_33=4096, msb_SORT_35=8192, msb_SORT_37=16384, msb_SORT_62=2147483648, msb_SORT_65=65536, msb_SORT_68=131072, msb_SORT_71=262144, msb_SORT_74=524288, msb_SORT_77=1048576, msb_SORT_80=2097152, msb_SORT_83=4194304, msb_SORT_86=8388608, msb_SORT_89=16777216, msb_SORT_9=1073741824, msb_SORT_92=33554432, msb_SORT_95=67108864, msb_SORT_98=134217728, state_117=0, state_137=0, state_140=0, state_144=0, state_40=0, state_5=9, state_56=32768, state_58=0, var_10=0, var_114=5, var_116=0, var_125=1, var_125_arg_0=9, var_126=3, var_126_arg_0=1, var_127=2, var_127_arg_0=9, var_127_arg_1=3, var_129=1, var_129_arg_0=1, var_13=4, var_130=1, var_130_arg_0=0, var_130_arg_1=1, var_131=1, var_131_arg_0=0, var_131_arg_1=1, var_132=0, var_132_arg_0=1, var_133=11, var_133_arg_0=1, var_134=16, var_134_arg_0=0, var_134_arg_1=11, var_150=64, var_154=1, var_189=127, var_197=1, var_199=127, var_247=6, var_251=9, var_269=64, var_282=0, var_285=0, var_7=0, var_8=1] [L189] CALL assume_abort_if_not(constr_135_arg_0) VAL [unknown-#in~cond-unknown=16] [L21] COND FALSE !(!cond) [L189] RET assume_abort_if_not(constr_135_arg_0) VAL [constr_128_arg_0=2, constr_135_arg_0=16, init_118_arg_1=0, input_2=2, input_3=0, input_4=0, mask_SORT_1=1, mask_SORT_101=4294967295, mask_SORT_104=4294967295, mask_SORT_11=65535, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_153=3, mask_SORT_17=31, mask_SORT_19=63, mask_SORT_21=127, mask_SORT_23=255, mask_SORT_25=511, mask_SORT_27=1023, mask_SORT_29=2047, mask_SORT_31=4095, mask_SORT_33=8191, mask_SORT_35=16383, mask_SORT_37=32767, mask_SORT_62=4294967295, mask_SORT_65=4294967295, mask_SORT_68=4294967295, mask_SORT_71=4294967295, mask_SORT_74=4294967295, mask_SORT_77=4294967295, mask_SORT_80=4294967295, mask_SORT_83=4294967295, mask_SORT_86=4294967295, mask_SORT_89=4294967295, mask_SORT_9=4294967295, mask_SORT_92=4294967295, mask_SORT_95=4294967295, mask_SORT_98=4294967295, msb_SORT_1=1, msb_SORT_101=268435456, msb_SORT_104=536870912, msb_SORT_11=32768, msb_SORT_12=4, msb_SORT_15=8, msb_SORT_153=2, msb_SORT_17=16, msb_SORT_19=32, msb_SORT_21=64, msb_SORT_23=128, msb_SORT_25=256, msb_SORT_27=512, msb_SORT_29=1024, msb_SORT_31=2048, msb_SORT_33=4096, msb_SORT_35=8192, msb_SORT_37=16384, msb_SORT_62=2147483648, msb_SORT_65=65536, msb_SORT_68=131072, msb_SORT_71=262144, msb_SORT_74=524288, msb_SORT_77=1048576, msb_SORT_80=2097152, msb_SORT_83=4194304, msb_SORT_86=8388608, msb_SORT_89=16777216, msb_SORT_9=1073741824, msb_SORT_92=33554432, msb_SORT_95=67108864, msb_SORT_98=134217728, state_117=0, state_137=0, state_140=0, state_144=0, state_40=0, state_5=9, state_56=32768, state_58=0, var_10=0, var_114=5, var_116=0, var_125=1, var_125_arg_0=9, var_126=3, var_126_arg_0=1, var_127=2, var_127_arg_0=9, var_127_arg_1=3, var_129=1, var_129_arg_0=1, var_13=4, var_130=1, var_130_arg_0=0, var_130_arg_1=1, var_131=1, var_131_arg_0=0, var_131_arg_1=1, var_132=0, var_132_arg_0=1, var_133=11, var_133_arg_0=1, var_134=16, var_134_arg_0=0, var_134_arg_1=11, var_150=64, var_154=1, var_189=127, var_197=1, var_199=127, var_247=6, var_251=9, var_269=64, var_282=0, var_285=0, var_7=0, var_8=1] [L191] SORT_12 var_115_arg_0 = var_114; [L192] var_115_arg_0 = var_115_arg_0 & mask_SORT_12 [L193] SORT_11 var_115 = var_115_arg_0; [L194] SORT_11 var_119_arg_0 = var_115; [L195] SORT_11 var_119_arg_1 = state_117; [L196] SORT_1 var_119 = var_119_arg_0 < var_119_arg_1; [L197] SORT_1 var_14_arg_0 = input_3; [L198] SORT_1 var_14 = ~var_14_arg_0; [L199] SORT_1 var_16_arg_0 = var_14; [L200] SORT_12 var_16_arg_1 = var_13; [L201] SORT_15 var_16 = ((SORT_15)var_16_arg_0 << 3) | var_16_arg_1; [L202] var_16 = var_16 & mask_SORT_15 [L203] SORT_1 var_18_arg_0 = input_3; [L204] SORT_15 var_18_arg_1 = var_16; [L205] SORT_17 var_18 = ((SORT_17)var_18_arg_0 << 4) | var_18_arg_1; [L206] var_18 = var_18 & mask_SORT_17 [L207] SORT_1 var_20_arg_0 = input_3; [L208] SORT_17 var_20_arg_1 = var_18; [L209] SORT_19 var_20 = ((SORT_19)var_20_arg_0 << 5) | var_20_arg_1; [L210] var_20 = var_20 & mask_SORT_19 [L211] SORT_1 var_22_arg_0 = input_3; [L212] SORT_19 var_22_arg_1 = var_20; [L213] SORT_21 var_22 = ((SORT_21)var_22_arg_0 << 6) | var_22_arg_1; [L214] var_22 = var_22 & mask_SORT_21 [L215] SORT_1 var_24_arg_0 = input_3; [L216] SORT_21 var_24_arg_1 = var_22; [L217] SORT_23 var_24 = ((SORT_23)var_24_arg_0 << 7) | var_24_arg_1; [L218] var_24 = var_24 & mask_SORT_23 [L219] SORT_1 var_26_arg_0 = input_3; [L220] SORT_23 var_26_arg_1 = var_24; [L221] SORT_25 var_26 = ((SORT_25)var_26_arg_0 << 8) | var_26_arg_1; [L222] var_26 = var_26 & mask_SORT_25 [L223] SORT_1 var_28_arg_0 = var_14; [L224] SORT_25 var_28_arg_1 = var_26; [L225] SORT_27 var_28 = ((SORT_27)var_28_arg_0 << 9) | var_28_arg_1; [L226] var_28 = var_28 & mask_SORT_27 [L227] SORT_1 var_30_arg_0 = var_14; [L228] SORT_27 var_30_arg_1 = var_28; [L229] SORT_29 var_30 = ((SORT_29)var_30_arg_0 << 10) | var_30_arg_1; [L230] var_30 = var_30 & mask_SORT_29 [L231] SORT_1 var_32_arg_0 = var_14; [L232] SORT_29 var_32_arg_1 = var_30; [L233] SORT_31 var_32 = ((SORT_31)var_32_arg_0 << 11) | var_32_arg_1; [L234] var_32 = var_32 & mask_SORT_31 [L235] SORT_1 var_34_arg_0 = var_14; [L236] SORT_31 var_34_arg_1 = var_32; [L237] SORT_33 var_34 = ((SORT_33)var_34_arg_0 << 12) | var_34_arg_1; [L238] var_34 = var_34 & mask_SORT_33 [L239] SORT_1 var_36_arg_0 = var_14; [L240] SORT_33 var_36_arg_1 = var_34; [L241] SORT_35 var_36 = ((SORT_35)var_36_arg_0 << 13) | var_36_arg_1; [L242] var_36 = var_36 & mask_SORT_35 [L243] SORT_1 var_38_arg_0 = var_14; [L244] SORT_35 var_38_arg_1 = var_36; [L245] SORT_37 var_38 = ((SORT_37)var_38_arg_0 << 14) | var_38_arg_1; [L246] var_38 = var_38 & mask_SORT_37 [L247] SORT_1 var_39_arg_0 = var_14; [L248] SORT_37 var_39_arg_1 = var_38; [L249] SORT_11 var_39 = ((SORT_11)var_39_arg_0 << 15) | var_39_arg_1; [L250] SORT_1 var_41_arg_0 = state_40; [L251] SORT_1 var_41 = ~var_41_arg_0; [L252] SORT_1 var_42_arg_0 = state_40; [L253] SORT_12 var_42_arg_1 = var_13; [L254] SORT_15 var_42 = ((SORT_15)var_42_arg_0 << 3) | var_42_arg_1; [L255] var_42 = var_42 & mask_SORT_15 [L256] SORT_1 var_43_arg_0 = var_41; [L257] SORT_15 var_43_arg_1 = var_42; [L258] SORT_17 var_43 = ((SORT_17)var_43_arg_0 << 4) | var_43_arg_1; [L259] var_43 = var_43 & mask_SORT_17 [L260] SORT_1 var_44_arg_0 = state_40; [L261] SORT_17 var_44_arg_1 = var_43; [L262] SORT_19 var_44 = ((SORT_19)var_44_arg_0 << 5) | var_44_arg_1; [L263] var_44 = var_44 & mask_SORT_19 [L264] SORT_1 var_45_arg_0 = var_41; [L265] SORT_19 var_45_arg_1 = var_44; [L266] SORT_21 var_45 = ((SORT_21)var_45_arg_0 << 6) | var_45_arg_1; [L267] var_45 = var_45 & mask_SORT_21 [L268] SORT_1 var_46_arg_0 = var_41; [L269] SORT_21 var_46_arg_1 = var_45; [L270] SORT_23 var_46 = ((SORT_23)var_46_arg_0 << 7) | var_46_arg_1; [L271] var_46 = var_46 & mask_SORT_23 [L272] SORT_1 var_47_arg_0 = state_40; [L273] SORT_23 var_47_arg_1 = var_46; [L274] SORT_25 var_47 = ((SORT_25)var_47_arg_0 << 8) | var_47_arg_1; [L275] var_47 = var_47 & mask_SORT_25 [L276] SORT_1 var_48_arg_0 = var_41; [L277] SORT_25 var_48_arg_1 = var_47; [L278] SORT_27 var_48 = ((SORT_27)var_48_arg_0 << 9) | var_48_arg_1; [L279] var_48 = var_48 & mask_SORT_27 [L280] SORT_1 var_49_arg_0 = var_41; [L281] SORT_27 var_49_arg_1 = var_48; [L282] SORT_29 var_49 = ((SORT_29)var_49_arg_0 << 10) | var_49_arg_1; [L283] var_49 = var_49 & mask_SORT_29 [L284] SORT_1 var_50_arg_0 = var_41; [L285] SORT_29 var_50_arg_1 = var_49; [L286] SORT_31 var_50 = ((SORT_31)var_50_arg_0 << 11) | var_50_arg_1; [L287] var_50 = var_50 & mask_SORT_31 [L288] SORT_1 var_51_arg_0 = var_41; [L289] SORT_31 var_51_arg_1 = var_50; [L290] SORT_33 var_51 = ((SORT_33)var_51_arg_0 << 12) | var_51_arg_1; [L291] var_51 = var_51 & mask_SORT_33 [L292] SORT_1 var_52_arg_0 = var_41; [L293] SORT_33 var_52_arg_1 = var_51; [L294] SORT_35 var_52 = ((SORT_35)var_52_arg_0 << 13) | var_52_arg_1; [L295] var_52 = var_52 & mask_SORT_35 [L296] SORT_1 var_53_arg_0 = var_41; [L297] SORT_35 var_53_arg_1 = var_52; [L298] SORT_37 var_53 = ((SORT_37)var_53_arg_0 << 14) | var_53_arg_1; [L299] var_53 = var_53 & mask_SORT_37 [L300] SORT_1 var_54_arg_0 = var_41; [L301] SORT_37 var_54_arg_1 = var_53; [L302] SORT_11 var_54 = ((SORT_11)var_54_arg_0 << 15) | var_54_arg_1; [L303] SORT_11 var_55_arg_0 = var_39; [L304] SORT_11 var_55_arg_1 = var_54; [L305] SORT_11 var_55 = var_55_arg_0 + var_55_arg_1; [L306] SORT_11 var_57_arg_0 = state_56; [L307] SORT_11 var_57 = -var_57_arg_0; [L308] SORT_1 var_59_arg_0 = state_58; [L309] SORT_11 var_59_arg_1 = var_57; [L310] SORT_11 var_59_arg_2 = state_56; [L311] SORT_11 var_59 = var_59_arg_0 ? var_59_arg_1 : var_59_arg_2; [L312] SORT_11 var_60_arg_0 = var_55; [L313] SORT_11 var_60_arg_1 = var_59; [L314] SORT_11 var_60 = var_60_arg_0 + var_60_arg_1; [L315] var_60 = var_60 & mask_SORT_11 [L316] SORT_11 var_61_arg_0 = var_60; [L317] SORT_1 var_61 = var_61_arg_0 >> 15; [L318] SORT_1 var_63_arg_0 = var_61; [L319] SORT_9 var_63_arg_1 = var_10; [L320] SORT_62 var_63 = ((SORT_62)var_63_arg_0 << 31) | var_63_arg_1; [L321] var_63 = var_63 & mask_SORT_62 [L322] SORT_11 var_106_arg_0 = var_60; [L323] SORT_1 var_106 = var_106_arg_0 >> 15; [L324] SORT_11 var_103_arg_0 = var_60; [L325] SORT_1 var_103 = var_103_arg_0 >> 15; [L326] SORT_11 var_100_arg_0 = var_60; [L327] SORT_1 var_100 = var_100_arg_0 >> 15; [L328] SORT_11 var_97_arg_0 = var_60; [L329] SORT_1 var_97 = var_97_arg_0 >> 15; [L330] SORT_11 var_94_arg_0 = var_60; [L331] SORT_1 var_94 = var_94_arg_0 >> 15; [L332] SORT_11 var_91_arg_0 = var_60; [L333] SORT_1 var_91 = var_91_arg_0 >> 15; [L334] SORT_11 var_88_arg_0 = var_60; [L335] SORT_1 var_88 = var_88_arg_0 >> 15; [L336] SORT_11 var_85_arg_0 = var_60; [L337] SORT_1 var_85 = var_85_arg_0 >> 15; [L338] SORT_11 var_82_arg_0 = var_60; [L339] SORT_1 var_82 = var_82_arg_0 >> 15; [L340] SORT_11 var_79_arg_0 = var_60; [L341] SORT_1 var_79 = var_79_arg_0 >> 15; [L342] SORT_11 var_76_arg_0 = var_60; [L343] SORT_1 var_76 = var_76_arg_0 >> 15; [L344] SORT_11 var_73_arg_0 = var_60; [L345] SORT_1 var_73 = var_73_arg_0 >> 15; [L346] SORT_11 var_70_arg_0 = var_60; [L347] SORT_1 var_70 = var_70_arg_0 >> 15; [L348] SORT_11 var_67_arg_0 = var_60; [L349] SORT_1 var_67 = var_67_arg_0 >> 15; [L350] SORT_11 var_64_arg_0 = var_60; [L351] SORT_1 var_64 = var_64_arg_0 >> 15; [L352] SORT_1 var_66_arg_0 = var_64; [L353] SORT_11 var_66_arg_1 = var_60; [L354] SORT_65 var_66 = ((SORT_65)var_66_arg_0 << 16) | var_66_arg_1; [L355] var_66 = var_66 & mask_SORT_65 [L356] SORT_1 var_69_arg_0 = var_67; [L357] SORT_65 var_69_arg_1 = var_66; [L358] SORT_68 var_69 = ((SORT_68)var_69_arg_0 << 17) | var_69_arg_1; [L359] var_69 = var_69 & mask_SORT_68 [L360] SORT_1 var_72_arg_0 = var_70; [L361] SORT_68 var_72_arg_1 = var_69; [L362] SORT_71 var_72 = ((SORT_71)var_72_arg_0 << 18) | var_72_arg_1; [L363] var_72 = var_72 & mask_SORT_71 [L364] SORT_1 var_75_arg_0 = var_73; [L365] SORT_71 var_75_arg_1 = var_72; [L366] SORT_74 var_75 = ((SORT_74)var_75_arg_0 << 19) | var_75_arg_1; [L367] var_75 = var_75 & mask_SORT_74 [L368] SORT_1 var_78_arg_0 = var_76; [L369] SORT_74 var_78_arg_1 = var_75; [L370] SORT_77 var_78 = ((SORT_77)var_78_arg_0 << 20) | var_78_arg_1; [L371] var_78 = var_78 & mask_SORT_77 [L372] SORT_1 var_81_arg_0 = var_79; [L373] SORT_77 var_81_arg_1 = var_78; [L374] SORT_80 var_81 = ((SORT_80)var_81_arg_0 << 21) | var_81_arg_1; [L375] var_81 = var_81 & mask_SORT_80 [L376] SORT_1 var_84_arg_0 = var_82; [L377] SORT_80 var_84_arg_1 = var_81; [L378] SORT_83 var_84 = ((SORT_83)var_84_arg_0 << 22) | var_84_arg_1; [L379] var_84 = var_84 & mask_SORT_83 [L380] SORT_1 var_87_arg_0 = var_85; [L381] SORT_83 var_87_arg_1 = var_84; [L382] SORT_86 var_87 = ((SORT_86)var_87_arg_0 << 23) | var_87_arg_1; [L383] var_87 = var_87 & mask_SORT_86 [L384] SORT_1 var_90_arg_0 = var_88; [L385] SORT_86 var_90_arg_1 = var_87; [L386] SORT_89 var_90 = ((SORT_89)var_90_arg_0 << 24) | var_90_arg_1; [L387] var_90 = var_90 & mask_SORT_89 [L388] SORT_1 var_93_arg_0 = var_91; [L389] SORT_89 var_93_arg_1 = var_90; [L390] SORT_92 var_93 = ((SORT_92)var_93_arg_0 << 25) | var_93_arg_1; [L391] var_93 = var_93 & mask_SORT_92 [L392] SORT_1 var_96_arg_0 = var_94; [L393] SORT_92 var_96_arg_1 = var_93; [L394] SORT_95 var_96 = ((SORT_95)var_96_arg_0 << 26) | var_96_arg_1; [L395] var_96 = var_96 & mask_SORT_95 [L396] SORT_1 var_99_arg_0 = var_97; [L397] SORT_95 var_99_arg_1 = var_96; [L398] SORT_98 var_99 = ((SORT_98)var_99_arg_0 << 27) | var_99_arg_1; [L399] var_99 = var_99 & mask_SORT_98 [L400] SORT_1 var_102_arg_0 = var_100; [L401] SORT_98 var_102_arg_1 = var_99; [L402] SORT_101 var_102 = ((SORT_101)var_102_arg_0 << 28) | var_102_arg_1; [L403] var_102 = var_102 & mask_SORT_101 [L404] SORT_1 var_105_arg_0 = var_103; [L405] SORT_101 var_105_arg_1 = var_102; [L406] SORT_104 var_105 = ((SORT_104)var_105_arg_0 << 29) | var_105_arg_1; [L407] var_105 = var_105 & mask_SORT_104 [L408] SORT_1 var_107_arg_0 = var_106; [L409] SORT_104 var_107_arg_1 = var_105; [L410] SORT_9 var_107 = ((SORT_9)var_107_arg_0 << 30) | var_107_arg_1; [L411] SORT_9 var_108_arg_0 = var_107; [L412] var_108_arg_0 = var_108_arg_0 & mask_SORT_9 [L413] SORT_62 var_108 = var_108_arg_0; [L414] SORT_62 var_109_arg_0 = var_63; [L415] SORT_62 var_109_arg_1 = var_108; [L416] SORT_1 var_109 = var_109_arg_0 <= var_109_arg_1; [L417] SORT_1 var_110_arg_0 = var_109; [L418] SORT_1 var_110_arg_1 = var_8; [L419] SORT_1 var_110_arg_2 = var_7; [L420] SORT_1 var_110 = var_110_arg_0 ? var_110_arg_1 : var_110_arg_2; [L421] var_110 = var_110 & mask_SORT_1 [L422] SORT_1 var_111_arg_0 = input_3; [L423] SORT_1 var_111_arg_1 = var_110; [L424] SORT_1 var_111 = var_111_arg_0 ^ var_111_arg_1; [L425] SORT_1 var_112_arg_0 = var_111; [L426] SORT_1 var_112 = ~var_112_arg_0; [L427] SORT_1 var_120_arg_0 = var_119; [L428] SORT_1 var_120_arg_1 = var_112; [L429] SORT_1 var_120_arg_2 = var_8; [L430] SORT_1 var_120 = var_120_arg_0 ? var_120_arg_1 : var_120_arg_2; [L431] SORT_1 var_121_arg_0 = var_120; [L432] SORT_1 var_121 = ~var_121_arg_0; [L433] SORT_1 var_122_arg_0 = var_120; [L434] SORT_1 var_122 = ~var_122_arg_0; [L435] SORT_1 var_123_arg_0 = var_121; [L436] SORT_1 var_123_arg_1 = var_122; [L437] SORT_1 var_123 = var_123_arg_0 & var_123_arg_1; [L438] var_123 = var_123 & mask_SORT_1 [L439] SORT_1 bad_124_arg_0 = var_123; [L440] CALL __VERIFIER_assert(!(bad_124_arg_0)) [L20] COND TRUE !(cond) VAL [cond=0, unknown-#in~cond-unknown=0] [L20] reach_error() VAL [cond=0, unknown-#in~cond-unknown=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 2 procedures, 13 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 9.3s, OverallIterations: 1, TraceHistogramMax: 2, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: , PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=13occurred in iteration=0, InterpolantAutomatonStates: 0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 5.8s SatisfiabilityAnalysisTime, 0.0s InterpolantComputationTime, 12 NumberOfCodeBlocks, 12 NumberOfCodeBlocksAsserted, 1 NumberOfCheckSat, 0 ConstructedInterpolants, 0 QuantifiedInterpolants, 0 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 0 InterpolantComputations, 0 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2022-11-23 16:11:22,390 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.safe_intersymbol_analog_estimation_convergence.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/config/svcomp-Reach-64bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash df7f37b318c8d1f9d7b6d8bdd6b9d05156ce656d1a634258cfc85f6ce0601b19 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-4e7fbc6 [2022-11-23 16:11:24,816 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-23 16:11:24,818 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-23 16:11:24,849 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-23 16:11:24,849 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-23 16:11:24,855 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-23 16:11:24,856 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-23 16:11:24,858 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-23 16:11:24,860 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-23 16:11:24,861 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-23 16:11:24,862 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-23 16:11:24,863 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-23 16:11:24,864 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-23 16:11:24,865 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-23 16:11:24,866 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-23 16:11:24,875 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-23 16:11:24,877 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-23 16:11:24,883 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-23 16:11:24,886 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-23 16:11:24,892 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-23 16:11:24,893 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-23 16:11:24,899 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-23 16:11:24,900 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-23 16:11:24,901 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-23 16:11:24,904 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-23 16:11:24,904 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-23 16:11:24,905 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-23 16:11:24,906 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-23 16:11:24,906 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-23 16:11:24,907 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-23 16:11:24,908 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-23 16:11:24,908 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-23 16:11:24,909 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-23 16:11:24,915 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-23 16:11:24,917 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-23 16:11:24,918 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-23 16:11:24,941 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-23 16:11:24,941 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-23 16:11:24,941 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-23 16:11:24,942 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-23 16:11:24,943 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-23 16:11:24,945 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/config/svcomp-Reach-64bit-Taipan_Bitvector.epf [2022-11-23 16:11:24,968 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-23 16:11:24,968 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-23 16:11:24,969 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-23 16:11:24,969 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-23 16:11:24,970 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-23 16:11:24,970 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-23 16:11:24,970 INFO L138 SettingsManager]: * User list type=DISABLED [2022-11-23 16:11:24,971 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-11-23 16:11:24,971 INFO L138 SettingsManager]: * Explicit value domain=true [2022-11-23 16:11:24,971 INFO L138 SettingsManager]: * Octagon Domain=false [2022-11-23 16:11:24,972 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-11-23 16:11:24,972 INFO L138 SettingsManager]: * Interval Domain=false [2022-11-23 16:11:24,973 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-23 16:11:24,973 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-23 16:11:24,973 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-23 16:11:24,974 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-23 16:11:24,974 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-23 16:11:24,974 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-11-23 16:11:24,974 INFO L138 SettingsManager]: * Use bitvectors instead of ints=true [2022-11-23 16:11:24,975 INFO L138 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2022-11-23 16:11:24,975 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-23 16:11:24,975 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-23 16:11:24,976 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-23 16:11:24,976 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-23 16:11:24,976 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-23 16:11:24,976 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-23 16:11:24,977 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-23 16:11:24,977 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-23 16:11:24,977 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-23 16:11:24,978 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-23 16:11:24,978 INFO L138 SettingsManager]: * Trace refinement strategy=WALRUS [2022-11-23 16:11:24,978 INFO L138 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2022-11-23 16:11:24,979 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-23 16:11:24,979 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-11-23 16:11:24,979 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-11-23 16:11:24,979 INFO L138 SettingsManager]: * Logic for external solver=AUFBV WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> df7f37b318c8d1f9d7b6d8bdd6b9d05156ce656d1a634258cfc85f6ce0601b19 [2022-11-23 16:11:25,298 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-23 16:11:25,319 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-23 16:11:25,322 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-23 16:11:25,323 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-23 16:11:25,324 INFO L275 PluginConnector]: CDTParser initialized [2022-11-23 16:11:25,325 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.safe_intersymbol_analog_estimation_convergence.c [2022-11-23 16:11:28,511 INFO L500 CDTParser]: Created temporary CDT project at NULL [2022-11-23 16:11:28,762 INFO L351 CDTParser]: Found 1 translation units. [2022-11-23 16:11:28,763 INFO L172 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.safe_intersymbol_analog_estimation_convergence.c [2022-11-23 16:11:28,785 INFO L394 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/data/977eb3f09/32bb3f35d01b40f2bd3043739041d003/FLAG727a8b07d [2022-11-23 16:11:29,076 INFO L402 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/data/977eb3f09/32bb3f35d01b40f2bd3043739041d003 [2022-11-23 16:11:29,079 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-23 16:11:29,081 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-23 16:11:29,082 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-23 16:11:29,083 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-23 16:11:29,090 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-23 16:11:29,091 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 04:11:29" (1/1) ... [2022-11-23 16:11:29,092 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1cbc71ab and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:11:29, skipping insertion in model container [2022-11-23 16:11:29,093 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 04:11:29" (1/1) ... [2022-11-23 16:11:29,100 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-23 16:11:29,154 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-23 16:11:29,338 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.safe_intersymbol_analog_estimation_convergence.c[1132,1145] [2022-11-23 16:11:29,588 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-23 16:11:29,606 INFO L203 MainTranslator]: Completed pre-run [2022-11-23 16:11:29,617 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.safe_intersymbol_analog_estimation_convergence.c[1132,1145] [2022-11-23 16:11:29,710 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-23 16:11:29,732 INFO L208 MainTranslator]: Completed translation [2022-11-23 16:11:29,739 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:11:29 WrapperNode [2022-11-23 16:11:29,739 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-23 16:11:29,740 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-23 16:11:29,740 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-23 16:11:29,741 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-23 16:11:29,748 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:11:29" (1/1) ... [2022-11-23 16:11:29,774 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:11:29" (1/1) ... [2022-11-23 16:11:29,844 INFO L138 Inliner]: procedures = 11, calls = 5, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 639 [2022-11-23 16:11:29,858 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-23 16:11:29,859 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-23 16:11:29,861 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-23 16:11:29,862 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-23 16:11:29,872 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:11:29" (1/1) ... [2022-11-23 16:11:29,873 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:11:29" (1/1) ... [2022-11-23 16:11:29,884 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:11:29" (1/1) ... [2022-11-23 16:11:29,884 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:11:29" (1/1) ... [2022-11-23 16:11:29,901 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:11:29" (1/1) ... [2022-11-23 16:11:29,905 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:11:29" (1/1) ... [2022-11-23 16:11:29,908 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:11:29" (1/1) ... [2022-11-23 16:11:29,911 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:11:29" (1/1) ... [2022-11-23 16:11:29,917 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-23 16:11:29,918 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-23 16:11:29,918 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-23 16:11:29,918 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-23 16:11:29,919 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:11:29" (1/1) ... [2022-11-23 16:11:29,959 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-23 16:11:29,983 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/z3 [2022-11-23 16:11:30,008 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-23 16:11:30,031 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-23 16:11:30,055 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-23 16:11:30,055 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-23 16:11:30,055 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2022-11-23 16:11:30,056 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2022-11-23 16:11:30,358 INFO L235 CfgBuilder]: Building ICFG [2022-11-23 16:11:30,360 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-23 16:11:31,303 INFO L276 CfgBuilder]: Performing block encoding [2022-11-23 16:11:31,311 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-23 16:11:31,311 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-23 16:11:31,314 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 04:11:31 BoogieIcfgContainer [2022-11-23 16:11:31,314 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-23 16:11:31,319 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-23 16:11:31,319 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-23 16:11:31,322 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-23 16:11:31,323 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 04:11:29" (1/3) ... [2022-11-23 16:11:31,325 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@348c11fe and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 04:11:31, skipping insertion in model container [2022-11-23 16:11:31,325 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:11:29" (2/3) ... [2022-11-23 16:11:31,326 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@348c11fe and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 04:11:31, skipping insertion in model container [2022-11-23 16:11:31,326 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 04:11:31" (3/3) ... [2022-11-23 16:11:31,328 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.safe_intersymbol_analog_estimation_convergence.c [2022-11-23 16:11:31,349 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-23 16:11:31,349 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-23 16:11:31,410 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-23 16:11:31,420 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@3accad31, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-23 16:11:31,420 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-23 16:11:31,424 INFO L276 IsEmpty]: Start isEmpty. Operand has 19 states, 14 states have (on average 1.3571428571428572) internal successors, (19), 15 states have internal predecessors, (19), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-23 16:11:31,433 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-11-23 16:11:31,433 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 16:11:31,434 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-23 16:11:31,435 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-23 16:11:31,442 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 16:11:31,442 INFO L85 PathProgramCache]: Analyzing trace with hash -639607165, now seen corresponding path program 1 times [2022-11-23 16:11:31,462 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-23 16:11:31,463 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [778391659] [2022-11-23 16:11:31,463 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 16:11:31,463 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-23 16:11:31,464 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/mathsat [2022-11-23 16:11:31,474 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-23 16:11:31,517 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (2)] Waiting until timeout for monitored process [2022-11-23 16:11:31,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 16:11:31,794 INFO L263 TraceCheckSpWp]: Trace formula consists of 342 conjuncts, 1 conjunts are in the unsatisfiable core [2022-11-23 16:11:31,802 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 16:11:31,826 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-23 16:11:31,827 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-23 16:11:31,827 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-23 16:11:31,828 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [778391659] [2022-11-23 16:11:31,828 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [778391659] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-23 16:11:31,829 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-23 16:11:31,829 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-23 16:11:31,831 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2065004115] [2022-11-23 16:11:31,831 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-23 16:11:31,836 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2022-11-23 16:11:31,836 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-23 16:11:31,885 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2022-11-23 16:11:31,885 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2022-11-23 16:11:31,888 INFO L87 Difference]: Start difference. First operand has 19 states, 14 states have (on average 1.3571428571428572) internal successors, (19), 15 states have internal predecessors, (19), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand has 2 states, 2 states have (on average 6.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-23 16:11:31,904 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 16:11:31,904 INFO L93 Difference]: Finished difference Result 32 states and 43 transitions. [2022-11-23 16:11:31,905 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-23 16:11:31,906 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 6.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) Word has length 17 [2022-11-23 16:11:31,906 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-23 16:11:31,912 INFO L225 Difference]: With dead ends: 32 [2022-11-23 16:11:31,912 INFO L226 Difference]: Without dead ends: 15 [2022-11-23 16:11:31,914 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2022-11-23 16:11:31,918 INFO L413 NwaCegarLoop]: 16 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 16 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-23 16:11:31,919 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-23 16:11:31,933 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states. [2022-11-23 16:11:31,946 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 15. [2022-11-23 16:11:31,947 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 11 states have (on average 1.0909090909090908) internal successors, (12), 11 states have internal predecessors, (12), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-23 16:11:31,948 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 16 transitions. [2022-11-23 16:11:31,949 INFO L78 Accepts]: Start accepts. Automaton has 15 states and 16 transitions. Word has length 17 [2022-11-23 16:11:31,950 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-23 16:11:31,950 INFO L495 AbstractCegarLoop]: Abstraction has 15 states and 16 transitions. [2022-11-23 16:11:31,950 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 6.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-23 16:11:31,950 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 16 transitions. [2022-11-23 16:11:31,951 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-11-23 16:11:31,952 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 16:11:31,952 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-23 16:11:31,961 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (2)] Forceful destruction successful, exit code 0 [2022-11-23 16:11:32,152 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-23 16:11:32,153 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-23 16:11:32,153 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 16:11:32,154 INFO L85 PathProgramCache]: Analyzing trace with hash -324183425, now seen corresponding path program 1 times [2022-11-23 16:11:32,155 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-23 16:11:32,155 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1962489007] [2022-11-23 16:11:32,155 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 16:11:32,155 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-23 16:11:32,155 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/mathsat [2022-11-23 16:11:32,157 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-23 16:11:32,171 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (3)] Waiting until timeout for monitored process [2022-11-23 16:11:32,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 16:11:32,467 INFO L263 TraceCheckSpWp]: Trace formula consists of 342 conjuncts, 18 conjunts are in the unsatisfiable core [2022-11-23 16:11:32,474 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 16:11:32,764 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-11-23 16:11:32,765 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-23 16:11:32,765 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-23 16:11:32,766 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1962489007] [2022-11-23 16:11:32,767 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1962489007] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-23 16:11:32,768 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-23 16:11:32,768 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-23 16:11:32,773 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [119879493] [2022-11-23 16:11:32,773 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-23 16:11:32,776 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-23 16:11:32,777 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-23 16:11:32,778 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-23 16:11:32,780 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-23 16:11:32,780 INFO L87 Difference]: Start difference. First operand 15 states and 16 transitions. Second operand has 4 states, 4 states have (on average 2.5) internal successors, (10), 4 states have internal predecessors, (10), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-11-23 16:11:33,167 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 16:11:33,167 INFO L93 Difference]: Finished difference Result 29 states and 34 transitions. [2022-11-23 16:11:33,168 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-23 16:11:33,168 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.5) internal successors, (10), 4 states have internal predecessors, (10), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 17 [2022-11-23 16:11:33,168 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-23 16:11:33,169 INFO L225 Difference]: With dead ends: 29 [2022-11-23 16:11:33,169 INFO L226 Difference]: Without dead ends: 27 [2022-11-23 16:11:33,170 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-23 16:11:33,170 INFO L413 NwaCegarLoop]: 20 mSDtfsCounter, 6 mSDsluCounter, 30 mSDsCounter, 0 mSdLazyCounter, 14 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 8 SdHoareTripleChecker+Valid, 50 SdHoareTripleChecker+Invalid, 14 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 14 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-23 16:11:33,171 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [8 Valid, 50 Invalid, 14 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 14 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-11-23 16:11:33,172 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2022-11-23 16:11:33,177 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 21. [2022-11-23 16:11:33,178 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 15 states have (on average 1.0666666666666667) internal successors, (16), 15 states have internal predecessors, (16), 4 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-11-23 16:11:33,179 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 24 transitions. [2022-11-23 16:11:33,179 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 24 transitions. Word has length 17 [2022-11-23 16:11:33,179 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-23 16:11:33,179 INFO L495 AbstractCegarLoop]: Abstraction has 21 states and 24 transitions. [2022-11-23 16:11:33,180 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.5) internal successors, (10), 4 states have internal predecessors, (10), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-11-23 16:11:33,180 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 24 transitions. [2022-11-23 16:11:33,181 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-11-23 16:11:33,181 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 16:11:33,181 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 4, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2022-11-23 16:11:33,207 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (3)] Forceful destruction successful, exit code 0 [2022-11-23 16:11:33,394 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-23 16:11:33,395 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-23 16:11:33,395 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 16:11:33,395 INFO L85 PathProgramCache]: Analyzing trace with hash 322101155, now seen corresponding path program 1 times [2022-11-23 16:11:33,397 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-23 16:11:33,397 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [885729514] [2022-11-23 16:11:33,397 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 16:11:33,398 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-23 16:11:33,398 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/mathsat [2022-11-23 16:11:33,399 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-23 16:11:33,418 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (4)] Waiting until timeout for monitored process [2022-11-23 16:11:33,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 16:11:33,946 INFO L263 TraceCheckSpWp]: Trace formula consists of 800 conjuncts, 30 conjunts are in the unsatisfiable core [2022-11-23 16:11:33,953 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 16:11:34,501 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-11-23 16:11:34,502 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 16:11:34,810 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-23 16:11:34,811 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [885729514] [2022-11-23 16:11:34,814 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [885729514] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 16:11:34,817 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1235092686] [2022-11-23 16:11:34,818 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 16:11:34,818 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-23 16:11:34,818 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/cvc4 [2022-11-23 16:11:34,848 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-23 16:11:34,870 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt (5)] Waiting until timeout for monitored process [2022-11-23 16:11:35,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 16:11:35,742 INFO L263 TraceCheckSpWp]: Trace formula consists of 800 conjuncts, 32 conjunts are in the unsatisfiable core [2022-11-23 16:11:35,749 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 16:11:36,147 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-11-23 16:11:36,147 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 16:11:36,308 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1235092686] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 16:11:36,308 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [137699220] [2022-11-23 16:11:36,308 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 16:11:36,308 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 16:11:36,309 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/z3 [2022-11-23 16:11:36,312 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-23 16:11:36,334 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-11-23 16:11:36,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 16:11:36,758 INFO L263 TraceCheckSpWp]: Trace formula consists of 800 conjuncts, 33 conjunts are in the unsatisfiable core [2022-11-23 16:11:36,764 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 16:11:37,164 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-11-23 16:11:37,164 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 16:11:37,320 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [137699220] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 16:11:37,321 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-23 16:11:37,321 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 6] total 6 [2022-11-23 16:11:37,321 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [17027737] [2022-11-23 16:11:37,321 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-23 16:11:37,322 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-23 16:11:37,322 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-23 16:11:37,323 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-23 16:11:37,323 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2022-11-23 16:11:37,323 INFO L87 Difference]: Start difference. First operand 21 states and 24 transitions. Second operand has 6 states, 6 states have (on average 2.8333333333333335) internal successors, (17), 6 states have internal predecessors, (17), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-11-23 16:11:37,960 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 16:11:37,960 INFO L93 Difference]: Finished difference Result 36 states and 43 transitions. [2022-11-23 16:11:37,963 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-23 16:11:37,963 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 2.8333333333333335) internal successors, (17), 6 states have internal predecessors, (17), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 32 [2022-11-23 16:11:37,964 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-23 16:11:37,965 INFO L225 Difference]: With dead ends: 36 [2022-11-23 16:11:37,965 INFO L226 Difference]: Without dead ends: 34 [2022-11-23 16:11:37,966 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 107 GetRequests, 97 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=35, Invalid=55, Unknown=0, NotChecked=0, Total=90 [2022-11-23 16:11:37,967 INFO L413 NwaCegarLoop]: 19 mSDtfsCounter, 12 mSDsluCounter, 41 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 14 SdHoareTripleChecker+Valid, 60 SdHoareTripleChecker+Invalid, 42 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-11-23 16:11:37,967 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [14 Valid, 60 Invalid, 42 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-11-23 16:11:37,968 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2022-11-23 16:11:37,975 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 28. [2022-11-23 16:11:37,976 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 20 states have (on average 1.05) internal successors, (21), 20 states have internal predecessors, (21), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-11-23 16:11:37,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 33 transitions. [2022-11-23 16:11:37,977 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 33 transitions. Word has length 32 [2022-11-23 16:11:37,978 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-23 16:11:37,978 INFO L495 AbstractCegarLoop]: Abstraction has 28 states and 33 transitions. [2022-11-23 16:11:37,978 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 2.8333333333333335) internal successors, (17), 6 states have internal predecessors, (17), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-11-23 16:11:37,979 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 33 transitions. [2022-11-23 16:11:37,980 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2022-11-23 16:11:37,980 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 16:11:37,980 INFO L195 NwaCegarLoop]: trace histogram [6, 6, 6, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1] [2022-11-23 16:11:37,999 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (4)] Forceful destruction successful, exit code 0 [2022-11-23 16:11:38,208 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-11-23 16:11:38,404 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt (5)] Forceful destruction successful, exit code 0 [2022-11-23 16:11:38,599 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt [2022-11-23 16:11:38,599 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-23 16:11:38,600 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 16:11:38,600 INFO L85 PathProgramCache]: Analyzing trace with hash -220860929, now seen corresponding path program 2 times [2022-11-23 16:11:38,601 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-23 16:11:38,601 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [75251526] [2022-11-23 16:11:38,601 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-23 16:11:38,601 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-23 16:11:38,602 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/mathsat [2022-11-23 16:11:38,607 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-23 16:11:38,609 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (7)] Waiting until timeout for monitored process [2022-11-23 16:11:39,316 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-23 16:11:39,316 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-23 16:11:39,354 INFO L263 TraceCheckSpWp]: Trace formula consists of 1258 conjuncts, 37 conjunts are in the unsatisfiable core [2022-11-23 16:11:39,361 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 16:11:40,056 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 0 proven. 19 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-11-23 16:11:40,057 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 16:11:40,311 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-23 16:11:40,312 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [75251526] [2022-11-23 16:11:40,312 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [75251526] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 16:11:40,312 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [689360899] [2022-11-23 16:11:40,312 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-23 16:11:40,312 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-23 16:11:40,313 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/cvc4 [2022-11-23 16:11:40,314 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-23 16:11:40,323 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt (8)] Waiting until timeout for monitored process [2022-11-23 16:11:41,616 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-23 16:11:41,616 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-23 16:11:41,639 INFO L263 TraceCheckSpWp]: Trace formula consists of 1258 conjuncts, 40 conjunts are in the unsatisfiable core [2022-11-23 16:11:41,646 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 16:11:42,143 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 0 proven. 19 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-11-23 16:11:42,143 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 16:11:42,284 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [689360899] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 16:11:42,284 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1710525113] [2022-11-23 16:11:42,285 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-23 16:11:42,285 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 16:11:42,285 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/z3 [2022-11-23 16:11:42,286 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-23 16:11:42,294 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-11-23 16:11:42,866 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-23 16:11:42,866 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-23 16:11:42,900 INFO L263 TraceCheckSpWp]: Trace formula consists of 1258 conjuncts, 40 conjunts are in the unsatisfiable core [2022-11-23 16:11:42,907 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 16:11:43,456 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 0 proven. 19 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-11-23 16:11:43,456 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 16:11:43,633 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1710525113] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 16:11:43,633 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-23 16:11:43,633 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 7] total 7 [2022-11-23 16:11:43,633 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1301084044] [2022-11-23 16:11:43,634 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-23 16:11:43,634 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-23 16:11:43,634 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-23 16:11:43,635 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-23 16:11:43,635 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2022-11-23 16:11:43,635 INFO L87 Difference]: Start difference. First operand 28 states and 33 transitions. Second operand has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 7 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2022-11-23 16:11:44,528 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 16:11:44,529 INFO L93 Difference]: Finished difference Result 43 states and 52 transitions. [2022-11-23 16:11:44,529 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-23 16:11:44,529 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 7 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 47 [2022-11-23 16:11:44,530 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-23 16:11:44,531 INFO L225 Difference]: With dead ends: 43 [2022-11-23 16:11:44,531 INFO L226 Difference]: Without dead ends: 41 [2022-11-23 16:11:44,531 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 153 GetRequests, 141 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=44, Invalid=88, Unknown=0, NotChecked=0, Total=132 [2022-11-23 16:11:44,532 INFO L413 NwaCegarLoop]: 23 mSDtfsCounter, 16 mSDsluCounter, 78 mSDsCounter, 0 mSdLazyCounter, 75 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 18 SdHoareTripleChecker+Valid, 101 SdHoareTripleChecker+Invalid, 81 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 75 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-11-23 16:11:44,533 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [18 Valid, 101 Invalid, 81 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 75 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2022-11-23 16:11:44,533 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2022-11-23 16:11:44,549 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 35. [2022-11-23 16:11:44,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 25 states have (on average 1.04) internal successors, (26), 25 states have internal predecessors, (26), 8 states have call successors, (8), 1 states have call predecessors, (8), 1 states have return successors, (8), 8 states have call predecessors, (8), 8 states have call successors, (8) [2022-11-23 16:11:44,551 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 42 transitions. [2022-11-23 16:11:44,551 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 42 transitions. Word has length 47 [2022-11-23 16:11:44,552 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-23 16:11:44,552 INFO L495 AbstractCegarLoop]: Abstraction has 35 states and 42 transitions. [2022-11-23 16:11:44,552 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 7 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2022-11-23 16:11:44,552 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 42 transitions. [2022-11-23 16:11:44,554 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2022-11-23 16:11:44,554 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 16:11:44,554 INFO L195 NwaCegarLoop]: trace histogram [8, 8, 8, 4, 4, 4, 4, 4, 4, 4, 3, 3, 1, 1, 1, 1] [2022-11-23 16:11:44,570 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (7)] Forceful destruction successful, exit code 0 [2022-11-23 16:11:44,773 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-11-23 16:11:44,967 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt (8)] Forceful destruction successful, exit code 0 [2022-11-23 16:11:45,159 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3,9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true,8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt [2022-11-23 16:11:45,159 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-23 16:11:45,160 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 16:11:45,160 INFO L85 PathProgramCache]: Analyzing trace with hash -2090804189, now seen corresponding path program 3 times [2022-11-23 16:11:45,161 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-23 16:11:45,161 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1960444201] [2022-11-23 16:11:45,161 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-23 16:11:45,161 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-23 16:11:45,162 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/mathsat [2022-11-23 16:11:45,162 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-23 16:11:45,169 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (10)] Waiting until timeout for monitored process [2022-11-23 16:11:46,380 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2022-11-23 16:11:46,381 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-23 16:11:46,436 INFO L263 TraceCheckSpWp]: Trace formula consists of 1693 conjuncts, 45 conjunts are in the unsatisfiable core [2022-11-23 16:11:46,441 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 16:11:47,326 INFO L134 CoverageAnalysis]: Checked inductivity of 151 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2022-11-23 16:11:47,326 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 16:11:47,561 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-23 16:11:47,561 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1960444201] [2022-11-23 16:11:47,561 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1960444201] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 16:11:47,561 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [2115391861] [2022-11-23 16:11:47,562 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-23 16:11:47,562 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-23 16:11:47,562 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/cvc4 [2022-11-23 16:11:47,567 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-23 16:11:47,571 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt (11)] Waiting until timeout for monitored process [2022-11-23 16:11:49,421 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2022-11-23 16:11:49,422 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-23 16:11:49,490 INFO L263 TraceCheckSpWp]: Trace formula consists of 1693 conjuncts, 51 conjunts are in the unsatisfiable core [2022-11-23 16:11:49,498 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 16:11:50,217 INFO L134 CoverageAnalysis]: Checked inductivity of 151 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2022-11-23 16:11:50,218 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 16:11:50,373 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [2115391861] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 16:11:50,374 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2027655879] [2022-11-23 16:11:50,374 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-23 16:11:50,374 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 16:11:50,374 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/z3 [2022-11-23 16:11:50,379 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-23 16:11:50,417 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-11-23 16:11:52,520 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2022-11-23 16:11:52,521 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-23 16:11:52,567 INFO L263 TraceCheckSpWp]: Trace formula consists of 1693 conjuncts, 48 conjunts are in the unsatisfiable core [2022-11-23 16:11:52,572 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 16:11:53,300 INFO L134 CoverageAnalysis]: Checked inductivity of 151 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2022-11-23 16:11:53,300 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 16:11:53,461 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2027655879] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 16:11:53,461 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-23 16:11:53,462 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 8] total 8 [2022-11-23 16:11:53,462 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [333334422] [2022-11-23 16:11:53,462 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-23 16:11:53,462 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-23 16:11:53,463 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-23 16:11:53,463 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-23 16:11:53,463 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=66, Unknown=0, NotChecked=0, Total=90 [2022-11-23 16:11:53,463 INFO L87 Difference]: Start difference. First operand 35 states and 42 transitions. Second operand has 8 states, 8 states have (on average 3.375) internal successors, (27), 8 states have internal predecessors, (27), 4 states have call successors, (8), 1 states have call predecessors, (8), 1 states have return successors, (8), 4 states have call predecessors, (8), 4 states have call successors, (8) [2022-11-23 16:11:54,823 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 16:11:54,823 INFO L93 Difference]: Finished difference Result 50 states and 61 transitions. [2022-11-23 16:11:54,824 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-23 16:11:54,824 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 3.375) internal successors, (27), 8 states have internal predecessors, (27), 4 states have call successors, (8), 1 states have call predecessors, (8), 1 states have return successors, (8), 4 states have call predecessors, (8), 4 states have call successors, (8) Word has length 62 [2022-11-23 16:11:54,824 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-23 16:11:54,825 INFO L225 Difference]: With dead ends: 50 [2022-11-23 16:11:54,825 INFO L226 Difference]: Without dead ends: 48 [2022-11-23 16:11:54,826 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 199 GetRequests, 185 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=49, Invalid=133, Unknown=0, NotChecked=0, Total=182 [2022-11-23 16:11:54,827 INFO L413 NwaCegarLoop]: 27 mSDtfsCounter, 21 mSDsluCounter, 91 mSDsCounter, 0 mSdLazyCounter, 113 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 23 SdHoareTripleChecker+Valid, 118 SdHoareTripleChecker+Invalid, 125 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 113 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2022-11-23 16:11:54,827 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [23 Valid, 118 Invalid, 125 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 113 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2022-11-23 16:11:54,828 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2022-11-23 16:11:54,838 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 42. [2022-11-23 16:11:54,838 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 30 states have (on average 1.0333333333333334) internal successors, (31), 30 states have internal predecessors, (31), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-11-23 16:11:54,840 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 51 transitions. [2022-11-23 16:11:54,840 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 51 transitions. Word has length 62 [2022-11-23 16:11:54,840 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-23 16:11:54,840 INFO L495 AbstractCegarLoop]: Abstraction has 42 states and 51 transitions. [2022-11-23 16:11:54,841 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 3.375) internal successors, (27), 8 states have internal predecessors, (27), 4 states have call successors, (8), 1 states have call predecessors, (8), 1 states have return successors, (8), 4 states have call predecessors, (8), 4 states have call successors, (8) [2022-11-23 16:11:54,841 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 51 transitions. [2022-11-23 16:11:54,842 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2022-11-23 16:11:54,842 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 16:11:54,842 INFO L195 NwaCegarLoop]: trace histogram [10, 10, 10, 5, 5, 5, 5, 5, 5, 5, 4, 4, 1, 1, 1, 1] [2022-11-23 16:11:54,854 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt (11)] Forceful destruction successful, exit code 0 [2022-11-23 16:11:55,067 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-11-23 16:11:55,266 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (10)] Forceful destruction successful, exit code 0 [2022-11-23 16:11:55,447 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt,12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true,10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-23 16:11:55,447 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-23 16:11:55,447 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 16:11:55,448 INFO L85 PathProgramCache]: Analyzing trace with hash -497065601, now seen corresponding path program 4 times [2022-11-23 16:11:55,449 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-23 16:11:55,450 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1525126743] [2022-11-23 16:11:55,450 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-23 16:11:55,450 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-23 16:11:55,450 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/mathsat [2022-11-23 16:11:55,451 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-23 16:11:55,454 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (13)] Waiting until timeout for monitored process [2022-11-23 16:11:56,490 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-23 16:11:56,491 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-23 16:11:56,565 INFO L263 TraceCheckSpWp]: Trace formula consists of 2174 conjuncts, 52 conjunts are in the unsatisfiable core [2022-11-23 16:11:56,571 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 16:11:57,603 INFO L134 CoverageAnalysis]: Checked inductivity of 246 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2022-11-23 16:11:57,603 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 16:11:57,841 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-23 16:11:57,841 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1525126743] [2022-11-23 16:11:57,841 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1525126743] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 16:11:57,841 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [48507602] [2022-11-23 16:11:57,841 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-23 16:11:57,842 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-23 16:11:57,842 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/cvc4 [2022-11-23 16:11:57,843 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-23 16:11:57,844 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt (14)] Waiting until timeout for monitored process [2022-11-23 16:11:59,811 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-23 16:11:59,811 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-23 16:11:59,905 INFO L263 TraceCheckSpWp]: Trace formula consists of 2174 conjuncts, 54 conjunts are in the unsatisfiable core [2022-11-23 16:11:59,912 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 16:12:00,843 INFO L134 CoverageAnalysis]: Checked inductivity of 246 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2022-11-23 16:12:00,844 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 16:12:01,007 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [48507602] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 16:12:01,007 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [457189298] [2022-11-23 16:12:01,008 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-23 16:12:01,008 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 16:12:01,008 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/z3 [2022-11-23 16:12:01,010 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-23 16:12:01,012 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-11-23 16:12:01,823 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-23 16:12:01,823 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-23 16:12:01,876 INFO L263 TraceCheckSpWp]: Trace formula consists of 2174 conjuncts, 55 conjunts are in the unsatisfiable core [2022-11-23 16:12:01,888 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 16:12:02,970 INFO L134 CoverageAnalysis]: Checked inductivity of 246 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2022-11-23 16:12:02,971 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 16:12:03,150 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [457189298] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 16:12:03,151 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-23 16:12:03,151 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 9] total 9 [2022-11-23 16:12:03,151 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1196999091] [2022-11-23 16:12:03,151 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-23 16:12:03,152 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-11-23 16:12:03,152 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-23 16:12:03,153 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-11-23 16:12:03,153 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2022-11-23 16:12:03,154 INFO L87 Difference]: Start difference. First operand 42 states and 51 transitions. Second operand has 9 states, 9 states have (on average 3.5555555555555554) internal successors, (32), 9 states have internal predecessors, (32), 5 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 5 states have call predecessors, (10), 5 states have call successors, (10) [2022-11-23 16:12:05,366 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 16:12:05,366 INFO L93 Difference]: Finished difference Result 57 states and 70 transitions. [2022-11-23 16:12:05,370 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-23 16:12:05,370 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 3.5555555555555554) internal successors, (32), 9 states have internal predecessors, (32), 5 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 5 states have call predecessors, (10), 5 states have call successors, (10) Word has length 77 [2022-11-23 16:12:05,380 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-23 16:12:05,380 INFO L225 Difference]: With dead ends: 57 [2022-11-23 16:12:05,381 INFO L226 Difference]: Without dead ends: 55 [2022-11-23 16:12:05,381 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 245 GetRequests, 229 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=58, Invalid=182, Unknown=0, NotChecked=0, Total=240 [2022-11-23 16:12:05,382 INFO L413 NwaCegarLoop]: 31 mSDtfsCounter, 23 mSDsluCounter, 138 mSDsCounter, 0 mSdLazyCounter, 212 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 25 SdHoareTripleChecker+Valid, 169 SdHoareTripleChecker+Invalid, 224 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 212 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.9s IncrementalHoareTripleChecker+Time [2022-11-23 16:12:05,384 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [25 Valid, 169 Invalid, 224 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 212 Invalid, 0 Unknown, 0 Unchecked, 1.9s Time] [2022-11-23 16:12:05,385 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2022-11-23 16:12:05,399 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 49. [2022-11-23 16:12:05,400 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 49 states, 35 states have (on average 1.0285714285714285) internal successors, (36), 35 states have internal predecessors, (36), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2022-11-23 16:12:05,401 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 60 transitions. [2022-11-23 16:12:05,401 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 60 transitions. Word has length 77 [2022-11-23 16:12:05,402 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-23 16:12:05,402 INFO L495 AbstractCegarLoop]: Abstraction has 49 states and 60 transitions. [2022-11-23 16:12:05,402 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 3.5555555555555554) internal successors, (32), 9 states have internal predecessors, (32), 5 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 5 states have call predecessors, (10), 5 states have call successors, (10) [2022-11-23 16:12:05,402 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 60 transitions. [2022-11-23 16:12:05,404 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2022-11-23 16:12:05,404 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 16:12:05,404 INFO L195 NwaCegarLoop]: trace histogram [12, 12, 12, 6, 6, 6, 6, 6, 6, 6, 5, 5, 1, 1, 1, 1] [2022-11-23 16:12:05,430 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (13)] Ended with exit code 0 [2022-11-23 16:12:05,630 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Ended with exit code 0 [2022-11-23 16:12:05,820 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt (14)] Forceful destruction successful, exit code 0 [2022-11-23 16:12:06,007 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3,15 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true,14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt [2022-11-23 16:12:06,007 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-23 16:12:06,007 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 16:12:06,008 INFO L85 PathProgramCache]: Analyzing trace with hash -1068369757, now seen corresponding path program 5 times [2022-11-23 16:12:06,010 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-23 16:12:06,010 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1539220718] [2022-11-23 16:12:06,011 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-23 16:12:06,011 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-23 16:12:06,011 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/mathsat [2022-11-23 16:12:06,012 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-23 16:12:06,018 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (16)] Waiting until timeout for monitored process [2022-11-23 16:12:07,660 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 9 check-sat command(s) [2022-11-23 16:12:07,660 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-23 16:12:07,744 INFO L263 TraceCheckSpWp]: Trace formula consists of 2632 conjuncts, 59 conjunts are in the unsatisfiable core [2022-11-23 16:12:07,753 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 16:12:09,097 INFO L134 CoverageAnalysis]: Checked inductivity of 364 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 264 trivial. 0 not checked. [2022-11-23 16:12:09,097 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 16:12:09,395 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-23 16:12:09,395 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1539220718] [2022-11-23 16:12:09,395 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1539220718] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 16:12:09,395 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1705237705] [2022-11-23 16:12:09,395 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-23 16:12:09,396 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-23 16:12:09,396 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/cvc4 [2022-11-23 16:12:09,397 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-23 16:12:09,400 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt (17)] Waiting until timeout for monitored process [2022-11-23 16:12:15,539 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 9 check-sat command(s) [2022-11-23 16:12:15,539 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-23 16:12:15,663 INFO L263 TraceCheckSpWp]: Trace formula consists of 2632 conjuncts, 64 conjunts are in the unsatisfiable core [2022-11-23 16:12:15,672 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 16:12:16,730 INFO L134 CoverageAnalysis]: Checked inductivity of 364 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 264 trivial. 0 not checked. [2022-11-23 16:12:16,730 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 16:12:16,887 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1705237705] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 16:12:16,887 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [612410] [2022-11-23 16:12:16,887 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-23 16:12:16,887 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 16:12:16,888 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/z3 [2022-11-23 16:12:16,889 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-23 16:12:16,891 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-11-23 16:12:57,389 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 9 check-sat command(s) [2022-11-23 16:12:57,390 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-23 16:12:57,462 INFO L263 TraceCheckSpWp]: Trace formula consists of 2632 conjuncts, 62 conjunts are in the unsatisfiable core [2022-11-23 16:12:57,467 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 16:12:58,503 INFO L134 CoverageAnalysis]: Checked inductivity of 364 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 264 trivial. 0 not checked. [2022-11-23 16:12:58,503 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 16:12:58,687 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [612410] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 16:12:58,687 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-23 16:12:58,687 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 10] total 10 [2022-11-23 16:12:58,687 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1864902515] [2022-11-23 16:12:58,687 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-23 16:12:58,688 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-11-23 16:12:58,688 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-23 16:12:58,688 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-11-23 16:12:58,689 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=102, Unknown=0, NotChecked=0, Total=132 [2022-11-23 16:12:58,689 INFO L87 Difference]: Start difference. First operand 49 states and 60 transitions. Second operand has 10 states, 10 states have (on average 3.7) internal successors, (37), 10 states have internal predecessors, (37), 6 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 6 states have call predecessors, (12), 6 states have call successors, (12) [2022-11-23 16:13:01,488 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 16:13:01,489 INFO L93 Difference]: Finished difference Result 64 states and 79 transitions. [2022-11-23 16:13:01,489 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-23 16:13:01,489 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 3.7) internal successors, (37), 10 states have internal predecessors, (37), 6 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 6 states have call predecessors, (12), 6 states have call successors, (12) Word has length 92 [2022-11-23 16:13:01,490 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-23 16:13:01,490 INFO L225 Difference]: With dead ends: 64 [2022-11-23 16:13:01,490 INFO L226 Difference]: Without dead ends: 62 [2022-11-23 16:13:01,491 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 291 GetRequests, 273 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=67, Invalid=239, Unknown=0, NotChecked=0, Total=306 [2022-11-23 16:13:01,492 INFO L413 NwaCegarLoop]: 35 mSDtfsCounter, 27 mSDsluCounter, 174 mSDsCounter, 0 mSdLazyCounter, 295 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 29 SdHoareTripleChecker+Valid, 209 SdHoareTripleChecker+Invalid, 310 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 295 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.5s IncrementalHoareTripleChecker+Time [2022-11-23 16:13:01,492 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [29 Valid, 209 Invalid, 310 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 295 Invalid, 0 Unknown, 0 Unchecked, 2.5s Time] [2022-11-23 16:13:01,493 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62 states. [2022-11-23 16:13:01,505 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62 to 56. [2022-11-23 16:13:01,506 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 56 states, 40 states have (on average 1.025) internal successors, (41), 40 states have internal predecessors, (41), 14 states have call successors, (14), 1 states have call predecessors, (14), 1 states have return successors, (14), 14 states have call predecessors, (14), 14 states have call successors, (14) [2022-11-23 16:13:01,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 69 transitions. [2022-11-23 16:13:01,507 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 69 transitions. Word has length 92 [2022-11-23 16:13:01,507 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-23 16:13:01,507 INFO L495 AbstractCegarLoop]: Abstraction has 56 states and 69 transitions. [2022-11-23 16:13:01,508 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 3.7) internal successors, (37), 10 states have internal predecessors, (37), 6 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 6 states have call predecessors, (12), 6 states have call successors, (12) [2022-11-23 16:13:01,508 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 69 transitions. [2022-11-23 16:13:01,511 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2022-11-23 16:13:01,511 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 16:13:01,511 INFO L195 NwaCegarLoop]: trace histogram [14, 14, 14, 7, 7, 7, 7, 7, 7, 7, 6, 6, 1, 1, 1, 1] [2022-11-23 16:13:01,543 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (16)] Forceful destruction successful, exit code 0 [2022-11-23 16:13:01,746 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Forceful destruction successful, exit code 0 [2022-11-23 16:13:01,928 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt (17)] Forceful destruction successful, exit code 0 [2022-11-23 16:13:02,112 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3,18 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true,17 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt [2022-11-23 16:13:02,112 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-23 16:13:02,113 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 16:13:02,113 INFO L85 PathProgramCache]: Analyzing trace with hash -1031686913, now seen corresponding path program 6 times [2022-11-23 16:13:02,114 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-23 16:13:02,115 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1395631943] [2022-11-23 16:13:02,115 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-11-23 16:13:02,115 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-23 16:13:02,115 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/mathsat [2022-11-23 16:13:02,116 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-23 16:13:02,117 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (19)] Waiting until timeout for monitored process [2022-11-23 16:13:04,649 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2022-11-23 16:13:04,649 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-23 16:13:04,764 INFO L263 TraceCheckSpWp]: Trace formula consists of 3067 conjuncts, 1204 conjunts are in the unsatisfiable core [2022-11-23 16:13:04,794 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 16:16:01,713 WARN L233 SmtUtils]: Spent 8.93s on a formula simplification. DAG size of input: 1382 DAG size of output: 1248 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-23 16:16:17,138 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-23 16:16:17,138 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1395631943] [2022-11-23 16:16:17,138 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_DEPENDING: line 381347 column 7: push canceled [2022-11-23 16:16:17,138 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [286846041] [2022-11-23 16:16:17,139 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-11-23 16:16:17,139 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-23 16:16:17,139 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/cvc4 [2022-11-23 16:16:17,142 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-23 16:16:17,144 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt (20)] Waiting until timeout for monitored process [2022-11-23 16:16:24,799 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2022-11-23 16:16:24,800 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-23 16:16:24,950 INFO L263 TraceCheckSpWp]: Trace formula consists of 3067 conjuncts, 1247 conjunts are in the unsatisfiable core [2022-11-23 16:16:24,974 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 16:16:25,008 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_DEPENDING: Function ULTIMATE.start_main_~mask_SORT_23~0#1 is already defined. [2022-11-23 16:16:25,008 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1020524019] [2022-11-23 16:16:25,008 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-11-23 16:16:25,009 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 16:16:25,009 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/z3 [2022-11-23 16:16:25,010 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-23 16:16:25,014 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2022-11-23 16:16:30,137 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2022-11-23 16:16:30,137 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-23 16:16:30,224 INFO L263 TraceCheckSpWp]: Trace formula consists of 3067 conjuncts, 1236 conjunts are in the unsatisfiable core [2022-11-23 16:16:30,245 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 16:16:30,272 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_DEPENDING: Function ULTIMATE.start_main_~mask_SORT_23~0#1 is already defined. [2022-11-23 16:16:30,272 INFO L184 FreeRefinementEngine]: Found 0 perfect and 0 imperfect interpolant sequences. [2022-11-23 16:16:30,272 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [] total 0 [2022-11-23 16:16:30,272 ERROR L170 FreeRefinementEngine]: Strategy WALRUS failed to provide any proof altough trace is infeasible [2022-11-23 16:16:30,273 INFO L359 BasicCegarLoop]: Counterexample might be feasible [2022-11-23 16:16:30,279 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-11-23 16:16:30,332 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (19)] Forceful destruction successful, exit code 0 [2022-11-23 16:16:30,521 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt (20)] Forceful destruction successful, exit code 0 [2022-11-23 16:16:30,738 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Forceful destruction successful, exit code 0 [2022-11-23 16:16:30,903 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 19 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3,20 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/cvc4 --incremental --print-success --lang smt,21 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 16:16:30,905 INFO L444 BasicCegarLoop]: Path program histogram: [6, 1, 1] [2022-11-23 16:16:30,908 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-23 16:16:30,953 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-23 16:16:30,954 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-23 16:16:30,954 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-23 16:16:30,954 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-23 16:16:30,955 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-23 16:16:30,955 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-23 16:16:30,955 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-23 16:16:31,070 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 23.11 04:16:31 BoogieIcfgContainer [2022-11-23 16:16:31,072 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-23 16:16:31,072 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-23 16:16:31,072 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-23 16:16:31,073 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-23 16:16:31,073 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 04:11:31" (3/4) ... [2022-11-23 16:16:31,078 INFO L140 WitnessPrinter]: No result that supports witness generation found [2022-11-23 16:16:31,078 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-23 16:16:31,078 INFO L158 Benchmark]: Toolchain (without parser) took 301997.87ms. Allocated memory was 81.8MB in the beginning and 453.0MB in the end (delta: 371.2MB). Free memory was 40.9MB in the beginning and 157.4MB in the end (delta: -116.5MB). Peak memory consumption was 256.4MB. Max. memory is 16.1GB. [2022-11-23 16:16:31,079 INFO L158 Benchmark]: CDTParser took 0.22ms. Allocated memory is still 81.8MB. Free memory is still 60.1MB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-23 16:16:31,079 INFO L158 Benchmark]: CACSL2BoogieTranslator took 657.25ms. Allocated memory is still 81.8MB. Free memory was 40.6MB in the beginning and 41.0MB in the end (delta: -309.6kB). Peak memory consumption was 12.7MB. Max. memory is 16.1GB. [2022-11-23 16:16:31,079 INFO L158 Benchmark]: Boogie Procedure Inliner took 118.34ms. Allocated memory is still 81.8MB. Free memory was 41.0MB in the beginning and 35.5MB in the end (delta: 5.4MB). Peak memory consumption was 6.3MB. Max. memory is 16.1GB. [2022-11-23 16:16:31,080 INFO L158 Benchmark]: Boogie Preprocessor took 58.28ms. Allocated memory is still 81.8MB. Free memory was 35.5MB in the beginning and 32.1MB in the end (delta: 3.4MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-11-23 16:16:31,081 INFO L158 Benchmark]: RCFGBuilder took 1396.13ms. Allocated memory was 81.8MB in the beginning and 115.3MB in the end (delta: 33.6MB). Free memory was 32.0MB in the beginning and 80.5MB in the end (delta: -48.6MB). Peak memory consumption was 16.9MB. Max. memory is 16.1GB. [2022-11-23 16:16:31,081 INFO L158 Benchmark]: TraceAbstraction took 299753.14ms. Allocated memory was 115.3MB in the beginning and 453.0MB in the end (delta: 337.6MB). Free memory was 80.1MB in the beginning and 158.4MB in the end (delta: -78.3MB). Peak memory consumption was 260.4MB. Max. memory is 16.1GB. [2022-11-23 16:16:31,081 INFO L158 Benchmark]: Witness Printer took 5.64ms. Allocated memory is still 453.0MB. Free memory was 158.4MB in the beginning and 157.4MB in the end (delta: 1.0MB). There was no memory consumed. Max. memory is 16.1GB. [2022-11-23 16:16:31,084 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.22ms. Allocated memory is still 81.8MB. Free memory is still 60.1MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 657.25ms. Allocated memory is still 81.8MB. Free memory was 40.6MB in the beginning and 41.0MB in the end (delta: -309.6kB). Peak memory consumption was 12.7MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 118.34ms. Allocated memory is still 81.8MB. Free memory was 41.0MB in the beginning and 35.5MB in the end (delta: 5.4MB). Peak memory consumption was 6.3MB. Max. memory is 16.1GB. * Boogie Preprocessor took 58.28ms. Allocated memory is still 81.8MB. Free memory was 35.5MB in the beginning and 32.1MB in the end (delta: 3.4MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * RCFGBuilder took 1396.13ms. Allocated memory was 81.8MB in the beginning and 115.3MB in the end (delta: 33.6MB). Free memory was 32.0MB in the beginning and 80.5MB in the end (delta: -48.6MB). Peak memory consumption was 16.9MB. Max. memory is 16.1GB. * TraceAbstraction took 299753.14ms. Allocated memory was 115.3MB in the beginning and 453.0MB in the end (delta: 337.6MB). Free memory was 80.1MB in the beginning and 158.4MB in the end (delta: -78.3MB). Peak memory consumption was 260.4MB. Max. memory is 16.1GB. * Witness Printer took 5.64ms. Allocated memory is still 453.0MB. Free memory was 158.4MB in the beginning and 157.4MB in the end (delta: 1.0MB). There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 20]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: unable to decide satisfiability of path constraint. Possible FailurePath: [L25] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L26] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L28] const SORT_9 mask_SORT_9 = (SORT_9)-1 >> (sizeof(SORT_9) * 8 - 31); [L29] const SORT_9 msb_SORT_9 = (SORT_9)1 << (31 - 1); [L31] const SORT_11 mask_SORT_11 = (SORT_11)-1 >> (sizeof(SORT_11) * 8 - 16); [L32] const SORT_11 msb_SORT_11 = (SORT_11)1 << (16 - 1); [L34] const SORT_12 mask_SORT_12 = (SORT_12)-1 >> (sizeof(SORT_12) * 8 - 3); [L35] const SORT_12 msb_SORT_12 = (SORT_12)1 << (3 - 1); [L37] const SORT_15 mask_SORT_15 = (SORT_15)-1 >> (sizeof(SORT_15) * 8 - 4); [L38] const SORT_15 msb_SORT_15 = (SORT_15)1 << (4 - 1); [L40] const SORT_17 mask_SORT_17 = (SORT_17)-1 >> (sizeof(SORT_17) * 8 - 5); [L41] const SORT_17 msb_SORT_17 = (SORT_17)1 << (5 - 1); [L43] const SORT_19 mask_SORT_19 = (SORT_19)-1 >> (sizeof(SORT_19) * 8 - 6); [L44] const SORT_19 msb_SORT_19 = (SORT_19)1 << (6 - 1); [L46] const SORT_21 mask_SORT_21 = (SORT_21)-1 >> (sizeof(SORT_21) * 8 - 7); [L47] const SORT_21 msb_SORT_21 = (SORT_21)1 << (7 - 1); [L49] const SORT_23 mask_SORT_23 = (SORT_23)-1 >> (sizeof(SORT_23) * 8 - 8); [L50] const SORT_23 msb_SORT_23 = (SORT_23)1 << (8 - 1); [L52] const SORT_25 mask_SORT_25 = (SORT_25)-1 >> (sizeof(SORT_25) * 8 - 9); [L53] const SORT_25 msb_SORT_25 = (SORT_25)1 << (9 - 1); [L55] const SORT_27 mask_SORT_27 = (SORT_27)-1 >> (sizeof(SORT_27) * 8 - 10); [L56] const SORT_27 msb_SORT_27 = (SORT_27)1 << (10 - 1); [L58] const SORT_29 mask_SORT_29 = (SORT_29)-1 >> (sizeof(SORT_29) * 8 - 11); [L59] const SORT_29 msb_SORT_29 = (SORT_29)1 << (11 - 1); [L61] const SORT_31 mask_SORT_31 = (SORT_31)-1 >> (sizeof(SORT_31) * 8 - 12); [L62] const SORT_31 msb_SORT_31 = (SORT_31)1 << (12 - 1); [L64] const SORT_33 mask_SORT_33 = (SORT_33)-1 >> (sizeof(SORT_33) * 8 - 13); [L65] const SORT_33 msb_SORT_33 = (SORT_33)1 << (13 - 1); [L67] const SORT_35 mask_SORT_35 = (SORT_35)-1 >> (sizeof(SORT_35) * 8 - 14); [L68] const SORT_35 msb_SORT_35 = (SORT_35)1 << (14 - 1); [L70] const SORT_37 mask_SORT_37 = (SORT_37)-1 >> (sizeof(SORT_37) * 8 - 15); [L71] const SORT_37 msb_SORT_37 = (SORT_37)1 << (15 - 1); [L73] const SORT_62 mask_SORT_62 = (SORT_62)-1 >> (sizeof(SORT_62) * 8 - 32); [L74] const SORT_62 msb_SORT_62 = (SORT_62)1 << (32 - 1); [L76] const SORT_65 mask_SORT_65 = (SORT_65)-1 >> (sizeof(SORT_65) * 8 - 17); [L77] const SORT_65 msb_SORT_65 = (SORT_65)1 << (17 - 1); [L79] const SORT_68 mask_SORT_68 = (SORT_68)-1 >> (sizeof(SORT_68) * 8 - 18); [L80] const SORT_68 msb_SORT_68 = (SORT_68)1 << (18 - 1); [L82] const SORT_71 mask_SORT_71 = (SORT_71)-1 >> (sizeof(SORT_71) * 8 - 19); [L83] const SORT_71 msb_SORT_71 = (SORT_71)1 << (19 - 1); [L85] const SORT_74 mask_SORT_74 = (SORT_74)-1 >> (sizeof(SORT_74) * 8 - 20); [L86] const SORT_74 msb_SORT_74 = (SORT_74)1 << (20 - 1); [L88] const SORT_77 mask_SORT_77 = (SORT_77)-1 >> (sizeof(SORT_77) * 8 - 21); [L89] const SORT_77 msb_SORT_77 = (SORT_77)1 << (21 - 1); [L91] const SORT_80 mask_SORT_80 = (SORT_80)-1 >> (sizeof(SORT_80) * 8 - 22); [L92] const SORT_80 msb_SORT_80 = (SORT_80)1 << (22 - 1); [L94] const SORT_83 mask_SORT_83 = (SORT_83)-1 >> (sizeof(SORT_83) * 8 - 23); [L95] const SORT_83 msb_SORT_83 = (SORT_83)1 << (23 - 1); [L97] const SORT_86 mask_SORT_86 = (SORT_86)-1 >> (sizeof(SORT_86) * 8 - 24); [L98] const SORT_86 msb_SORT_86 = (SORT_86)1 << (24 - 1); [L100] const SORT_89 mask_SORT_89 = (SORT_89)-1 >> (sizeof(SORT_89) * 8 - 25); [L101] const SORT_89 msb_SORT_89 = (SORT_89)1 << (25 - 1); [L103] const SORT_92 mask_SORT_92 = (SORT_92)-1 >> (sizeof(SORT_92) * 8 - 26); [L104] const SORT_92 msb_SORT_92 = (SORT_92)1 << (26 - 1); [L106] const SORT_95 mask_SORT_95 = (SORT_95)-1 >> (sizeof(SORT_95) * 8 - 27); [L107] const SORT_95 msb_SORT_95 = (SORT_95)1 << (27 - 1); [L109] const SORT_98 mask_SORT_98 = (SORT_98)-1 >> (sizeof(SORT_98) * 8 - 28); [L110] const SORT_98 msb_SORT_98 = (SORT_98)1 << (28 - 1); [L112] const SORT_101 mask_SORT_101 = (SORT_101)-1 >> (sizeof(SORT_101) * 8 - 29); [L113] const SORT_101 msb_SORT_101 = (SORT_101)1 << (29 - 1); [L115] const SORT_104 mask_SORT_104 = (SORT_104)-1 >> (sizeof(SORT_104) * 8 - 30); [L116] const SORT_104 msb_SORT_104 = (SORT_104)1 << (30 - 1); [L118] const SORT_153 mask_SORT_153 = (SORT_153)-1 >> (sizeof(SORT_153) * 8 - 2); [L119] const SORT_153 msb_SORT_153 = (SORT_153)1 << (2 - 1); [L121] const SORT_1 var_7 = 0; [L122] const SORT_1 var_8 = 1; [L123] const SORT_9 var_10 = 0; [L124] const SORT_12 var_13 = 4; [L125] const SORT_12 var_114 = 5; [L126] const SORT_11 var_116 = 0; [L127] const SORT_11 var_150 = 64; [L128] const SORT_153 var_154 = 1; [L129] const SORT_23 var_189 = 127; [L130] const SORT_11 var_197 = 1; [L131] const SORT_11 var_199 = 127; [L132] const SORT_12 var_247 = 6; [L133] const SORT_15 var_251 = 9; [L134] const SORT_21 var_269 = 64; [L135] const SORT_12 var_282 = 0; [L136] const SORT_15 var_285 = 0; [L138] SORT_1 input_2; [L139] SORT_1 input_3; [L140] SORT_1 input_4; [L142] SORT_1 state_5 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L143] SORT_1 state_40 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L144] SORT_11 state_56 = __VERIFIER_nondet_ushort() & mask_SORT_11; [L145] SORT_1 state_58 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L146] SORT_11 state_117 = __VERIFIER_nondet_ushort() & mask_SORT_11; [L147] SORT_15 state_137 = __VERIFIER_nondet_uchar() & mask_SORT_15; [L148] SORT_15 state_140 = __VERIFIER_nondet_uchar() & mask_SORT_15; [L149] SORT_11 state_144 = __VERIFIER_nondet_ushort() & mask_SORT_11; [L151] SORT_11 init_118_arg_1 = var_116; [L152] state_117 = init_118_arg_1 [L155] input_2 = __VERIFIER_nondet_uchar() [L156] input_3 = __VERIFIER_nondet_uchar() [L157] input_3 = input_3 & mask_SORT_1 [L158] input_4 = __VERIFIER_nondet_uchar() [L159] input_4 = input_4 & mask_SORT_1 [L161] SORT_1 var_125_arg_0 = state_5; [L162] SORT_1 var_125 = ~var_125_arg_0; [L163] SORT_1 var_126_arg_0 = var_125; [L164] SORT_1 var_126 = ~var_126_arg_0; [L165] SORT_1 var_127_arg_0 = state_5; [L166] SORT_1 var_127_arg_1 = var_126; [L167] SORT_1 var_127 = var_127_arg_0 | var_127_arg_1; [L168] var_127 = var_127 & mask_SORT_1 [L169] SORT_1 constr_128_arg_0 = var_127; [L170] CALL assume_abort_if_not(constr_128_arg_0) [L21] COND FALSE !(!cond) [L170] RET assume_abort_if_not(constr_128_arg_0) [L171] SORT_1 var_129_arg_0 = var_8; [L172] var_129_arg_0 = var_129_arg_0 & mask_SORT_1 [L173] SORT_11 var_129 = var_129_arg_0; [L174] SORT_11 var_130_arg_0 = state_117; [L175] SORT_11 var_130_arg_1 = var_129; [L176] SORT_1 var_130 = var_130_arg_0 <= var_130_arg_1; [L177] SORT_1 var_131_arg_0 = input_4; [L178] SORT_1 var_131_arg_1 = var_130; [L179] SORT_1 var_131 = var_131_arg_0 ^ var_131_arg_1; [L180] SORT_1 var_132_arg_0 = var_131; [L181] SORT_1 var_132 = ~var_132_arg_0; [L182] SORT_1 var_133_arg_0 = var_131; [L183] SORT_1 var_133 = ~var_133_arg_0; [L184] SORT_1 var_134_arg_0 = var_132; [L185] SORT_1 var_134_arg_1 = var_133; [L186] SORT_1 var_134 = var_134_arg_0 | var_134_arg_1; [L187] var_134 = var_134 & mask_SORT_1 [L188] SORT_1 constr_135_arg_0 = var_134; [L189] CALL assume_abort_if_not(constr_135_arg_0) [L21] COND FALSE !(!cond) [L189] RET assume_abort_if_not(constr_135_arg_0) [L191] SORT_12 var_115_arg_0 = var_114; [L192] var_115_arg_0 = var_115_arg_0 & mask_SORT_12 [L193] SORT_11 var_115 = var_115_arg_0; [L194] SORT_11 var_119_arg_0 = var_115; [L195] SORT_11 var_119_arg_1 = state_117; [L196] SORT_1 var_119 = var_119_arg_0 < var_119_arg_1; [L197] SORT_1 var_14_arg_0 = input_3; [L198] SORT_1 var_14 = ~var_14_arg_0; [L199] SORT_1 var_16_arg_0 = var_14; [L200] SORT_12 var_16_arg_1 = var_13; [L201] SORT_15 var_16 = ((SORT_15)var_16_arg_0 << 3) | var_16_arg_1; [L202] var_16 = var_16 & mask_SORT_15 [L203] SORT_1 var_18_arg_0 = input_3; [L204] SORT_15 var_18_arg_1 = var_16; [L205] SORT_17 var_18 = ((SORT_17)var_18_arg_0 << 4) | var_18_arg_1; [L206] var_18 = var_18 & mask_SORT_17 [L207] SORT_1 var_20_arg_0 = input_3; [L208] SORT_17 var_20_arg_1 = var_18; [L209] SORT_19 var_20 = ((SORT_19)var_20_arg_0 << 5) | var_20_arg_1; [L210] var_20 = var_20 & mask_SORT_19 [L211] SORT_1 var_22_arg_0 = input_3; [L212] SORT_19 var_22_arg_1 = var_20; [L213] SORT_21 var_22 = ((SORT_21)var_22_arg_0 << 6) | var_22_arg_1; [L214] var_22 = var_22 & mask_SORT_21 [L215] SORT_1 var_24_arg_0 = input_3; [L216] SORT_21 var_24_arg_1 = var_22; [L217] SORT_23 var_24 = ((SORT_23)var_24_arg_0 << 7) | var_24_arg_1; [L218] var_24 = var_24 & mask_SORT_23 [L219] SORT_1 var_26_arg_0 = input_3; [L220] SORT_23 var_26_arg_1 = var_24; [L221] SORT_25 var_26 = ((SORT_25)var_26_arg_0 << 8) | var_26_arg_1; [L222] var_26 = var_26 & mask_SORT_25 [L223] SORT_1 var_28_arg_0 = var_14; [L224] SORT_25 var_28_arg_1 = var_26; [L225] SORT_27 var_28 = ((SORT_27)var_28_arg_0 << 9) | var_28_arg_1; [L226] var_28 = var_28 & mask_SORT_27 [L227] SORT_1 var_30_arg_0 = var_14; [L228] SORT_27 var_30_arg_1 = var_28; [L229] SORT_29 var_30 = ((SORT_29)var_30_arg_0 << 10) | var_30_arg_1; [L230] var_30 = var_30 & mask_SORT_29 [L231] SORT_1 var_32_arg_0 = var_14; [L232] SORT_29 var_32_arg_1 = var_30; [L233] SORT_31 var_32 = ((SORT_31)var_32_arg_0 << 11) | var_32_arg_1; [L234] var_32 = var_32 & mask_SORT_31 [L235] SORT_1 var_34_arg_0 = var_14; [L236] SORT_31 var_34_arg_1 = var_32; [L237] SORT_33 var_34 = ((SORT_33)var_34_arg_0 << 12) | var_34_arg_1; [L238] var_34 = var_34 & mask_SORT_33 [L239] SORT_1 var_36_arg_0 = var_14; [L240] SORT_33 var_36_arg_1 = var_34; [L241] SORT_35 var_36 = ((SORT_35)var_36_arg_0 << 13) | var_36_arg_1; [L242] var_36 = var_36 & mask_SORT_35 [L243] SORT_1 var_38_arg_0 = var_14; [L244] SORT_35 var_38_arg_1 = var_36; [L245] SORT_37 var_38 = ((SORT_37)var_38_arg_0 << 14) | var_38_arg_1; [L246] var_38 = var_38 & mask_SORT_37 [L247] SORT_1 var_39_arg_0 = var_14; [L248] SORT_37 var_39_arg_1 = var_38; [L249] SORT_11 var_39 = ((SORT_11)var_39_arg_0 << 15) | var_39_arg_1; [L250] SORT_1 var_41_arg_0 = state_40; [L251] SORT_1 var_41 = ~var_41_arg_0; [L252] SORT_1 var_42_arg_0 = state_40; [L253] SORT_12 var_42_arg_1 = var_13; [L254] SORT_15 var_42 = ((SORT_15)var_42_arg_0 << 3) | var_42_arg_1; [L255] var_42 = var_42 & mask_SORT_15 [L256] SORT_1 var_43_arg_0 = var_41; [L257] SORT_15 var_43_arg_1 = var_42; [L258] SORT_17 var_43 = ((SORT_17)var_43_arg_0 << 4) | var_43_arg_1; [L259] var_43 = var_43 & mask_SORT_17 [L260] SORT_1 var_44_arg_0 = state_40; [L261] SORT_17 var_44_arg_1 = var_43; [L262] SORT_19 var_44 = ((SORT_19)var_44_arg_0 << 5) | var_44_arg_1; [L263] var_44 = var_44 & mask_SORT_19 [L264] SORT_1 var_45_arg_0 = var_41; [L265] SORT_19 var_45_arg_1 = var_44; [L266] SORT_21 var_45 = ((SORT_21)var_45_arg_0 << 6) | var_45_arg_1; [L267] var_45 = var_45 & mask_SORT_21 [L268] SORT_1 var_46_arg_0 = var_41; [L269] SORT_21 var_46_arg_1 = var_45; [L270] SORT_23 var_46 = ((SORT_23)var_46_arg_0 << 7) | var_46_arg_1; [L271] var_46 = var_46 & mask_SORT_23 [L272] SORT_1 var_47_arg_0 = state_40; [L273] SORT_23 var_47_arg_1 = var_46; [L274] SORT_25 var_47 = ((SORT_25)var_47_arg_0 << 8) | var_47_arg_1; [L275] var_47 = var_47 & mask_SORT_25 [L276] SORT_1 var_48_arg_0 = var_41; [L277] SORT_25 var_48_arg_1 = var_47; [L278] SORT_27 var_48 = ((SORT_27)var_48_arg_0 << 9) | var_48_arg_1; [L279] var_48 = var_48 & mask_SORT_27 [L280] SORT_1 var_49_arg_0 = var_41; [L281] SORT_27 var_49_arg_1 = var_48; [L282] SORT_29 var_49 = ((SORT_29)var_49_arg_0 << 10) | var_49_arg_1; [L283] var_49 = var_49 & mask_SORT_29 [L284] SORT_1 var_50_arg_0 = var_41; [L285] SORT_29 var_50_arg_1 = var_49; [L286] SORT_31 var_50 = ((SORT_31)var_50_arg_0 << 11) | var_50_arg_1; [L287] var_50 = var_50 & mask_SORT_31 [L288] SORT_1 var_51_arg_0 = var_41; [L289] SORT_31 var_51_arg_1 = var_50; [L290] SORT_33 var_51 = ((SORT_33)var_51_arg_0 << 12) | var_51_arg_1; [L291] var_51 = var_51 & mask_SORT_33 [L292] SORT_1 var_52_arg_0 = var_41; [L293] SORT_33 var_52_arg_1 = var_51; [L294] SORT_35 var_52 = ((SORT_35)var_52_arg_0 << 13) | var_52_arg_1; [L295] var_52 = var_52 & mask_SORT_35 [L296] SORT_1 var_53_arg_0 = var_41; [L297] SORT_35 var_53_arg_1 = var_52; [L298] SORT_37 var_53 = ((SORT_37)var_53_arg_0 << 14) | var_53_arg_1; [L299] var_53 = var_53 & mask_SORT_37 [L300] SORT_1 var_54_arg_0 = var_41; [L301] SORT_37 var_54_arg_1 = var_53; [L302] SORT_11 var_54 = ((SORT_11)var_54_arg_0 << 15) | var_54_arg_1; [L303] SORT_11 var_55_arg_0 = var_39; [L304] SORT_11 var_55_arg_1 = var_54; [L305] SORT_11 var_55 = var_55_arg_0 + var_55_arg_1; [L306] SORT_11 var_57_arg_0 = state_56; [L307] SORT_11 var_57 = -var_57_arg_0; [L308] SORT_1 var_59_arg_0 = state_58; [L309] SORT_11 var_59_arg_1 = var_57; [L310] SORT_11 var_59_arg_2 = state_56; [L311] SORT_11 var_59 = var_59_arg_0 ? var_59_arg_1 : var_59_arg_2; [L312] SORT_11 var_60_arg_0 = var_55; [L313] SORT_11 var_60_arg_1 = var_59; [L314] SORT_11 var_60 = var_60_arg_0 + var_60_arg_1; [L315] var_60 = var_60 & mask_SORT_11 [L316] SORT_11 var_61_arg_0 = var_60; [L317] SORT_1 var_61 = var_61_arg_0 >> 15; [L318] SORT_1 var_63_arg_0 = var_61; [L319] SORT_9 var_63_arg_1 = var_10; [L320] SORT_62 var_63 = ((SORT_62)var_63_arg_0 << 31) | var_63_arg_1; [L321] var_63 = var_63 & mask_SORT_62 [L322] SORT_11 var_106_arg_0 = var_60; [L323] SORT_1 var_106 = var_106_arg_0 >> 15; [L324] SORT_11 var_103_arg_0 = var_60; [L325] SORT_1 var_103 = var_103_arg_0 >> 15; [L326] SORT_11 var_100_arg_0 = var_60; [L327] SORT_1 var_100 = var_100_arg_0 >> 15; [L328] SORT_11 var_97_arg_0 = var_60; [L329] SORT_1 var_97 = var_97_arg_0 >> 15; [L330] SORT_11 var_94_arg_0 = var_60; [L331] SORT_1 var_94 = var_94_arg_0 >> 15; [L332] SORT_11 var_91_arg_0 = var_60; [L333] SORT_1 var_91 = var_91_arg_0 >> 15; [L334] SORT_11 var_88_arg_0 = var_60; [L335] SORT_1 var_88 = var_88_arg_0 >> 15; [L336] SORT_11 var_85_arg_0 = var_60; [L337] SORT_1 var_85 = var_85_arg_0 >> 15; [L338] SORT_11 var_82_arg_0 = var_60; [L339] SORT_1 var_82 = var_82_arg_0 >> 15; [L340] SORT_11 var_79_arg_0 = var_60; [L341] SORT_1 var_79 = var_79_arg_0 >> 15; [L342] SORT_11 var_76_arg_0 = var_60; [L343] SORT_1 var_76 = var_76_arg_0 >> 15; [L344] SORT_11 var_73_arg_0 = var_60; [L345] SORT_1 var_73 = var_73_arg_0 >> 15; [L346] SORT_11 var_70_arg_0 = var_60; [L347] SORT_1 var_70 = var_70_arg_0 >> 15; [L348] SORT_11 var_67_arg_0 = var_60; [L349] SORT_1 var_67 = var_67_arg_0 >> 15; [L350] SORT_11 var_64_arg_0 = var_60; [L351] SORT_1 var_64 = var_64_arg_0 >> 15; [L352] SORT_1 var_66_arg_0 = var_64; [L353] SORT_11 var_66_arg_1 = var_60; [L354] SORT_65 var_66 = ((SORT_65)var_66_arg_0 << 16) | var_66_arg_1; [L355] var_66 = var_66 & mask_SORT_65 [L356] SORT_1 var_69_arg_0 = var_67; [L357] SORT_65 var_69_arg_1 = var_66; [L358] SORT_68 var_69 = ((SORT_68)var_69_arg_0 << 17) | var_69_arg_1; [L359] var_69 = var_69 & mask_SORT_68 [L360] SORT_1 var_72_arg_0 = var_70; [L361] SORT_68 var_72_arg_1 = var_69; [L362] SORT_71 var_72 = ((SORT_71)var_72_arg_0 << 18) | var_72_arg_1; [L363] var_72 = var_72 & mask_SORT_71 [L364] SORT_1 var_75_arg_0 = var_73; [L365] SORT_71 var_75_arg_1 = var_72; [L366] SORT_74 var_75 = ((SORT_74)var_75_arg_0 << 19) | var_75_arg_1; [L367] var_75 = var_75 & mask_SORT_74 [L368] SORT_1 var_78_arg_0 = var_76; [L369] SORT_74 var_78_arg_1 = var_75; [L370] SORT_77 var_78 = ((SORT_77)var_78_arg_0 << 20) | var_78_arg_1; [L371] var_78 = var_78 & mask_SORT_77 [L372] SORT_1 var_81_arg_0 = var_79; [L373] SORT_77 var_81_arg_1 = var_78; [L374] SORT_80 var_81 = ((SORT_80)var_81_arg_0 << 21) | var_81_arg_1; [L375] var_81 = var_81 & mask_SORT_80 [L376] SORT_1 var_84_arg_0 = var_82; [L377] SORT_80 var_84_arg_1 = var_81; [L378] SORT_83 var_84 = ((SORT_83)var_84_arg_0 << 22) | var_84_arg_1; [L379] var_84 = var_84 & mask_SORT_83 [L380] SORT_1 var_87_arg_0 = var_85; [L381] SORT_83 var_87_arg_1 = var_84; [L382] SORT_86 var_87 = ((SORT_86)var_87_arg_0 << 23) | var_87_arg_1; [L383] var_87 = var_87 & mask_SORT_86 [L384] SORT_1 var_90_arg_0 = var_88; [L385] SORT_86 var_90_arg_1 = var_87; [L386] SORT_89 var_90 = ((SORT_89)var_90_arg_0 << 24) | var_90_arg_1; [L387] var_90 = var_90 & mask_SORT_89 [L388] SORT_1 var_93_arg_0 = var_91; [L389] SORT_89 var_93_arg_1 = var_90; [L390] SORT_92 var_93 = ((SORT_92)var_93_arg_0 << 25) | var_93_arg_1; [L391] var_93 = var_93 & mask_SORT_92 [L392] SORT_1 var_96_arg_0 = var_94; [L393] SORT_92 var_96_arg_1 = var_93; [L394] SORT_95 var_96 = ((SORT_95)var_96_arg_0 << 26) | var_96_arg_1; [L395] var_96 = var_96 & mask_SORT_95 [L396] SORT_1 var_99_arg_0 = var_97; [L397] SORT_95 var_99_arg_1 = var_96; [L398] SORT_98 var_99 = ((SORT_98)var_99_arg_0 << 27) | var_99_arg_1; [L399] var_99 = var_99 & mask_SORT_98 [L400] SORT_1 var_102_arg_0 = var_100; [L401] SORT_98 var_102_arg_1 = var_99; [L402] SORT_101 var_102 = ((SORT_101)var_102_arg_0 << 28) | var_102_arg_1; [L403] var_102 = var_102 & mask_SORT_101 [L404] SORT_1 var_105_arg_0 = var_103; [L405] SORT_101 var_105_arg_1 = var_102; [L406] SORT_104 var_105 = ((SORT_104)var_105_arg_0 << 29) | var_105_arg_1; [L407] var_105 = var_105 & mask_SORT_104 [L408] SORT_1 var_107_arg_0 = var_106; [L409] SORT_104 var_107_arg_1 = var_105; [L410] SORT_9 var_107 = ((SORT_9)var_107_arg_0 << 30) | var_107_arg_1; [L411] SORT_9 var_108_arg_0 = var_107; [L412] var_108_arg_0 = var_108_arg_0 & mask_SORT_9 [L413] SORT_62 var_108 = var_108_arg_0; [L414] SORT_62 var_109_arg_0 = var_63; [L415] SORT_62 var_109_arg_1 = var_108; [L416] SORT_1 var_109 = var_109_arg_0 <= var_109_arg_1; [L417] SORT_1 var_110_arg_0 = var_109; [L418] SORT_1 var_110_arg_1 = var_8; [L419] SORT_1 var_110_arg_2 = var_7; [L420] SORT_1 var_110 = var_110_arg_0 ? var_110_arg_1 : var_110_arg_2; [L421] var_110 = var_110 & mask_SORT_1 [L422] SORT_1 var_111_arg_0 = input_3; [L423] SORT_1 var_111_arg_1 = var_110; [L424] SORT_1 var_111 = var_111_arg_0 ^ var_111_arg_1; [L425] SORT_1 var_112_arg_0 = var_111; [L426] SORT_1 var_112 = ~var_112_arg_0; [L427] SORT_1 var_120_arg_0 = var_119; [L428] SORT_1 var_120_arg_1 = var_112; [L429] SORT_1 var_120_arg_2 = var_8; [L430] SORT_1 var_120 = var_120_arg_0 ? var_120_arg_1 : var_120_arg_2; [L431] SORT_1 var_121_arg_0 = var_120; [L432] SORT_1 var_121 = ~var_121_arg_0; [L433] SORT_1 var_122_arg_0 = var_120; [L434] SORT_1 var_122 = ~var_122_arg_0; [L435] SORT_1 var_123_arg_0 = var_121; [L436] SORT_1 var_123_arg_1 = var_122; [L437] SORT_1 var_123 = var_123_arg_0 & var_123_arg_1; [L438] var_123 = var_123 & mask_SORT_1 [L439] SORT_1 bad_124_arg_0 = var_123; [L440] CALL __VERIFIER_assert(!(bad_124_arg_0)) [L20] COND FALSE !(!(cond)) [L440] RET __VERIFIER_assert(!(bad_124_arg_0)) [L442] SORT_15 var_252_arg_0 = state_140; [L443] SORT_15 var_252_arg_1 = var_251; [L444] SORT_1 var_252 = var_252_arg_0 == var_252_arg_1; [L445] SORT_12 var_245_arg_0 = var_13; [L446] var_245_arg_0 = var_245_arg_0 & mask_SORT_12 [L447] SORT_15 var_245 = var_245_arg_0; [L448] SORT_15 var_246_arg_0 = var_245; [L449] SORT_15 var_246_arg_1 = state_137; [L450] SORT_1 var_246 = var_246_arg_0 <= var_246_arg_1; [L451] SORT_12 var_248_arg_0 = var_247; [L452] var_248_arg_0 = var_248_arg_0 & mask_SORT_12 [L453] SORT_15 var_248 = var_248_arg_0; [L454] SORT_15 var_249_arg_0 = state_137; [L455] SORT_15 var_249_arg_1 = var_248; [L456] SORT_1 var_249 = var_249_arg_0 <= var_249_arg_1; [L457] SORT_1 var_250_arg_0 = var_246; [L458] SORT_1 var_250_arg_1 = var_249; [L459] SORT_1 var_250 = var_250_arg_0 & var_250_arg_1; [L460] SORT_1 var_253_arg_0 = var_252; [L461] SORT_1 var_253_arg_1 = var_250; [L462] SORT_1 var_253_arg_2 = var_8; [L463] SORT_1 var_253 = var_253_arg_0 ? var_253_arg_1 : var_253_arg_2; [L464] SORT_1 var_254_arg_0 = input_4; [L465] SORT_1 var_254_arg_1 = var_8; [L466] SORT_1 var_254_arg_2 = var_253; [L467] SORT_1 var_254 = var_254_arg_0 ? var_254_arg_1 : var_254_arg_2; [L468] SORT_1 next_255_arg_1 = var_254; [L469] SORT_1 var_256_arg_0 = input_4; [L470] SORT_1 var_256_arg_1 = var_7; [L471] SORT_1 var_256_arg_2 = input_3; [L472] SORT_1 var_256 = var_256_arg_0 ? var_256_arg_1 : var_256_arg_2; [L473] SORT_1 next_257_arg_1 = var_256; [L474] SORT_23 var_190_arg_0 = var_189; [L475] var_190_arg_0 = (var_190_arg_0 & msb_SORT_23) ? (var_190_arg_0 | ~mask_SORT_23) : (var_190_arg_0 & mask_SORT_23) [L476] SORT_83 var_190 = (int)((signed char)var_190_arg_0); [L477] SORT_11 var_191_arg_0 = state_56; [L478] var_191_arg_0 = (var_191_arg_0 & msb_SORT_11) ? (var_191_arg_0 | ~mask_SORT_11) : (var_191_arg_0 & mask_SORT_11) [L479] SORT_83 var_191 = (int)((short)var_191_arg_0); [L480] SORT_83 var_192_arg_0 = var_190; [L481] SORT_83 var_192_arg_1 = var_191; [L482] SORT_83 var_192 = var_192_arg_0 * var_192_arg_1; [L483] SORT_153 var_155_arg_0 = var_154; [L484] var_155_arg_0 = (var_155_arg_0 & msb_SORT_153) ? (var_155_arg_0 | ~mask_SORT_153) : (var_155_arg_0 & mask_SORT_153) [L485] SORT_68 var_155 = (int)((signed char)var_155_arg_0); [L486] SORT_11 var_145_arg_0 = state_144; [L487] SORT_11 var_145 = -var_145_arg_0; [L488] SORT_1 var_146_arg_0 = var_110; [L489] SORT_11 var_146_arg_1 = var_145; [L490] SORT_11 var_146_arg_2 = state_144; [L491] SORT_11 var_146 = var_146_arg_0 ? var_146_arg_1 : var_146_arg_2; [L492] SORT_11 var_147_arg_0 = var_55; [L493] SORT_11 var_147_arg_1 = var_146; [L494] SORT_11 var_147 = var_147_arg_0 + var_147_arg_1; [L495] SORT_11 var_156_arg_0 = var_147; [L496] SORT_11 var_156 = -var_156_arg_0; [L497] SORT_1 var_157_arg_0 = state_58; [L498] SORT_11 var_157_arg_1 = var_147; [L499] SORT_11 var_157_arg_2 = var_156; [L500] SORT_11 var_157 = var_157_arg_0 ? var_157_arg_1 : var_157_arg_2; [L501] SORT_11 var_158_arg_0 = var_157; [L502] var_158_arg_0 = (var_158_arg_0 & msb_SORT_11) ? (var_158_arg_0 | ~mask_SORT_11) : (var_158_arg_0 & mask_SORT_11) [L503] SORT_68 var_158 = (int)((short)var_158_arg_0); [L504] SORT_68 var_159_arg_0 = var_155; [L505] SORT_68 var_159_arg_1 = var_158; [L506] SORT_68 var_159 = var_159_arg_0 * var_159_arg_1; [L507] var_159 = var_159 & mask_SORT_68 [L508] SORT_68 var_266_arg_0 = var_159; [L509] SORT_1 var_266 = var_266_arg_0 >> 17; [L510] SORT_68 var_264_arg_0 = var_159; [L511] SORT_1 var_264 = var_264_arg_0 >> 17; [L512] SORT_68 var_262_arg_0 = var_159; [L513] SORT_1 var_262 = var_262_arg_0 >> 17; [L514] SORT_68 var_260_arg_0 = var_159; [L515] SORT_1 var_260 = var_260_arg_0 >> 17; [L516] SORT_68 var_258_arg_0 = var_159; [L517] SORT_1 var_258 = var_258_arg_0 >> 17; [L518] SORT_1 var_259_arg_0 = var_258; [L519] SORT_68 var_259_arg_1 = var_159; [L520] SORT_71 var_259 = ((SORT_71)var_259_arg_0 << 18) | var_259_arg_1; [L521] var_259 = var_259 & mask_SORT_71 [L522] SORT_1 var_261_arg_0 = var_260; [L523] SORT_71 var_261_arg_1 = var_259; [L524] SORT_74 var_261 = ((SORT_74)var_261_arg_0 << 19) | var_261_arg_1; [L525] var_261 = var_261 & mask_SORT_74 [L526] SORT_1 var_263_arg_0 = var_262; [L527] SORT_74 var_263_arg_1 = var_261; [L528] SORT_77 var_263 = ((SORT_77)var_263_arg_0 << 20) | var_263_arg_1; [L529] var_263 = var_263 & mask_SORT_77 [L530] SORT_1 var_265_arg_0 = var_264; [L531] SORT_77 var_265_arg_1 = var_263; [L532] SORT_80 var_265 = ((SORT_80)var_265_arg_0 << 21) | var_265_arg_1; [L533] var_265 = var_265 & mask_SORT_80 [L534] SORT_1 var_267_arg_0 = var_266; [L535] SORT_80 var_267_arg_1 = var_265; [L536] SORT_83 var_267 = ((SORT_83)var_267_arg_0 << 22) | var_267_arg_1; [L537] SORT_83 var_268_arg_0 = var_192; [L538] SORT_83 var_268_arg_1 = var_267; [L539] SORT_83 var_268 = var_268_arg_0 + var_268_arg_1; [L540] SORT_21 var_270_arg_0 = var_269; [L541] var_270_arg_0 = var_270_arg_0 & mask_SORT_21 [L542] SORT_83 var_270 = var_270_arg_0; [L543] SORT_83 var_271_arg_0 = var_268; [L544] SORT_83 var_271_arg_1 = var_270; [L545] SORT_83 var_271 = var_271_arg_0 + var_271_arg_1; [L546] SORT_83 var_272_arg_0 = var_271; [L547] SORT_11 var_272 = var_272_arg_0 >> 7; [L548] SORT_1 var_273_arg_0 = input_4; [L549] SORT_11 var_273_arg_1 = var_197; [L550] SORT_11 var_273_arg_2 = var_272; [L551] SORT_11 var_273 = var_273_arg_0 ? var_273_arg_1 : var_273_arg_2; [L552] SORT_11 next_274_arg_1 = var_273; [L553] SORT_1 var_275_arg_0 = input_4; [L554] SORT_1 var_275_arg_1 = var_7; [L555] SORT_1 var_275_arg_2 = var_110; [L556] SORT_1 var_275 = var_275_arg_0 ? var_275_arg_1 : var_275_arg_2; [L557] var_275 = var_275 & mask_SORT_1 [L558] SORT_1 next_276_arg_1 = var_275; [L559] SORT_1 var_277_arg_0 = var_8; [L560] var_277_arg_0 = var_277_arg_0 & mask_SORT_1 [L561] SORT_11 var_277 = var_277_arg_0; [L562] SORT_11 var_278_arg_0 = state_117; [L563] SORT_11 var_278_arg_1 = var_277; [L564] SORT_11 var_278 = var_278_arg_0 + var_278_arg_1; [L565] var_278 = var_278 & mask_SORT_11 [L566] SORT_11 next_279_arg_1 = var_278; [L567] SORT_12 var_283_arg_0 = var_282; [L568] SORT_1 var_283_arg_1 = input_3; [L569] SORT_15 var_283 = ((SORT_15)var_283_arg_0 << 1) | var_283_arg_1; [L570] SORT_1 var_280_arg_0 = input_3; [L571] var_280_arg_0 = var_280_arg_0 & mask_SORT_1 [L572] SORT_15 var_280 = var_280_arg_0; [L573] SORT_15 var_281_arg_0 = state_137; [L574] SORT_15 var_281_arg_1 = var_280; [L575] SORT_15 var_281 = var_281_arg_0 + var_281_arg_1; [L576] SORT_1 var_284_arg_0 = var_252; [L577] SORT_15 var_284_arg_1 = var_283; [L578] SORT_15 var_284_arg_2 = var_281; [L579] SORT_15 var_284 = var_284_arg_0 ? var_284_arg_1 : var_284_arg_2; [L580] SORT_1 var_286_arg_0 = input_4; [L581] SORT_15 var_286_arg_1 = var_285; [L582] SORT_15 var_286_arg_2 = var_284; [L583] SORT_15 var_286 = var_286_arg_0 ? var_286_arg_1 : var_286_arg_2; [L584] var_286 = var_286 & mask_SORT_15 [L585] SORT_15 next_287_arg_1 = var_286; [L586] SORT_1 var_288_arg_0 = var_8; [L587] var_288_arg_0 = var_288_arg_0 & mask_SORT_1 [L588] SORT_15 var_288 = var_288_arg_0; [L589] SORT_15 var_289_arg_0 = state_140; [L590] SORT_15 var_289_arg_1 = var_288; [L591] SORT_15 var_289 = var_289_arg_0 + var_289_arg_1; [L592] SORT_1 var_290_arg_0 = var_252; [L593] SORT_15 var_290_arg_1 = var_285; [L594] SORT_15 var_290_arg_2 = var_289; [L595] SORT_15 var_290 = var_290_arg_0 ? var_290_arg_1 : var_290_arg_2; [L596] SORT_1 var_291_arg_0 = input_4; [L597] SORT_15 var_291_arg_1 = var_285; [L598] SORT_15 var_291_arg_2 = var_290; [L599] SORT_15 var_291 = var_291_arg_0 ? var_291_arg_1 : var_291_arg_2; [L600] var_291 = var_291 & mask_SORT_15 [L601] SORT_15 next_292_arg_1 = var_291; [L602] SORT_23 var_235_arg_0 = var_189; [L603] var_235_arg_0 = (var_235_arg_0 & msb_SORT_23) ? (var_235_arg_0 | ~mask_SORT_23) : (var_235_arg_0 & mask_SORT_23) [L604] SORT_83 var_235 = (int)((signed char)var_235_arg_0); [L605] SORT_11 var_236_arg_0 = state_144; [L606] var_236_arg_0 = (var_236_arg_0 & msb_SORT_11) ? (var_236_arg_0 | ~mask_SORT_11) : (var_236_arg_0 & mask_SORT_11) [L607] SORT_83 var_236 = (int)((short)var_236_arg_0); [L608] SORT_83 var_237_arg_0 = var_235; [L609] SORT_83 var_237_arg_1 = var_236; [L610] SORT_83 var_237 = var_237_arg_0 * var_237_arg_1; [L611] SORT_153 var_201_arg_0 = var_154; [L612] var_201_arg_0 = (var_201_arg_0 & msb_SORT_153) ? (var_201_arg_0 | ~mask_SORT_153) : (var_201_arg_0 & mask_SORT_153) [L613] SORT_68 var_201 = (int)((signed char)var_201_arg_0); [L614] SORT_11 var_202_arg_0 = var_60; [L615] SORT_11 var_202 = -var_202_arg_0; [L616] SORT_1 var_203_arg_0 = var_110; [L617] SORT_11 var_203_arg_1 = var_60; [L618] SORT_11 var_203_arg_2 = var_202; [L619] SORT_11 var_203 = var_203_arg_0 ? var_203_arg_1 : var_203_arg_2; [L620] SORT_11 var_204_arg_0 = var_203; [L621] var_204_arg_0 = (var_204_arg_0 & msb_SORT_11) ? (var_204_arg_0 | ~mask_SORT_11) : (var_204_arg_0 & mask_SORT_11) [L622] SORT_68 var_204 = (int)((short)var_204_arg_0); [L623] SORT_68 var_205_arg_0 = var_201; [L624] SORT_68 var_205_arg_1 = var_204; [L625] SORT_68 var_205 = var_205_arg_0 * var_205_arg_1; [L626] var_205 = var_205 & mask_SORT_68 [L627] SORT_68 var_301_arg_0 = var_205; [L628] SORT_1 var_301 = var_301_arg_0 >> 17; [L629] SORT_68 var_299_arg_0 = var_205; [L630] SORT_1 var_299 = var_299_arg_0 >> 17; [L631] SORT_68 var_297_arg_0 = var_205; [L632] SORT_1 var_297 = var_297_arg_0 >> 17; [L633] SORT_68 var_295_arg_0 = var_205; [L634] SORT_1 var_295 = var_295_arg_0 >> 17; [L635] SORT_68 var_293_arg_0 = var_205; [L636] SORT_1 var_293 = var_293_arg_0 >> 17; [L637] SORT_1 var_294_arg_0 = var_293; [L638] SORT_68 var_294_arg_1 = var_205; [L639] SORT_71 var_294 = ((SORT_71)var_294_arg_0 << 18) | var_294_arg_1; [L640] var_294 = var_294 & mask_SORT_71 [L641] SORT_1 var_296_arg_0 = var_295; [L642] SORT_71 var_296_arg_1 = var_294; [L643] SORT_74 var_296 = ((SORT_74)var_296_arg_0 << 19) | var_296_arg_1; [L644] var_296 = var_296 & mask_SORT_74 [L645] SORT_1 var_298_arg_0 = var_297; [L646] SORT_74 var_298_arg_1 = var_296; [L647] SORT_77 var_298 = ((SORT_77)var_298_arg_0 << 20) | var_298_arg_1; [L648] var_298 = var_298 & mask_SORT_77 [L649] SORT_1 var_300_arg_0 = var_299; [L650] SORT_77 var_300_arg_1 = var_298; [L651] SORT_80 var_300 = ((SORT_80)var_300_arg_0 << 21) | var_300_arg_1; [L652] var_300 = var_300 & mask_SORT_80 [L653] SORT_1 var_302_arg_0 = var_301; [L654] SORT_80 var_302_arg_1 = var_300; [L655] SORT_83 var_302 = ((SORT_83)var_302_arg_0 << 22) | var_302_arg_1; [L656] SORT_83 var_303_arg_0 = var_237; [L657] SORT_83 var_303_arg_1 = var_302; [L658] SORT_83 var_303 = var_303_arg_0 + var_303_arg_1; [L659] SORT_21 var_304_arg_0 = var_269; [L660] var_304_arg_0 = var_304_arg_0 & mask_SORT_21 [L661] SORT_83 var_304 = var_304_arg_0; [L662] SORT_83 var_305_arg_0 = var_303; [L663] SORT_83 var_305_arg_1 = var_304; [L664] SORT_83 var_305 = var_305_arg_0 + var_305_arg_1; [L665] SORT_83 var_306_arg_0 = var_305; [L666] SORT_11 var_306 = var_306_arg_0 >> 7; [L667] SORT_1 var_307_arg_0 = input_4; [L668] SORT_11 var_307_arg_1 = var_197; [L669] SORT_11 var_307_arg_2 = var_306; [L670] SORT_11 var_307 = var_307_arg_0 ? var_307_arg_1 : var_307_arg_2; [L671] SORT_11 next_308_arg_1 = var_307; [L673] state_5 = next_255_arg_1 [L674] state_40 = next_257_arg_1 [L675] state_56 = next_274_arg_1 [L676] state_58 = next_276_arg_1 [L677] state_117 = next_279_arg_1 [L678] state_137 = next_287_arg_1 [L679] state_140 = next_292_arg_1 [L680] state_144 = next_308_arg_1 [L155] input_2 = __VERIFIER_nondet_uchar() [L156] input_3 = __VERIFIER_nondet_uchar() [L157] input_3 = input_3 & mask_SORT_1 [L158] input_4 = __VERIFIER_nondet_uchar() [L159] input_4 = input_4 & mask_SORT_1 [L161] SORT_1 var_125_arg_0 = state_5; [L162] SORT_1 var_125 = ~var_125_arg_0; [L163] SORT_1 var_126_arg_0 = var_125; [L164] SORT_1 var_126 = ~var_126_arg_0; [L165] SORT_1 var_127_arg_0 = state_5; [L166] SORT_1 var_127_arg_1 = var_126; [L167] SORT_1 var_127 = var_127_arg_0 | var_127_arg_1; [L168] var_127 = var_127 & mask_SORT_1 [L169] SORT_1 constr_128_arg_0 = var_127; [L170] CALL assume_abort_if_not(constr_128_arg_0) [L21] COND FALSE !(!cond) [L170] RET assume_abort_if_not(constr_128_arg_0) [L171] SORT_1 var_129_arg_0 = var_8; [L172] var_129_arg_0 = var_129_arg_0 & mask_SORT_1 [L173] SORT_11 var_129 = var_129_arg_0; [L174] SORT_11 var_130_arg_0 = state_117; [L175] SORT_11 var_130_arg_1 = var_129; [L176] SORT_1 var_130 = var_130_arg_0 <= var_130_arg_1; [L177] SORT_1 var_131_arg_0 = input_4; [L178] SORT_1 var_131_arg_1 = var_130; [L179] SORT_1 var_131 = var_131_arg_0 ^ var_131_arg_1; [L180] SORT_1 var_132_arg_0 = var_131; [L181] SORT_1 var_132 = ~var_132_arg_0; [L182] SORT_1 var_133_arg_0 = var_131; [L183] SORT_1 var_133 = ~var_133_arg_0; [L184] SORT_1 var_134_arg_0 = var_132; [L185] SORT_1 var_134_arg_1 = var_133; [L186] SORT_1 var_134 = var_134_arg_0 | var_134_arg_1; [L187] var_134 = var_134 & mask_SORT_1 [L188] SORT_1 constr_135_arg_0 = var_134; [L189] CALL assume_abort_if_not(constr_135_arg_0) [L21] COND FALSE !(!cond) [L189] RET assume_abort_if_not(constr_135_arg_0) [L191] SORT_12 var_115_arg_0 = var_114; [L192] var_115_arg_0 = var_115_arg_0 & mask_SORT_12 [L193] SORT_11 var_115 = var_115_arg_0; [L194] SORT_11 var_119_arg_0 = var_115; [L195] SORT_11 var_119_arg_1 = state_117; [L196] SORT_1 var_119 = var_119_arg_0 < var_119_arg_1; [L197] SORT_1 var_14_arg_0 = input_3; [L198] SORT_1 var_14 = ~var_14_arg_0; [L199] SORT_1 var_16_arg_0 = var_14; [L200] SORT_12 var_16_arg_1 = var_13; [L201] SORT_15 var_16 = ((SORT_15)var_16_arg_0 << 3) | var_16_arg_1; [L202] var_16 = var_16 & mask_SORT_15 [L203] SORT_1 var_18_arg_0 = input_3; [L204] SORT_15 var_18_arg_1 = var_16; [L205] SORT_17 var_18 = ((SORT_17)var_18_arg_0 << 4) | var_18_arg_1; [L206] var_18 = var_18 & mask_SORT_17 [L207] SORT_1 var_20_arg_0 = input_3; [L208] SORT_17 var_20_arg_1 = var_18; [L209] SORT_19 var_20 = ((SORT_19)var_20_arg_0 << 5) | var_20_arg_1; [L210] var_20 = var_20 & mask_SORT_19 [L211] SORT_1 var_22_arg_0 = input_3; [L212] SORT_19 var_22_arg_1 = var_20; [L213] SORT_21 var_22 = ((SORT_21)var_22_arg_0 << 6) | var_22_arg_1; [L214] var_22 = var_22 & mask_SORT_21 [L215] SORT_1 var_24_arg_0 = input_3; [L216] SORT_21 var_24_arg_1 = var_22; [L217] SORT_23 var_24 = ((SORT_23)var_24_arg_0 << 7) | var_24_arg_1; [L218] var_24 = var_24 & mask_SORT_23 [L219] SORT_1 var_26_arg_0 = input_3; [L220] SORT_23 var_26_arg_1 = var_24; [L221] SORT_25 var_26 = ((SORT_25)var_26_arg_0 << 8) | var_26_arg_1; [L222] var_26 = var_26 & mask_SORT_25 [L223] SORT_1 var_28_arg_0 = var_14; [L224] SORT_25 var_28_arg_1 = var_26; [L225] SORT_27 var_28 = ((SORT_27)var_28_arg_0 << 9) | var_28_arg_1; [L226] var_28 = var_28 & mask_SORT_27 [L227] SORT_1 var_30_arg_0 = var_14; [L228] SORT_27 var_30_arg_1 = var_28; [L229] SORT_29 var_30 = ((SORT_29)var_30_arg_0 << 10) | var_30_arg_1; [L230] var_30 = var_30 & mask_SORT_29 [L231] SORT_1 var_32_arg_0 = var_14; [L232] SORT_29 var_32_arg_1 = var_30; [L233] SORT_31 var_32 = ((SORT_31)var_32_arg_0 << 11) | var_32_arg_1; [L234] var_32 = var_32 & mask_SORT_31 [L235] SORT_1 var_34_arg_0 = var_14; [L236] SORT_31 var_34_arg_1 = var_32; [L237] SORT_33 var_34 = ((SORT_33)var_34_arg_0 << 12) | var_34_arg_1; [L238] var_34 = var_34 & mask_SORT_33 [L239] SORT_1 var_36_arg_0 = var_14; [L240] SORT_33 var_36_arg_1 = var_34; [L241] SORT_35 var_36 = ((SORT_35)var_36_arg_0 << 13) | var_36_arg_1; [L242] var_36 = var_36 & mask_SORT_35 [L243] SORT_1 var_38_arg_0 = var_14; [L244] SORT_35 var_38_arg_1 = var_36; [L245] SORT_37 var_38 = ((SORT_37)var_38_arg_0 << 14) | var_38_arg_1; [L246] var_38 = var_38 & mask_SORT_37 [L247] SORT_1 var_39_arg_0 = var_14; [L248] SORT_37 var_39_arg_1 = var_38; [L249] SORT_11 var_39 = ((SORT_11)var_39_arg_0 << 15) | var_39_arg_1; [L250] SORT_1 var_41_arg_0 = state_40; [L251] SORT_1 var_41 = ~var_41_arg_0; [L252] SORT_1 var_42_arg_0 = state_40; [L253] SORT_12 var_42_arg_1 = var_13; [L254] SORT_15 var_42 = ((SORT_15)var_42_arg_0 << 3) | var_42_arg_1; [L255] var_42 = var_42 & mask_SORT_15 [L256] SORT_1 var_43_arg_0 = var_41; [L257] SORT_15 var_43_arg_1 = var_42; [L258] SORT_17 var_43 = ((SORT_17)var_43_arg_0 << 4) | var_43_arg_1; [L259] var_43 = var_43 & mask_SORT_17 [L260] SORT_1 var_44_arg_0 = state_40; [L261] SORT_17 var_44_arg_1 = var_43; [L262] SORT_19 var_44 = ((SORT_19)var_44_arg_0 << 5) | var_44_arg_1; [L263] var_44 = var_44 & mask_SORT_19 [L264] SORT_1 var_45_arg_0 = var_41; [L265] SORT_19 var_45_arg_1 = var_44; [L266] SORT_21 var_45 = ((SORT_21)var_45_arg_0 << 6) | var_45_arg_1; [L267] var_45 = var_45 & mask_SORT_21 [L268] SORT_1 var_46_arg_0 = var_41; [L269] SORT_21 var_46_arg_1 = var_45; [L270] SORT_23 var_46 = ((SORT_23)var_46_arg_0 << 7) | var_46_arg_1; [L271] var_46 = var_46 & mask_SORT_23 [L272] SORT_1 var_47_arg_0 = state_40; [L273] SORT_23 var_47_arg_1 = var_46; [L274] SORT_25 var_47 = ((SORT_25)var_47_arg_0 << 8) | var_47_arg_1; [L275] var_47 = var_47 & mask_SORT_25 [L276] SORT_1 var_48_arg_0 = var_41; [L277] SORT_25 var_48_arg_1 = var_47; [L278] SORT_27 var_48 = ((SORT_27)var_48_arg_0 << 9) | var_48_arg_1; [L279] var_48 = var_48 & mask_SORT_27 [L280] SORT_1 var_49_arg_0 = var_41; [L281] SORT_27 var_49_arg_1 = var_48; [L282] SORT_29 var_49 = ((SORT_29)var_49_arg_0 << 10) | var_49_arg_1; [L283] var_49 = var_49 & mask_SORT_29 [L284] SORT_1 var_50_arg_0 = var_41; [L285] SORT_29 var_50_arg_1 = var_49; [L286] SORT_31 var_50 = ((SORT_31)var_50_arg_0 << 11) | var_50_arg_1; [L287] var_50 = var_50 & mask_SORT_31 [L288] SORT_1 var_51_arg_0 = var_41; [L289] SORT_31 var_51_arg_1 = var_50; [L290] SORT_33 var_51 = ((SORT_33)var_51_arg_0 << 12) | var_51_arg_1; [L291] var_51 = var_51 & mask_SORT_33 [L292] SORT_1 var_52_arg_0 = var_41; [L293] SORT_33 var_52_arg_1 = var_51; [L294] SORT_35 var_52 = ((SORT_35)var_52_arg_0 << 13) | var_52_arg_1; [L295] var_52 = var_52 & mask_SORT_35 [L296] SORT_1 var_53_arg_0 = var_41; [L297] SORT_35 var_53_arg_1 = var_52; [L298] SORT_37 var_53 = ((SORT_37)var_53_arg_0 << 14) | var_53_arg_1; [L299] var_53 = var_53 & mask_SORT_37 [L300] SORT_1 var_54_arg_0 = var_41; [L301] SORT_37 var_54_arg_1 = var_53; [L302] SORT_11 var_54 = ((SORT_11)var_54_arg_0 << 15) | var_54_arg_1; [L303] SORT_11 var_55_arg_0 = var_39; [L304] SORT_11 var_55_arg_1 = var_54; [L305] SORT_11 var_55 = var_55_arg_0 + var_55_arg_1; [L306] SORT_11 var_57_arg_0 = state_56; [L307] SORT_11 var_57 = -var_57_arg_0; [L308] SORT_1 var_59_arg_0 = state_58; [L309] SORT_11 var_59_arg_1 = var_57; [L310] SORT_11 var_59_arg_2 = state_56; [L311] SORT_11 var_59 = var_59_arg_0 ? var_59_arg_1 : var_59_arg_2; [L312] SORT_11 var_60_arg_0 = var_55; [L313] SORT_11 var_60_arg_1 = var_59; [L314] SORT_11 var_60 = var_60_arg_0 + var_60_arg_1; [L315] var_60 = var_60 & mask_SORT_11 [L316] SORT_11 var_61_arg_0 = var_60; [L317] SORT_1 var_61 = var_61_arg_0 >> 15; [L318] SORT_1 var_63_arg_0 = var_61; [L319] SORT_9 var_63_arg_1 = var_10; [L320] SORT_62 var_63 = ((SORT_62)var_63_arg_0 << 31) | var_63_arg_1; [L321] var_63 = var_63 & mask_SORT_62 [L322] SORT_11 var_106_arg_0 = var_60; [L323] SORT_1 var_106 = var_106_arg_0 >> 15; [L324] SORT_11 var_103_arg_0 = var_60; [L325] SORT_1 var_103 = var_103_arg_0 >> 15; [L326] SORT_11 var_100_arg_0 = var_60; [L327] SORT_1 var_100 = var_100_arg_0 >> 15; [L328] SORT_11 var_97_arg_0 = var_60; [L329] SORT_1 var_97 = var_97_arg_0 >> 15; [L330] SORT_11 var_94_arg_0 = var_60; [L331] SORT_1 var_94 = var_94_arg_0 >> 15; [L332] SORT_11 var_91_arg_0 = var_60; [L333] SORT_1 var_91 = var_91_arg_0 >> 15; [L334] SORT_11 var_88_arg_0 = var_60; [L335] SORT_1 var_88 = var_88_arg_0 >> 15; [L336] SORT_11 var_85_arg_0 = var_60; [L337] SORT_1 var_85 = var_85_arg_0 >> 15; [L338] SORT_11 var_82_arg_0 = var_60; [L339] SORT_1 var_82 = var_82_arg_0 >> 15; [L340] SORT_11 var_79_arg_0 = var_60; [L341] SORT_1 var_79 = var_79_arg_0 >> 15; [L342] SORT_11 var_76_arg_0 = var_60; [L343] SORT_1 var_76 = var_76_arg_0 >> 15; [L344] SORT_11 var_73_arg_0 = var_60; [L345] SORT_1 var_73 = var_73_arg_0 >> 15; [L346] SORT_11 var_70_arg_0 = var_60; [L347] SORT_1 var_70 = var_70_arg_0 >> 15; [L348] SORT_11 var_67_arg_0 = var_60; [L349] SORT_1 var_67 = var_67_arg_0 >> 15; [L350] SORT_11 var_64_arg_0 = var_60; [L351] SORT_1 var_64 = var_64_arg_0 >> 15; [L352] SORT_1 var_66_arg_0 = var_64; [L353] SORT_11 var_66_arg_1 = var_60; [L354] SORT_65 var_66 = ((SORT_65)var_66_arg_0 << 16) | var_66_arg_1; [L355] var_66 = var_66 & mask_SORT_65 [L356] SORT_1 var_69_arg_0 = var_67; [L357] SORT_65 var_69_arg_1 = var_66; [L358] SORT_68 var_69 = ((SORT_68)var_69_arg_0 << 17) | var_69_arg_1; [L359] var_69 = var_69 & mask_SORT_68 [L360] SORT_1 var_72_arg_0 = var_70; [L361] SORT_68 var_72_arg_1 = var_69; [L362] SORT_71 var_72 = ((SORT_71)var_72_arg_0 << 18) | var_72_arg_1; [L363] var_72 = var_72 & mask_SORT_71 [L364] SORT_1 var_75_arg_0 = var_73; [L365] SORT_71 var_75_arg_1 = var_72; [L366] SORT_74 var_75 = ((SORT_74)var_75_arg_0 << 19) | var_75_arg_1; [L367] var_75 = var_75 & mask_SORT_74 [L368] SORT_1 var_78_arg_0 = var_76; [L369] SORT_74 var_78_arg_1 = var_75; [L370] SORT_77 var_78 = ((SORT_77)var_78_arg_0 << 20) | var_78_arg_1; [L371] var_78 = var_78 & mask_SORT_77 [L372] SORT_1 var_81_arg_0 = var_79; [L373] SORT_77 var_81_arg_1 = var_78; [L374] SORT_80 var_81 = ((SORT_80)var_81_arg_0 << 21) | var_81_arg_1; [L375] var_81 = var_81 & mask_SORT_80 [L376] SORT_1 var_84_arg_0 = var_82; [L377] SORT_80 var_84_arg_1 = var_81; [L378] SORT_83 var_84 = ((SORT_83)var_84_arg_0 << 22) | var_84_arg_1; [L379] var_84 = var_84 & mask_SORT_83 [L380] SORT_1 var_87_arg_0 = var_85; [L381] SORT_83 var_87_arg_1 = var_84; [L382] SORT_86 var_87 = ((SORT_86)var_87_arg_0 << 23) | var_87_arg_1; [L383] var_87 = var_87 & mask_SORT_86 [L384] SORT_1 var_90_arg_0 = var_88; [L385] SORT_86 var_90_arg_1 = var_87; [L386] SORT_89 var_90 = ((SORT_89)var_90_arg_0 << 24) | var_90_arg_1; [L387] var_90 = var_90 & mask_SORT_89 [L388] SORT_1 var_93_arg_0 = var_91; [L389] SORT_89 var_93_arg_1 = var_90; [L390] SORT_92 var_93 = ((SORT_92)var_93_arg_0 << 25) | var_93_arg_1; [L391] var_93 = var_93 & mask_SORT_92 [L392] SORT_1 var_96_arg_0 = var_94; [L393] SORT_92 var_96_arg_1 = var_93; [L394] SORT_95 var_96 = ((SORT_95)var_96_arg_0 << 26) | var_96_arg_1; [L395] var_96 = var_96 & mask_SORT_95 [L396] SORT_1 var_99_arg_0 = var_97; [L397] SORT_95 var_99_arg_1 = var_96; [L398] SORT_98 var_99 = ((SORT_98)var_99_arg_0 << 27) | var_99_arg_1; [L399] var_99 = var_99 & mask_SORT_98 [L400] SORT_1 var_102_arg_0 = var_100; [L401] SORT_98 var_102_arg_1 = var_99; [L402] SORT_101 var_102 = ((SORT_101)var_102_arg_0 << 28) | var_102_arg_1; [L403] var_102 = var_102 & mask_SORT_101 [L404] SORT_1 var_105_arg_0 = var_103; [L405] SORT_101 var_105_arg_1 = var_102; [L406] SORT_104 var_105 = ((SORT_104)var_105_arg_0 << 29) | var_105_arg_1; [L407] var_105 = var_105 & mask_SORT_104 [L408] SORT_1 var_107_arg_0 = var_106; [L409] SORT_104 var_107_arg_1 = var_105; [L410] SORT_9 var_107 = ((SORT_9)var_107_arg_0 << 30) | var_107_arg_1; [L411] SORT_9 var_108_arg_0 = var_107; [L412] var_108_arg_0 = var_108_arg_0 & mask_SORT_9 [L413] SORT_62 var_108 = var_108_arg_0; [L414] SORT_62 var_109_arg_0 = var_63; [L415] SORT_62 var_109_arg_1 = var_108; [L416] SORT_1 var_109 = var_109_arg_0 <= var_109_arg_1; [L417] SORT_1 var_110_arg_0 = var_109; [L418] SORT_1 var_110_arg_1 = var_8; [L419] SORT_1 var_110_arg_2 = var_7; [L420] SORT_1 var_110 = var_110_arg_0 ? var_110_arg_1 : var_110_arg_2; [L421] var_110 = var_110 & mask_SORT_1 [L422] SORT_1 var_111_arg_0 = input_3; [L423] SORT_1 var_111_arg_1 = var_110; [L424] SORT_1 var_111 = var_111_arg_0 ^ var_111_arg_1; [L425] SORT_1 var_112_arg_0 = var_111; [L426] SORT_1 var_112 = ~var_112_arg_0; [L427] SORT_1 var_120_arg_0 = var_119; [L428] SORT_1 var_120_arg_1 = var_112; [L429] SORT_1 var_120_arg_2 = var_8; [L430] SORT_1 var_120 = var_120_arg_0 ? var_120_arg_1 : var_120_arg_2; [L431] SORT_1 var_121_arg_0 = var_120; [L432] SORT_1 var_121 = ~var_121_arg_0; [L433] SORT_1 var_122_arg_0 = var_120; [L434] SORT_1 var_122 = ~var_122_arg_0; [L435] SORT_1 var_123_arg_0 = var_121; [L436] SORT_1 var_123_arg_1 = var_122; [L437] SORT_1 var_123 = var_123_arg_0 & var_123_arg_1; [L438] var_123 = var_123 & mask_SORT_1 [L439] SORT_1 bad_124_arg_0 = var_123; [L440] CALL __VERIFIER_assert(!(bad_124_arg_0)) [L20] COND FALSE !(!(cond)) [L440] RET __VERIFIER_assert(!(bad_124_arg_0)) [L442] SORT_15 var_252_arg_0 = state_140; [L443] SORT_15 var_252_arg_1 = var_251; [L444] SORT_1 var_252 = var_252_arg_0 == var_252_arg_1; [L445] SORT_12 var_245_arg_0 = var_13; [L446] var_245_arg_0 = var_245_arg_0 & mask_SORT_12 [L447] SORT_15 var_245 = var_245_arg_0; [L448] SORT_15 var_246_arg_0 = var_245; [L449] SORT_15 var_246_arg_1 = state_137; [L450] SORT_1 var_246 = var_246_arg_0 <= var_246_arg_1; [L451] SORT_12 var_248_arg_0 = var_247; [L452] var_248_arg_0 = var_248_arg_0 & mask_SORT_12 [L453] SORT_15 var_248 = var_248_arg_0; [L454] SORT_15 var_249_arg_0 = state_137; [L455] SORT_15 var_249_arg_1 = var_248; [L456] SORT_1 var_249 = var_249_arg_0 <= var_249_arg_1; [L457] SORT_1 var_250_arg_0 = var_246; [L458] SORT_1 var_250_arg_1 = var_249; [L459] SORT_1 var_250 = var_250_arg_0 & var_250_arg_1; [L460] SORT_1 var_253_arg_0 = var_252; [L461] SORT_1 var_253_arg_1 = var_250; [L462] SORT_1 var_253_arg_2 = var_8; [L463] SORT_1 var_253 = var_253_arg_0 ? var_253_arg_1 : var_253_arg_2; [L464] SORT_1 var_254_arg_0 = input_4; [L465] SORT_1 var_254_arg_1 = var_8; [L466] SORT_1 var_254_arg_2 = var_253; [L467] SORT_1 var_254 = var_254_arg_0 ? var_254_arg_1 : var_254_arg_2; [L468] SORT_1 next_255_arg_1 = var_254; [L469] SORT_1 var_256_arg_0 = input_4; [L470] SORT_1 var_256_arg_1 = var_7; [L471] SORT_1 var_256_arg_2 = input_3; [L472] SORT_1 var_256 = var_256_arg_0 ? var_256_arg_1 : var_256_arg_2; [L473] SORT_1 next_257_arg_1 = var_256; [L474] SORT_23 var_190_arg_0 = var_189; [L475] var_190_arg_0 = (var_190_arg_0 & msb_SORT_23) ? (var_190_arg_0 | ~mask_SORT_23) : (var_190_arg_0 & mask_SORT_23) [L476] SORT_83 var_190 = (int)((signed char)var_190_arg_0); [L477] SORT_11 var_191_arg_0 = state_56; [L478] var_191_arg_0 = (var_191_arg_0 & msb_SORT_11) ? (var_191_arg_0 | ~mask_SORT_11) : (var_191_arg_0 & mask_SORT_11) [L479] SORT_83 var_191 = (int)((short)var_191_arg_0); [L480] SORT_83 var_192_arg_0 = var_190; [L481] SORT_83 var_192_arg_1 = var_191; [L482] SORT_83 var_192 = var_192_arg_0 * var_192_arg_1; [L483] SORT_153 var_155_arg_0 = var_154; [L484] var_155_arg_0 = (var_155_arg_0 & msb_SORT_153) ? (var_155_arg_0 | ~mask_SORT_153) : (var_155_arg_0 & mask_SORT_153) [L485] SORT_68 var_155 = (int)((signed char)var_155_arg_0); [L486] SORT_11 var_145_arg_0 = state_144; [L487] SORT_11 var_145 = -var_145_arg_0; [L488] SORT_1 var_146_arg_0 = var_110; [L489] SORT_11 var_146_arg_1 = var_145; [L490] SORT_11 var_146_arg_2 = state_144; [L491] SORT_11 var_146 = var_146_arg_0 ? var_146_arg_1 : var_146_arg_2; [L492] SORT_11 var_147_arg_0 = var_55; [L493] SORT_11 var_147_arg_1 = var_146; [L494] SORT_11 var_147 = var_147_arg_0 + var_147_arg_1; [L495] SORT_11 var_156_arg_0 = var_147; [L496] SORT_11 var_156 = -var_156_arg_0; [L497] SORT_1 var_157_arg_0 = state_58; [L498] SORT_11 var_157_arg_1 = var_147; [L499] SORT_11 var_157_arg_2 = var_156; [L500] SORT_11 var_157 = var_157_arg_0 ? var_157_arg_1 : var_157_arg_2; [L501] SORT_11 var_158_arg_0 = var_157; [L502] var_158_arg_0 = (var_158_arg_0 & msb_SORT_11) ? (var_158_arg_0 | ~mask_SORT_11) : (var_158_arg_0 & mask_SORT_11) [L503] SORT_68 var_158 = (int)((short)var_158_arg_0); [L504] SORT_68 var_159_arg_0 = var_155; [L505] SORT_68 var_159_arg_1 = var_158; [L506] SORT_68 var_159 = var_159_arg_0 * var_159_arg_1; [L507] var_159 = var_159 & mask_SORT_68 [L508] SORT_68 var_266_arg_0 = var_159; [L509] SORT_1 var_266 = var_266_arg_0 >> 17; [L510] SORT_68 var_264_arg_0 = var_159; [L511] SORT_1 var_264 = var_264_arg_0 >> 17; [L512] SORT_68 var_262_arg_0 = var_159; [L513] SORT_1 var_262 = var_262_arg_0 >> 17; [L514] SORT_68 var_260_arg_0 = var_159; [L515] SORT_1 var_260 = var_260_arg_0 >> 17; [L516] SORT_68 var_258_arg_0 = var_159; [L517] SORT_1 var_258 = var_258_arg_0 >> 17; [L518] SORT_1 var_259_arg_0 = var_258; [L519] SORT_68 var_259_arg_1 = var_159; [L520] SORT_71 var_259 = ((SORT_71)var_259_arg_0 << 18) | var_259_arg_1; [L521] var_259 = var_259 & mask_SORT_71 [L522] SORT_1 var_261_arg_0 = var_260; [L523] SORT_71 var_261_arg_1 = var_259; [L524] SORT_74 var_261 = ((SORT_74)var_261_arg_0 << 19) | var_261_arg_1; [L525] var_261 = var_261 & mask_SORT_74 [L526] SORT_1 var_263_arg_0 = var_262; [L527] SORT_74 var_263_arg_1 = var_261; [L528] SORT_77 var_263 = ((SORT_77)var_263_arg_0 << 20) | var_263_arg_1; [L529] var_263 = var_263 & mask_SORT_77 [L530] SORT_1 var_265_arg_0 = var_264; [L531] SORT_77 var_265_arg_1 = var_263; [L532] SORT_80 var_265 = ((SORT_80)var_265_arg_0 << 21) | var_265_arg_1; [L533] var_265 = var_265 & mask_SORT_80 [L534] SORT_1 var_267_arg_0 = var_266; [L535] SORT_80 var_267_arg_1 = var_265; [L536] SORT_83 var_267 = ((SORT_83)var_267_arg_0 << 22) | var_267_arg_1; [L537] SORT_83 var_268_arg_0 = var_192; [L538] SORT_83 var_268_arg_1 = var_267; [L539] SORT_83 var_268 = var_268_arg_0 + var_268_arg_1; [L540] SORT_21 var_270_arg_0 = var_269; [L541] var_270_arg_0 = var_270_arg_0 & mask_SORT_21 [L542] SORT_83 var_270 = var_270_arg_0; [L543] SORT_83 var_271_arg_0 = var_268; [L544] SORT_83 var_271_arg_1 = var_270; [L545] SORT_83 var_271 = var_271_arg_0 + var_271_arg_1; [L546] SORT_83 var_272_arg_0 = var_271; [L547] SORT_11 var_272 = var_272_arg_0 >> 7; [L548] SORT_1 var_273_arg_0 = input_4; [L549] SORT_11 var_273_arg_1 = var_197; [L550] SORT_11 var_273_arg_2 = var_272; [L551] SORT_11 var_273 = var_273_arg_0 ? var_273_arg_1 : var_273_arg_2; [L552] SORT_11 next_274_arg_1 = var_273; [L553] SORT_1 var_275_arg_0 = input_4; [L554] SORT_1 var_275_arg_1 = var_7; [L555] SORT_1 var_275_arg_2 = var_110; [L556] SORT_1 var_275 = var_275_arg_0 ? var_275_arg_1 : var_275_arg_2; [L557] var_275 = var_275 & mask_SORT_1 [L558] SORT_1 next_276_arg_1 = var_275; [L559] SORT_1 var_277_arg_0 = var_8; [L560] var_277_arg_0 = var_277_arg_0 & mask_SORT_1 [L561] SORT_11 var_277 = var_277_arg_0; [L562] SORT_11 var_278_arg_0 = state_117; [L563] SORT_11 var_278_arg_1 = var_277; [L564] SORT_11 var_278 = var_278_arg_0 + var_278_arg_1; [L565] var_278 = var_278 & mask_SORT_11 [L566] SORT_11 next_279_arg_1 = var_278; [L567] SORT_12 var_283_arg_0 = var_282; [L568] SORT_1 var_283_arg_1 = input_3; [L569] SORT_15 var_283 = ((SORT_15)var_283_arg_0 << 1) | var_283_arg_1; [L570] SORT_1 var_280_arg_0 = input_3; [L571] var_280_arg_0 = var_280_arg_0 & mask_SORT_1 [L572] SORT_15 var_280 = var_280_arg_0; [L573] SORT_15 var_281_arg_0 = state_137; [L574] SORT_15 var_281_arg_1 = var_280; [L575] SORT_15 var_281 = var_281_arg_0 + var_281_arg_1; [L576] SORT_1 var_284_arg_0 = var_252; [L577] SORT_15 var_284_arg_1 = var_283; [L578] SORT_15 var_284_arg_2 = var_281; [L579] SORT_15 var_284 = var_284_arg_0 ? var_284_arg_1 : var_284_arg_2; [L580] SORT_1 var_286_arg_0 = input_4; [L581] SORT_15 var_286_arg_1 = var_285; [L582] SORT_15 var_286_arg_2 = var_284; [L583] SORT_15 var_286 = var_286_arg_0 ? var_286_arg_1 : var_286_arg_2; [L584] var_286 = var_286 & mask_SORT_15 [L585] SORT_15 next_287_arg_1 = var_286; [L586] SORT_1 var_288_arg_0 = var_8; [L587] var_288_arg_0 = var_288_arg_0 & mask_SORT_1 [L588] SORT_15 var_288 = var_288_arg_0; [L589] SORT_15 var_289_arg_0 = state_140; [L590] SORT_15 var_289_arg_1 = var_288; [L591] SORT_15 var_289 = var_289_arg_0 + var_289_arg_1; [L592] SORT_1 var_290_arg_0 = var_252; [L593] SORT_15 var_290_arg_1 = var_285; [L594] SORT_15 var_290_arg_2 = var_289; [L595] SORT_15 var_290 = var_290_arg_0 ? var_290_arg_1 : var_290_arg_2; [L596] SORT_1 var_291_arg_0 = input_4; [L597] SORT_15 var_291_arg_1 = var_285; [L598] SORT_15 var_291_arg_2 = var_290; [L599] SORT_15 var_291 = var_291_arg_0 ? var_291_arg_1 : var_291_arg_2; [L600] var_291 = var_291 & mask_SORT_15 [L601] SORT_15 next_292_arg_1 = var_291; [L602] SORT_23 var_235_arg_0 = var_189; [L603] var_235_arg_0 = (var_235_arg_0 & msb_SORT_23) ? (var_235_arg_0 | ~mask_SORT_23) : (var_235_arg_0 & mask_SORT_23) [L604] SORT_83 var_235 = (int)((signed char)var_235_arg_0); [L605] SORT_11 var_236_arg_0 = state_144; [L606] var_236_arg_0 = (var_236_arg_0 & msb_SORT_11) ? (var_236_arg_0 | ~mask_SORT_11) : (var_236_arg_0 & mask_SORT_11) [L607] SORT_83 var_236 = (int)((short)var_236_arg_0); [L608] SORT_83 var_237_arg_0 = var_235; [L609] SORT_83 var_237_arg_1 = var_236; [L610] SORT_83 var_237 = var_237_arg_0 * var_237_arg_1; [L611] SORT_153 var_201_arg_0 = var_154; [L612] var_201_arg_0 = (var_201_arg_0 & msb_SORT_153) ? (var_201_arg_0 | ~mask_SORT_153) : (var_201_arg_0 & mask_SORT_153) [L613] SORT_68 var_201 = (int)((signed char)var_201_arg_0); [L614] SORT_11 var_202_arg_0 = var_60; [L615] SORT_11 var_202 = -var_202_arg_0; [L616] SORT_1 var_203_arg_0 = var_110; [L617] SORT_11 var_203_arg_1 = var_60; [L618] SORT_11 var_203_arg_2 = var_202; [L619] SORT_11 var_203 = var_203_arg_0 ? var_203_arg_1 : var_203_arg_2; [L620] SORT_11 var_204_arg_0 = var_203; [L621] var_204_arg_0 = (var_204_arg_0 & msb_SORT_11) ? (var_204_arg_0 | ~mask_SORT_11) : (var_204_arg_0 & mask_SORT_11) [L622] SORT_68 var_204 = (int)((short)var_204_arg_0); [L623] SORT_68 var_205_arg_0 = var_201; [L624] SORT_68 var_205_arg_1 = var_204; [L625] SORT_68 var_205 = var_205_arg_0 * var_205_arg_1; [L626] var_205 = var_205 & mask_SORT_68 [L627] SORT_68 var_301_arg_0 = var_205; [L628] SORT_1 var_301 = var_301_arg_0 >> 17; [L629] SORT_68 var_299_arg_0 = var_205; [L630] SORT_1 var_299 = var_299_arg_0 >> 17; [L631] SORT_68 var_297_arg_0 = var_205; [L632] SORT_1 var_297 = var_297_arg_0 >> 17; [L633] SORT_68 var_295_arg_0 = var_205; [L634] SORT_1 var_295 = var_295_arg_0 >> 17; [L635] SORT_68 var_293_arg_0 = var_205; [L636] SORT_1 var_293 = var_293_arg_0 >> 17; [L637] SORT_1 var_294_arg_0 = var_293; [L638] SORT_68 var_294_arg_1 = var_205; [L639] SORT_71 var_294 = ((SORT_71)var_294_arg_0 << 18) | var_294_arg_1; [L640] var_294 = var_294 & mask_SORT_71 [L641] SORT_1 var_296_arg_0 = var_295; [L642] SORT_71 var_296_arg_1 = var_294; [L643] SORT_74 var_296 = ((SORT_74)var_296_arg_0 << 19) | var_296_arg_1; [L644] var_296 = var_296 & mask_SORT_74 [L645] SORT_1 var_298_arg_0 = var_297; [L646] SORT_74 var_298_arg_1 = var_296; [L647] SORT_77 var_298 = ((SORT_77)var_298_arg_0 << 20) | var_298_arg_1; [L648] var_298 = var_298 & mask_SORT_77 [L649] SORT_1 var_300_arg_0 = var_299; [L650] SORT_77 var_300_arg_1 = var_298; [L651] SORT_80 var_300 = ((SORT_80)var_300_arg_0 << 21) | var_300_arg_1; [L652] var_300 = var_300 & mask_SORT_80 [L653] SORT_1 var_302_arg_0 = var_301; [L654] SORT_80 var_302_arg_1 = var_300; [L655] SORT_83 var_302 = ((SORT_83)var_302_arg_0 << 22) | var_302_arg_1; [L656] SORT_83 var_303_arg_0 = var_237; [L657] SORT_83 var_303_arg_1 = var_302; [L658] SORT_83 var_303 = var_303_arg_0 + var_303_arg_1; [L659] SORT_21 var_304_arg_0 = var_269; [L660] var_304_arg_0 = var_304_arg_0 & mask_SORT_21 [L661] SORT_83 var_304 = var_304_arg_0; [L662] SORT_83 var_305_arg_0 = var_303; [L663] SORT_83 var_305_arg_1 = var_304; [L664] SORT_83 var_305 = var_305_arg_0 + var_305_arg_1; [L665] SORT_83 var_306_arg_0 = var_305; [L666] SORT_11 var_306 = var_306_arg_0 >> 7; [L667] SORT_1 var_307_arg_0 = input_4; [L668] SORT_11 var_307_arg_1 = var_197; [L669] SORT_11 var_307_arg_2 = var_306; [L670] SORT_11 var_307 = var_307_arg_0 ? var_307_arg_1 : var_307_arg_2; [L671] SORT_11 next_308_arg_1 = var_307; [L673] state_5 = next_255_arg_1 [L674] state_40 = next_257_arg_1 [L675] state_56 = next_274_arg_1 [L676] state_58 = next_276_arg_1 [L677] state_117 = next_279_arg_1 [L678] state_137 = next_287_arg_1 [L679] state_140 = next_292_arg_1 [L680] state_144 = next_308_arg_1 [L155] input_2 = __VERIFIER_nondet_uchar() [L156] input_3 = __VERIFIER_nondet_uchar() [L157] input_3 = input_3 & mask_SORT_1 [L158] input_4 = __VERIFIER_nondet_uchar() [L159] input_4 = input_4 & mask_SORT_1 [L161] SORT_1 var_125_arg_0 = state_5; [L162] SORT_1 var_125 = ~var_125_arg_0; [L163] SORT_1 var_126_arg_0 = var_125; [L164] SORT_1 var_126 = ~var_126_arg_0; [L165] SORT_1 var_127_arg_0 = state_5; [L166] SORT_1 var_127_arg_1 = var_126; [L167] SORT_1 var_127 = var_127_arg_0 | var_127_arg_1; [L168] var_127 = var_127 & mask_SORT_1 [L169] SORT_1 constr_128_arg_0 = var_127; [L170] CALL assume_abort_if_not(constr_128_arg_0) [L21] COND FALSE !(!cond) [L170] RET assume_abort_if_not(constr_128_arg_0) [L171] SORT_1 var_129_arg_0 = var_8; [L172] var_129_arg_0 = var_129_arg_0 & mask_SORT_1 [L173] SORT_11 var_129 = var_129_arg_0; [L174] SORT_11 var_130_arg_0 = state_117; [L175] SORT_11 var_130_arg_1 = var_129; [L176] SORT_1 var_130 = var_130_arg_0 <= var_130_arg_1; [L177] SORT_1 var_131_arg_0 = input_4; [L178] SORT_1 var_131_arg_1 = var_130; [L179] SORT_1 var_131 = var_131_arg_0 ^ var_131_arg_1; [L180] SORT_1 var_132_arg_0 = var_131; [L181] SORT_1 var_132 = ~var_132_arg_0; [L182] SORT_1 var_133_arg_0 = var_131; [L183] SORT_1 var_133 = ~var_133_arg_0; [L184] SORT_1 var_134_arg_0 = var_132; [L185] SORT_1 var_134_arg_1 = var_133; [L186] SORT_1 var_134 = var_134_arg_0 | var_134_arg_1; [L187] var_134 = var_134 & mask_SORT_1 [L188] SORT_1 constr_135_arg_0 = var_134; [L189] CALL assume_abort_if_not(constr_135_arg_0) [L21] COND FALSE !(!cond) [L189] RET assume_abort_if_not(constr_135_arg_0) [L191] SORT_12 var_115_arg_0 = var_114; [L192] var_115_arg_0 = var_115_arg_0 & mask_SORT_12 [L193] SORT_11 var_115 = var_115_arg_0; [L194] SORT_11 var_119_arg_0 = var_115; [L195] SORT_11 var_119_arg_1 = state_117; [L196] SORT_1 var_119 = var_119_arg_0 < var_119_arg_1; [L197] SORT_1 var_14_arg_0 = input_3; [L198] SORT_1 var_14 = ~var_14_arg_0; [L199] SORT_1 var_16_arg_0 = var_14; [L200] SORT_12 var_16_arg_1 = var_13; [L201] SORT_15 var_16 = ((SORT_15)var_16_arg_0 << 3) | var_16_arg_1; [L202] var_16 = var_16 & mask_SORT_15 [L203] SORT_1 var_18_arg_0 = input_3; [L204] SORT_15 var_18_arg_1 = var_16; [L205] SORT_17 var_18 = ((SORT_17)var_18_arg_0 << 4) | var_18_arg_1; [L206] var_18 = var_18 & mask_SORT_17 [L207] SORT_1 var_20_arg_0 = input_3; [L208] SORT_17 var_20_arg_1 = var_18; [L209] SORT_19 var_20 = ((SORT_19)var_20_arg_0 << 5) | var_20_arg_1; [L210] var_20 = var_20 & mask_SORT_19 [L211] SORT_1 var_22_arg_0 = input_3; [L212] SORT_19 var_22_arg_1 = var_20; [L213] SORT_21 var_22 = ((SORT_21)var_22_arg_0 << 6) | var_22_arg_1; [L214] var_22 = var_22 & mask_SORT_21 [L215] SORT_1 var_24_arg_0 = input_3; [L216] SORT_21 var_24_arg_1 = var_22; [L217] SORT_23 var_24 = ((SORT_23)var_24_arg_0 << 7) | var_24_arg_1; [L218] var_24 = var_24 & mask_SORT_23 [L219] SORT_1 var_26_arg_0 = input_3; [L220] SORT_23 var_26_arg_1 = var_24; [L221] SORT_25 var_26 = ((SORT_25)var_26_arg_0 << 8) | var_26_arg_1; [L222] var_26 = var_26 & mask_SORT_25 [L223] SORT_1 var_28_arg_0 = var_14; [L224] SORT_25 var_28_arg_1 = var_26; [L225] SORT_27 var_28 = ((SORT_27)var_28_arg_0 << 9) | var_28_arg_1; [L226] var_28 = var_28 & mask_SORT_27 [L227] SORT_1 var_30_arg_0 = var_14; [L228] SORT_27 var_30_arg_1 = var_28; [L229] SORT_29 var_30 = ((SORT_29)var_30_arg_0 << 10) | var_30_arg_1; [L230] var_30 = var_30 & mask_SORT_29 [L231] SORT_1 var_32_arg_0 = var_14; [L232] SORT_29 var_32_arg_1 = var_30; [L233] SORT_31 var_32 = ((SORT_31)var_32_arg_0 << 11) | var_32_arg_1; [L234] var_32 = var_32 & mask_SORT_31 [L235] SORT_1 var_34_arg_0 = var_14; [L236] SORT_31 var_34_arg_1 = var_32; [L237] SORT_33 var_34 = ((SORT_33)var_34_arg_0 << 12) | var_34_arg_1; [L238] var_34 = var_34 & mask_SORT_33 [L239] SORT_1 var_36_arg_0 = var_14; [L240] SORT_33 var_36_arg_1 = var_34; [L241] SORT_35 var_36 = ((SORT_35)var_36_arg_0 << 13) | var_36_arg_1; [L242] var_36 = var_36 & mask_SORT_35 [L243] SORT_1 var_38_arg_0 = var_14; [L244] SORT_35 var_38_arg_1 = var_36; [L245] SORT_37 var_38 = ((SORT_37)var_38_arg_0 << 14) | var_38_arg_1; [L246] var_38 = var_38 & mask_SORT_37 [L247] SORT_1 var_39_arg_0 = var_14; [L248] SORT_37 var_39_arg_1 = var_38; [L249] SORT_11 var_39 = ((SORT_11)var_39_arg_0 << 15) | var_39_arg_1; [L250] SORT_1 var_41_arg_0 = state_40; [L251] SORT_1 var_41 = ~var_41_arg_0; [L252] SORT_1 var_42_arg_0 = state_40; [L253] SORT_12 var_42_arg_1 = var_13; [L254] SORT_15 var_42 = ((SORT_15)var_42_arg_0 << 3) | var_42_arg_1; [L255] var_42 = var_42 & mask_SORT_15 [L256] SORT_1 var_43_arg_0 = var_41; [L257] SORT_15 var_43_arg_1 = var_42; [L258] SORT_17 var_43 = ((SORT_17)var_43_arg_0 << 4) | var_43_arg_1; [L259] var_43 = var_43 & mask_SORT_17 [L260] SORT_1 var_44_arg_0 = state_40; [L261] SORT_17 var_44_arg_1 = var_43; [L262] SORT_19 var_44 = ((SORT_19)var_44_arg_0 << 5) | var_44_arg_1; [L263] var_44 = var_44 & mask_SORT_19 [L264] SORT_1 var_45_arg_0 = var_41; [L265] SORT_19 var_45_arg_1 = var_44; [L266] SORT_21 var_45 = ((SORT_21)var_45_arg_0 << 6) | var_45_arg_1; [L267] var_45 = var_45 & mask_SORT_21 [L268] SORT_1 var_46_arg_0 = var_41; [L269] SORT_21 var_46_arg_1 = var_45; [L270] SORT_23 var_46 = ((SORT_23)var_46_arg_0 << 7) | var_46_arg_1; [L271] var_46 = var_46 & mask_SORT_23 [L272] SORT_1 var_47_arg_0 = state_40; [L273] SORT_23 var_47_arg_1 = var_46; [L274] SORT_25 var_47 = ((SORT_25)var_47_arg_0 << 8) | var_47_arg_1; [L275] var_47 = var_47 & mask_SORT_25 [L276] SORT_1 var_48_arg_0 = var_41; [L277] SORT_25 var_48_arg_1 = var_47; [L278] SORT_27 var_48 = ((SORT_27)var_48_arg_0 << 9) | var_48_arg_1; [L279] var_48 = var_48 & mask_SORT_27 [L280] SORT_1 var_49_arg_0 = var_41; [L281] SORT_27 var_49_arg_1 = var_48; [L282] SORT_29 var_49 = ((SORT_29)var_49_arg_0 << 10) | var_49_arg_1; [L283] var_49 = var_49 & mask_SORT_29 [L284] SORT_1 var_50_arg_0 = var_41; [L285] SORT_29 var_50_arg_1 = var_49; [L286] SORT_31 var_50 = ((SORT_31)var_50_arg_0 << 11) | var_50_arg_1; [L287] var_50 = var_50 & mask_SORT_31 [L288] SORT_1 var_51_arg_0 = var_41; [L289] SORT_31 var_51_arg_1 = var_50; [L290] SORT_33 var_51 = ((SORT_33)var_51_arg_0 << 12) | var_51_arg_1; [L291] var_51 = var_51 & mask_SORT_33 [L292] SORT_1 var_52_arg_0 = var_41; [L293] SORT_33 var_52_arg_1 = var_51; [L294] SORT_35 var_52 = ((SORT_35)var_52_arg_0 << 13) | var_52_arg_1; [L295] var_52 = var_52 & mask_SORT_35 [L296] SORT_1 var_53_arg_0 = var_41; [L297] SORT_35 var_53_arg_1 = var_52; [L298] SORT_37 var_53 = ((SORT_37)var_53_arg_0 << 14) | var_53_arg_1; [L299] var_53 = var_53 & mask_SORT_37 [L300] SORT_1 var_54_arg_0 = var_41; [L301] SORT_37 var_54_arg_1 = var_53; [L302] SORT_11 var_54 = ((SORT_11)var_54_arg_0 << 15) | var_54_arg_1; [L303] SORT_11 var_55_arg_0 = var_39; [L304] SORT_11 var_55_arg_1 = var_54; [L305] SORT_11 var_55 = var_55_arg_0 + var_55_arg_1; [L306] SORT_11 var_57_arg_0 = state_56; [L307] SORT_11 var_57 = -var_57_arg_0; [L308] SORT_1 var_59_arg_0 = state_58; [L309] SORT_11 var_59_arg_1 = var_57; [L310] SORT_11 var_59_arg_2 = state_56; [L311] SORT_11 var_59 = var_59_arg_0 ? var_59_arg_1 : var_59_arg_2; [L312] SORT_11 var_60_arg_0 = var_55; [L313] SORT_11 var_60_arg_1 = var_59; [L314] SORT_11 var_60 = var_60_arg_0 + var_60_arg_1; [L315] var_60 = var_60 & mask_SORT_11 [L316] SORT_11 var_61_arg_0 = var_60; [L317] SORT_1 var_61 = var_61_arg_0 >> 15; [L318] SORT_1 var_63_arg_0 = var_61; [L319] SORT_9 var_63_arg_1 = var_10; [L320] SORT_62 var_63 = ((SORT_62)var_63_arg_0 << 31) | var_63_arg_1; [L321] var_63 = var_63 & mask_SORT_62 [L322] SORT_11 var_106_arg_0 = var_60; [L323] SORT_1 var_106 = var_106_arg_0 >> 15; [L324] SORT_11 var_103_arg_0 = var_60; [L325] SORT_1 var_103 = var_103_arg_0 >> 15; [L326] SORT_11 var_100_arg_0 = var_60; [L327] SORT_1 var_100 = var_100_arg_0 >> 15; [L328] SORT_11 var_97_arg_0 = var_60; [L329] SORT_1 var_97 = var_97_arg_0 >> 15; [L330] SORT_11 var_94_arg_0 = var_60; [L331] SORT_1 var_94 = var_94_arg_0 >> 15; [L332] SORT_11 var_91_arg_0 = var_60; [L333] SORT_1 var_91 = var_91_arg_0 >> 15; [L334] SORT_11 var_88_arg_0 = var_60; [L335] SORT_1 var_88 = var_88_arg_0 >> 15; [L336] SORT_11 var_85_arg_0 = var_60; [L337] SORT_1 var_85 = var_85_arg_0 >> 15; [L338] SORT_11 var_82_arg_0 = var_60; [L339] SORT_1 var_82 = var_82_arg_0 >> 15; [L340] SORT_11 var_79_arg_0 = var_60; [L341] SORT_1 var_79 = var_79_arg_0 >> 15; [L342] SORT_11 var_76_arg_0 = var_60; [L343] SORT_1 var_76 = var_76_arg_0 >> 15; [L344] SORT_11 var_73_arg_0 = var_60; [L345] SORT_1 var_73 = var_73_arg_0 >> 15; [L346] SORT_11 var_70_arg_0 = var_60; [L347] SORT_1 var_70 = var_70_arg_0 >> 15; [L348] SORT_11 var_67_arg_0 = var_60; [L349] SORT_1 var_67 = var_67_arg_0 >> 15; [L350] SORT_11 var_64_arg_0 = var_60; [L351] SORT_1 var_64 = var_64_arg_0 >> 15; [L352] SORT_1 var_66_arg_0 = var_64; [L353] SORT_11 var_66_arg_1 = var_60; [L354] SORT_65 var_66 = ((SORT_65)var_66_arg_0 << 16) | var_66_arg_1; [L355] var_66 = var_66 & mask_SORT_65 [L356] SORT_1 var_69_arg_0 = var_67; [L357] SORT_65 var_69_arg_1 = var_66; [L358] SORT_68 var_69 = ((SORT_68)var_69_arg_0 << 17) | var_69_arg_1; [L359] var_69 = var_69 & mask_SORT_68 [L360] SORT_1 var_72_arg_0 = var_70; [L361] SORT_68 var_72_arg_1 = var_69; [L362] SORT_71 var_72 = ((SORT_71)var_72_arg_0 << 18) | var_72_arg_1; [L363] var_72 = var_72 & mask_SORT_71 [L364] SORT_1 var_75_arg_0 = var_73; [L365] SORT_71 var_75_arg_1 = var_72; [L366] SORT_74 var_75 = ((SORT_74)var_75_arg_0 << 19) | var_75_arg_1; [L367] var_75 = var_75 & mask_SORT_74 [L368] SORT_1 var_78_arg_0 = var_76; [L369] SORT_74 var_78_arg_1 = var_75; [L370] SORT_77 var_78 = ((SORT_77)var_78_arg_0 << 20) | var_78_arg_1; [L371] var_78 = var_78 & mask_SORT_77 [L372] SORT_1 var_81_arg_0 = var_79; [L373] SORT_77 var_81_arg_1 = var_78; [L374] SORT_80 var_81 = ((SORT_80)var_81_arg_0 << 21) | var_81_arg_1; [L375] var_81 = var_81 & mask_SORT_80 [L376] SORT_1 var_84_arg_0 = var_82; [L377] SORT_80 var_84_arg_1 = var_81; [L378] SORT_83 var_84 = ((SORT_83)var_84_arg_0 << 22) | var_84_arg_1; [L379] var_84 = var_84 & mask_SORT_83 [L380] SORT_1 var_87_arg_0 = var_85; [L381] SORT_83 var_87_arg_1 = var_84; [L382] SORT_86 var_87 = ((SORT_86)var_87_arg_0 << 23) | var_87_arg_1; [L383] var_87 = var_87 & mask_SORT_86 [L384] SORT_1 var_90_arg_0 = var_88; [L385] SORT_86 var_90_arg_1 = var_87; [L386] SORT_89 var_90 = ((SORT_89)var_90_arg_0 << 24) | var_90_arg_1; [L387] var_90 = var_90 & mask_SORT_89 [L388] SORT_1 var_93_arg_0 = var_91; [L389] SORT_89 var_93_arg_1 = var_90; [L390] SORT_92 var_93 = ((SORT_92)var_93_arg_0 << 25) | var_93_arg_1; [L391] var_93 = var_93 & mask_SORT_92 [L392] SORT_1 var_96_arg_0 = var_94; [L393] SORT_92 var_96_arg_1 = var_93; [L394] SORT_95 var_96 = ((SORT_95)var_96_arg_0 << 26) | var_96_arg_1; [L395] var_96 = var_96 & mask_SORT_95 [L396] SORT_1 var_99_arg_0 = var_97; [L397] SORT_95 var_99_arg_1 = var_96; [L398] SORT_98 var_99 = ((SORT_98)var_99_arg_0 << 27) | var_99_arg_1; [L399] var_99 = var_99 & mask_SORT_98 [L400] SORT_1 var_102_arg_0 = var_100; [L401] SORT_98 var_102_arg_1 = var_99; [L402] SORT_101 var_102 = ((SORT_101)var_102_arg_0 << 28) | var_102_arg_1; [L403] var_102 = var_102 & mask_SORT_101 [L404] SORT_1 var_105_arg_0 = var_103; [L405] SORT_101 var_105_arg_1 = var_102; [L406] SORT_104 var_105 = ((SORT_104)var_105_arg_0 << 29) | var_105_arg_1; [L407] var_105 = var_105 & mask_SORT_104 [L408] SORT_1 var_107_arg_0 = var_106; [L409] SORT_104 var_107_arg_1 = var_105; [L410] SORT_9 var_107 = ((SORT_9)var_107_arg_0 << 30) | var_107_arg_1; [L411] SORT_9 var_108_arg_0 = var_107; [L412] var_108_arg_0 = var_108_arg_0 & mask_SORT_9 [L413] SORT_62 var_108 = var_108_arg_0; [L414] SORT_62 var_109_arg_0 = var_63; [L415] SORT_62 var_109_arg_1 = var_108; [L416] SORT_1 var_109 = var_109_arg_0 <= var_109_arg_1; [L417] SORT_1 var_110_arg_0 = var_109; [L418] SORT_1 var_110_arg_1 = var_8; [L419] SORT_1 var_110_arg_2 = var_7; [L420] SORT_1 var_110 = var_110_arg_0 ? var_110_arg_1 : var_110_arg_2; [L421] var_110 = var_110 & mask_SORT_1 [L422] SORT_1 var_111_arg_0 = input_3; [L423] SORT_1 var_111_arg_1 = var_110; [L424] SORT_1 var_111 = var_111_arg_0 ^ var_111_arg_1; [L425] SORT_1 var_112_arg_0 = var_111; [L426] SORT_1 var_112 = ~var_112_arg_0; [L427] SORT_1 var_120_arg_0 = var_119; [L428] SORT_1 var_120_arg_1 = var_112; [L429] SORT_1 var_120_arg_2 = var_8; [L430] SORT_1 var_120 = var_120_arg_0 ? var_120_arg_1 : var_120_arg_2; [L431] SORT_1 var_121_arg_0 = var_120; [L432] SORT_1 var_121 = ~var_121_arg_0; [L433] SORT_1 var_122_arg_0 = var_120; [L434] SORT_1 var_122 = ~var_122_arg_0; [L435] SORT_1 var_123_arg_0 = var_121; [L436] SORT_1 var_123_arg_1 = var_122; [L437] SORT_1 var_123 = var_123_arg_0 & var_123_arg_1; [L438] var_123 = var_123 & mask_SORT_1 [L439] SORT_1 bad_124_arg_0 = var_123; [L440] CALL __VERIFIER_assert(!(bad_124_arg_0)) [L20] COND FALSE !(!(cond)) [L440] RET __VERIFIER_assert(!(bad_124_arg_0)) [L442] SORT_15 var_252_arg_0 = state_140; [L443] SORT_15 var_252_arg_1 = var_251; [L444] SORT_1 var_252 = var_252_arg_0 == var_252_arg_1; [L445] SORT_12 var_245_arg_0 = var_13; [L446] var_245_arg_0 = var_245_arg_0 & mask_SORT_12 [L447] SORT_15 var_245 = var_245_arg_0; [L448] SORT_15 var_246_arg_0 = var_245; [L449] SORT_15 var_246_arg_1 = state_137; [L450] SORT_1 var_246 = var_246_arg_0 <= var_246_arg_1; [L451] SORT_12 var_248_arg_0 = var_247; [L452] var_248_arg_0 = var_248_arg_0 & mask_SORT_12 [L453] SORT_15 var_248 = var_248_arg_0; [L454] SORT_15 var_249_arg_0 = state_137; [L455] SORT_15 var_249_arg_1 = var_248; [L456] SORT_1 var_249 = var_249_arg_0 <= var_249_arg_1; [L457] SORT_1 var_250_arg_0 = var_246; [L458] SORT_1 var_250_arg_1 = var_249; [L459] SORT_1 var_250 = var_250_arg_0 & var_250_arg_1; [L460] SORT_1 var_253_arg_0 = var_252; [L461] SORT_1 var_253_arg_1 = var_250; [L462] SORT_1 var_253_arg_2 = var_8; [L463] SORT_1 var_253 = var_253_arg_0 ? var_253_arg_1 : var_253_arg_2; [L464] SORT_1 var_254_arg_0 = input_4; [L465] SORT_1 var_254_arg_1 = var_8; [L466] SORT_1 var_254_arg_2 = var_253; [L467] SORT_1 var_254 = var_254_arg_0 ? var_254_arg_1 : var_254_arg_2; [L468] SORT_1 next_255_arg_1 = var_254; [L469] SORT_1 var_256_arg_0 = input_4; [L470] SORT_1 var_256_arg_1 = var_7; [L471] SORT_1 var_256_arg_2 = input_3; [L472] SORT_1 var_256 = var_256_arg_0 ? var_256_arg_1 : var_256_arg_2; [L473] SORT_1 next_257_arg_1 = var_256; [L474] SORT_23 var_190_arg_0 = var_189; [L475] var_190_arg_0 = (var_190_arg_0 & msb_SORT_23) ? (var_190_arg_0 | ~mask_SORT_23) : (var_190_arg_0 & mask_SORT_23) [L476] SORT_83 var_190 = (int)((signed char)var_190_arg_0); [L477] SORT_11 var_191_arg_0 = state_56; [L478] var_191_arg_0 = (var_191_arg_0 & msb_SORT_11) ? (var_191_arg_0 | ~mask_SORT_11) : (var_191_arg_0 & mask_SORT_11) [L479] SORT_83 var_191 = (int)((short)var_191_arg_0); [L480] SORT_83 var_192_arg_0 = var_190; [L481] SORT_83 var_192_arg_1 = var_191; [L482] SORT_83 var_192 = var_192_arg_0 * var_192_arg_1; [L483] SORT_153 var_155_arg_0 = var_154; [L484] var_155_arg_0 = (var_155_arg_0 & msb_SORT_153) ? (var_155_arg_0 | ~mask_SORT_153) : (var_155_arg_0 & mask_SORT_153) [L485] SORT_68 var_155 = (int)((signed char)var_155_arg_0); [L486] SORT_11 var_145_arg_0 = state_144; [L487] SORT_11 var_145 = -var_145_arg_0; [L488] SORT_1 var_146_arg_0 = var_110; [L489] SORT_11 var_146_arg_1 = var_145; [L490] SORT_11 var_146_arg_2 = state_144; [L491] SORT_11 var_146 = var_146_arg_0 ? var_146_arg_1 : var_146_arg_2; [L492] SORT_11 var_147_arg_0 = var_55; [L493] SORT_11 var_147_arg_1 = var_146; [L494] SORT_11 var_147 = var_147_arg_0 + var_147_arg_1; [L495] SORT_11 var_156_arg_0 = var_147; [L496] SORT_11 var_156 = -var_156_arg_0; [L497] SORT_1 var_157_arg_0 = state_58; [L498] SORT_11 var_157_arg_1 = var_147; [L499] SORT_11 var_157_arg_2 = var_156; [L500] SORT_11 var_157 = var_157_arg_0 ? var_157_arg_1 : var_157_arg_2; [L501] SORT_11 var_158_arg_0 = var_157; [L502] var_158_arg_0 = (var_158_arg_0 & msb_SORT_11) ? (var_158_arg_0 | ~mask_SORT_11) : (var_158_arg_0 & mask_SORT_11) [L503] SORT_68 var_158 = (int)((short)var_158_arg_0); [L504] SORT_68 var_159_arg_0 = var_155; [L505] SORT_68 var_159_arg_1 = var_158; [L506] SORT_68 var_159 = var_159_arg_0 * var_159_arg_1; [L507] var_159 = var_159 & mask_SORT_68 [L508] SORT_68 var_266_arg_0 = var_159; [L509] SORT_1 var_266 = var_266_arg_0 >> 17; [L510] SORT_68 var_264_arg_0 = var_159; [L511] SORT_1 var_264 = var_264_arg_0 >> 17; [L512] SORT_68 var_262_arg_0 = var_159; [L513] SORT_1 var_262 = var_262_arg_0 >> 17; [L514] SORT_68 var_260_arg_0 = var_159; [L515] SORT_1 var_260 = var_260_arg_0 >> 17; [L516] SORT_68 var_258_arg_0 = var_159; [L517] SORT_1 var_258 = var_258_arg_0 >> 17; [L518] SORT_1 var_259_arg_0 = var_258; [L519] SORT_68 var_259_arg_1 = var_159; [L520] SORT_71 var_259 = ((SORT_71)var_259_arg_0 << 18) | var_259_arg_1; [L521] var_259 = var_259 & mask_SORT_71 [L522] SORT_1 var_261_arg_0 = var_260; [L523] SORT_71 var_261_arg_1 = var_259; [L524] SORT_74 var_261 = ((SORT_74)var_261_arg_0 << 19) | var_261_arg_1; [L525] var_261 = var_261 & mask_SORT_74 [L526] SORT_1 var_263_arg_0 = var_262; [L527] SORT_74 var_263_arg_1 = var_261; [L528] SORT_77 var_263 = ((SORT_77)var_263_arg_0 << 20) | var_263_arg_1; [L529] var_263 = var_263 & mask_SORT_77 [L530] SORT_1 var_265_arg_0 = var_264; [L531] SORT_77 var_265_arg_1 = var_263; [L532] SORT_80 var_265 = ((SORT_80)var_265_arg_0 << 21) | var_265_arg_1; [L533] var_265 = var_265 & mask_SORT_80 [L534] SORT_1 var_267_arg_0 = var_266; [L535] SORT_80 var_267_arg_1 = var_265; [L536] SORT_83 var_267 = ((SORT_83)var_267_arg_0 << 22) | var_267_arg_1; [L537] SORT_83 var_268_arg_0 = var_192; [L538] SORT_83 var_268_arg_1 = var_267; [L539] SORT_83 var_268 = var_268_arg_0 + var_268_arg_1; [L540] SORT_21 var_270_arg_0 = var_269; [L541] var_270_arg_0 = var_270_arg_0 & mask_SORT_21 [L542] SORT_83 var_270 = var_270_arg_0; [L543] SORT_83 var_271_arg_0 = var_268; [L544] SORT_83 var_271_arg_1 = var_270; [L545] SORT_83 var_271 = var_271_arg_0 + var_271_arg_1; [L546] SORT_83 var_272_arg_0 = var_271; [L547] SORT_11 var_272 = var_272_arg_0 >> 7; [L548] SORT_1 var_273_arg_0 = input_4; [L549] SORT_11 var_273_arg_1 = var_197; [L550] SORT_11 var_273_arg_2 = var_272; [L551] SORT_11 var_273 = var_273_arg_0 ? var_273_arg_1 : var_273_arg_2; [L552] SORT_11 next_274_arg_1 = var_273; [L553] SORT_1 var_275_arg_0 = input_4; [L554] SORT_1 var_275_arg_1 = var_7; [L555] SORT_1 var_275_arg_2 = var_110; [L556] SORT_1 var_275 = var_275_arg_0 ? var_275_arg_1 : var_275_arg_2; [L557] var_275 = var_275 & mask_SORT_1 [L558] SORT_1 next_276_arg_1 = var_275; [L559] SORT_1 var_277_arg_0 = var_8; [L560] var_277_arg_0 = var_277_arg_0 & mask_SORT_1 [L561] SORT_11 var_277 = var_277_arg_0; [L562] SORT_11 var_278_arg_0 = state_117; [L563] SORT_11 var_278_arg_1 = var_277; [L564] SORT_11 var_278 = var_278_arg_0 + var_278_arg_1; [L565] var_278 = var_278 & mask_SORT_11 [L566] SORT_11 next_279_arg_1 = var_278; [L567] SORT_12 var_283_arg_0 = var_282; [L568] SORT_1 var_283_arg_1 = input_3; [L569] SORT_15 var_283 = ((SORT_15)var_283_arg_0 << 1) | var_283_arg_1; [L570] SORT_1 var_280_arg_0 = input_3; [L571] var_280_arg_0 = var_280_arg_0 & mask_SORT_1 [L572] SORT_15 var_280 = var_280_arg_0; [L573] SORT_15 var_281_arg_0 = state_137; [L574] SORT_15 var_281_arg_1 = var_280; [L575] SORT_15 var_281 = var_281_arg_0 + var_281_arg_1; [L576] SORT_1 var_284_arg_0 = var_252; [L577] SORT_15 var_284_arg_1 = var_283; [L578] SORT_15 var_284_arg_2 = var_281; [L579] SORT_15 var_284 = var_284_arg_0 ? var_284_arg_1 : var_284_arg_2; [L580] SORT_1 var_286_arg_0 = input_4; [L581] SORT_15 var_286_arg_1 = var_285; [L582] SORT_15 var_286_arg_2 = var_284; [L583] SORT_15 var_286 = var_286_arg_0 ? var_286_arg_1 : var_286_arg_2; [L584] var_286 = var_286 & mask_SORT_15 [L585] SORT_15 next_287_arg_1 = var_286; [L586] SORT_1 var_288_arg_0 = var_8; [L587] var_288_arg_0 = var_288_arg_0 & mask_SORT_1 [L588] SORT_15 var_288 = var_288_arg_0; [L589] SORT_15 var_289_arg_0 = state_140; [L590] SORT_15 var_289_arg_1 = var_288; [L591] SORT_15 var_289 = var_289_arg_0 + var_289_arg_1; [L592] SORT_1 var_290_arg_0 = var_252; [L593] SORT_15 var_290_arg_1 = var_285; [L594] SORT_15 var_290_arg_2 = var_289; [L595] SORT_15 var_290 = var_290_arg_0 ? var_290_arg_1 : var_290_arg_2; [L596] SORT_1 var_291_arg_0 = input_4; [L597] SORT_15 var_291_arg_1 = var_285; [L598] SORT_15 var_291_arg_2 = var_290; [L599] SORT_15 var_291 = var_291_arg_0 ? var_291_arg_1 : var_291_arg_2; [L600] var_291 = var_291 & mask_SORT_15 [L601] SORT_15 next_292_arg_1 = var_291; [L602] SORT_23 var_235_arg_0 = var_189; [L603] var_235_arg_0 = (var_235_arg_0 & msb_SORT_23) ? (var_235_arg_0 | ~mask_SORT_23) : (var_235_arg_0 & mask_SORT_23) [L604] SORT_83 var_235 = (int)((signed char)var_235_arg_0); [L605] SORT_11 var_236_arg_0 = state_144; [L606] var_236_arg_0 = (var_236_arg_0 & msb_SORT_11) ? (var_236_arg_0 | ~mask_SORT_11) : (var_236_arg_0 & mask_SORT_11) [L607] SORT_83 var_236 = (int)((short)var_236_arg_0); [L608] SORT_83 var_237_arg_0 = var_235; [L609] SORT_83 var_237_arg_1 = var_236; [L610] SORT_83 var_237 = var_237_arg_0 * var_237_arg_1; [L611] SORT_153 var_201_arg_0 = var_154; [L612] var_201_arg_0 = (var_201_arg_0 & msb_SORT_153) ? (var_201_arg_0 | ~mask_SORT_153) : (var_201_arg_0 & mask_SORT_153) [L613] SORT_68 var_201 = (int)((signed char)var_201_arg_0); [L614] SORT_11 var_202_arg_0 = var_60; [L615] SORT_11 var_202 = -var_202_arg_0; [L616] SORT_1 var_203_arg_0 = var_110; [L617] SORT_11 var_203_arg_1 = var_60; [L618] SORT_11 var_203_arg_2 = var_202; [L619] SORT_11 var_203 = var_203_arg_0 ? var_203_arg_1 : var_203_arg_2; [L620] SORT_11 var_204_arg_0 = var_203; [L621] var_204_arg_0 = (var_204_arg_0 & msb_SORT_11) ? (var_204_arg_0 | ~mask_SORT_11) : (var_204_arg_0 & mask_SORT_11) [L622] SORT_68 var_204 = (int)((short)var_204_arg_0); [L623] SORT_68 var_205_arg_0 = var_201; [L624] SORT_68 var_205_arg_1 = var_204; [L625] SORT_68 var_205 = var_205_arg_0 * var_205_arg_1; [L626] var_205 = var_205 & mask_SORT_68 [L627] SORT_68 var_301_arg_0 = var_205; [L628] SORT_1 var_301 = var_301_arg_0 >> 17; [L629] SORT_68 var_299_arg_0 = var_205; [L630] SORT_1 var_299 = var_299_arg_0 >> 17; [L631] SORT_68 var_297_arg_0 = var_205; [L632] SORT_1 var_297 = var_297_arg_0 >> 17; [L633] SORT_68 var_295_arg_0 = var_205; [L634] SORT_1 var_295 = var_295_arg_0 >> 17; [L635] SORT_68 var_293_arg_0 = var_205; [L636] SORT_1 var_293 = var_293_arg_0 >> 17; [L637] SORT_1 var_294_arg_0 = var_293; [L638] SORT_68 var_294_arg_1 = var_205; [L639] SORT_71 var_294 = ((SORT_71)var_294_arg_0 << 18) | var_294_arg_1; [L640] var_294 = var_294 & mask_SORT_71 [L641] SORT_1 var_296_arg_0 = var_295; [L642] SORT_71 var_296_arg_1 = var_294; [L643] SORT_74 var_296 = ((SORT_74)var_296_arg_0 << 19) | var_296_arg_1; [L644] var_296 = var_296 & mask_SORT_74 [L645] SORT_1 var_298_arg_0 = var_297; [L646] SORT_74 var_298_arg_1 = var_296; [L647] SORT_77 var_298 = ((SORT_77)var_298_arg_0 << 20) | var_298_arg_1; [L648] var_298 = var_298 & mask_SORT_77 [L649] SORT_1 var_300_arg_0 = var_299; [L650] SORT_77 var_300_arg_1 = var_298; [L651] SORT_80 var_300 = ((SORT_80)var_300_arg_0 << 21) | var_300_arg_1; [L652] var_300 = var_300 & mask_SORT_80 [L653] SORT_1 var_302_arg_0 = var_301; [L654] SORT_80 var_302_arg_1 = var_300; [L655] SORT_83 var_302 = ((SORT_83)var_302_arg_0 << 22) | var_302_arg_1; [L656] SORT_83 var_303_arg_0 = var_237; [L657] SORT_83 var_303_arg_1 = var_302; [L658] SORT_83 var_303 = var_303_arg_0 + var_303_arg_1; [L659] SORT_21 var_304_arg_0 = var_269; [L660] var_304_arg_0 = var_304_arg_0 & mask_SORT_21 [L661] SORT_83 var_304 = var_304_arg_0; [L662] SORT_83 var_305_arg_0 = var_303; [L663] SORT_83 var_305_arg_1 = var_304; [L664] SORT_83 var_305 = var_305_arg_0 + var_305_arg_1; [L665] SORT_83 var_306_arg_0 = var_305; [L666] SORT_11 var_306 = var_306_arg_0 >> 7; [L667] SORT_1 var_307_arg_0 = input_4; [L668] SORT_11 var_307_arg_1 = var_197; [L669] SORT_11 var_307_arg_2 = var_306; [L670] SORT_11 var_307 = var_307_arg_0 ? var_307_arg_1 : var_307_arg_2; [L671] SORT_11 next_308_arg_1 = var_307; [L673] state_5 = next_255_arg_1 [L674] state_40 = next_257_arg_1 [L675] state_56 = next_274_arg_1 [L676] state_58 = next_276_arg_1 [L677] state_117 = next_279_arg_1 [L678] state_137 = next_287_arg_1 [L679] state_140 = next_292_arg_1 [L680] state_144 = next_308_arg_1 [L155] input_2 = __VERIFIER_nondet_uchar() [L156] input_3 = __VERIFIER_nondet_uchar() [L157] input_3 = input_3 & mask_SORT_1 [L158] input_4 = __VERIFIER_nondet_uchar() [L159] input_4 = input_4 & mask_SORT_1 [L161] SORT_1 var_125_arg_0 = state_5; [L162] SORT_1 var_125 = ~var_125_arg_0; [L163] SORT_1 var_126_arg_0 = var_125; [L164] SORT_1 var_126 = ~var_126_arg_0; [L165] SORT_1 var_127_arg_0 = state_5; [L166] SORT_1 var_127_arg_1 = var_126; [L167] SORT_1 var_127 = var_127_arg_0 | var_127_arg_1; [L168] var_127 = var_127 & mask_SORT_1 [L169] SORT_1 constr_128_arg_0 = var_127; [L170] CALL assume_abort_if_not(constr_128_arg_0) [L21] COND FALSE !(!cond) [L170] RET assume_abort_if_not(constr_128_arg_0) [L171] SORT_1 var_129_arg_0 = var_8; [L172] var_129_arg_0 = var_129_arg_0 & mask_SORT_1 [L173] SORT_11 var_129 = var_129_arg_0; [L174] SORT_11 var_130_arg_0 = state_117; [L175] SORT_11 var_130_arg_1 = var_129; [L176] SORT_1 var_130 = var_130_arg_0 <= var_130_arg_1; [L177] SORT_1 var_131_arg_0 = input_4; [L178] SORT_1 var_131_arg_1 = var_130; [L179] SORT_1 var_131 = var_131_arg_0 ^ var_131_arg_1; [L180] SORT_1 var_132_arg_0 = var_131; [L181] SORT_1 var_132 = ~var_132_arg_0; [L182] SORT_1 var_133_arg_0 = var_131; [L183] SORT_1 var_133 = ~var_133_arg_0; [L184] SORT_1 var_134_arg_0 = var_132; [L185] SORT_1 var_134_arg_1 = var_133; [L186] SORT_1 var_134 = var_134_arg_0 | var_134_arg_1; [L187] var_134 = var_134 & mask_SORT_1 [L188] SORT_1 constr_135_arg_0 = var_134; [L189] CALL assume_abort_if_not(constr_135_arg_0) [L21] COND FALSE !(!cond) [L189] RET assume_abort_if_not(constr_135_arg_0) [L191] SORT_12 var_115_arg_0 = var_114; [L192] var_115_arg_0 = var_115_arg_0 & mask_SORT_12 [L193] SORT_11 var_115 = var_115_arg_0; [L194] SORT_11 var_119_arg_0 = var_115; [L195] SORT_11 var_119_arg_1 = state_117; [L196] SORT_1 var_119 = var_119_arg_0 < var_119_arg_1; [L197] SORT_1 var_14_arg_0 = input_3; [L198] SORT_1 var_14 = ~var_14_arg_0; [L199] SORT_1 var_16_arg_0 = var_14; [L200] SORT_12 var_16_arg_1 = var_13; [L201] SORT_15 var_16 = ((SORT_15)var_16_arg_0 << 3) | var_16_arg_1; [L202] var_16 = var_16 & mask_SORT_15 [L203] SORT_1 var_18_arg_0 = input_3; [L204] SORT_15 var_18_arg_1 = var_16; [L205] SORT_17 var_18 = ((SORT_17)var_18_arg_0 << 4) | var_18_arg_1; [L206] var_18 = var_18 & mask_SORT_17 [L207] SORT_1 var_20_arg_0 = input_3; [L208] SORT_17 var_20_arg_1 = var_18; [L209] SORT_19 var_20 = ((SORT_19)var_20_arg_0 << 5) | var_20_arg_1; [L210] var_20 = var_20 & mask_SORT_19 [L211] SORT_1 var_22_arg_0 = input_3; [L212] SORT_19 var_22_arg_1 = var_20; [L213] SORT_21 var_22 = ((SORT_21)var_22_arg_0 << 6) | var_22_arg_1; [L214] var_22 = var_22 & mask_SORT_21 [L215] SORT_1 var_24_arg_0 = input_3; [L216] SORT_21 var_24_arg_1 = var_22; [L217] SORT_23 var_24 = ((SORT_23)var_24_arg_0 << 7) | var_24_arg_1; [L218] var_24 = var_24 & mask_SORT_23 [L219] SORT_1 var_26_arg_0 = input_3; [L220] SORT_23 var_26_arg_1 = var_24; [L221] SORT_25 var_26 = ((SORT_25)var_26_arg_0 << 8) | var_26_arg_1; [L222] var_26 = var_26 & mask_SORT_25 [L223] SORT_1 var_28_arg_0 = var_14; [L224] SORT_25 var_28_arg_1 = var_26; [L225] SORT_27 var_28 = ((SORT_27)var_28_arg_0 << 9) | var_28_arg_1; [L226] var_28 = var_28 & mask_SORT_27 [L227] SORT_1 var_30_arg_0 = var_14; [L228] SORT_27 var_30_arg_1 = var_28; [L229] SORT_29 var_30 = ((SORT_29)var_30_arg_0 << 10) | var_30_arg_1; [L230] var_30 = var_30 & mask_SORT_29 [L231] SORT_1 var_32_arg_0 = var_14; [L232] SORT_29 var_32_arg_1 = var_30; [L233] SORT_31 var_32 = ((SORT_31)var_32_arg_0 << 11) | var_32_arg_1; [L234] var_32 = var_32 & mask_SORT_31 [L235] SORT_1 var_34_arg_0 = var_14; [L236] SORT_31 var_34_arg_1 = var_32; [L237] SORT_33 var_34 = ((SORT_33)var_34_arg_0 << 12) | var_34_arg_1; [L238] var_34 = var_34 & mask_SORT_33 [L239] SORT_1 var_36_arg_0 = var_14; [L240] SORT_33 var_36_arg_1 = var_34; [L241] SORT_35 var_36 = ((SORT_35)var_36_arg_0 << 13) | var_36_arg_1; [L242] var_36 = var_36 & mask_SORT_35 [L243] SORT_1 var_38_arg_0 = var_14; [L244] SORT_35 var_38_arg_1 = var_36; [L245] SORT_37 var_38 = ((SORT_37)var_38_arg_0 << 14) | var_38_arg_1; [L246] var_38 = var_38 & mask_SORT_37 [L247] SORT_1 var_39_arg_0 = var_14; [L248] SORT_37 var_39_arg_1 = var_38; [L249] SORT_11 var_39 = ((SORT_11)var_39_arg_0 << 15) | var_39_arg_1; [L250] SORT_1 var_41_arg_0 = state_40; [L251] SORT_1 var_41 = ~var_41_arg_0; [L252] SORT_1 var_42_arg_0 = state_40; [L253] SORT_12 var_42_arg_1 = var_13; [L254] SORT_15 var_42 = ((SORT_15)var_42_arg_0 << 3) | var_42_arg_1; [L255] var_42 = var_42 & mask_SORT_15 [L256] SORT_1 var_43_arg_0 = var_41; [L257] SORT_15 var_43_arg_1 = var_42; [L258] SORT_17 var_43 = ((SORT_17)var_43_arg_0 << 4) | var_43_arg_1; [L259] var_43 = var_43 & mask_SORT_17 [L260] SORT_1 var_44_arg_0 = state_40; [L261] SORT_17 var_44_arg_1 = var_43; [L262] SORT_19 var_44 = ((SORT_19)var_44_arg_0 << 5) | var_44_arg_1; [L263] var_44 = var_44 & mask_SORT_19 [L264] SORT_1 var_45_arg_0 = var_41; [L265] SORT_19 var_45_arg_1 = var_44; [L266] SORT_21 var_45 = ((SORT_21)var_45_arg_0 << 6) | var_45_arg_1; [L267] var_45 = var_45 & mask_SORT_21 [L268] SORT_1 var_46_arg_0 = var_41; [L269] SORT_21 var_46_arg_1 = var_45; [L270] SORT_23 var_46 = ((SORT_23)var_46_arg_0 << 7) | var_46_arg_1; [L271] var_46 = var_46 & mask_SORT_23 [L272] SORT_1 var_47_arg_0 = state_40; [L273] SORT_23 var_47_arg_1 = var_46; [L274] SORT_25 var_47 = ((SORT_25)var_47_arg_0 << 8) | var_47_arg_1; [L275] var_47 = var_47 & mask_SORT_25 [L276] SORT_1 var_48_arg_0 = var_41; [L277] SORT_25 var_48_arg_1 = var_47; [L278] SORT_27 var_48 = ((SORT_27)var_48_arg_0 << 9) | var_48_arg_1; [L279] var_48 = var_48 & mask_SORT_27 [L280] SORT_1 var_49_arg_0 = var_41; [L281] SORT_27 var_49_arg_1 = var_48; [L282] SORT_29 var_49 = ((SORT_29)var_49_arg_0 << 10) | var_49_arg_1; [L283] var_49 = var_49 & mask_SORT_29 [L284] SORT_1 var_50_arg_0 = var_41; [L285] SORT_29 var_50_arg_1 = var_49; [L286] SORT_31 var_50 = ((SORT_31)var_50_arg_0 << 11) | var_50_arg_1; [L287] var_50 = var_50 & mask_SORT_31 [L288] SORT_1 var_51_arg_0 = var_41; [L289] SORT_31 var_51_arg_1 = var_50; [L290] SORT_33 var_51 = ((SORT_33)var_51_arg_0 << 12) | var_51_arg_1; [L291] var_51 = var_51 & mask_SORT_33 [L292] SORT_1 var_52_arg_0 = var_41; [L293] SORT_33 var_52_arg_1 = var_51; [L294] SORT_35 var_52 = ((SORT_35)var_52_arg_0 << 13) | var_52_arg_1; [L295] var_52 = var_52 & mask_SORT_35 [L296] SORT_1 var_53_arg_0 = var_41; [L297] SORT_35 var_53_arg_1 = var_52; [L298] SORT_37 var_53 = ((SORT_37)var_53_arg_0 << 14) | var_53_arg_1; [L299] var_53 = var_53 & mask_SORT_37 [L300] SORT_1 var_54_arg_0 = var_41; [L301] SORT_37 var_54_arg_1 = var_53; [L302] SORT_11 var_54 = ((SORT_11)var_54_arg_0 << 15) | var_54_arg_1; [L303] SORT_11 var_55_arg_0 = var_39; [L304] SORT_11 var_55_arg_1 = var_54; [L305] SORT_11 var_55 = var_55_arg_0 + var_55_arg_1; [L306] SORT_11 var_57_arg_0 = state_56; [L307] SORT_11 var_57 = -var_57_arg_0; [L308] SORT_1 var_59_arg_0 = state_58; [L309] SORT_11 var_59_arg_1 = var_57; [L310] SORT_11 var_59_arg_2 = state_56; [L311] SORT_11 var_59 = var_59_arg_0 ? var_59_arg_1 : var_59_arg_2; [L312] SORT_11 var_60_arg_0 = var_55; [L313] SORT_11 var_60_arg_1 = var_59; [L314] SORT_11 var_60 = var_60_arg_0 + var_60_arg_1; [L315] var_60 = var_60 & mask_SORT_11 [L316] SORT_11 var_61_arg_0 = var_60; [L317] SORT_1 var_61 = var_61_arg_0 >> 15; [L318] SORT_1 var_63_arg_0 = var_61; [L319] SORT_9 var_63_arg_1 = var_10; [L320] SORT_62 var_63 = ((SORT_62)var_63_arg_0 << 31) | var_63_arg_1; [L321] var_63 = var_63 & mask_SORT_62 [L322] SORT_11 var_106_arg_0 = var_60; [L323] SORT_1 var_106 = var_106_arg_0 >> 15; [L324] SORT_11 var_103_arg_0 = var_60; [L325] SORT_1 var_103 = var_103_arg_0 >> 15; [L326] SORT_11 var_100_arg_0 = var_60; [L327] SORT_1 var_100 = var_100_arg_0 >> 15; [L328] SORT_11 var_97_arg_0 = var_60; [L329] SORT_1 var_97 = var_97_arg_0 >> 15; [L330] SORT_11 var_94_arg_0 = var_60; [L331] SORT_1 var_94 = var_94_arg_0 >> 15; [L332] SORT_11 var_91_arg_0 = var_60; [L333] SORT_1 var_91 = var_91_arg_0 >> 15; [L334] SORT_11 var_88_arg_0 = var_60; [L335] SORT_1 var_88 = var_88_arg_0 >> 15; [L336] SORT_11 var_85_arg_0 = var_60; [L337] SORT_1 var_85 = var_85_arg_0 >> 15; [L338] SORT_11 var_82_arg_0 = var_60; [L339] SORT_1 var_82 = var_82_arg_0 >> 15; [L340] SORT_11 var_79_arg_0 = var_60; [L341] SORT_1 var_79 = var_79_arg_0 >> 15; [L342] SORT_11 var_76_arg_0 = var_60; [L343] SORT_1 var_76 = var_76_arg_0 >> 15; [L344] SORT_11 var_73_arg_0 = var_60; [L345] SORT_1 var_73 = var_73_arg_0 >> 15; [L346] SORT_11 var_70_arg_0 = var_60; [L347] SORT_1 var_70 = var_70_arg_0 >> 15; [L348] SORT_11 var_67_arg_0 = var_60; [L349] SORT_1 var_67 = var_67_arg_0 >> 15; [L350] SORT_11 var_64_arg_0 = var_60; [L351] SORT_1 var_64 = var_64_arg_0 >> 15; [L352] SORT_1 var_66_arg_0 = var_64; [L353] SORT_11 var_66_arg_1 = var_60; [L354] SORT_65 var_66 = ((SORT_65)var_66_arg_0 << 16) | var_66_arg_1; [L355] var_66 = var_66 & mask_SORT_65 [L356] SORT_1 var_69_arg_0 = var_67; [L357] SORT_65 var_69_arg_1 = var_66; [L358] SORT_68 var_69 = ((SORT_68)var_69_arg_0 << 17) | var_69_arg_1; [L359] var_69 = var_69 & mask_SORT_68 [L360] SORT_1 var_72_arg_0 = var_70; [L361] SORT_68 var_72_arg_1 = var_69; [L362] SORT_71 var_72 = ((SORT_71)var_72_arg_0 << 18) | var_72_arg_1; [L363] var_72 = var_72 & mask_SORT_71 [L364] SORT_1 var_75_arg_0 = var_73; [L365] SORT_71 var_75_arg_1 = var_72; [L366] SORT_74 var_75 = ((SORT_74)var_75_arg_0 << 19) | var_75_arg_1; [L367] var_75 = var_75 & mask_SORT_74 [L368] SORT_1 var_78_arg_0 = var_76; [L369] SORT_74 var_78_arg_1 = var_75; [L370] SORT_77 var_78 = ((SORT_77)var_78_arg_0 << 20) | var_78_arg_1; [L371] var_78 = var_78 & mask_SORT_77 [L372] SORT_1 var_81_arg_0 = var_79; [L373] SORT_77 var_81_arg_1 = var_78; [L374] SORT_80 var_81 = ((SORT_80)var_81_arg_0 << 21) | var_81_arg_1; [L375] var_81 = var_81 & mask_SORT_80 [L376] SORT_1 var_84_arg_0 = var_82; [L377] SORT_80 var_84_arg_1 = var_81; [L378] SORT_83 var_84 = ((SORT_83)var_84_arg_0 << 22) | var_84_arg_1; [L379] var_84 = var_84 & mask_SORT_83 [L380] SORT_1 var_87_arg_0 = var_85; [L381] SORT_83 var_87_arg_1 = var_84; [L382] SORT_86 var_87 = ((SORT_86)var_87_arg_0 << 23) | var_87_arg_1; [L383] var_87 = var_87 & mask_SORT_86 [L384] SORT_1 var_90_arg_0 = var_88; [L385] SORT_86 var_90_arg_1 = var_87; [L386] SORT_89 var_90 = ((SORT_89)var_90_arg_0 << 24) | var_90_arg_1; [L387] var_90 = var_90 & mask_SORT_89 [L388] SORT_1 var_93_arg_0 = var_91; [L389] SORT_89 var_93_arg_1 = var_90; [L390] SORT_92 var_93 = ((SORT_92)var_93_arg_0 << 25) | var_93_arg_1; [L391] var_93 = var_93 & mask_SORT_92 [L392] SORT_1 var_96_arg_0 = var_94; [L393] SORT_92 var_96_arg_1 = var_93; [L394] SORT_95 var_96 = ((SORT_95)var_96_arg_0 << 26) | var_96_arg_1; [L395] var_96 = var_96 & mask_SORT_95 [L396] SORT_1 var_99_arg_0 = var_97; [L397] SORT_95 var_99_arg_1 = var_96; [L398] SORT_98 var_99 = ((SORT_98)var_99_arg_0 << 27) | var_99_arg_1; [L399] var_99 = var_99 & mask_SORT_98 [L400] SORT_1 var_102_arg_0 = var_100; [L401] SORT_98 var_102_arg_1 = var_99; [L402] SORT_101 var_102 = ((SORT_101)var_102_arg_0 << 28) | var_102_arg_1; [L403] var_102 = var_102 & mask_SORT_101 [L404] SORT_1 var_105_arg_0 = var_103; [L405] SORT_101 var_105_arg_1 = var_102; [L406] SORT_104 var_105 = ((SORT_104)var_105_arg_0 << 29) | var_105_arg_1; [L407] var_105 = var_105 & mask_SORT_104 [L408] SORT_1 var_107_arg_0 = var_106; [L409] SORT_104 var_107_arg_1 = var_105; [L410] SORT_9 var_107 = ((SORT_9)var_107_arg_0 << 30) | var_107_arg_1; [L411] SORT_9 var_108_arg_0 = var_107; [L412] var_108_arg_0 = var_108_arg_0 & mask_SORT_9 [L413] SORT_62 var_108 = var_108_arg_0; [L414] SORT_62 var_109_arg_0 = var_63; [L415] SORT_62 var_109_arg_1 = var_108; [L416] SORT_1 var_109 = var_109_arg_0 <= var_109_arg_1; [L417] SORT_1 var_110_arg_0 = var_109; [L418] SORT_1 var_110_arg_1 = var_8; [L419] SORT_1 var_110_arg_2 = var_7; [L420] SORT_1 var_110 = var_110_arg_0 ? var_110_arg_1 : var_110_arg_2; [L421] var_110 = var_110 & mask_SORT_1 [L422] SORT_1 var_111_arg_0 = input_3; [L423] SORT_1 var_111_arg_1 = var_110; [L424] SORT_1 var_111 = var_111_arg_0 ^ var_111_arg_1; [L425] SORT_1 var_112_arg_0 = var_111; [L426] SORT_1 var_112 = ~var_112_arg_0; [L427] SORT_1 var_120_arg_0 = var_119; [L428] SORT_1 var_120_arg_1 = var_112; [L429] SORT_1 var_120_arg_2 = var_8; [L430] SORT_1 var_120 = var_120_arg_0 ? var_120_arg_1 : var_120_arg_2; [L431] SORT_1 var_121_arg_0 = var_120; [L432] SORT_1 var_121 = ~var_121_arg_0; [L433] SORT_1 var_122_arg_0 = var_120; [L434] SORT_1 var_122 = ~var_122_arg_0; [L435] SORT_1 var_123_arg_0 = var_121; [L436] SORT_1 var_123_arg_1 = var_122; [L437] SORT_1 var_123 = var_123_arg_0 & var_123_arg_1; [L438] var_123 = var_123 & mask_SORT_1 [L439] SORT_1 bad_124_arg_0 = var_123; [L440] CALL __VERIFIER_assert(!(bad_124_arg_0)) [L20] COND FALSE !(!(cond)) [L440] RET __VERIFIER_assert(!(bad_124_arg_0)) [L442] SORT_15 var_252_arg_0 = state_140; [L443] SORT_15 var_252_arg_1 = var_251; [L444] SORT_1 var_252 = var_252_arg_0 == var_252_arg_1; [L445] SORT_12 var_245_arg_0 = var_13; [L446] var_245_arg_0 = var_245_arg_0 & mask_SORT_12 [L447] SORT_15 var_245 = var_245_arg_0; [L448] SORT_15 var_246_arg_0 = var_245; [L449] SORT_15 var_246_arg_1 = state_137; [L450] SORT_1 var_246 = var_246_arg_0 <= var_246_arg_1; [L451] SORT_12 var_248_arg_0 = var_247; [L452] var_248_arg_0 = var_248_arg_0 & mask_SORT_12 [L453] SORT_15 var_248 = var_248_arg_0; [L454] SORT_15 var_249_arg_0 = state_137; [L455] SORT_15 var_249_arg_1 = var_248; [L456] SORT_1 var_249 = var_249_arg_0 <= var_249_arg_1; [L457] SORT_1 var_250_arg_0 = var_246; [L458] SORT_1 var_250_arg_1 = var_249; [L459] SORT_1 var_250 = var_250_arg_0 & var_250_arg_1; [L460] SORT_1 var_253_arg_0 = var_252; [L461] SORT_1 var_253_arg_1 = var_250; [L462] SORT_1 var_253_arg_2 = var_8; [L463] SORT_1 var_253 = var_253_arg_0 ? var_253_arg_1 : var_253_arg_2; [L464] SORT_1 var_254_arg_0 = input_4; [L465] SORT_1 var_254_arg_1 = var_8; [L466] SORT_1 var_254_arg_2 = var_253; [L467] SORT_1 var_254 = var_254_arg_0 ? var_254_arg_1 : var_254_arg_2; [L468] SORT_1 next_255_arg_1 = var_254; [L469] SORT_1 var_256_arg_0 = input_4; [L470] SORT_1 var_256_arg_1 = var_7; [L471] SORT_1 var_256_arg_2 = input_3; [L472] SORT_1 var_256 = var_256_arg_0 ? var_256_arg_1 : var_256_arg_2; [L473] SORT_1 next_257_arg_1 = var_256; [L474] SORT_23 var_190_arg_0 = var_189; [L475] var_190_arg_0 = (var_190_arg_0 & msb_SORT_23) ? (var_190_arg_0 | ~mask_SORT_23) : (var_190_arg_0 & mask_SORT_23) [L476] SORT_83 var_190 = (int)((signed char)var_190_arg_0); [L477] SORT_11 var_191_arg_0 = state_56; [L478] var_191_arg_0 = (var_191_arg_0 & msb_SORT_11) ? (var_191_arg_0 | ~mask_SORT_11) : (var_191_arg_0 & mask_SORT_11) [L479] SORT_83 var_191 = (int)((short)var_191_arg_0); [L480] SORT_83 var_192_arg_0 = var_190; [L481] SORT_83 var_192_arg_1 = var_191; [L482] SORT_83 var_192 = var_192_arg_0 * var_192_arg_1; [L483] SORT_153 var_155_arg_0 = var_154; [L484] var_155_arg_0 = (var_155_arg_0 & msb_SORT_153) ? (var_155_arg_0 | ~mask_SORT_153) : (var_155_arg_0 & mask_SORT_153) [L485] SORT_68 var_155 = (int)((signed char)var_155_arg_0); [L486] SORT_11 var_145_arg_0 = state_144; [L487] SORT_11 var_145 = -var_145_arg_0; [L488] SORT_1 var_146_arg_0 = var_110; [L489] SORT_11 var_146_arg_1 = var_145; [L490] SORT_11 var_146_arg_2 = state_144; [L491] SORT_11 var_146 = var_146_arg_0 ? var_146_arg_1 : var_146_arg_2; [L492] SORT_11 var_147_arg_0 = var_55; [L493] SORT_11 var_147_arg_1 = var_146; [L494] SORT_11 var_147 = var_147_arg_0 + var_147_arg_1; [L495] SORT_11 var_156_arg_0 = var_147; [L496] SORT_11 var_156 = -var_156_arg_0; [L497] SORT_1 var_157_arg_0 = state_58; [L498] SORT_11 var_157_arg_1 = var_147; [L499] SORT_11 var_157_arg_2 = var_156; [L500] SORT_11 var_157 = var_157_arg_0 ? var_157_arg_1 : var_157_arg_2; [L501] SORT_11 var_158_arg_0 = var_157; [L502] var_158_arg_0 = (var_158_arg_0 & msb_SORT_11) ? (var_158_arg_0 | ~mask_SORT_11) : (var_158_arg_0 & mask_SORT_11) [L503] SORT_68 var_158 = (int)((short)var_158_arg_0); [L504] SORT_68 var_159_arg_0 = var_155; [L505] SORT_68 var_159_arg_1 = var_158; [L506] SORT_68 var_159 = var_159_arg_0 * var_159_arg_1; [L507] var_159 = var_159 & mask_SORT_68 [L508] SORT_68 var_266_arg_0 = var_159; [L509] SORT_1 var_266 = var_266_arg_0 >> 17; [L510] SORT_68 var_264_arg_0 = var_159; [L511] SORT_1 var_264 = var_264_arg_0 >> 17; [L512] SORT_68 var_262_arg_0 = var_159; [L513] SORT_1 var_262 = var_262_arg_0 >> 17; [L514] SORT_68 var_260_arg_0 = var_159; [L515] SORT_1 var_260 = var_260_arg_0 >> 17; [L516] SORT_68 var_258_arg_0 = var_159; [L517] SORT_1 var_258 = var_258_arg_0 >> 17; [L518] SORT_1 var_259_arg_0 = var_258; [L519] SORT_68 var_259_arg_1 = var_159; [L520] SORT_71 var_259 = ((SORT_71)var_259_arg_0 << 18) | var_259_arg_1; [L521] var_259 = var_259 & mask_SORT_71 [L522] SORT_1 var_261_arg_0 = var_260; [L523] SORT_71 var_261_arg_1 = var_259; [L524] SORT_74 var_261 = ((SORT_74)var_261_arg_0 << 19) | var_261_arg_1; [L525] var_261 = var_261 & mask_SORT_74 [L526] SORT_1 var_263_arg_0 = var_262; [L527] SORT_74 var_263_arg_1 = var_261; [L528] SORT_77 var_263 = ((SORT_77)var_263_arg_0 << 20) | var_263_arg_1; [L529] var_263 = var_263 & mask_SORT_77 [L530] SORT_1 var_265_arg_0 = var_264; [L531] SORT_77 var_265_arg_1 = var_263; [L532] SORT_80 var_265 = ((SORT_80)var_265_arg_0 << 21) | var_265_arg_1; [L533] var_265 = var_265 & mask_SORT_80 [L534] SORT_1 var_267_arg_0 = var_266; [L535] SORT_80 var_267_arg_1 = var_265; [L536] SORT_83 var_267 = ((SORT_83)var_267_arg_0 << 22) | var_267_arg_1; [L537] SORT_83 var_268_arg_0 = var_192; [L538] SORT_83 var_268_arg_1 = var_267; [L539] SORT_83 var_268 = var_268_arg_0 + var_268_arg_1; [L540] SORT_21 var_270_arg_0 = var_269; [L541] var_270_arg_0 = var_270_arg_0 & mask_SORT_21 [L542] SORT_83 var_270 = var_270_arg_0; [L543] SORT_83 var_271_arg_0 = var_268; [L544] SORT_83 var_271_arg_1 = var_270; [L545] SORT_83 var_271 = var_271_arg_0 + var_271_arg_1; [L546] SORT_83 var_272_arg_0 = var_271; [L547] SORT_11 var_272 = var_272_arg_0 >> 7; [L548] SORT_1 var_273_arg_0 = input_4; [L549] SORT_11 var_273_arg_1 = var_197; [L550] SORT_11 var_273_arg_2 = var_272; [L551] SORT_11 var_273 = var_273_arg_0 ? var_273_arg_1 : var_273_arg_2; [L552] SORT_11 next_274_arg_1 = var_273; [L553] SORT_1 var_275_arg_0 = input_4; [L554] SORT_1 var_275_arg_1 = var_7; [L555] SORT_1 var_275_arg_2 = var_110; [L556] SORT_1 var_275 = var_275_arg_0 ? var_275_arg_1 : var_275_arg_2; [L557] var_275 = var_275 & mask_SORT_1 [L558] SORT_1 next_276_arg_1 = var_275; [L559] SORT_1 var_277_arg_0 = var_8; [L560] var_277_arg_0 = var_277_arg_0 & mask_SORT_1 [L561] SORT_11 var_277 = var_277_arg_0; [L562] SORT_11 var_278_arg_0 = state_117; [L563] SORT_11 var_278_arg_1 = var_277; [L564] SORT_11 var_278 = var_278_arg_0 + var_278_arg_1; [L565] var_278 = var_278 & mask_SORT_11 [L566] SORT_11 next_279_arg_1 = var_278; [L567] SORT_12 var_283_arg_0 = var_282; [L568] SORT_1 var_283_arg_1 = input_3; [L569] SORT_15 var_283 = ((SORT_15)var_283_arg_0 << 1) | var_283_arg_1; [L570] SORT_1 var_280_arg_0 = input_3; [L571] var_280_arg_0 = var_280_arg_0 & mask_SORT_1 [L572] SORT_15 var_280 = var_280_arg_0; [L573] SORT_15 var_281_arg_0 = state_137; [L574] SORT_15 var_281_arg_1 = var_280; [L575] SORT_15 var_281 = var_281_arg_0 + var_281_arg_1; [L576] SORT_1 var_284_arg_0 = var_252; [L577] SORT_15 var_284_arg_1 = var_283; [L578] SORT_15 var_284_arg_2 = var_281; [L579] SORT_15 var_284 = var_284_arg_0 ? var_284_arg_1 : var_284_arg_2; [L580] SORT_1 var_286_arg_0 = input_4; [L581] SORT_15 var_286_arg_1 = var_285; [L582] SORT_15 var_286_arg_2 = var_284; [L583] SORT_15 var_286 = var_286_arg_0 ? var_286_arg_1 : var_286_arg_2; [L584] var_286 = var_286 & mask_SORT_15 [L585] SORT_15 next_287_arg_1 = var_286; [L586] SORT_1 var_288_arg_0 = var_8; [L587] var_288_arg_0 = var_288_arg_0 & mask_SORT_1 [L588] SORT_15 var_288 = var_288_arg_0; [L589] SORT_15 var_289_arg_0 = state_140; [L590] SORT_15 var_289_arg_1 = var_288; [L591] SORT_15 var_289 = var_289_arg_0 + var_289_arg_1; [L592] SORT_1 var_290_arg_0 = var_252; [L593] SORT_15 var_290_arg_1 = var_285; [L594] SORT_15 var_290_arg_2 = var_289; [L595] SORT_15 var_290 = var_290_arg_0 ? var_290_arg_1 : var_290_arg_2; [L596] SORT_1 var_291_arg_0 = input_4; [L597] SORT_15 var_291_arg_1 = var_285; [L598] SORT_15 var_291_arg_2 = var_290; [L599] SORT_15 var_291 = var_291_arg_0 ? var_291_arg_1 : var_291_arg_2; [L600] var_291 = var_291 & mask_SORT_15 [L601] SORT_15 next_292_arg_1 = var_291; [L602] SORT_23 var_235_arg_0 = var_189; [L603] var_235_arg_0 = (var_235_arg_0 & msb_SORT_23) ? (var_235_arg_0 | ~mask_SORT_23) : (var_235_arg_0 & mask_SORT_23) [L604] SORT_83 var_235 = (int)((signed char)var_235_arg_0); [L605] SORT_11 var_236_arg_0 = state_144; [L606] var_236_arg_0 = (var_236_arg_0 & msb_SORT_11) ? (var_236_arg_0 | ~mask_SORT_11) : (var_236_arg_0 & mask_SORT_11) [L607] SORT_83 var_236 = (int)((short)var_236_arg_0); [L608] SORT_83 var_237_arg_0 = var_235; [L609] SORT_83 var_237_arg_1 = var_236; [L610] SORT_83 var_237 = var_237_arg_0 * var_237_arg_1; [L611] SORT_153 var_201_arg_0 = var_154; [L612] var_201_arg_0 = (var_201_arg_0 & msb_SORT_153) ? (var_201_arg_0 | ~mask_SORT_153) : (var_201_arg_0 & mask_SORT_153) [L613] SORT_68 var_201 = (int)((signed char)var_201_arg_0); [L614] SORT_11 var_202_arg_0 = var_60; [L615] SORT_11 var_202 = -var_202_arg_0; [L616] SORT_1 var_203_arg_0 = var_110; [L617] SORT_11 var_203_arg_1 = var_60; [L618] SORT_11 var_203_arg_2 = var_202; [L619] SORT_11 var_203 = var_203_arg_0 ? var_203_arg_1 : var_203_arg_2; [L620] SORT_11 var_204_arg_0 = var_203; [L621] var_204_arg_0 = (var_204_arg_0 & msb_SORT_11) ? (var_204_arg_0 | ~mask_SORT_11) : (var_204_arg_0 & mask_SORT_11) [L622] SORT_68 var_204 = (int)((short)var_204_arg_0); [L623] SORT_68 var_205_arg_0 = var_201; [L624] SORT_68 var_205_arg_1 = var_204; [L625] SORT_68 var_205 = var_205_arg_0 * var_205_arg_1; [L626] var_205 = var_205 & mask_SORT_68 [L627] SORT_68 var_301_arg_0 = var_205; [L628] SORT_1 var_301 = var_301_arg_0 >> 17; [L629] SORT_68 var_299_arg_0 = var_205; [L630] SORT_1 var_299 = var_299_arg_0 >> 17; [L631] SORT_68 var_297_arg_0 = var_205; [L632] SORT_1 var_297 = var_297_arg_0 >> 17; [L633] SORT_68 var_295_arg_0 = var_205; [L634] SORT_1 var_295 = var_295_arg_0 >> 17; [L635] SORT_68 var_293_arg_0 = var_205; [L636] SORT_1 var_293 = var_293_arg_0 >> 17; [L637] SORT_1 var_294_arg_0 = var_293; [L638] SORT_68 var_294_arg_1 = var_205; [L639] SORT_71 var_294 = ((SORT_71)var_294_arg_0 << 18) | var_294_arg_1; [L640] var_294 = var_294 & mask_SORT_71 [L641] SORT_1 var_296_arg_0 = var_295; [L642] SORT_71 var_296_arg_1 = var_294; [L643] SORT_74 var_296 = ((SORT_74)var_296_arg_0 << 19) | var_296_arg_1; [L644] var_296 = var_296 & mask_SORT_74 [L645] SORT_1 var_298_arg_0 = var_297; [L646] SORT_74 var_298_arg_1 = var_296; [L647] SORT_77 var_298 = ((SORT_77)var_298_arg_0 << 20) | var_298_arg_1; [L648] var_298 = var_298 & mask_SORT_77 [L649] SORT_1 var_300_arg_0 = var_299; [L650] SORT_77 var_300_arg_1 = var_298; [L651] SORT_80 var_300 = ((SORT_80)var_300_arg_0 << 21) | var_300_arg_1; [L652] var_300 = var_300 & mask_SORT_80 [L653] SORT_1 var_302_arg_0 = var_301; [L654] SORT_80 var_302_arg_1 = var_300; [L655] SORT_83 var_302 = ((SORT_83)var_302_arg_0 << 22) | var_302_arg_1; [L656] SORT_83 var_303_arg_0 = var_237; [L657] SORT_83 var_303_arg_1 = var_302; [L658] SORT_83 var_303 = var_303_arg_0 + var_303_arg_1; [L659] SORT_21 var_304_arg_0 = var_269; [L660] var_304_arg_0 = var_304_arg_0 & mask_SORT_21 [L661] SORT_83 var_304 = var_304_arg_0; [L662] SORT_83 var_305_arg_0 = var_303; [L663] SORT_83 var_305_arg_1 = var_304; [L664] SORT_83 var_305 = var_305_arg_0 + var_305_arg_1; [L665] SORT_83 var_306_arg_0 = var_305; [L666] SORT_11 var_306 = var_306_arg_0 >> 7; [L667] SORT_1 var_307_arg_0 = input_4; [L668] SORT_11 var_307_arg_1 = var_197; [L669] SORT_11 var_307_arg_2 = var_306; [L670] SORT_11 var_307 = var_307_arg_0 ? var_307_arg_1 : var_307_arg_2; [L671] SORT_11 next_308_arg_1 = var_307; [L673] state_5 = next_255_arg_1 [L674] state_40 = next_257_arg_1 [L675] state_56 = next_274_arg_1 [L676] state_58 = next_276_arg_1 [L677] state_117 = next_279_arg_1 [L678] state_137 = next_287_arg_1 [L679] state_140 = next_292_arg_1 [L680] state_144 = next_308_arg_1 [L155] input_2 = __VERIFIER_nondet_uchar() [L156] input_3 = __VERIFIER_nondet_uchar() [L157] input_3 = input_3 & mask_SORT_1 [L158] input_4 = __VERIFIER_nondet_uchar() [L159] input_4 = input_4 & mask_SORT_1 [L161] SORT_1 var_125_arg_0 = state_5; [L162] SORT_1 var_125 = ~var_125_arg_0; [L163] SORT_1 var_126_arg_0 = var_125; [L164] SORT_1 var_126 = ~var_126_arg_0; [L165] SORT_1 var_127_arg_0 = state_5; [L166] SORT_1 var_127_arg_1 = var_126; [L167] SORT_1 var_127 = var_127_arg_0 | var_127_arg_1; [L168] var_127 = var_127 & mask_SORT_1 [L169] SORT_1 constr_128_arg_0 = var_127; [L170] CALL assume_abort_if_not(constr_128_arg_0) [L21] COND FALSE !(!cond) [L170] RET assume_abort_if_not(constr_128_arg_0) [L171] SORT_1 var_129_arg_0 = var_8; [L172] var_129_arg_0 = var_129_arg_0 & mask_SORT_1 [L173] SORT_11 var_129 = var_129_arg_0; [L174] SORT_11 var_130_arg_0 = state_117; [L175] SORT_11 var_130_arg_1 = var_129; [L176] SORT_1 var_130 = var_130_arg_0 <= var_130_arg_1; [L177] SORT_1 var_131_arg_0 = input_4; [L178] SORT_1 var_131_arg_1 = var_130; [L179] SORT_1 var_131 = var_131_arg_0 ^ var_131_arg_1; [L180] SORT_1 var_132_arg_0 = var_131; [L181] SORT_1 var_132 = ~var_132_arg_0; [L182] SORT_1 var_133_arg_0 = var_131; [L183] SORT_1 var_133 = ~var_133_arg_0; [L184] SORT_1 var_134_arg_0 = var_132; [L185] SORT_1 var_134_arg_1 = var_133; [L186] SORT_1 var_134 = var_134_arg_0 | var_134_arg_1; [L187] var_134 = var_134 & mask_SORT_1 [L188] SORT_1 constr_135_arg_0 = var_134; [L189] CALL assume_abort_if_not(constr_135_arg_0) [L21] COND FALSE !(!cond) [L189] RET assume_abort_if_not(constr_135_arg_0) [L191] SORT_12 var_115_arg_0 = var_114; [L192] var_115_arg_0 = var_115_arg_0 & mask_SORT_12 [L193] SORT_11 var_115 = var_115_arg_0; [L194] SORT_11 var_119_arg_0 = var_115; [L195] SORT_11 var_119_arg_1 = state_117; [L196] SORT_1 var_119 = var_119_arg_0 < var_119_arg_1; [L197] SORT_1 var_14_arg_0 = input_3; [L198] SORT_1 var_14 = ~var_14_arg_0; [L199] SORT_1 var_16_arg_0 = var_14; [L200] SORT_12 var_16_arg_1 = var_13; [L201] SORT_15 var_16 = ((SORT_15)var_16_arg_0 << 3) | var_16_arg_1; [L202] var_16 = var_16 & mask_SORT_15 [L203] SORT_1 var_18_arg_0 = input_3; [L204] SORT_15 var_18_arg_1 = var_16; [L205] SORT_17 var_18 = ((SORT_17)var_18_arg_0 << 4) | var_18_arg_1; [L206] var_18 = var_18 & mask_SORT_17 [L207] SORT_1 var_20_arg_0 = input_3; [L208] SORT_17 var_20_arg_1 = var_18; [L209] SORT_19 var_20 = ((SORT_19)var_20_arg_0 << 5) | var_20_arg_1; [L210] var_20 = var_20 & mask_SORT_19 [L211] SORT_1 var_22_arg_0 = input_3; [L212] SORT_19 var_22_arg_1 = var_20; [L213] SORT_21 var_22 = ((SORT_21)var_22_arg_0 << 6) | var_22_arg_1; [L214] var_22 = var_22 & mask_SORT_21 [L215] SORT_1 var_24_arg_0 = input_3; [L216] SORT_21 var_24_arg_1 = var_22; [L217] SORT_23 var_24 = ((SORT_23)var_24_arg_0 << 7) | var_24_arg_1; [L218] var_24 = var_24 & mask_SORT_23 [L219] SORT_1 var_26_arg_0 = input_3; [L220] SORT_23 var_26_arg_1 = var_24; [L221] SORT_25 var_26 = ((SORT_25)var_26_arg_0 << 8) | var_26_arg_1; [L222] var_26 = var_26 & mask_SORT_25 [L223] SORT_1 var_28_arg_0 = var_14; [L224] SORT_25 var_28_arg_1 = var_26; [L225] SORT_27 var_28 = ((SORT_27)var_28_arg_0 << 9) | var_28_arg_1; [L226] var_28 = var_28 & mask_SORT_27 [L227] SORT_1 var_30_arg_0 = var_14; [L228] SORT_27 var_30_arg_1 = var_28; [L229] SORT_29 var_30 = ((SORT_29)var_30_arg_0 << 10) | var_30_arg_1; [L230] var_30 = var_30 & mask_SORT_29 [L231] SORT_1 var_32_arg_0 = var_14; [L232] SORT_29 var_32_arg_1 = var_30; [L233] SORT_31 var_32 = ((SORT_31)var_32_arg_0 << 11) | var_32_arg_1; [L234] var_32 = var_32 & mask_SORT_31 [L235] SORT_1 var_34_arg_0 = var_14; [L236] SORT_31 var_34_arg_1 = var_32; [L237] SORT_33 var_34 = ((SORT_33)var_34_arg_0 << 12) | var_34_arg_1; [L238] var_34 = var_34 & mask_SORT_33 [L239] SORT_1 var_36_arg_0 = var_14; [L240] SORT_33 var_36_arg_1 = var_34; [L241] SORT_35 var_36 = ((SORT_35)var_36_arg_0 << 13) | var_36_arg_1; [L242] var_36 = var_36 & mask_SORT_35 [L243] SORT_1 var_38_arg_0 = var_14; [L244] SORT_35 var_38_arg_1 = var_36; [L245] SORT_37 var_38 = ((SORT_37)var_38_arg_0 << 14) | var_38_arg_1; [L246] var_38 = var_38 & mask_SORT_37 [L247] SORT_1 var_39_arg_0 = var_14; [L248] SORT_37 var_39_arg_1 = var_38; [L249] SORT_11 var_39 = ((SORT_11)var_39_arg_0 << 15) | var_39_arg_1; [L250] SORT_1 var_41_arg_0 = state_40; [L251] SORT_1 var_41 = ~var_41_arg_0; [L252] SORT_1 var_42_arg_0 = state_40; [L253] SORT_12 var_42_arg_1 = var_13; [L254] SORT_15 var_42 = ((SORT_15)var_42_arg_0 << 3) | var_42_arg_1; [L255] var_42 = var_42 & mask_SORT_15 [L256] SORT_1 var_43_arg_0 = var_41; [L257] SORT_15 var_43_arg_1 = var_42; [L258] SORT_17 var_43 = ((SORT_17)var_43_arg_0 << 4) | var_43_arg_1; [L259] var_43 = var_43 & mask_SORT_17 [L260] SORT_1 var_44_arg_0 = state_40; [L261] SORT_17 var_44_arg_1 = var_43; [L262] SORT_19 var_44 = ((SORT_19)var_44_arg_0 << 5) | var_44_arg_1; [L263] var_44 = var_44 & mask_SORT_19 [L264] SORT_1 var_45_arg_0 = var_41; [L265] SORT_19 var_45_arg_1 = var_44; [L266] SORT_21 var_45 = ((SORT_21)var_45_arg_0 << 6) | var_45_arg_1; [L267] var_45 = var_45 & mask_SORT_21 [L268] SORT_1 var_46_arg_0 = var_41; [L269] SORT_21 var_46_arg_1 = var_45; [L270] SORT_23 var_46 = ((SORT_23)var_46_arg_0 << 7) | var_46_arg_1; [L271] var_46 = var_46 & mask_SORT_23 [L272] SORT_1 var_47_arg_0 = state_40; [L273] SORT_23 var_47_arg_1 = var_46; [L274] SORT_25 var_47 = ((SORT_25)var_47_arg_0 << 8) | var_47_arg_1; [L275] var_47 = var_47 & mask_SORT_25 [L276] SORT_1 var_48_arg_0 = var_41; [L277] SORT_25 var_48_arg_1 = var_47; [L278] SORT_27 var_48 = ((SORT_27)var_48_arg_0 << 9) | var_48_arg_1; [L279] var_48 = var_48 & mask_SORT_27 [L280] SORT_1 var_49_arg_0 = var_41; [L281] SORT_27 var_49_arg_1 = var_48; [L282] SORT_29 var_49 = ((SORT_29)var_49_arg_0 << 10) | var_49_arg_1; [L283] var_49 = var_49 & mask_SORT_29 [L284] SORT_1 var_50_arg_0 = var_41; [L285] SORT_29 var_50_arg_1 = var_49; [L286] SORT_31 var_50 = ((SORT_31)var_50_arg_0 << 11) | var_50_arg_1; [L287] var_50 = var_50 & mask_SORT_31 [L288] SORT_1 var_51_arg_0 = var_41; [L289] SORT_31 var_51_arg_1 = var_50; [L290] SORT_33 var_51 = ((SORT_33)var_51_arg_0 << 12) | var_51_arg_1; [L291] var_51 = var_51 & mask_SORT_33 [L292] SORT_1 var_52_arg_0 = var_41; [L293] SORT_33 var_52_arg_1 = var_51; [L294] SORT_35 var_52 = ((SORT_35)var_52_arg_0 << 13) | var_52_arg_1; [L295] var_52 = var_52 & mask_SORT_35 [L296] SORT_1 var_53_arg_0 = var_41; [L297] SORT_35 var_53_arg_1 = var_52; [L298] SORT_37 var_53 = ((SORT_37)var_53_arg_0 << 14) | var_53_arg_1; [L299] var_53 = var_53 & mask_SORT_37 [L300] SORT_1 var_54_arg_0 = var_41; [L301] SORT_37 var_54_arg_1 = var_53; [L302] SORT_11 var_54 = ((SORT_11)var_54_arg_0 << 15) | var_54_arg_1; [L303] SORT_11 var_55_arg_0 = var_39; [L304] SORT_11 var_55_arg_1 = var_54; [L305] SORT_11 var_55 = var_55_arg_0 + var_55_arg_1; [L306] SORT_11 var_57_arg_0 = state_56; [L307] SORT_11 var_57 = -var_57_arg_0; [L308] SORT_1 var_59_arg_0 = state_58; [L309] SORT_11 var_59_arg_1 = var_57; [L310] SORT_11 var_59_arg_2 = state_56; [L311] SORT_11 var_59 = var_59_arg_0 ? var_59_arg_1 : var_59_arg_2; [L312] SORT_11 var_60_arg_0 = var_55; [L313] SORT_11 var_60_arg_1 = var_59; [L314] SORT_11 var_60 = var_60_arg_0 + var_60_arg_1; [L315] var_60 = var_60 & mask_SORT_11 [L316] SORT_11 var_61_arg_0 = var_60; [L317] SORT_1 var_61 = var_61_arg_0 >> 15; [L318] SORT_1 var_63_arg_0 = var_61; [L319] SORT_9 var_63_arg_1 = var_10; [L320] SORT_62 var_63 = ((SORT_62)var_63_arg_0 << 31) | var_63_arg_1; [L321] var_63 = var_63 & mask_SORT_62 [L322] SORT_11 var_106_arg_0 = var_60; [L323] SORT_1 var_106 = var_106_arg_0 >> 15; [L324] SORT_11 var_103_arg_0 = var_60; [L325] SORT_1 var_103 = var_103_arg_0 >> 15; [L326] SORT_11 var_100_arg_0 = var_60; [L327] SORT_1 var_100 = var_100_arg_0 >> 15; [L328] SORT_11 var_97_arg_0 = var_60; [L329] SORT_1 var_97 = var_97_arg_0 >> 15; [L330] SORT_11 var_94_arg_0 = var_60; [L331] SORT_1 var_94 = var_94_arg_0 >> 15; [L332] SORT_11 var_91_arg_0 = var_60; [L333] SORT_1 var_91 = var_91_arg_0 >> 15; [L334] SORT_11 var_88_arg_0 = var_60; [L335] SORT_1 var_88 = var_88_arg_0 >> 15; [L336] SORT_11 var_85_arg_0 = var_60; [L337] SORT_1 var_85 = var_85_arg_0 >> 15; [L338] SORT_11 var_82_arg_0 = var_60; [L339] SORT_1 var_82 = var_82_arg_0 >> 15; [L340] SORT_11 var_79_arg_0 = var_60; [L341] SORT_1 var_79 = var_79_arg_0 >> 15; [L342] SORT_11 var_76_arg_0 = var_60; [L343] SORT_1 var_76 = var_76_arg_0 >> 15; [L344] SORT_11 var_73_arg_0 = var_60; [L345] SORT_1 var_73 = var_73_arg_0 >> 15; [L346] SORT_11 var_70_arg_0 = var_60; [L347] SORT_1 var_70 = var_70_arg_0 >> 15; [L348] SORT_11 var_67_arg_0 = var_60; [L349] SORT_1 var_67 = var_67_arg_0 >> 15; [L350] SORT_11 var_64_arg_0 = var_60; [L351] SORT_1 var_64 = var_64_arg_0 >> 15; [L352] SORT_1 var_66_arg_0 = var_64; [L353] SORT_11 var_66_arg_1 = var_60; [L354] SORT_65 var_66 = ((SORT_65)var_66_arg_0 << 16) | var_66_arg_1; [L355] var_66 = var_66 & mask_SORT_65 [L356] SORT_1 var_69_arg_0 = var_67; [L357] SORT_65 var_69_arg_1 = var_66; [L358] SORT_68 var_69 = ((SORT_68)var_69_arg_0 << 17) | var_69_arg_1; [L359] var_69 = var_69 & mask_SORT_68 [L360] SORT_1 var_72_arg_0 = var_70; [L361] SORT_68 var_72_arg_1 = var_69; [L362] SORT_71 var_72 = ((SORT_71)var_72_arg_0 << 18) | var_72_arg_1; [L363] var_72 = var_72 & mask_SORT_71 [L364] SORT_1 var_75_arg_0 = var_73; [L365] SORT_71 var_75_arg_1 = var_72; [L366] SORT_74 var_75 = ((SORT_74)var_75_arg_0 << 19) | var_75_arg_1; [L367] var_75 = var_75 & mask_SORT_74 [L368] SORT_1 var_78_arg_0 = var_76; [L369] SORT_74 var_78_arg_1 = var_75; [L370] SORT_77 var_78 = ((SORT_77)var_78_arg_0 << 20) | var_78_arg_1; [L371] var_78 = var_78 & mask_SORT_77 [L372] SORT_1 var_81_arg_0 = var_79; [L373] SORT_77 var_81_arg_1 = var_78; [L374] SORT_80 var_81 = ((SORT_80)var_81_arg_0 << 21) | var_81_arg_1; [L375] var_81 = var_81 & mask_SORT_80 [L376] SORT_1 var_84_arg_0 = var_82; [L377] SORT_80 var_84_arg_1 = var_81; [L378] SORT_83 var_84 = ((SORT_83)var_84_arg_0 << 22) | var_84_arg_1; [L379] var_84 = var_84 & mask_SORT_83 [L380] SORT_1 var_87_arg_0 = var_85; [L381] SORT_83 var_87_arg_1 = var_84; [L382] SORT_86 var_87 = ((SORT_86)var_87_arg_0 << 23) | var_87_arg_1; [L383] var_87 = var_87 & mask_SORT_86 [L384] SORT_1 var_90_arg_0 = var_88; [L385] SORT_86 var_90_arg_1 = var_87; [L386] SORT_89 var_90 = ((SORT_89)var_90_arg_0 << 24) | var_90_arg_1; [L387] var_90 = var_90 & mask_SORT_89 [L388] SORT_1 var_93_arg_0 = var_91; [L389] SORT_89 var_93_arg_1 = var_90; [L390] SORT_92 var_93 = ((SORT_92)var_93_arg_0 << 25) | var_93_arg_1; [L391] var_93 = var_93 & mask_SORT_92 [L392] SORT_1 var_96_arg_0 = var_94; [L393] SORT_92 var_96_arg_1 = var_93; [L394] SORT_95 var_96 = ((SORT_95)var_96_arg_0 << 26) | var_96_arg_1; [L395] var_96 = var_96 & mask_SORT_95 [L396] SORT_1 var_99_arg_0 = var_97; [L397] SORT_95 var_99_arg_1 = var_96; [L398] SORT_98 var_99 = ((SORT_98)var_99_arg_0 << 27) | var_99_arg_1; [L399] var_99 = var_99 & mask_SORT_98 [L400] SORT_1 var_102_arg_0 = var_100; [L401] SORT_98 var_102_arg_1 = var_99; [L402] SORT_101 var_102 = ((SORT_101)var_102_arg_0 << 28) | var_102_arg_1; [L403] var_102 = var_102 & mask_SORT_101 [L404] SORT_1 var_105_arg_0 = var_103; [L405] SORT_101 var_105_arg_1 = var_102; [L406] SORT_104 var_105 = ((SORT_104)var_105_arg_0 << 29) | var_105_arg_1; [L407] var_105 = var_105 & mask_SORT_104 [L408] SORT_1 var_107_arg_0 = var_106; [L409] SORT_104 var_107_arg_1 = var_105; [L410] SORT_9 var_107 = ((SORT_9)var_107_arg_0 << 30) | var_107_arg_1; [L411] SORT_9 var_108_arg_0 = var_107; [L412] var_108_arg_0 = var_108_arg_0 & mask_SORT_9 [L413] SORT_62 var_108 = var_108_arg_0; [L414] SORT_62 var_109_arg_0 = var_63; [L415] SORT_62 var_109_arg_1 = var_108; [L416] SORT_1 var_109 = var_109_arg_0 <= var_109_arg_1; [L417] SORT_1 var_110_arg_0 = var_109; [L418] SORT_1 var_110_arg_1 = var_8; [L419] SORT_1 var_110_arg_2 = var_7; [L420] SORT_1 var_110 = var_110_arg_0 ? var_110_arg_1 : var_110_arg_2; [L421] var_110 = var_110 & mask_SORT_1 [L422] SORT_1 var_111_arg_0 = input_3; [L423] SORT_1 var_111_arg_1 = var_110; [L424] SORT_1 var_111 = var_111_arg_0 ^ var_111_arg_1; [L425] SORT_1 var_112_arg_0 = var_111; [L426] SORT_1 var_112 = ~var_112_arg_0; [L427] SORT_1 var_120_arg_0 = var_119; [L428] SORT_1 var_120_arg_1 = var_112; [L429] SORT_1 var_120_arg_2 = var_8; [L430] SORT_1 var_120 = var_120_arg_0 ? var_120_arg_1 : var_120_arg_2; [L431] SORT_1 var_121_arg_0 = var_120; [L432] SORT_1 var_121 = ~var_121_arg_0; [L433] SORT_1 var_122_arg_0 = var_120; [L434] SORT_1 var_122 = ~var_122_arg_0; [L435] SORT_1 var_123_arg_0 = var_121; [L436] SORT_1 var_123_arg_1 = var_122; [L437] SORT_1 var_123 = var_123_arg_0 & var_123_arg_1; [L438] var_123 = var_123 & mask_SORT_1 [L439] SORT_1 bad_124_arg_0 = var_123; [L440] CALL __VERIFIER_assert(!(bad_124_arg_0)) [L20] COND FALSE !(!(cond)) [L440] RET __VERIFIER_assert(!(bad_124_arg_0)) [L442] SORT_15 var_252_arg_0 = state_140; [L443] SORT_15 var_252_arg_1 = var_251; [L444] SORT_1 var_252 = var_252_arg_0 == var_252_arg_1; [L445] SORT_12 var_245_arg_0 = var_13; [L446] var_245_arg_0 = var_245_arg_0 & mask_SORT_12 [L447] SORT_15 var_245 = var_245_arg_0; [L448] SORT_15 var_246_arg_0 = var_245; [L449] SORT_15 var_246_arg_1 = state_137; [L450] SORT_1 var_246 = var_246_arg_0 <= var_246_arg_1; [L451] SORT_12 var_248_arg_0 = var_247; [L452] var_248_arg_0 = var_248_arg_0 & mask_SORT_12 [L453] SORT_15 var_248 = var_248_arg_0; [L454] SORT_15 var_249_arg_0 = state_137; [L455] SORT_15 var_249_arg_1 = var_248; [L456] SORT_1 var_249 = var_249_arg_0 <= var_249_arg_1; [L457] SORT_1 var_250_arg_0 = var_246; [L458] SORT_1 var_250_arg_1 = var_249; [L459] SORT_1 var_250 = var_250_arg_0 & var_250_arg_1; [L460] SORT_1 var_253_arg_0 = var_252; [L461] SORT_1 var_253_arg_1 = var_250; [L462] SORT_1 var_253_arg_2 = var_8; [L463] SORT_1 var_253 = var_253_arg_0 ? var_253_arg_1 : var_253_arg_2; [L464] SORT_1 var_254_arg_0 = input_4; [L465] SORT_1 var_254_arg_1 = var_8; [L466] SORT_1 var_254_arg_2 = var_253; [L467] SORT_1 var_254 = var_254_arg_0 ? var_254_arg_1 : var_254_arg_2; [L468] SORT_1 next_255_arg_1 = var_254; [L469] SORT_1 var_256_arg_0 = input_4; [L470] SORT_1 var_256_arg_1 = var_7; [L471] SORT_1 var_256_arg_2 = input_3; [L472] SORT_1 var_256 = var_256_arg_0 ? var_256_arg_1 : var_256_arg_2; [L473] SORT_1 next_257_arg_1 = var_256; [L474] SORT_23 var_190_arg_0 = var_189; [L475] var_190_arg_0 = (var_190_arg_0 & msb_SORT_23) ? (var_190_arg_0 | ~mask_SORT_23) : (var_190_arg_0 & mask_SORT_23) [L476] SORT_83 var_190 = (int)((signed char)var_190_arg_0); [L477] SORT_11 var_191_arg_0 = state_56; [L478] var_191_arg_0 = (var_191_arg_0 & msb_SORT_11) ? (var_191_arg_0 | ~mask_SORT_11) : (var_191_arg_0 & mask_SORT_11) [L479] SORT_83 var_191 = (int)((short)var_191_arg_0); [L480] SORT_83 var_192_arg_0 = var_190; [L481] SORT_83 var_192_arg_1 = var_191; [L482] SORT_83 var_192 = var_192_arg_0 * var_192_arg_1; [L483] SORT_153 var_155_arg_0 = var_154; [L484] var_155_arg_0 = (var_155_arg_0 & msb_SORT_153) ? (var_155_arg_0 | ~mask_SORT_153) : (var_155_arg_0 & mask_SORT_153) [L485] SORT_68 var_155 = (int)((signed char)var_155_arg_0); [L486] SORT_11 var_145_arg_0 = state_144; [L487] SORT_11 var_145 = -var_145_arg_0; [L488] SORT_1 var_146_arg_0 = var_110; [L489] SORT_11 var_146_arg_1 = var_145; [L490] SORT_11 var_146_arg_2 = state_144; [L491] SORT_11 var_146 = var_146_arg_0 ? var_146_arg_1 : var_146_arg_2; [L492] SORT_11 var_147_arg_0 = var_55; [L493] SORT_11 var_147_arg_1 = var_146; [L494] SORT_11 var_147 = var_147_arg_0 + var_147_arg_1; [L495] SORT_11 var_156_arg_0 = var_147; [L496] SORT_11 var_156 = -var_156_arg_0; [L497] SORT_1 var_157_arg_0 = state_58; [L498] SORT_11 var_157_arg_1 = var_147; [L499] SORT_11 var_157_arg_2 = var_156; [L500] SORT_11 var_157 = var_157_arg_0 ? var_157_arg_1 : var_157_arg_2; [L501] SORT_11 var_158_arg_0 = var_157; [L502] var_158_arg_0 = (var_158_arg_0 & msb_SORT_11) ? (var_158_arg_0 | ~mask_SORT_11) : (var_158_arg_0 & mask_SORT_11) [L503] SORT_68 var_158 = (int)((short)var_158_arg_0); [L504] SORT_68 var_159_arg_0 = var_155; [L505] SORT_68 var_159_arg_1 = var_158; [L506] SORT_68 var_159 = var_159_arg_0 * var_159_arg_1; [L507] var_159 = var_159 & mask_SORT_68 [L508] SORT_68 var_266_arg_0 = var_159; [L509] SORT_1 var_266 = var_266_arg_0 >> 17; [L510] SORT_68 var_264_arg_0 = var_159; [L511] SORT_1 var_264 = var_264_arg_0 >> 17; [L512] SORT_68 var_262_arg_0 = var_159; [L513] SORT_1 var_262 = var_262_arg_0 >> 17; [L514] SORT_68 var_260_arg_0 = var_159; [L515] SORT_1 var_260 = var_260_arg_0 >> 17; [L516] SORT_68 var_258_arg_0 = var_159; [L517] SORT_1 var_258 = var_258_arg_0 >> 17; [L518] SORT_1 var_259_arg_0 = var_258; [L519] SORT_68 var_259_arg_1 = var_159; [L520] SORT_71 var_259 = ((SORT_71)var_259_arg_0 << 18) | var_259_arg_1; [L521] var_259 = var_259 & mask_SORT_71 [L522] SORT_1 var_261_arg_0 = var_260; [L523] SORT_71 var_261_arg_1 = var_259; [L524] SORT_74 var_261 = ((SORT_74)var_261_arg_0 << 19) | var_261_arg_1; [L525] var_261 = var_261 & mask_SORT_74 [L526] SORT_1 var_263_arg_0 = var_262; [L527] SORT_74 var_263_arg_1 = var_261; [L528] SORT_77 var_263 = ((SORT_77)var_263_arg_0 << 20) | var_263_arg_1; [L529] var_263 = var_263 & mask_SORT_77 [L530] SORT_1 var_265_arg_0 = var_264; [L531] SORT_77 var_265_arg_1 = var_263; [L532] SORT_80 var_265 = ((SORT_80)var_265_arg_0 << 21) | var_265_arg_1; [L533] var_265 = var_265 & mask_SORT_80 [L534] SORT_1 var_267_arg_0 = var_266; [L535] SORT_80 var_267_arg_1 = var_265; [L536] SORT_83 var_267 = ((SORT_83)var_267_arg_0 << 22) | var_267_arg_1; [L537] SORT_83 var_268_arg_0 = var_192; [L538] SORT_83 var_268_arg_1 = var_267; [L539] SORT_83 var_268 = var_268_arg_0 + var_268_arg_1; [L540] SORT_21 var_270_arg_0 = var_269; [L541] var_270_arg_0 = var_270_arg_0 & mask_SORT_21 [L542] SORT_83 var_270 = var_270_arg_0; [L543] SORT_83 var_271_arg_0 = var_268; [L544] SORT_83 var_271_arg_1 = var_270; [L545] SORT_83 var_271 = var_271_arg_0 + var_271_arg_1; [L546] SORT_83 var_272_arg_0 = var_271; [L547] SORT_11 var_272 = var_272_arg_0 >> 7; [L548] SORT_1 var_273_arg_0 = input_4; [L549] SORT_11 var_273_arg_1 = var_197; [L550] SORT_11 var_273_arg_2 = var_272; [L551] SORT_11 var_273 = var_273_arg_0 ? var_273_arg_1 : var_273_arg_2; [L552] SORT_11 next_274_arg_1 = var_273; [L553] SORT_1 var_275_arg_0 = input_4; [L554] SORT_1 var_275_arg_1 = var_7; [L555] SORT_1 var_275_arg_2 = var_110; [L556] SORT_1 var_275 = var_275_arg_0 ? var_275_arg_1 : var_275_arg_2; [L557] var_275 = var_275 & mask_SORT_1 [L558] SORT_1 next_276_arg_1 = var_275; [L559] SORT_1 var_277_arg_0 = var_8; [L560] var_277_arg_0 = var_277_arg_0 & mask_SORT_1 [L561] SORT_11 var_277 = var_277_arg_0; [L562] SORT_11 var_278_arg_0 = state_117; [L563] SORT_11 var_278_arg_1 = var_277; [L564] SORT_11 var_278 = var_278_arg_0 + var_278_arg_1; [L565] var_278 = var_278 & mask_SORT_11 [L566] SORT_11 next_279_arg_1 = var_278; [L567] SORT_12 var_283_arg_0 = var_282; [L568] SORT_1 var_283_arg_1 = input_3; [L569] SORT_15 var_283 = ((SORT_15)var_283_arg_0 << 1) | var_283_arg_1; [L570] SORT_1 var_280_arg_0 = input_3; [L571] var_280_arg_0 = var_280_arg_0 & mask_SORT_1 [L572] SORT_15 var_280 = var_280_arg_0; [L573] SORT_15 var_281_arg_0 = state_137; [L574] SORT_15 var_281_arg_1 = var_280; [L575] SORT_15 var_281 = var_281_arg_0 + var_281_arg_1; [L576] SORT_1 var_284_arg_0 = var_252; [L577] SORT_15 var_284_arg_1 = var_283; [L578] SORT_15 var_284_arg_2 = var_281; [L579] SORT_15 var_284 = var_284_arg_0 ? var_284_arg_1 : var_284_arg_2; [L580] SORT_1 var_286_arg_0 = input_4; [L581] SORT_15 var_286_arg_1 = var_285; [L582] SORT_15 var_286_arg_2 = var_284; [L583] SORT_15 var_286 = var_286_arg_0 ? var_286_arg_1 : var_286_arg_2; [L584] var_286 = var_286 & mask_SORT_15 [L585] SORT_15 next_287_arg_1 = var_286; [L586] SORT_1 var_288_arg_0 = var_8; [L587] var_288_arg_0 = var_288_arg_0 & mask_SORT_1 [L588] SORT_15 var_288 = var_288_arg_0; [L589] SORT_15 var_289_arg_0 = state_140; [L590] SORT_15 var_289_arg_1 = var_288; [L591] SORT_15 var_289 = var_289_arg_0 + var_289_arg_1; [L592] SORT_1 var_290_arg_0 = var_252; [L593] SORT_15 var_290_arg_1 = var_285; [L594] SORT_15 var_290_arg_2 = var_289; [L595] SORT_15 var_290 = var_290_arg_0 ? var_290_arg_1 : var_290_arg_2; [L596] SORT_1 var_291_arg_0 = input_4; [L597] SORT_15 var_291_arg_1 = var_285; [L598] SORT_15 var_291_arg_2 = var_290; [L599] SORT_15 var_291 = var_291_arg_0 ? var_291_arg_1 : var_291_arg_2; [L600] var_291 = var_291 & mask_SORT_15 [L601] SORT_15 next_292_arg_1 = var_291; [L602] SORT_23 var_235_arg_0 = var_189; [L603] var_235_arg_0 = (var_235_arg_0 & msb_SORT_23) ? (var_235_arg_0 | ~mask_SORT_23) : (var_235_arg_0 & mask_SORT_23) [L604] SORT_83 var_235 = (int)((signed char)var_235_arg_0); [L605] SORT_11 var_236_arg_0 = state_144; [L606] var_236_arg_0 = (var_236_arg_0 & msb_SORT_11) ? (var_236_arg_0 | ~mask_SORT_11) : (var_236_arg_0 & mask_SORT_11) [L607] SORT_83 var_236 = (int)((short)var_236_arg_0); [L608] SORT_83 var_237_arg_0 = var_235; [L609] SORT_83 var_237_arg_1 = var_236; [L610] SORT_83 var_237 = var_237_arg_0 * var_237_arg_1; [L611] SORT_153 var_201_arg_0 = var_154; [L612] var_201_arg_0 = (var_201_arg_0 & msb_SORT_153) ? (var_201_arg_0 | ~mask_SORT_153) : (var_201_arg_0 & mask_SORT_153) [L613] SORT_68 var_201 = (int)((signed char)var_201_arg_0); [L614] SORT_11 var_202_arg_0 = var_60; [L615] SORT_11 var_202 = -var_202_arg_0; [L616] SORT_1 var_203_arg_0 = var_110; [L617] SORT_11 var_203_arg_1 = var_60; [L618] SORT_11 var_203_arg_2 = var_202; [L619] SORT_11 var_203 = var_203_arg_0 ? var_203_arg_1 : var_203_arg_2; [L620] SORT_11 var_204_arg_0 = var_203; [L621] var_204_arg_0 = (var_204_arg_0 & msb_SORT_11) ? (var_204_arg_0 | ~mask_SORT_11) : (var_204_arg_0 & mask_SORT_11) [L622] SORT_68 var_204 = (int)((short)var_204_arg_0); [L623] SORT_68 var_205_arg_0 = var_201; [L624] SORT_68 var_205_arg_1 = var_204; [L625] SORT_68 var_205 = var_205_arg_0 * var_205_arg_1; [L626] var_205 = var_205 & mask_SORT_68 [L627] SORT_68 var_301_arg_0 = var_205; [L628] SORT_1 var_301 = var_301_arg_0 >> 17; [L629] SORT_68 var_299_arg_0 = var_205; [L630] SORT_1 var_299 = var_299_arg_0 >> 17; [L631] SORT_68 var_297_arg_0 = var_205; [L632] SORT_1 var_297 = var_297_arg_0 >> 17; [L633] SORT_68 var_295_arg_0 = var_205; [L634] SORT_1 var_295 = var_295_arg_0 >> 17; [L635] SORT_68 var_293_arg_0 = var_205; [L636] SORT_1 var_293 = var_293_arg_0 >> 17; [L637] SORT_1 var_294_arg_0 = var_293; [L638] SORT_68 var_294_arg_1 = var_205; [L639] SORT_71 var_294 = ((SORT_71)var_294_arg_0 << 18) | var_294_arg_1; [L640] var_294 = var_294 & mask_SORT_71 [L641] SORT_1 var_296_arg_0 = var_295; [L642] SORT_71 var_296_arg_1 = var_294; [L643] SORT_74 var_296 = ((SORT_74)var_296_arg_0 << 19) | var_296_arg_1; [L644] var_296 = var_296 & mask_SORT_74 [L645] SORT_1 var_298_arg_0 = var_297; [L646] SORT_74 var_298_arg_1 = var_296; [L647] SORT_77 var_298 = ((SORT_77)var_298_arg_0 << 20) | var_298_arg_1; [L648] var_298 = var_298 & mask_SORT_77 [L649] SORT_1 var_300_arg_0 = var_299; [L650] SORT_77 var_300_arg_1 = var_298; [L651] SORT_80 var_300 = ((SORT_80)var_300_arg_0 << 21) | var_300_arg_1; [L652] var_300 = var_300 & mask_SORT_80 [L653] SORT_1 var_302_arg_0 = var_301; [L654] SORT_80 var_302_arg_1 = var_300; [L655] SORT_83 var_302 = ((SORT_83)var_302_arg_0 << 22) | var_302_arg_1; [L656] SORT_83 var_303_arg_0 = var_237; [L657] SORT_83 var_303_arg_1 = var_302; [L658] SORT_83 var_303 = var_303_arg_0 + var_303_arg_1; [L659] SORT_21 var_304_arg_0 = var_269; [L660] var_304_arg_0 = var_304_arg_0 & mask_SORT_21 [L661] SORT_83 var_304 = var_304_arg_0; [L662] SORT_83 var_305_arg_0 = var_303; [L663] SORT_83 var_305_arg_1 = var_304; [L664] SORT_83 var_305 = var_305_arg_0 + var_305_arg_1; [L665] SORT_83 var_306_arg_0 = var_305; [L666] SORT_11 var_306 = var_306_arg_0 >> 7; [L667] SORT_1 var_307_arg_0 = input_4; [L668] SORT_11 var_307_arg_1 = var_197; [L669] SORT_11 var_307_arg_2 = var_306; [L670] SORT_11 var_307 = var_307_arg_0 ? var_307_arg_1 : var_307_arg_2; [L671] SORT_11 next_308_arg_1 = var_307; [L673] state_5 = next_255_arg_1 [L674] state_40 = next_257_arg_1 [L675] state_56 = next_274_arg_1 [L676] state_58 = next_276_arg_1 [L677] state_117 = next_279_arg_1 [L678] state_137 = next_287_arg_1 [L679] state_140 = next_292_arg_1 [L680] state_144 = next_308_arg_1 [L155] input_2 = __VERIFIER_nondet_uchar() [L156] input_3 = __VERIFIER_nondet_uchar() [L157] input_3 = input_3 & mask_SORT_1 [L158] input_4 = __VERIFIER_nondet_uchar() [L159] input_4 = input_4 & mask_SORT_1 [L161] SORT_1 var_125_arg_0 = state_5; [L162] SORT_1 var_125 = ~var_125_arg_0; [L163] SORT_1 var_126_arg_0 = var_125; [L164] SORT_1 var_126 = ~var_126_arg_0; [L165] SORT_1 var_127_arg_0 = state_5; [L166] SORT_1 var_127_arg_1 = var_126; [L167] SORT_1 var_127 = var_127_arg_0 | var_127_arg_1; [L168] var_127 = var_127 & mask_SORT_1 [L169] SORT_1 constr_128_arg_0 = var_127; [L170] CALL assume_abort_if_not(constr_128_arg_0) [L21] COND FALSE !(!cond) [L170] RET assume_abort_if_not(constr_128_arg_0) [L171] SORT_1 var_129_arg_0 = var_8; [L172] var_129_arg_0 = var_129_arg_0 & mask_SORT_1 [L173] SORT_11 var_129 = var_129_arg_0; [L174] SORT_11 var_130_arg_0 = state_117; [L175] SORT_11 var_130_arg_1 = var_129; [L176] SORT_1 var_130 = var_130_arg_0 <= var_130_arg_1; [L177] SORT_1 var_131_arg_0 = input_4; [L178] SORT_1 var_131_arg_1 = var_130; [L179] SORT_1 var_131 = var_131_arg_0 ^ var_131_arg_1; [L180] SORT_1 var_132_arg_0 = var_131; [L181] SORT_1 var_132 = ~var_132_arg_0; [L182] SORT_1 var_133_arg_0 = var_131; [L183] SORT_1 var_133 = ~var_133_arg_0; [L184] SORT_1 var_134_arg_0 = var_132; [L185] SORT_1 var_134_arg_1 = var_133; [L186] SORT_1 var_134 = var_134_arg_0 | var_134_arg_1; [L187] var_134 = var_134 & mask_SORT_1 [L188] SORT_1 constr_135_arg_0 = var_134; [L189] CALL assume_abort_if_not(constr_135_arg_0) [L21] COND FALSE !(!cond) [L189] RET assume_abort_if_not(constr_135_arg_0) [L191] SORT_12 var_115_arg_0 = var_114; [L192] var_115_arg_0 = var_115_arg_0 & mask_SORT_12 [L193] SORT_11 var_115 = var_115_arg_0; [L194] SORT_11 var_119_arg_0 = var_115; [L195] SORT_11 var_119_arg_1 = state_117; [L196] SORT_1 var_119 = var_119_arg_0 < var_119_arg_1; [L197] SORT_1 var_14_arg_0 = input_3; [L198] SORT_1 var_14 = ~var_14_arg_0; [L199] SORT_1 var_16_arg_0 = var_14; [L200] SORT_12 var_16_arg_1 = var_13; [L201] SORT_15 var_16 = ((SORT_15)var_16_arg_0 << 3) | var_16_arg_1; [L202] var_16 = var_16 & mask_SORT_15 [L203] SORT_1 var_18_arg_0 = input_3; [L204] SORT_15 var_18_arg_1 = var_16; [L205] SORT_17 var_18 = ((SORT_17)var_18_arg_0 << 4) | var_18_arg_1; [L206] var_18 = var_18 & mask_SORT_17 [L207] SORT_1 var_20_arg_0 = input_3; [L208] SORT_17 var_20_arg_1 = var_18; [L209] SORT_19 var_20 = ((SORT_19)var_20_arg_0 << 5) | var_20_arg_1; [L210] var_20 = var_20 & mask_SORT_19 [L211] SORT_1 var_22_arg_0 = input_3; [L212] SORT_19 var_22_arg_1 = var_20; [L213] SORT_21 var_22 = ((SORT_21)var_22_arg_0 << 6) | var_22_arg_1; [L214] var_22 = var_22 & mask_SORT_21 [L215] SORT_1 var_24_arg_0 = input_3; [L216] SORT_21 var_24_arg_1 = var_22; [L217] SORT_23 var_24 = ((SORT_23)var_24_arg_0 << 7) | var_24_arg_1; [L218] var_24 = var_24 & mask_SORT_23 [L219] SORT_1 var_26_arg_0 = input_3; [L220] SORT_23 var_26_arg_1 = var_24; [L221] SORT_25 var_26 = ((SORT_25)var_26_arg_0 << 8) | var_26_arg_1; [L222] var_26 = var_26 & mask_SORT_25 [L223] SORT_1 var_28_arg_0 = var_14; [L224] SORT_25 var_28_arg_1 = var_26; [L225] SORT_27 var_28 = ((SORT_27)var_28_arg_0 << 9) | var_28_arg_1; [L226] var_28 = var_28 & mask_SORT_27 [L227] SORT_1 var_30_arg_0 = var_14; [L228] SORT_27 var_30_arg_1 = var_28; [L229] SORT_29 var_30 = ((SORT_29)var_30_arg_0 << 10) | var_30_arg_1; [L230] var_30 = var_30 & mask_SORT_29 [L231] SORT_1 var_32_arg_0 = var_14; [L232] SORT_29 var_32_arg_1 = var_30; [L233] SORT_31 var_32 = ((SORT_31)var_32_arg_0 << 11) | var_32_arg_1; [L234] var_32 = var_32 & mask_SORT_31 [L235] SORT_1 var_34_arg_0 = var_14; [L236] SORT_31 var_34_arg_1 = var_32; [L237] SORT_33 var_34 = ((SORT_33)var_34_arg_0 << 12) | var_34_arg_1; [L238] var_34 = var_34 & mask_SORT_33 [L239] SORT_1 var_36_arg_0 = var_14; [L240] SORT_33 var_36_arg_1 = var_34; [L241] SORT_35 var_36 = ((SORT_35)var_36_arg_0 << 13) | var_36_arg_1; [L242] var_36 = var_36 & mask_SORT_35 [L243] SORT_1 var_38_arg_0 = var_14; [L244] SORT_35 var_38_arg_1 = var_36; [L245] SORT_37 var_38 = ((SORT_37)var_38_arg_0 << 14) | var_38_arg_1; [L246] var_38 = var_38 & mask_SORT_37 [L247] SORT_1 var_39_arg_0 = var_14; [L248] SORT_37 var_39_arg_1 = var_38; [L249] SORT_11 var_39 = ((SORT_11)var_39_arg_0 << 15) | var_39_arg_1; [L250] SORT_1 var_41_arg_0 = state_40; [L251] SORT_1 var_41 = ~var_41_arg_0; [L252] SORT_1 var_42_arg_0 = state_40; [L253] SORT_12 var_42_arg_1 = var_13; [L254] SORT_15 var_42 = ((SORT_15)var_42_arg_0 << 3) | var_42_arg_1; [L255] var_42 = var_42 & mask_SORT_15 [L256] SORT_1 var_43_arg_0 = var_41; [L257] SORT_15 var_43_arg_1 = var_42; [L258] SORT_17 var_43 = ((SORT_17)var_43_arg_0 << 4) | var_43_arg_1; [L259] var_43 = var_43 & mask_SORT_17 [L260] SORT_1 var_44_arg_0 = state_40; [L261] SORT_17 var_44_arg_1 = var_43; [L262] SORT_19 var_44 = ((SORT_19)var_44_arg_0 << 5) | var_44_arg_1; [L263] var_44 = var_44 & mask_SORT_19 [L264] SORT_1 var_45_arg_0 = var_41; [L265] SORT_19 var_45_arg_1 = var_44; [L266] SORT_21 var_45 = ((SORT_21)var_45_arg_0 << 6) | var_45_arg_1; [L267] var_45 = var_45 & mask_SORT_21 [L268] SORT_1 var_46_arg_0 = var_41; [L269] SORT_21 var_46_arg_1 = var_45; [L270] SORT_23 var_46 = ((SORT_23)var_46_arg_0 << 7) | var_46_arg_1; [L271] var_46 = var_46 & mask_SORT_23 [L272] SORT_1 var_47_arg_0 = state_40; [L273] SORT_23 var_47_arg_1 = var_46; [L274] SORT_25 var_47 = ((SORT_25)var_47_arg_0 << 8) | var_47_arg_1; [L275] var_47 = var_47 & mask_SORT_25 [L276] SORT_1 var_48_arg_0 = var_41; [L277] SORT_25 var_48_arg_1 = var_47; [L278] SORT_27 var_48 = ((SORT_27)var_48_arg_0 << 9) | var_48_arg_1; [L279] var_48 = var_48 & mask_SORT_27 [L280] SORT_1 var_49_arg_0 = var_41; [L281] SORT_27 var_49_arg_1 = var_48; [L282] SORT_29 var_49 = ((SORT_29)var_49_arg_0 << 10) | var_49_arg_1; [L283] var_49 = var_49 & mask_SORT_29 [L284] SORT_1 var_50_arg_0 = var_41; [L285] SORT_29 var_50_arg_1 = var_49; [L286] SORT_31 var_50 = ((SORT_31)var_50_arg_0 << 11) | var_50_arg_1; [L287] var_50 = var_50 & mask_SORT_31 [L288] SORT_1 var_51_arg_0 = var_41; [L289] SORT_31 var_51_arg_1 = var_50; [L290] SORT_33 var_51 = ((SORT_33)var_51_arg_0 << 12) | var_51_arg_1; [L291] var_51 = var_51 & mask_SORT_33 [L292] SORT_1 var_52_arg_0 = var_41; [L293] SORT_33 var_52_arg_1 = var_51; [L294] SORT_35 var_52 = ((SORT_35)var_52_arg_0 << 13) | var_52_arg_1; [L295] var_52 = var_52 & mask_SORT_35 [L296] SORT_1 var_53_arg_0 = var_41; [L297] SORT_35 var_53_arg_1 = var_52; [L298] SORT_37 var_53 = ((SORT_37)var_53_arg_0 << 14) | var_53_arg_1; [L299] var_53 = var_53 & mask_SORT_37 [L300] SORT_1 var_54_arg_0 = var_41; [L301] SORT_37 var_54_arg_1 = var_53; [L302] SORT_11 var_54 = ((SORT_11)var_54_arg_0 << 15) | var_54_arg_1; [L303] SORT_11 var_55_arg_0 = var_39; [L304] SORT_11 var_55_arg_1 = var_54; [L305] SORT_11 var_55 = var_55_arg_0 + var_55_arg_1; [L306] SORT_11 var_57_arg_0 = state_56; [L307] SORT_11 var_57 = -var_57_arg_0; [L308] SORT_1 var_59_arg_0 = state_58; [L309] SORT_11 var_59_arg_1 = var_57; [L310] SORT_11 var_59_arg_2 = state_56; [L311] SORT_11 var_59 = var_59_arg_0 ? var_59_arg_1 : var_59_arg_2; [L312] SORT_11 var_60_arg_0 = var_55; [L313] SORT_11 var_60_arg_1 = var_59; [L314] SORT_11 var_60 = var_60_arg_0 + var_60_arg_1; [L315] var_60 = var_60 & mask_SORT_11 [L316] SORT_11 var_61_arg_0 = var_60; [L317] SORT_1 var_61 = var_61_arg_0 >> 15; [L318] SORT_1 var_63_arg_0 = var_61; [L319] SORT_9 var_63_arg_1 = var_10; [L320] SORT_62 var_63 = ((SORT_62)var_63_arg_0 << 31) | var_63_arg_1; [L321] var_63 = var_63 & mask_SORT_62 [L322] SORT_11 var_106_arg_0 = var_60; [L323] SORT_1 var_106 = var_106_arg_0 >> 15; [L324] SORT_11 var_103_arg_0 = var_60; [L325] SORT_1 var_103 = var_103_arg_0 >> 15; [L326] SORT_11 var_100_arg_0 = var_60; [L327] SORT_1 var_100 = var_100_arg_0 >> 15; [L328] SORT_11 var_97_arg_0 = var_60; [L329] SORT_1 var_97 = var_97_arg_0 >> 15; [L330] SORT_11 var_94_arg_0 = var_60; [L331] SORT_1 var_94 = var_94_arg_0 >> 15; [L332] SORT_11 var_91_arg_0 = var_60; [L333] SORT_1 var_91 = var_91_arg_0 >> 15; [L334] SORT_11 var_88_arg_0 = var_60; [L335] SORT_1 var_88 = var_88_arg_0 >> 15; [L336] SORT_11 var_85_arg_0 = var_60; [L337] SORT_1 var_85 = var_85_arg_0 >> 15; [L338] SORT_11 var_82_arg_0 = var_60; [L339] SORT_1 var_82 = var_82_arg_0 >> 15; [L340] SORT_11 var_79_arg_0 = var_60; [L341] SORT_1 var_79 = var_79_arg_0 >> 15; [L342] SORT_11 var_76_arg_0 = var_60; [L343] SORT_1 var_76 = var_76_arg_0 >> 15; [L344] SORT_11 var_73_arg_0 = var_60; [L345] SORT_1 var_73 = var_73_arg_0 >> 15; [L346] SORT_11 var_70_arg_0 = var_60; [L347] SORT_1 var_70 = var_70_arg_0 >> 15; [L348] SORT_11 var_67_arg_0 = var_60; [L349] SORT_1 var_67 = var_67_arg_0 >> 15; [L350] SORT_11 var_64_arg_0 = var_60; [L351] SORT_1 var_64 = var_64_arg_0 >> 15; [L352] SORT_1 var_66_arg_0 = var_64; [L353] SORT_11 var_66_arg_1 = var_60; [L354] SORT_65 var_66 = ((SORT_65)var_66_arg_0 << 16) | var_66_arg_1; [L355] var_66 = var_66 & mask_SORT_65 [L356] SORT_1 var_69_arg_0 = var_67; [L357] SORT_65 var_69_arg_1 = var_66; [L358] SORT_68 var_69 = ((SORT_68)var_69_arg_0 << 17) | var_69_arg_1; [L359] var_69 = var_69 & mask_SORT_68 [L360] SORT_1 var_72_arg_0 = var_70; [L361] SORT_68 var_72_arg_1 = var_69; [L362] SORT_71 var_72 = ((SORT_71)var_72_arg_0 << 18) | var_72_arg_1; [L363] var_72 = var_72 & mask_SORT_71 [L364] SORT_1 var_75_arg_0 = var_73; [L365] SORT_71 var_75_arg_1 = var_72; [L366] SORT_74 var_75 = ((SORT_74)var_75_arg_0 << 19) | var_75_arg_1; [L367] var_75 = var_75 & mask_SORT_74 [L368] SORT_1 var_78_arg_0 = var_76; [L369] SORT_74 var_78_arg_1 = var_75; [L370] SORT_77 var_78 = ((SORT_77)var_78_arg_0 << 20) | var_78_arg_1; [L371] var_78 = var_78 & mask_SORT_77 [L372] SORT_1 var_81_arg_0 = var_79; [L373] SORT_77 var_81_arg_1 = var_78; [L374] SORT_80 var_81 = ((SORT_80)var_81_arg_0 << 21) | var_81_arg_1; [L375] var_81 = var_81 & mask_SORT_80 [L376] SORT_1 var_84_arg_0 = var_82; [L377] SORT_80 var_84_arg_1 = var_81; [L378] SORT_83 var_84 = ((SORT_83)var_84_arg_0 << 22) | var_84_arg_1; [L379] var_84 = var_84 & mask_SORT_83 [L380] SORT_1 var_87_arg_0 = var_85; [L381] SORT_83 var_87_arg_1 = var_84; [L382] SORT_86 var_87 = ((SORT_86)var_87_arg_0 << 23) | var_87_arg_1; [L383] var_87 = var_87 & mask_SORT_86 [L384] SORT_1 var_90_arg_0 = var_88; [L385] SORT_86 var_90_arg_1 = var_87; [L386] SORT_89 var_90 = ((SORT_89)var_90_arg_0 << 24) | var_90_arg_1; [L387] var_90 = var_90 & mask_SORT_89 [L388] SORT_1 var_93_arg_0 = var_91; [L389] SORT_89 var_93_arg_1 = var_90; [L390] SORT_92 var_93 = ((SORT_92)var_93_arg_0 << 25) | var_93_arg_1; [L391] var_93 = var_93 & mask_SORT_92 [L392] SORT_1 var_96_arg_0 = var_94; [L393] SORT_92 var_96_arg_1 = var_93; [L394] SORT_95 var_96 = ((SORT_95)var_96_arg_0 << 26) | var_96_arg_1; [L395] var_96 = var_96 & mask_SORT_95 [L396] SORT_1 var_99_arg_0 = var_97; [L397] SORT_95 var_99_arg_1 = var_96; [L398] SORT_98 var_99 = ((SORT_98)var_99_arg_0 << 27) | var_99_arg_1; [L399] var_99 = var_99 & mask_SORT_98 [L400] SORT_1 var_102_arg_0 = var_100; [L401] SORT_98 var_102_arg_1 = var_99; [L402] SORT_101 var_102 = ((SORT_101)var_102_arg_0 << 28) | var_102_arg_1; [L403] var_102 = var_102 & mask_SORT_101 [L404] SORT_1 var_105_arg_0 = var_103; [L405] SORT_101 var_105_arg_1 = var_102; [L406] SORT_104 var_105 = ((SORT_104)var_105_arg_0 << 29) | var_105_arg_1; [L407] var_105 = var_105 & mask_SORT_104 [L408] SORT_1 var_107_arg_0 = var_106; [L409] SORT_104 var_107_arg_1 = var_105; [L410] SORT_9 var_107 = ((SORT_9)var_107_arg_0 << 30) | var_107_arg_1; [L411] SORT_9 var_108_arg_0 = var_107; [L412] var_108_arg_0 = var_108_arg_0 & mask_SORT_9 [L413] SORT_62 var_108 = var_108_arg_0; [L414] SORT_62 var_109_arg_0 = var_63; [L415] SORT_62 var_109_arg_1 = var_108; [L416] SORT_1 var_109 = var_109_arg_0 <= var_109_arg_1; [L417] SORT_1 var_110_arg_0 = var_109; [L418] SORT_1 var_110_arg_1 = var_8; [L419] SORT_1 var_110_arg_2 = var_7; [L420] SORT_1 var_110 = var_110_arg_0 ? var_110_arg_1 : var_110_arg_2; [L421] var_110 = var_110 & mask_SORT_1 [L422] SORT_1 var_111_arg_0 = input_3; [L423] SORT_1 var_111_arg_1 = var_110; [L424] SORT_1 var_111 = var_111_arg_0 ^ var_111_arg_1; [L425] SORT_1 var_112_arg_0 = var_111; [L426] SORT_1 var_112 = ~var_112_arg_0; [L427] SORT_1 var_120_arg_0 = var_119; [L428] SORT_1 var_120_arg_1 = var_112; [L429] SORT_1 var_120_arg_2 = var_8; [L430] SORT_1 var_120 = var_120_arg_0 ? var_120_arg_1 : var_120_arg_2; [L431] SORT_1 var_121_arg_0 = var_120; [L432] SORT_1 var_121 = ~var_121_arg_0; [L433] SORT_1 var_122_arg_0 = var_120; [L434] SORT_1 var_122 = ~var_122_arg_0; [L435] SORT_1 var_123_arg_0 = var_121; [L436] SORT_1 var_123_arg_1 = var_122; [L437] SORT_1 var_123 = var_123_arg_0 & var_123_arg_1; [L438] var_123 = var_123 & mask_SORT_1 [L439] SORT_1 bad_124_arg_0 = var_123; [L440] CALL __VERIFIER_assert(!(bad_124_arg_0)) [L20] COND FALSE !(!(cond)) [L440] RET __VERIFIER_assert(!(bad_124_arg_0)) [L442] SORT_15 var_252_arg_0 = state_140; [L443] SORT_15 var_252_arg_1 = var_251; [L444] SORT_1 var_252 = var_252_arg_0 == var_252_arg_1; [L445] SORT_12 var_245_arg_0 = var_13; [L446] var_245_arg_0 = var_245_arg_0 & mask_SORT_12 [L447] SORT_15 var_245 = var_245_arg_0; [L448] SORT_15 var_246_arg_0 = var_245; [L449] SORT_15 var_246_arg_1 = state_137; [L450] SORT_1 var_246 = var_246_arg_0 <= var_246_arg_1; [L451] SORT_12 var_248_arg_0 = var_247; [L452] var_248_arg_0 = var_248_arg_0 & mask_SORT_12 [L453] SORT_15 var_248 = var_248_arg_0; [L454] SORT_15 var_249_arg_0 = state_137; [L455] SORT_15 var_249_arg_1 = var_248; [L456] SORT_1 var_249 = var_249_arg_0 <= var_249_arg_1; [L457] SORT_1 var_250_arg_0 = var_246; [L458] SORT_1 var_250_arg_1 = var_249; [L459] SORT_1 var_250 = var_250_arg_0 & var_250_arg_1; [L460] SORT_1 var_253_arg_0 = var_252; [L461] SORT_1 var_253_arg_1 = var_250; [L462] SORT_1 var_253_arg_2 = var_8; [L463] SORT_1 var_253 = var_253_arg_0 ? var_253_arg_1 : var_253_arg_2; [L464] SORT_1 var_254_arg_0 = input_4; [L465] SORT_1 var_254_arg_1 = var_8; [L466] SORT_1 var_254_arg_2 = var_253; [L467] SORT_1 var_254 = var_254_arg_0 ? var_254_arg_1 : var_254_arg_2; [L468] SORT_1 next_255_arg_1 = var_254; [L469] SORT_1 var_256_arg_0 = input_4; [L470] SORT_1 var_256_arg_1 = var_7; [L471] SORT_1 var_256_arg_2 = input_3; [L472] SORT_1 var_256 = var_256_arg_0 ? var_256_arg_1 : var_256_arg_2; [L473] SORT_1 next_257_arg_1 = var_256; [L474] SORT_23 var_190_arg_0 = var_189; [L475] var_190_arg_0 = (var_190_arg_0 & msb_SORT_23) ? (var_190_arg_0 | ~mask_SORT_23) : (var_190_arg_0 & mask_SORT_23) [L476] SORT_83 var_190 = (int)((signed char)var_190_arg_0); [L477] SORT_11 var_191_arg_0 = state_56; [L478] var_191_arg_0 = (var_191_arg_0 & msb_SORT_11) ? (var_191_arg_0 | ~mask_SORT_11) : (var_191_arg_0 & mask_SORT_11) [L479] SORT_83 var_191 = (int)((short)var_191_arg_0); [L480] SORT_83 var_192_arg_0 = var_190; [L481] SORT_83 var_192_arg_1 = var_191; [L482] SORT_83 var_192 = var_192_arg_0 * var_192_arg_1; [L483] SORT_153 var_155_arg_0 = var_154; [L484] var_155_arg_0 = (var_155_arg_0 & msb_SORT_153) ? (var_155_arg_0 | ~mask_SORT_153) : (var_155_arg_0 & mask_SORT_153) [L485] SORT_68 var_155 = (int)((signed char)var_155_arg_0); [L486] SORT_11 var_145_arg_0 = state_144; [L487] SORT_11 var_145 = -var_145_arg_0; [L488] SORT_1 var_146_arg_0 = var_110; [L489] SORT_11 var_146_arg_1 = var_145; [L490] SORT_11 var_146_arg_2 = state_144; [L491] SORT_11 var_146 = var_146_arg_0 ? var_146_arg_1 : var_146_arg_2; [L492] SORT_11 var_147_arg_0 = var_55; [L493] SORT_11 var_147_arg_1 = var_146; [L494] SORT_11 var_147 = var_147_arg_0 + var_147_arg_1; [L495] SORT_11 var_156_arg_0 = var_147; [L496] SORT_11 var_156 = -var_156_arg_0; [L497] SORT_1 var_157_arg_0 = state_58; [L498] SORT_11 var_157_arg_1 = var_147; [L499] SORT_11 var_157_arg_2 = var_156; [L500] SORT_11 var_157 = var_157_arg_0 ? var_157_arg_1 : var_157_arg_2; [L501] SORT_11 var_158_arg_0 = var_157; [L502] var_158_arg_0 = (var_158_arg_0 & msb_SORT_11) ? (var_158_arg_0 | ~mask_SORT_11) : (var_158_arg_0 & mask_SORT_11) [L503] SORT_68 var_158 = (int)((short)var_158_arg_0); [L504] SORT_68 var_159_arg_0 = var_155; [L505] SORT_68 var_159_arg_1 = var_158; [L506] SORT_68 var_159 = var_159_arg_0 * var_159_arg_1; [L507] var_159 = var_159 & mask_SORT_68 [L508] SORT_68 var_266_arg_0 = var_159; [L509] SORT_1 var_266 = var_266_arg_0 >> 17; [L510] SORT_68 var_264_arg_0 = var_159; [L511] SORT_1 var_264 = var_264_arg_0 >> 17; [L512] SORT_68 var_262_arg_0 = var_159; [L513] SORT_1 var_262 = var_262_arg_0 >> 17; [L514] SORT_68 var_260_arg_0 = var_159; [L515] SORT_1 var_260 = var_260_arg_0 >> 17; [L516] SORT_68 var_258_arg_0 = var_159; [L517] SORT_1 var_258 = var_258_arg_0 >> 17; [L518] SORT_1 var_259_arg_0 = var_258; [L519] SORT_68 var_259_arg_1 = var_159; [L520] SORT_71 var_259 = ((SORT_71)var_259_arg_0 << 18) | var_259_arg_1; [L521] var_259 = var_259 & mask_SORT_71 [L522] SORT_1 var_261_arg_0 = var_260; [L523] SORT_71 var_261_arg_1 = var_259; [L524] SORT_74 var_261 = ((SORT_74)var_261_arg_0 << 19) | var_261_arg_1; [L525] var_261 = var_261 & mask_SORT_74 [L526] SORT_1 var_263_arg_0 = var_262; [L527] SORT_74 var_263_arg_1 = var_261; [L528] SORT_77 var_263 = ((SORT_77)var_263_arg_0 << 20) | var_263_arg_1; [L529] var_263 = var_263 & mask_SORT_77 [L530] SORT_1 var_265_arg_0 = var_264; [L531] SORT_77 var_265_arg_1 = var_263; [L532] SORT_80 var_265 = ((SORT_80)var_265_arg_0 << 21) | var_265_arg_1; [L533] var_265 = var_265 & mask_SORT_80 [L534] SORT_1 var_267_arg_0 = var_266; [L535] SORT_80 var_267_arg_1 = var_265; [L536] SORT_83 var_267 = ((SORT_83)var_267_arg_0 << 22) | var_267_arg_1; [L537] SORT_83 var_268_arg_0 = var_192; [L538] SORT_83 var_268_arg_1 = var_267; [L539] SORT_83 var_268 = var_268_arg_0 + var_268_arg_1; [L540] SORT_21 var_270_arg_0 = var_269; [L541] var_270_arg_0 = var_270_arg_0 & mask_SORT_21 [L542] SORT_83 var_270 = var_270_arg_0; [L543] SORT_83 var_271_arg_0 = var_268; [L544] SORT_83 var_271_arg_1 = var_270; [L545] SORT_83 var_271 = var_271_arg_0 + var_271_arg_1; [L546] SORT_83 var_272_arg_0 = var_271; [L547] SORT_11 var_272 = var_272_arg_0 >> 7; [L548] SORT_1 var_273_arg_0 = input_4; [L549] SORT_11 var_273_arg_1 = var_197; [L550] SORT_11 var_273_arg_2 = var_272; [L551] SORT_11 var_273 = var_273_arg_0 ? var_273_arg_1 : var_273_arg_2; [L552] SORT_11 next_274_arg_1 = var_273; [L553] SORT_1 var_275_arg_0 = input_4; [L554] SORT_1 var_275_arg_1 = var_7; [L555] SORT_1 var_275_arg_2 = var_110; [L556] SORT_1 var_275 = var_275_arg_0 ? var_275_arg_1 : var_275_arg_2; [L557] var_275 = var_275 & mask_SORT_1 [L558] SORT_1 next_276_arg_1 = var_275; [L559] SORT_1 var_277_arg_0 = var_8; [L560] var_277_arg_0 = var_277_arg_0 & mask_SORT_1 [L561] SORT_11 var_277 = var_277_arg_0; [L562] SORT_11 var_278_arg_0 = state_117; [L563] SORT_11 var_278_arg_1 = var_277; [L564] SORT_11 var_278 = var_278_arg_0 + var_278_arg_1; [L565] var_278 = var_278 & mask_SORT_11 [L566] SORT_11 next_279_arg_1 = var_278; [L567] SORT_12 var_283_arg_0 = var_282; [L568] SORT_1 var_283_arg_1 = input_3; [L569] SORT_15 var_283 = ((SORT_15)var_283_arg_0 << 1) | var_283_arg_1; [L570] SORT_1 var_280_arg_0 = input_3; [L571] var_280_arg_0 = var_280_arg_0 & mask_SORT_1 [L572] SORT_15 var_280 = var_280_arg_0; [L573] SORT_15 var_281_arg_0 = state_137; [L574] SORT_15 var_281_arg_1 = var_280; [L575] SORT_15 var_281 = var_281_arg_0 + var_281_arg_1; [L576] SORT_1 var_284_arg_0 = var_252; [L577] SORT_15 var_284_arg_1 = var_283; [L578] SORT_15 var_284_arg_2 = var_281; [L579] SORT_15 var_284 = var_284_arg_0 ? var_284_arg_1 : var_284_arg_2; [L580] SORT_1 var_286_arg_0 = input_4; [L581] SORT_15 var_286_arg_1 = var_285; [L582] SORT_15 var_286_arg_2 = var_284; [L583] SORT_15 var_286 = var_286_arg_0 ? var_286_arg_1 : var_286_arg_2; [L584] var_286 = var_286 & mask_SORT_15 [L585] SORT_15 next_287_arg_1 = var_286; [L586] SORT_1 var_288_arg_0 = var_8; [L587] var_288_arg_0 = var_288_arg_0 & mask_SORT_1 [L588] SORT_15 var_288 = var_288_arg_0; [L589] SORT_15 var_289_arg_0 = state_140; [L590] SORT_15 var_289_arg_1 = var_288; [L591] SORT_15 var_289 = var_289_arg_0 + var_289_arg_1; [L592] SORT_1 var_290_arg_0 = var_252; [L593] SORT_15 var_290_arg_1 = var_285; [L594] SORT_15 var_290_arg_2 = var_289; [L595] SORT_15 var_290 = var_290_arg_0 ? var_290_arg_1 : var_290_arg_2; [L596] SORT_1 var_291_arg_0 = input_4; [L597] SORT_15 var_291_arg_1 = var_285; [L598] SORT_15 var_291_arg_2 = var_290; [L599] SORT_15 var_291 = var_291_arg_0 ? var_291_arg_1 : var_291_arg_2; [L600] var_291 = var_291 & mask_SORT_15 [L601] SORT_15 next_292_arg_1 = var_291; [L602] SORT_23 var_235_arg_0 = var_189; [L603] var_235_arg_0 = (var_235_arg_0 & msb_SORT_23) ? (var_235_arg_0 | ~mask_SORT_23) : (var_235_arg_0 & mask_SORT_23) [L604] SORT_83 var_235 = (int)((signed char)var_235_arg_0); [L605] SORT_11 var_236_arg_0 = state_144; [L606] var_236_arg_0 = (var_236_arg_0 & msb_SORT_11) ? (var_236_arg_0 | ~mask_SORT_11) : (var_236_arg_0 & mask_SORT_11) [L607] SORT_83 var_236 = (int)((short)var_236_arg_0); [L608] SORT_83 var_237_arg_0 = var_235; [L609] SORT_83 var_237_arg_1 = var_236; [L610] SORT_83 var_237 = var_237_arg_0 * var_237_arg_1; [L611] SORT_153 var_201_arg_0 = var_154; [L612] var_201_arg_0 = (var_201_arg_0 & msb_SORT_153) ? (var_201_arg_0 | ~mask_SORT_153) : (var_201_arg_0 & mask_SORT_153) [L613] SORT_68 var_201 = (int)((signed char)var_201_arg_0); [L614] SORT_11 var_202_arg_0 = var_60; [L615] SORT_11 var_202 = -var_202_arg_0; [L616] SORT_1 var_203_arg_0 = var_110; [L617] SORT_11 var_203_arg_1 = var_60; [L618] SORT_11 var_203_arg_2 = var_202; [L619] SORT_11 var_203 = var_203_arg_0 ? var_203_arg_1 : var_203_arg_2; [L620] SORT_11 var_204_arg_0 = var_203; [L621] var_204_arg_0 = (var_204_arg_0 & msb_SORT_11) ? (var_204_arg_0 | ~mask_SORT_11) : (var_204_arg_0 & mask_SORT_11) [L622] SORT_68 var_204 = (int)((short)var_204_arg_0); [L623] SORT_68 var_205_arg_0 = var_201; [L624] SORT_68 var_205_arg_1 = var_204; [L625] SORT_68 var_205 = var_205_arg_0 * var_205_arg_1; [L626] var_205 = var_205 & mask_SORT_68 [L627] SORT_68 var_301_arg_0 = var_205; [L628] SORT_1 var_301 = var_301_arg_0 >> 17; [L629] SORT_68 var_299_arg_0 = var_205; [L630] SORT_1 var_299 = var_299_arg_0 >> 17; [L631] SORT_68 var_297_arg_0 = var_205; [L632] SORT_1 var_297 = var_297_arg_0 >> 17; [L633] SORT_68 var_295_arg_0 = var_205; [L634] SORT_1 var_295 = var_295_arg_0 >> 17; [L635] SORT_68 var_293_arg_0 = var_205; [L636] SORT_1 var_293 = var_293_arg_0 >> 17; [L637] SORT_1 var_294_arg_0 = var_293; [L638] SORT_68 var_294_arg_1 = var_205; [L639] SORT_71 var_294 = ((SORT_71)var_294_arg_0 << 18) | var_294_arg_1; [L640] var_294 = var_294 & mask_SORT_71 [L641] SORT_1 var_296_arg_0 = var_295; [L642] SORT_71 var_296_arg_1 = var_294; [L643] SORT_74 var_296 = ((SORT_74)var_296_arg_0 << 19) | var_296_arg_1; [L644] var_296 = var_296 & mask_SORT_74 [L645] SORT_1 var_298_arg_0 = var_297; [L646] SORT_74 var_298_arg_1 = var_296; [L647] SORT_77 var_298 = ((SORT_77)var_298_arg_0 << 20) | var_298_arg_1; [L648] var_298 = var_298 & mask_SORT_77 [L649] SORT_1 var_300_arg_0 = var_299; [L650] SORT_77 var_300_arg_1 = var_298; [L651] SORT_80 var_300 = ((SORT_80)var_300_arg_0 << 21) | var_300_arg_1; [L652] var_300 = var_300 & mask_SORT_80 [L653] SORT_1 var_302_arg_0 = var_301; [L654] SORT_80 var_302_arg_1 = var_300; [L655] SORT_83 var_302 = ((SORT_83)var_302_arg_0 << 22) | var_302_arg_1; [L656] SORT_83 var_303_arg_0 = var_237; [L657] SORT_83 var_303_arg_1 = var_302; [L658] SORT_83 var_303 = var_303_arg_0 + var_303_arg_1; [L659] SORT_21 var_304_arg_0 = var_269; [L660] var_304_arg_0 = var_304_arg_0 & mask_SORT_21 [L661] SORT_83 var_304 = var_304_arg_0; [L662] SORT_83 var_305_arg_0 = var_303; [L663] SORT_83 var_305_arg_1 = var_304; [L664] SORT_83 var_305 = var_305_arg_0 + var_305_arg_1; [L665] SORT_83 var_306_arg_0 = var_305; [L666] SORT_11 var_306 = var_306_arg_0 >> 7; [L667] SORT_1 var_307_arg_0 = input_4; [L668] SORT_11 var_307_arg_1 = var_197; [L669] SORT_11 var_307_arg_2 = var_306; [L670] SORT_11 var_307 = var_307_arg_0 ? var_307_arg_1 : var_307_arg_2; [L671] SORT_11 next_308_arg_1 = var_307; [L673] state_5 = next_255_arg_1 [L674] state_40 = next_257_arg_1 [L675] state_56 = next_274_arg_1 [L676] state_58 = next_276_arg_1 [L677] state_117 = next_279_arg_1 [L678] state_137 = next_287_arg_1 [L679] state_140 = next_292_arg_1 [L680] state_144 = next_308_arg_1 [L155] input_2 = __VERIFIER_nondet_uchar() [L156] input_3 = __VERIFIER_nondet_uchar() [L157] input_3 = input_3 & mask_SORT_1 [L158] input_4 = __VERIFIER_nondet_uchar() [L159] input_4 = input_4 & mask_SORT_1 [L161] SORT_1 var_125_arg_0 = state_5; [L162] SORT_1 var_125 = ~var_125_arg_0; [L163] SORT_1 var_126_arg_0 = var_125; [L164] SORT_1 var_126 = ~var_126_arg_0; [L165] SORT_1 var_127_arg_0 = state_5; [L166] SORT_1 var_127_arg_1 = var_126; [L167] SORT_1 var_127 = var_127_arg_0 | var_127_arg_1; [L168] var_127 = var_127 & mask_SORT_1 [L169] SORT_1 constr_128_arg_0 = var_127; [L170] CALL assume_abort_if_not(constr_128_arg_0) [L21] COND FALSE !(!cond) [L170] RET assume_abort_if_not(constr_128_arg_0) [L171] SORT_1 var_129_arg_0 = var_8; [L172] var_129_arg_0 = var_129_arg_0 & mask_SORT_1 [L173] SORT_11 var_129 = var_129_arg_0; [L174] SORT_11 var_130_arg_0 = state_117; [L175] SORT_11 var_130_arg_1 = var_129; [L176] SORT_1 var_130 = var_130_arg_0 <= var_130_arg_1; [L177] SORT_1 var_131_arg_0 = input_4; [L178] SORT_1 var_131_arg_1 = var_130; [L179] SORT_1 var_131 = var_131_arg_0 ^ var_131_arg_1; [L180] SORT_1 var_132_arg_0 = var_131; [L181] SORT_1 var_132 = ~var_132_arg_0; [L182] SORT_1 var_133_arg_0 = var_131; [L183] SORT_1 var_133 = ~var_133_arg_0; [L184] SORT_1 var_134_arg_0 = var_132; [L185] SORT_1 var_134_arg_1 = var_133; [L186] SORT_1 var_134 = var_134_arg_0 | var_134_arg_1; [L187] var_134 = var_134 & mask_SORT_1 [L188] SORT_1 constr_135_arg_0 = var_134; [L189] CALL assume_abort_if_not(constr_135_arg_0) [L21] COND FALSE !(!cond) [L189] RET assume_abort_if_not(constr_135_arg_0) [L191] SORT_12 var_115_arg_0 = var_114; [L192] var_115_arg_0 = var_115_arg_0 & mask_SORT_12 [L193] SORT_11 var_115 = var_115_arg_0; [L194] SORT_11 var_119_arg_0 = var_115; [L195] SORT_11 var_119_arg_1 = state_117; [L196] SORT_1 var_119 = var_119_arg_0 < var_119_arg_1; [L197] SORT_1 var_14_arg_0 = input_3; [L198] SORT_1 var_14 = ~var_14_arg_0; [L199] SORT_1 var_16_arg_0 = var_14; [L200] SORT_12 var_16_arg_1 = var_13; [L201] SORT_15 var_16 = ((SORT_15)var_16_arg_0 << 3) | var_16_arg_1; [L202] var_16 = var_16 & mask_SORT_15 [L203] SORT_1 var_18_arg_0 = input_3; [L204] SORT_15 var_18_arg_1 = var_16; [L205] SORT_17 var_18 = ((SORT_17)var_18_arg_0 << 4) | var_18_arg_1; [L206] var_18 = var_18 & mask_SORT_17 [L207] SORT_1 var_20_arg_0 = input_3; [L208] SORT_17 var_20_arg_1 = var_18; [L209] SORT_19 var_20 = ((SORT_19)var_20_arg_0 << 5) | var_20_arg_1; [L210] var_20 = var_20 & mask_SORT_19 [L211] SORT_1 var_22_arg_0 = input_3; [L212] SORT_19 var_22_arg_1 = var_20; [L213] SORT_21 var_22 = ((SORT_21)var_22_arg_0 << 6) | var_22_arg_1; [L214] var_22 = var_22 & mask_SORT_21 [L215] SORT_1 var_24_arg_0 = input_3; [L216] SORT_21 var_24_arg_1 = var_22; [L217] SORT_23 var_24 = ((SORT_23)var_24_arg_0 << 7) | var_24_arg_1; [L218] var_24 = var_24 & mask_SORT_23 [L219] SORT_1 var_26_arg_0 = input_3; [L220] SORT_23 var_26_arg_1 = var_24; [L221] SORT_25 var_26 = ((SORT_25)var_26_arg_0 << 8) | var_26_arg_1; [L222] var_26 = var_26 & mask_SORT_25 [L223] SORT_1 var_28_arg_0 = var_14; [L224] SORT_25 var_28_arg_1 = var_26; [L225] SORT_27 var_28 = ((SORT_27)var_28_arg_0 << 9) | var_28_arg_1; [L226] var_28 = var_28 & mask_SORT_27 [L227] SORT_1 var_30_arg_0 = var_14; [L228] SORT_27 var_30_arg_1 = var_28; [L229] SORT_29 var_30 = ((SORT_29)var_30_arg_0 << 10) | var_30_arg_1; [L230] var_30 = var_30 & mask_SORT_29 [L231] SORT_1 var_32_arg_0 = var_14; [L232] SORT_29 var_32_arg_1 = var_30; [L233] SORT_31 var_32 = ((SORT_31)var_32_arg_0 << 11) | var_32_arg_1; [L234] var_32 = var_32 & mask_SORT_31 [L235] SORT_1 var_34_arg_0 = var_14; [L236] SORT_31 var_34_arg_1 = var_32; [L237] SORT_33 var_34 = ((SORT_33)var_34_arg_0 << 12) | var_34_arg_1; [L238] var_34 = var_34 & mask_SORT_33 [L239] SORT_1 var_36_arg_0 = var_14; [L240] SORT_33 var_36_arg_1 = var_34; [L241] SORT_35 var_36 = ((SORT_35)var_36_arg_0 << 13) | var_36_arg_1; [L242] var_36 = var_36 & mask_SORT_35 [L243] SORT_1 var_38_arg_0 = var_14; [L244] SORT_35 var_38_arg_1 = var_36; [L245] SORT_37 var_38 = ((SORT_37)var_38_arg_0 << 14) | var_38_arg_1; [L246] var_38 = var_38 & mask_SORT_37 [L247] SORT_1 var_39_arg_0 = var_14; [L248] SORT_37 var_39_arg_1 = var_38; [L249] SORT_11 var_39 = ((SORT_11)var_39_arg_0 << 15) | var_39_arg_1; [L250] SORT_1 var_41_arg_0 = state_40; [L251] SORT_1 var_41 = ~var_41_arg_0; [L252] SORT_1 var_42_arg_0 = state_40; [L253] SORT_12 var_42_arg_1 = var_13; [L254] SORT_15 var_42 = ((SORT_15)var_42_arg_0 << 3) | var_42_arg_1; [L255] var_42 = var_42 & mask_SORT_15 [L256] SORT_1 var_43_arg_0 = var_41; [L257] SORT_15 var_43_arg_1 = var_42; [L258] SORT_17 var_43 = ((SORT_17)var_43_arg_0 << 4) | var_43_arg_1; [L259] var_43 = var_43 & mask_SORT_17 [L260] SORT_1 var_44_arg_0 = state_40; [L261] SORT_17 var_44_arg_1 = var_43; [L262] SORT_19 var_44 = ((SORT_19)var_44_arg_0 << 5) | var_44_arg_1; [L263] var_44 = var_44 & mask_SORT_19 [L264] SORT_1 var_45_arg_0 = var_41; [L265] SORT_19 var_45_arg_1 = var_44; [L266] SORT_21 var_45 = ((SORT_21)var_45_arg_0 << 6) | var_45_arg_1; [L267] var_45 = var_45 & mask_SORT_21 [L268] SORT_1 var_46_arg_0 = var_41; [L269] SORT_21 var_46_arg_1 = var_45; [L270] SORT_23 var_46 = ((SORT_23)var_46_arg_0 << 7) | var_46_arg_1; [L271] var_46 = var_46 & mask_SORT_23 [L272] SORT_1 var_47_arg_0 = state_40; [L273] SORT_23 var_47_arg_1 = var_46; [L274] SORT_25 var_47 = ((SORT_25)var_47_arg_0 << 8) | var_47_arg_1; [L275] var_47 = var_47 & mask_SORT_25 [L276] SORT_1 var_48_arg_0 = var_41; [L277] SORT_25 var_48_arg_1 = var_47; [L278] SORT_27 var_48 = ((SORT_27)var_48_arg_0 << 9) | var_48_arg_1; [L279] var_48 = var_48 & mask_SORT_27 [L280] SORT_1 var_49_arg_0 = var_41; [L281] SORT_27 var_49_arg_1 = var_48; [L282] SORT_29 var_49 = ((SORT_29)var_49_arg_0 << 10) | var_49_arg_1; [L283] var_49 = var_49 & mask_SORT_29 [L284] SORT_1 var_50_arg_0 = var_41; [L285] SORT_29 var_50_arg_1 = var_49; [L286] SORT_31 var_50 = ((SORT_31)var_50_arg_0 << 11) | var_50_arg_1; [L287] var_50 = var_50 & mask_SORT_31 [L288] SORT_1 var_51_arg_0 = var_41; [L289] SORT_31 var_51_arg_1 = var_50; [L290] SORT_33 var_51 = ((SORT_33)var_51_arg_0 << 12) | var_51_arg_1; [L291] var_51 = var_51 & mask_SORT_33 [L292] SORT_1 var_52_arg_0 = var_41; [L293] SORT_33 var_52_arg_1 = var_51; [L294] SORT_35 var_52 = ((SORT_35)var_52_arg_0 << 13) | var_52_arg_1; [L295] var_52 = var_52 & mask_SORT_35 [L296] SORT_1 var_53_arg_0 = var_41; [L297] SORT_35 var_53_arg_1 = var_52; [L298] SORT_37 var_53 = ((SORT_37)var_53_arg_0 << 14) | var_53_arg_1; [L299] var_53 = var_53 & mask_SORT_37 [L300] SORT_1 var_54_arg_0 = var_41; [L301] SORT_37 var_54_arg_1 = var_53; [L302] SORT_11 var_54 = ((SORT_11)var_54_arg_0 << 15) | var_54_arg_1; [L303] SORT_11 var_55_arg_0 = var_39; [L304] SORT_11 var_55_arg_1 = var_54; [L305] SORT_11 var_55 = var_55_arg_0 + var_55_arg_1; [L306] SORT_11 var_57_arg_0 = state_56; [L307] SORT_11 var_57 = -var_57_arg_0; [L308] SORT_1 var_59_arg_0 = state_58; [L309] SORT_11 var_59_arg_1 = var_57; [L310] SORT_11 var_59_arg_2 = state_56; [L311] SORT_11 var_59 = var_59_arg_0 ? var_59_arg_1 : var_59_arg_2; [L312] SORT_11 var_60_arg_0 = var_55; [L313] SORT_11 var_60_arg_1 = var_59; [L314] SORT_11 var_60 = var_60_arg_0 + var_60_arg_1; [L315] var_60 = var_60 & mask_SORT_11 [L316] SORT_11 var_61_arg_0 = var_60; [L317] SORT_1 var_61 = var_61_arg_0 >> 15; [L318] SORT_1 var_63_arg_0 = var_61; [L319] SORT_9 var_63_arg_1 = var_10; [L320] SORT_62 var_63 = ((SORT_62)var_63_arg_0 << 31) | var_63_arg_1; [L321] var_63 = var_63 & mask_SORT_62 [L322] SORT_11 var_106_arg_0 = var_60; [L323] SORT_1 var_106 = var_106_arg_0 >> 15; [L324] SORT_11 var_103_arg_0 = var_60; [L325] SORT_1 var_103 = var_103_arg_0 >> 15; [L326] SORT_11 var_100_arg_0 = var_60; [L327] SORT_1 var_100 = var_100_arg_0 >> 15; [L328] SORT_11 var_97_arg_0 = var_60; [L329] SORT_1 var_97 = var_97_arg_0 >> 15; [L330] SORT_11 var_94_arg_0 = var_60; [L331] SORT_1 var_94 = var_94_arg_0 >> 15; [L332] SORT_11 var_91_arg_0 = var_60; [L333] SORT_1 var_91 = var_91_arg_0 >> 15; [L334] SORT_11 var_88_arg_0 = var_60; [L335] SORT_1 var_88 = var_88_arg_0 >> 15; [L336] SORT_11 var_85_arg_0 = var_60; [L337] SORT_1 var_85 = var_85_arg_0 >> 15; [L338] SORT_11 var_82_arg_0 = var_60; [L339] SORT_1 var_82 = var_82_arg_0 >> 15; [L340] SORT_11 var_79_arg_0 = var_60; [L341] SORT_1 var_79 = var_79_arg_0 >> 15; [L342] SORT_11 var_76_arg_0 = var_60; [L343] SORT_1 var_76 = var_76_arg_0 >> 15; [L344] SORT_11 var_73_arg_0 = var_60; [L345] SORT_1 var_73 = var_73_arg_0 >> 15; [L346] SORT_11 var_70_arg_0 = var_60; [L347] SORT_1 var_70 = var_70_arg_0 >> 15; [L348] SORT_11 var_67_arg_0 = var_60; [L349] SORT_1 var_67 = var_67_arg_0 >> 15; [L350] SORT_11 var_64_arg_0 = var_60; [L351] SORT_1 var_64 = var_64_arg_0 >> 15; [L352] SORT_1 var_66_arg_0 = var_64; [L353] SORT_11 var_66_arg_1 = var_60; [L354] SORT_65 var_66 = ((SORT_65)var_66_arg_0 << 16) | var_66_arg_1; [L355] var_66 = var_66 & mask_SORT_65 [L356] SORT_1 var_69_arg_0 = var_67; [L357] SORT_65 var_69_arg_1 = var_66; [L358] SORT_68 var_69 = ((SORT_68)var_69_arg_0 << 17) | var_69_arg_1; [L359] var_69 = var_69 & mask_SORT_68 [L360] SORT_1 var_72_arg_0 = var_70; [L361] SORT_68 var_72_arg_1 = var_69; [L362] SORT_71 var_72 = ((SORT_71)var_72_arg_0 << 18) | var_72_arg_1; [L363] var_72 = var_72 & mask_SORT_71 [L364] SORT_1 var_75_arg_0 = var_73; [L365] SORT_71 var_75_arg_1 = var_72; [L366] SORT_74 var_75 = ((SORT_74)var_75_arg_0 << 19) | var_75_arg_1; [L367] var_75 = var_75 & mask_SORT_74 [L368] SORT_1 var_78_arg_0 = var_76; [L369] SORT_74 var_78_arg_1 = var_75; [L370] SORT_77 var_78 = ((SORT_77)var_78_arg_0 << 20) | var_78_arg_1; [L371] var_78 = var_78 & mask_SORT_77 [L372] SORT_1 var_81_arg_0 = var_79; [L373] SORT_77 var_81_arg_1 = var_78; [L374] SORT_80 var_81 = ((SORT_80)var_81_arg_0 << 21) | var_81_arg_1; [L375] var_81 = var_81 & mask_SORT_80 [L376] SORT_1 var_84_arg_0 = var_82; [L377] SORT_80 var_84_arg_1 = var_81; [L378] SORT_83 var_84 = ((SORT_83)var_84_arg_0 << 22) | var_84_arg_1; [L379] var_84 = var_84 & mask_SORT_83 [L380] SORT_1 var_87_arg_0 = var_85; [L381] SORT_83 var_87_arg_1 = var_84; [L382] SORT_86 var_87 = ((SORT_86)var_87_arg_0 << 23) | var_87_arg_1; [L383] var_87 = var_87 & mask_SORT_86 [L384] SORT_1 var_90_arg_0 = var_88; [L385] SORT_86 var_90_arg_1 = var_87; [L386] SORT_89 var_90 = ((SORT_89)var_90_arg_0 << 24) | var_90_arg_1; [L387] var_90 = var_90 & mask_SORT_89 [L388] SORT_1 var_93_arg_0 = var_91; [L389] SORT_89 var_93_arg_1 = var_90; [L390] SORT_92 var_93 = ((SORT_92)var_93_arg_0 << 25) | var_93_arg_1; [L391] var_93 = var_93 & mask_SORT_92 [L392] SORT_1 var_96_arg_0 = var_94; [L393] SORT_92 var_96_arg_1 = var_93; [L394] SORT_95 var_96 = ((SORT_95)var_96_arg_0 << 26) | var_96_arg_1; [L395] var_96 = var_96 & mask_SORT_95 [L396] SORT_1 var_99_arg_0 = var_97; [L397] SORT_95 var_99_arg_1 = var_96; [L398] SORT_98 var_99 = ((SORT_98)var_99_arg_0 << 27) | var_99_arg_1; [L399] var_99 = var_99 & mask_SORT_98 [L400] SORT_1 var_102_arg_0 = var_100; [L401] SORT_98 var_102_arg_1 = var_99; [L402] SORT_101 var_102 = ((SORT_101)var_102_arg_0 << 28) | var_102_arg_1; [L403] var_102 = var_102 & mask_SORT_101 [L404] SORT_1 var_105_arg_0 = var_103; [L405] SORT_101 var_105_arg_1 = var_102; [L406] SORT_104 var_105 = ((SORT_104)var_105_arg_0 << 29) | var_105_arg_1; [L407] var_105 = var_105 & mask_SORT_104 [L408] SORT_1 var_107_arg_0 = var_106; [L409] SORT_104 var_107_arg_1 = var_105; [L410] SORT_9 var_107 = ((SORT_9)var_107_arg_0 << 30) | var_107_arg_1; [L411] SORT_9 var_108_arg_0 = var_107; [L412] var_108_arg_0 = var_108_arg_0 & mask_SORT_9 [L413] SORT_62 var_108 = var_108_arg_0; [L414] SORT_62 var_109_arg_0 = var_63; [L415] SORT_62 var_109_arg_1 = var_108; [L416] SORT_1 var_109 = var_109_arg_0 <= var_109_arg_1; [L417] SORT_1 var_110_arg_0 = var_109; [L418] SORT_1 var_110_arg_1 = var_8; [L419] SORT_1 var_110_arg_2 = var_7; [L420] SORT_1 var_110 = var_110_arg_0 ? var_110_arg_1 : var_110_arg_2; [L421] var_110 = var_110 & mask_SORT_1 [L422] SORT_1 var_111_arg_0 = input_3; [L423] SORT_1 var_111_arg_1 = var_110; [L424] SORT_1 var_111 = var_111_arg_0 ^ var_111_arg_1; [L425] SORT_1 var_112_arg_0 = var_111; [L426] SORT_1 var_112 = ~var_112_arg_0; [L427] SORT_1 var_120_arg_0 = var_119; [L428] SORT_1 var_120_arg_1 = var_112; [L429] SORT_1 var_120_arg_2 = var_8; [L430] SORT_1 var_120 = var_120_arg_0 ? var_120_arg_1 : var_120_arg_2; [L431] SORT_1 var_121_arg_0 = var_120; [L432] SORT_1 var_121 = ~var_121_arg_0; [L433] SORT_1 var_122_arg_0 = var_120; [L434] SORT_1 var_122 = ~var_122_arg_0; [L435] SORT_1 var_123_arg_0 = var_121; [L436] SORT_1 var_123_arg_1 = var_122; [L437] SORT_1 var_123 = var_123_arg_0 & var_123_arg_1; [L438] var_123 = var_123 & mask_SORT_1 [L439] SORT_1 bad_124_arg_0 = var_123; [L440] CALL __VERIFIER_assert(!(bad_124_arg_0)) [L20] COND TRUE !(cond) [L20] reach_error() - StatisticsResult: Ultimate Automizer benchmark data CFG has 2 procedures, 19 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 299.5s, OverallIterations: 8, TraceHistogramMax: 14, PathProgramHistogramMax: 6, EmptinessCheckTime: 0.0s, AutomataDifference: 8.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 117 SdHoareTripleChecker+Valid, 7.1s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 105 mSDsluCounter, 723 SdHoareTripleChecker+Invalid, 6.7s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 552 mSDsCounter, 48 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 748 IncrementalHoareTripleChecker+Invalid, 796 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 48 mSolverCounterUnsat, 171 mSDtfsCounter, 748 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 1028 GetRequests, 955 SyntacticMatches, 10 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 98 ImplicationChecksByTransitivity, 3.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=56occurred in iteration=7, InterpolantAutomatonStates: 47, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 7 MinimizatonAttempts, 36 StatesRemovedByMinimization, 6 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 3.0s SsaConstructionTime, 59.3s SatisfiabilityAnalysisTime, 208.6s InterpolantComputationTime, 1071 NumberOfCodeBlocks, 1047 NumberOfCodeBlocksAsserted, 65 NumberOfCheckSat, 947 ConstructedInterpolants, 30 QuantifiedInterpolants, 17484 SizeOfPredicates, 685 NumberOfNonLiveVariables, 29422 ConjunctsInSsa, 1925 ConjunctsInUnsatCore, 17 InterpolantComputations, 2 PerfectInterpolantSequences, 1928/2618 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2022-11-23 16:16:31,354 WARN L435 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forcibly destroying the process [2022-11-23 16:16:31,475 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7d7cc764-51a7-4053-8283-c00624b53150/bin/utaipan-Q6hlc19bkW/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 137 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Result: UNKNOWN