./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.factorial4even.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 38b53e6a Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.factorial4even.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/config/svcomp-Reach-64bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 01e407ff37f0e05cc0af0c9add6c9f6be76650fc51d4c59f5df1e4bebb9e67d5 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-38b53e6 [2022-11-26 00:55:21,720 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-26 00:55:21,723 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-26 00:55:21,762 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-26 00:55:21,762 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-26 00:55:21,766 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-26 00:55:21,768 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-26 00:55:21,771 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-26 00:55:21,774 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-26 00:55:21,779 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-26 00:55:21,781 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-26 00:55:21,782 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-26 00:55:21,783 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-26 00:55:21,785 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-26 00:55:21,787 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-26 00:55:21,791 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-26 00:55:21,792 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-26 00:55:21,793 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-26 00:55:21,795 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-26 00:55:21,801 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-26 00:55:21,803 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-26 00:55:21,805 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-26 00:55:21,807 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-26 00:55:21,808 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-26 00:55:21,816 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-26 00:55:21,817 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-26 00:55:21,818 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-26 00:55:21,820 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-26 00:55:21,820 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-26 00:55:21,822 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-26 00:55:21,823 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-26 00:55:21,824 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-26 00:55:21,825 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-26 00:55:21,826 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-26 00:55:21,828 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-26 00:55:21,828 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-26 00:55:21,829 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-26 00:55:21,829 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-26 00:55:21,829 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-26 00:55:21,830 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-26 00:55:21,831 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-26 00:55:21,832 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/config/svcomp-Reach-64bit-Taipan_Default.epf [2022-11-26 00:55:21,870 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-26 00:55:21,871 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-26 00:55:21,871 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-26 00:55:21,872 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-26 00:55:21,873 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-26 00:55:21,873 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-26 00:55:21,873 INFO L138 SettingsManager]: * User list type=DISABLED [2022-11-26 00:55:21,873 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-11-26 00:55:21,874 INFO L138 SettingsManager]: * Explicit value domain=true [2022-11-26 00:55:21,874 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2022-11-26 00:55:21,875 INFO L138 SettingsManager]: * Octagon Domain=false [2022-11-26 00:55:21,875 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-11-26 00:55:21,876 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2022-11-26 00:55:21,876 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2022-11-26 00:55:21,876 INFO L138 SettingsManager]: * Interval Domain=false [2022-11-26 00:55:21,877 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2022-11-26 00:55:21,877 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2022-11-26 00:55:21,877 INFO L138 SettingsManager]: * Simplification Technique=POLY_PAC [2022-11-26 00:55:21,878 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-26 00:55:21,878 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-26 00:55:21,878 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-26 00:55:21,879 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-26 00:55:21,879 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-26 00:55:21,879 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-26 00:55:21,880 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-26 00:55:21,880 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-26 00:55:21,881 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-26 00:55:21,881 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-26 00:55:21,881 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-26 00:55:21,881 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-26 00:55:21,882 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-26 00:55:21,882 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2022-11-26 00:55:21,882 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-26 00:55:21,883 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-26 00:55:21,883 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2022-11-26 00:55:21,883 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-11-26 00:55:21,884 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-26 00:55:21,884 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-11-26 00:55:21,884 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 01e407ff37f0e05cc0af0c9add6c9f6be76650fc51d4c59f5df1e4bebb9e67d5 [2022-11-26 00:55:22,198 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-26 00:55:22,237 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-26 00:55:22,239 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-26 00:55:22,241 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-26 00:55:22,241 INFO L275 PluginConnector]: CDTParser initialized [2022-11-26 00:55:22,242 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.factorial4even.c [2022-11-26 00:55:25,293 INFO L500 CDTParser]: Created temporary CDT project at NULL [2022-11-26 00:55:25,518 INFO L351 CDTParser]: Found 1 translation units. [2022-11-26 00:55:25,518 INFO L172 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.factorial4even.c [2022-11-26 00:55:25,524 INFO L394 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/data/f2d0f20aa/5206f865cc5c4c668686f906a7e38e62/FLAGd989b99d8 [2022-11-26 00:55:25,540 INFO L402 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/data/f2d0f20aa/5206f865cc5c4c668686f906a7e38e62 [2022-11-26 00:55:25,543 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-26 00:55:25,545 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-26 00:55:25,548 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-26 00:55:25,548 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-26 00:55:25,552 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-26 00:55:25,553 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 12:55:25" (1/1) ... [2022-11-26 00:55:25,554 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4d2b2621 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:55:25, skipping insertion in model container [2022-11-26 00:55:25,555 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 12:55:25" (1/1) ... [2022-11-26 00:55:25,562 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-26 00:55:25,586 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-26 00:55:25,731 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.factorial4even.c[1292,1305] [2022-11-26 00:55:25,778 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-26 00:55:25,787 INFO L203 MainTranslator]: Completed pre-run [2022-11-26 00:55:25,803 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.factorial4even.c[1292,1305] [2022-11-26 00:55:25,823 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-26 00:55:25,836 INFO L208 MainTranslator]: Completed translation [2022-11-26 00:55:25,836 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:55:25 WrapperNode [2022-11-26 00:55:25,836 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-26 00:55:25,837 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-26 00:55:25,837 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-26 00:55:25,838 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-26 00:55:25,845 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:55:25" (1/1) ... [2022-11-26 00:55:25,851 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:55:25" (1/1) ... [2022-11-26 00:55:25,872 INFO L138 Inliner]: procedures = 11, calls = 4, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 50 [2022-11-26 00:55:25,872 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-26 00:55:25,873 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-26 00:55:25,873 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-26 00:55:25,874 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-26 00:55:25,883 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:55:25" (1/1) ... [2022-11-26 00:55:25,883 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:55:25" (1/1) ... [2022-11-26 00:55:25,885 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:55:25" (1/1) ... [2022-11-26 00:55:25,885 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:55:25" (1/1) ... [2022-11-26 00:55:25,889 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:55:25" (1/1) ... [2022-11-26 00:55:25,892 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:55:25" (1/1) ... [2022-11-26 00:55:25,893 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:55:25" (1/1) ... [2022-11-26 00:55:25,894 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:55:25" (1/1) ... [2022-11-26 00:55:25,898 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-26 00:55:25,901 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-26 00:55:25,902 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-26 00:55:25,902 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-26 00:55:25,905 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:55:25" (1/1) ... [2022-11-26 00:55:25,912 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-26 00:55:25,924 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/z3 [2022-11-26 00:55:25,939 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-26 00:55:25,953 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-26 00:55:25,977 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-26 00:55:25,977 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-26 00:55:25,977 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-11-26 00:55:25,977 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-11-26 00:55:26,043 INFO L235 CfgBuilder]: Building ICFG [2022-11-26 00:55:26,045 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-26 00:55:26,208 INFO L276 CfgBuilder]: Performing block encoding [2022-11-26 00:55:26,233 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-26 00:55:26,234 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-26 00:55:26,245 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 12:55:26 BoogieIcfgContainer [2022-11-26 00:55:26,245 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-26 00:55:26,249 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-26 00:55:26,249 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-26 00:55:26,253 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-26 00:55:26,253 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 26.11 12:55:25" (1/3) ... [2022-11-26 00:55:26,254 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@72d39865 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 26.11 12:55:26, skipping insertion in model container [2022-11-26 00:55:26,254 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:55:25" (2/3) ... [2022-11-26 00:55:26,257 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@72d39865 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 26.11 12:55:26, skipping insertion in model container [2022-11-26 00:55:26,257 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 12:55:26" (3/3) ... [2022-11-26 00:55:26,259 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.factorial4even.c [2022-11-26 00:55:26,279 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-26 00:55:26,279 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-26 00:55:26,346 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-26 00:55:26,354 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@4287870d, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-26 00:55:26,355 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-26 00:55:26,359 INFO L276 IsEmpty]: Start isEmpty. Operand has 13 states, 8 states have (on average 1.375) internal successors, (11), 9 states have internal predecessors, (11), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-26 00:55:26,366 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 7 [2022-11-26 00:55:26,366 INFO L187 NwaCegarLoop]: Found error trace [2022-11-26 00:55:26,367 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1] [2022-11-26 00:55:26,368 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-26 00:55:26,378 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-26 00:55:26,378 INFO L85 PathProgramCache]: Analyzing trace with hash 2014311611, now seen corresponding path program 1 times [2022-11-26 00:55:26,388 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-26 00:55:26,388 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [727943372] [2022-11-26 00:55:26,389 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-26 00:55:26,389 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-26 00:55:26,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-26 00:55:27,052 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-26 00:55:27,052 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-26 00:55:27,053 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [727943372] [2022-11-26 00:55:27,053 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [727943372] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-26 00:55:27,054 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-26 00:55:27,054 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-26 00:55:27,055 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1708698319] [2022-11-26 00:55:27,056 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-26 00:55:27,060 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-26 00:55:27,060 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-26 00:55:27,107 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-26 00:55:27,109 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-11-26 00:55:27,111 INFO L87 Difference]: Start difference. First operand has 13 states, 8 states have (on average 1.375) internal successors, (11), 9 states have internal predecessors, (11), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand has 6 states, 5 states have (on average 1.0) internal successors, (5), 4 states have internal predecessors, (5), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-26 00:55:27,288 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-26 00:55:27,289 INFO L93 Difference]: Finished difference Result 34 states and 47 transitions. [2022-11-26 00:55:27,291 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-26 00:55:27,292 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 1.0) internal successors, (5), 4 states have internal predecessors, (5), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 6 [2022-11-26 00:55:27,293 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-26 00:55:27,304 INFO L225 Difference]: With dead ends: 34 [2022-11-26 00:55:27,305 INFO L226 Difference]: Without dead ends: 22 [2022-11-26 00:55:27,308 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-11-26 00:55:27,314 INFO L413 NwaCegarLoop]: 9 mSDtfsCounter, 10 mSDsluCounter, 28 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 10 SdHoareTripleChecker+Valid, 37 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-26 00:55:27,316 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [10 Valid, 37 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-26 00:55:27,333 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2022-11-26 00:55:27,359 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 18. [2022-11-26 00:55:27,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 12 states have (on average 1.0833333333333333) internal successors, (13), 13 states have internal predecessors, (13), 3 states have call successors, (3), 2 states have call predecessors, (3), 2 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-26 00:55:27,363 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 19 transitions. [2022-11-26 00:55:27,365 INFO L78 Accepts]: Start accepts. Automaton has 18 states and 19 transitions. Word has length 6 [2022-11-26 00:55:27,366 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-26 00:55:27,366 INFO L495 AbstractCegarLoop]: Abstraction has 18 states and 19 transitions. [2022-11-26 00:55:27,367 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 1.0) internal successors, (5), 4 states have internal predecessors, (5), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-26 00:55:27,367 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 19 transitions. [2022-11-26 00:55:27,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2022-11-26 00:55:27,369 INFO L187 NwaCegarLoop]: Found error trace [2022-11-26 00:55:27,369 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-26 00:55:27,370 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-11-26 00:55:27,370 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-26 00:55:27,371 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-26 00:55:27,371 INFO L85 PathProgramCache]: Analyzing trace with hash 1372500953, now seen corresponding path program 1 times [2022-11-26 00:55:27,372 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-26 00:55:27,373 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2132897777] [2022-11-26 00:55:27,374 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-26 00:55:27,374 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-26 00:55:27,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-26 00:55:27,975 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-26 00:55:27,975 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-26 00:55:27,975 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2132897777] [2022-11-26 00:55:27,976 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2132897777] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-26 00:55:27,976 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-26 00:55:27,976 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-11-26 00:55:27,976 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1555382057] [2022-11-26 00:55:27,977 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-26 00:55:27,978 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-26 00:55:27,978 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-26 00:55:27,979 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-26 00:55:27,979 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-11-26 00:55:27,980 INFO L87 Difference]: Start difference. First operand 18 states and 19 transitions. Second operand has 6 states, 5 states have (on average 1.8) internal successors, (9), 5 states have internal predecessors, (9), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-11-26 00:55:28,096 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-26 00:55:28,096 INFO L93 Difference]: Finished difference Result 30 states and 32 transitions. [2022-11-26 00:55:28,097 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-26 00:55:28,097 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 1.8) internal successors, (9), 5 states have internal predecessors, (9), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 12 [2022-11-26 00:55:28,098 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-26 00:55:28,099 INFO L225 Difference]: With dead ends: 30 [2022-11-26 00:55:28,099 INFO L226 Difference]: Without dead ends: 28 [2022-11-26 00:55:28,099 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-11-26 00:55:28,101 INFO L413 NwaCegarLoop]: 15 mSDtfsCounter, 7 mSDsluCounter, 42 mSDsCounter, 0 mSdLazyCounter, 36 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 8 SdHoareTripleChecker+Valid, 57 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 36 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-26 00:55:28,101 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [8 Valid, 57 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 36 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-26 00:55:28,102 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2022-11-26 00:55:28,108 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 24. [2022-11-26 00:55:28,108 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 16 states have (on average 1.0625) internal successors, (17), 17 states have internal predecessors, (17), 4 states have call successors, (4), 3 states have call predecessors, (4), 3 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-11-26 00:55:28,109 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 25 transitions. [2022-11-26 00:55:28,109 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 25 transitions. Word has length 12 [2022-11-26 00:55:28,110 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-26 00:55:28,110 INFO L495 AbstractCegarLoop]: Abstraction has 24 states and 25 transitions. [2022-11-26 00:55:28,110 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 1.8) internal successors, (9), 5 states have internal predecessors, (9), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-11-26 00:55:28,110 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 25 transitions. [2022-11-26 00:55:28,111 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-11-26 00:55:28,111 INFO L187 NwaCegarLoop]: Found error trace [2022-11-26 00:55:28,111 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-26 00:55:28,111 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-11-26 00:55:28,112 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-26 00:55:28,112 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-26 00:55:28,112 INFO L85 PathProgramCache]: Analyzing trace with hash -718003265, now seen corresponding path program 1 times [2022-11-26 00:55:28,112 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-26 00:55:28,113 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1430552247] [2022-11-26 00:55:28,113 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-26 00:55:28,113 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-26 00:55:28,138 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-26 00:55:28,138 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [918308783] [2022-11-26 00:55:28,138 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-26 00:55:28,138 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-26 00:55:28,139 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/z3 [2022-11-26 00:55:28,148 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-26 00:55:28,176 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-11-26 00:55:28,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-26 00:55:28,310 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-26 00:55:28,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-26 00:55:28,379 INFO L130 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2022-11-26 00:55:28,380 INFO L360 BasicCegarLoop]: Counterexample is feasible [2022-11-26 00:55:28,381 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-11-26 00:55:28,389 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-11-26 00:55:28,582 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-26 00:55:28,586 INFO L445 BasicCegarLoop]: Path program histogram: [1, 1, 1] [2022-11-26 00:55:28,589 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-26 00:55:28,610 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-26 00:55:28,610 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-26 00:55:28,617 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 26.11 12:55:28 BoogieIcfgContainer [2022-11-26 00:55:28,617 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-26 00:55:28,618 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-26 00:55:28,618 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-26 00:55:28,618 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-26 00:55:28,619 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 12:55:26" (3/4) ... [2022-11-26 00:55:28,622 INFO L140 WitnessPrinter]: No result that supports witness generation found [2022-11-26 00:55:28,622 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-26 00:55:28,623 INFO L158 Benchmark]: Toolchain (without parser) took 3077.65ms. Allocated memory is still 184.5MB. Free memory was 141.5MB in the beginning and 139.7MB in the end (delta: 1.8MB). Peak memory consumption was 3.3MB. Max. memory is 16.1GB. [2022-11-26 00:55:28,623 INFO L158 Benchmark]: CDTParser took 0.26ms. Allocated memory is still 121.6MB. Free memory was 88.1MB in the beginning and 88.0MB in the end (delta: 26.8kB). There was no memory consumed. Max. memory is 16.1GB. [2022-11-26 00:55:28,624 INFO L158 Benchmark]: CACSL2BoogieTranslator took 288.61ms. Allocated memory is still 184.5MB. Free memory was 141.5MB in the beginning and 130.9MB in the end (delta: 10.6MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. [2022-11-26 00:55:28,625 INFO L158 Benchmark]: Boogie Procedure Inliner took 35.18ms. Allocated memory is still 184.5MB. Free memory was 130.9MB in the beginning and 129.4MB in the end (delta: 1.4MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-11-26 00:55:28,625 INFO L158 Benchmark]: Boogie Preprocessor took 25.20ms. Allocated memory is still 184.5MB. Free memory was 129.4MB in the beginning and 128.4MB in the end (delta: 1.1MB). There was no memory consumed. Max. memory is 16.1GB. [2022-11-26 00:55:28,626 INFO L158 Benchmark]: RCFGBuilder took 344.48ms. Allocated memory is still 184.5MB. Free memory was 127.8MB in the beginning and 116.3MB in the end (delta: 11.5MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. [2022-11-26 00:55:28,626 INFO L158 Benchmark]: TraceAbstraction took 2368.45ms. Allocated memory is still 184.5MB. Free memory was 115.8MB in the beginning and 140.7MB in the end (delta: -24.9MB). There was no memory consumed. Max. memory is 16.1GB. [2022-11-26 00:55:28,626 INFO L158 Benchmark]: Witness Printer took 4.22ms. Allocated memory is still 184.5MB. Free memory was 140.7MB in the beginning and 139.7MB in the end (delta: 1.0MB). There was no memory consumed. Max. memory is 16.1GB. [2022-11-26 00:55:28,629 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.26ms. Allocated memory is still 121.6MB. Free memory was 88.1MB in the beginning and 88.0MB in the end (delta: 26.8kB). There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 288.61ms. Allocated memory is still 184.5MB. Free memory was 141.5MB in the beginning and 130.9MB in the end (delta: 10.6MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 35.18ms. Allocated memory is still 184.5MB. Free memory was 130.9MB in the beginning and 129.4MB in the end (delta: 1.4MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * Boogie Preprocessor took 25.20ms. Allocated memory is still 184.5MB. Free memory was 129.4MB in the beginning and 128.4MB in the end (delta: 1.1MB). There was no memory consumed. Max. memory is 16.1GB. * RCFGBuilder took 344.48ms. Allocated memory is still 184.5MB. Free memory was 127.8MB in the beginning and 116.3MB in the end (delta: 11.5MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. * TraceAbstraction took 2368.45ms. Allocated memory is still 184.5MB. Free memory was 115.8MB in the beginning and 140.7MB in the end (delta: -24.9MB). There was no memory consumed. Max. memory is 16.1GB. * Witness Printer took 4.22ms. Allocated memory is still 184.5MB. Free memory was 140.7MB in the beginning and 139.7MB in the end (delta: 1.0MB). There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 28]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: overapproximation of bitwiseAnd at line 75. Possible FailurePath: [L33] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 4); [L34] const SORT_1 msb_SORT_1 = (SORT_1)1 << (4 - 1); [L36] const SORT_12 mask_SORT_12 = (SORT_12)-1 >> (sizeof(SORT_12) * 8 - 1); [L37] const SORT_12 msb_SORT_12 = (SORT_12)1 << (1 - 1); [L39] const SORT_1 var_2 = 1; [L40] const SORT_1 var_11 = mask_SORT_1; [L41] const SORT_1 var_16 = 3; [L44] SORT_1 state_3 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L45] SORT_1 state_4 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L47] SORT_1 init_5_arg_1 = var_2; [L48] state_3 = init_5_arg_1 [L49] SORT_1 init_6_arg_1 = var_2; [L50] state_4 = init_6_arg_1 VAL [init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, state_3=1, state_4=1, var_11=15, var_16=3, var_2=1] [L55] SORT_1 var_13_arg_0 = state_4; [L56] SORT_1 var_13_arg_1 = var_11; [L57] SORT_12 var_13 = var_13_arg_0 == var_13_arg_1; [L58] SORT_12 bad_14_arg_0 = var_13; VAL [bad_14_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, state_3=1, state_4=1, var_11=15, var_13=0, var_13_arg_0=1, var_13_arg_1=15, var_16=3, var_2=1] [L59] CALL __VERIFIER_assert(!(bad_14_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L59] RET __VERIFIER_assert(!(bad_14_arg_0)) VAL [bad_14_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, state_3=1, state_4=1, var_11=15, var_13=0, var_13_arg_0=1, var_13_arg_1=15, var_16=3, var_2=1] [L60] SORT_1 var_17_arg_0 = state_4; [L61] SORT_1 var_17_arg_1 = var_16; [L62] SORT_12 var_17 = var_17_arg_0 > var_17_arg_1; [L63] SORT_1 var_15_arg_0 = state_3; [L64] SORT_12 var_15 = var_15_arg_0 >> 0; [L65] SORT_12 var_18_arg_0 = var_17; [L66] SORT_12 var_18_arg_1 = var_15; [L67] SORT_12 var_18 = var_18_arg_0 & var_18_arg_1; [L68] var_18 = var_18 & mask_SORT_12 [L69] SORT_12 bad_19_arg_0 = var_18; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, state_3=1, state_4=1, var_11=15, var_13=0, var_13_arg_0=1, var_13_arg_1=15, var_15=1, var_15_arg_0=1, var_16=3, var_17=0, var_17_arg_0=1, var_17_arg_1=3, var_18=0, var_18_arg_0=0, var_18_arg_1=1, var_2=1] [L70] CALL __VERIFIER_assert(!(bad_19_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L70] RET __VERIFIER_assert(!(bad_19_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, state_3=1, state_4=1, var_11=15, var_13=0, var_13_arg_0=1, var_13_arg_1=15, var_15=1, var_15_arg_0=1, var_16=3, var_17=0, var_17_arg_0=1, var_17_arg_1=3, var_18=0, var_18_arg_0=0, var_18_arg_1=1, var_2=1] [L72] SORT_1 var_7_arg_0 = state_4; [L73] SORT_1 var_7_arg_1 = var_2; [L74] SORT_1 var_7 = var_7_arg_0 + var_7_arg_1; [L75] var_7 = var_7 & mask_SORT_1 [L76] SORT_1 next_9_arg_1 = var_7; [L77] SORT_1 var_8_arg_0 = state_3; [L78] SORT_1 var_8_arg_1 = state_4; [L79] SORT_1 var_8 = var_8_arg_0 * var_8_arg_1; [L80] SORT_1 next_10_arg_1 = var_8; [L82] state_4 = next_9_arg_1 [L83] state_3 = next_10_arg_1 VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=1, next_9_arg_1=15, state_3=1, state_4=15, var_11=15, var_13=0, var_13_arg_0=1, var_13_arg_1=15, var_15=1, var_15_arg_0=1, var_16=3, var_17=0, var_17_arg_0=1, var_17_arg_1=3, var_18=0, var_18_arg_0=0, var_18_arg_1=1, var_2=1, var_7=15, var_7_arg_0=1, var_7_arg_1=1, var_8=1, var_8_arg_0=1, var_8_arg_1=1] [L55] SORT_1 var_13_arg_0 = state_4; [L56] SORT_1 var_13_arg_1 = var_11; [L57] SORT_12 var_13 = var_13_arg_0 == var_13_arg_1; [L58] SORT_12 bad_14_arg_0 = var_13; VAL [bad_14_arg_0=1, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=1, next_9_arg_1=15, state_3=1, state_4=15, var_11=15, var_13=1, var_13_arg_0=15, var_13_arg_1=15, var_15=1, var_15_arg_0=1, var_16=3, var_17=0, var_17_arg_0=1, var_17_arg_1=3, var_18=0, var_18_arg_0=0, var_18_arg_1=1, var_2=1, var_7=15, var_7_arg_0=1, var_7_arg_1=1, var_8=1, var_8_arg_0=1, var_8_arg_1=1] [L59] CALL __VERIFIER_assert(!(bad_14_arg_0)) VAL [\old(cond)=0] [L28] COND TRUE !(cond) VAL [\old(cond)=0, cond=0] [L28] reach_error() VAL [\old(cond)=0, cond=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 2 procedures, 13 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 2.3s, OverallIterations: 3, TraceHistogramMax: 3, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 0.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 18 SdHoareTripleChecker+Valid, 0.1s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 17 mSDsluCounter, 94 SdHoareTripleChecker+Invalid, 0.1s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 70 mSDsCounter, 8 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 70 IncrementalHoareTripleChecker+Invalid, 78 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 8 mSolverCounterUnsat, 24 mSDtfsCounter, 70 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=24occurred in iteration=2, InterpolantAutomatonStates: 16, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 2 MinimizatonAttempts, 8 StatesRemovedByMinimization, 2 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.0s InterpolantComputationTime, 37 NumberOfCodeBlocks, 37 NumberOfCodeBlocksAsserted, 3 NumberOfCheckSat, 16 ConstructedInterpolants, 0 QuantifiedInterpolants, 92 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 2 InterpolantComputations, 2 PerfectInterpolantSequences, 2/2 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2022-11-26 00:55:28,660 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.factorial4even.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/config/svcomp-Reach-64bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 01e407ff37f0e05cc0af0c9add6c9f6be76650fc51d4c59f5df1e4bebb9e67d5 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-38b53e6 [2022-11-26 00:55:30,949 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-26 00:55:30,952 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-26 00:55:31,010 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-26 00:55:31,011 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-26 00:55:31,014 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-26 00:55:31,017 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-26 00:55:31,020 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-26 00:55:31,022 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-26 00:55:31,027 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-26 00:55:31,028 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-26 00:55:31,031 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-26 00:55:31,031 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-26 00:55:31,034 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-26 00:55:31,035 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-26 00:55:31,041 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-26 00:55:31,042 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-26 00:55:31,043 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-26 00:55:31,045 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-26 00:55:31,046 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-26 00:55:31,048 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-26 00:55:31,051 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-26 00:55:31,052 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-26 00:55:31,053 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-26 00:55:31,065 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-26 00:55:31,066 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-26 00:55:31,066 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-26 00:55:31,068 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-26 00:55:31,068 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-26 00:55:31,069 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-26 00:55:31,070 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-26 00:55:31,071 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-26 00:55:31,073 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-26 00:55:31,073 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-26 00:55:31,074 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-26 00:55:31,075 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-26 00:55:31,075 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-26 00:55:31,076 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-26 00:55:31,076 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-26 00:55:31,077 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-26 00:55:31,077 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-26 00:55:31,078 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/config/svcomp-Reach-64bit-Taipan_Bitvector.epf [2022-11-26 00:55:31,116 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-26 00:55:31,116 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-26 00:55:31,118 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-26 00:55:31,118 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-26 00:55:31,119 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-26 00:55:31,119 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-26 00:55:31,120 INFO L138 SettingsManager]: * User list type=DISABLED [2022-11-26 00:55:31,120 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-11-26 00:55:31,120 INFO L138 SettingsManager]: * Explicit value domain=true [2022-11-26 00:55:31,120 INFO L138 SettingsManager]: * Octagon Domain=false [2022-11-26 00:55:31,121 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-11-26 00:55:31,122 INFO L138 SettingsManager]: * Interval Domain=false [2022-11-26 00:55:31,122 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-26 00:55:31,123 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-26 00:55:31,123 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-26 00:55:31,123 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-26 00:55:31,123 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-26 00:55:31,124 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-11-26 00:55:31,124 INFO L138 SettingsManager]: * Use bitvectors instead of ints=true [2022-11-26 00:55:31,124 INFO L138 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2022-11-26 00:55:31,124 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-26 00:55:31,125 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-26 00:55:31,125 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-26 00:55:31,125 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-26 00:55:31,125 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-26 00:55:31,126 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-26 00:55:31,126 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-26 00:55:31,126 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-26 00:55:31,126 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-26 00:55:31,127 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-26 00:55:31,127 INFO L138 SettingsManager]: * Trace refinement strategy=WALRUS [2022-11-26 00:55:31,127 INFO L138 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2022-11-26 00:55:31,128 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-26 00:55:31,128 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-11-26 00:55:31,128 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-11-26 00:55:31,128 INFO L138 SettingsManager]: * Logic for external solver=AUFBV WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 01e407ff37f0e05cc0af0c9add6c9f6be76650fc51d4c59f5df1e4bebb9e67d5 [2022-11-26 00:55:31,577 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-26 00:55:31,600 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-26 00:55:31,603 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-26 00:55:31,604 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-26 00:55:31,605 INFO L275 PluginConnector]: CDTParser initialized [2022-11-26 00:55:31,607 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.factorial4even.c [2022-11-26 00:55:34,721 INFO L500 CDTParser]: Created temporary CDT project at NULL [2022-11-26 00:55:34,970 INFO L351 CDTParser]: Found 1 translation units. [2022-11-26 00:55:34,972 INFO L172 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.factorial4even.c [2022-11-26 00:55:34,984 INFO L394 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/data/cf1120772/90ca46c5d2154109abc97bc64be1d1f1/FLAG22f86d41b [2022-11-26 00:55:34,998 INFO L402 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/data/cf1120772/90ca46c5d2154109abc97bc64be1d1f1 [2022-11-26 00:55:35,000 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-26 00:55:35,001 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-26 00:55:35,003 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-26 00:55:35,003 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-26 00:55:35,006 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-26 00:55:35,007 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 12:55:34" (1/1) ... [2022-11-26 00:55:35,008 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1477553f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:55:35, skipping insertion in model container [2022-11-26 00:55:35,008 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 12:55:34" (1/1) ... [2022-11-26 00:55:35,016 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-26 00:55:35,033 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-26 00:55:35,180 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.factorial4even.c[1292,1305] [2022-11-26 00:55:35,215 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-26 00:55:35,224 INFO L203 MainTranslator]: Completed pre-run [2022-11-26 00:55:35,238 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.factorial4even.c[1292,1305] [2022-11-26 00:55:35,267 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-26 00:55:35,284 INFO L208 MainTranslator]: Completed translation [2022-11-26 00:55:35,285 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:55:35 WrapperNode [2022-11-26 00:55:35,285 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-26 00:55:35,286 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-26 00:55:35,286 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-26 00:55:35,287 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-26 00:55:35,294 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:55:35" (1/1) ... [2022-11-26 00:55:35,302 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:55:35" (1/1) ... [2022-11-26 00:55:35,328 INFO L138 Inliner]: procedures = 11, calls = 4, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 50 [2022-11-26 00:55:35,328 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-26 00:55:35,330 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-26 00:55:35,330 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-26 00:55:35,330 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-26 00:55:35,339 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:55:35" (1/1) ... [2022-11-26 00:55:35,340 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:55:35" (1/1) ... [2022-11-26 00:55:35,353 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:55:35" (1/1) ... [2022-11-26 00:55:35,354 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:55:35" (1/1) ... [2022-11-26 00:55:35,357 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:55:35" (1/1) ... [2022-11-26 00:55:35,361 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:55:35" (1/1) ... [2022-11-26 00:55:35,362 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:55:35" (1/1) ... [2022-11-26 00:55:35,363 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:55:35" (1/1) ... [2022-11-26 00:55:35,373 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-26 00:55:35,375 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-26 00:55:35,375 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-26 00:55:35,375 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-26 00:55:35,378 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:55:35" (1/1) ... [2022-11-26 00:55:35,384 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-26 00:55:35,398 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/z3 [2022-11-26 00:55:35,414 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-26 00:55:35,444 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-26 00:55:35,472 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-26 00:55:35,473 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-26 00:55:35,473 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-11-26 00:55:35,473 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-11-26 00:55:35,558 INFO L235 CfgBuilder]: Building ICFG [2022-11-26 00:55:35,561 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-26 00:55:35,825 INFO L276 CfgBuilder]: Performing block encoding [2022-11-26 00:55:35,832 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-26 00:55:35,832 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-26 00:55:35,834 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 12:55:35 BoogieIcfgContainer [2022-11-26 00:55:35,834 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-26 00:55:35,836 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-26 00:55:35,852 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-26 00:55:35,855 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-26 00:55:35,855 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 26.11 12:55:34" (1/3) ... [2022-11-26 00:55:35,856 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1f1975c3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 26.11 12:55:35, skipping insertion in model container [2022-11-26 00:55:35,856 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:55:35" (2/3) ... [2022-11-26 00:55:35,857 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1f1975c3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 26.11 12:55:35, skipping insertion in model container [2022-11-26 00:55:35,857 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 12:55:35" (3/3) ... [2022-11-26 00:55:35,858 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.factorial4even.c [2022-11-26 00:55:35,897 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-26 00:55:35,898 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-26 00:55:35,988 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-26 00:55:35,997 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@2a98a30, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-26 00:55:35,998 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-26 00:55:36,003 INFO L276 IsEmpty]: Start isEmpty. Operand has 17 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 13 states have internal predecessors, (16), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-26 00:55:36,012 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2022-11-26 00:55:36,012 INFO L187 NwaCegarLoop]: Found error trace [2022-11-26 00:55:36,013 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-26 00:55:36,013 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-26 00:55:36,026 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-26 00:55:36,027 INFO L85 PathProgramCache]: Analyzing trace with hash 1810339678, now seen corresponding path program 1 times [2022-11-26 00:55:36,040 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-26 00:55:36,041 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1613278225] [2022-11-26 00:55:36,041 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-26 00:55:36,041 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-26 00:55:36,042 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/mathsat [2022-11-26 00:55:36,052 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-26 00:55:36,080 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (2)] Waiting until timeout for monitored process [2022-11-26 00:55:36,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-26 00:55:36,148 WARN L261 TraceCheckSpWp]: Trace formula consists of 24 conjuncts, 12 conjunts are in the unsatisfiable core [2022-11-26 00:55:36,154 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-26 00:55:36,339 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-26 00:55:36,340 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-26 00:55:36,341 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-26 00:55:36,341 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1613278225] [2022-11-26 00:55:36,342 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1613278225] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-26 00:55:36,342 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-26 00:55:36,343 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-11-26 00:55:36,344 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [962402996] [2022-11-26 00:55:36,345 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-26 00:55:36,349 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-26 00:55:36,350 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-26 00:55:36,376 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-26 00:55:36,377 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-11-26 00:55:36,379 INFO L87 Difference]: Start difference. First operand has 17 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 13 states have internal predecessors, (16), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand has 6 states, 5 states have (on average 1.2) internal successors, (6), 5 states have internal predecessors, (6), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-26 00:55:36,486 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-26 00:55:36,486 INFO L93 Difference]: Finished difference Result 38 states and 55 transitions. [2022-11-26 00:55:36,488 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-26 00:55:36,489 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 1.2) internal successors, (6), 5 states have internal predecessors, (6), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 7 [2022-11-26 00:55:36,489 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-26 00:55:36,496 INFO L225 Difference]: With dead ends: 38 [2022-11-26 00:55:36,497 INFO L226 Difference]: Without dead ends: 23 [2022-11-26 00:55:36,500 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-11-26 00:55:36,503 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 9 mSDsluCounter, 35 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 9 SdHoareTripleChecker+Valid, 46 SdHoareTripleChecker+Invalid, 36 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-26 00:55:36,504 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [9 Valid, 46 Invalid, 36 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-26 00:55:36,521 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2022-11-26 00:55:36,547 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 19. [2022-11-26 00:55:36,549 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 13 states have (on average 1.0769230769230769) internal successors, (14), 14 states have internal predecessors, (14), 3 states have call successors, (3), 2 states have call predecessors, (3), 2 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-26 00:55:36,550 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 20 transitions. [2022-11-26 00:55:36,551 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 20 transitions. Word has length 7 [2022-11-26 00:55:36,552 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-26 00:55:36,552 INFO L495 AbstractCegarLoop]: Abstraction has 19 states and 20 transitions. [2022-11-26 00:55:36,552 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 1.2) internal successors, (6), 5 states have internal predecessors, (6), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-26 00:55:36,552 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 20 transitions. [2022-11-26 00:55:36,553 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2022-11-26 00:55:36,553 INFO L187 NwaCegarLoop]: Found error trace [2022-11-26 00:55:36,553 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-26 00:55:36,570 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (2)] Forceful destruction successful, exit code 0 [2022-11-26 00:55:36,764 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-26 00:55:36,765 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-26 00:55:36,766 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-26 00:55:36,766 INFO L85 PathProgramCache]: Analyzing trace with hash 679252028, now seen corresponding path program 1 times [2022-11-26 00:55:36,766 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-26 00:55:36,767 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1837300500] [2022-11-26 00:55:36,767 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-26 00:55:36,767 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-26 00:55:36,767 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/mathsat [2022-11-26 00:55:36,768 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-26 00:55:36,772 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (3)] Waiting until timeout for monitored process [2022-11-26 00:55:36,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-26 00:55:36,819 INFO L263 TraceCheckSpWp]: Trace formula consists of 40 conjuncts, 14 conjunts are in the unsatisfiable core [2022-11-26 00:55:36,821 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-26 00:55:36,911 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-26 00:55:36,911 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-26 00:55:36,911 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-26 00:55:36,912 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1837300500] [2022-11-26 00:55:36,912 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1837300500] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-26 00:55:36,912 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-26 00:55:36,912 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-11-26 00:55:36,912 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1065729982] [2022-11-26 00:55:36,913 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-26 00:55:36,914 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-26 00:55:36,914 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-26 00:55:36,915 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-26 00:55:36,915 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-11-26 00:55:36,916 INFO L87 Difference]: Start difference. First operand 19 states and 20 transitions. Second operand has 6 states, 5 states have (on average 2.0) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-11-26 00:55:36,991 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-26 00:55:36,991 INFO L93 Difference]: Finished difference Result 31 states and 33 transitions. [2022-11-26 00:55:36,991 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-26 00:55:36,991 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 2.0) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 13 [2022-11-26 00:55:36,992 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-26 00:55:36,992 INFO L225 Difference]: With dead ends: 31 [2022-11-26 00:55:36,993 INFO L226 Difference]: Without dead ends: 29 [2022-11-26 00:55:36,993 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-11-26 00:55:36,994 INFO L413 NwaCegarLoop]: 17 mSDtfsCounter, 8 mSDsluCounter, 49 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 9 SdHoareTripleChecker+Valid, 66 SdHoareTripleChecker+Invalid, 36 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-26 00:55:36,995 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [9 Valid, 66 Invalid, 36 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-26 00:55:36,996 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2022-11-26 00:55:37,009 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 25. [2022-11-26 00:55:37,010 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 17 states have (on average 1.0588235294117647) internal successors, (18), 18 states have internal predecessors, (18), 4 states have call successors, (4), 3 states have call predecessors, (4), 3 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-11-26 00:55:37,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 26 transitions. [2022-11-26 00:55:37,011 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 26 transitions. Word has length 13 [2022-11-26 00:55:37,011 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-26 00:55:37,011 INFO L495 AbstractCegarLoop]: Abstraction has 25 states and 26 transitions. [2022-11-26 00:55:37,011 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 2.0) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-11-26 00:55:37,012 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 26 transitions. [2022-11-26 00:55:37,012 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2022-11-26 00:55:37,012 INFO L187 NwaCegarLoop]: Found error trace [2022-11-26 00:55:37,012 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-26 00:55:37,027 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (3)] Forceful destruction successful, exit code 0 [2022-11-26 00:55:37,222 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-26 00:55:37,223 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-26 00:55:37,224 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-26 00:55:37,224 INFO L85 PathProgramCache]: Analyzing trace with hash 1082860028, now seen corresponding path program 1 times [2022-11-26 00:55:37,224 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-26 00:55:37,225 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1243170501] [2022-11-26 00:55:37,225 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-26 00:55:37,225 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-26 00:55:37,225 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/mathsat [2022-11-26 00:55:37,226 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-26 00:55:37,235 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (4)] Waiting until timeout for monitored process [2022-11-26 00:55:37,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-26 00:55:37,310 INFO L263 TraceCheckSpWp]: Trace formula consists of 61 conjuncts, 17 conjunts are in the unsatisfiable core [2022-11-26 00:55:37,319 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-26 00:55:37,518 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-11-26 00:55:37,518 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-26 00:55:37,639 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-11-26 00:55:37,640 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-26 00:55:37,640 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1243170501] [2022-11-26 00:55:37,640 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1243170501] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-26 00:55:37,641 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [986811634] [2022-11-26 00:55:37,641 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-26 00:55:37,641 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-26 00:55:37,641 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/cvc4 [2022-11-26 00:55:37,648 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-26 00:55:37,668 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt (5)] Waiting until timeout for monitored process [2022-11-26 00:55:37,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-26 00:55:37,735 INFO L263 TraceCheckSpWp]: Trace formula consists of 61 conjuncts, 20 conjunts are in the unsatisfiable core [2022-11-26 00:55:37,737 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-26 00:55:37,845 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-11-26 00:55:37,845 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-26 00:55:37,916 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-11-26 00:55:37,916 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [986811634] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-26 00:55:37,917 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [638379877] [2022-11-26 00:55:37,917 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-26 00:55:37,917 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-26 00:55:37,917 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/z3 [2022-11-26 00:55:37,921 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-26 00:55:37,924 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-11-26 00:55:37,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-26 00:55:37,990 INFO L263 TraceCheckSpWp]: Trace formula consists of 61 conjuncts, 20 conjunts are in the unsatisfiable core [2022-11-26 00:55:37,994 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-26 00:55:38,116 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 3 proven. 6 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-26 00:55:38,117 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-26 00:55:38,184 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-11-26 00:55:38,184 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [638379877] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-26 00:55:38,185 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-26 00:55:38,185 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 9, 7] total 12 [2022-11-26 00:55:38,185 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [828985783] [2022-11-26 00:55:38,185 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-26 00:55:38,186 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-11-26 00:55:38,186 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-26 00:55:38,187 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-11-26 00:55:38,188 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=106, Unknown=0, NotChecked=0, Total=132 [2022-11-26 00:55:38,188 INFO L87 Difference]: Start difference. First operand 25 states and 26 transitions. Second operand has 12 states, 11 states have (on average 2.0) internal successors, (22), 11 states have internal predecessors, (22), 3 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2022-11-26 00:55:38,548 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-26 00:55:38,548 INFO L93 Difference]: Finished difference Result 47 states and 53 transitions. [2022-11-26 00:55:38,549 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-11-26 00:55:38,549 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 11 states have (on average 2.0) internal successors, (22), 11 states have internal predecessors, (22), 3 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 20 [2022-11-26 00:55:38,549 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-26 00:55:38,550 INFO L225 Difference]: With dead ends: 47 [2022-11-26 00:55:38,550 INFO L226 Difference]: Without dead ends: 45 [2022-11-26 00:55:38,550 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 120 GetRequests, 104 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=65, Invalid=241, Unknown=0, NotChecked=0, Total=306 [2022-11-26 00:55:38,551 INFO L413 NwaCegarLoop]: 8 mSDtfsCounter, 31 mSDsluCounter, 32 mSDsCounter, 0 mSdLazyCounter, 150 mSolverCounterSat, 22 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 32 SdHoareTripleChecker+Valid, 40 SdHoareTripleChecker+Invalid, 172 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 22 IncrementalHoareTripleChecker+Valid, 150 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-26 00:55:38,552 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [32 Valid, 40 Invalid, 172 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [22 Valid, 150 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-26 00:55:38,552 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2022-11-26 00:55:38,566 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 42. [2022-11-26 00:55:38,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 28 states have (on average 1.0357142857142858) internal successors, (29), 29 states have internal predecessors, (29), 9 states have call successors, (9), 4 states have call predecessors, (9), 4 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) [2022-11-26 00:55:38,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 47 transitions. [2022-11-26 00:55:38,576 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 47 transitions. Word has length 20 [2022-11-26 00:55:38,576 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-26 00:55:38,577 INFO L495 AbstractCegarLoop]: Abstraction has 42 states and 47 transitions. [2022-11-26 00:55:38,577 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 11 states have (on average 2.0) internal successors, (22), 11 states have internal predecessors, (22), 3 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2022-11-26 00:55:38,578 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 47 transitions. [2022-11-26 00:55:38,579 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-11-26 00:55:38,579 INFO L187 NwaCegarLoop]: Found error trace [2022-11-26 00:55:38,579 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2022-11-26 00:55:38,598 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (4)] Forceful destruction successful, exit code 0 [2022-11-26 00:55:38,792 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt (5)] Forceful destruction successful, exit code 0 [2022-11-26 00:55:38,995 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-11-26 00:55:39,191 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-26 00:55:39,191 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-26 00:55:39,192 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-26 00:55:39,192 INFO L85 PathProgramCache]: Analyzing trace with hash 2028547162, now seen corresponding path program 2 times [2022-11-26 00:55:39,192 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-26 00:55:39,193 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1277718441] [2022-11-26 00:55:39,193 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-26 00:55:39,193 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-26 00:55:39,193 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/mathsat [2022-11-26 00:55:39,194 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-26 00:55:39,216 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (7)] Waiting until timeout for monitored process [2022-11-26 00:55:39,243 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-26 00:55:39,244 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-26 00:55:39,245 INFO L263 TraceCheckSpWp]: Trace formula consists of 77 conjuncts, 20 conjunts are in the unsatisfiable core [2022-11-26 00:55:39,248 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-26 00:55:39,391 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-11-26 00:55:39,391 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-26 00:55:39,495 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-26 00:55:39,496 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1277718441] [2022-11-26 00:55:39,496 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1277718441] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-26 00:55:39,496 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [368044041] [2022-11-26 00:55:39,496 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-26 00:55:39,496 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-26 00:55:39,496 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/cvc4 [2022-11-26 00:55:39,497 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-26 00:55:39,524 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt (8)] Waiting until timeout for monitored process [2022-11-26 00:55:39,592 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-26 00:55:39,593 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-26 00:55:39,595 INFO L263 TraceCheckSpWp]: Trace formula consists of 77 conjuncts, 20 conjunts are in the unsatisfiable core [2022-11-26 00:55:39,597 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-26 00:55:39,717 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-11-26 00:55:39,718 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-26 00:55:39,782 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [368044041] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-26 00:55:39,782 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1202247217] [2022-11-26 00:55:39,782 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-26 00:55:39,782 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-26 00:55:39,783 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/z3 [2022-11-26 00:55:39,784 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-26 00:55:39,787 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-11-26 00:55:39,846 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-26 00:55:39,847 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-26 00:55:39,848 INFO L263 TraceCheckSpWp]: Trace formula consists of 77 conjuncts, 23 conjunts are in the unsatisfiable core [2022-11-26 00:55:39,851 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-26 00:55:40,005 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 5 proven. 11 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-11-26 00:55:40,005 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-26 00:55:40,066 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1202247217] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-26 00:55:40,066 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-26 00:55:40,066 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 9] total 9 [2022-11-26 00:55:40,067 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [585611205] [2022-11-26 00:55:40,067 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-26 00:55:40,067 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-11-26 00:55:40,068 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-26 00:55:40,069 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-11-26 00:55:40,069 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2022-11-26 00:55:40,069 INFO L87 Difference]: Start difference. First operand 42 states and 47 transitions. Second operand has 9 states, 8 states have (on average 2.0) internal successors, (16), 8 states have internal predecessors, (16), 3 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-11-26 00:55:40,261 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-26 00:55:40,261 INFO L93 Difference]: Finished difference Result 48 states and 52 transitions. [2022-11-26 00:55:40,262 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-26 00:55:40,262 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 8 states have (on average 2.0) internal successors, (16), 8 states have internal predecessors, (16), 3 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 26 [2022-11-26 00:55:40,263 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-26 00:55:40,265 INFO L225 Difference]: With dead ends: 48 [2022-11-26 00:55:40,265 INFO L226 Difference]: Without dead ends: 46 [2022-11-26 00:55:40,265 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 97 GetRequests, 82 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=46, Invalid=164, Unknown=0, NotChecked=0, Total=210 [2022-11-26 00:55:40,266 INFO L413 NwaCegarLoop]: 10 mSDtfsCounter, 16 mSDsluCounter, 33 mSDsCounter, 0 mSdLazyCounter, 107 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 17 SdHoareTripleChecker+Valid, 43 SdHoareTripleChecker+Invalid, 113 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 107 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-26 00:55:40,266 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [17 Valid, 43 Invalid, 113 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 107 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-26 00:55:40,267 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2022-11-26 00:55:40,299 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2022-11-26 00:55:40,301 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 31 states have (on average 1.032258064516129) internal successors, (32), 32 states have internal predecessors, (32), 9 states have call successors, (9), 5 states have call predecessors, (9), 5 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) [2022-11-26 00:55:40,306 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 50 transitions. [2022-11-26 00:55:40,308 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 50 transitions. Word has length 26 [2022-11-26 00:55:40,309 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-26 00:55:40,309 INFO L495 AbstractCegarLoop]: Abstraction has 46 states and 50 transitions. [2022-11-26 00:55:40,309 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 8 states have (on average 2.0) internal successors, (16), 8 states have internal predecessors, (16), 3 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-11-26 00:55:40,309 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 50 transitions. [2022-11-26 00:55:40,310 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-11-26 00:55:40,310 INFO L187 NwaCegarLoop]: Found error trace [2022-11-26 00:55:40,311 INFO L195 NwaCegarLoop]: trace histogram [6, 5, 5, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1] [2022-11-26 00:55:40,316 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt (8)] Forceful destruction successful, exit code 0 [2022-11-26 00:55:40,534 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (7)] Forceful destruction successful, exit code 0 [2022-11-26 00:55:40,721 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2022-11-26 00:55:40,913 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3,9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-26 00:55:40,914 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-26 00:55:40,914 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-26 00:55:40,914 INFO L85 PathProgramCache]: Analyzing trace with hash -690507524, now seen corresponding path program 3 times [2022-11-26 00:55:40,914 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-26 00:55:40,915 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1739718155] [2022-11-26 00:55:40,915 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-26 00:55:40,915 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-26 00:55:40,915 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/mathsat [2022-11-26 00:55:40,916 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-26 00:55:40,940 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (10)] Waiting until timeout for monitored process [2022-11-26 00:55:40,988 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-11-26 00:55:40,989 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-26 00:55:40,991 INFO L263 TraceCheckSpWp]: Trace formula consists of 98 conjuncts, 21 conjunts are in the unsatisfiable core [2022-11-26 00:55:40,994 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-26 00:55:41,208 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 10 proven. 13 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-11-26 00:55:41,209 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-26 00:55:41,292 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-26 00:55:41,292 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1739718155] [2022-11-26 00:55:41,293 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1739718155] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-26 00:55:41,293 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1956494778] [2022-11-26 00:55:41,294 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-26 00:55:41,295 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-26 00:55:41,295 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/cvc4 [2022-11-26 00:55:41,296 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-26 00:55:41,309 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt (11)] Waiting until timeout for monitored process [2022-11-26 00:55:41,414 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-11-26 00:55:41,414 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-26 00:55:41,417 INFO L263 TraceCheckSpWp]: Trace formula consists of 98 conjuncts, 21 conjunts are in the unsatisfiable core [2022-11-26 00:55:41,420 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-26 00:55:41,531 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 10 proven. 13 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-11-26 00:55:41,531 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-26 00:55:41,566 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1956494778] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-26 00:55:41,567 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [88479030] [2022-11-26 00:55:41,567 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-26 00:55:41,567 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-26 00:55:41,567 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/z3 [2022-11-26 00:55:41,568 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-26 00:55:41,605 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-11-26 00:55:41,650 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-11-26 00:55:41,651 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-26 00:55:41,652 INFO L263 TraceCheckSpWp]: Trace formula consists of 98 conjuncts, 24 conjunts are in the unsatisfiable core [2022-11-26 00:55:41,655 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-26 00:55:41,788 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 21 proven. 14 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2022-11-26 00:55:41,788 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-26 00:55:41,857 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [88479030] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-26 00:55:41,857 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-26 00:55:41,858 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 10] total 11 [2022-11-26 00:55:41,858 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [398945057] [2022-11-26 00:55:41,858 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-26 00:55:41,859 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-11-26 00:55:41,859 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-26 00:55:41,860 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-11-26 00:55:41,860 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=128, Unknown=0, NotChecked=0, Total=156 [2022-11-26 00:55:41,860 INFO L87 Difference]: Start difference. First operand 46 states and 50 transitions. Second operand has 11 states, 9 states have (on average 2.2222222222222223) internal successors, (20), 10 states have internal predecessors, (20), 5 states have call successors, (7), 2 states have call predecessors, (7), 2 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2022-11-26 00:55:42,741 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-26 00:55:42,742 INFO L93 Difference]: Finished difference Result 52 states and 55 transitions. [2022-11-26 00:55:42,743 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-26 00:55:42,743 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 9 states have (on average 2.2222222222222223) internal successors, (20), 10 states have internal predecessors, (20), 5 states have call successors, (7), 2 states have call predecessors, (7), 2 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 39 [2022-11-26 00:55:42,743 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-26 00:55:42,744 INFO L225 Difference]: With dead ends: 52 [2022-11-26 00:55:42,744 INFO L226 Difference]: Without dead ends: 50 [2022-11-26 00:55:42,745 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 137 GetRequests, 119 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 1 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=57, Invalid=249, Unknown=0, NotChecked=0, Total=306 [2022-11-26 00:55:42,745 INFO L413 NwaCegarLoop]: 13 mSDtfsCounter, 16 mSDsluCounter, 56 mSDsCounter, 0 mSdLazyCounter, 137 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 69 SdHoareTripleChecker+Invalid, 144 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 137 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-11-26 00:55:42,746 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [16 Valid, 69 Invalid, 144 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 137 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-11-26 00:55:42,746 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. [2022-11-26 00:55:42,758 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 50. [2022-11-26 00:55:42,758 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 34 states have (on average 1.0294117647058822) internal successors, (35), 35 states have internal predecessors, (35), 9 states have call successors, (9), 6 states have call predecessors, (9), 6 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) [2022-11-26 00:55:42,759 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 53 transitions. [2022-11-26 00:55:42,759 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 53 transitions. Word has length 39 [2022-11-26 00:55:42,760 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-26 00:55:42,760 INFO L495 AbstractCegarLoop]: Abstraction has 50 states and 53 transitions. [2022-11-26 00:55:42,760 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 9 states have (on average 2.2222222222222223) internal successors, (20), 10 states have internal predecessors, (20), 5 states have call successors, (7), 2 states have call predecessors, (7), 2 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2022-11-26 00:55:42,760 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 53 transitions. [2022-11-26 00:55:42,761 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2022-11-26 00:55:42,762 INFO L187 NwaCegarLoop]: Found error trace [2022-11-26 00:55:42,762 INFO L195 NwaCegarLoop]: trace histogram [9, 8, 8, 5, 5, 4, 4, 4, 4, 4, 1, 1, 1, 1] [2022-11-26 00:55:42,769 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt (11)] Forceful destruction successful, exit code 0 [2022-11-26 00:55:42,968 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-11-26 00:55:43,182 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (10)] Forceful destruction successful, exit code 0 [2022-11-26 00:55:43,364 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt,12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true,10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-26 00:55:43,364 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-26 00:55:43,365 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-26 00:55:43,365 INFO L85 PathProgramCache]: Analyzing trace with hash -962754338, now seen corresponding path program 4 times [2022-11-26 00:55:43,365 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-26 00:55:43,365 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1744000476] [2022-11-26 00:55:43,365 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-26 00:55:43,366 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-26 00:55:43,366 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/mathsat [2022-11-26 00:55:43,372 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-26 00:55:43,378 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (13)] Waiting until timeout for monitored process [2022-11-26 00:55:43,455 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-26 00:55:43,455 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-26 00:55:43,459 INFO L263 TraceCheckSpWp]: Trace formula consists of 172 conjuncts, 32 conjunts are in the unsatisfiable core [2022-11-26 00:55:43,462 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-26 00:55:43,842 INFO L134 CoverageAnalysis]: Checked inductivity of 166 backedges. 16 proven. 38 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2022-11-26 00:55:43,842 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-26 00:55:44,163 INFO L134 CoverageAnalysis]: Checked inductivity of 166 backedges. 16 proven. 38 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2022-11-26 00:55:44,163 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-26 00:55:44,163 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1744000476] [2022-11-26 00:55:44,163 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1744000476] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-26 00:55:44,163 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [499366581] [2022-11-26 00:55:44,163 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-26 00:55:44,163 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-26 00:55:44,164 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/cvc4 [2022-11-26 00:55:44,168 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-26 00:55:44,176 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt (14)] Waiting until timeout for monitored process [2022-11-26 00:55:44,315 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-26 00:55:44,315 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-26 00:55:44,317 INFO L263 TraceCheckSpWp]: Trace formula consists of 172 conjuncts, 45 conjunts are in the unsatisfiable core [2022-11-26 00:55:44,320 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-26 00:55:44,792 INFO L134 CoverageAnalysis]: Checked inductivity of 166 backedges. 16 proven. 38 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2022-11-26 00:55:44,792 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-26 00:55:44,913 INFO L134 CoverageAnalysis]: Checked inductivity of 166 backedges. 16 proven. 38 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2022-11-26 00:55:44,913 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [499366581] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-26 00:55:44,914 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [202165802] [2022-11-26 00:55:44,914 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-26 00:55:44,914 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-26 00:55:44,914 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/z3 [2022-11-26 00:55:44,916 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-26 00:55:44,940 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-11-26 00:55:44,997 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-26 00:55:44,997 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-26 00:55:44,999 INFO L263 TraceCheckSpWp]: Trace formula consists of 172 conjuncts, 35 conjunts are in the unsatisfiable core [2022-11-26 00:55:45,002 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-26 00:55:45,289 INFO L134 CoverageAnalysis]: Checked inductivity of 166 backedges. 15 proven. 60 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2022-11-26 00:55:45,296 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-26 00:55:45,469 INFO L134 CoverageAnalysis]: Checked inductivity of 166 backedges. 16 proven. 38 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2022-11-26 00:55:45,470 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [202165802] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-26 00:55:45,470 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-26 00:55:45,470 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 11, 10, 12, 10] total 21 [2022-11-26 00:55:45,471 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [325861232] [2022-11-26 00:55:45,471 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-26 00:55:45,473 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2022-11-26 00:55:45,473 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-26 00:55:45,475 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2022-11-26 00:55:45,475 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=81, Invalid=339, Unknown=0, NotChecked=0, Total=420 [2022-11-26 00:55:45,475 INFO L87 Difference]: Start difference. First operand 50 states and 53 transitions. Second operand has 21 states, 20 states have (on average 2.45) internal successors, (49), 20 states have internal predecessors, (49), 12 states have call successors, (23), 3 states have call predecessors, (23), 2 states have return successors, (22), 11 states have call predecessors, (22), 11 states have call successors, (22) [2022-11-26 00:55:46,489 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-26 00:55:46,490 INFO L93 Difference]: Finished difference Result 84 states and 97 transitions. [2022-11-26 00:55:46,490 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-11-26 00:55:46,491 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 20 states have (on average 2.45) internal successors, (49), 20 states have internal predecessors, (49), 12 states have call successors, (23), 3 states have call predecessors, (23), 2 states have return successors, (22), 11 states have call predecessors, (22), 11 states have call successors, (22) Word has length 59 [2022-11-26 00:55:46,491 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-26 00:55:46,492 INFO L225 Difference]: With dead ends: 84 [2022-11-26 00:55:46,492 INFO L226 Difference]: Without dead ends: 82 [2022-11-26 00:55:46,493 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 359 GetRequests, 329 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 148 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=190, Invalid=802, Unknown=0, NotChecked=0, Total=992 [2022-11-26 00:55:46,493 INFO L413 NwaCegarLoop]: 14 mSDtfsCounter, 43 mSDsluCounter, 82 mSDsCounter, 0 mSdLazyCounter, 499 mSolverCounterSat, 39 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 44 SdHoareTripleChecker+Valid, 96 SdHoareTripleChecker+Invalid, 538 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 39 IncrementalHoareTripleChecker+Valid, 499 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-11-26 00:55:46,494 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [44 Valid, 96 Invalid, 538 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [39 Valid, 499 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-11-26 00:55:46,494 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states. [2022-11-26 00:55:46,530 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 79. [2022-11-26 00:55:46,531 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 79 states, 52 states have (on average 1.0192307692307692) internal successors, (53), 53 states have internal predecessors, (53), 19 states have call successors, (19), 7 states have call predecessors, (19), 7 states have return successors, (19), 18 states have call predecessors, (19), 19 states have call successors, (19) [2022-11-26 00:55:46,532 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 91 transitions. [2022-11-26 00:55:46,533 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 91 transitions. Word has length 59 [2022-11-26 00:55:46,534 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-26 00:55:46,534 INFO L495 AbstractCegarLoop]: Abstraction has 79 states and 91 transitions. [2022-11-26 00:55:46,534 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 20 states have (on average 2.45) internal successors, (49), 20 states have internal predecessors, (49), 12 states have call successors, (23), 3 states have call predecessors, (23), 2 states have return successors, (22), 11 states have call predecessors, (22), 11 states have call successors, (22) [2022-11-26 00:55:46,534 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 91 transitions. [2022-11-26 00:55:46,538 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2022-11-26 00:55:46,538 INFO L187 NwaCegarLoop]: Found error trace [2022-11-26 00:55:46,538 INFO L195 NwaCegarLoop]: trace histogram [19, 18, 18, 10, 10, 9, 9, 9, 9, 9, 1, 1, 1, 1] [2022-11-26 00:55:46,549 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (13)] Forceful destruction successful, exit code 0 [2022-11-26 00:55:46,740 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt (14)] Forceful destruction successful, exit code 0 [2022-11-26 00:55:46,943 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Forceful destruction successful, exit code 0 [2022-11-26 00:55:47,139 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3,14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt,15 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-26 00:55:47,139 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-26 00:55:47,140 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-26 00:55:47,140 INFO L85 PathProgramCache]: Analyzing trace with hash 1753079548, now seen corresponding path program 5 times [2022-11-26 00:55:47,140 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-26 00:55:47,140 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [915812367] [2022-11-26 00:55:47,140 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-26 00:55:47,141 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-26 00:55:47,141 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/mathsat [2022-11-26 00:55:47,142 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-26 00:55:47,143 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (16)] Waiting until timeout for monitored process [2022-11-26 00:55:47,320 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 15 check-sat command(s) [2022-11-26 00:55:47,320 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-26 00:55:47,327 INFO L263 TraceCheckSpWp]: Trace formula consists of 357 conjuncts, 57 conjunts are in the unsatisfiable core [2022-11-26 00:55:47,331 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-26 00:55:48,410 INFO L134 CoverageAnalysis]: Checked inductivity of 846 backedges. 36 proven. 198 refuted. 0 times theorem prover too weak. 612 trivial. 0 not checked. [2022-11-26 00:55:48,410 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-26 00:55:49,618 INFO L134 CoverageAnalysis]: Checked inductivity of 846 backedges. 36 proven. 198 refuted. 0 times theorem prover too weak. 612 trivial. 0 not checked. [2022-11-26 00:55:49,619 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-26 00:55:49,619 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [915812367] [2022-11-26 00:55:49,619 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [915812367] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-26 00:55:49,619 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [60440001] [2022-11-26 00:55:49,620 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-26 00:55:49,620 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-26 00:55:49,620 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/cvc4 [2022-11-26 00:55:49,621 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-26 00:55:49,622 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt (17)] Waiting until timeout for monitored process [2022-11-26 00:55:49,927 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 15 check-sat command(s) [2022-11-26 00:55:49,927 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-26 00:55:49,931 INFO L263 TraceCheckSpWp]: Trace formula consists of 357 conjuncts, 62 conjunts are in the unsatisfiable core [2022-11-26 00:55:49,935 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-26 00:55:50,655 INFO L134 CoverageAnalysis]: Checked inductivity of 846 backedges. 41 proven. 244 refuted. 0 times theorem prover too weak. 561 trivial. 0 not checked. [2022-11-26 00:55:50,656 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-26 00:55:51,240 INFO L134 CoverageAnalysis]: Checked inductivity of 846 backedges. 41 proven. 244 refuted. 0 times theorem prover too weak. 561 trivial. 0 not checked. [2022-11-26 00:55:51,240 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [60440001] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-26 00:55:51,240 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [503860790] [2022-11-26 00:55:51,241 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-26 00:55:51,241 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-26 00:55:51,241 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/z3 [2022-11-26 00:55:51,242 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-26 00:55:51,260 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-11-26 00:55:51,407 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 15 check-sat command(s) [2022-11-26 00:55:51,407 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-26 00:55:51,411 INFO L263 TraceCheckSpWp]: Trace formula consists of 357 conjuncts, 60 conjunts are in the unsatisfiable core [2022-11-26 00:55:51,415 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-26 00:55:52,036 INFO L134 CoverageAnalysis]: Checked inductivity of 846 backedges. 41 proven. 244 refuted. 0 times theorem prover too weak. 561 trivial. 0 not checked. [2022-11-26 00:55:52,036 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-26 00:55:52,392 INFO L134 CoverageAnalysis]: Checked inductivity of 846 backedges. 36 proven. 198 refuted. 0 times theorem prover too weak. 612 trivial. 0 not checked. [2022-11-26 00:55:52,393 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [503860790] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-26 00:55:52,393 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-26 00:55:52,393 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 18, 17, 17, 15] total 31 [2022-11-26 00:55:52,393 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1969021581] [2022-11-26 00:55:52,394 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-26 00:55:52,395 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 31 states [2022-11-26 00:55:52,395 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-26 00:55:52,396 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2022-11-26 00:55:52,396 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=177, Invalid=753, Unknown=0, NotChecked=0, Total=930 [2022-11-26 00:55:52,397 INFO L87 Difference]: Start difference. First operand 79 states and 91 transitions. Second operand has 31 states, 28 states have (on average 2.642857142857143) internal successors, (74), 30 states have internal predecessors, (74), 21 states have call successors, (40), 3 states have call predecessors, (40), 2 states have return successors, (39), 18 states have call predecessors, (39), 20 states have call successors, (39) [2022-11-26 00:55:55,887 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-26 00:55:55,887 INFO L93 Difference]: Finished difference Result 143 states and 177 transitions. [2022-11-26 00:55:55,888 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2022-11-26 00:55:55,888 INFO L78 Accepts]: Start accepts. Automaton has has 31 states, 28 states have (on average 2.642857142857143) internal successors, (74), 30 states have internal predecessors, (74), 21 states have call successors, (40), 3 states have call predecessors, (40), 2 states have return successors, (39), 18 states have call predecessors, (39), 20 states have call successors, (39) Word has length 124 [2022-11-26 00:55:55,889 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-26 00:55:55,890 INFO L225 Difference]: With dead ends: 143 [2022-11-26 00:55:55,890 INFO L226 Difference]: Without dead ends: 141 [2022-11-26 00:55:55,892 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 761 GetRequests, 709 SyntacticMatches, 0 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 403 ImplicationChecksByTransitivity, 3.3s TimeCoverageRelationStatistics Valid=551, Invalid=2311, Unknown=0, NotChecked=0, Total=2862 [2022-11-26 00:55:55,894 INFO L413 NwaCegarLoop]: 24 mSDtfsCounter, 78 mSDsluCounter, 165 mSDsCounter, 0 mSdLazyCounter, 1097 mSolverCounterSat, 107 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 79 SdHoareTripleChecker+Valid, 189 SdHoareTripleChecker+Invalid, 1204 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 107 IncrementalHoareTripleChecker+Valid, 1097 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.6s IncrementalHoareTripleChecker+Time [2022-11-26 00:55:55,895 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [79 Valid, 189 Invalid, 1204 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [107 Valid, 1097 Invalid, 0 Unknown, 0 Unchecked, 1.6s Time] [2022-11-26 00:55:55,896 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2022-11-26 00:55:55,962 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 138. [2022-11-26 00:55:55,963 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 138 states, 88 states have (on average 1.0113636363636365) internal successors, (89), 89 states have internal predecessors, (89), 41 states have call successors, (41), 8 states have call predecessors, (41), 8 states have return successors, (41), 40 states have call predecessors, (41), 41 states have call successors, (41) [2022-11-26 00:55:55,965 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 171 transitions. [2022-11-26 00:55:55,965 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 171 transitions. Word has length 124 [2022-11-26 00:55:55,966 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-26 00:55:55,966 INFO L495 AbstractCegarLoop]: Abstraction has 138 states and 171 transitions. [2022-11-26 00:55:55,966 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 31 states, 28 states have (on average 2.642857142857143) internal successors, (74), 30 states have internal predecessors, (74), 21 states have call successors, (40), 3 states have call predecessors, (40), 2 states have return successors, (39), 18 states have call predecessors, (39), 20 states have call successors, (39) [2022-11-26 00:55:55,966 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 171 transitions. [2022-11-26 00:55:55,969 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 190 [2022-11-26 00:55:55,969 INFO L187 NwaCegarLoop]: Found error trace [2022-11-26 00:55:55,970 INFO L195 NwaCegarLoop]: trace histogram [29, 28, 28, 15, 15, 14, 14, 14, 14, 14, 1, 1, 1, 1] [2022-11-26 00:55:55,976 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt (17)] Forceful destruction successful, exit code 0 [2022-11-26 00:55:56,177 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Ended with exit code 0 [2022-11-26 00:55:56,381 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (16)] Forceful destruction successful, exit code 0 [2022-11-26 00:55:56,573 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt,18 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true,16 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-26 00:55:56,574 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-26 00:55:56,574 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-26 00:55:56,574 INFO L85 PathProgramCache]: Analyzing trace with hash 1810513054, now seen corresponding path program 6 times [2022-11-26 00:55:56,575 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-26 00:55:56,575 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [143646292] [2022-11-26 00:55:56,575 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-11-26 00:55:56,575 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-26 00:55:56,575 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/mathsat [2022-11-26 00:55:56,576 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-26 00:55:56,582 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (19)] Waiting until timeout for monitored process [2022-11-26 00:55:56,851 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 22 check-sat command(s) [2022-11-26 00:55:56,851 INFO L229 tOrderPrioritization]: Conjunction of SSA is sat [2022-11-26 00:55:56,851 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-26 00:55:56,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-26 00:55:57,087 INFO L130 FreeRefinementEngine]: Strategy WALRUS found a feasible trace [2022-11-26 00:55:57,088 INFO L360 BasicCegarLoop]: Counterexample is feasible [2022-11-26 00:55:57,089 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-11-26 00:55:57,109 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (19)] Forceful destruction successful, exit code 0 [2022-11-26 00:55:57,304 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 19 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-26 00:55:57,310 INFO L445 BasicCegarLoop]: Path program histogram: [6, 1, 1] [2022-11-26 00:55:57,314 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-26 00:55:57,410 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-26 00:55:57,410 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-26 00:55:57,411 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-26 00:55:57,411 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-26 00:55:57,411 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-26 00:55:57,411 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-26 00:55:57,411 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-26 00:55:57,411 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-26 00:55:57,411 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-26 00:55:57,412 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-26 00:55:57,412 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-26 00:55:57,412 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-26 00:55:57,412 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-26 00:55:57,412 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-26 00:55:57,412 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-26 00:55:57,442 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 26.11 12:55:57 BoogieIcfgContainer [2022-11-26 00:55:57,442 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-26 00:55:57,443 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-26 00:55:57,443 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-26 00:55:57,443 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-26 00:55:57,444 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 12:55:35" (3/4) ... [2022-11-26 00:55:57,445 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2022-11-26 00:55:57,481 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-26 00:55:57,481 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-26 00:55:57,481 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-26 00:55:57,481 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-26 00:55:57,481 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-26 00:55:57,482 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-26 00:55:57,482 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-26 00:55:57,482 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-26 00:55:57,482 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-26 00:55:57,482 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-26 00:55:57,482 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-26 00:55:57,482 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-26 00:55:57,482 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-26 00:55:57,483 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-26 00:55:57,483 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-26 00:55:57,595 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/witness.graphml [2022-11-26 00:55:57,595 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-26 00:55:57,596 INFO L158 Benchmark]: Toolchain (without parser) took 22594.70ms. Allocated memory was 86.0MB in the beginning and 220.2MB in the end (delta: 134.2MB). Free memory was 63.6MB in the beginning and 127.1MB in the end (delta: -63.5MB). Peak memory consumption was 72.8MB. Max. memory is 16.1GB. [2022-11-26 00:55:57,596 INFO L158 Benchmark]: CDTParser took 0.29ms. Allocated memory is still 71.3MB. Free memory is still 49.5MB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-26 00:55:57,597 INFO L158 Benchmark]: CACSL2BoogieTranslator took 282.75ms. Allocated memory is still 86.0MB. Free memory was 63.6MB in the beginning and 52.7MB in the end (delta: 10.9MB). Peak memory consumption was 12.6MB. Max. memory is 16.1GB. [2022-11-26 00:55:57,597 INFO L158 Benchmark]: Boogie Procedure Inliner took 42.37ms. Allocated memory is still 86.0MB. Free memory was 52.7MB in the beginning and 51.0MB in the end (delta: 1.7MB). There was no memory consumed. Max. memory is 16.1GB. [2022-11-26 00:55:57,597 INFO L158 Benchmark]: Boogie Preprocessor took 44.23ms. Allocated memory is still 86.0MB. Free memory was 51.0MB in the beginning and 49.8MB in the end (delta: 1.2MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-11-26 00:55:57,598 INFO L158 Benchmark]: RCFGBuilder took 459.04ms. Allocated memory is still 86.0MB. Free memory was 49.8MB in the beginning and 62.4MB in the end (delta: -12.6MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. [2022-11-26 00:55:57,598 INFO L158 Benchmark]: TraceAbstraction took 21606.47ms. Allocated memory was 86.0MB in the beginning and 220.2MB in the end (delta: 134.2MB). Free memory was 61.7MB in the beginning and 142.8MB in the end (delta: -81.1MB). Peak memory consumption was 56.1MB. Max. memory is 16.1GB. [2022-11-26 00:55:57,599 INFO L158 Benchmark]: Witness Printer took 152.71ms. Allocated memory is still 220.2MB. Free memory was 142.8MB in the beginning and 127.1MB in the end (delta: 15.7MB). Peak memory consumption was 14.7MB. Max. memory is 16.1GB. [2022-11-26 00:55:57,600 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.29ms. Allocated memory is still 71.3MB. Free memory is still 49.5MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 282.75ms. Allocated memory is still 86.0MB. Free memory was 63.6MB in the beginning and 52.7MB in the end (delta: 10.9MB). Peak memory consumption was 12.6MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 42.37ms. Allocated memory is still 86.0MB. Free memory was 52.7MB in the beginning and 51.0MB in the end (delta: 1.7MB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 44.23ms. Allocated memory is still 86.0MB. Free memory was 51.0MB in the beginning and 49.8MB in the end (delta: 1.2MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * RCFGBuilder took 459.04ms. Allocated memory is still 86.0MB. Free memory was 49.8MB in the beginning and 62.4MB in the end (delta: -12.6MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. * TraceAbstraction took 21606.47ms. Allocated memory was 86.0MB in the beginning and 220.2MB in the end (delta: 134.2MB). Free memory was 61.7MB in the beginning and 142.8MB in the end (delta: -81.1MB). Peak memory consumption was 56.1MB. Max. memory is 16.1GB. * Witness Printer took 152.71ms. Allocated memory is still 220.2MB. Free memory was 142.8MB in the beginning and 127.1MB in the end (delta: 15.7MB). Peak memory consumption was 14.7MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 28]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L33] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 4); [L34] const SORT_1 msb_SORT_1 = (SORT_1)1 << (4 - 1); [L36] const SORT_12 mask_SORT_12 = (SORT_12)-1 >> (sizeof(SORT_12) * 8 - 1); [L37] const SORT_12 msb_SORT_12 = (SORT_12)1 << (1 - 1); [L39] const SORT_1 var_2 = 1; [L40] const SORT_1 var_11 = mask_SORT_1; [L41] const SORT_1 var_16 = 3; [L44] SORT_1 state_3 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L45] SORT_1 state_4 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L47] SORT_1 init_5_arg_1 = var_2; [L48] state_3 = init_5_arg_1 [L49] SORT_1 init_6_arg_1 = var_2; [L50] state_4 = init_6_arg_1 VAL [init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, state_3=1, state_4=1, var_11=15, var_16=3, var_2=1] [L55] SORT_1 var_13_arg_0 = state_4; [L56] SORT_1 var_13_arg_1 = var_11; [L57] SORT_12 var_13 = var_13_arg_0 == var_13_arg_1; [L58] SORT_12 bad_14_arg_0 = var_13; VAL [bad_14_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, state_3=1, state_4=1, var_11=15, var_13=0, var_13_arg_0=1, var_13_arg_1=15, var_16=3, var_2=1] [L59] CALL __VERIFIER_assert(!(bad_14_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L59] RET __VERIFIER_assert(!(bad_14_arg_0)) VAL [bad_14_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, state_3=1, state_4=1, var_11=15, var_13=0, var_13_arg_0=1, var_13_arg_1=15, var_16=3, var_2=1] [L60] SORT_1 var_17_arg_0 = state_4; [L61] SORT_1 var_17_arg_1 = var_16; [L62] SORT_12 var_17 = var_17_arg_0 > var_17_arg_1; [L63] SORT_1 var_15_arg_0 = state_3; [L64] SORT_12 var_15 = var_15_arg_0 >> 0; [L65] SORT_12 var_18_arg_0 = var_17; [L66] SORT_12 var_18_arg_1 = var_15; [L67] SORT_12 var_18 = var_18_arg_0 & var_18_arg_1; [L68] var_18 = var_18 & mask_SORT_12 [L69] SORT_12 bad_19_arg_0 = var_18; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, state_3=1, state_4=1, var_11=15, var_13=0, var_13_arg_0=1, var_13_arg_1=15, var_15=1, var_15_arg_0=1, var_16=3, var_17=0, var_17_arg_0=1, var_17_arg_1=3, var_18=0, var_18_arg_0=0, var_18_arg_1=1, var_2=1] [L70] CALL __VERIFIER_assert(!(bad_19_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L70] RET __VERIFIER_assert(!(bad_19_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, state_3=1, state_4=1, var_11=15, var_13=0, var_13_arg_0=1, var_13_arg_1=15, var_15=1, var_15_arg_0=1, var_16=3, var_17=0, var_17_arg_0=1, var_17_arg_1=3, var_18=0, var_18_arg_0=0, var_18_arg_1=1, var_2=1] [L72] SORT_1 var_7_arg_0 = state_4; [L73] SORT_1 var_7_arg_1 = var_2; [L74] SORT_1 var_7 = var_7_arg_0 + var_7_arg_1; [L75] var_7 = var_7 & mask_SORT_1 [L76] SORT_1 next_9_arg_1 = var_7; [L77] SORT_1 var_8_arg_0 = state_3; [L78] SORT_1 var_8_arg_1 = state_4; [L79] SORT_1 var_8 = var_8_arg_0 * var_8_arg_1; [L80] SORT_1 next_10_arg_1 = var_8; [L82] state_4 = next_9_arg_1 [L83] state_3 = next_10_arg_1 VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=1, next_9_arg_1=2, state_3=1, state_4=2, var_11=15, var_13=0, var_13_arg_0=1, var_13_arg_1=15, var_15=1, var_15_arg_0=1, var_16=3, var_17=0, var_17_arg_0=1, var_17_arg_1=3, var_18=0, var_18_arg_0=0, var_18_arg_1=1, var_2=1, var_7=2, var_7_arg_0=1, var_7_arg_1=1, var_8=1, var_8_arg_0=1, var_8_arg_1=1] [L55] SORT_1 var_13_arg_0 = state_4; [L56] SORT_1 var_13_arg_1 = var_11; [L57] SORT_12 var_13 = var_13_arg_0 == var_13_arg_1; [L58] SORT_12 bad_14_arg_0 = var_13; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=1, next_9_arg_1=2, state_3=1, state_4=2, var_11=15, var_13=0, var_13_arg_0=2, var_13_arg_1=15, var_15=1, var_15_arg_0=1, var_16=3, var_17=0, var_17_arg_0=1, var_17_arg_1=3, var_18=0, var_18_arg_0=0, var_18_arg_1=1, var_2=1, var_7=2, var_7_arg_0=1, var_7_arg_1=1, var_8=1, var_8_arg_0=1, var_8_arg_1=1] [L59] CALL __VERIFIER_assert(!(bad_14_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L59] RET __VERIFIER_assert(!(bad_14_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=1, next_9_arg_1=2, state_3=1, state_4=2, var_11=15, var_13=0, var_13_arg_0=2, var_13_arg_1=15, var_15=1, var_15_arg_0=1, var_16=3, var_17=0, var_17_arg_0=1, var_17_arg_1=3, var_18=0, var_18_arg_0=0, var_18_arg_1=1, var_2=1, var_7=2, var_7_arg_0=1, var_7_arg_1=1, var_8=1, var_8_arg_0=1, var_8_arg_1=1] [L60] SORT_1 var_17_arg_0 = state_4; [L61] SORT_1 var_17_arg_1 = var_16; [L62] SORT_12 var_17 = var_17_arg_0 > var_17_arg_1; [L63] SORT_1 var_15_arg_0 = state_3; [L64] SORT_12 var_15 = var_15_arg_0 >> 0; [L65] SORT_12 var_18_arg_0 = var_17; [L66] SORT_12 var_18_arg_1 = var_15; [L67] SORT_12 var_18 = var_18_arg_0 & var_18_arg_1; [L68] var_18 = var_18 & mask_SORT_12 [L69] SORT_12 bad_19_arg_0 = var_18; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=1, next_9_arg_1=2, state_3=1, state_4=2, var_11=15, var_13=0, var_13_arg_0=2, var_13_arg_1=15, var_15=1, var_15_arg_0=1, var_16=3, var_17=0, var_17_arg_0=2, var_17_arg_1=3, var_18=0, var_18_arg_0=0, var_18_arg_1=1, var_2=1, var_7=2, var_7_arg_0=1, var_7_arg_1=1, var_8=1, var_8_arg_0=1, var_8_arg_1=1] [L70] CALL __VERIFIER_assert(!(bad_19_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L70] RET __VERIFIER_assert(!(bad_19_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=1, next_9_arg_1=2, state_3=1, state_4=2, var_11=15, var_13=0, var_13_arg_0=2, var_13_arg_1=15, var_15=1, var_15_arg_0=1, var_16=3, var_17=0, var_17_arg_0=2, var_17_arg_1=3, var_18=0, var_18_arg_0=0, var_18_arg_1=1, var_2=1, var_7=2, var_7_arg_0=1, var_7_arg_1=1, var_8=1, var_8_arg_0=1, var_8_arg_1=1] [L72] SORT_1 var_7_arg_0 = state_4; [L73] SORT_1 var_7_arg_1 = var_2; [L74] SORT_1 var_7 = var_7_arg_0 + var_7_arg_1; [L75] var_7 = var_7 & mask_SORT_1 [L76] SORT_1 next_9_arg_1 = var_7; [L77] SORT_1 var_8_arg_0 = state_3; [L78] SORT_1 var_8_arg_1 = state_4; [L79] SORT_1 var_8 = var_8_arg_0 * var_8_arg_1; [L80] SORT_1 next_10_arg_1 = var_8; [L82] state_4 = next_9_arg_1 [L83] state_3 = next_10_arg_1 VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=2, next_9_arg_1=3, state_3=2, state_4=3, var_11=15, var_13=0, var_13_arg_0=2, var_13_arg_1=15, var_15=1, var_15_arg_0=1, var_16=3, var_17=0, var_17_arg_0=2, var_17_arg_1=3, var_18=0, var_18_arg_0=0, var_18_arg_1=1, var_2=1, var_7=3, var_7_arg_0=2, var_7_arg_1=1, var_8=2, var_8_arg_0=1, var_8_arg_1=2] [L55] SORT_1 var_13_arg_0 = state_4; [L56] SORT_1 var_13_arg_1 = var_11; [L57] SORT_12 var_13 = var_13_arg_0 == var_13_arg_1; [L58] SORT_12 bad_14_arg_0 = var_13; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=2, next_9_arg_1=3, state_3=2, state_4=3, var_11=15, var_13=0, var_13_arg_0=3, var_13_arg_1=15, var_15=1, var_15_arg_0=1, var_16=3, var_17=0, var_17_arg_0=2, var_17_arg_1=3, var_18=0, var_18_arg_0=0, var_18_arg_1=1, var_2=1, var_7=3, var_7_arg_0=2, var_7_arg_1=1, var_8=2, var_8_arg_0=1, var_8_arg_1=2] [L59] CALL __VERIFIER_assert(!(bad_14_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L59] RET __VERIFIER_assert(!(bad_14_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=2, next_9_arg_1=3, state_3=2, state_4=3, var_11=15, var_13=0, var_13_arg_0=3, var_13_arg_1=15, var_15=1, var_15_arg_0=1, var_16=3, var_17=0, var_17_arg_0=2, var_17_arg_1=3, var_18=0, var_18_arg_0=0, var_18_arg_1=1, var_2=1, var_7=3, var_7_arg_0=2, var_7_arg_1=1, var_8=2, var_8_arg_0=1, var_8_arg_1=2] [L60] SORT_1 var_17_arg_0 = state_4; [L61] SORT_1 var_17_arg_1 = var_16; [L62] SORT_12 var_17 = var_17_arg_0 > var_17_arg_1; [L63] SORT_1 var_15_arg_0 = state_3; [L64] SORT_12 var_15 = var_15_arg_0 >> 0; [L65] SORT_12 var_18_arg_0 = var_17; [L66] SORT_12 var_18_arg_1 = var_15; [L67] SORT_12 var_18 = var_18_arg_0 & var_18_arg_1; [L68] var_18 = var_18 & mask_SORT_12 [L69] SORT_12 bad_19_arg_0 = var_18; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=2, next_9_arg_1=3, state_3=2, state_4=3, var_11=15, var_13=0, var_13_arg_0=3, var_13_arg_1=15, var_15=2, var_15_arg_0=2, var_16=3, var_17=0, var_17_arg_0=3, var_17_arg_1=3, var_18=0, var_18_arg_0=0, var_18_arg_1=2, var_2=1, var_7=3, var_7_arg_0=2, var_7_arg_1=1, var_8=2, var_8_arg_0=1, var_8_arg_1=2] [L70] CALL __VERIFIER_assert(!(bad_19_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L70] RET __VERIFIER_assert(!(bad_19_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=2, next_9_arg_1=3, state_3=2, state_4=3, var_11=15, var_13=0, var_13_arg_0=3, var_13_arg_1=15, var_15=2, var_15_arg_0=2, var_16=3, var_17=0, var_17_arg_0=3, var_17_arg_1=3, var_18=0, var_18_arg_0=0, var_18_arg_1=2, var_2=1, var_7=3, var_7_arg_0=2, var_7_arg_1=1, var_8=2, var_8_arg_0=1, var_8_arg_1=2] [L72] SORT_1 var_7_arg_0 = state_4; [L73] SORT_1 var_7_arg_1 = var_2; [L74] SORT_1 var_7 = var_7_arg_0 + var_7_arg_1; [L75] var_7 = var_7 & mask_SORT_1 [L76] SORT_1 next_9_arg_1 = var_7; [L77] SORT_1 var_8_arg_0 = state_3; [L78] SORT_1 var_8_arg_1 = state_4; [L79] SORT_1 var_8 = var_8_arg_0 * var_8_arg_1; [L80] SORT_1 next_10_arg_1 = var_8; [L82] state_4 = next_9_arg_1 [L83] state_3 = next_10_arg_1 VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=6, next_9_arg_1=4, state_3=6, state_4=4, var_11=15, var_13=0, var_13_arg_0=3, var_13_arg_1=15, var_15=2, var_15_arg_0=2, var_16=3, var_17=0, var_17_arg_0=3, var_17_arg_1=3, var_18=0, var_18_arg_0=0, var_18_arg_1=2, var_2=1, var_7=4, var_7_arg_0=3, var_7_arg_1=1, var_8=6, var_8_arg_0=2, var_8_arg_1=3] [L55] SORT_1 var_13_arg_0 = state_4; [L56] SORT_1 var_13_arg_1 = var_11; [L57] SORT_12 var_13 = var_13_arg_0 == var_13_arg_1; [L58] SORT_12 bad_14_arg_0 = var_13; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=6, next_9_arg_1=4, state_3=6, state_4=4, var_11=15, var_13=0, var_13_arg_0=4, var_13_arg_1=15, var_15=2, var_15_arg_0=2, var_16=3, var_17=0, var_17_arg_0=3, var_17_arg_1=3, var_18=0, var_18_arg_0=0, var_18_arg_1=2, var_2=1, var_7=4, var_7_arg_0=3, var_7_arg_1=1, var_8=6, var_8_arg_0=2, var_8_arg_1=3] [L59] CALL __VERIFIER_assert(!(bad_14_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L59] RET __VERIFIER_assert(!(bad_14_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=6, next_9_arg_1=4, state_3=6, state_4=4, var_11=15, var_13=0, var_13_arg_0=4, var_13_arg_1=15, var_15=2, var_15_arg_0=2, var_16=3, var_17=0, var_17_arg_0=3, var_17_arg_1=3, var_18=0, var_18_arg_0=0, var_18_arg_1=2, var_2=1, var_7=4, var_7_arg_0=3, var_7_arg_1=1, var_8=6, var_8_arg_0=2, var_8_arg_1=3] [L60] SORT_1 var_17_arg_0 = state_4; [L61] SORT_1 var_17_arg_1 = var_16; [L62] SORT_12 var_17 = var_17_arg_0 > var_17_arg_1; [L63] SORT_1 var_15_arg_0 = state_3; [L64] SORT_12 var_15 = var_15_arg_0 >> 0; [L65] SORT_12 var_18_arg_0 = var_17; [L66] SORT_12 var_18_arg_1 = var_15; [L67] SORT_12 var_18 = var_18_arg_0 & var_18_arg_1; [L68] var_18 = var_18 & mask_SORT_12 [L69] SORT_12 bad_19_arg_0 = var_18; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=6, next_9_arg_1=4, state_3=6, state_4=4, var_11=15, var_13=0, var_13_arg_0=4, var_13_arg_1=15, var_15=6, var_15_arg_0=6, var_16=3, var_17=1, var_17_arg_0=4, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=6, var_2=1, var_7=4, var_7_arg_0=3, var_7_arg_1=1, var_8=6, var_8_arg_0=2, var_8_arg_1=3] [L70] CALL __VERIFIER_assert(!(bad_19_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L70] RET __VERIFIER_assert(!(bad_19_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=6, next_9_arg_1=4, state_3=6, state_4=4, var_11=15, var_13=0, var_13_arg_0=4, var_13_arg_1=15, var_15=6, var_15_arg_0=6, var_16=3, var_17=1, var_17_arg_0=4, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=6, var_2=1, var_7=4, var_7_arg_0=3, var_7_arg_1=1, var_8=6, var_8_arg_0=2, var_8_arg_1=3] [L72] SORT_1 var_7_arg_0 = state_4; [L73] SORT_1 var_7_arg_1 = var_2; [L74] SORT_1 var_7 = var_7_arg_0 + var_7_arg_1; [L75] var_7 = var_7 & mask_SORT_1 [L76] SORT_1 next_9_arg_1 = var_7; [L77] SORT_1 var_8_arg_0 = state_3; [L78] SORT_1 var_8_arg_1 = state_4; [L79] SORT_1 var_8 = var_8_arg_0 * var_8_arg_1; [L80] SORT_1 next_10_arg_1 = var_8; [L82] state_4 = next_9_arg_1 [L83] state_3 = next_10_arg_1 VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=24, next_9_arg_1=5, state_3=24, state_4=5, var_11=15, var_13=0, var_13_arg_0=4, var_13_arg_1=15, var_15=6, var_15_arg_0=6, var_16=3, var_17=1, var_17_arg_0=4, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=6, var_2=1, var_7=5, var_7_arg_0=4, var_7_arg_1=1, var_8=24, var_8_arg_0=6, var_8_arg_1=4] [L55] SORT_1 var_13_arg_0 = state_4; [L56] SORT_1 var_13_arg_1 = var_11; [L57] SORT_12 var_13 = var_13_arg_0 == var_13_arg_1; [L58] SORT_12 bad_14_arg_0 = var_13; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=24, next_9_arg_1=5, state_3=24, state_4=5, var_11=15, var_13=0, var_13_arg_0=5, var_13_arg_1=15, var_15=6, var_15_arg_0=6, var_16=3, var_17=1, var_17_arg_0=4, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=6, var_2=1, var_7=5, var_7_arg_0=4, var_7_arg_1=1, var_8=24, var_8_arg_0=6, var_8_arg_1=4] [L59] CALL __VERIFIER_assert(!(bad_14_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L59] RET __VERIFIER_assert(!(bad_14_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=24, next_9_arg_1=5, state_3=24, state_4=5, var_11=15, var_13=0, var_13_arg_0=5, var_13_arg_1=15, var_15=6, var_15_arg_0=6, var_16=3, var_17=1, var_17_arg_0=4, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=6, var_2=1, var_7=5, var_7_arg_0=4, var_7_arg_1=1, var_8=24, var_8_arg_0=6, var_8_arg_1=4] [L60] SORT_1 var_17_arg_0 = state_4; [L61] SORT_1 var_17_arg_1 = var_16; [L62] SORT_12 var_17 = var_17_arg_0 > var_17_arg_1; [L63] SORT_1 var_15_arg_0 = state_3; [L64] SORT_12 var_15 = var_15_arg_0 >> 0; [L65] SORT_12 var_18_arg_0 = var_17; [L66] SORT_12 var_18_arg_1 = var_15; [L67] SORT_12 var_18 = var_18_arg_0 & var_18_arg_1; [L68] var_18 = var_18 & mask_SORT_12 [L69] SORT_12 bad_19_arg_0 = var_18; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=24, next_9_arg_1=5, state_3=24, state_4=5, var_11=15, var_13=0, var_13_arg_0=5, var_13_arg_1=15, var_15=24, var_15_arg_0=24, var_16=3, var_17=1, var_17_arg_0=5, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=24, var_2=1, var_7=5, var_7_arg_0=4, var_7_arg_1=1, var_8=24, var_8_arg_0=6, var_8_arg_1=4] [L70] CALL __VERIFIER_assert(!(bad_19_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L70] RET __VERIFIER_assert(!(bad_19_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=24, next_9_arg_1=5, state_3=24, state_4=5, var_11=15, var_13=0, var_13_arg_0=5, var_13_arg_1=15, var_15=24, var_15_arg_0=24, var_16=3, var_17=1, var_17_arg_0=5, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=24, var_2=1, var_7=5, var_7_arg_0=4, var_7_arg_1=1, var_8=24, var_8_arg_0=6, var_8_arg_1=4] [L72] SORT_1 var_7_arg_0 = state_4; [L73] SORT_1 var_7_arg_1 = var_2; [L74] SORT_1 var_7 = var_7_arg_0 + var_7_arg_1; [L75] var_7 = var_7 & mask_SORT_1 [L76] SORT_1 next_9_arg_1 = var_7; [L77] SORT_1 var_8_arg_0 = state_3; [L78] SORT_1 var_8_arg_1 = state_4; [L79] SORT_1 var_8 = var_8_arg_0 * var_8_arg_1; [L80] SORT_1 next_10_arg_1 = var_8; [L82] state_4 = next_9_arg_1 [L83] state_3 = next_10_arg_1 VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=120, next_9_arg_1=6, state_3=120, state_4=6, var_11=15, var_13=0, var_13_arg_0=5, var_13_arg_1=15, var_15=24, var_15_arg_0=24, var_16=3, var_17=1, var_17_arg_0=5, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=24, var_2=1, var_7=6, var_7_arg_0=5, var_7_arg_1=1, var_8=120, var_8_arg_0=24, var_8_arg_1=5] [L55] SORT_1 var_13_arg_0 = state_4; [L56] SORT_1 var_13_arg_1 = var_11; [L57] SORT_12 var_13 = var_13_arg_0 == var_13_arg_1; [L58] SORT_12 bad_14_arg_0 = var_13; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=120, next_9_arg_1=6, state_3=120, state_4=6, var_11=15, var_13=0, var_13_arg_0=6, var_13_arg_1=15, var_15=24, var_15_arg_0=24, var_16=3, var_17=1, var_17_arg_0=5, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=24, var_2=1, var_7=6, var_7_arg_0=5, var_7_arg_1=1, var_8=120, var_8_arg_0=24, var_8_arg_1=5] [L59] CALL __VERIFIER_assert(!(bad_14_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L59] RET __VERIFIER_assert(!(bad_14_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=120, next_9_arg_1=6, state_3=120, state_4=6, var_11=15, var_13=0, var_13_arg_0=6, var_13_arg_1=15, var_15=24, var_15_arg_0=24, var_16=3, var_17=1, var_17_arg_0=5, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=24, var_2=1, var_7=6, var_7_arg_0=5, var_7_arg_1=1, var_8=120, var_8_arg_0=24, var_8_arg_1=5] [L60] SORT_1 var_17_arg_0 = state_4; [L61] SORT_1 var_17_arg_1 = var_16; [L62] SORT_12 var_17 = var_17_arg_0 > var_17_arg_1; [L63] SORT_1 var_15_arg_0 = state_3; [L64] SORT_12 var_15 = var_15_arg_0 >> 0; [L65] SORT_12 var_18_arg_0 = var_17; [L66] SORT_12 var_18_arg_1 = var_15; [L67] SORT_12 var_18 = var_18_arg_0 & var_18_arg_1; [L68] var_18 = var_18 & mask_SORT_12 [L69] SORT_12 bad_19_arg_0 = var_18; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=120, next_9_arg_1=6, state_3=120, state_4=6, var_11=15, var_13=0, var_13_arg_0=6, var_13_arg_1=15, var_15=120, var_15_arg_0=120, var_16=3, var_17=1, var_17_arg_0=6, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=120, var_2=1, var_7=6, var_7_arg_0=5, var_7_arg_1=1, var_8=120, var_8_arg_0=24, var_8_arg_1=5] [L70] CALL __VERIFIER_assert(!(bad_19_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L70] RET __VERIFIER_assert(!(bad_19_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=120, next_9_arg_1=6, state_3=120, state_4=6, var_11=15, var_13=0, var_13_arg_0=6, var_13_arg_1=15, var_15=120, var_15_arg_0=120, var_16=3, var_17=1, var_17_arg_0=6, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=120, var_2=1, var_7=6, var_7_arg_0=5, var_7_arg_1=1, var_8=120, var_8_arg_0=24, var_8_arg_1=5] [L72] SORT_1 var_7_arg_0 = state_4; [L73] SORT_1 var_7_arg_1 = var_2; [L74] SORT_1 var_7 = var_7_arg_0 + var_7_arg_1; [L75] var_7 = var_7 & mask_SORT_1 [L76] SORT_1 next_9_arg_1 = var_7; [L77] SORT_1 var_8_arg_0 = state_3; [L78] SORT_1 var_8_arg_1 = state_4; [L79] SORT_1 var_8 = var_8_arg_0 * var_8_arg_1; [L80] SORT_1 next_10_arg_1 = var_8; [L82] state_4 = next_9_arg_1 [L83] state_3 = next_10_arg_1 VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=208, next_9_arg_1=7, state_3=208, state_4=7, var_11=15, var_13=0, var_13_arg_0=6, var_13_arg_1=15, var_15=120, var_15_arg_0=120, var_16=3, var_17=1, var_17_arg_0=6, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=120, var_2=1, var_7=7, var_7_arg_0=6, var_7_arg_1=1, var_8=208, var_8_arg_0=120, var_8_arg_1=6] [L55] SORT_1 var_13_arg_0 = state_4; [L56] SORT_1 var_13_arg_1 = var_11; [L57] SORT_12 var_13 = var_13_arg_0 == var_13_arg_1; [L58] SORT_12 bad_14_arg_0 = var_13; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=208, next_9_arg_1=7, state_3=208, state_4=7, var_11=15, var_13=0, var_13_arg_0=7, var_13_arg_1=15, var_15=120, var_15_arg_0=120, var_16=3, var_17=1, var_17_arg_0=6, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=120, var_2=1, var_7=7, var_7_arg_0=6, var_7_arg_1=1, var_8=208, var_8_arg_0=120, var_8_arg_1=6] [L59] CALL __VERIFIER_assert(!(bad_14_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L59] RET __VERIFIER_assert(!(bad_14_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=208, next_9_arg_1=7, state_3=208, state_4=7, var_11=15, var_13=0, var_13_arg_0=7, var_13_arg_1=15, var_15=120, var_15_arg_0=120, var_16=3, var_17=1, var_17_arg_0=6, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=120, var_2=1, var_7=7, var_7_arg_0=6, var_7_arg_1=1, var_8=208, var_8_arg_0=120, var_8_arg_1=6] [L60] SORT_1 var_17_arg_0 = state_4; [L61] SORT_1 var_17_arg_1 = var_16; [L62] SORT_12 var_17 = var_17_arg_0 > var_17_arg_1; [L63] SORT_1 var_15_arg_0 = state_3; [L64] SORT_12 var_15 = var_15_arg_0 >> 0; [L65] SORT_12 var_18_arg_0 = var_17; [L66] SORT_12 var_18_arg_1 = var_15; [L67] SORT_12 var_18 = var_18_arg_0 & var_18_arg_1; [L68] var_18 = var_18 & mask_SORT_12 [L69] SORT_12 bad_19_arg_0 = var_18; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=208, next_9_arg_1=7, state_3=208, state_4=7, var_11=15, var_13=0, var_13_arg_0=7, var_13_arg_1=15, var_15=208, var_15_arg_0=208, var_16=3, var_17=1, var_17_arg_0=7, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=208, var_2=1, var_7=7, var_7_arg_0=6, var_7_arg_1=1, var_8=208, var_8_arg_0=120, var_8_arg_1=6] [L70] CALL __VERIFIER_assert(!(bad_19_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L70] RET __VERIFIER_assert(!(bad_19_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=208, next_9_arg_1=7, state_3=208, state_4=7, var_11=15, var_13=0, var_13_arg_0=7, var_13_arg_1=15, var_15=208, var_15_arg_0=208, var_16=3, var_17=1, var_17_arg_0=7, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=208, var_2=1, var_7=7, var_7_arg_0=6, var_7_arg_1=1, var_8=208, var_8_arg_0=120, var_8_arg_1=6] [L72] SORT_1 var_7_arg_0 = state_4; [L73] SORT_1 var_7_arg_1 = var_2; [L74] SORT_1 var_7 = var_7_arg_0 + var_7_arg_1; [L75] var_7 = var_7 & mask_SORT_1 [L76] SORT_1 next_9_arg_1 = var_7; [L77] SORT_1 var_8_arg_0 = state_3; [L78] SORT_1 var_8_arg_1 = state_4; [L79] SORT_1 var_8 = var_8_arg_0 * var_8_arg_1; [L80] SORT_1 next_10_arg_1 = var_8; [L82] state_4 = next_9_arg_1 [L83] state_3 = next_10_arg_1 VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=176, next_9_arg_1=8, state_3=176, state_4=8, var_11=15, var_13=0, var_13_arg_0=7, var_13_arg_1=15, var_15=208, var_15_arg_0=208, var_16=3, var_17=1, var_17_arg_0=7, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=208, var_2=1, var_7=8, var_7_arg_0=7, var_7_arg_1=1, var_8=176, var_8_arg_0=208, var_8_arg_1=7] [L55] SORT_1 var_13_arg_0 = state_4; [L56] SORT_1 var_13_arg_1 = var_11; [L57] SORT_12 var_13 = var_13_arg_0 == var_13_arg_1; [L58] SORT_12 bad_14_arg_0 = var_13; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=176, next_9_arg_1=8, state_3=176, state_4=8, var_11=15, var_13=0, var_13_arg_0=8, var_13_arg_1=15, var_15=208, var_15_arg_0=208, var_16=3, var_17=1, var_17_arg_0=7, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=208, var_2=1, var_7=8, var_7_arg_0=7, var_7_arg_1=1, var_8=176, var_8_arg_0=208, var_8_arg_1=7] [L59] CALL __VERIFIER_assert(!(bad_14_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L59] RET __VERIFIER_assert(!(bad_14_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=176, next_9_arg_1=8, state_3=176, state_4=8, var_11=15, var_13=0, var_13_arg_0=8, var_13_arg_1=15, var_15=208, var_15_arg_0=208, var_16=3, var_17=1, var_17_arg_0=7, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=208, var_2=1, var_7=8, var_7_arg_0=7, var_7_arg_1=1, var_8=176, var_8_arg_0=208, var_8_arg_1=7] [L60] SORT_1 var_17_arg_0 = state_4; [L61] SORT_1 var_17_arg_1 = var_16; [L62] SORT_12 var_17 = var_17_arg_0 > var_17_arg_1; [L63] SORT_1 var_15_arg_0 = state_3; [L64] SORT_12 var_15 = var_15_arg_0 >> 0; [L65] SORT_12 var_18_arg_0 = var_17; [L66] SORT_12 var_18_arg_1 = var_15; [L67] SORT_12 var_18 = var_18_arg_0 & var_18_arg_1; [L68] var_18 = var_18 & mask_SORT_12 [L69] SORT_12 bad_19_arg_0 = var_18; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=176, next_9_arg_1=8, state_3=176, state_4=8, var_11=15, var_13=0, var_13_arg_0=8, var_13_arg_1=15, var_15=176, var_15_arg_0=176, var_16=3, var_17=1, var_17_arg_0=8, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=176, var_2=1, var_7=8, var_7_arg_0=7, var_7_arg_1=1, var_8=176, var_8_arg_0=208, var_8_arg_1=7] [L70] CALL __VERIFIER_assert(!(bad_19_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L70] RET __VERIFIER_assert(!(bad_19_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=176, next_9_arg_1=8, state_3=176, state_4=8, var_11=15, var_13=0, var_13_arg_0=8, var_13_arg_1=15, var_15=176, var_15_arg_0=176, var_16=3, var_17=1, var_17_arg_0=8, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=176, var_2=1, var_7=8, var_7_arg_0=7, var_7_arg_1=1, var_8=176, var_8_arg_0=208, var_8_arg_1=7] [L72] SORT_1 var_7_arg_0 = state_4; [L73] SORT_1 var_7_arg_1 = var_2; [L74] SORT_1 var_7 = var_7_arg_0 + var_7_arg_1; [L75] var_7 = var_7 & mask_SORT_1 [L76] SORT_1 next_9_arg_1 = var_7; [L77] SORT_1 var_8_arg_0 = state_3; [L78] SORT_1 var_8_arg_1 = state_4; [L79] SORT_1 var_8 = var_8_arg_0 * var_8_arg_1; [L80] SORT_1 next_10_arg_1 = var_8; [L82] state_4 = next_9_arg_1 [L83] state_3 = next_10_arg_1 VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=128, next_9_arg_1=9, state_3=128, state_4=9, var_11=15, var_13=0, var_13_arg_0=8, var_13_arg_1=15, var_15=176, var_15_arg_0=176, var_16=3, var_17=1, var_17_arg_0=8, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=176, var_2=1, var_7=9, var_7_arg_0=8, var_7_arg_1=1, var_8=128, var_8_arg_0=176, var_8_arg_1=8] [L55] SORT_1 var_13_arg_0 = state_4; [L56] SORT_1 var_13_arg_1 = var_11; [L57] SORT_12 var_13 = var_13_arg_0 == var_13_arg_1; [L58] SORT_12 bad_14_arg_0 = var_13; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=128, next_9_arg_1=9, state_3=128, state_4=9, var_11=15, var_13=0, var_13_arg_0=9, var_13_arg_1=15, var_15=176, var_15_arg_0=176, var_16=3, var_17=1, var_17_arg_0=8, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=176, var_2=1, var_7=9, var_7_arg_0=8, var_7_arg_1=1, var_8=128, var_8_arg_0=176, var_8_arg_1=8] [L59] CALL __VERIFIER_assert(!(bad_14_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L59] RET __VERIFIER_assert(!(bad_14_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=128, next_9_arg_1=9, state_3=128, state_4=9, var_11=15, var_13=0, var_13_arg_0=9, var_13_arg_1=15, var_15=176, var_15_arg_0=176, var_16=3, var_17=1, var_17_arg_0=8, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=176, var_2=1, var_7=9, var_7_arg_0=8, var_7_arg_1=1, var_8=128, var_8_arg_0=176, var_8_arg_1=8] [L60] SORT_1 var_17_arg_0 = state_4; [L61] SORT_1 var_17_arg_1 = var_16; [L62] SORT_12 var_17 = var_17_arg_0 > var_17_arg_1; [L63] SORT_1 var_15_arg_0 = state_3; [L64] SORT_12 var_15 = var_15_arg_0 >> 0; [L65] SORT_12 var_18_arg_0 = var_17; [L66] SORT_12 var_18_arg_1 = var_15; [L67] SORT_12 var_18 = var_18_arg_0 & var_18_arg_1; [L68] var_18 = var_18 & mask_SORT_12 [L69] SORT_12 bad_19_arg_0 = var_18; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=128, next_9_arg_1=9, state_3=128, state_4=9, var_11=15, var_13=0, var_13_arg_0=9, var_13_arg_1=15, var_15=128, var_15_arg_0=128, var_16=3, var_17=1, var_17_arg_0=9, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=128, var_2=1, var_7=9, var_7_arg_0=8, var_7_arg_1=1, var_8=128, var_8_arg_0=176, var_8_arg_1=8] [L70] CALL __VERIFIER_assert(!(bad_19_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L70] RET __VERIFIER_assert(!(bad_19_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=128, next_9_arg_1=9, state_3=128, state_4=9, var_11=15, var_13=0, var_13_arg_0=9, var_13_arg_1=15, var_15=128, var_15_arg_0=128, var_16=3, var_17=1, var_17_arg_0=9, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=128, var_2=1, var_7=9, var_7_arg_0=8, var_7_arg_1=1, var_8=128, var_8_arg_0=176, var_8_arg_1=8] [L72] SORT_1 var_7_arg_0 = state_4; [L73] SORT_1 var_7_arg_1 = var_2; [L74] SORT_1 var_7 = var_7_arg_0 + var_7_arg_1; [L75] var_7 = var_7 & mask_SORT_1 [L76] SORT_1 next_9_arg_1 = var_7; [L77] SORT_1 var_8_arg_0 = state_3; [L78] SORT_1 var_8_arg_1 = state_4; [L79] SORT_1 var_8 = var_8_arg_0 * var_8_arg_1; [L80] SORT_1 next_10_arg_1 = var_8; [L82] state_4 = next_9_arg_1 [L83] state_3 = next_10_arg_1 VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=128, next_9_arg_1=10, state_3=128, state_4=10, var_11=15, var_13=0, var_13_arg_0=9, var_13_arg_1=15, var_15=128, var_15_arg_0=128, var_16=3, var_17=1, var_17_arg_0=9, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=128, var_2=1, var_7=10, var_7_arg_0=9, var_7_arg_1=1, var_8=128, var_8_arg_0=128, var_8_arg_1=9] [L55] SORT_1 var_13_arg_0 = state_4; [L56] SORT_1 var_13_arg_1 = var_11; [L57] SORT_12 var_13 = var_13_arg_0 == var_13_arg_1; [L58] SORT_12 bad_14_arg_0 = var_13; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=128, next_9_arg_1=10, state_3=128, state_4=10, var_11=15, var_13=0, var_13_arg_0=10, var_13_arg_1=15, var_15=128, var_15_arg_0=128, var_16=3, var_17=1, var_17_arg_0=9, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=128, var_2=1, var_7=10, var_7_arg_0=9, var_7_arg_1=1, var_8=128, var_8_arg_0=128, var_8_arg_1=9] [L59] CALL __VERIFIER_assert(!(bad_14_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L59] RET __VERIFIER_assert(!(bad_14_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=128, next_9_arg_1=10, state_3=128, state_4=10, var_11=15, var_13=0, var_13_arg_0=10, var_13_arg_1=15, var_15=128, var_15_arg_0=128, var_16=3, var_17=1, var_17_arg_0=9, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=128, var_2=1, var_7=10, var_7_arg_0=9, var_7_arg_1=1, var_8=128, var_8_arg_0=128, var_8_arg_1=9] [L60] SORT_1 var_17_arg_0 = state_4; [L61] SORT_1 var_17_arg_1 = var_16; [L62] SORT_12 var_17 = var_17_arg_0 > var_17_arg_1; [L63] SORT_1 var_15_arg_0 = state_3; [L64] SORT_12 var_15 = var_15_arg_0 >> 0; [L65] SORT_12 var_18_arg_0 = var_17; [L66] SORT_12 var_18_arg_1 = var_15; [L67] SORT_12 var_18 = var_18_arg_0 & var_18_arg_1; [L68] var_18 = var_18 & mask_SORT_12 [L69] SORT_12 bad_19_arg_0 = var_18; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=128, next_9_arg_1=10, state_3=128, state_4=10, var_11=15, var_13=0, var_13_arg_0=10, var_13_arg_1=15, var_15=128, var_15_arg_0=128, var_16=3, var_17=1, var_17_arg_0=10, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=128, var_2=1, var_7=10, var_7_arg_0=9, var_7_arg_1=1, var_8=128, var_8_arg_0=128, var_8_arg_1=9] [L70] CALL __VERIFIER_assert(!(bad_19_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L70] RET __VERIFIER_assert(!(bad_19_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=128, next_9_arg_1=10, state_3=128, state_4=10, var_11=15, var_13=0, var_13_arg_0=10, var_13_arg_1=15, var_15=128, var_15_arg_0=128, var_16=3, var_17=1, var_17_arg_0=10, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=128, var_2=1, var_7=10, var_7_arg_0=9, var_7_arg_1=1, var_8=128, var_8_arg_0=128, var_8_arg_1=9] [L72] SORT_1 var_7_arg_0 = state_4; [L73] SORT_1 var_7_arg_1 = var_2; [L74] SORT_1 var_7 = var_7_arg_0 + var_7_arg_1; [L75] var_7 = var_7 & mask_SORT_1 [L76] SORT_1 next_9_arg_1 = var_7; [L77] SORT_1 var_8_arg_0 = state_3; [L78] SORT_1 var_8_arg_1 = state_4; [L79] SORT_1 var_8 = var_8_arg_0 * var_8_arg_1; [L80] SORT_1 next_10_arg_1 = var_8; [L82] state_4 = next_9_arg_1 [L83] state_3 = next_10_arg_1 VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=11, state_3=0, state_4=11, var_11=15, var_13=0, var_13_arg_0=10, var_13_arg_1=15, var_15=128, var_15_arg_0=128, var_16=3, var_17=1, var_17_arg_0=10, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=128, var_2=1, var_7=11, var_7_arg_0=10, var_7_arg_1=1, var_8=0, var_8_arg_0=128, var_8_arg_1=10] [L55] SORT_1 var_13_arg_0 = state_4; [L56] SORT_1 var_13_arg_1 = var_11; [L57] SORT_12 var_13 = var_13_arg_0 == var_13_arg_1; [L58] SORT_12 bad_14_arg_0 = var_13; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=11, state_3=0, state_4=11, var_11=15, var_13=0, var_13_arg_0=11, var_13_arg_1=15, var_15=128, var_15_arg_0=128, var_16=3, var_17=1, var_17_arg_0=10, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=128, var_2=1, var_7=11, var_7_arg_0=10, var_7_arg_1=1, var_8=0, var_8_arg_0=128, var_8_arg_1=10] [L59] CALL __VERIFIER_assert(!(bad_14_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L59] RET __VERIFIER_assert(!(bad_14_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=11, state_3=0, state_4=11, var_11=15, var_13=0, var_13_arg_0=11, var_13_arg_1=15, var_15=128, var_15_arg_0=128, var_16=3, var_17=1, var_17_arg_0=10, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=128, var_2=1, var_7=11, var_7_arg_0=10, var_7_arg_1=1, var_8=0, var_8_arg_0=128, var_8_arg_1=10] [L60] SORT_1 var_17_arg_0 = state_4; [L61] SORT_1 var_17_arg_1 = var_16; [L62] SORT_12 var_17 = var_17_arg_0 > var_17_arg_1; [L63] SORT_1 var_15_arg_0 = state_3; [L64] SORT_12 var_15 = var_15_arg_0 >> 0; [L65] SORT_12 var_18_arg_0 = var_17; [L66] SORT_12 var_18_arg_1 = var_15; [L67] SORT_12 var_18 = var_18_arg_0 & var_18_arg_1; [L68] var_18 = var_18 & mask_SORT_12 [L69] SORT_12 bad_19_arg_0 = var_18; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=11, state_3=0, state_4=11, var_11=15, var_13=0, var_13_arg_0=11, var_13_arg_1=15, var_15=0, var_15_arg_0=0, var_16=3, var_17=1, var_17_arg_0=11, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=0, var_2=1, var_7=11, var_7_arg_0=10, var_7_arg_1=1, var_8=0, var_8_arg_0=128, var_8_arg_1=10] [L70] CALL __VERIFIER_assert(!(bad_19_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L70] RET __VERIFIER_assert(!(bad_19_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=11, state_3=0, state_4=11, var_11=15, var_13=0, var_13_arg_0=11, var_13_arg_1=15, var_15=0, var_15_arg_0=0, var_16=3, var_17=1, var_17_arg_0=11, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=0, var_2=1, var_7=11, var_7_arg_0=10, var_7_arg_1=1, var_8=0, var_8_arg_0=128, var_8_arg_1=10] [L72] SORT_1 var_7_arg_0 = state_4; [L73] SORT_1 var_7_arg_1 = var_2; [L74] SORT_1 var_7 = var_7_arg_0 + var_7_arg_1; [L75] var_7 = var_7 & mask_SORT_1 [L76] SORT_1 next_9_arg_1 = var_7; [L77] SORT_1 var_8_arg_0 = state_3; [L78] SORT_1 var_8_arg_1 = state_4; [L79] SORT_1 var_8 = var_8_arg_0 * var_8_arg_1; [L80] SORT_1 next_10_arg_1 = var_8; [L82] state_4 = next_9_arg_1 [L83] state_3 = next_10_arg_1 VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=12, state_3=0, state_4=12, var_11=15, var_13=0, var_13_arg_0=11, var_13_arg_1=15, var_15=0, var_15_arg_0=0, var_16=3, var_17=1, var_17_arg_0=11, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=0, var_2=1, var_7=12, var_7_arg_0=11, var_7_arg_1=1, var_8=0, var_8_arg_0=0, var_8_arg_1=11] [L55] SORT_1 var_13_arg_0 = state_4; [L56] SORT_1 var_13_arg_1 = var_11; [L57] SORT_12 var_13 = var_13_arg_0 == var_13_arg_1; [L58] SORT_12 bad_14_arg_0 = var_13; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=12, state_3=0, state_4=12, var_11=15, var_13=0, var_13_arg_0=12, var_13_arg_1=15, var_15=0, var_15_arg_0=0, var_16=3, var_17=1, var_17_arg_0=11, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=0, var_2=1, var_7=12, var_7_arg_0=11, var_7_arg_1=1, var_8=0, var_8_arg_0=0, var_8_arg_1=11] [L59] CALL __VERIFIER_assert(!(bad_14_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L59] RET __VERIFIER_assert(!(bad_14_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=12, state_3=0, state_4=12, var_11=15, var_13=0, var_13_arg_0=12, var_13_arg_1=15, var_15=0, var_15_arg_0=0, var_16=3, var_17=1, var_17_arg_0=11, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=0, var_2=1, var_7=12, var_7_arg_0=11, var_7_arg_1=1, var_8=0, var_8_arg_0=0, var_8_arg_1=11] [L60] SORT_1 var_17_arg_0 = state_4; [L61] SORT_1 var_17_arg_1 = var_16; [L62] SORT_12 var_17 = var_17_arg_0 > var_17_arg_1; [L63] SORT_1 var_15_arg_0 = state_3; [L64] SORT_12 var_15 = var_15_arg_0 >> 0; [L65] SORT_12 var_18_arg_0 = var_17; [L66] SORT_12 var_18_arg_1 = var_15; [L67] SORT_12 var_18 = var_18_arg_0 & var_18_arg_1; [L68] var_18 = var_18 & mask_SORT_12 [L69] SORT_12 bad_19_arg_0 = var_18; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=12, state_3=0, state_4=12, var_11=15, var_13=0, var_13_arg_0=12, var_13_arg_1=15, var_15=0, var_15_arg_0=0, var_16=3, var_17=1, var_17_arg_0=12, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=0, var_2=1, var_7=12, var_7_arg_0=11, var_7_arg_1=1, var_8=0, var_8_arg_0=0, var_8_arg_1=11] [L70] CALL __VERIFIER_assert(!(bad_19_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L70] RET __VERIFIER_assert(!(bad_19_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=12, state_3=0, state_4=12, var_11=15, var_13=0, var_13_arg_0=12, var_13_arg_1=15, var_15=0, var_15_arg_0=0, var_16=3, var_17=1, var_17_arg_0=12, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=0, var_2=1, var_7=12, var_7_arg_0=11, var_7_arg_1=1, var_8=0, var_8_arg_0=0, var_8_arg_1=11] [L72] SORT_1 var_7_arg_0 = state_4; [L73] SORT_1 var_7_arg_1 = var_2; [L74] SORT_1 var_7 = var_7_arg_0 + var_7_arg_1; [L75] var_7 = var_7 & mask_SORT_1 [L76] SORT_1 next_9_arg_1 = var_7; [L77] SORT_1 var_8_arg_0 = state_3; [L78] SORT_1 var_8_arg_1 = state_4; [L79] SORT_1 var_8 = var_8_arg_0 * var_8_arg_1; [L80] SORT_1 next_10_arg_1 = var_8; [L82] state_4 = next_9_arg_1 [L83] state_3 = next_10_arg_1 VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=13, state_3=0, state_4=13, var_11=15, var_13=0, var_13_arg_0=12, var_13_arg_1=15, var_15=0, var_15_arg_0=0, var_16=3, var_17=1, var_17_arg_0=12, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=0, var_2=1, var_7=13, var_7_arg_0=12, var_7_arg_1=1, var_8=0, var_8_arg_0=0, var_8_arg_1=12] [L55] SORT_1 var_13_arg_0 = state_4; [L56] SORT_1 var_13_arg_1 = var_11; [L57] SORT_12 var_13 = var_13_arg_0 == var_13_arg_1; [L58] SORT_12 bad_14_arg_0 = var_13; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=13, state_3=0, state_4=13, var_11=15, var_13=0, var_13_arg_0=13, var_13_arg_1=15, var_15=0, var_15_arg_0=0, var_16=3, var_17=1, var_17_arg_0=12, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=0, var_2=1, var_7=13, var_7_arg_0=12, var_7_arg_1=1, var_8=0, var_8_arg_0=0, var_8_arg_1=12] [L59] CALL __VERIFIER_assert(!(bad_14_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L59] RET __VERIFIER_assert(!(bad_14_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=13, state_3=0, state_4=13, var_11=15, var_13=0, var_13_arg_0=13, var_13_arg_1=15, var_15=0, var_15_arg_0=0, var_16=3, var_17=1, var_17_arg_0=12, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=0, var_2=1, var_7=13, var_7_arg_0=12, var_7_arg_1=1, var_8=0, var_8_arg_0=0, var_8_arg_1=12] [L60] SORT_1 var_17_arg_0 = state_4; [L61] SORT_1 var_17_arg_1 = var_16; [L62] SORT_12 var_17 = var_17_arg_0 > var_17_arg_1; [L63] SORT_1 var_15_arg_0 = state_3; [L64] SORT_12 var_15 = var_15_arg_0 >> 0; [L65] SORT_12 var_18_arg_0 = var_17; [L66] SORT_12 var_18_arg_1 = var_15; [L67] SORT_12 var_18 = var_18_arg_0 & var_18_arg_1; [L68] var_18 = var_18 & mask_SORT_12 [L69] SORT_12 bad_19_arg_0 = var_18; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=13, state_3=0, state_4=13, var_11=15, var_13=0, var_13_arg_0=13, var_13_arg_1=15, var_15=0, var_15_arg_0=0, var_16=3, var_17=1, var_17_arg_0=13, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=0, var_2=1, var_7=13, var_7_arg_0=12, var_7_arg_1=1, var_8=0, var_8_arg_0=0, var_8_arg_1=12] [L70] CALL __VERIFIER_assert(!(bad_19_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L70] RET __VERIFIER_assert(!(bad_19_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=13, state_3=0, state_4=13, var_11=15, var_13=0, var_13_arg_0=13, var_13_arg_1=15, var_15=0, var_15_arg_0=0, var_16=3, var_17=1, var_17_arg_0=13, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=0, var_2=1, var_7=13, var_7_arg_0=12, var_7_arg_1=1, var_8=0, var_8_arg_0=0, var_8_arg_1=12] [L72] SORT_1 var_7_arg_0 = state_4; [L73] SORT_1 var_7_arg_1 = var_2; [L74] SORT_1 var_7 = var_7_arg_0 + var_7_arg_1; [L75] var_7 = var_7 & mask_SORT_1 [L76] SORT_1 next_9_arg_1 = var_7; [L77] SORT_1 var_8_arg_0 = state_3; [L78] SORT_1 var_8_arg_1 = state_4; [L79] SORT_1 var_8 = var_8_arg_0 * var_8_arg_1; [L80] SORT_1 next_10_arg_1 = var_8; [L82] state_4 = next_9_arg_1 [L83] state_3 = next_10_arg_1 VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=14, state_3=0, state_4=14, var_11=15, var_13=0, var_13_arg_0=13, var_13_arg_1=15, var_15=0, var_15_arg_0=0, var_16=3, var_17=1, var_17_arg_0=13, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=0, var_2=1, var_7=14, var_7_arg_0=13, var_7_arg_1=1, var_8=0, var_8_arg_0=0, var_8_arg_1=13] [L55] SORT_1 var_13_arg_0 = state_4; [L56] SORT_1 var_13_arg_1 = var_11; [L57] SORT_12 var_13 = var_13_arg_0 == var_13_arg_1; [L58] SORT_12 bad_14_arg_0 = var_13; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=14, state_3=0, state_4=14, var_11=15, var_13=0, var_13_arg_0=14, var_13_arg_1=15, var_15=0, var_15_arg_0=0, var_16=3, var_17=1, var_17_arg_0=13, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=0, var_2=1, var_7=14, var_7_arg_0=13, var_7_arg_1=1, var_8=0, var_8_arg_0=0, var_8_arg_1=13] [L59] CALL __VERIFIER_assert(!(bad_14_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L59] RET __VERIFIER_assert(!(bad_14_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=14, state_3=0, state_4=14, var_11=15, var_13=0, var_13_arg_0=14, var_13_arg_1=15, var_15=0, var_15_arg_0=0, var_16=3, var_17=1, var_17_arg_0=13, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=0, var_2=1, var_7=14, var_7_arg_0=13, var_7_arg_1=1, var_8=0, var_8_arg_0=0, var_8_arg_1=13] [L60] SORT_1 var_17_arg_0 = state_4; [L61] SORT_1 var_17_arg_1 = var_16; [L62] SORT_12 var_17 = var_17_arg_0 > var_17_arg_1; [L63] SORT_1 var_15_arg_0 = state_3; [L64] SORT_12 var_15 = var_15_arg_0 >> 0; [L65] SORT_12 var_18_arg_0 = var_17; [L66] SORT_12 var_18_arg_1 = var_15; [L67] SORT_12 var_18 = var_18_arg_0 & var_18_arg_1; [L68] var_18 = var_18 & mask_SORT_12 [L69] SORT_12 bad_19_arg_0 = var_18; VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=14, state_3=0, state_4=14, var_11=15, var_13=0, var_13_arg_0=14, var_13_arg_1=15, var_15=0, var_15_arg_0=0, var_16=3, var_17=1, var_17_arg_0=14, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=0, var_2=1, var_7=14, var_7_arg_0=13, var_7_arg_1=1, var_8=0, var_8_arg_0=0, var_8_arg_1=13] [L70] CALL __VERIFIER_assert(!(bad_19_arg_0)) VAL [\old(cond)=1] [L28] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L70] RET __VERIFIER_assert(!(bad_19_arg_0)) VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=14, state_3=0, state_4=14, var_11=15, var_13=0, var_13_arg_0=14, var_13_arg_1=15, var_15=0, var_15_arg_0=0, var_16=3, var_17=1, var_17_arg_0=14, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=0, var_2=1, var_7=14, var_7_arg_0=13, var_7_arg_1=1, var_8=0, var_8_arg_0=0, var_8_arg_1=13] [L72] SORT_1 var_7_arg_0 = state_4; [L73] SORT_1 var_7_arg_1 = var_2; [L74] SORT_1 var_7 = var_7_arg_0 + var_7_arg_1; [L75] var_7 = var_7 & mask_SORT_1 [L76] SORT_1 next_9_arg_1 = var_7; [L77] SORT_1 var_8_arg_0 = state_3; [L78] SORT_1 var_8_arg_1 = state_4; [L79] SORT_1 var_8 = var_8_arg_0 * var_8_arg_1; [L80] SORT_1 next_10_arg_1 = var_8; [L82] state_4 = next_9_arg_1 [L83] state_3 = next_10_arg_1 VAL [bad_14_arg_0=0, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=15, state_3=0, state_4=15, var_11=15, var_13=0, var_13_arg_0=14, var_13_arg_1=15, var_15=0, var_15_arg_0=0, var_16=3, var_17=1, var_17_arg_0=14, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=0, var_2=1, var_7=15, var_7_arg_0=14, var_7_arg_1=1, var_8=0, var_8_arg_0=0, var_8_arg_1=14] [L55] SORT_1 var_13_arg_0 = state_4; [L56] SORT_1 var_13_arg_1 = var_11; [L57] SORT_12 var_13 = var_13_arg_0 == var_13_arg_1; [L58] SORT_12 bad_14_arg_0 = var_13; VAL [bad_14_arg_0=1, bad_19_arg_0=0, init_5_arg_1=1, init_6_arg_1=1, mask_SORT_1=15, mask_SORT_12=1, msb_SORT_1=8, msb_SORT_12=1, next_10_arg_1=0, next_9_arg_1=15, state_3=0, state_4=15, var_11=15, var_13=1, var_13_arg_0=15, var_13_arg_1=15, var_15=0, var_15_arg_0=0, var_16=3, var_17=1, var_17_arg_0=14, var_17_arg_1=3, var_18=0, var_18_arg_0=1, var_18_arg_1=0, var_2=1, var_7=15, var_7_arg_0=14, var_7_arg_1=1, var_8=0, var_8_arg_0=0, var_8_arg_1=14] [L59] CALL __VERIFIER_assert(!(bad_14_arg_0)) VAL [\old(cond)=0] [L28] COND TRUE !(cond) VAL [\old(cond)=0, cond=0] [L28] reach_error() VAL [\old(cond)=0, cond=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 2 procedures, 17 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 21.4s, OverallIterations: 8, TraceHistogramMax: 29, PathProgramHistogramMax: 6, EmptinessCheckTime: 0.0s, AutomataDifference: 6.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 206 SdHoareTripleChecker+Valid, 3.2s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 201 mSDsluCounter, 549 SdHoareTripleChecker+Invalid, 2.9s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 452 mSDsCounter, 187 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 2056 IncrementalHoareTripleChecker+Invalid, 2243 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 187 mSolverCounterUnsat, 97 mSDtfsCounter, 2056 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 1496 GetRequests, 1353 SyntacticMatches, 4 SemanticMatches, 139 ConstructedPredicates, 0 IntricatePredicates, 1 DeprecatedPredicates, 624 ImplicationChecksByTransitivity, 5.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=138occurred in iteration=7, InterpolantAutomatonStates: 93, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.2s AutomataMinimizationTime, 7 MinimizatonAttempts, 17 StatesRemovedByMinimization, 5 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.3s SsaConstructionTime, 1.2s SatisfiabilityAnalysisTime, 8.7s InterpolantComputationTime, 1013 NumberOfCodeBlocks, 995 NumberOfCodeBlocksAsserted, 90 NumberOfCheckSat, 1407 ConstructedInterpolants, 28 QuantifiedInterpolants, 20755 SizeOfPredicates, 414 NumberOfNonLiveVariables, 2359 ConjunctsInSsa, 503 ConjunctsInUnsatCore, 26 InterpolantComputations, 2 PerfectInterpolantSequences, 4738/6389 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2022-11-26 00:55:57,636 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_84631197-409c-42bc-a031-abb5f3e68d0e/bin/utaipan-ByfvJB40ur/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE