./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.safe_analog_estimation_convergence.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 38b53e6a Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.safe_analog_estimation_convergence.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/config/svcomp-Reach-64bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 4de94aaabb885b39de7c063dad9a583cbef1a5037a721fe952ddb512087f6e33 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-38b53e6 [2022-11-25 23:37:29,527 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-25 23:37:29,529 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-25 23:37:29,559 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-25 23:37:29,559 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-25 23:37:29,560 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-25 23:37:29,563 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-25 23:37:29,568 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-25 23:37:29,571 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-25 23:37:29,576 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-25 23:37:29,578 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-25 23:37:29,580 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-25 23:37:29,580 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-25 23:37:29,583 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-25 23:37:29,586 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-25 23:37:29,588 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-25 23:37:29,590 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-25 23:37:29,590 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-25 23:37:29,592 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-25 23:37:29,599 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-25 23:37:29,601 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-25 23:37:29,603 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-25 23:37:29,605 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-25 23:37:29,605 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-25 23:37:29,615 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-25 23:37:29,615 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-25 23:37:29,616 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-25 23:37:29,617 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-25 23:37:29,618 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-25 23:37:29,619 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-25 23:37:29,619 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-25 23:37:29,620 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-25 23:37:29,623 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-25 23:37:29,625 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-25 23:37:29,627 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-25 23:37:29,628 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-25 23:37:29,628 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-25 23:37:29,629 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-25 23:37:29,629 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-25 23:37:29,630 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-25 23:37:29,630 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-25 23:37:29,631 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/config/svcomp-Reach-64bit-Taipan_Default.epf [2022-11-25 23:37:29,673 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-25 23:37:29,673 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-25 23:37:29,674 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-25 23:37:29,674 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-25 23:37:29,675 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-25 23:37:29,675 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-25 23:37:29,675 INFO L138 SettingsManager]: * User list type=DISABLED [2022-11-25 23:37:29,675 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-11-25 23:37:29,676 INFO L138 SettingsManager]: * Explicit value domain=true [2022-11-25 23:37:29,676 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2022-11-25 23:37:29,677 INFO L138 SettingsManager]: * Octagon Domain=false [2022-11-25 23:37:29,677 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-11-25 23:37:29,677 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2022-11-25 23:37:29,677 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2022-11-25 23:37:29,677 INFO L138 SettingsManager]: * Interval Domain=false [2022-11-25 23:37:29,678 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2022-11-25 23:37:29,678 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2022-11-25 23:37:29,678 INFO L138 SettingsManager]: * Simplification Technique=POLY_PAC [2022-11-25 23:37:29,679 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-25 23:37:29,679 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-25 23:37:29,679 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-25 23:37:29,679 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-25 23:37:29,679 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-25 23:37:29,680 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-25 23:37:29,680 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-25 23:37:29,680 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-25 23:37:29,681 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-25 23:37:29,681 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-25 23:37:29,681 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-25 23:37:29,681 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-25 23:37:29,681 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-25 23:37:29,682 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2022-11-25 23:37:29,682 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-25 23:37:29,682 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-25 23:37:29,682 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2022-11-25 23:37:29,682 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-11-25 23:37:29,683 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-25 23:37:29,683 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-11-25 23:37:29,683 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 4de94aaabb885b39de7c063dad9a583cbef1a5037a721fe952ddb512087f6e33 [2022-11-25 23:37:29,992 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-25 23:37:30,015 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-25 23:37:30,018 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-25 23:37:30,019 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-25 23:37:30,020 INFO L275 PluginConnector]: CDTParser initialized [2022-11-25 23:37:30,021 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.safe_analog_estimation_convergence.c [2022-11-25 23:37:33,173 INFO L500 CDTParser]: Created temporary CDT project at NULL [2022-11-25 23:37:33,422 INFO L351 CDTParser]: Found 1 translation units. [2022-11-25 23:37:33,422 INFO L172 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.safe_analog_estimation_convergence.c [2022-11-25 23:37:33,431 INFO L394 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/data/a6c736134/d27a16a4090047a49c86468b881cae22/FLAGf6e65bb3b [2022-11-25 23:37:33,451 INFO L402 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/data/a6c736134/d27a16a4090047a49c86468b881cae22 [2022-11-25 23:37:33,454 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-25 23:37:33,455 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-25 23:37:33,457 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-25 23:37:33,457 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-25 23:37:33,461 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-25 23:37:33,467 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 25.11 11:37:33" (1/1) ... [2022-11-25 23:37:33,468 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7ecc7e49 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 11:37:33, skipping insertion in model container [2022-11-25 23:37:33,468 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 25.11 11:37:33" (1/1) ... [2022-11-25 23:37:33,475 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-25 23:37:33,509 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-25 23:37:33,643 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.safe_analog_estimation_convergence.c[1120,1133] [2022-11-25 23:37:33,827 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-25 23:37:33,837 INFO L203 MainTranslator]: Completed pre-run [2022-11-25 23:37:33,848 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.safe_analog_estimation_convergence.c[1120,1133] [2022-11-25 23:37:33,989 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-25 23:37:34,002 INFO L208 MainTranslator]: Completed translation [2022-11-25 23:37:34,002 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 11:37:34 WrapperNode [2022-11-25 23:37:34,003 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-25 23:37:34,004 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-25 23:37:34,004 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-25 23:37:34,004 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-25 23:37:34,012 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 11:37:34" (1/1) ... [2022-11-25 23:37:34,026 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 11:37:34" (1/1) ... [2022-11-25 23:37:34,085 INFO L138 Inliner]: procedures = 11, calls = 5, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 413 [2022-11-25 23:37:34,086 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-25 23:37:34,086 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-25 23:37:34,086 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-25 23:37:34,087 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-25 23:37:34,096 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 11:37:34" (1/1) ... [2022-11-25 23:37:34,097 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 11:37:34" (1/1) ... [2022-11-25 23:37:34,109 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 11:37:34" (1/1) ... [2022-11-25 23:37:34,109 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 11:37:34" (1/1) ... [2022-11-25 23:37:34,125 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 11:37:34" (1/1) ... [2022-11-25 23:37:34,129 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 11:37:34" (1/1) ... [2022-11-25 23:37:34,132 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 11:37:34" (1/1) ... [2022-11-25 23:37:34,135 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 11:37:34" (1/1) ... [2022-11-25 23:37:34,141 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-25 23:37:34,142 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-25 23:37:34,142 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-25 23:37:34,142 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-25 23:37:34,143 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 11:37:34" (1/1) ... [2022-11-25 23:37:34,162 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-25 23:37:34,174 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/z3 [2022-11-25 23:37:34,197 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-25 23:37:34,223 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-25 23:37:34,241 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-25 23:37:34,241 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-25 23:37:34,242 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2022-11-25 23:37:34,243 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2022-11-25 23:37:34,480 INFO L235 CfgBuilder]: Building ICFG [2022-11-25 23:37:34,492 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-25 23:37:36,104 INFO L276 CfgBuilder]: Performing block encoding [2022-11-25 23:37:36,129 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-25 23:37:36,129 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-25 23:37:36,132 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 25.11 11:37:36 BoogieIcfgContainer [2022-11-25 23:37:36,132 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-25 23:37:36,134 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-25 23:37:36,134 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-25 23:37:36,137 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-25 23:37:36,138 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 25.11 11:37:33" (1/3) ... [2022-11-25 23:37:36,138 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@51164f3d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 25.11 11:37:36, skipping insertion in model container [2022-11-25 23:37:36,139 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 11:37:34" (2/3) ... [2022-11-25 23:37:36,139 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@51164f3d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 25.11 11:37:36, skipping insertion in model container [2022-11-25 23:37:36,139 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 25.11 11:37:36" (3/3) ... [2022-11-25 23:37:36,140 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.safe_analog_estimation_convergence.c [2022-11-25 23:37:36,159 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-25 23:37:36,160 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-25 23:37:36,204 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-25 23:37:36,210 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@77a38757, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-25 23:37:36,211 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-25 23:37:36,214 INFO L276 IsEmpty]: Start isEmpty. Operand has 13 states, 8 states have (on average 1.375) internal successors, (11), 9 states have internal predecessors, (11), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-25 23:37:36,221 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2022-11-25 23:37:36,221 INFO L187 NwaCegarLoop]: Found error trace [2022-11-25 23:37:36,221 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-25 23:37:36,222 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-25 23:37:36,227 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 23:37:36,227 INFO L85 PathProgramCache]: Analyzing trace with hash 694370680, now seen corresponding path program 1 times [2022-11-25 23:37:36,235 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-25 23:37:36,236 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [790987299] [2022-11-25 23:37:36,236 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 23:37:36,237 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 23:37:37,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 23:37:37,931 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-25 23:37:39,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 23:37:39,351 INFO L130 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2022-11-25 23:37:39,353 INFO L360 BasicCegarLoop]: Counterexample is feasible [2022-11-25 23:37:39,354 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-11-25 23:37:39,356 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-11-25 23:37:39,361 INFO L445 BasicCegarLoop]: Path program histogram: [1] [2022-11-25 23:37:39,368 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-25 23:37:39,436 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-25 23:37:39,462 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 25.11 11:37:39 BoogieIcfgContainer [2022-11-25 23:37:39,462 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-25 23:37:39,464 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-25 23:37:39,465 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-25 23:37:39,465 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-25 23:37:39,466 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 25.11 11:37:36" (3/4) ... [2022-11-25 23:37:39,470 INFO L140 WitnessPrinter]: No result that supports witness generation found [2022-11-25 23:37:39,470 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-25 23:37:39,472 INFO L158 Benchmark]: Toolchain (without parser) took 6015.92ms. Allocated memory was 174.1MB in the beginning and 241.2MB in the end (delta: 67.1MB). Free memory was 127.1MB in the beginning and 86.1MB in the end (delta: 41.0MB). Peak memory consumption was 109.7MB. Max. memory is 16.1GB. [2022-11-25 23:37:39,472 INFO L158 Benchmark]: CDTParser took 0.32ms. Allocated memory is still 174.1MB. Free memory is still 144.5MB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-25 23:37:39,473 INFO L158 Benchmark]: CACSL2BoogieTranslator took 546.27ms. Allocated memory is still 174.1MB. Free memory was 127.1MB in the beginning and 105.4MB in the end (delta: 21.7MB). Peak memory consumption was 21.0MB. Max. memory is 16.1GB. [2022-11-25 23:37:39,475 INFO L158 Benchmark]: Boogie Procedure Inliner took 82.03ms. Allocated memory is still 174.1MB. Free memory was 105.4MB in the beginning and 100.5MB in the end (delta: 5.0MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. [2022-11-25 23:37:39,476 INFO L158 Benchmark]: Boogie Preprocessor took 54.54ms. Allocated memory is still 174.1MB. Free memory was 100.5MB in the beginning and 97.1MB in the end (delta: 3.4MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. [2022-11-25 23:37:39,481 INFO L158 Benchmark]: RCFGBuilder took 1990.43ms. Allocated memory was 174.1MB in the beginning and 241.2MB in the end (delta: 67.1MB). Free memory was 97.1MB in the beginning and 163.9MB in the end (delta: -66.8MB). Peak memory consumption was 109.9MB. Max. memory is 16.1GB. [2022-11-25 23:37:39,483 INFO L158 Benchmark]: TraceAbstraction took 3328.63ms. Allocated memory is still 241.2MB. Free memory was 163.9MB in the beginning and 87.2MB in the end (delta: 76.7MB). Peak memory consumption was 102.3MB. Max. memory is 16.1GB. [2022-11-25 23:37:39,483 INFO L158 Benchmark]: Witness Printer took 6.07ms. Allocated memory is still 241.2MB. Free memory was 87.2MB in the beginning and 86.1MB in the end (delta: 1.1MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-11-25 23:37:39,491 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.32ms. Allocated memory is still 174.1MB. Free memory is still 144.5MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 546.27ms. Allocated memory is still 174.1MB. Free memory was 127.1MB in the beginning and 105.4MB in the end (delta: 21.7MB). Peak memory consumption was 21.0MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 82.03ms. Allocated memory is still 174.1MB. Free memory was 105.4MB in the beginning and 100.5MB in the end (delta: 5.0MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. * Boogie Preprocessor took 54.54ms. Allocated memory is still 174.1MB. Free memory was 100.5MB in the beginning and 97.1MB in the end (delta: 3.4MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. * RCFGBuilder took 1990.43ms. Allocated memory was 174.1MB in the beginning and 241.2MB in the end (delta: 67.1MB). Free memory was 97.1MB in the beginning and 163.9MB in the end (delta: -66.8MB). Peak memory consumption was 109.9MB. Max. memory is 16.1GB. * TraceAbstraction took 3328.63ms. Allocated memory is still 241.2MB. Free memory was 163.9MB in the beginning and 87.2MB in the end (delta: 76.7MB). Peak memory consumption was 102.3MB. Max. memory is 16.1GB. * Witness Printer took 6.07ms. Allocated memory is still 241.2MB. Free memory was 87.2MB in the beginning and 86.1MB in the end (delta: 1.1MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 20]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: overapproximation of bitwiseOr at line 180, overapproximation of bitwiseAnd at line 168, overapproximation of bitwiseComplement at line 294, overapproximation of bitwiseXor at line 292. Possible FailurePath: [L25] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L26] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L28] const SORT_9 mask_SORT_9 = (SORT_9)-1 >> (sizeof(SORT_9) * 8 - 31); [L29] const SORT_9 msb_SORT_9 = (SORT_9)1 << (31 - 1); [L31] const SORT_11 mask_SORT_11 = (SORT_11)-1 >> (sizeof(SORT_11) * 8 - 16); [L32] const SORT_11 msb_SORT_11 = (SORT_11)1 << (16 - 1); [L34] const SORT_12 mask_SORT_12 = (SORT_12)-1 >> (sizeof(SORT_12) * 8 - 8); [L35] const SORT_12 msb_SORT_12 = (SORT_12)1 << (8 - 1); [L37] const SORT_20 mask_SORT_20 = (SORT_20)-1 >> (sizeof(SORT_20) * 8 - 32); [L38] const SORT_20 msb_SORT_20 = (SORT_20)1 << (32 - 1); [L40] const SORT_23 mask_SORT_23 = (SORT_23)-1 >> (sizeof(SORT_23) * 8 - 17); [L41] const SORT_23 msb_SORT_23 = (SORT_23)1 << (17 - 1); [L43] const SORT_26 mask_SORT_26 = (SORT_26)-1 >> (sizeof(SORT_26) * 8 - 18); [L44] const SORT_26 msb_SORT_26 = (SORT_26)1 << (18 - 1); [L46] const SORT_29 mask_SORT_29 = (SORT_29)-1 >> (sizeof(SORT_29) * 8 - 19); [L47] const SORT_29 msb_SORT_29 = (SORT_29)1 << (19 - 1); [L49] const SORT_32 mask_SORT_32 = (SORT_32)-1 >> (sizeof(SORT_32) * 8 - 20); [L50] const SORT_32 msb_SORT_32 = (SORT_32)1 << (20 - 1); [L52] const SORT_35 mask_SORT_35 = (SORT_35)-1 >> (sizeof(SORT_35) * 8 - 21); [L53] const SORT_35 msb_SORT_35 = (SORT_35)1 << (21 - 1); [L55] const SORT_38 mask_SORT_38 = (SORT_38)-1 >> (sizeof(SORT_38) * 8 - 22); [L56] const SORT_38 msb_SORT_38 = (SORT_38)1 << (22 - 1); [L58] const SORT_41 mask_SORT_41 = (SORT_41)-1 >> (sizeof(SORT_41) * 8 - 23); [L59] const SORT_41 msb_SORT_41 = (SORT_41)1 << (23 - 1); [L61] const SORT_44 mask_SORT_44 = (SORT_44)-1 >> (sizeof(SORT_44) * 8 - 24); [L62] const SORT_44 msb_SORT_44 = (SORT_44)1 << (24 - 1); [L64] const SORT_47 mask_SORT_47 = (SORT_47)-1 >> (sizeof(SORT_47) * 8 - 25); [L65] const SORT_47 msb_SORT_47 = (SORT_47)1 << (25 - 1); [L67] const SORT_50 mask_SORT_50 = (SORT_50)-1 >> (sizeof(SORT_50) * 8 - 26); [L68] const SORT_50 msb_SORT_50 = (SORT_50)1 << (26 - 1); [L70] const SORT_53 mask_SORT_53 = (SORT_53)-1 >> (sizeof(SORT_53) * 8 - 27); [L71] const SORT_53 msb_SORT_53 = (SORT_53)1 << (27 - 1); [L73] const SORT_56 mask_SORT_56 = (SORT_56)-1 >> (sizeof(SORT_56) * 8 - 28); [L74] const SORT_56 msb_SORT_56 = (SORT_56)1 << (28 - 1); [L76] const SORT_59 mask_SORT_59 = (SORT_59)-1 >> (sizeof(SORT_59) * 8 - 29); [L77] const SORT_59 msb_SORT_59 = (SORT_59)1 << (29 - 1); [L79] const SORT_62 mask_SORT_62 = (SORT_62)-1 >> (sizeof(SORT_62) * 8 - 30); [L80] const SORT_62 msb_SORT_62 = (SORT_62)1 << (30 - 1); [L82] const SORT_72 mask_SORT_72 = (SORT_72)-1 >> (sizeof(SORT_72) * 8 - 3); [L83] const SORT_72 msb_SORT_72 = (SORT_72)1 << (3 - 1); [L85] const SORT_96 mask_SORT_96 = (SORT_96)-1 >> (sizeof(SORT_96) * 8 - 4); [L86] const SORT_96 msb_SORT_96 = (SORT_96)1 << (4 - 1); [L88] const SORT_101 mask_SORT_101 = (SORT_101)-1 >> (sizeof(SORT_101) * 8 - 14); [L89] const SORT_101 msb_SORT_101 = (SORT_101)1 << (14 - 1); [L91] const SORT_105 mask_SORT_105 = (SORT_105)-1 >> (sizeof(SORT_105) * 8 - 2); [L92] const SORT_105 msb_SORT_105 = (SORT_105)1 << (2 - 1); [L94] const SORT_154 mask_SORT_154 = (SORT_154)-1 >> (sizeof(SORT_154) * 8 - 7); [L95] const SORT_154 msb_SORT_154 = (SORT_154)1 << (7 - 1); [L97] const SORT_1 var_7 = 0; [L98] const SORT_1 var_8 = 1; [L99] const SORT_9 var_10 = 0; [L100] const SORT_12 var_13 = 0; [L101] const SORT_12 var_14 = 200; [L102] const SORT_72 var_73 = 5; [L103] const SORT_11 var_75 = 0; [L104] const SORT_105 var_106 = 1; [L105] const SORT_12 var_112 = 127; [L106] const SORT_11 var_119 = 64; [L107] const SORT_11 var_121 = 1; [L108] const SORT_11 var_123 = 127; [L109] const SORT_11 var_126 = 200; [L110] const SORT_72 var_131 = 4; [L111] const SORT_72 var_134 = 6; [L112] const SORT_96 var_138 = 9; [L113] const SORT_154 var_155 = 64; [L114] const SORT_72 var_166 = 0; [L115] const SORT_96 var_169 = 0; [L117] SORT_1 input_2; [L118] SORT_1 input_3; [L119] SORT_1 input_4; [L121] SORT_1 state_5 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L122] SORT_11 state_17 = __VERIFIER_nondet_ushort() & mask_SORT_11; [L123] SORT_11 state_76 = __VERIFIER_nondet_ushort() & mask_SORT_11; [L124] SORT_96 state_97 = __VERIFIER_nondet_uchar() & mask_SORT_96; [L125] SORT_96 state_100 = __VERIFIER_nondet_uchar() & mask_SORT_96; [L127] SORT_11 init_77_arg_1 = var_75; [L128] state_76 = init_77_arg_1 VAL [init_77_arg_1=0, mask_SORT_1=1, mask_SORT_101=16383, mask_SORT_105=3, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_154=127, mask_SORT_20=4294967295, mask_SORT_23=4294967295, mask_SORT_26=4294967295, mask_SORT_29=4294967295, mask_SORT_32=4294967295, mask_SORT_35=4294967295, mask_SORT_38=4294967295, mask_SORT_41=4294967295, mask_SORT_44=4294967295, mask_SORT_47=4294967295, mask_SORT_50=4294967295, mask_SORT_53=4294967295, mask_SORT_56=4294967295, mask_SORT_59=4294967295, mask_SORT_62=4294967295, mask_SORT_72=7, mask_SORT_9=4294967295, mask_SORT_96=15, msb_SORT_1=1, msb_SORT_101=8192, msb_SORT_105=2, msb_SORT_11=32768, msb_SORT_12=128, msb_SORT_154=64, msb_SORT_20=2147483648, msb_SORT_23=65536, msb_SORT_26=131072, msb_SORT_29=262144, msb_SORT_32=524288, msb_SORT_35=1048576, msb_SORT_38=2097152, msb_SORT_41=4194304, msb_SORT_44=8388608, msb_SORT_47=16777216, msb_SORT_50=33554432, msb_SORT_53=67108864, msb_SORT_56=134217728, msb_SORT_59=268435456, msb_SORT_62=536870912, msb_SORT_72=4, msb_SORT_9=1073741824, msb_SORT_96=8, state_100=0, state_17=0, state_5=4, state_76=0, state_97=0, var_10=0, var_106=1, var_112=127, var_119=64, var_121=1, var_123=127, var_126=200, var_13=0, var_131=4, var_134=6, var_138=9, var_14=200, var_155=64, var_166=0, var_169=0, var_7=0, var_73=5, var_75=0, var_8=1] [L131] input_2 = __VERIFIER_nondet_uchar() [L132] input_3 = __VERIFIER_nondet_uchar() [L133] input_3 = input_3 & mask_SORT_1 [L134] input_4 = __VERIFIER_nondet_uchar() [L135] input_4 = input_4 & mask_SORT_1 [L137] SORT_1 var_84_arg_0 = state_5; [L138] SORT_1 var_84 = ~var_84_arg_0; [L139] SORT_1 var_85_arg_0 = var_84; [L140] SORT_1 var_85 = ~var_85_arg_0; [L141] SORT_1 var_86_arg_0 = state_5; [L142] SORT_1 var_86_arg_1 = var_85; [L143] SORT_1 var_86 = var_86_arg_0 | var_86_arg_1; [L144] var_86 = var_86 & mask_SORT_1 [L145] SORT_1 constr_87_arg_0 = var_86; VAL [constr_87_arg_0=9, init_77_arg_1=0, input_2=1, input_3=0, input_4=2, mask_SORT_1=1, mask_SORT_101=16383, mask_SORT_105=3, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_154=127, mask_SORT_20=4294967295, mask_SORT_23=4294967295, mask_SORT_26=4294967295, mask_SORT_29=4294967295, mask_SORT_32=4294967295, mask_SORT_35=4294967295, mask_SORT_38=4294967295, mask_SORT_41=4294967295, mask_SORT_44=4294967295, mask_SORT_47=4294967295, mask_SORT_50=4294967295, mask_SORT_53=4294967295, mask_SORT_56=4294967295, mask_SORT_59=4294967295, mask_SORT_62=4294967295, mask_SORT_72=7, mask_SORT_9=4294967295, mask_SORT_96=15, msb_SORT_1=1, msb_SORT_101=8192, msb_SORT_105=2, msb_SORT_11=32768, msb_SORT_12=128, msb_SORT_154=64, msb_SORT_20=2147483648, msb_SORT_23=65536, msb_SORT_26=131072, msb_SORT_29=262144, msb_SORT_32=524288, msb_SORT_35=1048576, msb_SORT_38=2097152, msb_SORT_41=4194304, msb_SORT_44=8388608, msb_SORT_47=16777216, msb_SORT_50=33554432, msb_SORT_53=67108864, msb_SORT_56=134217728, msb_SORT_59=268435456, msb_SORT_62=536870912, msb_SORT_72=4, msb_SORT_9=1073741824, msb_SORT_96=8, state_100=0, state_17=0, state_5=4, state_76=0, state_97=0, var_10=0, var_106=1, var_112=127, var_119=64, var_121=1, var_123=127, var_126=200, var_13=0, var_131=4, var_134=6, var_138=9, var_14=200, var_155=64, var_166=0, var_169=0, var_7=0, var_73=5, var_75=0, var_8=1, var_84=2, var_84_arg_0=4, var_85=3, var_85_arg_0=2, var_86=9, var_86_arg_0=4, var_86_arg_1=3] [L146] CALL assume_abort_if_not(constr_87_arg_0) VAL [\old(cond)=9] [L21] COND FALSE !(!cond) [L146] RET assume_abort_if_not(constr_87_arg_0) VAL [constr_87_arg_0=9, init_77_arg_1=0, input_2=1, input_3=0, input_4=2, mask_SORT_1=1, mask_SORT_101=16383, mask_SORT_105=3, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_154=127, mask_SORT_20=4294967295, mask_SORT_23=4294967295, mask_SORT_26=4294967295, mask_SORT_29=4294967295, mask_SORT_32=4294967295, mask_SORT_35=4294967295, mask_SORT_38=4294967295, mask_SORT_41=4294967295, mask_SORT_44=4294967295, mask_SORT_47=4294967295, mask_SORT_50=4294967295, mask_SORT_53=4294967295, mask_SORT_56=4294967295, mask_SORT_59=4294967295, mask_SORT_62=4294967295, mask_SORT_72=7, mask_SORT_9=4294967295, mask_SORT_96=15, msb_SORT_1=1, msb_SORT_101=8192, msb_SORT_105=2, msb_SORT_11=32768, msb_SORT_12=128, msb_SORT_154=64, msb_SORT_20=2147483648, msb_SORT_23=65536, msb_SORT_26=131072, msb_SORT_29=262144, msb_SORT_32=524288, msb_SORT_35=1048576, msb_SORT_38=2097152, msb_SORT_41=4194304, msb_SORT_44=8388608, msb_SORT_47=16777216, msb_SORT_50=33554432, msb_SORT_53=67108864, msb_SORT_56=134217728, msb_SORT_59=268435456, msb_SORT_62=536870912, msb_SORT_72=4, msb_SORT_9=1073741824, msb_SORT_96=8, state_100=0, state_17=0, state_5=4, state_76=0, state_97=0, var_10=0, var_106=1, var_112=127, var_119=64, var_121=1, var_123=127, var_126=200, var_13=0, var_131=4, var_134=6, var_138=9, var_14=200, var_155=64, var_166=0, var_169=0, var_7=0, var_73=5, var_75=0, var_8=1, var_84=2, var_84_arg_0=4, var_85=3, var_85_arg_0=2, var_86=9, var_86_arg_0=4, var_86_arg_1=3] [L147] SORT_1 var_88_arg_0 = var_8; [L148] var_88_arg_0 = var_88_arg_0 & mask_SORT_1 [L149] SORT_11 var_88 = var_88_arg_0; [L150] SORT_11 var_89_arg_0 = state_76; [L151] SORT_11 var_89_arg_1 = var_88; [L152] SORT_1 var_89 = var_89_arg_0 <= var_89_arg_1; [L153] SORT_1 var_90_arg_0 = input_4; [L154] SORT_1 var_90_arg_1 = var_89; [L155] SORT_1 var_90 = var_90_arg_0 ^ var_90_arg_1; [L156] SORT_1 var_91_arg_0 = var_90; [L157] SORT_1 var_91 = ~var_91_arg_0; [L158] SORT_1 var_92_arg_0 = var_90; [L159] SORT_1 var_92 = ~var_92_arg_0; [L160] SORT_1 var_93_arg_0 = var_91; [L161] SORT_1 var_93_arg_1 = var_92; [L162] SORT_1 var_93 = var_93_arg_0 | var_93_arg_1; [L163] var_93 = var_93 & mask_SORT_1 [L164] SORT_1 constr_94_arg_0 = var_93; VAL [constr_87_arg_0=9, constr_94_arg_0=254, init_77_arg_1=0, input_2=1, input_3=0, input_4=2, mask_SORT_1=1, mask_SORT_101=16383, mask_SORT_105=3, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_154=127, mask_SORT_20=4294967295, mask_SORT_23=4294967295, mask_SORT_26=4294967295, mask_SORT_29=4294967295, mask_SORT_32=4294967295, mask_SORT_35=4294967295, mask_SORT_38=4294967295, mask_SORT_41=4294967295, mask_SORT_44=4294967295, mask_SORT_47=4294967295, mask_SORT_50=4294967295, mask_SORT_53=4294967295, mask_SORT_56=4294967295, mask_SORT_59=4294967295, mask_SORT_62=4294967295, mask_SORT_72=7, mask_SORT_9=4294967295, mask_SORT_96=15, msb_SORT_1=1, msb_SORT_101=8192, msb_SORT_105=2, msb_SORT_11=32768, msb_SORT_12=128, msb_SORT_154=64, msb_SORT_20=2147483648, msb_SORT_23=65536, msb_SORT_26=131072, msb_SORT_29=262144, msb_SORT_32=524288, msb_SORT_35=1048576, msb_SORT_38=2097152, msb_SORT_41=4194304, msb_SORT_44=8388608, msb_SORT_47=16777216, msb_SORT_50=33554432, msb_SORT_53=67108864, msb_SORT_56=134217728, msb_SORT_59=268435456, msb_SORT_62=536870912, msb_SORT_72=4, msb_SORT_9=1073741824, msb_SORT_96=8, state_100=0, state_17=0, state_5=4, state_76=0, state_97=0, var_10=0, var_106=1, var_112=127, var_119=64, var_121=1, var_123=127, var_126=200, var_13=0, var_131=4, var_134=6, var_138=9, var_14=200, var_155=64, var_166=0, var_169=0, var_7=0, var_73=5, var_75=0, var_8=1, var_84=2, var_84_arg_0=4, var_85=3, var_85_arg_0=2, var_86=9, var_86_arg_0=4, var_86_arg_1=3, var_88=1, var_88_arg_0=1, var_89=1, var_89_arg_0=0, var_89_arg_1=1, var_90=0, var_90_arg_0=2, var_90_arg_1=1, var_91=254, var_91_arg_0=0, var_92=255, var_92_arg_0=0, var_93=254, var_93_arg_0=254, var_93_arg_1=255] [L165] CALL assume_abort_if_not(constr_94_arg_0) VAL [\old(cond)=254] [L21] COND FALSE !(!cond) [L165] RET assume_abort_if_not(constr_94_arg_0) VAL [constr_87_arg_0=9, constr_94_arg_0=254, init_77_arg_1=0, input_2=1, input_3=0, input_4=2, mask_SORT_1=1, mask_SORT_101=16383, mask_SORT_105=3, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_154=127, mask_SORT_20=4294967295, mask_SORT_23=4294967295, mask_SORT_26=4294967295, mask_SORT_29=4294967295, mask_SORT_32=4294967295, mask_SORT_35=4294967295, mask_SORT_38=4294967295, mask_SORT_41=4294967295, mask_SORT_44=4294967295, mask_SORT_47=4294967295, mask_SORT_50=4294967295, mask_SORT_53=4294967295, mask_SORT_56=4294967295, mask_SORT_59=4294967295, mask_SORT_62=4294967295, mask_SORT_72=7, mask_SORT_9=4294967295, mask_SORT_96=15, msb_SORT_1=1, msb_SORT_101=8192, msb_SORT_105=2, msb_SORT_11=32768, msb_SORT_12=128, msb_SORT_154=64, msb_SORT_20=2147483648, msb_SORT_23=65536, msb_SORT_26=131072, msb_SORT_29=262144, msb_SORT_32=524288, msb_SORT_35=1048576, msb_SORT_38=2097152, msb_SORT_41=4194304, msb_SORT_44=8388608, msb_SORT_47=16777216, msb_SORT_50=33554432, msb_SORT_53=67108864, msb_SORT_56=134217728, msb_SORT_59=268435456, msb_SORT_62=536870912, msb_SORT_72=4, msb_SORT_9=1073741824, msb_SORT_96=8, state_100=0, state_17=0, state_5=4, state_76=0, state_97=0, var_10=0, var_106=1, var_112=127, var_119=64, var_121=1, var_123=127, var_126=200, var_13=0, var_131=4, var_134=6, var_138=9, var_14=200, var_155=64, var_166=0, var_169=0, var_7=0, var_73=5, var_75=0, var_8=1, var_84=2, var_84_arg_0=4, var_85=3, var_85_arg_0=2, var_86=9, var_86_arg_0=4, var_86_arg_1=3, var_88=1, var_88_arg_0=1, var_89=1, var_89_arg_0=0, var_89_arg_1=1, var_90=0, var_90_arg_0=2, var_90_arg_1=1, var_91=254, var_91_arg_0=0, var_92=255, var_92_arg_0=0, var_93=254, var_93_arg_0=254, var_93_arg_1=255] [L167] SORT_72 var_74_arg_0 = var_73; [L168] var_74_arg_0 = var_74_arg_0 & mask_SORT_72 [L169] SORT_11 var_74 = var_74_arg_0; [L170] SORT_11 var_78_arg_0 = var_74; [L171] SORT_11 var_78_arg_1 = state_76; [L172] SORT_1 var_78 = var_78_arg_0 < var_78_arg_1; [L173] SORT_1 var_15_arg_0 = input_3; [L174] SORT_12 var_15_arg_1 = var_14; [L175] SORT_12 var_15_arg_2 = var_13; [L176] SORT_12 var_15 = var_15_arg_0 ? var_15_arg_1 : var_15_arg_2; [L177] var_15 = var_15 & mask_SORT_12 [L178] SORT_12 var_16_arg_0 = var_13; [L179] SORT_12 var_16_arg_1 = var_15; [L180] SORT_11 var_16 = ((SORT_11)var_16_arg_0 << 8) | var_16_arg_1; [L181] SORT_11 var_18_arg_0 = var_16; [L182] SORT_11 var_18_arg_1 = state_17; [L183] SORT_11 var_18 = var_18_arg_0 - var_18_arg_1; [L184] var_18 = var_18 & mask_SORT_11 [L185] SORT_11 var_19_arg_0 = var_18; [L186] SORT_1 var_19 = var_19_arg_0 >> 15; [L187] SORT_1 var_21_arg_0 = var_19; [L188] SORT_9 var_21_arg_1 = var_10; [L189] SORT_20 var_21 = ((SORT_20)var_21_arg_0 << 31) | var_21_arg_1; [L190] var_21 = var_21 & mask_SORT_20 [L191] SORT_11 var_64_arg_0 = var_18; [L192] SORT_1 var_64 = var_64_arg_0 >> 15; [L193] SORT_11 var_61_arg_0 = var_18; [L194] SORT_1 var_61 = var_61_arg_0 >> 15; [L195] SORT_11 var_58_arg_0 = var_18; [L196] SORT_1 var_58 = var_58_arg_0 >> 15; [L197] SORT_11 var_55_arg_0 = var_18; [L198] SORT_1 var_55 = var_55_arg_0 >> 15; [L199] SORT_11 var_52_arg_0 = var_18; [L200] SORT_1 var_52 = var_52_arg_0 >> 15; [L201] SORT_11 var_49_arg_0 = var_18; [L202] SORT_1 var_49 = var_49_arg_0 >> 15; [L203] SORT_11 var_46_arg_0 = var_18; [L204] SORT_1 var_46 = var_46_arg_0 >> 15; [L205] SORT_11 var_43_arg_0 = var_18; [L206] SORT_1 var_43 = var_43_arg_0 >> 15; [L207] SORT_11 var_40_arg_0 = var_18; [L208] SORT_1 var_40 = var_40_arg_0 >> 15; [L209] SORT_11 var_37_arg_0 = var_18; [L210] SORT_1 var_37 = var_37_arg_0 >> 15; [L211] SORT_11 var_34_arg_0 = var_18; [L212] SORT_1 var_34 = var_34_arg_0 >> 15; [L213] SORT_11 var_31_arg_0 = var_18; [L214] SORT_1 var_31 = var_31_arg_0 >> 15; [L215] SORT_11 var_28_arg_0 = var_18; [L216] SORT_1 var_28 = var_28_arg_0 >> 15; [L217] SORT_11 var_25_arg_0 = var_18; [L218] SORT_1 var_25 = var_25_arg_0 >> 15; [L219] SORT_11 var_22_arg_0 = var_18; [L220] SORT_1 var_22 = var_22_arg_0 >> 15; [L221] SORT_1 var_24_arg_0 = var_22; [L222] SORT_11 var_24_arg_1 = var_18; [L223] SORT_23 var_24 = ((SORT_23)var_24_arg_0 << 16) | var_24_arg_1; [L224] var_24 = var_24 & mask_SORT_23 [L225] SORT_1 var_27_arg_0 = var_25; [L226] SORT_23 var_27_arg_1 = var_24; [L227] SORT_26 var_27 = ((SORT_26)var_27_arg_0 << 17) | var_27_arg_1; [L228] var_27 = var_27 & mask_SORT_26 [L229] SORT_1 var_30_arg_0 = var_28; [L230] SORT_26 var_30_arg_1 = var_27; [L231] SORT_29 var_30 = ((SORT_29)var_30_arg_0 << 18) | var_30_arg_1; [L232] var_30 = var_30 & mask_SORT_29 [L233] SORT_1 var_33_arg_0 = var_31; [L234] SORT_29 var_33_arg_1 = var_30; [L235] SORT_32 var_33 = ((SORT_32)var_33_arg_0 << 19) | var_33_arg_1; [L236] var_33 = var_33 & mask_SORT_32 [L237] SORT_1 var_36_arg_0 = var_34; [L238] SORT_32 var_36_arg_1 = var_33; [L239] SORT_35 var_36 = ((SORT_35)var_36_arg_0 << 20) | var_36_arg_1; [L240] var_36 = var_36 & mask_SORT_35 [L241] SORT_1 var_39_arg_0 = var_37; [L242] SORT_35 var_39_arg_1 = var_36; [L243] SORT_38 var_39 = ((SORT_38)var_39_arg_0 << 21) | var_39_arg_1; [L244] var_39 = var_39 & mask_SORT_38 [L245] SORT_1 var_42_arg_0 = var_40; [L246] SORT_38 var_42_arg_1 = var_39; [L247] SORT_41 var_42 = ((SORT_41)var_42_arg_0 << 22) | var_42_arg_1; [L248] var_42 = var_42 & mask_SORT_41 [L249] SORT_1 var_45_arg_0 = var_43; [L250] SORT_41 var_45_arg_1 = var_42; [L251] SORT_44 var_45 = ((SORT_44)var_45_arg_0 << 23) | var_45_arg_1; [L252] var_45 = var_45 & mask_SORT_44 [L253] SORT_1 var_48_arg_0 = var_46; [L254] SORT_44 var_48_arg_1 = var_45; [L255] SORT_47 var_48 = ((SORT_47)var_48_arg_0 << 24) | var_48_arg_1; [L256] var_48 = var_48 & mask_SORT_47 [L257] SORT_1 var_51_arg_0 = var_49; [L258] SORT_47 var_51_arg_1 = var_48; [L259] SORT_50 var_51 = ((SORT_50)var_51_arg_0 << 25) | var_51_arg_1; [L260] var_51 = var_51 & mask_SORT_50 [L261] SORT_1 var_54_arg_0 = var_52; [L262] SORT_50 var_54_arg_1 = var_51; [L263] SORT_53 var_54 = ((SORT_53)var_54_arg_0 << 26) | var_54_arg_1; [L264] var_54 = var_54 & mask_SORT_53 [L265] SORT_1 var_57_arg_0 = var_55; [L266] SORT_53 var_57_arg_1 = var_54; [L267] SORT_56 var_57 = ((SORT_56)var_57_arg_0 << 27) | var_57_arg_1; [L268] var_57 = var_57 & mask_SORT_56 [L269] SORT_1 var_60_arg_0 = var_58; [L270] SORT_56 var_60_arg_1 = var_57; [L271] SORT_59 var_60 = ((SORT_59)var_60_arg_0 << 28) | var_60_arg_1; [L272] var_60 = var_60 & mask_SORT_59 [L273] SORT_1 var_63_arg_0 = var_61; [L274] SORT_59 var_63_arg_1 = var_60; [L275] SORT_62 var_63 = ((SORT_62)var_63_arg_0 << 29) | var_63_arg_1; [L276] var_63 = var_63 & mask_SORT_62 [L277] SORT_1 var_65_arg_0 = var_64; [L278] SORT_62 var_65_arg_1 = var_63; [L279] SORT_9 var_65 = ((SORT_9)var_65_arg_0 << 30) | var_65_arg_1; [L280] SORT_9 var_66_arg_0 = var_65; [L281] var_66_arg_0 = var_66_arg_0 & mask_SORT_9 [L282] SORT_20 var_66 = var_66_arg_0; [L283] SORT_20 var_67_arg_0 = var_21; [L284] SORT_20 var_67_arg_1 = var_66; [L285] SORT_1 var_67 = var_67_arg_0 <= var_67_arg_1; [L286] SORT_1 var_68_arg_0 = var_67; [L287] SORT_1 var_68_arg_1 = var_8; [L288] SORT_1 var_68_arg_2 = var_7; [L289] SORT_1 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L290] SORT_1 var_69_arg_0 = input_3; [L291] SORT_1 var_69_arg_1 = var_68; [L292] SORT_1 var_69 = var_69_arg_0 ^ var_69_arg_1; [L293] SORT_1 var_70_arg_0 = var_69; [L294] SORT_1 var_70 = ~var_70_arg_0; [L295] SORT_1 var_79_arg_0 = var_78; [L296] SORT_1 var_79_arg_1 = var_70; [L297] SORT_1 var_79_arg_2 = var_8; [L298] SORT_1 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L299] SORT_1 var_80_arg_0 = var_79; [L300] SORT_1 var_80 = ~var_80_arg_0; [L301] SORT_1 var_81_arg_0 = var_79; [L302] SORT_1 var_81 = ~var_81_arg_0; [L303] SORT_1 var_82_arg_0 = var_80; [L304] SORT_1 var_82_arg_1 = var_81; [L305] SORT_1 var_82 = var_82_arg_0 & var_82_arg_1; [L306] var_82 = var_82 & mask_SORT_1 [L307] SORT_1 bad_83_arg_0 = var_82; [L308] CALL __VERIFIER_assert(!(bad_83_arg_0)) [L20] COND TRUE !(cond) VAL [\old(cond)=0, cond=0] [L20] reach_error() VAL [\old(cond)=0, cond=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 2 procedures, 13 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 3.2s, OverallIterations: 1, TraceHistogramMax: 2, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: , PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=13occurred in iteration=0, InterpolantAutomatonStates: 0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 1.6s SatisfiabilityAnalysisTime, 0.0s InterpolantComputationTime, 12 NumberOfCodeBlocks, 12 NumberOfCodeBlocksAsserted, 1 NumberOfCheckSat, 0 ConstructedInterpolants, 0 QuantifiedInterpolants, 0 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 0 InterpolantComputations, 0 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2022-11-25 23:37:39,524 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.safe_analog_estimation_convergence.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/config/svcomp-Reach-64bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 4de94aaabb885b39de7c063dad9a583cbef1a5037a721fe952ddb512087f6e33 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-38b53e6 [2022-11-25 23:37:41,963 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-25 23:37:41,965 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-25 23:37:41,998 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-25 23:37:41,998 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-25 23:37:42,002 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-25 23:37:42,005 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-25 23:37:42,008 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-25 23:37:42,010 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-25 23:37:42,015 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-25 23:37:42,016 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-25 23:37:42,017 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-25 23:37:42,018 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-25 23:37:42,018 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-25 23:37:42,019 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-25 23:37:42,020 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-25 23:37:42,021 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-25 23:37:42,022 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-25 23:37:42,024 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-25 23:37:42,025 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-25 23:37:42,033 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-25 23:37:42,036 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-25 23:37:42,040 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-25 23:37:42,041 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-25 23:37:42,047 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-25 23:37:42,047 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-25 23:37:42,048 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-25 23:37:42,049 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-25 23:37:42,049 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-25 23:37:42,050 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-25 23:37:42,050 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-25 23:37:42,051 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-25 23:37:42,052 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-25 23:37:42,054 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-25 23:37:42,063 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-25 23:37:42,063 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-25 23:37:42,064 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-25 23:37:42,064 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-25 23:37:42,064 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-25 23:37:42,065 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-25 23:37:42,066 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-25 23:37:42,067 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/config/svcomp-Reach-64bit-Taipan_Bitvector.epf [2022-11-25 23:37:42,110 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-25 23:37:42,110 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-25 23:37:42,112 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-25 23:37:42,112 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-25 23:37:42,113 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-25 23:37:42,113 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-25 23:37:42,114 INFO L138 SettingsManager]: * User list type=DISABLED [2022-11-25 23:37:42,114 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-11-25 23:37:42,114 INFO L138 SettingsManager]: * Explicit value domain=true [2022-11-25 23:37:42,114 INFO L138 SettingsManager]: * Octagon Domain=false [2022-11-25 23:37:42,115 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-11-25 23:37:42,116 INFO L138 SettingsManager]: * Interval Domain=false [2022-11-25 23:37:42,117 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-25 23:37:42,117 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-25 23:37:42,118 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-25 23:37:42,118 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-25 23:37:42,118 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-25 23:37:42,118 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-11-25 23:37:42,118 INFO L138 SettingsManager]: * Use bitvectors instead of ints=true [2022-11-25 23:37:42,119 INFO L138 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2022-11-25 23:37:42,119 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-25 23:37:42,119 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-25 23:37:42,119 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-25 23:37:42,119 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-25 23:37:42,120 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-25 23:37:42,120 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-25 23:37:42,120 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-25 23:37:42,120 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-25 23:37:42,121 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-25 23:37:42,121 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-25 23:37:42,121 INFO L138 SettingsManager]: * Trace refinement strategy=WALRUS [2022-11-25 23:37:42,121 INFO L138 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2022-11-25 23:37:42,121 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-25 23:37:42,122 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-11-25 23:37:42,122 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-11-25 23:37:42,122 INFO L138 SettingsManager]: * Logic for external solver=AUFBV WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 4de94aaabb885b39de7c063dad9a583cbef1a5037a721fe952ddb512087f6e33 [2022-11-25 23:37:42,519 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-25 23:37:42,547 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-25 23:37:42,550 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-25 23:37:42,551 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-25 23:37:42,552 INFO L275 PluginConnector]: CDTParser initialized [2022-11-25 23:37:42,554 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.safe_analog_estimation_convergence.c [2022-11-25 23:37:45,784 INFO L500 CDTParser]: Created temporary CDT project at NULL [2022-11-25 23:37:46,020 INFO L351 CDTParser]: Found 1 translation units. [2022-11-25 23:37:46,020 INFO L172 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.safe_analog_estimation_convergence.c [2022-11-25 23:37:46,038 INFO L394 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/data/3bcab1b08/d1c3cba115104d81a265c4f85860ea1a/FLAGfa216f391 [2022-11-25 23:37:46,058 INFO L402 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/data/3bcab1b08/d1c3cba115104d81a265c4f85860ea1a [2022-11-25 23:37:46,060 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-25 23:37:46,062 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-25 23:37:46,065 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-25 23:37:46,065 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-25 23:37:46,069 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-25 23:37:46,070 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 25.11 11:37:46" (1/1) ... [2022-11-25 23:37:46,071 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3ec51e01 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 11:37:46, skipping insertion in model container [2022-11-25 23:37:46,071 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 25.11 11:37:46" (1/1) ... [2022-11-25 23:37:46,079 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-25 23:37:46,137 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-25 23:37:46,338 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.safe_analog_estimation_convergence.c[1120,1133] [2022-11-25 23:37:46,542 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-25 23:37:46,547 INFO L203 MainTranslator]: Completed pre-run [2022-11-25 23:37:46,558 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.safe_analog_estimation_convergence.c[1120,1133] [2022-11-25 23:37:46,649 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-25 23:37:46,661 INFO L208 MainTranslator]: Completed translation [2022-11-25 23:37:46,662 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 11:37:46 WrapperNode [2022-11-25 23:37:46,662 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-25 23:37:46,663 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-25 23:37:46,663 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-25 23:37:46,663 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-25 23:37:46,671 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 11:37:46" (1/1) ... [2022-11-25 23:37:46,690 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 11:37:46" (1/1) ... [2022-11-25 23:37:46,723 INFO L138 Inliner]: procedures = 11, calls = 5, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 413 [2022-11-25 23:37:46,724 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-25 23:37:46,724 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-25 23:37:46,725 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-25 23:37:46,725 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-25 23:37:46,738 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 11:37:46" (1/1) ... [2022-11-25 23:37:46,742 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 11:37:46" (1/1) ... [2022-11-25 23:37:46,747 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 11:37:46" (1/1) ... [2022-11-25 23:37:46,759 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 11:37:46" (1/1) ... [2022-11-25 23:37:46,770 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 11:37:46" (1/1) ... [2022-11-25 23:37:46,787 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 11:37:46" (1/1) ... [2022-11-25 23:37:46,789 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 11:37:46" (1/1) ... [2022-11-25 23:37:46,792 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 11:37:46" (1/1) ... [2022-11-25 23:37:46,796 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-25 23:37:46,815 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-25 23:37:46,815 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-25 23:37:46,815 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-25 23:37:46,816 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 11:37:46" (1/1) ... [2022-11-25 23:37:46,822 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-25 23:37:46,834 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/z3 [2022-11-25 23:37:46,847 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-25 23:37:46,895 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-25 23:37:46,930 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-25 23:37:46,930 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-25 23:37:46,931 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2022-11-25 23:37:46,931 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2022-11-25 23:37:47,121 INFO L235 CfgBuilder]: Building ICFG [2022-11-25 23:37:47,123 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-25 23:37:47,754 INFO L276 CfgBuilder]: Performing block encoding [2022-11-25 23:37:47,761 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-25 23:37:47,761 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-25 23:37:47,763 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 25.11 11:37:47 BoogieIcfgContainer [2022-11-25 23:37:47,763 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-25 23:37:47,765 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-25 23:37:47,765 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-25 23:37:47,768 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-25 23:37:47,769 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 25.11 11:37:46" (1/3) ... [2022-11-25 23:37:47,769 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@69e5ca0e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 25.11 11:37:47, skipping insertion in model container [2022-11-25 23:37:47,769 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 11:37:46" (2/3) ... [2022-11-25 23:37:47,770 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@69e5ca0e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 25.11 11:37:47, skipping insertion in model container [2022-11-25 23:37:47,770 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 25.11 11:37:47" (3/3) ... [2022-11-25 23:37:47,771 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.safe_analog_estimation_convergence.c [2022-11-25 23:37:47,790 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-25 23:37:47,790 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-25 23:37:47,837 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-25 23:37:47,844 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@630aadbb, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-25 23:37:47,844 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-25 23:37:47,848 INFO L276 IsEmpty]: Start isEmpty. Operand has 19 states, 14 states have (on average 1.3571428571428572) internal successors, (19), 15 states have internal predecessors, (19), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-25 23:37:47,858 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-11-25 23:37:47,858 INFO L187 NwaCegarLoop]: Found error trace [2022-11-25 23:37:47,859 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-25 23:37:47,859 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-25 23:37:47,866 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 23:37:47,866 INFO L85 PathProgramCache]: Analyzing trace with hash -639607165, now seen corresponding path program 1 times [2022-11-25 23:37:47,882 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-25 23:37:47,882 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1371631207] [2022-11-25 23:37:47,882 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 23:37:47,883 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-25 23:37:47,883 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/mathsat [2022-11-25 23:37:47,886 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-25 23:37:47,888 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (2)] Waiting until timeout for monitored process [2022-11-25 23:37:48,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 23:37:48,189 INFO L263 TraceCheckSpWp]: Trace formula consists of 242 conjuncts, 1 conjunts are in the unsatisfiable core [2022-11-25 23:37:48,195 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-25 23:37:48,220 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-25 23:37:48,220 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-25 23:37:48,221 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-25 23:37:48,221 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1371631207] [2022-11-25 23:37:48,222 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1371631207] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-25 23:37:48,222 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-25 23:37:48,222 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-25 23:37:48,224 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [915586236] [2022-11-25 23:37:48,225 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-25 23:37:48,231 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2022-11-25 23:37:48,234 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-25 23:37:48,279 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2022-11-25 23:37:48,280 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2022-11-25 23:37:48,283 INFO L87 Difference]: Start difference. First operand has 19 states, 14 states have (on average 1.3571428571428572) internal successors, (19), 15 states have internal predecessors, (19), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand has 2 states, 2 states have (on average 6.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-25 23:37:48,308 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-25 23:37:48,308 INFO L93 Difference]: Finished difference Result 32 states and 43 transitions. [2022-11-25 23:37:48,309 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-25 23:37:48,311 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 6.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) Word has length 17 [2022-11-25 23:37:48,312 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-25 23:37:48,317 INFO L225 Difference]: With dead ends: 32 [2022-11-25 23:37:48,318 INFO L226 Difference]: Without dead ends: 15 [2022-11-25 23:37:48,320 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2022-11-25 23:37:48,325 INFO L413 NwaCegarLoop]: 16 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 16 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-25 23:37:48,328 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-25 23:37:48,346 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states. [2022-11-25 23:37:48,361 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 15. [2022-11-25 23:37:48,362 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 11 states have (on average 1.0909090909090908) internal successors, (12), 11 states have internal predecessors, (12), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-25 23:37:48,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 16 transitions. [2022-11-25 23:37:48,365 INFO L78 Accepts]: Start accepts. Automaton has 15 states and 16 transitions. Word has length 17 [2022-11-25 23:37:48,366 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-25 23:37:48,366 INFO L495 AbstractCegarLoop]: Abstraction has 15 states and 16 transitions. [2022-11-25 23:37:48,367 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 6.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-25 23:37:48,367 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 16 transitions. [2022-11-25 23:37:48,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-11-25 23:37:48,369 INFO L187 NwaCegarLoop]: Found error trace [2022-11-25 23:37:48,369 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-25 23:37:48,382 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (2)] Ended with exit code 0 [2022-11-25 23:37:48,582 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-25 23:37:48,582 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-25 23:37:48,583 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 23:37:48,583 INFO L85 PathProgramCache]: Analyzing trace with hash -324183425, now seen corresponding path program 1 times [2022-11-25 23:37:48,583 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-25 23:37:48,584 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [550403611] [2022-11-25 23:37:48,584 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 23:37:48,584 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-25 23:37:48,584 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/mathsat [2022-11-25 23:37:48,611 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-25 23:37:48,614 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (3)] Waiting until timeout for monitored process [2022-11-25 23:37:48,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 23:37:48,818 INFO L263 TraceCheckSpWp]: Trace formula consists of 242 conjuncts, 18 conjunts are in the unsatisfiable core [2022-11-25 23:37:48,823 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-25 23:37:49,115 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-11-25 23:37:49,115 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-25 23:37:49,116 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-25 23:37:49,117 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [550403611] [2022-11-25 23:37:49,117 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [550403611] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-25 23:37:49,118 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-25 23:37:49,118 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-25 23:37:49,122 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1964953478] [2022-11-25 23:37:49,122 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-25 23:37:49,124 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-25 23:37:49,125 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-25 23:37:49,126 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-25 23:37:49,126 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-25 23:37:49,126 INFO L87 Difference]: Start difference. First operand 15 states and 16 transitions. Second operand has 4 states, 4 states have (on average 2.5) internal successors, (10), 4 states have internal predecessors, (10), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-11-25 23:37:49,311 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-25 23:37:49,311 INFO L93 Difference]: Finished difference Result 29 states and 34 transitions. [2022-11-25 23:37:49,311 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-25 23:37:49,312 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.5) internal successors, (10), 4 states have internal predecessors, (10), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 17 [2022-11-25 23:37:49,312 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-25 23:37:49,313 INFO L225 Difference]: With dead ends: 29 [2022-11-25 23:37:49,313 INFO L226 Difference]: Without dead ends: 27 [2022-11-25 23:37:49,313 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-25 23:37:49,314 INFO L413 NwaCegarLoop]: 20 mSDtfsCounter, 6 mSDsluCounter, 30 mSDsCounter, 0 mSdLazyCounter, 14 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 8 SdHoareTripleChecker+Valid, 50 SdHoareTripleChecker+Invalid, 14 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 14 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-25 23:37:49,315 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [8 Valid, 50 Invalid, 14 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 14 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-25 23:37:49,315 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2022-11-25 23:37:49,322 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 21. [2022-11-25 23:37:49,322 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 15 states have (on average 1.0666666666666667) internal successors, (16), 15 states have internal predecessors, (16), 4 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-11-25 23:37:49,323 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 24 transitions. [2022-11-25 23:37:49,323 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 24 transitions. Word has length 17 [2022-11-25 23:37:49,323 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-25 23:37:49,324 INFO L495 AbstractCegarLoop]: Abstraction has 21 states and 24 transitions. [2022-11-25 23:37:49,324 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.5) internal successors, (10), 4 states have internal predecessors, (10), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-11-25 23:37:49,324 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 24 transitions. [2022-11-25 23:37:49,325 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-11-25 23:37:49,325 INFO L187 NwaCegarLoop]: Found error trace [2022-11-25 23:37:49,325 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 4, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2022-11-25 23:37:49,378 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (3)] Forceful destruction successful, exit code 0 [2022-11-25 23:37:49,538 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-25 23:37:49,538 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-25 23:37:49,539 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 23:37:49,539 INFO L85 PathProgramCache]: Analyzing trace with hash 322101155, now seen corresponding path program 1 times [2022-11-25 23:37:49,540 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-25 23:37:49,540 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1065333862] [2022-11-25 23:37:49,540 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 23:37:49,540 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-25 23:37:49,541 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/mathsat [2022-11-25 23:37:49,542 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-25 23:37:49,584 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (4)] Waiting until timeout for monitored process [2022-11-25 23:37:49,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 23:37:49,892 INFO L263 TraceCheckSpWp]: Trace formula consists of 528 conjuncts, 30 conjunts are in the unsatisfiable core [2022-11-25 23:37:49,897 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-25 23:37:50,302 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-11-25 23:37:50,303 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-25 23:37:50,542 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-25 23:37:50,542 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1065333862] [2022-11-25 23:37:50,542 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1065333862] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-25 23:37:50,543 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [183627644] [2022-11-25 23:37:50,543 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 23:37:50,543 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-25 23:37:50,543 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/cvc4 [2022-11-25 23:37:50,546 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-25 23:37:50,573 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt (5)] Waiting until timeout for monitored process [2022-11-25 23:37:51,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 23:37:51,111 INFO L263 TraceCheckSpWp]: Trace formula consists of 528 conjuncts, 32 conjunts are in the unsatisfiable core [2022-11-25 23:37:51,117 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-25 23:37:51,441 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-11-25 23:37:51,442 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-25 23:37:51,636 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [183627644] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-25 23:37:51,636 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1769574063] [2022-11-25 23:37:51,637 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 23:37:51,637 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-25 23:37:51,637 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/z3 [2022-11-25 23:37:51,645 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-25 23:37:51,653 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-11-25 23:37:51,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 23:37:51,928 INFO L263 TraceCheckSpWp]: Trace formula consists of 528 conjuncts, 33 conjunts are in the unsatisfiable core [2022-11-25 23:37:51,938 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-25 23:37:52,300 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-11-25 23:37:52,301 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-25 23:37:52,461 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1769574063] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-25 23:37:52,461 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-25 23:37:52,461 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 6] total 6 [2022-11-25 23:37:52,461 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [341444720] [2022-11-25 23:37:52,462 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-25 23:37:52,462 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-25 23:37:52,462 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-25 23:37:52,464 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-25 23:37:52,465 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2022-11-25 23:37:52,465 INFO L87 Difference]: Start difference. First operand 21 states and 24 transitions. Second operand has 6 states, 6 states have (on average 2.8333333333333335) internal successors, (17), 6 states have internal predecessors, (17), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-11-25 23:37:52,903 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-25 23:37:52,903 INFO L93 Difference]: Finished difference Result 36 states and 43 transitions. [2022-11-25 23:37:52,904 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-25 23:37:52,904 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 2.8333333333333335) internal successors, (17), 6 states have internal predecessors, (17), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 32 [2022-11-25 23:37:52,905 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-25 23:37:52,905 INFO L225 Difference]: With dead ends: 36 [2022-11-25 23:37:52,905 INFO L226 Difference]: Without dead ends: 34 [2022-11-25 23:37:52,906 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 107 GetRequests, 97 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=35, Invalid=55, Unknown=0, NotChecked=0, Total=90 [2022-11-25 23:37:52,906 INFO L413 NwaCegarLoop]: 19 mSDtfsCounter, 11 mSDsluCounter, 41 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 13 SdHoareTripleChecker+Valid, 60 SdHoareTripleChecker+Invalid, 41 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-25 23:37:52,907 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [13 Valid, 60 Invalid, 41 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-11-25 23:37:52,907 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2022-11-25 23:37:52,918 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 28. [2022-11-25 23:37:52,919 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 20 states have (on average 1.05) internal successors, (21), 20 states have internal predecessors, (21), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-11-25 23:37:52,922 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 33 transitions. [2022-11-25 23:37:52,922 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 33 transitions. Word has length 32 [2022-11-25 23:37:52,922 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-25 23:37:52,922 INFO L495 AbstractCegarLoop]: Abstraction has 28 states and 33 transitions. [2022-11-25 23:37:52,923 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 2.8333333333333335) internal successors, (17), 6 states have internal predecessors, (17), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-11-25 23:37:52,923 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 33 transitions. [2022-11-25 23:37:52,926 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2022-11-25 23:37:52,926 INFO L187 NwaCegarLoop]: Found error trace [2022-11-25 23:37:52,926 INFO L195 NwaCegarLoop]: trace histogram [6, 6, 6, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1] [2022-11-25 23:37:52,946 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (4)] Forceful destruction successful, exit code 0 [2022-11-25 23:37:53,147 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-11-25 23:37:53,346 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt (5)] Forceful destruction successful, exit code 0 [2022-11-25 23:37:53,541 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt [2022-11-25 23:37:53,541 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-25 23:37:53,541 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 23:37:53,542 INFO L85 PathProgramCache]: Analyzing trace with hash -220860929, now seen corresponding path program 2 times [2022-11-25 23:37:53,543 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-25 23:37:53,543 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [846481118] [2022-11-25 23:37:53,543 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-25 23:37:53,543 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-25 23:37:53,544 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/mathsat [2022-11-25 23:37:53,545 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-25 23:37:53,550 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (7)] Waiting until timeout for monitored process [2022-11-25 23:37:54,020 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-25 23:37:54,020 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-25 23:37:54,048 INFO L263 TraceCheckSpWp]: Trace formula consists of 814 conjuncts, 37 conjunts are in the unsatisfiable core [2022-11-25 23:37:54,053 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-25 23:37:54,574 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 0 proven. 19 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-11-25 23:37:54,574 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-25 23:37:54,801 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-25 23:37:54,801 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [846481118] [2022-11-25 23:37:54,801 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [846481118] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-25 23:37:54,802 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [989342312] [2022-11-25 23:37:54,802 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-25 23:37:54,802 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-25 23:37:54,802 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/cvc4 [2022-11-25 23:37:54,804 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-25 23:37:54,822 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt (8)] Waiting until timeout for monitored process [2022-11-25 23:37:55,632 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-25 23:37:55,633 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-25 23:37:55,646 INFO L263 TraceCheckSpWp]: Trace formula consists of 814 conjuncts, 40 conjunts are in the unsatisfiable core [2022-11-25 23:37:55,651 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-25 23:37:56,071 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 0 proven. 19 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-11-25 23:37:56,071 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-25 23:37:56,207 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [989342312] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-25 23:37:56,208 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [78373034] [2022-11-25 23:37:56,208 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-25 23:37:56,208 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-25 23:37:56,208 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/z3 [2022-11-25 23:37:56,217 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-25 23:37:56,226 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-11-25 23:37:56,576 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-25 23:37:56,576 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-25 23:37:56,589 INFO L263 TraceCheckSpWp]: Trace formula consists of 814 conjuncts, 40 conjunts are in the unsatisfiable core [2022-11-25 23:37:56,595 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-25 23:37:57,011 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 0 proven. 19 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-11-25 23:37:57,011 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-25 23:37:57,162 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [78373034] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-25 23:37:57,162 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-25 23:37:57,162 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 7] total 7 [2022-11-25 23:37:57,163 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2141918955] [2022-11-25 23:37:57,163 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-25 23:37:57,163 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-25 23:37:57,163 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-25 23:37:57,164 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-25 23:37:57,164 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2022-11-25 23:37:57,164 INFO L87 Difference]: Start difference. First operand 28 states and 33 transitions. Second operand has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 7 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2022-11-25 23:37:57,841 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-25 23:37:57,842 INFO L93 Difference]: Finished difference Result 43 states and 52 transitions. [2022-11-25 23:37:57,842 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-25 23:37:57,842 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 7 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 47 [2022-11-25 23:37:57,843 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-25 23:37:57,844 INFO L225 Difference]: With dead ends: 43 [2022-11-25 23:37:57,844 INFO L226 Difference]: Without dead ends: 41 [2022-11-25 23:37:57,844 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 153 GetRequests, 141 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=44, Invalid=88, Unknown=0, NotChecked=0, Total=132 [2022-11-25 23:37:57,845 INFO L413 NwaCegarLoop]: 23 mSDtfsCounter, 15 mSDsluCounter, 78 mSDsCounter, 0 mSdLazyCounter, 75 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 17 SdHoareTripleChecker+Valid, 101 SdHoareTripleChecker+Invalid, 80 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 75 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-11-25 23:37:57,846 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [17 Valid, 101 Invalid, 80 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 75 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-11-25 23:37:57,846 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2022-11-25 23:37:57,854 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 35. [2022-11-25 23:37:57,855 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 25 states have (on average 1.04) internal successors, (26), 25 states have internal predecessors, (26), 8 states have call successors, (8), 1 states have call predecessors, (8), 1 states have return successors, (8), 8 states have call predecessors, (8), 8 states have call successors, (8) [2022-11-25 23:37:57,856 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 42 transitions. [2022-11-25 23:37:57,856 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 42 transitions. Word has length 47 [2022-11-25 23:37:57,856 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-25 23:37:57,857 INFO L495 AbstractCegarLoop]: Abstraction has 35 states and 42 transitions. [2022-11-25 23:37:57,857 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 7 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2022-11-25 23:37:57,857 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 42 transitions. [2022-11-25 23:37:57,858 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2022-11-25 23:37:57,858 INFO L187 NwaCegarLoop]: Found error trace [2022-11-25 23:37:57,859 INFO L195 NwaCegarLoop]: trace histogram [8, 8, 8, 4, 4, 4, 4, 4, 4, 4, 3, 3, 1, 1, 1, 1] [2022-11-25 23:37:57,871 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2022-11-25 23:37:58,076 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt (8)] Ended with exit code 0 [2022-11-25 23:37:58,283 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (7)] Ended with exit code 0 [2022-11-25 23:37:58,471 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true,8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-25 23:37:58,471 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-25 23:37:58,472 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 23:37:58,472 INFO L85 PathProgramCache]: Analyzing trace with hash -2090804189, now seen corresponding path program 3 times [2022-11-25 23:37:58,473 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-25 23:37:58,473 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1486613589] [2022-11-25 23:37:58,473 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-25 23:37:58,474 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-25 23:37:58,474 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/mathsat [2022-11-25 23:37:58,475 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-25 23:37:58,515 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (10)] Waiting until timeout for monitored process [2022-11-25 23:37:59,108 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2022-11-25 23:37:59,108 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-25 23:37:59,149 INFO L263 TraceCheckSpWp]: Trace formula consists of 1077 conjuncts, 45 conjunts are in the unsatisfiable core [2022-11-25 23:37:59,155 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-25 23:37:59,929 INFO L134 CoverageAnalysis]: Checked inductivity of 151 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2022-11-25 23:37:59,929 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-25 23:38:00,143 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-25 23:38:00,143 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1486613589] [2022-11-25 23:38:00,143 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1486613589] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-25 23:38:00,143 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [794137544] [2022-11-25 23:38:00,143 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-25 23:38:00,144 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-25 23:38:00,144 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/cvc4 [2022-11-25 23:38:00,145 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-25 23:38:00,176 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt (11)] Waiting until timeout for monitored process [2022-11-25 23:38:01,189 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2022-11-25 23:38:01,189 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-25 23:38:01,227 INFO L263 TraceCheckSpWp]: Trace formula consists of 1077 conjuncts, 51 conjunts are in the unsatisfiable core [2022-11-25 23:38:01,232 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-25 23:38:01,794 INFO L134 CoverageAnalysis]: Checked inductivity of 151 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2022-11-25 23:38:01,794 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-25 23:38:01,922 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [794137544] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-25 23:38:01,923 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1727336725] [2022-11-25 23:38:01,923 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-25 23:38:01,923 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-25 23:38:01,923 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/z3 [2022-11-25 23:38:01,924 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-25 23:38:01,932 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-11-25 23:38:02,523 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2022-11-25 23:38:02,523 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-25 23:38:02,550 INFO L263 TraceCheckSpWp]: Trace formula consists of 1077 conjuncts, 47 conjunts are in the unsatisfiable core [2022-11-25 23:38:02,554 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-25 23:38:03,317 INFO L134 CoverageAnalysis]: Checked inductivity of 151 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2022-11-25 23:38:03,317 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-25 23:38:03,467 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1727336725] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-25 23:38:03,468 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-25 23:38:03,468 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 8] total 12 [2022-11-25 23:38:03,468 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [625425457] [2022-11-25 23:38:03,468 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-25 23:38:03,469 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-11-25 23:38:03,469 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-25 23:38:03,470 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-11-25 23:38:03,470 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=138, Unknown=0, NotChecked=0, Total=182 [2022-11-25 23:38:03,470 INFO L87 Difference]: Start difference. First operand 35 states and 42 transitions. Second operand has 12 states, 12 states have (on average 3.6666666666666665) internal successors, (44), 12 states have internal predecessors, (44), 8 states have call successors, (16), 1 states have call predecessors, (16), 1 states have return successors, (16), 8 states have call predecessors, (16), 8 states have call successors, (16) [2022-11-25 23:38:04,443 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-25 23:38:04,443 INFO L93 Difference]: Finished difference Result 50 states and 61 transitions. [2022-11-25 23:38:04,444 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-25 23:38:04,444 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 3.6666666666666665) internal successors, (44), 12 states have internal predecessors, (44), 8 states have call successors, (16), 1 states have call predecessors, (16), 1 states have return successors, (16), 8 states have call predecessors, (16), 8 states have call successors, (16) Word has length 62 [2022-11-25 23:38:04,445 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-25 23:38:04,446 INFO L225 Difference]: With dead ends: 50 [2022-11-25 23:38:04,447 INFO L226 Difference]: Without dead ends: 48 [2022-11-25 23:38:04,447 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 199 GetRequests, 181 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=75, Invalid=231, Unknown=0, NotChecked=0, Total=306 [2022-11-25 23:38:04,448 INFO L413 NwaCegarLoop]: 27 mSDtfsCounter, 23 mSDsluCounter, 88 mSDsCounter, 0 mSdLazyCounter, 158 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 25 SdHoareTripleChecker+Valid, 115 SdHoareTripleChecker+Invalid, 168 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 158 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-11-25 23:38:04,448 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [25 Valid, 115 Invalid, 168 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 158 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2022-11-25 23:38:04,449 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2022-11-25 23:38:04,459 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 42. [2022-11-25 23:38:04,460 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 30 states have (on average 1.0333333333333334) internal successors, (31), 30 states have internal predecessors, (31), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-11-25 23:38:04,461 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 51 transitions. [2022-11-25 23:38:04,461 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 51 transitions. Word has length 62 [2022-11-25 23:38:04,461 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-25 23:38:04,461 INFO L495 AbstractCegarLoop]: Abstraction has 42 states and 51 transitions. [2022-11-25 23:38:04,462 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 3.6666666666666665) internal successors, (44), 12 states have internal predecessors, (44), 8 states have call successors, (16), 1 states have call predecessors, (16), 1 states have return successors, (16), 8 states have call predecessors, (16), 8 states have call successors, (16) [2022-11-25 23:38:04,462 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 51 transitions. [2022-11-25 23:38:04,464 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2022-11-25 23:38:04,464 INFO L187 NwaCegarLoop]: Found error trace [2022-11-25 23:38:04,464 INFO L195 NwaCegarLoop]: trace histogram [10, 10, 10, 5, 5, 5, 5, 5, 5, 5, 4, 4, 1, 1, 1, 1] [2022-11-25 23:38:04,478 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-11-25 23:38:04,691 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (10)] Forceful destruction successful, exit code 0 [2022-11-25 23:38:04,884 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt (11)] Forceful destruction successful, exit code 0 [2022-11-25 23:38:05,078 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true,10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3,11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt [2022-11-25 23:38:05,078 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-25 23:38:05,079 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 23:38:05,079 INFO L85 PathProgramCache]: Analyzing trace with hash -497065601, now seen corresponding path program 4 times [2022-11-25 23:38:05,080 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-25 23:38:05,080 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [952771166] [2022-11-25 23:38:05,080 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-25 23:38:05,080 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-25 23:38:05,081 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/mathsat [2022-11-25 23:38:05,082 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-25 23:38:05,088 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (13)] Waiting until timeout for monitored process [2022-11-25 23:38:05,654 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-25 23:38:05,655 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-25 23:38:05,692 INFO L263 TraceCheckSpWp]: Trace formula consists of 1386 conjuncts, 52 conjunts are in the unsatisfiable core [2022-11-25 23:38:05,697 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-25 23:38:06,569 INFO L134 CoverageAnalysis]: Checked inductivity of 246 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2022-11-25 23:38:06,570 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-25 23:38:06,783 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-25 23:38:06,783 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [952771166] [2022-11-25 23:38:06,784 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [952771166] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-25 23:38:06,784 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [2096939117] [2022-11-25 23:38:06,784 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-25 23:38:06,784 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-25 23:38:06,784 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/cvc4 [2022-11-25 23:38:06,788 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-25 23:38:06,795 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt (14)] Waiting until timeout for monitored process [2022-11-25 23:38:07,902 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-25 23:38:07,902 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-25 23:38:07,941 INFO L263 TraceCheckSpWp]: Trace formula consists of 1386 conjuncts, 54 conjunts are in the unsatisfiable core [2022-11-25 23:38:07,946 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-25 23:38:08,575 INFO L134 CoverageAnalysis]: Checked inductivity of 246 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2022-11-25 23:38:08,575 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-25 23:38:08,704 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [2096939117] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-25 23:38:08,704 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [345103376] [2022-11-25 23:38:08,704 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-25 23:38:08,705 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-25 23:38:08,705 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/z3 [2022-11-25 23:38:08,706 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-25 23:38:08,710 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-11-25 23:38:09,210 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-25 23:38:09,210 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-25 23:38:09,236 INFO L263 TraceCheckSpWp]: Trace formula consists of 1386 conjuncts, 55 conjunts are in the unsatisfiable core [2022-11-25 23:38:09,241 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-25 23:38:10,034 INFO L134 CoverageAnalysis]: Checked inductivity of 246 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2022-11-25 23:38:10,034 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-25 23:38:10,175 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [345103376] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-25 23:38:10,175 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-25 23:38:10,176 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 9] total 9 [2022-11-25 23:38:10,176 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2084295914] [2022-11-25 23:38:10,176 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-25 23:38:10,176 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-11-25 23:38:10,177 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-25 23:38:10,177 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-11-25 23:38:10,177 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2022-11-25 23:38:10,177 INFO L87 Difference]: Start difference. First operand 42 states and 51 transitions. Second operand has 9 states, 9 states have (on average 3.5555555555555554) internal successors, (32), 9 states have internal predecessors, (32), 5 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 5 states have call predecessors, (10), 5 states have call successors, (10) [2022-11-25 23:38:11,296 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-25 23:38:11,297 INFO L93 Difference]: Finished difference Result 57 states and 70 transitions. [2022-11-25 23:38:11,297 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-25 23:38:11,297 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 3.5555555555555554) internal successors, (32), 9 states have internal predecessors, (32), 5 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 5 states have call predecessors, (10), 5 states have call successors, (10) Word has length 77 [2022-11-25 23:38:11,298 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-25 23:38:11,298 INFO L225 Difference]: With dead ends: 57 [2022-11-25 23:38:11,299 INFO L226 Difference]: Without dead ends: 55 [2022-11-25 23:38:11,299 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 245 GetRequests, 229 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=58, Invalid=182, Unknown=0, NotChecked=0, Total=240 [2022-11-25 23:38:11,300 INFO L413 NwaCegarLoop]: 31 mSDtfsCounter, 23 mSDsluCounter, 121 mSDsCounter, 0 mSdLazyCounter, 180 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 25 SdHoareTripleChecker+Valid, 152 SdHoareTripleChecker+Invalid, 192 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 180 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-11-25 23:38:11,300 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [25 Valid, 152 Invalid, 192 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 180 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2022-11-25 23:38:11,301 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2022-11-25 23:38:11,312 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 49. [2022-11-25 23:38:11,313 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 49 states, 35 states have (on average 1.0285714285714285) internal successors, (36), 35 states have internal predecessors, (36), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2022-11-25 23:38:11,314 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 60 transitions. [2022-11-25 23:38:11,314 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 60 transitions. Word has length 77 [2022-11-25 23:38:11,314 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-25 23:38:11,315 INFO L495 AbstractCegarLoop]: Abstraction has 49 states and 60 transitions. [2022-11-25 23:38:11,315 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 3.5555555555555554) internal successors, (32), 9 states have internal predecessors, (32), 5 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 5 states have call predecessors, (10), 5 states have call successors, (10) [2022-11-25 23:38:11,315 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 60 transitions. [2022-11-25 23:38:11,317 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2022-11-25 23:38:11,317 INFO L187 NwaCegarLoop]: Found error trace [2022-11-25 23:38:11,317 INFO L195 NwaCegarLoop]: trace histogram [12, 12, 12, 6, 6, 6, 6, 6, 6, 6, 5, 5, 1, 1, 1, 1] [2022-11-25 23:38:11,337 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (13)] Ended with exit code 0 [2022-11-25 23:38:11,529 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt (14)] Forceful destruction successful, exit code 0 [2022-11-25 23:38:11,736 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Forceful destruction successful, exit code 0 [2022-11-25 23:38:11,922 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3,14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt,15 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-25 23:38:11,923 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-25 23:38:11,923 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 23:38:11,923 INFO L85 PathProgramCache]: Analyzing trace with hash -1068369757, now seen corresponding path program 5 times [2022-11-25 23:38:11,924 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-25 23:38:11,924 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [723789179] [2022-11-25 23:38:11,924 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-25 23:38:11,924 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-25 23:38:11,924 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/mathsat [2022-11-25 23:38:11,925 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-25 23:38:11,927 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (16)] Waiting until timeout for monitored process [2022-11-25 23:38:12,779 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 9 check-sat command(s) [2022-11-25 23:38:12,779 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-25 23:38:12,825 INFO L263 TraceCheckSpWp]: Trace formula consists of 1672 conjuncts, 59 conjunts are in the unsatisfiable core [2022-11-25 23:38:12,830 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-25 23:38:13,864 INFO L134 CoverageAnalysis]: Checked inductivity of 364 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 264 trivial. 0 not checked. [2022-11-25 23:38:13,865 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-25 23:38:14,089 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-25 23:38:14,089 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [723789179] [2022-11-25 23:38:14,089 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [723789179] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-25 23:38:14,089 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [68125749] [2022-11-25 23:38:14,089 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-25 23:38:14,089 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-25 23:38:14,089 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/cvc4 [2022-11-25 23:38:14,095 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-25 23:38:14,118 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt (17)] Waiting until timeout for monitored process [2022-11-25 23:38:17,639 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 9 check-sat command(s) [2022-11-25 23:38:17,639 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-25 23:38:17,704 INFO L263 TraceCheckSpWp]: Trace formula consists of 1672 conjuncts, 64 conjunts are in the unsatisfiable core [2022-11-25 23:38:17,712 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-25 23:38:18,559 INFO L134 CoverageAnalysis]: Checked inductivity of 364 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 264 trivial. 0 not checked. [2022-11-25 23:38:18,559 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-25 23:38:18,693 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [68125749] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-25 23:38:18,693 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1437846810] [2022-11-25 23:38:18,694 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-25 23:38:18,694 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-25 23:38:18,694 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/z3 [2022-11-25 23:38:18,699 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-25 23:38:18,703 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-11-25 23:38:24,582 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 9 check-sat command(s) [2022-11-25 23:38:24,582 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-25 23:38:24,622 INFO L263 TraceCheckSpWp]: Trace formula consists of 1672 conjuncts, 70 conjunts are in the unsatisfiable core [2022-11-25 23:38:24,630 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-25 23:38:25,602 INFO L134 CoverageAnalysis]: Checked inductivity of 364 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 264 trivial. 0 not checked. [2022-11-25 23:38:25,602 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-25 23:38:25,744 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1437846810] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-25 23:38:25,745 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-25 23:38:25,745 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 10] total 10 [2022-11-25 23:38:25,745 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [498189851] [2022-11-25 23:38:25,745 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-25 23:38:25,745 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-11-25 23:38:25,746 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-25 23:38:25,746 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-11-25 23:38:25,746 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=102, Unknown=0, NotChecked=0, Total=132 [2022-11-25 23:38:25,747 INFO L87 Difference]: Start difference. First operand 49 states and 60 transitions. Second operand has 10 states, 10 states have (on average 3.7) internal successors, (37), 10 states have internal predecessors, (37), 6 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 6 states have call predecessors, (12), 6 states have call successors, (12) [2022-11-25 23:38:27,362 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-25 23:38:27,362 INFO L93 Difference]: Finished difference Result 64 states and 79 transitions. [2022-11-25 23:38:27,363 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-25 23:38:27,363 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 3.7) internal successors, (37), 10 states have internal predecessors, (37), 6 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 6 states have call predecessors, (12), 6 states have call successors, (12) Word has length 92 [2022-11-25 23:38:27,364 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-25 23:38:27,364 INFO L225 Difference]: With dead ends: 64 [2022-11-25 23:38:27,364 INFO L226 Difference]: Without dead ends: 62 [2022-11-25 23:38:27,365 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 291 GetRequests, 273 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=67, Invalid=239, Unknown=0, NotChecked=0, Total=306 [2022-11-25 23:38:27,366 INFO L413 NwaCegarLoop]: 35 mSDtfsCounter, 27 mSDsluCounter, 155 mSDsCounter, 0 mSdLazyCounter, 256 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 29 SdHoareTripleChecker+Valid, 190 SdHoareTripleChecker+Invalid, 271 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 256 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.3s IncrementalHoareTripleChecker+Time [2022-11-25 23:38:27,366 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [29 Valid, 190 Invalid, 271 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 256 Invalid, 0 Unknown, 0 Unchecked, 1.3s Time] [2022-11-25 23:38:27,367 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62 states. [2022-11-25 23:38:27,381 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62 to 56. [2022-11-25 23:38:27,382 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 56 states, 40 states have (on average 1.025) internal successors, (41), 40 states have internal predecessors, (41), 14 states have call successors, (14), 1 states have call predecessors, (14), 1 states have return successors, (14), 14 states have call predecessors, (14), 14 states have call successors, (14) [2022-11-25 23:38:27,383 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 69 transitions. [2022-11-25 23:38:27,383 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 69 transitions. Word has length 92 [2022-11-25 23:38:27,383 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-25 23:38:27,383 INFO L495 AbstractCegarLoop]: Abstraction has 56 states and 69 transitions. [2022-11-25 23:38:27,384 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 3.7) internal successors, (37), 10 states have internal predecessors, (37), 6 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 6 states have call predecessors, (12), 6 states have call successors, (12) [2022-11-25 23:38:27,384 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 69 transitions. [2022-11-25 23:38:27,385 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2022-11-25 23:38:27,386 INFO L187 NwaCegarLoop]: Found error trace [2022-11-25 23:38:27,386 INFO L195 NwaCegarLoop]: trace histogram [14, 14, 14, 7, 7, 7, 7, 7, 7, 7, 6, 6, 1, 1, 1, 1] [2022-11-25 23:38:27,408 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Forceful destruction successful, exit code 0 [2022-11-25 23:38:27,605 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt (17)] Forceful destruction successful, exit code 0 [2022-11-25 23:38:27,813 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (16)] Forceful destruction successful, exit code 0 [2022-11-25 23:38:27,994 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 18 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true,17 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt,16 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-25 23:38:27,995 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-25 23:38:27,995 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 23:38:27,995 INFO L85 PathProgramCache]: Analyzing trace with hash -1031686913, now seen corresponding path program 6 times [2022-11-25 23:38:27,996 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-25 23:38:27,997 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [469257064] [2022-11-25 23:38:27,997 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-11-25 23:38:27,997 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-25 23:38:27,997 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/mathsat [2022-11-25 23:38:27,998 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-25 23:38:27,999 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (19)] Waiting until timeout for monitored process [2022-11-25 23:38:29,352 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2022-11-25 23:38:29,352 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-25 23:38:29,426 INFO L263 TraceCheckSpWp]: Trace formula consists of 1935 conjuncts, 394 conjunts are in the unsatisfiable core [2022-11-25 23:38:29,441 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-25 23:38:43,451 WARN L859 $PredicateComparison]: unable to prove that (let ((.cse0 ((_ zero_extend 16) |c_ULTIMATE.start_main_~mask_SORT_11~0#1|))) (and (= ((_ extract 15 0) (bvand .cse0 ((_ zero_extend 16) ((_ extract 15 0) (let ((.cse1 ((_ zero_extend 16) ((_ zero_extend 8) ((_ extract 7 0) (bvand ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_1~0#1|) ((_ zero_extend 24) |c_ULTIMATE.start_main_~var_8~0#1|))))))) (bvadd .cse1 ((_ zero_extend 16) ((_ extract 15 0) (bvand .cse0 ((_ zero_extend 16) ((_ extract 15 0) (bvadd ((_ zero_extend 16) ((_ extract 15 0) (bvand .cse0 ((_ zero_extend 16) ((_ extract 15 0) (bvadd ((_ zero_extend 16) ((_ extract 15 0) (bvand .cse0 ((_ zero_extend 16) ((_ extract 15 0) (bvadd ((_ zero_extend 16) ((_ extract 15 0) (bvand .cse0 ((_ zero_extend 16) ((_ extract 15 0) .cse1))))) .cse1)))))) .cse1)))))) .cse1)))))))))))) |c_ULTIMATE.start_main_~state_76~0#1|) (= (_ bv64 16) |c_ULTIMATE.start_main_~var_119~0#1|) (= |c_ULTIMATE.start_main_~mask_SORT_105~0#1| (_ bv3 8)) (= (_ bv2147483647 32) |c_ULTIMATE.start_main_~mask_SORT_9~0#1|) (= (_ bv1048575 32) |c_ULTIMATE.start_main_~mask_SORT_32~0#1|) (= (_ bv4194303 32) |c_ULTIMATE.start_main_~mask_SORT_38~0#1|) (= (_ bv127 8) |c_ULTIMATE.start_main_~mask_SORT_154~0#1|) (= |c_ULTIMATE.start_main_~var_155~0#1| (_ bv64 8)) (= (_ bv127 8) |c_ULTIMATE.start_main_~var_112~0#1|) (= (bvadd (_ bv1 8) |c_ULTIMATE.start_main_~mask_SORT_12~0#1|) (_ bv0 8)) (= (_ bv1 8) |c_ULTIMATE.start_main_~var_106~0#1|) (= (_ bv32768 16) |c_ULTIMATE.start_main_~msb_SORT_11~0#1|) (let ((.cse13 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_12~0#1|))) (let ((.cse10 ((_ sign_extend 24) ((_ extract 7 0) (bvand .cse13 ((_ zero_extend 24) |c_ULTIMATE.start_main_~var_112~0#1|))))) (.cse2 ((_ extract 15 0) ((_ zero_extend 16) |c_ULTIMATE.start_main_~var_119~0#1|)))) (let ((.cse7 (bvmul .cse10 ((_ sign_extend 16) ((_ extract 15 0) (bvand .cse0 ((_ zero_extend 16) .cse2)))))) (.cse5 ((_ sign_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_105~0#1|) ((_ zero_extend 24) |c_ULTIMATE.start_main_~var_106~0#1|))))) (.cse6 (bvshl ((_ zero_extend 16) ((_ zero_extend 8) |c_ULTIMATE.start_main_~var_13~0#1|)) (_ bv8 32))) (.cse14 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |c_ULTIMATE.start_main_~var_155~0#1|) ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_154~0#1|)))))) (or (= .cse2 |c_ULTIMATE.start_main_~state_17~0#1|) (exists ((|v_ULTIMATE.start_main_~var_16_arg_1~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_156_arg_0~0#1_5| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_16_arg_1~0#1_18| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_156_arg_0~0#1_4| (_ BitVec 8))) (= |c_ULTIMATE.start_main_~state_17~0#1| ((_ extract 15 0) ((_ zero_extend 16) ((_ extract 15 0) (bvlshr (bvadd (bvmul ((_ sign_extend 16) ((_ extract 15 0) (bvand .cse0 ((_ zero_extend 16) ((_ extract 15 0) ((_ zero_extend 16) ((_ extract 15 0) (bvlshr (bvadd (let ((.cse4 (bvand |c_ULTIMATE.start_main_~mask_SORT_26~0#1| (bvmul .cse5 ((_ sign_extend 16) ((_ extract 15 0) (bvand .cse0 ((_ zero_extend 16) ((_ extract 15 0) (bvor .cse6 ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_16_arg_1~0#1_19|))))))))))) (let ((.cse3 ((_ zero_extend 24) ((_ extract 7 0) (bvlshr .cse4 (_ bv17 32)))))) (bvor (bvshl .cse3 (_ bv22 32)) (bvand |c_ULTIMATE.start_main_~mask_SORT_38~0#1| (bvor (bvand (bvor (bvshl .cse3 (_ bv20 32)) (bvand (bvor (bvand (bvor .cse4 (bvshl .cse3 (_ bv18 32))) |c_ULTIMATE.start_main_~mask_SORT_29~0#1|) (bvshl .cse3 (_ bv19 32))) |c_ULTIMATE.start_main_~mask_SORT_32~0#1|)) |c_ULTIMATE.start_main_~mask_SORT_35~0#1|) (bvshl .cse3 (_ bv21 32))))))) (bvmul ((_ sign_extend 16) ((_ extract 15 0) (bvand .cse0 ((_ zero_extend 16) ((_ extract 15 0) ((_ zero_extend 16) ((_ extract 15 0) (bvlshr (bvadd ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_156_arg_0~0#1_4|) .cse7 (let ((.cse9 (bvand |c_ULTIMATE.start_main_~mask_SORT_26~0#1| (bvmul .cse5 ((_ sign_extend 16) ((_ extract 15 0) (bvand .cse0 ((_ zero_extend 16) ((_ extract 15 0) (bvor .cse6 ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_16_arg_1~0#1_18|))))))))))) (let ((.cse8 ((_ zero_extend 24) ((_ extract 7 0) (bvlshr .cse9 (_ bv17 32)))))) (bvor (bvand |c_ULTIMATE.start_main_~mask_SORT_38~0#1| (bvor (bvand (bvor (bvshl .cse8 (_ bv20 32)) (bvand (bvor (bvand (bvor (bvshl .cse8 (_ bv18 32)) .cse9) |c_ULTIMATE.start_main_~mask_SORT_29~0#1|) (bvshl .cse8 (_ bv19 32))) |c_ULTIMATE.start_main_~mask_SORT_32~0#1|)) |c_ULTIMATE.start_main_~mask_SORT_35~0#1|) (bvshl .cse8 (_ bv21 32)))) (bvshl .cse8 (_ bv22 32)))))) (_ bv7 32))))))))) .cse10) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_156_arg_0~0#1_5|)) (_ bv7 32))))))))) .cse10) (let ((.cse12 (bvand |c_ULTIMATE.start_main_~mask_SORT_26~0#1| (bvmul .cse5 ((_ sign_extend 16) ((_ extract 15 0) (bvand .cse0 ((_ zero_extend 16) ((_ extract 15 0) (bvor .cse6 ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse13 ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~var_14~0#1|)))))))))))))))) (let ((.cse11 ((_ zero_extend 24) ((_ extract 7 0) (bvlshr .cse12 (_ bv17 32)))))) (bvor (bvand |c_ULTIMATE.start_main_~mask_SORT_38~0#1| (bvor (bvand |c_ULTIMATE.start_main_~mask_SORT_35~0#1| (bvor (bvshl .cse11 (_ bv20 32)) (bvand (bvor (bvand (bvor (bvshl .cse11 (_ bv18 32)) .cse12) |c_ULTIMATE.start_main_~mask_SORT_29~0#1|) (bvshl .cse11 (_ bv19 32))) |c_ULTIMATE.start_main_~mask_SORT_32~0#1|))) (bvshl .cse11 (_ bv21 32)))) (bvshl .cse11 (_ bv22 32))))) .cse14) (_ bv7 32))))))) (exists ((|v_ULTIMATE.start_main_~var_16_arg_1~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_156_arg_0~0#1_5| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_16_arg_1~0#1_18| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_156_arg_0~0#1_4| (_ BitVec 8))) (= ((_ extract 15 0) ((_ zero_extend 16) ((_ extract 15 0) (bvlshr (bvadd (bvmul ((_ sign_extend 16) ((_ extract 15 0) (bvand .cse0 ((_ zero_extend 16) ((_ extract 15 0) ((_ zero_extend 16) ((_ extract 15 0) (bvlshr (bvadd (let ((.cse16 (bvand |c_ULTIMATE.start_main_~mask_SORT_26~0#1| (bvmul .cse5 ((_ sign_extend 16) ((_ extract 15 0) (bvand .cse0 ((_ zero_extend 16) ((_ extract 15 0) (bvor .cse6 ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_16_arg_1~0#1_19|))))))))))) (let ((.cse15 ((_ zero_extend 24) ((_ extract 7 0) (bvlshr .cse16 (_ bv17 32)))))) (bvor (bvshl .cse15 (_ bv22 32)) (bvand |c_ULTIMATE.start_main_~mask_SORT_38~0#1| (bvor (bvand (bvor (bvshl .cse15 (_ bv20 32)) (bvand (bvor (bvand (bvor .cse16 (bvshl .cse15 (_ bv18 32))) |c_ULTIMATE.start_main_~mask_SORT_29~0#1|) (bvshl .cse15 (_ bv19 32))) |c_ULTIMATE.start_main_~mask_SORT_32~0#1|)) |c_ULTIMATE.start_main_~mask_SORT_35~0#1|) (bvshl .cse15 (_ bv21 32))))))) (bvmul ((_ sign_extend 16) ((_ extract 15 0) (bvand .cse0 ((_ zero_extend 16) ((_ extract 15 0) ((_ zero_extend 16) ((_ extract 15 0) (bvlshr (bvadd ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_156_arg_0~0#1_4|) .cse7 (let ((.cse18 (bvand |c_ULTIMATE.start_main_~mask_SORT_26~0#1| (bvmul .cse5 ((_ sign_extend 16) ((_ extract 15 0) (bvand .cse0 ((_ zero_extend 16) ((_ extract 15 0) (bvor .cse6 ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_16_arg_1~0#1_18|))))))))))) (let ((.cse17 ((_ zero_extend 24) ((_ extract 7 0) (bvlshr .cse18 (_ bv17 32)))))) (bvor (bvand |c_ULTIMATE.start_main_~mask_SORT_38~0#1| (bvor (bvand (bvor (bvshl .cse17 (_ bv20 32)) (bvand (bvor (bvand (bvor (bvshl .cse17 (_ bv18 32)) .cse18) |c_ULTIMATE.start_main_~mask_SORT_29~0#1|) (bvshl .cse17 (_ bv19 32))) |c_ULTIMATE.start_main_~mask_SORT_32~0#1|)) |c_ULTIMATE.start_main_~mask_SORT_35~0#1|) (bvshl .cse17 (_ bv21 32)))) (bvshl .cse17 (_ bv22 32)))))) (_ bv7 32))))))))) .cse10) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_156_arg_0~0#1_5|)) (_ bv7 32))))))))) .cse10) (let ((.cse20 (bvand |c_ULTIMATE.start_main_~mask_SORT_26~0#1| (bvmul .cse5 ((_ sign_extend 16) ((_ extract 15 0) (bvand .cse0 ((_ zero_extend 16) ((_ extract 15 0) (bvor ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~var_13~0#1|))) .cse13))) .cse6)))))))))) (let ((.cse19 ((_ zero_extend 24) ((_ extract 7 0) (bvlshr .cse20 (_ bv17 32)))))) (bvor (bvshl .cse19 (_ bv22 32)) (bvand (bvor (bvshl .cse19 (_ bv21 32)) (bvand |c_ULTIMATE.start_main_~mask_SORT_35~0#1| (bvor (bvand (bvor (bvshl .cse19 (_ bv19 32)) (bvand (bvor (bvshl .cse19 (_ bv18 32)) .cse20) |c_ULTIMATE.start_main_~mask_SORT_29~0#1|)) |c_ULTIMATE.start_main_~mask_SORT_32~0#1|) (bvshl .cse19 (_ bv20 32))))) |c_ULTIMATE.start_main_~mask_SORT_38~0#1|)))) .cse14) (_ bv7 32))))) |c_ULTIMATE.start_main_~state_17~0#1|)))))) (= |c_ULTIMATE.start_main_~var_10~0#1| (_ bv0 32)) (= (bvadd |c_ULTIMATE.start_main_~var_14~0#1| (_ bv56 8)) (_ bv0 8)) (= |c_ULTIMATE.start_main_~var_13~0#1| (_ bv0 8)) (= (_ bv1 8) |c_ULTIMATE.start_main_~mask_SORT_1~0#1|) (= (_ bv524287 32) |c_ULTIMATE.start_main_~mask_SORT_29~0#1|) (= |c_ULTIMATE.start_main_~msb_SORT_12~0#1| (_ bv128 8)) (= (bvadd |c_ULTIMATE.start_main_~mask_SORT_11~0#1| (_ bv1 16)) (_ bv0 16)) (= |c_ULTIMATE.start_main_~mask_SORT_26~0#1| (_ bv262143 32)) (= |c_ULTIMATE.start_main_~mask_SORT_35~0#1| (_ bv2097151 32)) (= (_ bv2 8) |c_ULTIMATE.start_main_~msb_SORT_105~0#1|) (= (bvadd |c_ULTIMATE.start_main_~mask_SORT_20~0#1| (_ bv1 32)) (_ bv0 32)) (= |c_ULTIMATE.start_main_~var_7~0#1| (_ bv0 8)) (= (_ bv1 8) |c_ULTIMATE.start_main_~var_8~0#1|))) is different from true [2022-11-25 23:38:45,767 WARN L859 $PredicateComparison]: unable to prove that (let ((.cse2 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_1~0#1|)) (.cse0 ((_ zero_extend 16) |c_ULTIMATE.start_main_~mask_SORT_11~0#1|))) (and (= ((_ extract 15 0) (bvand .cse0 ((_ zero_extend 16) ((_ extract 15 0) (let ((.cse1 ((_ zero_extend 16) ((_ zero_extend 8) ((_ extract 7 0) (bvand .cse2 ((_ zero_extend 24) |c_ULTIMATE.start_main_~var_8~0#1|))))))) (bvadd .cse1 ((_ zero_extend 16) ((_ extract 15 0) (bvand .cse0 ((_ zero_extend 16) ((_ extract 15 0) (bvadd ((_ zero_extend 16) ((_ extract 15 0) (bvand .cse0 ((_ zero_extend 16) ((_ extract 15 0) (bvadd ((_ zero_extend 16) ((_ extract 15 0) (bvand .cse0 ((_ zero_extend 16) ((_ extract 15 0) (bvadd ((_ zero_extend 16) ((_ extract 15 0) (bvand .cse0 ((_ zero_extend 16) ((_ extract 15 0) .cse1))))) .cse1)))))) .cse1)))))) .cse1)))))))))))) |c_ULTIMATE.start_main_~state_76~0#1|) (= (_ bv64 16) |c_ULTIMATE.start_main_~var_119~0#1|) (exists ((|v_ULTIMATE.start_main_#t~nondet7#1_5| (_ BitVec 8))) (= |c_ULTIMATE.start_main_~input_4~0#1| ((_ extract 7 0) (bvand .cse2 ((_ zero_extend 24) |v_ULTIMATE.start_main_#t~nondet7#1_5|))))) (= |c_ULTIMATE.start_main_~mask_SORT_105~0#1| (_ bv3 8)) (= (_ bv2147483647 32) |c_ULTIMATE.start_main_~mask_SORT_9~0#1|) (= (_ bv1048575 32) |c_ULTIMATE.start_main_~mask_SORT_32~0#1|) (= (_ bv4194303 32) |c_ULTIMATE.start_main_~mask_SORT_38~0#1|) (= (_ bv127 8) |c_ULTIMATE.start_main_~mask_SORT_154~0#1|) (= |c_ULTIMATE.start_main_~var_155~0#1| (_ bv64 8)) (= (_ bv127 8) |c_ULTIMATE.start_main_~var_112~0#1|) (= (bvadd (_ bv1 8) |c_ULTIMATE.start_main_~mask_SORT_12~0#1|) (_ bv0 8)) (= (_ bv1 8) |c_ULTIMATE.start_main_~var_106~0#1|) (= (_ bv32768 16) |c_ULTIMATE.start_main_~msb_SORT_11~0#1|) (let ((.cse14 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_12~0#1|))) (let ((.cse11 ((_ sign_extend 24) ((_ extract 7 0) (bvand .cse14 ((_ zero_extend 24) |c_ULTIMATE.start_main_~var_112~0#1|))))) (.cse3 ((_ extract 15 0) ((_ zero_extend 16) |c_ULTIMATE.start_main_~var_119~0#1|)))) (let ((.cse8 (bvmul .cse11 ((_ sign_extend 16) ((_ extract 15 0) (bvand .cse0 ((_ zero_extend 16) .cse3)))))) (.cse6 ((_ sign_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_105~0#1|) ((_ zero_extend 24) |c_ULTIMATE.start_main_~var_106~0#1|))))) (.cse7 (bvshl ((_ zero_extend 16) ((_ zero_extend 8) |c_ULTIMATE.start_main_~var_13~0#1|)) (_ bv8 32))) (.cse15 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |c_ULTIMATE.start_main_~var_155~0#1|) ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_154~0#1|)))))) (or (= .cse3 |c_ULTIMATE.start_main_~state_17~0#1|) (exists ((|v_ULTIMATE.start_main_~var_16_arg_1~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_156_arg_0~0#1_5| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_16_arg_1~0#1_18| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_156_arg_0~0#1_4| (_ BitVec 8))) (= |c_ULTIMATE.start_main_~state_17~0#1| ((_ extract 15 0) ((_ zero_extend 16) ((_ extract 15 0) (bvlshr (bvadd (bvmul ((_ sign_extend 16) ((_ extract 15 0) (bvand .cse0 ((_ zero_extend 16) ((_ extract 15 0) ((_ zero_extend 16) ((_ extract 15 0) (bvlshr (bvadd (let ((.cse5 (bvand |c_ULTIMATE.start_main_~mask_SORT_26~0#1| (bvmul .cse6 ((_ sign_extend 16) ((_ extract 15 0) (bvand .cse0 ((_ zero_extend 16) ((_ extract 15 0) (bvor .cse7 ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_16_arg_1~0#1_19|))))))))))) (let ((.cse4 ((_ zero_extend 24) ((_ extract 7 0) (bvlshr .cse5 (_ bv17 32)))))) (bvor (bvshl .cse4 (_ bv22 32)) (bvand |c_ULTIMATE.start_main_~mask_SORT_38~0#1| (bvor (bvand (bvor (bvshl .cse4 (_ bv20 32)) (bvand (bvor (bvand (bvor .cse5 (bvshl .cse4 (_ bv18 32))) |c_ULTIMATE.start_main_~mask_SORT_29~0#1|) (bvshl .cse4 (_ bv19 32))) |c_ULTIMATE.start_main_~mask_SORT_32~0#1|)) |c_ULTIMATE.start_main_~mask_SORT_35~0#1|) (bvshl .cse4 (_ bv21 32))))))) (bvmul ((_ sign_extend 16) ((_ extract 15 0) (bvand .cse0 ((_ zero_extend 16) ((_ extract 15 0) ((_ zero_extend 16) ((_ extract 15 0) (bvlshr (bvadd ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_156_arg_0~0#1_4|) .cse8 (let ((.cse10 (bvand |c_ULTIMATE.start_main_~mask_SORT_26~0#1| (bvmul .cse6 ((_ sign_extend 16) ((_ extract 15 0) (bvand .cse0 ((_ zero_extend 16) ((_ extract 15 0) (bvor .cse7 ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_16_arg_1~0#1_18|))))))))))) (let ((.cse9 ((_ zero_extend 24) ((_ extract 7 0) (bvlshr .cse10 (_ bv17 32)))))) (bvor (bvand |c_ULTIMATE.start_main_~mask_SORT_38~0#1| (bvor (bvand (bvor (bvshl .cse9 (_ bv20 32)) (bvand (bvor (bvand (bvor (bvshl .cse9 (_ bv18 32)) .cse10) |c_ULTIMATE.start_main_~mask_SORT_29~0#1|) (bvshl .cse9 (_ bv19 32))) |c_ULTIMATE.start_main_~mask_SORT_32~0#1|)) |c_ULTIMATE.start_main_~mask_SORT_35~0#1|) (bvshl .cse9 (_ bv21 32)))) (bvshl .cse9 (_ bv22 32)))))) (_ bv7 32))))))))) .cse11) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_156_arg_0~0#1_5|)) (_ bv7 32))))))))) .cse11) (let ((.cse13 (bvand |c_ULTIMATE.start_main_~mask_SORT_26~0#1| (bvmul .cse6 ((_ sign_extend 16) ((_ extract 15 0) (bvand .cse0 ((_ zero_extend 16) ((_ extract 15 0) (bvor .cse7 ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse14 ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~var_14~0#1|)))))))))))))))) (let ((.cse12 ((_ zero_extend 24) ((_ extract 7 0) (bvlshr .cse13 (_ bv17 32)))))) (bvor (bvand |c_ULTIMATE.start_main_~mask_SORT_38~0#1| (bvor (bvand |c_ULTIMATE.start_main_~mask_SORT_35~0#1| (bvor (bvshl .cse12 (_ bv20 32)) (bvand (bvor (bvand (bvor (bvshl .cse12 (_ bv18 32)) .cse13) |c_ULTIMATE.start_main_~mask_SORT_29~0#1|) (bvshl .cse12 (_ bv19 32))) |c_ULTIMATE.start_main_~mask_SORT_32~0#1|))) (bvshl .cse12 (_ bv21 32)))) (bvshl .cse12 (_ bv22 32))))) .cse15) (_ bv7 32))))))) (exists ((|v_ULTIMATE.start_main_~var_16_arg_1~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_156_arg_0~0#1_5| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_16_arg_1~0#1_18| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_156_arg_0~0#1_4| (_ BitVec 8))) (= ((_ extract 15 0) ((_ zero_extend 16) ((_ extract 15 0) (bvlshr (bvadd (bvmul ((_ sign_extend 16) ((_ extract 15 0) (bvand .cse0 ((_ zero_extend 16) ((_ extract 15 0) ((_ zero_extend 16) ((_ extract 15 0) (bvlshr (bvadd (let ((.cse17 (bvand |c_ULTIMATE.start_main_~mask_SORT_26~0#1| (bvmul .cse6 ((_ sign_extend 16) ((_ extract 15 0) (bvand .cse0 ((_ zero_extend 16) ((_ extract 15 0) (bvor .cse7 ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_16_arg_1~0#1_19|))))))))))) (let ((.cse16 ((_ zero_extend 24) ((_ extract 7 0) (bvlshr .cse17 (_ bv17 32)))))) (bvor (bvshl .cse16 (_ bv22 32)) (bvand |c_ULTIMATE.start_main_~mask_SORT_38~0#1| (bvor (bvand (bvor (bvshl .cse16 (_ bv20 32)) (bvand (bvor (bvand (bvor .cse17 (bvshl .cse16 (_ bv18 32))) |c_ULTIMATE.start_main_~mask_SORT_29~0#1|) (bvshl .cse16 (_ bv19 32))) |c_ULTIMATE.start_main_~mask_SORT_32~0#1|)) |c_ULTIMATE.start_main_~mask_SORT_35~0#1|) (bvshl .cse16 (_ bv21 32))))))) (bvmul ((_ sign_extend 16) ((_ extract 15 0) (bvand .cse0 ((_ zero_extend 16) ((_ extract 15 0) ((_ zero_extend 16) ((_ extract 15 0) (bvlshr (bvadd ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_156_arg_0~0#1_4|) .cse8 (let ((.cse19 (bvand |c_ULTIMATE.start_main_~mask_SORT_26~0#1| (bvmul .cse6 ((_ sign_extend 16) ((_ extract 15 0) (bvand .cse0 ((_ zero_extend 16) ((_ extract 15 0) (bvor .cse7 ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_16_arg_1~0#1_18|))))))))))) (let ((.cse18 ((_ zero_extend 24) ((_ extract 7 0) (bvlshr .cse19 (_ bv17 32)))))) (bvor (bvand |c_ULTIMATE.start_main_~mask_SORT_38~0#1| (bvor (bvand (bvor (bvshl .cse18 (_ bv20 32)) (bvand (bvor (bvand (bvor (bvshl .cse18 (_ bv18 32)) .cse19) |c_ULTIMATE.start_main_~mask_SORT_29~0#1|) (bvshl .cse18 (_ bv19 32))) |c_ULTIMATE.start_main_~mask_SORT_32~0#1|)) |c_ULTIMATE.start_main_~mask_SORT_35~0#1|) (bvshl .cse18 (_ bv21 32)))) (bvshl .cse18 (_ bv22 32)))))) (_ bv7 32))))))))) .cse11) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_156_arg_0~0#1_5|)) (_ bv7 32))))))))) .cse11) (let ((.cse21 (bvand |c_ULTIMATE.start_main_~mask_SORT_26~0#1| (bvmul .cse6 ((_ sign_extend 16) ((_ extract 15 0) (bvand .cse0 ((_ zero_extend 16) ((_ extract 15 0) (bvor ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~var_13~0#1|))) .cse14))) .cse7)))))))))) (let ((.cse20 ((_ zero_extend 24) ((_ extract 7 0) (bvlshr .cse21 (_ bv17 32)))))) (bvor (bvshl .cse20 (_ bv22 32)) (bvand (bvor (bvshl .cse20 (_ bv21 32)) (bvand |c_ULTIMATE.start_main_~mask_SORT_35~0#1| (bvor (bvand (bvor (bvshl .cse20 (_ bv19 32)) (bvand (bvor (bvshl .cse20 (_ bv18 32)) .cse21) |c_ULTIMATE.start_main_~mask_SORT_29~0#1|)) |c_ULTIMATE.start_main_~mask_SORT_32~0#1|) (bvshl .cse20 (_ bv20 32))))) |c_ULTIMATE.start_main_~mask_SORT_38~0#1|)))) .cse15) (_ bv7 32))))) |c_ULTIMATE.start_main_~state_17~0#1|)))))) (= |c_ULTIMATE.start_main_~var_10~0#1| (_ bv0 32)) (= (bvadd |c_ULTIMATE.start_main_~var_14~0#1| (_ bv56 8)) (_ bv0 8)) (= |c_ULTIMATE.start_main_~var_13~0#1| (_ bv0 8)) (= (_ bv1 8) |c_ULTIMATE.start_main_~mask_SORT_1~0#1|) (= (_ bv524287 32) |c_ULTIMATE.start_main_~mask_SORT_29~0#1|) (= |c_ULTIMATE.start_main_~msb_SORT_12~0#1| (_ bv128 8)) (= (bvadd |c_ULTIMATE.start_main_~mask_SORT_11~0#1| (_ bv1 16)) (_ bv0 16)) (= |c_ULTIMATE.start_main_~mask_SORT_26~0#1| (_ bv262143 32)) (= |c_ULTIMATE.start_main_~mask_SORT_35~0#1| (_ bv2097151 32)) (= (_ bv2 8) |c_ULTIMATE.start_main_~msb_SORT_105~0#1|) (= (bvadd |c_ULTIMATE.start_main_~mask_SORT_20~0#1| (_ bv1 32)) (_ bv0 32)) (= |c_ULTIMATE.start_main_~var_7~0#1| (_ bv0 8)) (= (_ bv1 8) |c_ULTIMATE.start_main_~var_8~0#1|))) is different from true [2022-11-25 23:40:18,605 WARN L230 Executor]: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1) with exit command (exit)) stderr output: (error "out of memory") [2022-11-25 23:40:18,605 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Ended with exit code 101 [2022-11-25 23:40:18,607 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-25 23:40:18,607 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [469257064] [2022-11-25 23:40:18,607 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_DEPENDING: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") [2022-11-25 23:40:18,608 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [586109529] [2022-11-25 23:40:18,608 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-11-25 23:40:18,608 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-25 23:40:18,608 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/cvc4 [2022-11-25 23:40:18,609 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-25 23:40:18,611 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt (20)] Waiting until timeout for monitored process [2022-11-25 23:40:18,760 FATAL L? ?]: Ignoring exception! java.lang.IllegalStateException: ManagedScript already locked by de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.MonolithicImplicationChecker@4b218894 at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.ManagedScript.lock(ManagedScript.java:82) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.variables.ProgramVarUtils.constructConstantForAuxVar(ProgramVarUtils.java:116) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.UnmodifiableTransFormula.computeClosedFormula(UnmodifiableTransFormula.java:135) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.UnmodifiableTransFormula.(UnmodifiableTransFormula.java:90) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaBuilder.finishConstruction(TransFormulaBuilder.java:320) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.decoupleArrayValues(TransFormulaUtils.java:1296) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckUtils.decoupleArrayValues(TraceCheckUtils.java:387) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.InterpolatingTraceCheck.(InterpolatingTraceCheck.java:87) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:132) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:108) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:1) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getOrConstruct(IpTcStrategyModuleBase.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getInterpolantComputationStatus(IpTcStrategyModuleBase.java:77) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.tryExecuteInterpolantGenerator(AutomatonFreeRefinementEngine.java:266) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.generateProof(AutomatonFreeRefinementEngine.java:147) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.executeStrategy(AutomatonFreeRefinementEngine.java:137) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.(AutomatonFreeRefinementEngine.java:85) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:82) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:337) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:431) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:366) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:348) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:415) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:302) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseSequentialProgram(TraceAbstractionStarter.java:262) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:175) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:154) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:124) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:320) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) [2022-11-25 23:40:18,762 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1110709742] [2022-11-25 23:40:18,762 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-11-25 23:40:18,762 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-25 23:40:18,762 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/z3 [2022-11-25 23:40:18,770 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-25 23:40:18,782 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2022-11-25 23:40:18,886 FATAL L? ?]: Ignoring exception! java.lang.IllegalStateException: ManagedScript already locked by de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.MonolithicImplicationChecker@4b218894 at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.ManagedScript.lock(ManagedScript.java:82) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.variables.ProgramVarUtils.constructConstantForAuxVar(ProgramVarUtils.java:116) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.UnmodifiableTransFormula.computeClosedFormula(UnmodifiableTransFormula.java:135) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.UnmodifiableTransFormula.(UnmodifiableTransFormula.java:90) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaBuilder.finishConstruction(TransFormulaBuilder.java:320) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.decoupleArrayValues(TransFormulaUtils.java:1296) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckUtils.decoupleArrayValues(TraceCheckUtils.java:387) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.InterpolatingTraceCheck.(InterpolatingTraceCheck.java:87) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:132) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:108) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:1) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getOrConstruct(IpTcStrategyModuleBase.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getInterpolantComputationStatus(IpTcStrategyModuleBase.java:77) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.tryExecuteInterpolantGenerator(AutomatonFreeRefinementEngine.java:266) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.generateProof(AutomatonFreeRefinementEngine.java:147) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.executeStrategy(AutomatonFreeRefinementEngine.java:137) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.(AutomatonFreeRefinementEngine.java:85) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:82) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:337) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:431) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:366) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:348) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:415) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:302) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseSequentialProgram(TraceAbstractionStarter.java:262) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:175) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:154) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:124) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:320) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) [2022-11-25 23:40:18,888 INFO L184 FreeRefinementEngine]: Found 0 perfect and 0 imperfect interpolant sequences. [2022-11-25 23:40:18,888 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [] total 0 [2022-11-25 23:40:18,888 ERROR L170 FreeRefinementEngine]: Strategy WALRUS failed to provide any proof altough trace is infeasible [2022-11-25 23:40:18,888 INFO L360 BasicCegarLoop]: Counterexample might be feasible [2022-11-25 23:40:18,895 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-11-25 23:40:18,935 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (19)] Forceful destruction successful, exit code 0 [2022-11-25 23:40:19,122 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt (20)] Forceful destruction successful, exit code 0 [2022-11-25 23:40:19,318 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Forceful destruction successful, exit code 0 [2022-11-25 23:40:19,513 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 19 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3,20 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/cvc4 --incremental --print-success --lang smt,21 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e110839f-a28b-490b-9ece-72d81025153d/bin/utaipan-ByfvJB40ur/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-25 23:40:19,517 INFO L445 BasicCegarLoop]: Path program histogram: [6, 1, 1] [2022-11-25 23:40:19,520 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-25 23:40:19,567 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-25 23:40:19,568 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-25 23:40:19,568 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-25 23:40:19,568 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-25 23:40:19,569 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-25 23:40:19,569 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-25 23:40:19,569 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-25 23:40:19,636 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 25.11 11:40:19 BoogieIcfgContainer [2022-11-25 23:40:19,636 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-25 23:40:19,637 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-25 23:40:19,637 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-25 23:40:19,637 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-25 23:40:19,638 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 25.11 11:37:47" (3/4) ... [2022-11-25 23:40:19,641 INFO L140 WitnessPrinter]: No result that supports witness generation found [2022-11-25 23:40:19,642 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-25 23:40:19,642 INFO L158 Benchmark]: Toolchain (without parser) took 153579.97ms. Allocated memory was 65.0MB in the beginning and 343.9MB in the end (delta: 278.9MB). Free memory was 35.3MB in the beginning and 173.6MB in the end (delta: -138.3MB). Peak memory consumption was 139.9MB. Max. memory is 16.1GB. [2022-11-25 23:40:19,643 INFO L158 Benchmark]: CDTParser took 0.31ms. Allocated memory is still 65.0MB. Free memory was 43.2MB in the beginning and 43.2MB in the end (delta: 73.6kB). There was no memory consumed. Max. memory is 16.1GB. [2022-11-25 23:40:19,643 INFO L158 Benchmark]: CACSL2BoogieTranslator took 597.46ms. Allocated memory was 65.0MB in the beginning and 81.8MB in the end (delta: 16.8MB). Free memory was 35.0MB in the beginning and 47.3MB in the end (delta: -12.3MB). Peak memory consumption was 7.7MB. Max. memory is 16.1GB. [2022-11-25 23:40:19,643 INFO L158 Benchmark]: Boogie Procedure Inliner took 60.70ms. Allocated memory is still 81.8MB. Free memory was 47.3MB in the beginning and 43.5MB in the end (delta: 3.8MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. [2022-11-25 23:40:19,644 INFO L158 Benchmark]: Boogie Preprocessor took 89.49ms. Allocated memory is still 81.8MB. Free memory was 43.5MB in the beginning and 40.8MB in the end (delta: 2.7MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-11-25 23:40:19,644 INFO L158 Benchmark]: RCFGBuilder took 948.55ms. Allocated memory is still 81.8MB. Free memory was 40.8MB in the beginning and 45.7MB in the end (delta: -4.9MB). Peak memory consumption was 10.8MB. Max. memory is 16.1GB. [2022-11-25 23:40:19,644 INFO L158 Benchmark]: TraceAbstraction took 151871.39ms. Allocated memory was 81.8MB in the beginning and 343.9MB in the end (delta: 262.1MB). Free memory was 45.3MB in the beginning and 174.7MB in the end (delta: -129.4MB). Peak memory consumption was 131.8MB. Max. memory is 16.1GB. [2022-11-25 23:40:19,645 INFO L158 Benchmark]: Witness Printer took 4.77ms. Allocated memory is still 343.9MB. Free memory was 174.7MB in the beginning and 173.6MB in the end (delta: 1.1MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-11-25 23:40:19,647 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.31ms. Allocated memory is still 65.0MB. Free memory was 43.2MB in the beginning and 43.2MB in the end (delta: 73.6kB). There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 597.46ms. Allocated memory was 65.0MB in the beginning and 81.8MB in the end (delta: 16.8MB). Free memory was 35.0MB in the beginning and 47.3MB in the end (delta: -12.3MB). Peak memory consumption was 7.7MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 60.70ms. Allocated memory is still 81.8MB. Free memory was 47.3MB in the beginning and 43.5MB in the end (delta: 3.8MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. * Boogie Preprocessor took 89.49ms. Allocated memory is still 81.8MB. Free memory was 43.5MB in the beginning and 40.8MB in the end (delta: 2.7MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * RCFGBuilder took 948.55ms. Allocated memory is still 81.8MB. Free memory was 40.8MB in the beginning and 45.7MB in the end (delta: -4.9MB). Peak memory consumption was 10.8MB. Max. memory is 16.1GB. * TraceAbstraction took 151871.39ms. Allocated memory was 81.8MB in the beginning and 343.9MB in the end (delta: 262.1MB). Free memory was 45.3MB in the beginning and 174.7MB in the end (delta: -129.4MB). Peak memory consumption was 131.8MB. Max. memory is 16.1GB. * Witness Printer took 4.77ms. Allocated memory is still 343.9MB. Free memory was 174.7MB in the beginning and 173.6MB in the end (delta: 1.1MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 20]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: unable to decide satisfiability of path constraint. Possible FailurePath: [L25] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L26] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L28] const SORT_9 mask_SORT_9 = (SORT_9)-1 >> (sizeof(SORT_9) * 8 - 31); [L29] const SORT_9 msb_SORT_9 = (SORT_9)1 << (31 - 1); [L31] const SORT_11 mask_SORT_11 = (SORT_11)-1 >> (sizeof(SORT_11) * 8 - 16); [L32] const SORT_11 msb_SORT_11 = (SORT_11)1 << (16 - 1); [L34] const SORT_12 mask_SORT_12 = (SORT_12)-1 >> (sizeof(SORT_12) * 8 - 8); [L35] const SORT_12 msb_SORT_12 = (SORT_12)1 << (8 - 1); [L37] const SORT_20 mask_SORT_20 = (SORT_20)-1 >> (sizeof(SORT_20) * 8 - 32); [L38] const SORT_20 msb_SORT_20 = (SORT_20)1 << (32 - 1); [L40] const SORT_23 mask_SORT_23 = (SORT_23)-1 >> (sizeof(SORT_23) * 8 - 17); [L41] const SORT_23 msb_SORT_23 = (SORT_23)1 << (17 - 1); [L43] const SORT_26 mask_SORT_26 = (SORT_26)-1 >> (sizeof(SORT_26) * 8 - 18); [L44] const SORT_26 msb_SORT_26 = (SORT_26)1 << (18 - 1); [L46] const SORT_29 mask_SORT_29 = (SORT_29)-1 >> (sizeof(SORT_29) * 8 - 19); [L47] const SORT_29 msb_SORT_29 = (SORT_29)1 << (19 - 1); [L49] const SORT_32 mask_SORT_32 = (SORT_32)-1 >> (sizeof(SORT_32) * 8 - 20); [L50] const SORT_32 msb_SORT_32 = (SORT_32)1 << (20 - 1); [L52] const SORT_35 mask_SORT_35 = (SORT_35)-1 >> (sizeof(SORT_35) * 8 - 21); [L53] const SORT_35 msb_SORT_35 = (SORT_35)1 << (21 - 1); [L55] const SORT_38 mask_SORT_38 = (SORT_38)-1 >> (sizeof(SORT_38) * 8 - 22); [L56] const SORT_38 msb_SORT_38 = (SORT_38)1 << (22 - 1); [L58] const SORT_41 mask_SORT_41 = (SORT_41)-1 >> (sizeof(SORT_41) * 8 - 23); [L59] const SORT_41 msb_SORT_41 = (SORT_41)1 << (23 - 1); [L61] const SORT_44 mask_SORT_44 = (SORT_44)-1 >> (sizeof(SORT_44) * 8 - 24); [L62] const SORT_44 msb_SORT_44 = (SORT_44)1 << (24 - 1); [L64] const SORT_47 mask_SORT_47 = (SORT_47)-1 >> (sizeof(SORT_47) * 8 - 25); [L65] const SORT_47 msb_SORT_47 = (SORT_47)1 << (25 - 1); [L67] const SORT_50 mask_SORT_50 = (SORT_50)-1 >> (sizeof(SORT_50) * 8 - 26); [L68] const SORT_50 msb_SORT_50 = (SORT_50)1 << (26 - 1); [L70] const SORT_53 mask_SORT_53 = (SORT_53)-1 >> (sizeof(SORT_53) * 8 - 27); [L71] const SORT_53 msb_SORT_53 = (SORT_53)1 << (27 - 1); [L73] const SORT_56 mask_SORT_56 = (SORT_56)-1 >> (sizeof(SORT_56) * 8 - 28); [L74] const SORT_56 msb_SORT_56 = (SORT_56)1 << (28 - 1); [L76] const SORT_59 mask_SORT_59 = (SORT_59)-1 >> (sizeof(SORT_59) * 8 - 29); [L77] const SORT_59 msb_SORT_59 = (SORT_59)1 << (29 - 1); [L79] const SORT_62 mask_SORT_62 = (SORT_62)-1 >> (sizeof(SORT_62) * 8 - 30); [L80] const SORT_62 msb_SORT_62 = (SORT_62)1 << (30 - 1); [L82] const SORT_72 mask_SORT_72 = (SORT_72)-1 >> (sizeof(SORT_72) * 8 - 3); [L83] const SORT_72 msb_SORT_72 = (SORT_72)1 << (3 - 1); [L85] const SORT_96 mask_SORT_96 = (SORT_96)-1 >> (sizeof(SORT_96) * 8 - 4); [L86] const SORT_96 msb_SORT_96 = (SORT_96)1 << (4 - 1); [L88] const SORT_101 mask_SORT_101 = (SORT_101)-1 >> (sizeof(SORT_101) * 8 - 14); [L89] const SORT_101 msb_SORT_101 = (SORT_101)1 << (14 - 1); [L91] const SORT_105 mask_SORT_105 = (SORT_105)-1 >> (sizeof(SORT_105) * 8 - 2); [L92] const SORT_105 msb_SORT_105 = (SORT_105)1 << (2 - 1); [L94] const SORT_154 mask_SORT_154 = (SORT_154)-1 >> (sizeof(SORT_154) * 8 - 7); [L95] const SORT_154 msb_SORT_154 = (SORT_154)1 << (7 - 1); [L97] const SORT_1 var_7 = 0; [L98] const SORT_1 var_8 = 1; [L99] const SORT_9 var_10 = 0; [L100] const SORT_12 var_13 = 0; [L101] const SORT_12 var_14 = 200; [L102] const SORT_72 var_73 = 5; [L103] const SORT_11 var_75 = 0; [L104] const SORT_105 var_106 = 1; [L105] const SORT_12 var_112 = 127; [L106] const SORT_11 var_119 = 64; [L107] const SORT_11 var_121 = 1; [L108] const SORT_11 var_123 = 127; [L109] const SORT_11 var_126 = 200; [L110] const SORT_72 var_131 = 4; [L111] const SORT_72 var_134 = 6; [L112] const SORT_96 var_138 = 9; [L113] const SORT_154 var_155 = 64; [L114] const SORT_72 var_166 = 0; [L115] const SORT_96 var_169 = 0; [L117] SORT_1 input_2; [L118] SORT_1 input_3; [L119] SORT_1 input_4; [L121] SORT_1 state_5 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L122] SORT_11 state_17 = __VERIFIER_nondet_ushort() & mask_SORT_11; [L123] SORT_11 state_76 = __VERIFIER_nondet_ushort() & mask_SORT_11; [L124] SORT_96 state_97 = __VERIFIER_nondet_uchar() & mask_SORT_96; [L125] SORT_96 state_100 = __VERIFIER_nondet_uchar() & mask_SORT_96; [L127] SORT_11 init_77_arg_1 = var_75; [L128] state_76 = init_77_arg_1 [L131] input_2 = __VERIFIER_nondet_uchar() [L132] input_3 = __VERIFIER_nondet_uchar() [L133] input_3 = input_3 & mask_SORT_1 [L134] input_4 = __VERIFIER_nondet_uchar() [L135] input_4 = input_4 & mask_SORT_1 [L137] SORT_1 var_84_arg_0 = state_5; [L138] SORT_1 var_84 = ~var_84_arg_0; [L139] SORT_1 var_85_arg_0 = var_84; [L140] SORT_1 var_85 = ~var_85_arg_0; [L141] SORT_1 var_86_arg_0 = state_5; [L142] SORT_1 var_86_arg_1 = var_85; [L143] SORT_1 var_86 = var_86_arg_0 | var_86_arg_1; [L144] var_86 = var_86 & mask_SORT_1 [L145] SORT_1 constr_87_arg_0 = var_86; [L146] CALL assume_abort_if_not(constr_87_arg_0) [L21] COND FALSE !(!cond) [L146] RET assume_abort_if_not(constr_87_arg_0) [L147] SORT_1 var_88_arg_0 = var_8; [L148] var_88_arg_0 = var_88_arg_0 & mask_SORT_1 [L149] SORT_11 var_88 = var_88_arg_0; [L150] SORT_11 var_89_arg_0 = state_76; [L151] SORT_11 var_89_arg_1 = var_88; [L152] SORT_1 var_89 = var_89_arg_0 <= var_89_arg_1; [L153] SORT_1 var_90_arg_0 = input_4; [L154] SORT_1 var_90_arg_1 = var_89; [L155] SORT_1 var_90 = var_90_arg_0 ^ var_90_arg_1; [L156] SORT_1 var_91_arg_0 = var_90; [L157] SORT_1 var_91 = ~var_91_arg_0; [L158] SORT_1 var_92_arg_0 = var_90; [L159] SORT_1 var_92 = ~var_92_arg_0; [L160] SORT_1 var_93_arg_0 = var_91; [L161] SORT_1 var_93_arg_1 = var_92; [L162] SORT_1 var_93 = var_93_arg_0 | var_93_arg_1; [L163] var_93 = var_93 & mask_SORT_1 [L164] SORT_1 constr_94_arg_0 = var_93; [L165] CALL assume_abort_if_not(constr_94_arg_0) [L21] COND FALSE !(!cond) [L165] RET assume_abort_if_not(constr_94_arg_0) [L167] SORT_72 var_74_arg_0 = var_73; [L168] var_74_arg_0 = var_74_arg_0 & mask_SORT_72 [L169] SORT_11 var_74 = var_74_arg_0; [L170] SORT_11 var_78_arg_0 = var_74; [L171] SORT_11 var_78_arg_1 = state_76; [L172] SORT_1 var_78 = var_78_arg_0 < var_78_arg_1; [L173] SORT_1 var_15_arg_0 = input_3; [L174] SORT_12 var_15_arg_1 = var_14; [L175] SORT_12 var_15_arg_2 = var_13; [L176] SORT_12 var_15 = var_15_arg_0 ? var_15_arg_1 : var_15_arg_2; [L177] var_15 = var_15 & mask_SORT_12 [L178] SORT_12 var_16_arg_0 = var_13; [L179] SORT_12 var_16_arg_1 = var_15; [L180] SORT_11 var_16 = ((SORT_11)var_16_arg_0 << 8) | var_16_arg_1; [L181] SORT_11 var_18_arg_0 = var_16; [L182] SORT_11 var_18_arg_1 = state_17; [L183] SORT_11 var_18 = var_18_arg_0 - var_18_arg_1; [L184] var_18 = var_18 & mask_SORT_11 [L185] SORT_11 var_19_arg_0 = var_18; [L186] SORT_1 var_19 = var_19_arg_0 >> 15; [L187] SORT_1 var_21_arg_0 = var_19; [L188] SORT_9 var_21_arg_1 = var_10; [L189] SORT_20 var_21 = ((SORT_20)var_21_arg_0 << 31) | var_21_arg_1; [L190] var_21 = var_21 & mask_SORT_20 [L191] SORT_11 var_64_arg_0 = var_18; [L192] SORT_1 var_64 = var_64_arg_0 >> 15; [L193] SORT_11 var_61_arg_0 = var_18; [L194] SORT_1 var_61 = var_61_arg_0 >> 15; [L195] SORT_11 var_58_arg_0 = var_18; [L196] SORT_1 var_58 = var_58_arg_0 >> 15; [L197] SORT_11 var_55_arg_0 = var_18; [L198] SORT_1 var_55 = var_55_arg_0 >> 15; [L199] SORT_11 var_52_arg_0 = var_18; [L200] SORT_1 var_52 = var_52_arg_0 >> 15; [L201] SORT_11 var_49_arg_0 = var_18; [L202] SORT_1 var_49 = var_49_arg_0 >> 15; [L203] SORT_11 var_46_arg_0 = var_18; [L204] SORT_1 var_46 = var_46_arg_0 >> 15; [L205] SORT_11 var_43_arg_0 = var_18; [L206] SORT_1 var_43 = var_43_arg_0 >> 15; [L207] SORT_11 var_40_arg_0 = var_18; [L208] SORT_1 var_40 = var_40_arg_0 >> 15; [L209] SORT_11 var_37_arg_0 = var_18; [L210] SORT_1 var_37 = var_37_arg_0 >> 15; [L211] SORT_11 var_34_arg_0 = var_18; [L212] SORT_1 var_34 = var_34_arg_0 >> 15; [L213] SORT_11 var_31_arg_0 = var_18; [L214] SORT_1 var_31 = var_31_arg_0 >> 15; [L215] SORT_11 var_28_arg_0 = var_18; [L216] SORT_1 var_28 = var_28_arg_0 >> 15; [L217] SORT_11 var_25_arg_0 = var_18; [L218] SORT_1 var_25 = var_25_arg_0 >> 15; [L219] SORT_11 var_22_arg_0 = var_18; [L220] SORT_1 var_22 = var_22_arg_0 >> 15; [L221] SORT_1 var_24_arg_0 = var_22; [L222] SORT_11 var_24_arg_1 = var_18; [L223] SORT_23 var_24 = ((SORT_23)var_24_arg_0 << 16) | var_24_arg_1; [L224] var_24 = var_24 & mask_SORT_23 [L225] SORT_1 var_27_arg_0 = var_25; [L226] SORT_23 var_27_arg_1 = var_24; [L227] SORT_26 var_27 = ((SORT_26)var_27_arg_0 << 17) | var_27_arg_1; [L228] var_27 = var_27 & mask_SORT_26 [L229] SORT_1 var_30_arg_0 = var_28; [L230] SORT_26 var_30_arg_1 = var_27; [L231] SORT_29 var_30 = ((SORT_29)var_30_arg_0 << 18) | var_30_arg_1; [L232] var_30 = var_30 & mask_SORT_29 [L233] SORT_1 var_33_arg_0 = var_31; [L234] SORT_29 var_33_arg_1 = var_30; [L235] SORT_32 var_33 = ((SORT_32)var_33_arg_0 << 19) | var_33_arg_1; [L236] var_33 = var_33 & mask_SORT_32 [L237] SORT_1 var_36_arg_0 = var_34; [L238] SORT_32 var_36_arg_1 = var_33; [L239] SORT_35 var_36 = ((SORT_35)var_36_arg_0 << 20) | var_36_arg_1; [L240] var_36 = var_36 & mask_SORT_35 [L241] SORT_1 var_39_arg_0 = var_37; [L242] SORT_35 var_39_arg_1 = var_36; [L243] SORT_38 var_39 = ((SORT_38)var_39_arg_0 << 21) | var_39_arg_1; [L244] var_39 = var_39 & mask_SORT_38 [L245] SORT_1 var_42_arg_0 = var_40; [L246] SORT_38 var_42_arg_1 = var_39; [L247] SORT_41 var_42 = ((SORT_41)var_42_arg_0 << 22) | var_42_arg_1; [L248] var_42 = var_42 & mask_SORT_41 [L249] SORT_1 var_45_arg_0 = var_43; [L250] SORT_41 var_45_arg_1 = var_42; [L251] SORT_44 var_45 = ((SORT_44)var_45_arg_0 << 23) | var_45_arg_1; [L252] var_45 = var_45 & mask_SORT_44 [L253] SORT_1 var_48_arg_0 = var_46; [L254] SORT_44 var_48_arg_1 = var_45; [L255] SORT_47 var_48 = ((SORT_47)var_48_arg_0 << 24) | var_48_arg_1; [L256] var_48 = var_48 & mask_SORT_47 [L257] SORT_1 var_51_arg_0 = var_49; [L258] SORT_47 var_51_arg_1 = var_48; [L259] SORT_50 var_51 = ((SORT_50)var_51_arg_0 << 25) | var_51_arg_1; [L260] var_51 = var_51 & mask_SORT_50 [L261] SORT_1 var_54_arg_0 = var_52; [L262] SORT_50 var_54_arg_1 = var_51; [L263] SORT_53 var_54 = ((SORT_53)var_54_arg_0 << 26) | var_54_arg_1; [L264] var_54 = var_54 & mask_SORT_53 [L265] SORT_1 var_57_arg_0 = var_55; [L266] SORT_53 var_57_arg_1 = var_54; [L267] SORT_56 var_57 = ((SORT_56)var_57_arg_0 << 27) | var_57_arg_1; [L268] var_57 = var_57 & mask_SORT_56 [L269] SORT_1 var_60_arg_0 = var_58; [L270] SORT_56 var_60_arg_1 = var_57; [L271] SORT_59 var_60 = ((SORT_59)var_60_arg_0 << 28) | var_60_arg_1; [L272] var_60 = var_60 & mask_SORT_59 [L273] SORT_1 var_63_arg_0 = var_61; [L274] SORT_59 var_63_arg_1 = var_60; [L275] SORT_62 var_63 = ((SORT_62)var_63_arg_0 << 29) | var_63_arg_1; [L276] var_63 = var_63 & mask_SORT_62 [L277] SORT_1 var_65_arg_0 = var_64; [L278] SORT_62 var_65_arg_1 = var_63; [L279] SORT_9 var_65 = ((SORT_9)var_65_arg_0 << 30) | var_65_arg_1; [L280] SORT_9 var_66_arg_0 = var_65; [L281] var_66_arg_0 = var_66_arg_0 & mask_SORT_9 [L282] SORT_20 var_66 = var_66_arg_0; [L283] SORT_20 var_67_arg_0 = var_21; [L284] SORT_20 var_67_arg_1 = var_66; [L285] SORT_1 var_67 = var_67_arg_0 <= var_67_arg_1; [L286] SORT_1 var_68_arg_0 = var_67; [L287] SORT_1 var_68_arg_1 = var_8; [L288] SORT_1 var_68_arg_2 = var_7; [L289] SORT_1 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L290] SORT_1 var_69_arg_0 = input_3; [L291] SORT_1 var_69_arg_1 = var_68; [L292] SORT_1 var_69 = var_69_arg_0 ^ var_69_arg_1; [L293] SORT_1 var_70_arg_0 = var_69; [L294] SORT_1 var_70 = ~var_70_arg_0; [L295] SORT_1 var_79_arg_0 = var_78; [L296] SORT_1 var_79_arg_1 = var_70; [L297] SORT_1 var_79_arg_2 = var_8; [L298] SORT_1 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L299] SORT_1 var_80_arg_0 = var_79; [L300] SORT_1 var_80 = ~var_80_arg_0; [L301] SORT_1 var_81_arg_0 = var_79; [L302] SORT_1 var_81 = ~var_81_arg_0; [L303] SORT_1 var_82_arg_0 = var_80; [L304] SORT_1 var_82_arg_1 = var_81; [L305] SORT_1 var_82 = var_82_arg_0 & var_82_arg_1; [L306] var_82 = var_82 & mask_SORT_1 [L307] SORT_1 bad_83_arg_0 = var_82; [L308] CALL __VERIFIER_assert(!(bad_83_arg_0)) [L20] COND FALSE !(!(cond)) [L308] RET __VERIFIER_assert(!(bad_83_arg_0)) [L310] SORT_96 var_139_arg_0 = state_100; [L311] SORT_96 var_139_arg_1 = var_138; [L312] SORT_1 var_139 = var_139_arg_0 == var_139_arg_1; [L313] SORT_72 var_132_arg_0 = var_131; [L314] var_132_arg_0 = var_132_arg_0 & mask_SORT_72 [L315] SORT_96 var_132 = var_132_arg_0; [L316] SORT_96 var_133_arg_0 = var_132; [L317] SORT_96 var_133_arg_1 = state_97; [L318] SORT_1 var_133 = var_133_arg_0 <= var_133_arg_1; [L319] SORT_72 var_135_arg_0 = var_134; [L320] var_135_arg_0 = var_135_arg_0 & mask_SORT_72 [L321] SORT_96 var_135 = var_135_arg_0; [L322] SORT_96 var_136_arg_0 = state_97; [L323] SORT_96 var_136_arg_1 = var_135; [L324] SORT_1 var_136 = var_136_arg_0 <= var_136_arg_1; [L325] SORT_1 var_137_arg_0 = var_133; [L326] SORT_1 var_137_arg_1 = var_136; [L327] SORT_1 var_137 = var_137_arg_0 & var_137_arg_1; [L328] SORT_1 var_140_arg_0 = var_139; [L329] SORT_1 var_140_arg_1 = var_137; [L330] SORT_1 var_140_arg_2 = var_8; [L331] SORT_1 var_140 = var_140_arg_0 ? var_140_arg_1 : var_140_arg_2; [L332] SORT_1 var_141_arg_0 = input_4; [L333] SORT_1 var_141_arg_1 = var_8; [L334] SORT_1 var_141_arg_2 = var_140; [L335] SORT_1 var_141 = var_141_arg_0 ? var_141_arg_1 : var_141_arg_2; [L336] SORT_1 next_142_arg_1 = var_141; [L337] SORT_12 var_113_arg_0 = var_112; [L338] var_113_arg_0 = (var_113_arg_0 & msb_SORT_12) ? (var_113_arg_0 | ~mask_SORT_12) : (var_113_arg_0 & mask_SORT_12) [L339] SORT_41 var_113 = (int)((signed char)var_113_arg_0); [L340] SORT_11 var_114_arg_0 = state_17; [L341] var_114_arg_0 = (var_114_arg_0 & msb_SORT_11) ? (var_114_arg_0 | ~mask_SORT_11) : (var_114_arg_0 & mask_SORT_11) [L342] SORT_41 var_114 = (int)((short)var_114_arg_0); [L343] SORT_41 var_115_arg_0 = var_113; [L344] SORT_41 var_115_arg_1 = var_114; [L345] SORT_41 var_115 = var_115_arg_0 * var_115_arg_1; [L346] SORT_105 var_107_arg_0 = var_106; [L347] var_107_arg_0 = (var_107_arg_0 & msb_SORT_105) ? (var_107_arg_0 | ~mask_SORT_105) : (var_107_arg_0 & mask_SORT_105) [L348] SORT_26 var_107 = (int)((signed char)var_107_arg_0); [L349] SORT_11 var_108_arg_0 = var_16; [L350] var_108_arg_0 = (var_108_arg_0 & msb_SORT_11) ? (var_108_arg_0 | ~mask_SORT_11) : (var_108_arg_0 & mask_SORT_11) [L351] SORT_26 var_108 = (int)((short)var_108_arg_0); [L352] SORT_26 var_109_arg_0 = var_107; [L353] SORT_26 var_109_arg_1 = var_108; [L354] SORT_26 var_109 = var_109_arg_0 * var_109_arg_1; [L355] var_109 = var_109 & mask_SORT_26 [L356] SORT_26 var_151_arg_0 = var_109; [L357] SORT_1 var_151 = var_151_arg_0 >> 17; [L358] SORT_26 var_149_arg_0 = var_109; [L359] SORT_1 var_149 = var_149_arg_0 >> 17; [L360] SORT_26 var_147_arg_0 = var_109; [L361] SORT_1 var_147 = var_147_arg_0 >> 17; [L362] SORT_26 var_145_arg_0 = var_109; [L363] SORT_1 var_145 = var_145_arg_0 >> 17; [L364] SORT_26 var_143_arg_0 = var_109; [L365] SORT_1 var_143 = var_143_arg_0 >> 17; [L366] SORT_1 var_144_arg_0 = var_143; [L367] SORT_26 var_144_arg_1 = var_109; [L368] SORT_29 var_144 = ((SORT_29)var_144_arg_0 << 18) | var_144_arg_1; [L369] var_144 = var_144 & mask_SORT_29 [L370] SORT_1 var_146_arg_0 = var_145; [L371] SORT_29 var_146_arg_1 = var_144; [L372] SORT_32 var_146 = ((SORT_32)var_146_arg_0 << 19) | var_146_arg_1; [L373] var_146 = var_146 & mask_SORT_32 [L374] SORT_1 var_148_arg_0 = var_147; [L375] SORT_32 var_148_arg_1 = var_146; [L376] SORT_35 var_148 = ((SORT_35)var_148_arg_0 << 20) | var_148_arg_1; [L377] var_148 = var_148 & mask_SORT_35 [L378] SORT_1 var_150_arg_0 = var_149; [L379] SORT_35 var_150_arg_1 = var_148; [L380] SORT_38 var_150 = ((SORT_38)var_150_arg_0 << 21) | var_150_arg_1; [L381] var_150 = var_150 & mask_SORT_38 [L382] SORT_1 var_152_arg_0 = var_151; [L383] SORT_38 var_152_arg_1 = var_150; [L384] SORT_41 var_152 = ((SORT_41)var_152_arg_0 << 22) | var_152_arg_1; [L385] SORT_41 var_153_arg_0 = var_115; [L386] SORT_41 var_153_arg_1 = var_152; [L387] SORT_41 var_153 = var_153_arg_0 + var_153_arg_1; [L388] SORT_154 var_156_arg_0 = var_155; [L389] var_156_arg_0 = var_156_arg_0 & mask_SORT_154 [L390] SORT_41 var_156 = var_156_arg_0; [L391] SORT_41 var_157_arg_0 = var_153; [L392] SORT_41 var_157_arg_1 = var_156; [L393] SORT_41 var_157 = var_157_arg_0 + var_157_arg_1; [L394] SORT_41 var_158_arg_0 = var_157; [L395] SORT_11 var_158 = var_158_arg_0 >> 7; [L396] SORT_1 var_159_arg_0 = input_4; [L397] SORT_11 var_159_arg_1 = var_119; [L398] SORT_11 var_159_arg_2 = var_158; [L399] SORT_11 var_159 = var_159_arg_0 ? var_159_arg_1 : var_159_arg_2; [L400] SORT_11 next_160_arg_1 = var_159; [L401] SORT_1 var_161_arg_0 = var_8; [L402] var_161_arg_0 = var_161_arg_0 & mask_SORT_1 [L403] SORT_11 var_161 = var_161_arg_0; [L404] SORT_11 var_162_arg_0 = state_76; [L405] SORT_11 var_162_arg_1 = var_161; [L406] SORT_11 var_162 = var_162_arg_0 + var_162_arg_1; [L407] var_162 = var_162 & mask_SORT_11 [L408] SORT_11 next_163_arg_1 = var_162; [L409] SORT_72 var_167_arg_0 = var_166; [L410] SORT_1 var_167_arg_1 = input_3; [L411] SORT_96 var_167 = ((SORT_96)var_167_arg_0 << 1) | var_167_arg_1; [L412] SORT_1 var_164_arg_0 = input_3; [L413] var_164_arg_0 = var_164_arg_0 & mask_SORT_1 [L414] SORT_96 var_164 = var_164_arg_0; [L415] SORT_96 var_165_arg_0 = state_97; [L416] SORT_96 var_165_arg_1 = var_164; [L417] SORT_96 var_165 = var_165_arg_0 + var_165_arg_1; [L418] SORT_1 var_168_arg_0 = var_139; [L419] SORT_96 var_168_arg_1 = var_167; [L420] SORT_96 var_168_arg_2 = var_165; [L421] SORT_96 var_168 = var_168_arg_0 ? var_168_arg_1 : var_168_arg_2; [L422] SORT_1 var_170_arg_0 = input_4; [L423] SORT_96 var_170_arg_1 = var_169; [L424] SORT_96 var_170_arg_2 = var_168; [L425] SORT_96 var_170 = var_170_arg_0 ? var_170_arg_1 : var_170_arg_2; [L426] var_170 = var_170 & mask_SORT_96 [L427] SORT_96 next_171_arg_1 = var_170; [L428] SORT_1 var_172_arg_0 = var_8; [L429] var_172_arg_0 = var_172_arg_0 & mask_SORT_1 [L430] SORT_96 var_172 = var_172_arg_0; [L431] SORT_96 var_173_arg_0 = state_100; [L432] SORT_96 var_173_arg_1 = var_172; [L433] SORT_96 var_173 = var_173_arg_0 + var_173_arg_1; [L434] SORT_1 var_174_arg_0 = var_139; [L435] SORT_96 var_174_arg_1 = var_169; [L436] SORT_96 var_174_arg_2 = var_173; [L437] SORT_96 var_174 = var_174_arg_0 ? var_174_arg_1 : var_174_arg_2; [L438] SORT_1 var_175_arg_0 = input_4; [L439] SORT_96 var_175_arg_1 = var_169; [L440] SORT_96 var_175_arg_2 = var_174; [L441] SORT_96 var_175 = var_175_arg_0 ? var_175_arg_1 : var_175_arg_2; [L442] var_175 = var_175 & mask_SORT_96 [L443] SORT_96 next_176_arg_1 = var_175; [L445] state_5 = next_142_arg_1 [L446] state_17 = next_160_arg_1 [L447] state_76 = next_163_arg_1 [L448] state_97 = next_171_arg_1 [L449] state_100 = next_176_arg_1 [L131] input_2 = __VERIFIER_nondet_uchar() [L132] input_3 = __VERIFIER_nondet_uchar() [L133] input_3 = input_3 & mask_SORT_1 [L134] input_4 = __VERIFIER_nondet_uchar() [L135] input_4 = input_4 & mask_SORT_1 [L137] SORT_1 var_84_arg_0 = state_5; [L138] SORT_1 var_84 = ~var_84_arg_0; [L139] SORT_1 var_85_arg_0 = var_84; [L140] SORT_1 var_85 = ~var_85_arg_0; [L141] SORT_1 var_86_arg_0 = state_5; [L142] SORT_1 var_86_arg_1 = var_85; [L143] SORT_1 var_86 = var_86_arg_0 | var_86_arg_1; [L144] var_86 = var_86 & mask_SORT_1 [L145] SORT_1 constr_87_arg_0 = var_86; [L146] CALL assume_abort_if_not(constr_87_arg_0) [L21] COND FALSE !(!cond) [L146] RET assume_abort_if_not(constr_87_arg_0) [L147] SORT_1 var_88_arg_0 = var_8; [L148] var_88_arg_0 = var_88_arg_0 & mask_SORT_1 [L149] SORT_11 var_88 = var_88_arg_0; [L150] SORT_11 var_89_arg_0 = state_76; [L151] SORT_11 var_89_arg_1 = var_88; [L152] SORT_1 var_89 = var_89_arg_0 <= var_89_arg_1; [L153] SORT_1 var_90_arg_0 = input_4; [L154] SORT_1 var_90_arg_1 = var_89; [L155] SORT_1 var_90 = var_90_arg_0 ^ var_90_arg_1; [L156] SORT_1 var_91_arg_0 = var_90; [L157] SORT_1 var_91 = ~var_91_arg_0; [L158] SORT_1 var_92_arg_0 = var_90; [L159] SORT_1 var_92 = ~var_92_arg_0; [L160] SORT_1 var_93_arg_0 = var_91; [L161] SORT_1 var_93_arg_1 = var_92; [L162] SORT_1 var_93 = var_93_arg_0 | var_93_arg_1; [L163] var_93 = var_93 & mask_SORT_1 [L164] SORT_1 constr_94_arg_0 = var_93; [L165] CALL assume_abort_if_not(constr_94_arg_0) [L21] COND FALSE !(!cond) [L165] RET assume_abort_if_not(constr_94_arg_0) [L167] SORT_72 var_74_arg_0 = var_73; [L168] var_74_arg_0 = var_74_arg_0 & mask_SORT_72 [L169] SORT_11 var_74 = var_74_arg_0; [L170] SORT_11 var_78_arg_0 = var_74; [L171] SORT_11 var_78_arg_1 = state_76; [L172] SORT_1 var_78 = var_78_arg_0 < var_78_arg_1; [L173] SORT_1 var_15_arg_0 = input_3; [L174] SORT_12 var_15_arg_1 = var_14; [L175] SORT_12 var_15_arg_2 = var_13; [L176] SORT_12 var_15 = var_15_arg_0 ? var_15_arg_1 : var_15_arg_2; [L177] var_15 = var_15 & mask_SORT_12 [L178] SORT_12 var_16_arg_0 = var_13; [L179] SORT_12 var_16_arg_1 = var_15; [L180] SORT_11 var_16 = ((SORT_11)var_16_arg_0 << 8) | var_16_arg_1; [L181] SORT_11 var_18_arg_0 = var_16; [L182] SORT_11 var_18_arg_1 = state_17; [L183] SORT_11 var_18 = var_18_arg_0 - var_18_arg_1; [L184] var_18 = var_18 & mask_SORT_11 [L185] SORT_11 var_19_arg_0 = var_18; [L186] SORT_1 var_19 = var_19_arg_0 >> 15; [L187] SORT_1 var_21_arg_0 = var_19; [L188] SORT_9 var_21_arg_1 = var_10; [L189] SORT_20 var_21 = ((SORT_20)var_21_arg_0 << 31) | var_21_arg_1; [L190] var_21 = var_21 & mask_SORT_20 [L191] SORT_11 var_64_arg_0 = var_18; [L192] SORT_1 var_64 = var_64_arg_0 >> 15; [L193] SORT_11 var_61_arg_0 = var_18; [L194] SORT_1 var_61 = var_61_arg_0 >> 15; [L195] SORT_11 var_58_arg_0 = var_18; [L196] SORT_1 var_58 = var_58_arg_0 >> 15; [L197] SORT_11 var_55_arg_0 = var_18; [L198] SORT_1 var_55 = var_55_arg_0 >> 15; [L199] SORT_11 var_52_arg_0 = var_18; [L200] SORT_1 var_52 = var_52_arg_0 >> 15; [L201] SORT_11 var_49_arg_0 = var_18; [L202] SORT_1 var_49 = var_49_arg_0 >> 15; [L203] SORT_11 var_46_arg_0 = var_18; [L204] SORT_1 var_46 = var_46_arg_0 >> 15; [L205] SORT_11 var_43_arg_0 = var_18; [L206] SORT_1 var_43 = var_43_arg_0 >> 15; [L207] SORT_11 var_40_arg_0 = var_18; [L208] SORT_1 var_40 = var_40_arg_0 >> 15; [L209] SORT_11 var_37_arg_0 = var_18; [L210] SORT_1 var_37 = var_37_arg_0 >> 15; [L211] SORT_11 var_34_arg_0 = var_18; [L212] SORT_1 var_34 = var_34_arg_0 >> 15; [L213] SORT_11 var_31_arg_0 = var_18; [L214] SORT_1 var_31 = var_31_arg_0 >> 15; [L215] SORT_11 var_28_arg_0 = var_18; [L216] SORT_1 var_28 = var_28_arg_0 >> 15; [L217] SORT_11 var_25_arg_0 = var_18; [L218] SORT_1 var_25 = var_25_arg_0 >> 15; [L219] SORT_11 var_22_arg_0 = var_18; [L220] SORT_1 var_22 = var_22_arg_0 >> 15; [L221] SORT_1 var_24_arg_0 = var_22; [L222] SORT_11 var_24_arg_1 = var_18; [L223] SORT_23 var_24 = ((SORT_23)var_24_arg_0 << 16) | var_24_arg_1; [L224] var_24 = var_24 & mask_SORT_23 [L225] SORT_1 var_27_arg_0 = var_25; [L226] SORT_23 var_27_arg_1 = var_24; [L227] SORT_26 var_27 = ((SORT_26)var_27_arg_0 << 17) | var_27_arg_1; [L228] var_27 = var_27 & mask_SORT_26 [L229] SORT_1 var_30_arg_0 = var_28; [L230] SORT_26 var_30_arg_1 = var_27; [L231] SORT_29 var_30 = ((SORT_29)var_30_arg_0 << 18) | var_30_arg_1; [L232] var_30 = var_30 & mask_SORT_29 [L233] SORT_1 var_33_arg_0 = var_31; [L234] SORT_29 var_33_arg_1 = var_30; [L235] SORT_32 var_33 = ((SORT_32)var_33_arg_0 << 19) | var_33_arg_1; [L236] var_33 = var_33 & mask_SORT_32 [L237] SORT_1 var_36_arg_0 = var_34; [L238] SORT_32 var_36_arg_1 = var_33; [L239] SORT_35 var_36 = ((SORT_35)var_36_arg_0 << 20) | var_36_arg_1; [L240] var_36 = var_36 & mask_SORT_35 [L241] SORT_1 var_39_arg_0 = var_37; [L242] SORT_35 var_39_arg_1 = var_36; [L243] SORT_38 var_39 = ((SORT_38)var_39_arg_0 << 21) | var_39_arg_1; [L244] var_39 = var_39 & mask_SORT_38 [L245] SORT_1 var_42_arg_0 = var_40; [L246] SORT_38 var_42_arg_1 = var_39; [L247] SORT_41 var_42 = ((SORT_41)var_42_arg_0 << 22) | var_42_arg_1; [L248] var_42 = var_42 & mask_SORT_41 [L249] SORT_1 var_45_arg_0 = var_43; [L250] SORT_41 var_45_arg_1 = var_42; [L251] SORT_44 var_45 = ((SORT_44)var_45_arg_0 << 23) | var_45_arg_1; [L252] var_45 = var_45 & mask_SORT_44 [L253] SORT_1 var_48_arg_0 = var_46; [L254] SORT_44 var_48_arg_1 = var_45; [L255] SORT_47 var_48 = ((SORT_47)var_48_arg_0 << 24) | var_48_arg_1; [L256] var_48 = var_48 & mask_SORT_47 [L257] SORT_1 var_51_arg_0 = var_49; [L258] SORT_47 var_51_arg_1 = var_48; [L259] SORT_50 var_51 = ((SORT_50)var_51_arg_0 << 25) | var_51_arg_1; [L260] var_51 = var_51 & mask_SORT_50 [L261] SORT_1 var_54_arg_0 = var_52; [L262] SORT_50 var_54_arg_1 = var_51; [L263] SORT_53 var_54 = ((SORT_53)var_54_arg_0 << 26) | var_54_arg_1; [L264] var_54 = var_54 & mask_SORT_53 [L265] SORT_1 var_57_arg_0 = var_55; [L266] SORT_53 var_57_arg_1 = var_54; [L267] SORT_56 var_57 = ((SORT_56)var_57_arg_0 << 27) | var_57_arg_1; [L268] var_57 = var_57 & mask_SORT_56 [L269] SORT_1 var_60_arg_0 = var_58; [L270] SORT_56 var_60_arg_1 = var_57; [L271] SORT_59 var_60 = ((SORT_59)var_60_arg_0 << 28) | var_60_arg_1; [L272] var_60 = var_60 & mask_SORT_59 [L273] SORT_1 var_63_arg_0 = var_61; [L274] SORT_59 var_63_arg_1 = var_60; [L275] SORT_62 var_63 = ((SORT_62)var_63_arg_0 << 29) | var_63_arg_1; [L276] var_63 = var_63 & mask_SORT_62 [L277] SORT_1 var_65_arg_0 = var_64; [L278] SORT_62 var_65_arg_1 = var_63; [L279] SORT_9 var_65 = ((SORT_9)var_65_arg_0 << 30) | var_65_arg_1; [L280] SORT_9 var_66_arg_0 = var_65; [L281] var_66_arg_0 = var_66_arg_0 & mask_SORT_9 [L282] SORT_20 var_66 = var_66_arg_0; [L283] SORT_20 var_67_arg_0 = var_21; [L284] SORT_20 var_67_arg_1 = var_66; [L285] SORT_1 var_67 = var_67_arg_0 <= var_67_arg_1; [L286] SORT_1 var_68_arg_0 = var_67; [L287] SORT_1 var_68_arg_1 = var_8; [L288] SORT_1 var_68_arg_2 = var_7; [L289] SORT_1 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L290] SORT_1 var_69_arg_0 = input_3; [L291] SORT_1 var_69_arg_1 = var_68; [L292] SORT_1 var_69 = var_69_arg_0 ^ var_69_arg_1; [L293] SORT_1 var_70_arg_0 = var_69; [L294] SORT_1 var_70 = ~var_70_arg_0; [L295] SORT_1 var_79_arg_0 = var_78; [L296] SORT_1 var_79_arg_1 = var_70; [L297] SORT_1 var_79_arg_2 = var_8; [L298] SORT_1 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L299] SORT_1 var_80_arg_0 = var_79; [L300] SORT_1 var_80 = ~var_80_arg_0; [L301] SORT_1 var_81_arg_0 = var_79; [L302] SORT_1 var_81 = ~var_81_arg_0; [L303] SORT_1 var_82_arg_0 = var_80; [L304] SORT_1 var_82_arg_1 = var_81; [L305] SORT_1 var_82 = var_82_arg_0 & var_82_arg_1; [L306] var_82 = var_82 & mask_SORT_1 [L307] SORT_1 bad_83_arg_0 = var_82; [L308] CALL __VERIFIER_assert(!(bad_83_arg_0)) [L20] COND FALSE !(!(cond)) [L308] RET __VERIFIER_assert(!(bad_83_arg_0)) [L310] SORT_96 var_139_arg_0 = state_100; [L311] SORT_96 var_139_arg_1 = var_138; [L312] SORT_1 var_139 = var_139_arg_0 == var_139_arg_1; [L313] SORT_72 var_132_arg_0 = var_131; [L314] var_132_arg_0 = var_132_arg_0 & mask_SORT_72 [L315] SORT_96 var_132 = var_132_arg_0; [L316] SORT_96 var_133_arg_0 = var_132; [L317] SORT_96 var_133_arg_1 = state_97; [L318] SORT_1 var_133 = var_133_arg_0 <= var_133_arg_1; [L319] SORT_72 var_135_arg_0 = var_134; [L320] var_135_arg_0 = var_135_arg_0 & mask_SORT_72 [L321] SORT_96 var_135 = var_135_arg_0; [L322] SORT_96 var_136_arg_0 = state_97; [L323] SORT_96 var_136_arg_1 = var_135; [L324] SORT_1 var_136 = var_136_arg_0 <= var_136_arg_1; [L325] SORT_1 var_137_arg_0 = var_133; [L326] SORT_1 var_137_arg_1 = var_136; [L327] SORT_1 var_137 = var_137_arg_0 & var_137_arg_1; [L328] SORT_1 var_140_arg_0 = var_139; [L329] SORT_1 var_140_arg_1 = var_137; [L330] SORT_1 var_140_arg_2 = var_8; [L331] SORT_1 var_140 = var_140_arg_0 ? var_140_arg_1 : var_140_arg_2; [L332] SORT_1 var_141_arg_0 = input_4; [L333] SORT_1 var_141_arg_1 = var_8; [L334] SORT_1 var_141_arg_2 = var_140; [L335] SORT_1 var_141 = var_141_arg_0 ? var_141_arg_1 : var_141_arg_2; [L336] SORT_1 next_142_arg_1 = var_141; [L337] SORT_12 var_113_arg_0 = var_112; [L338] var_113_arg_0 = (var_113_arg_0 & msb_SORT_12) ? (var_113_arg_0 | ~mask_SORT_12) : (var_113_arg_0 & mask_SORT_12) [L339] SORT_41 var_113 = (int)((signed char)var_113_arg_0); [L340] SORT_11 var_114_arg_0 = state_17; [L341] var_114_arg_0 = (var_114_arg_0 & msb_SORT_11) ? (var_114_arg_0 | ~mask_SORT_11) : (var_114_arg_0 & mask_SORT_11) [L342] SORT_41 var_114 = (int)((short)var_114_arg_0); [L343] SORT_41 var_115_arg_0 = var_113; [L344] SORT_41 var_115_arg_1 = var_114; [L345] SORT_41 var_115 = var_115_arg_0 * var_115_arg_1; [L346] SORT_105 var_107_arg_0 = var_106; [L347] var_107_arg_0 = (var_107_arg_0 & msb_SORT_105) ? (var_107_arg_0 | ~mask_SORT_105) : (var_107_arg_0 & mask_SORT_105) [L348] SORT_26 var_107 = (int)((signed char)var_107_arg_0); [L349] SORT_11 var_108_arg_0 = var_16; [L350] var_108_arg_0 = (var_108_arg_0 & msb_SORT_11) ? (var_108_arg_0 | ~mask_SORT_11) : (var_108_arg_0 & mask_SORT_11) [L351] SORT_26 var_108 = (int)((short)var_108_arg_0); [L352] SORT_26 var_109_arg_0 = var_107; [L353] SORT_26 var_109_arg_1 = var_108; [L354] SORT_26 var_109 = var_109_arg_0 * var_109_arg_1; [L355] var_109 = var_109 & mask_SORT_26 [L356] SORT_26 var_151_arg_0 = var_109; [L357] SORT_1 var_151 = var_151_arg_0 >> 17; [L358] SORT_26 var_149_arg_0 = var_109; [L359] SORT_1 var_149 = var_149_arg_0 >> 17; [L360] SORT_26 var_147_arg_0 = var_109; [L361] SORT_1 var_147 = var_147_arg_0 >> 17; [L362] SORT_26 var_145_arg_0 = var_109; [L363] SORT_1 var_145 = var_145_arg_0 >> 17; [L364] SORT_26 var_143_arg_0 = var_109; [L365] SORT_1 var_143 = var_143_arg_0 >> 17; [L366] SORT_1 var_144_arg_0 = var_143; [L367] SORT_26 var_144_arg_1 = var_109; [L368] SORT_29 var_144 = ((SORT_29)var_144_arg_0 << 18) | var_144_arg_1; [L369] var_144 = var_144 & mask_SORT_29 [L370] SORT_1 var_146_arg_0 = var_145; [L371] SORT_29 var_146_arg_1 = var_144; [L372] SORT_32 var_146 = ((SORT_32)var_146_arg_0 << 19) | var_146_arg_1; [L373] var_146 = var_146 & mask_SORT_32 [L374] SORT_1 var_148_arg_0 = var_147; [L375] SORT_32 var_148_arg_1 = var_146; [L376] SORT_35 var_148 = ((SORT_35)var_148_arg_0 << 20) | var_148_arg_1; [L377] var_148 = var_148 & mask_SORT_35 [L378] SORT_1 var_150_arg_0 = var_149; [L379] SORT_35 var_150_arg_1 = var_148; [L380] SORT_38 var_150 = ((SORT_38)var_150_arg_0 << 21) | var_150_arg_1; [L381] var_150 = var_150 & mask_SORT_38 [L382] SORT_1 var_152_arg_0 = var_151; [L383] SORT_38 var_152_arg_1 = var_150; [L384] SORT_41 var_152 = ((SORT_41)var_152_arg_0 << 22) | var_152_arg_1; [L385] SORT_41 var_153_arg_0 = var_115; [L386] SORT_41 var_153_arg_1 = var_152; [L387] SORT_41 var_153 = var_153_arg_0 + var_153_arg_1; [L388] SORT_154 var_156_arg_0 = var_155; [L389] var_156_arg_0 = var_156_arg_0 & mask_SORT_154 [L390] SORT_41 var_156 = var_156_arg_0; [L391] SORT_41 var_157_arg_0 = var_153; [L392] SORT_41 var_157_arg_1 = var_156; [L393] SORT_41 var_157 = var_157_arg_0 + var_157_arg_1; [L394] SORT_41 var_158_arg_0 = var_157; [L395] SORT_11 var_158 = var_158_arg_0 >> 7; [L396] SORT_1 var_159_arg_0 = input_4; [L397] SORT_11 var_159_arg_1 = var_119; [L398] SORT_11 var_159_arg_2 = var_158; [L399] SORT_11 var_159 = var_159_arg_0 ? var_159_arg_1 : var_159_arg_2; [L400] SORT_11 next_160_arg_1 = var_159; [L401] SORT_1 var_161_arg_0 = var_8; [L402] var_161_arg_0 = var_161_arg_0 & mask_SORT_1 [L403] SORT_11 var_161 = var_161_arg_0; [L404] SORT_11 var_162_arg_0 = state_76; [L405] SORT_11 var_162_arg_1 = var_161; [L406] SORT_11 var_162 = var_162_arg_0 + var_162_arg_1; [L407] var_162 = var_162 & mask_SORT_11 [L408] SORT_11 next_163_arg_1 = var_162; [L409] SORT_72 var_167_arg_0 = var_166; [L410] SORT_1 var_167_arg_1 = input_3; [L411] SORT_96 var_167 = ((SORT_96)var_167_arg_0 << 1) | var_167_arg_1; [L412] SORT_1 var_164_arg_0 = input_3; [L413] var_164_arg_0 = var_164_arg_0 & mask_SORT_1 [L414] SORT_96 var_164 = var_164_arg_0; [L415] SORT_96 var_165_arg_0 = state_97; [L416] SORT_96 var_165_arg_1 = var_164; [L417] SORT_96 var_165 = var_165_arg_0 + var_165_arg_1; [L418] SORT_1 var_168_arg_0 = var_139; [L419] SORT_96 var_168_arg_1 = var_167; [L420] SORT_96 var_168_arg_2 = var_165; [L421] SORT_96 var_168 = var_168_arg_0 ? var_168_arg_1 : var_168_arg_2; [L422] SORT_1 var_170_arg_0 = input_4; [L423] SORT_96 var_170_arg_1 = var_169; [L424] SORT_96 var_170_arg_2 = var_168; [L425] SORT_96 var_170 = var_170_arg_0 ? var_170_arg_1 : var_170_arg_2; [L426] var_170 = var_170 & mask_SORT_96 [L427] SORT_96 next_171_arg_1 = var_170; [L428] SORT_1 var_172_arg_0 = var_8; [L429] var_172_arg_0 = var_172_arg_0 & mask_SORT_1 [L430] SORT_96 var_172 = var_172_arg_0; [L431] SORT_96 var_173_arg_0 = state_100; [L432] SORT_96 var_173_arg_1 = var_172; [L433] SORT_96 var_173 = var_173_arg_0 + var_173_arg_1; [L434] SORT_1 var_174_arg_0 = var_139; [L435] SORT_96 var_174_arg_1 = var_169; [L436] SORT_96 var_174_arg_2 = var_173; [L437] SORT_96 var_174 = var_174_arg_0 ? var_174_arg_1 : var_174_arg_2; [L438] SORT_1 var_175_arg_0 = input_4; [L439] SORT_96 var_175_arg_1 = var_169; [L440] SORT_96 var_175_arg_2 = var_174; [L441] SORT_96 var_175 = var_175_arg_0 ? var_175_arg_1 : var_175_arg_2; [L442] var_175 = var_175 & mask_SORT_96 [L443] SORT_96 next_176_arg_1 = var_175; [L445] state_5 = next_142_arg_1 [L446] state_17 = next_160_arg_1 [L447] state_76 = next_163_arg_1 [L448] state_97 = next_171_arg_1 [L449] state_100 = next_176_arg_1 [L131] input_2 = __VERIFIER_nondet_uchar() [L132] input_3 = __VERIFIER_nondet_uchar() [L133] input_3 = input_3 & mask_SORT_1 [L134] input_4 = __VERIFIER_nondet_uchar() [L135] input_4 = input_4 & mask_SORT_1 [L137] SORT_1 var_84_arg_0 = state_5; [L138] SORT_1 var_84 = ~var_84_arg_0; [L139] SORT_1 var_85_arg_0 = var_84; [L140] SORT_1 var_85 = ~var_85_arg_0; [L141] SORT_1 var_86_arg_0 = state_5; [L142] SORT_1 var_86_arg_1 = var_85; [L143] SORT_1 var_86 = var_86_arg_0 | var_86_arg_1; [L144] var_86 = var_86 & mask_SORT_1 [L145] SORT_1 constr_87_arg_0 = var_86; [L146] CALL assume_abort_if_not(constr_87_arg_0) [L21] COND FALSE !(!cond) [L146] RET assume_abort_if_not(constr_87_arg_0) [L147] SORT_1 var_88_arg_0 = var_8; [L148] var_88_arg_0 = var_88_arg_0 & mask_SORT_1 [L149] SORT_11 var_88 = var_88_arg_0; [L150] SORT_11 var_89_arg_0 = state_76; [L151] SORT_11 var_89_arg_1 = var_88; [L152] SORT_1 var_89 = var_89_arg_0 <= var_89_arg_1; [L153] SORT_1 var_90_arg_0 = input_4; [L154] SORT_1 var_90_arg_1 = var_89; [L155] SORT_1 var_90 = var_90_arg_0 ^ var_90_arg_1; [L156] SORT_1 var_91_arg_0 = var_90; [L157] SORT_1 var_91 = ~var_91_arg_0; [L158] SORT_1 var_92_arg_0 = var_90; [L159] SORT_1 var_92 = ~var_92_arg_0; [L160] SORT_1 var_93_arg_0 = var_91; [L161] SORT_1 var_93_arg_1 = var_92; [L162] SORT_1 var_93 = var_93_arg_0 | var_93_arg_1; [L163] var_93 = var_93 & mask_SORT_1 [L164] SORT_1 constr_94_arg_0 = var_93; [L165] CALL assume_abort_if_not(constr_94_arg_0) [L21] COND FALSE !(!cond) [L165] RET assume_abort_if_not(constr_94_arg_0) [L167] SORT_72 var_74_arg_0 = var_73; [L168] var_74_arg_0 = var_74_arg_0 & mask_SORT_72 [L169] SORT_11 var_74 = var_74_arg_0; [L170] SORT_11 var_78_arg_0 = var_74; [L171] SORT_11 var_78_arg_1 = state_76; [L172] SORT_1 var_78 = var_78_arg_0 < var_78_arg_1; [L173] SORT_1 var_15_arg_0 = input_3; [L174] SORT_12 var_15_arg_1 = var_14; [L175] SORT_12 var_15_arg_2 = var_13; [L176] SORT_12 var_15 = var_15_arg_0 ? var_15_arg_1 : var_15_arg_2; [L177] var_15 = var_15 & mask_SORT_12 [L178] SORT_12 var_16_arg_0 = var_13; [L179] SORT_12 var_16_arg_1 = var_15; [L180] SORT_11 var_16 = ((SORT_11)var_16_arg_0 << 8) | var_16_arg_1; [L181] SORT_11 var_18_arg_0 = var_16; [L182] SORT_11 var_18_arg_1 = state_17; [L183] SORT_11 var_18 = var_18_arg_0 - var_18_arg_1; [L184] var_18 = var_18 & mask_SORT_11 [L185] SORT_11 var_19_arg_0 = var_18; [L186] SORT_1 var_19 = var_19_arg_0 >> 15; [L187] SORT_1 var_21_arg_0 = var_19; [L188] SORT_9 var_21_arg_1 = var_10; [L189] SORT_20 var_21 = ((SORT_20)var_21_arg_0 << 31) | var_21_arg_1; [L190] var_21 = var_21 & mask_SORT_20 [L191] SORT_11 var_64_arg_0 = var_18; [L192] SORT_1 var_64 = var_64_arg_0 >> 15; [L193] SORT_11 var_61_arg_0 = var_18; [L194] SORT_1 var_61 = var_61_arg_0 >> 15; [L195] SORT_11 var_58_arg_0 = var_18; [L196] SORT_1 var_58 = var_58_arg_0 >> 15; [L197] SORT_11 var_55_arg_0 = var_18; [L198] SORT_1 var_55 = var_55_arg_0 >> 15; [L199] SORT_11 var_52_arg_0 = var_18; [L200] SORT_1 var_52 = var_52_arg_0 >> 15; [L201] SORT_11 var_49_arg_0 = var_18; [L202] SORT_1 var_49 = var_49_arg_0 >> 15; [L203] SORT_11 var_46_arg_0 = var_18; [L204] SORT_1 var_46 = var_46_arg_0 >> 15; [L205] SORT_11 var_43_arg_0 = var_18; [L206] SORT_1 var_43 = var_43_arg_0 >> 15; [L207] SORT_11 var_40_arg_0 = var_18; [L208] SORT_1 var_40 = var_40_arg_0 >> 15; [L209] SORT_11 var_37_arg_0 = var_18; [L210] SORT_1 var_37 = var_37_arg_0 >> 15; [L211] SORT_11 var_34_arg_0 = var_18; [L212] SORT_1 var_34 = var_34_arg_0 >> 15; [L213] SORT_11 var_31_arg_0 = var_18; [L214] SORT_1 var_31 = var_31_arg_0 >> 15; [L215] SORT_11 var_28_arg_0 = var_18; [L216] SORT_1 var_28 = var_28_arg_0 >> 15; [L217] SORT_11 var_25_arg_0 = var_18; [L218] SORT_1 var_25 = var_25_arg_0 >> 15; [L219] SORT_11 var_22_arg_0 = var_18; [L220] SORT_1 var_22 = var_22_arg_0 >> 15; [L221] SORT_1 var_24_arg_0 = var_22; [L222] SORT_11 var_24_arg_1 = var_18; [L223] SORT_23 var_24 = ((SORT_23)var_24_arg_0 << 16) | var_24_arg_1; [L224] var_24 = var_24 & mask_SORT_23 [L225] SORT_1 var_27_arg_0 = var_25; [L226] SORT_23 var_27_arg_1 = var_24; [L227] SORT_26 var_27 = ((SORT_26)var_27_arg_0 << 17) | var_27_arg_1; [L228] var_27 = var_27 & mask_SORT_26 [L229] SORT_1 var_30_arg_0 = var_28; [L230] SORT_26 var_30_arg_1 = var_27; [L231] SORT_29 var_30 = ((SORT_29)var_30_arg_0 << 18) | var_30_arg_1; [L232] var_30 = var_30 & mask_SORT_29 [L233] SORT_1 var_33_arg_0 = var_31; [L234] SORT_29 var_33_arg_1 = var_30; [L235] SORT_32 var_33 = ((SORT_32)var_33_arg_0 << 19) | var_33_arg_1; [L236] var_33 = var_33 & mask_SORT_32 [L237] SORT_1 var_36_arg_0 = var_34; [L238] SORT_32 var_36_arg_1 = var_33; [L239] SORT_35 var_36 = ((SORT_35)var_36_arg_0 << 20) | var_36_arg_1; [L240] var_36 = var_36 & mask_SORT_35 [L241] SORT_1 var_39_arg_0 = var_37; [L242] SORT_35 var_39_arg_1 = var_36; [L243] SORT_38 var_39 = ((SORT_38)var_39_arg_0 << 21) | var_39_arg_1; [L244] var_39 = var_39 & mask_SORT_38 [L245] SORT_1 var_42_arg_0 = var_40; [L246] SORT_38 var_42_arg_1 = var_39; [L247] SORT_41 var_42 = ((SORT_41)var_42_arg_0 << 22) | var_42_arg_1; [L248] var_42 = var_42 & mask_SORT_41 [L249] SORT_1 var_45_arg_0 = var_43; [L250] SORT_41 var_45_arg_1 = var_42; [L251] SORT_44 var_45 = ((SORT_44)var_45_arg_0 << 23) | var_45_arg_1; [L252] var_45 = var_45 & mask_SORT_44 [L253] SORT_1 var_48_arg_0 = var_46; [L254] SORT_44 var_48_arg_1 = var_45; [L255] SORT_47 var_48 = ((SORT_47)var_48_arg_0 << 24) | var_48_arg_1; [L256] var_48 = var_48 & mask_SORT_47 [L257] SORT_1 var_51_arg_0 = var_49; [L258] SORT_47 var_51_arg_1 = var_48; [L259] SORT_50 var_51 = ((SORT_50)var_51_arg_0 << 25) | var_51_arg_1; [L260] var_51 = var_51 & mask_SORT_50 [L261] SORT_1 var_54_arg_0 = var_52; [L262] SORT_50 var_54_arg_1 = var_51; [L263] SORT_53 var_54 = ((SORT_53)var_54_arg_0 << 26) | var_54_arg_1; [L264] var_54 = var_54 & mask_SORT_53 [L265] SORT_1 var_57_arg_0 = var_55; [L266] SORT_53 var_57_arg_1 = var_54; [L267] SORT_56 var_57 = ((SORT_56)var_57_arg_0 << 27) | var_57_arg_1; [L268] var_57 = var_57 & mask_SORT_56 [L269] SORT_1 var_60_arg_0 = var_58; [L270] SORT_56 var_60_arg_1 = var_57; [L271] SORT_59 var_60 = ((SORT_59)var_60_arg_0 << 28) | var_60_arg_1; [L272] var_60 = var_60 & mask_SORT_59 [L273] SORT_1 var_63_arg_0 = var_61; [L274] SORT_59 var_63_arg_1 = var_60; [L275] SORT_62 var_63 = ((SORT_62)var_63_arg_0 << 29) | var_63_arg_1; [L276] var_63 = var_63 & mask_SORT_62 [L277] SORT_1 var_65_arg_0 = var_64; [L278] SORT_62 var_65_arg_1 = var_63; [L279] SORT_9 var_65 = ((SORT_9)var_65_arg_0 << 30) | var_65_arg_1; [L280] SORT_9 var_66_arg_0 = var_65; [L281] var_66_arg_0 = var_66_arg_0 & mask_SORT_9 [L282] SORT_20 var_66 = var_66_arg_0; [L283] SORT_20 var_67_arg_0 = var_21; [L284] SORT_20 var_67_arg_1 = var_66; [L285] SORT_1 var_67 = var_67_arg_0 <= var_67_arg_1; [L286] SORT_1 var_68_arg_0 = var_67; [L287] SORT_1 var_68_arg_1 = var_8; [L288] SORT_1 var_68_arg_2 = var_7; [L289] SORT_1 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L290] SORT_1 var_69_arg_0 = input_3; [L291] SORT_1 var_69_arg_1 = var_68; [L292] SORT_1 var_69 = var_69_arg_0 ^ var_69_arg_1; [L293] SORT_1 var_70_arg_0 = var_69; [L294] SORT_1 var_70 = ~var_70_arg_0; [L295] SORT_1 var_79_arg_0 = var_78; [L296] SORT_1 var_79_arg_1 = var_70; [L297] SORT_1 var_79_arg_2 = var_8; [L298] SORT_1 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L299] SORT_1 var_80_arg_0 = var_79; [L300] SORT_1 var_80 = ~var_80_arg_0; [L301] SORT_1 var_81_arg_0 = var_79; [L302] SORT_1 var_81 = ~var_81_arg_0; [L303] SORT_1 var_82_arg_0 = var_80; [L304] SORT_1 var_82_arg_1 = var_81; [L305] SORT_1 var_82 = var_82_arg_0 & var_82_arg_1; [L306] var_82 = var_82 & mask_SORT_1 [L307] SORT_1 bad_83_arg_0 = var_82; [L308] CALL __VERIFIER_assert(!(bad_83_arg_0)) [L20] COND FALSE !(!(cond)) [L308] RET __VERIFIER_assert(!(bad_83_arg_0)) [L310] SORT_96 var_139_arg_0 = state_100; [L311] SORT_96 var_139_arg_1 = var_138; [L312] SORT_1 var_139 = var_139_arg_0 == var_139_arg_1; [L313] SORT_72 var_132_arg_0 = var_131; [L314] var_132_arg_0 = var_132_arg_0 & mask_SORT_72 [L315] SORT_96 var_132 = var_132_arg_0; [L316] SORT_96 var_133_arg_0 = var_132; [L317] SORT_96 var_133_arg_1 = state_97; [L318] SORT_1 var_133 = var_133_arg_0 <= var_133_arg_1; [L319] SORT_72 var_135_arg_0 = var_134; [L320] var_135_arg_0 = var_135_arg_0 & mask_SORT_72 [L321] SORT_96 var_135 = var_135_arg_0; [L322] SORT_96 var_136_arg_0 = state_97; [L323] SORT_96 var_136_arg_1 = var_135; [L324] SORT_1 var_136 = var_136_arg_0 <= var_136_arg_1; [L325] SORT_1 var_137_arg_0 = var_133; [L326] SORT_1 var_137_arg_1 = var_136; [L327] SORT_1 var_137 = var_137_arg_0 & var_137_arg_1; [L328] SORT_1 var_140_arg_0 = var_139; [L329] SORT_1 var_140_arg_1 = var_137; [L330] SORT_1 var_140_arg_2 = var_8; [L331] SORT_1 var_140 = var_140_arg_0 ? var_140_arg_1 : var_140_arg_2; [L332] SORT_1 var_141_arg_0 = input_4; [L333] SORT_1 var_141_arg_1 = var_8; [L334] SORT_1 var_141_arg_2 = var_140; [L335] SORT_1 var_141 = var_141_arg_0 ? var_141_arg_1 : var_141_arg_2; [L336] SORT_1 next_142_arg_1 = var_141; [L337] SORT_12 var_113_arg_0 = var_112; [L338] var_113_arg_0 = (var_113_arg_0 & msb_SORT_12) ? (var_113_arg_0 | ~mask_SORT_12) : (var_113_arg_0 & mask_SORT_12) [L339] SORT_41 var_113 = (int)((signed char)var_113_arg_0); [L340] SORT_11 var_114_arg_0 = state_17; [L341] var_114_arg_0 = (var_114_arg_0 & msb_SORT_11) ? (var_114_arg_0 | ~mask_SORT_11) : (var_114_arg_0 & mask_SORT_11) [L342] SORT_41 var_114 = (int)((short)var_114_arg_0); [L343] SORT_41 var_115_arg_0 = var_113; [L344] SORT_41 var_115_arg_1 = var_114; [L345] SORT_41 var_115 = var_115_arg_0 * var_115_arg_1; [L346] SORT_105 var_107_arg_0 = var_106; [L347] var_107_arg_0 = (var_107_arg_0 & msb_SORT_105) ? (var_107_arg_0 | ~mask_SORT_105) : (var_107_arg_0 & mask_SORT_105) [L348] SORT_26 var_107 = (int)((signed char)var_107_arg_0); [L349] SORT_11 var_108_arg_0 = var_16; [L350] var_108_arg_0 = (var_108_arg_0 & msb_SORT_11) ? (var_108_arg_0 | ~mask_SORT_11) : (var_108_arg_0 & mask_SORT_11) [L351] SORT_26 var_108 = (int)((short)var_108_arg_0); [L352] SORT_26 var_109_arg_0 = var_107; [L353] SORT_26 var_109_arg_1 = var_108; [L354] SORT_26 var_109 = var_109_arg_0 * var_109_arg_1; [L355] var_109 = var_109 & mask_SORT_26 [L356] SORT_26 var_151_arg_0 = var_109; [L357] SORT_1 var_151 = var_151_arg_0 >> 17; [L358] SORT_26 var_149_arg_0 = var_109; [L359] SORT_1 var_149 = var_149_arg_0 >> 17; [L360] SORT_26 var_147_arg_0 = var_109; [L361] SORT_1 var_147 = var_147_arg_0 >> 17; [L362] SORT_26 var_145_arg_0 = var_109; [L363] SORT_1 var_145 = var_145_arg_0 >> 17; [L364] SORT_26 var_143_arg_0 = var_109; [L365] SORT_1 var_143 = var_143_arg_0 >> 17; [L366] SORT_1 var_144_arg_0 = var_143; [L367] SORT_26 var_144_arg_1 = var_109; [L368] SORT_29 var_144 = ((SORT_29)var_144_arg_0 << 18) | var_144_arg_1; [L369] var_144 = var_144 & mask_SORT_29 [L370] SORT_1 var_146_arg_0 = var_145; [L371] SORT_29 var_146_arg_1 = var_144; [L372] SORT_32 var_146 = ((SORT_32)var_146_arg_0 << 19) | var_146_arg_1; [L373] var_146 = var_146 & mask_SORT_32 [L374] SORT_1 var_148_arg_0 = var_147; [L375] SORT_32 var_148_arg_1 = var_146; [L376] SORT_35 var_148 = ((SORT_35)var_148_arg_0 << 20) | var_148_arg_1; [L377] var_148 = var_148 & mask_SORT_35 [L378] SORT_1 var_150_arg_0 = var_149; [L379] SORT_35 var_150_arg_1 = var_148; [L380] SORT_38 var_150 = ((SORT_38)var_150_arg_0 << 21) | var_150_arg_1; [L381] var_150 = var_150 & mask_SORT_38 [L382] SORT_1 var_152_arg_0 = var_151; [L383] SORT_38 var_152_arg_1 = var_150; [L384] SORT_41 var_152 = ((SORT_41)var_152_arg_0 << 22) | var_152_arg_1; [L385] SORT_41 var_153_arg_0 = var_115; [L386] SORT_41 var_153_arg_1 = var_152; [L387] SORT_41 var_153 = var_153_arg_0 + var_153_arg_1; [L388] SORT_154 var_156_arg_0 = var_155; [L389] var_156_arg_0 = var_156_arg_0 & mask_SORT_154 [L390] SORT_41 var_156 = var_156_arg_0; [L391] SORT_41 var_157_arg_0 = var_153; [L392] SORT_41 var_157_arg_1 = var_156; [L393] SORT_41 var_157 = var_157_arg_0 + var_157_arg_1; [L394] SORT_41 var_158_arg_0 = var_157; [L395] SORT_11 var_158 = var_158_arg_0 >> 7; [L396] SORT_1 var_159_arg_0 = input_4; [L397] SORT_11 var_159_arg_1 = var_119; [L398] SORT_11 var_159_arg_2 = var_158; [L399] SORT_11 var_159 = var_159_arg_0 ? var_159_arg_1 : var_159_arg_2; [L400] SORT_11 next_160_arg_1 = var_159; [L401] SORT_1 var_161_arg_0 = var_8; [L402] var_161_arg_0 = var_161_arg_0 & mask_SORT_1 [L403] SORT_11 var_161 = var_161_arg_0; [L404] SORT_11 var_162_arg_0 = state_76; [L405] SORT_11 var_162_arg_1 = var_161; [L406] SORT_11 var_162 = var_162_arg_0 + var_162_arg_1; [L407] var_162 = var_162 & mask_SORT_11 [L408] SORT_11 next_163_arg_1 = var_162; [L409] SORT_72 var_167_arg_0 = var_166; [L410] SORT_1 var_167_arg_1 = input_3; [L411] SORT_96 var_167 = ((SORT_96)var_167_arg_0 << 1) | var_167_arg_1; [L412] SORT_1 var_164_arg_0 = input_3; [L413] var_164_arg_0 = var_164_arg_0 & mask_SORT_1 [L414] SORT_96 var_164 = var_164_arg_0; [L415] SORT_96 var_165_arg_0 = state_97; [L416] SORT_96 var_165_arg_1 = var_164; [L417] SORT_96 var_165 = var_165_arg_0 + var_165_arg_1; [L418] SORT_1 var_168_arg_0 = var_139; [L419] SORT_96 var_168_arg_1 = var_167; [L420] SORT_96 var_168_arg_2 = var_165; [L421] SORT_96 var_168 = var_168_arg_0 ? var_168_arg_1 : var_168_arg_2; [L422] SORT_1 var_170_arg_0 = input_4; [L423] SORT_96 var_170_arg_1 = var_169; [L424] SORT_96 var_170_arg_2 = var_168; [L425] SORT_96 var_170 = var_170_arg_0 ? var_170_arg_1 : var_170_arg_2; [L426] var_170 = var_170 & mask_SORT_96 [L427] SORT_96 next_171_arg_1 = var_170; [L428] SORT_1 var_172_arg_0 = var_8; [L429] var_172_arg_0 = var_172_arg_0 & mask_SORT_1 [L430] SORT_96 var_172 = var_172_arg_0; [L431] SORT_96 var_173_arg_0 = state_100; [L432] SORT_96 var_173_arg_1 = var_172; [L433] SORT_96 var_173 = var_173_arg_0 + var_173_arg_1; [L434] SORT_1 var_174_arg_0 = var_139; [L435] SORT_96 var_174_arg_1 = var_169; [L436] SORT_96 var_174_arg_2 = var_173; [L437] SORT_96 var_174 = var_174_arg_0 ? var_174_arg_1 : var_174_arg_2; [L438] SORT_1 var_175_arg_0 = input_4; [L439] SORT_96 var_175_arg_1 = var_169; [L440] SORT_96 var_175_arg_2 = var_174; [L441] SORT_96 var_175 = var_175_arg_0 ? var_175_arg_1 : var_175_arg_2; [L442] var_175 = var_175 & mask_SORT_96 [L443] SORT_96 next_176_arg_1 = var_175; [L445] state_5 = next_142_arg_1 [L446] state_17 = next_160_arg_1 [L447] state_76 = next_163_arg_1 [L448] state_97 = next_171_arg_1 [L449] state_100 = next_176_arg_1 [L131] input_2 = __VERIFIER_nondet_uchar() [L132] input_3 = __VERIFIER_nondet_uchar() [L133] input_3 = input_3 & mask_SORT_1 [L134] input_4 = __VERIFIER_nondet_uchar() [L135] input_4 = input_4 & mask_SORT_1 [L137] SORT_1 var_84_arg_0 = state_5; [L138] SORT_1 var_84 = ~var_84_arg_0; [L139] SORT_1 var_85_arg_0 = var_84; [L140] SORT_1 var_85 = ~var_85_arg_0; [L141] SORT_1 var_86_arg_0 = state_5; [L142] SORT_1 var_86_arg_1 = var_85; [L143] SORT_1 var_86 = var_86_arg_0 | var_86_arg_1; [L144] var_86 = var_86 & mask_SORT_1 [L145] SORT_1 constr_87_arg_0 = var_86; [L146] CALL assume_abort_if_not(constr_87_arg_0) [L21] COND FALSE !(!cond) [L146] RET assume_abort_if_not(constr_87_arg_0) [L147] SORT_1 var_88_arg_0 = var_8; [L148] var_88_arg_0 = var_88_arg_0 & mask_SORT_1 [L149] SORT_11 var_88 = var_88_arg_0; [L150] SORT_11 var_89_arg_0 = state_76; [L151] SORT_11 var_89_arg_1 = var_88; [L152] SORT_1 var_89 = var_89_arg_0 <= var_89_arg_1; [L153] SORT_1 var_90_arg_0 = input_4; [L154] SORT_1 var_90_arg_1 = var_89; [L155] SORT_1 var_90 = var_90_arg_0 ^ var_90_arg_1; [L156] SORT_1 var_91_arg_0 = var_90; [L157] SORT_1 var_91 = ~var_91_arg_0; [L158] SORT_1 var_92_arg_0 = var_90; [L159] SORT_1 var_92 = ~var_92_arg_0; [L160] SORT_1 var_93_arg_0 = var_91; [L161] SORT_1 var_93_arg_1 = var_92; [L162] SORT_1 var_93 = var_93_arg_0 | var_93_arg_1; [L163] var_93 = var_93 & mask_SORT_1 [L164] SORT_1 constr_94_arg_0 = var_93; [L165] CALL assume_abort_if_not(constr_94_arg_0) [L21] COND FALSE !(!cond) [L165] RET assume_abort_if_not(constr_94_arg_0) [L167] SORT_72 var_74_arg_0 = var_73; [L168] var_74_arg_0 = var_74_arg_0 & mask_SORT_72 [L169] SORT_11 var_74 = var_74_arg_0; [L170] SORT_11 var_78_arg_0 = var_74; [L171] SORT_11 var_78_arg_1 = state_76; [L172] SORT_1 var_78 = var_78_arg_0 < var_78_arg_1; [L173] SORT_1 var_15_arg_0 = input_3; [L174] SORT_12 var_15_arg_1 = var_14; [L175] SORT_12 var_15_arg_2 = var_13; [L176] SORT_12 var_15 = var_15_arg_0 ? var_15_arg_1 : var_15_arg_2; [L177] var_15 = var_15 & mask_SORT_12 [L178] SORT_12 var_16_arg_0 = var_13; [L179] SORT_12 var_16_arg_1 = var_15; [L180] SORT_11 var_16 = ((SORT_11)var_16_arg_0 << 8) | var_16_arg_1; [L181] SORT_11 var_18_arg_0 = var_16; [L182] SORT_11 var_18_arg_1 = state_17; [L183] SORT_11 var_18 = var_18_arg_0 - var_18_arg_1; [L184] var_18 = var_18 & mask_SORT_11 [L185] SORT_11 var_19_arg_0 = var_18; [L186] SORT_1 var_19 = var_19_arg_0 >> 15; [L187] SORT_1 var_21_arg_0 = var_19; [L188] SORT_9 var_21_arg_1 = var_10; [L189] SORT_20 var_21 = ((SORT_20)var_21_arg_0 << 31) | var_21_arg_1; [L190] var_21 = var_21 & mask_SORT_20 [L191] SORT_11 var_64_arg_0 = var_18; [L192] SORT_1 var_64 = var_64_arg_0 >> 15; [L193] SORT_11 var_61_arg_0 = var_18; [L194] SORT_1 var_61 = var_61_arg_0 >> 15; [L195] SORT_11 var_58_arg_0 = var_18; [L196] SORT_1 var_58 = var_58_arg_0 >> 15; [L197] SORT_11 var_55_arg_0 = var_18; [L198] SORT_1 var_55 = var_55_arg_0 >> 15; [L199] SORT_11 var_52_arg_0 = var_18; [L200] SORT_1 var_52 = var_52_arg_0 >> 15; [L201] SORT_11 var_49_arg_0 = var_18; [L202] SORT_1 var_49 = var_49_arg_0 >> 15; [L203] SORT_11 var_46_arg_0 = var_18; [L204] SORT_1 var_46 = var_46_arg_0 >> 15; [L205] SORT_11 var_43_arg_0 = var_18; [L206] SORT_1 var_43 = var_43_arg_0 >> 15; [L207] SORT_11 var_40_arg_0 = var_18; [L208] SORT_1 var_40 = var_40_arg_0 >> 15; [L209] SORT_11 var_37_arg_0 = var_18; [L210] SORT_1 var_37 = var_37_arg_0 >> 15; [L211] SORT_11 var_34_arg_0 = var_18; [L212] SORT_1 var_34 = var_34_arg_0 >> 15; [L213] SORT_11 var_31_arg_0 = var_18; [L214] SORT_1 var_31 = var_31_arg_0 >> 15; [L215] SORT_11 var_28_arg_0 = var_18; [L216] SORT_1 var_28 = var_28_arg_0 >> 15; [L217] SORT_11 var_25_arg_0 = var_18; [L218] SORT_1 var_25 = var_25_arg_0 >> 15; [L219] SORT_11 var_22_arg_0 = var_18; [L220] SORT_1 var_22 = var_22_arg_0 >> 15; [L221] SORT_1 var_24_arg_0 = var_22; [L222] SORT_11 var_24_arg_1 = var_18; [L223] SORT_23 var_24 = ((SORT_23)var_24_arg_0 << 16) | var_24_arg_1; [L224] var_24 = var_24 & mask_SORT_23 [L225] SORT_1 var_27_arg_0 = var_25; [L226] SORT_23 var_27_arg_1 = var_24; [L227] SORT_26 var_27 = ((SORT_26)var_27_arg_0 << 17) | var_27_arg_1; [L228] var_27 = var_27 & mask_SORT_26 [L229] SORT_1 var_30_arg_0 = var_28; [L230] SORT_26 var_30_arg_1 = var_27; [L231] SORT_29 var_30 = ((SORT_29)var_30_arg_0 << 18) | var_30_arg_1; [L232] var_30 = var_30 & mask_SORT_29 [L233] SORT_1 var_33_arg_0 = var_31; [L234] SORT_29 var_33_arg_1 = var_30; [L235] SORT_32 var_33 = ((SORT_32)var_33_arg_0 << 19) | var_33_arg_1; [L236] var_33 = var_33 & mask_SORT_32 [L237] SORT_1 var_36_arg_0 = var_34; [L238] SORT_32 var_36_arg_1 = var_33; [L239] SORT_35 var_36 = ((SORT_35)var_36_arg_0 << 20) | var_36_arg_1; [L240] var_36 = var_36 & mask_SORT_35 [L241] SORT_1 var_39_arg_0 = var_37; [L242] SORT_35 var_39_arg_1 = var_36; [L243] SORT_38 var_39 = ((SORT_38)var_39_arg_0 << 21) | var_39_arg_1; [L244] var_39 = var_39 & mask_SORT_38 [L245] SORT_1 var_42_arg_0 = var_40; [L246] SORT_38 var_42_arg_1 = var_39; [L247] SORT_41 var_42 = ((SORT_41)var_42_arg_0 << 22) | var_42_arg_1; [L248] var_42 = var_42 & mask_SORT_41 [L249] SORT_1 var_45_arg_0 = var_43; [L250] SORT_41 var_45_arg_1 = var_42; [L251] SORT_44 var_45 = ((SORT_44)var_45_arg_0 << 23) | var_45_arg_1; [L252] var_45 = var_45 & mask_SORT_44 [L253] SORT_1 var_48_arg_0 = var_46; [L254] SORT_44 var_48_arg_1 = var_45; [L255] SORT_47 var_48 = ((SORT_47)var_48_arg_0 << 24) | var_48_arg_1; [L256] var_48 = var_48 & mask_SORT_47 [L257] SORT_1 var_51_arg_0 = var_49; [L258] SORT_47 var_51_arg_1 = var_48; [L259] SORT_50 var_51 = ((SORT_50)var_51_arg_0 << 25) | var_51_arg_1; [L260] var_51 = var_51 & mask_SORT_50 [L261] SORT_1 var_54_arg_0 = var_52; [L262] SORT_50 var_54_arg_1 = var_51; [L263] SORT_53 var_54 = ((SORT_53)var_54_arg_0 << 26) | var_54_arg_1; [L264] var_54 = var_54 & mask_SORT_53 [L265] SORT_1 var_57_arg_0 = var_55; [L266] SORT_53 var_57_arg_1 = var_54; [L267] SORT_56 var_57 = ((SORT_56)var_57_arg_0 << 27) | var_57_arg_1; [L268] var_57 = var_57 & mask_SORT_56 [L269] SORT_1 var_60_arg_0 = var_58; [L270] SORT_56 var_60_arg_1 = var_57; [L271] SORT_59 var_60 = ((SORT_59)var_60_arg_0 << 28) | var_60_arg_1; [L272] var_60 = var_60 & mask_SORT_59 [L273] SORT_1 var_63_arg_0 = var_61; [L274] SORT_59 var_63_arg_1 = var_60; [L275] SORT_62 var_63 = ((SORT_62)var_63_arg_0 << 29) | var_63_arg_1; [L276] var_63 = var_63 & mask_SORT_62 [L277] SORT_1 var_65_arg_0 = var_64; [L278] SORT_62 var_65_arg_1 = var_63; [L279] SORT_9 var_65 = ((SORT_9)var_65_arg_0 << 30) | var_65_arg_1; [L280] SORT_9 var_66_arg_0 = var_65; [L281] var_66_arg_0 = var_66_arg_0 & mask_SORT_9 [L282] SORT_20 var_66 = var_66_arg_0; [L283] SORT_20 var_67_arg_0 = var_21; [L284] SORT_20 var_67_arg_1 = var_66; [L285] SORT_1 var_67 = var_67_arg_0 <= var_67_arg_1; [L286] SORT_1 var_68_arg_0 = var_67; [L287] SORT_1 var_68_arg_1 = var_8; [L288] SORT_1 var_68_arg_2 = var_7; [L289] SORT_1 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L290] SORT_1 var_69_arg_0 = input_3; [L291] SORT_1 var_69_arg_1 = var_68; [L292] SORT_1 var_69 = var_69_arg_0 ^ var_69_arg_1; [L293] SORT_1 var_70_arg_0 = var_69; [L294] SORT_1 var_70 = ~var_70_arg_0; [L295] SORT_1 var_79_arg_0 = var_78; [L296] SORT_1 var_79_arg_1 = var_70; [L297] SORT_1 var_79_arg_2 = var_8; [L298] SORT_1 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L299] SORT_1 var_80_arg_0 = var_79; [L300] SORT_1 var_80 = ~var_80_arg_0; [L301] SORT_1 var_81_arg_0 = var_79; [L302] SORT_1 var_81 = ~var_81_arg_0; [L303] SORT_1 var_82_arg_0 = var_80; [L304] SORT_1 var_82_arg_1 = var_81; [L305] SORT_1 var_82 = var_82_arg_0 & var_82_arg_1; [L306] var_82 = var_82 & mask_SORT_1 [L307] SORT_1 bad_83_arg_0 = var_82; [L308] CALL __VERIFIER_assert(!(bad_83_arg_0)) [L20] COND FALSE !(!(cond)) [L308] RET __VERIFIER_assert(!(bad_83_arg_0)) [L310] SORT_96 var_139_arg_0 = state_100; [L311] SORT_96 var_139_arg_1 = var_138; [L312] SORT_1 var_139 = var_139_arg_0 == var_139_arg_1; [L313] SORT_72 var_132_arg_0 = var_131; [L314] var_132_arg_0 = var_132_arg_0 & mask_SORT_72 [L315] SORT_96 var_132 = var_132_arg_0; [L316] SORT_96 var_133_arg_0 = var_132; [L317] SORT_96 var_133_arg_1 = state_97; [L318] SORT_1 var_133 = var_133_arg_0 <= var_133_arg_1; [L319] SORT_72 var_135_arg_0 = var_134; [L320] var_135_arg_0 = var_135_arg_0 & mask_SORT_72 [L321] SORT_96 var_135 = var_135_arg_0; [L322] SORT_96 var_136_arg_0 = state_97; [L323] SORT_96 var_136_arg_1 = var_135; [L324] SORT_1 var_136 = var_136_arg_0 <= var_136_arg_1; [L325] SORT_1 var_137_arg_0 = var_133; [L326] SORT_1 var_137_arg_1 = var_136; [L327] SORT_1 var_137 = var_137_arg_0 & var_137_arg_1; [L328] SORT_1 var_140_arg_0 = var_139; [L329] SORT_1 var_140_arg_1 = var_137; [L330] SORT_1 var_140_arg_2 = var_8; [L331] SORT_1 var_140 = var_140_arg_0 ? var_140_arg_1 : var_140_arg_2; [L332] SORT_1 var_141_arg_0 = input_4; [L333] SORT_1 var_141_arg_1 = var_8; [L334] SORT_1 var_141_arg_2 = var_140; [L335] SORT_1 var_141 = var_141_arg_0 ? var_141_arg_1 : var_141_arg_2; [L336] SORT_1 next_142_arg_1 = var_141; [L337] SORT_12 var_113_arg_0 = var_112; [L338] var_113_arg_0 = (var_113_arg_0 & msb_SORT_12) ? (var_113_arg_0 | ~mask_SORT_12) : (var_113_arg_0 & mask_SORT_12) [L339] SORT_41 var_113 = (int)((signed char)var_113_arg_0); [L340] SORT_11 var_114_arg_0 = state_17; [L341] var_114_arg_0 = (var_114_arg_0 & msb_SORT_11) ? (var_114_arg_0 | ~mask_SORT_11) : (var_114_arg_0 & mask_SORT_11) [L342] SORT_41 var_114 = (int)((short)var_114_arg_0); [L343] SORT_41 var_115_arg_0 = var_113; [L344] SORT_41 var_115_arg_1 = var_114; [L345] SORT_41 var_115 = var_115_arg_0 * var_115_arg_1; [L346] SORT_105 var_107_arg_0 = var_106; [L347] var_107_arg_0 = (var_107_arg_0 & msb_SORT_105) ? (var_107_arg_0 | ~mask_SORT_105) : (var_107_arg_0 & mask_SORT_105) [L348] SORT_26 var_107 = (int)((signed char)var_107_arg_0); [L349] SORT_11 var_108_arg_0 = var_16; [L350] var_108_arg_0 = (var_108_arg_0 & msb_SORT_11) ? (var_108_arg_0 | ~mask_SORT_11) : (var_108_arg_0 & mask_SORT_11) [L351] SORT_26 var_108 = (int)((short)var_108_arg_0); [L352] SORT_26 var_109_arg_0 = var_107; [L353] SORT_26 var_109_arg_1 = var_108; [L354] SORT_26 var_109 = var_109_arg_0 * var_109_arg_1; [L355] var_109 = var_109 & mask_SORT_26 [L356] SORT_26 var_151_arg_0 = var_109; [L357] SORT_1 var_151 = var_151_arg_0 >> 17; [L358] SORT_26 var_149_arg_0 = var_109; [L359] SORT_1 var_149 = var_149_arg_0 >> 17; [L360] SORT_26 var_147_arg_0 = var_109; [L361] SORT_1 var_147 = var_147_arg_0 >> 17; [L362] SORT_26 var_145_arg_0 = var_109; [L363] SORT_1 var_145 = var_145_arg_0 >> 17; [L364] SORT_26 var_143_arg_0 = var_109; [L365] SORT_1 var_143 = var_143_arg_0 >> 17; [L366] SORT_1 var_144_arg_0 = var_143; [L367] SORT_26 var_144_arg_1 = var_109; [L368] SORT_29 var_144 = ((SORT_29)var_144_arg_0 << 18) | var_144_arg_1; [L369] var_144 = var_144 & mask_SORT_29 [L370] SORT_1 var_146_arg_0 = var_145; [L371] SORT_29 var_146_arg_1 = var_144; [L372] SORT_32 var_146 = ((SORT_32)var_146_arg_0 << 19) | var_146_arg_1; [L373] var_146 = var_146 & mask_SORT_32 [L374] SORT_1 var_148_arg_0 = var_147; [L375] SORT_32 var_148_arg_1 = var_146; [L376] SORT_35 var_148 = ((SORT_35)var_148_arg_0 << 20) | var_148_arg_1; [L377] var_148 = var_148 & mask_SORT_35 [L378] SORT_1 var_150_arg_0 = var_149; [L379] SORT_35 var_150_arg_1 = var_148; [L380] SORT_38 var_150 = ((SORT_38)var_150_arg_0 << 21) | var_150_arg_1; [L381] var_150 = var_150 & mask_SORT_38 [L382] SORT_1 var_152_arg_0 = var_151; [L383] SORT_38 var_152_arg_1 = var_150; [L384] SORT_41 var_152 = ((SORT_41)var_152_arg_0 << 22) | var_152_arg_1; [L385] SORT_41 var_153_arg_0 = var_115; [L386] SORT_41 var_153_arg_1 = var_152; [L387] SORT_41 var_153 = var_153_arg_0 + var_153_arg_1; [L388] SORT_154 var_156_arg_0 = var_155; [L389] var_156_arg_0 = var_156_arg_0 & mask_SORT_154 [L390] SORT_41 var_156 = var_156_arg_0; [L391] SORT_41 var_157_arg_0 = var_153; [L392] SORT_41 var_157_arg_1 = var_156; [L393] SORT_41 var_157 = var_157_arg_0 + var_157_arg_1; [L394] SORT_41 var_158_arg_0 = var_157; [L395] SORT_11 var_158 = var_158_arg_0 >> 7; [L396] SORT_1 var_159_arg_0 = input_4; [L397] SORT_11 var_159_arg_1 = var_119; [L398] SORT_11 var_159_arg_2 = var_158; [L399] SORT_11 var_159 = var_159_arg_0 ? var_159_arg_1 : var_159_arg_2; [L400] SORT_11 next_160_arg_1 = var_159; [L401] SORT_1 var_161_arg_0 = var_8; [L402] var_161_arg_0 = var_161_arg_0 & mask_SORT_1 [L403] SORT_11 var_161 = var_161_arg_0; [L404] SORT_11 var_162_arg_0 = state_76; [L405] SORT_11 var_162_arg_1 = var_161; [L406] SORT_11 var_162 = var_162_arg_0 + var_162_arg_1; [L407] var_162 = var_162 & mask_SORT_11 [L408] SORT_11 next_163_arg_1 = var_162; [L409] SORT_72 var_167_arg_0 = var_166; [L410] SORT_1 var_167_arg_1 = input_3; [L411] SORT_96 var_167 = ((SORT_96)var_167_arg_0 << 1) | var_167_arg_1; [L412] SORT_1 var_164_arg_0 = input_3; [L413] var_164_arg_0 = var_164_arg_0 & mask_SORT_1 [L414] SORT_96 var_164 = var_164_arg_0; [L415] SORT_96 var_165_arg_0 = state_97; [L416] SORT_96 var_165_arg_1 = var_164; [L417] SORT_96 var_165 = var_165_arg_0 + var_165_arg_1; [L418] SORT_1 var_168_arg_0 = var_139; [L419] SORT_96 var_168_arg_1 = var_167; [L420] SORT_96 var_168_arg_2 = var_165; [L421] SORT_96 var_168 = var_168_arg_0 ? var_168_arg_1 : var_168_arg_2; [L422] SORT_1 var_170_arg_0 = input_4; [L423] SORT_96 var_170_arg_1 = var_169; [L424] SORT_96 var_170_arg_2 = var_168; [L425] SORT_96 var_170 = var_170_arg_0 ? var_170_arg_1 : var_170_arg_2; [L426] var_170 = var_170 & mask_SORT_96 [L427] SORT_96 next_171_arg_1 = var_170; [L428] SORT_1 var_172_arg_0 = var_8; [L429] var_172_arg_0 = var_172_arg_0 & mask_SORT_1 [L430] SORT_96 var_172 = var_172_arg_0; [L431] SORT_96 var_173_arg_0 = state_100; [L432] SORT_96 var_173_arg_1 = var_172; [L433] SORT_96 var_173 = var_173_arg_0 + var_173_arg_1; [L434] SORT_1 var_174_arg_0 = var_139; [L435] SORT_96 var_174_arg_1 = var_169; [L436] SORT_96 var_174_arg_2 = var_173; [L437] SORT_96 var_174 = var_174_arg_0 ? var_174_arg_1 : var_174_arg_2; [L438] SORT_1 var_175_arg_0 = input_4; [L439] SORT_96 var_175_arg_1 = var_169; [L440] SORT_96 var_175_arg_2 = var_174; [L441] SORT_96 var_175 = var_175_arg_0 ? var_175_arg_1 : var_175_arg_2; [L442] var_175 = var_175 & mask_SORT_96 [L443] SORT_96 next_176_arg_1 = var_175; [L445] state_5 = next_142_arg_1 [L446] state_17 = next_160_arg_1 [L447] state_76 = next_163_arg_1 [L448] state_97 = next_171_arg_1 [L449] state_100 = next_176_arg_1 [L131] input_2 = __VERIFIER_nondet_uchar() [L132] input_3 = __VERIFIER_nondet_uchar() [L133] input_3 = input_3 & mask_SORT_1 [L134] input_4 = __VERIFIER_nondet_uchar() [L135] input_4 = input_4 & mask_SORT_1 [L137] SORT_1 var_84_arg_0 = state_5; [L138] SORT_1 var_84 = ~var_84_arg_0; [L139] SORT_1 var_85_arg_0 = var_84; [L140] SORT_1 var_85 = ~var_85_arg_0; [L141] SORT_1 var_86_arg_0 = state_5; [L142] SORT_1 var_86_arg_1 = var_85; [L143] SORT_1 var_86 = var_86_arg_0 | var_86_arg_1; [L144] var_86 = var_86 & mask_SORT_1 [L145] SORT_1 constr_87_arg_0 = var_86; [L146] CALL assume_abort_if_not(constr_87_arg_0) [L21] COND FALSE !(!cond) [L146] RET assume_abort_if_not(constr_87_arg_0) [L147] SORT_1 var_88_arg_0 = var_8; [L148] var_88_arg_0 = var_88_arg_0 & mask_SORT_1 [L149] SORT_11 var_88 = var_88_arg_0; [L150] SORT_11 var_89_arg_0 = state_76; [L151] SORT_11 var_89_arg_1 = var_88; [L152] SORT_1 var_89 = var_89_arg_0 <= var_89_arg_1; [L153] SORT_1 var_90_arg_0 = input_4; [L154] SORT_1 var_90_arg_1 = var_89; [L155] SORT_1 var_90 = var_90_arg_0 ^ var_90_arg_1; [L156] SORT_1 var_91_arg_0 = var_90; [L157] SORT_1 var_91 = ~var_91_arg_0; [L158] SORT_1 var_92_arg_0 = var_90; [L159] SORT_1 var_92 = ~var_92_arg_0; [L160] SORT_1 var_93_arg_0 = var_91; [L161] SORT_1 var_93_arg_1 = var_92; [L162] SORT_1 var_93 = var_93_arg_0 | var_93_arg_1; [L163] var_93 = var_93 & mask_SORT_1 [L164] SORT_1 constr_94_arg_0 = var_93; [L165] CALL assume_abort_if_not(constr_94_arg_0) [L21] COND FALSE !(!cond) [L165] RET assume_abort_if_not(constr_94_arg_0) [L167] SORT_72 var_74_arg_0 = var_73; [L168] var_74_arg_0 = var_74_arg_0 & mask_SORT_72 [L169] SORT_11 var_74 = var_74_arg_0; [L170] SORT_11 var_78_arg_0 = var_74; [L171] SORT_11 var_78_arg_1 = state_76; [L172] SORT_1 var_78 = var_78_arg_0 < var_78_arg_1; [L173] SORT_1 var_15_arg_0 = input_3; [L174] SORT_12 var_15_arg_1 = var_14; [L175] SORT_12 var_15_arg_2 = var_13; [L176] SORT_12 var_15 = var_15_arg_0 ? var_15_arg_1 : var_15_arg_2; [L177] var_15 = var_15 & mask_SORT_12 [L178] SORT_12 var_16_arg_0 = var_13; [L179] SORT_12 var_16_arg_1 = var_15; [L180] SORT_11 var_16 = ((SORT_11)var_16_arg_0 << 8) | var_16_arg_1; [L181] SORT_11 var_18_arg_0 = var_16; [L182] SORT_11 var_18_arg_1 = state_17; [L183] SORT_11 var_18 = var_18_arg_0 - var_18_arg_1; [L184] var_18 = var_18 & mask_SORT_11 [L185] SORT_11 var_19_arg_0 = var_18; [L186] SORT_1 var_19 = var_19_arg_0 >> 15; [L187] SORT_1 var_21_arg_0 = var_19; [L188] SORT_9 var_21_arg_1 = var_10; [L189] SORT_20 var_21 = ((SORT_20)var_21_arg_0 << 31) | var_21_arg_1; [L190] var_21 = var_21 & mask_SORT_20 [L191] SORT_11 var_64_arg_0 = var_18; [L192] SORT_1 var_64 = var_64_arg_0 >> 15; [L193] SORT_11 var_61_arg_0 = var_18; [L194] SORT_1 var_61 = var_61_arg_0 >> 15; [L195] SORT_11 var_58_arg_0 = var_18; [L196] SORT_1 var_58 = var_58_arg_0 >> 15; [L197] SORT_11 var_55_arg_0 = var_18; [L198] SORT_1 var_55 = var_55_arg_0 >> 15; [L199] SORT_11 var_52_arg_0 = var_18; [L200] SORT_1 var_52 = var_52_arg_0 >> 15; [L201] SORT_11 var_49_arg_0 = var_18; [L202] SORT_1 var_49 = var_49_arg_0 >> 15; [L203] SORT_11 var_46_arg_0 = var_18; [L204] SORT_1 var_46 = var_46_arg_0 >> 15; [L205] SORT_11 var_43_arg_0 = var_18; [L206] SORT_1 var_43 = var_43_arg_0 >> 15; [L207] SORT_11 var_40_arg_0 = var_18; [L208] SORT_1 var_40 = var_40_arg_0 >> 15; [L209] SORT_11 var_37_arg_0 = var_18; [L210] SORT_1 var_37 = var_37_arg_0 >> 15; [L211] SORT_11 var_34_arg_0 = var_18; [L212] SORT_1 var_34 = var_34_arg_0 >> 15; [L213] SORT_11 var_31_arg_0 = var_18; [L214] SORT_1 var_31 = var_31_arg_0 >> 15; [L215] SORT_11 var_28_arg_0 = var_18; [L216] SORT_1 var_28 = var_28_arg_0 >> 15; [L217] SORT_11 var_25_arg_0 = var_18; [L218] SORT_1 var_25 = var_25_arg_0 >> 15; [L219] SORT_11 var_22_arg_0 = var_18; [L220] SORT_1 var_22 = var_22_arg_0 >> 15; [L221] SORT_1 var_24_arg_0 = var_22; [L222] SORT_11 var_24_arg_1 = var_18; [L223] SORT_23 var_24 = ((SORT_23)var_24_arg_0 << 16) | var_24_arg_1; [L224] var_24 = var_24 & mask_SORT_23 [L225] SORT_1 var_27_arg_0 = var_25; [L226] SORT_23 var_27_arg_1 = var_24; [L227] SORT_26 var_27 = ((SORT_26)var_27_arg_0 << 17) | var_27_arg_1; [L228] var_27 = var_27 & mask_SORT_26 [L229] SORT_1 var_30_arg_0 = var_28; [L230] SORT_26 var_30_arg_1 = var_27; [L231] SORT_29 var_30 = ((SORT_29)var_30_arg_0 << 18) | var_30_arg_1; [L232] var_30 = var_30 & mask_SORT_29 [L233] SORT_1 var_33_arg_0 = var_31; [L234] SORT_29 var_33_arg_1 = var_30; [L235] SORT_32 var_33 = ((SORT_32)var_33_arg_0 << 19) | var_33_arg_1; [L236] var_33 = var_33 & mask_SORT_32 [L237] SORT_1 var_36_arg_0 = var_34; [L238] SORT_32 var_36_arg_1 = var_33; [L239] SORT_35 var_36 = ((SORT_35)var_36_arg_0 << 20) | var_36_arg_1; [L240] var_36 = var_36 & mask_SORT_35 [L241] SORT_1 var_39_arg_0 = var_37; [L242] SORT_35 var_39_arg_1 = var_36; [L243] SORT_38 var_39 = ((SORT_38)var_39_arg_0 << 21) | var_39_arg_1; [L244] var_39 = var_39 & mask_SORT_38 [L245] SORT_1 var_42_arg_0 = var_40; [L246] SORT_38 var_42_arg_1 = var_39; [L247] SORT_41 var_42 = ((SORT_41)var_42_arg_0 << 22) | var_42_arg_1; [L248] var_42 = var_42 & mask_SORT_41 [L249] SORT_1 var_45_arg_0 = var_43; [L250] SORT_41 var_45_arg_1 = var_42; [L251] SORT_44 var_45 = ((SORT_44)var_45_arg_0 << 23) | var_45_arg_1; [L252] var_45 = var_45 & mask_SORT_44 [L253] SORT_1 var_48_arg_0 = var_46; [L254] SORT_44 var_48_arg_1 = var_45; [L255] SORT_47 var_48 = ((SORT_47)var_48_arg_0 << 24) | var_48_arg_1; [L256] var_48 = var_48 & mask_SORT_47 [L257] SORT_1 var_51_arg_0 = var_49; [L258] SORT_47 var_51_arg_1 = var_48; [L259] SORT_50 var_51 = ((SORT_50)var_51_arg_0 << 25) | var_51_arg_1; [L260] var_51 = var_51 & mask_SORT_50 [L261] SORT_1 var_54_arg_0 = var_52; [L262] SORT_50 var_54_arg_1 = var_51; [L263] SORT_53 var_54 = ((SORT_53)var_54_arg_0 << 26) | var_54_arg_1; [L264] var_54 = var_54 & mask_SORT_53 [L265] SORT_1 var_57_arg_0 = var_55; [L266] SORT_53 var_57_arg_1 = var_54; [L267] SORT_56 var_57 = ((SORT_56)var_57_arg_0 << 27) | var_57_arg_1; [L268] var_57 = var_57 & mask_SORT_56 [L269] SORT_1 var_60_arg_0 = var_58; [L270] SORT_56 var_60_arg_1 = var_57; [L271] SORT_59 var_60 = ((SORT_59)var_60_arg_0 << 28) | var_60_arg_1; [L272] var_60 = var_60 & mask_SORT_59 [L273] SORT_1 var_63_arg_0 = var_61; [L274] SORT_59 var_63_arg_1 = var_60; [L275] SORT_62 var_63 = ((SORT_62)var_63_arg_0 << 29) | var_63_arg_1; [L276] var_63 = var_63 & mask_SORT_62 [L277] SORT_1 var_65_arg_0 = var_64; [L278] SORT_62 var_65_arg_1 = var_63; [L279] SORT_9 var_65 = ((SORT_9)var_65_arg_0 << 30) | var_65_arg_1; [L280] SORT_9 var_66_arg_0 = var_65; [L281] var_66_arg_0 = var_66_arg_0 & mask_SORT_9 [L282] SORT_20 var_66 = var_66_arg_0; [L283] SORT_20 var_67_arg_0 = var_21; [L284] SORT_20 var_67_arg_1 = var_66; [L285] SORT_1 var_67 = var_67_arg_0 <= var_67_arg_1; [L286] SORT_1 var_68_arg_0 = var_67; [L287] SORT_1 var_68_arg_1 = var_8; [L288] SORT_1 var_68_arg_2 = var_7; [L289] SORT_1 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L290] SORT_1 var_69_arg_0 = input_3; [L291] SORT_1 var_69_arg_1 = var_68; [L292] SORT_1 var_69 = var_69_arg_0 ^ var_69_arg_1; [L293] SORT_1 var_70_arg_0 = var_69; [L294] SORT_1 var_70 = ~var_70_arg_0; [L295] SORT_1 var_79_arg_0 = var_78; [L296] SORT_1 var_79_arg_1 = var_70; [L297] SORT_1 var_79_arg_2 = var_8; [L298] SORT_1 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L299] SORT_1 var_80_arg_0 = var_79; [L300] SORT_1 var_80 = ~var_80_arg_0; [L301] SORT_1 var_81_arg_0 = var_79; [L302] SORT_1 var_81 = ~var_81_arg_0; [L303] SORT_1 var_82_arg_0 = var_80; [L304] SORT_1 var_82_arg_1 = var_81; [L305] SORT_1 var_82 = var_82_arg_0 & var_82_arg_1; [L306] var_82 = var_82 & mask_SORT_1 [L307] SORT_1 bad_83_arg_0 = var_82; [L308] CALL __VERIFIER_assert(!(bad_83_arg_0)) [L20] COND FALSE !(!(cond)) [L308] RET __VERIFIER_assert(!(bad_83_arg_0)) [L310] SORT_96 var_139_arg_0 = state_100; [L311] SORT_96 var_139_arg_1 = var_138; [L312] SORT_1 var_139 = var_139_arg_0 == var_139_arg_1; [L313] SORT_72 var_132_arg_0 = var_131; [L314] var_132_arg_0 = var_132_arg_0 & mask_SORT_72 [L315] SORT_96 var_132 = var_132_arg_0; [L316] SORT_96 var_133_arg_0 = var_132; [L317] SORT_96 var_133_arg_1 = state_97; [L318] SORT_1 var_133 = var_133_arg_0 <= var_133_arg_1; [L319] SORT_72 var_135_arg_0 = var_134; [L320] var_135_arg_0 = var_135_arg_0 & mask_SORT_72 [L321] SORT_96 var_135 = var_135_arg_0; [L322] SORT_96 var_136_arg_0 = state_97; [L323] SORT_96 var_136_arg_1 = var_135; [L324] SORT_1 var_136 = var_136_arg_0 <= var_136_arg_1; [L325] SORT_1 var_137_arg_0 = var_133; [L326] SORT_1 var_137_arg_1 = var_136; [L327] SORT_1 var_137 = var_137_arg_0 & var_137_arg_1; [L328] SORT_1 var_140_arg_0 = var_139; [L329] SORT_1 var_140_arg_1 = var_137; [L330] SORT_1 var_140_arg_2 = var_8; [L331] SORT_1 var_140 = var_140_arg_0 ? var_140_arg_1 : var_140_arg_2; [L332] SORT_1 var_141_arg_0 = input_4; [L333] SORT_1 var_141_arg_1 = var_8; [L334] SORT_1 var_141_arg_2 = var_140; [L335] SORT_1 var_141 = var_141_arg_0 ? var_141_arg_1 : var_141_arg_2; [L336] SORT_1 next_142_arg_1 = var_141; [L337] SORT_12 var_113_arg_0 = var_112; [L338] var_113_arg_0 = (var_113_arg_0 & msb_SORT_12) ? (var_113_arg_0 | ~mask_SORT_12) : (var_113_arg_0 & mask_SORT_12) [L339] SORT_41 var_113 = (int)((signed char)var_113_arg_0); [L340] SORT_11 var_114_arg_0 = state_17; [L341] var_114_arg_0 = (var_114_arg_0 & msb_SORT_11) ? (var_114_arg_0 | ~mask_SORT_11) : (var_114_arg_0 & mask_SORT_11) [L342] SORT_41 var_114 = (int)((short)var_114_arg_0); [L343] SORT_41 var_115_arg_0 = var_113; [L344] SORT_41 var_115_arg_1 = var_114; [L345] SORT_41 var_115 = var_115_arg_0 * var_115_arg_1; [L346] SORT_105 var_107_arg_0 = var_106; [L347] var_107_arg_0 = (var_107_arg_0 & msb_SORT_105) ? (var_107_arg_0 | ~mask_SORT_105) : (var_107_arg_0 & mask_SORT_105) [L348] SORT_26 var_107 = (int)((signed char)var_107_arg_0); [L349] SORT_11 var_108_arg_0 = var_16; [L350] var_108_arg_0 = (var_108_arg_0 & msb_SORT_11) ? (var_108_arg_0 | ~mask_SORT_11) : (var_108_arg_0 & mask_SORT_11) [L351] SORT_26 var_108 = (int)((short)var_108_arg_0); [L352] SORT_26 var_109_arg_0 = var_107; [L353] SORT_26 var_109_arg_1 = var_108; [L354] SORT_26 var_109 = var_109_arg_0 * var_109_arg_1; [L355] var_109 = var_109 & mask_SORT_26 [L356] SORT_26 var_151_arg_0 = var_109; [L357] SORT_1 var_151 = var_151_arg_0 >> 17; [L358] SORT_26 var_149_arg_0 = var_109; [L359] SORT_1 var_149 = var_149_arg_0 >> 17; [L360] SORT_26 var_147_arg_0 = var_109; [L361] SORT_1 var_147 = var_147_arg_0 >> 17; [L362] SORT_26 var_145_arg_0 = var_109; [L363] SORT_1 var_145 = var_145_arg_0 >> 17; [L364] SORT_26 var_143_arg_0 = var_109; [L365] SORT_1 var_143 = var_143_arg_0 >> 17; [L366] SORT_1 var_144_arg_0 = var_143; [L367] SORT_26 var_144_arg_1 = var_109; [L368] SORT_29 var_144 = ((SORT_29)var_144_arg_0 << 18) | var_144_arg_1; [L369] var_144 = var_144 & mask_SORT_29 [L370] SORT_1 var_146_arg_0 = var_145; [L371] SORT_29 var_146_arg_1 = var_144; [L372] SORT_32 var_146 = ((SORT_32)var_146_arg_0 << 19) | var_146_arg_1; [L373] var_146 = var_146 & mask_SORT_32 [L374] SORT_1 var_148_arg_0 = var_147; [L375] SORT_32 var_148_arg_1 = var_146; [L376] SORT_35 var_148 = ((SORT_35)var_148_arg_0 << 20) | var_148_arg_1; [L377] var_148 = var_148 & mask_SORT_35 [L378] SORT_1 var_150_arg_0 = var_149; [L379] SORT_35 var_150_arg_1 = var_148; [L380] SORT_38 var_150 = ((SORT_38)var_150_arg_0 << 21) | var_150_arg_1; [L381] var_150 = var_150 & mask_SORT_38 [L382] SORT_1 var_152_arg_0 = var_151; [L383] SORT_38 var_152_arg_1 = var_150; [L384] SORT_41 var_152 = ((SORT_41)var_152_arg_0 << 22) | var_152_arg_1; [L385] SORT_41 var_153_arg_0 = var_115; [L386] SORT_41 var_153_arg_1 = var_152; [L387] SORT_41 var_153 = var_153_arg_0 + var_153_arg_1; [L388] SORT_154 var_156_arg_0 = var_155; [L389] var_156_arg_0 = var_156_arg_0 & mask_SORT_154 [L390] SORT_41 var_156 = var_156_arg_0; [L391] SORT_41 var_157_arg_0 = var_153; [L392] SORT_41 var_157_arg_1 = var_156; [L393] SORT_41 var_157 = var_157_arg_0 + var_157_arg_1; [L394] SORT_41 var_158_arg_0 = var_157; [L395] SORT_11 var_158 = var_158_arg_0 >> 7; [L396] SORT_1 var_159_arg_0 = input_4; [L397] SORT_11 var_159_arg_1 = var_119; [L398] SORT_11 var_159_arg_2 = var_158; [L399] SORT_11 var_159 = var_159_arg_0 ? var_159_arg_1 : var_159_arg_2; [L400] SORT_11 next_160_arg_1 = var_159; [L401] SORT_1 var_161_arg_0 = var_8; [L402] var_161_arg_0 = var_161_arg_0 & mask_SORT_1 [L403] SORT_11 var_161 = var_161_arg_0; [L404] SORT_11 var_162_arg_0 = state_76; [L405] SORT_11 var_162_arg_1 = var_161; [L406] SORT_11 var_162 = var_162_arg_0 + var_162_arg_1; [L407] var_162 = var_162 & mask_SORT_11 [L408] SORT_11 next_163_arg_1 = var_162; [L409] SORT_72 var_167_arg_0 = var_166; [L410] SORT_1 var_167_arg_1 = input_3; [L411] SORT_96 var_167 = ((SORT_96)var_167_arg_0 << 1) | var_167_arg_1; [L412] SORT_1 var_164_arg_0 = input_3; [L413] var_164_arg_0 = var_164_arg_0 & mask_SORT_1 [L414] SORT_96 var_164 = var_164_arg_0; [L415] SORT_96 var_165_arg_0 = state_97; [L416] SORT_96 var_165_arg_1 = var_164; [L417] SORT_96 var_165 = var_165_arg_0 + var_165_arg_1; [L418] SORT_1 var_168_arg_0 = var_139; [L419] SORT_96 var_168_arg_1 = var_167; [L420] SORT_96 var_168_arg_2 = var_165; [L421] SORT_96 var_168 = var_168_arg_0 ? var_168_arg_1 : var_168_arg_2; [L422] SORT_1 var_170_arg_0 = input_4; [L423] SORT_96 var_170_arg_1 = var_169; [L424] SORT_96 var_170_arg_2 = var_168; [L425] SORT_96 var_170 = var_170_arg_0 ? var_170_arg_1 : var_170_arg_2; [L426] var_170 = var_170 & mask_SORT_96 [L427] SORT_96 next_171_arg_1 = var_170; [L428] SORT_1 var_172_arg_0 = var_8; [L429] var_172_arg_0 = var_172_arg_0 & mask_SORT_1 [L430] SORT_96 var_172 = var_172_arg_0; [L431] SORT_96 var_173_arg_0 = state_100; [L432] SORT_96 var_173_arg_1 = var_172; [L433] SORT_96 var_173 = var_173_arg_0 + var_173_arg_1; [L434] SORT_1 var_174_arg_0 = var_139; [L435] SORT_96 var_174_arg_1 = var_169; [L436] SORT_96 var_174_arg_2 = var_173; [L437] SORT_96 var_174 = var_174_arg_0 ? var_174_arg_1 : var_174_arg_2; [L438] SORT_1 var_175_arg_0 = input_4; [L439] SORT_96 var_175_arg_1 = var_169; [L440] SORT_96 var_175_arg_2 = var_174; [L441] SORT_96 var_175 = var_175_arg_0 ? var_175_arg_1 : var_175_arg_2; [L442] var_175 = var_175 & mask_SORT_96 [L443] SORT_96 next_176_arg_1 = var_175; [L445] state_5 = next_142_arg_1 [L446] state_17 = next_160_arg_1 [L447] state_76 = next_163_arg_1 [L448] state_97 = next_171_arg_1 [L449] state_100 = next_176_arg_1 [L131] input_2 = __VERIFIER_nondet_uchar() [L132] input_3 = __VERIFIER_nondet_uchar() [L133] input_3 = input_3 & mask_SORT_1 [L134] input_4 = __VERIFIER_nondet_uchar() [L135] input_4 = input_4 & mask_SORT_1 [L137] SORT_1 var_84_arg_0 = state_5; [L138] SORT_1 var_84 = ~var_84_arg_0; [L139] SORT_1 var_85_arg_0 = var_84; [L140] SORT_1 var_85 = ~var_85_arg_0; [L141] SORT_1 var_86_arg_0 = state_5; [L142] SORT_1 var_86_arg_1 = var_85; [L143] SORT_1 var_86 = var_86_arg_0 | var_86_arg_1; [L144] var_86 = var_86 & mask_SORT_1 [L145] SORT_1 constr_87_arg_0 = var_86; [L146] CALL assume_abort_if_not(constr_87_arg_0) [L21] COND FALSE !(!cond) [L146] RET assume_abort_if_not(constr_87_arg_0) [L147] SORT_1 var_88_arg_0 = var_8; [L148] var_88_arg_0 = var_88_arg_0 & mask_SORT_1 [L149] SORT_11 var_88 = var_88_arg_0; [L150] SORT_11 var_89_arg_0 = state_76; [L151] SORT_11 var_89_arg_1 = var_88; [L152] SORT_1 var_89 = var_89_arg_0 <= var_89_arg_1; [L153] SORT_1 var_90_arg_0 = input_4; [L154] SORT_1 var_90_arg_1 = var_89; [L155] SORT_1 var_90 = var_90_arg_0 ^ var_90_arg_1; [L156] SORT_1 var_91_arg_0 = var_90; [L157] SORT_1 var_91 = ~var_91_arg_0; [L158] SORT_1 var_92_arg_0 = var_90; [L159] SORT_1 var_92 = ~var_92_arg_0; [L160] SORT_1 var_93_arg_0 = var_91; [L161] SORT_1 var_93_arg_1 = var_92; [L162] SORT_1 var_93 = var_93_arg_0 | var_93_arg_1; [L163] var_93 = var_93 & mask_SORT_1 [L164] SORT_1 constr_94_arg_0 = var_93; [L165] CALL assume_abort_if_not(constr_94_arg_0) [L21] COND FALSE !(!cond) [L165] RET assume_abort_if_not(constr_94_arg_0) [L167] SORT_72 var_74_arg_0 = var_73; [L168] var_74_arg_0 = var_74_arg_0 & mask_SORT_72 [L169] SORT_11 var_74 = var_74_arg_0; [L170] SORT_11 var_78_arg_0 = var_74; [L171] SORT_11 var_78_arg_1 = state_76; [L172] SORT_1 var_78 = var_78_arg_0 < var_78_arg_1; [L173] SORT_1 var_15_arg_0 = input_3; [L174] SORT_12 var_15_arg_1 = var_14; [L175] SORT_12 var_15_arg_2 = var_13; [L176] SORT_12 var_15 = var_15_arg_0 ? var_15_arg_1 : var_15_arg_2; [L177] var_15 = var_15 & mask_SORT_12 [L178] SORT_12 var_16_arg_0 = var_13; [L179] SORT_12 var_16_arg_1 = var_15; [L180] SORT_11 var_16 = ((SORT_11)var_16_arg_0 << 8) | var_16_arg_1; [L181] SORT_11 var_18_arg_0 = var_16; [L182] SORT_11 var_18_arg_1 = state_17; [L183] SORT_11 var_18 = var_18_arg_0 - var_18_arg_1; [L184] var_18 = var_18 & mask_SORT_11 [L185] SORT_11 var_19_arg_0 = var_18; [L186] SORT_1 var_19 = var_19_arg_0 >> 15; [L187] SORT_1 var_21_arg_0 = var_19; [L188] SORT_9 var_21_arg_1 = var_10; [L189] SORT_20 var_21 = ((SORT_20)var_21_arg_0 << 31) | var_21_arg_1; [L190] var_21 = var_21 & mask_SORT_20 [L191] SORT_11 var_64_arg_0 = var_18; [L192] SORT_1 var_64 = var_64_arg_0 >> 15; [L193] SORT_11 var_61_arg_0 = var_18; [L194] SORT_1 var_61 = var_61_arg_0 >> 15; [L195] SORT_11 var_58_arg_0 = var_18; [L196] SORT_1 var_58 = var_58_arg_0 >> 15; [L197] SORT_11 var_55_arg_0 = var_18; [L198] SORT_1 var_55 = var_55_arg_0 >> 15; [L199] SORT_11 var_52_arg_0 = var_18; [L200] SORT_1 var_52 = var_52_arg_0 >> 15; [L201] SORT_11 var_49_arg_0 = var_18; [L202] SORT_1 var_49 = var_49_arg_0 >> 15; [L203] SORT_11 var_46_arg_0 = var_18; [L204] SORT_1 var_46 = var_46_arg_0 >> 15; [L205] SORT_11 var_43_arg_0 = var_18; [L206] SORT_1 var_43 = var_43_arg_0 >> 15; [L207] SORT_11 var_40_arg_0 = var_18; [L208] SORT_1 var_40 = var_40_arg_0 >> 15; [L209] SORT_11 var_37_arg_0 = var_18; [L210] SORT_1 var_37 = var_37_arg_0 >> 15; [L211] SORT_11 var_34_arg_0 = var_18; [L212] SORT_1 var_34 = var_34_arg_0 >> 15; [L213] SORT_11 var_31_arg_0 = var_18; [L214] SORT_1 var_31 = var_31_arg_0 >> 15; [L215] SORT_11 var_28_arg_0 = var_18; [L216] SORT_1 var_28 = var_28_arg_0 >> 15; [L217] SORT_11 var_25_arg_0 = var_18; [L218] SORT_1 var_25 = var_25_arg_0 >> 15; [L219] SORT_11 var_22_arg_0 = var_18; [L220] SORT_1 var_22 = var_22_arg_0 >> 15; [L221] SORT_1 var_24_arg_0 = var_22; [L222] SORT_11 var_24_arg_1 = var_18; [L223] SORT_23 var_24 = ((SORT_23)var_24_arg_0 << 16) | var_24_arg_1; [L224] var_24 = var_24 & mask_SORT_23 [L225] SORT_1 var_27_arg_0 = var_25; [L226] SORT_23 var_27_arg_1 = var_24; [L227] SORT_26 var_27 = ((SORT_26)var_27_arg_0 << 17) | var_27_arg_1; [L228] var_27 = var_27 & mask_SORT_26 [L229] SORT_1 var_30_arg_0 = var_28; [L230] SORT_26 var_30_arg_1 = var_27; [L231] SORT_29 var_30 = ((SORT_29)var_30_arg_0 << 18) | var_30_arg_1; [L232] var_30 = var_30 & mask_SORT_29 [L233] SORT_1 var_33_arg_0 = var_31; [L234] SORT_29 var_33_arg_1 = var_30; [L235] SORT_32 var_33 = ((SORT_32)var_33_arg_0 << 19) | var_33_arg_1; [L236] var_33 = var_33 & mask_SORT_32 [L237] SORT_1 var_36_arg_0 = var_34; [L238] SORT_32 var_36_arg_1 = var_33; [L239] SORT_35 var_36 = ((SORT_35)var_36_arg_0 << 20) | var_36_arg_1; [L240] var_36 = var_36 & mask_SORT_35 [L241] SORT_1 var_39_arg_0 = var_37; [L242] SORT_35 var_39_arg_1 = var_36; [L243] SORT_38 var_39 = ((SORT_38)var_39_arg_0 << 21) | var_39_arg_1; [L244] var_39 = var_39 & mask_SORT_38 [L245] SORT_1 var_42_arg_0 = var_40; [L246] SORT_38 var_42_arg_1 = var_39; [L247] SORT_41 var_42 = ((SORT_41)var_42_arg_0 << 22) | var_42_arg_1; [L248] var_42 = var_42 & mask_SORT_41 [L249] SORT_1 var_45_arg_0 = var_43; [L250] SORT_41 var_45_arg_1 = var_42; [L251] SORT_44 var_45 = ((SORT_44)var_45_arg_0 << 23) | var_45_arg_1; [L252] var_45 = var_45 & mask_SORT_44 [L253] SORT_1 var_48_arg_0 = var_46; [L254] SORT_44 var_48_arg_1 = var_45; [L255] SORT_47 var_48 = ((SORT_47)var_48_arg_0 << 24) | var_48_arg_1; [L256] var_48 = var_48 & mask_SORT_47 [L257] SORT_1 var_51_arg_0 = var_49; [L258] SORT_47 var_51_arg_1 = var_48; [L259] SORT_50 var_51 = ((SORT_50)var_51_arg_0 << 25) | var_51_arg_1; [L260] var_51 = var_51 & mask_SORT_50 [L261] SORT_1 var_54_arg_0 = var_52; [L262] SORT_50 var_54_arg_1 = var_51; [L263] SORT_53 var_54 = ((SORT_53)var_54_arg_0 << 26) | var_54_arg_1; [L264] var_54 = var_54 & mask_SORT_53 [L265] SORT_1 var_57_arg_0 = var_55; [L266] SORT_53 var_57_arg_1 = var_54; [L267] SORT_56 var_57 = ((SORT_56)var_57_arg_0 << 27) | var_57_arg_1; [L268] var_57 = var_57 & mask_SORT_56 [L269] SORT_1 var_60_arg_0 = var_58; [L270] SORT_56 var_60_arg_1 = var_57; [L271] SORT_59 var_60 = ((SORT_59)var_60_arg_0 << 28) | var_60_arg_1; [L272] var_60 = var_60 & mask_SORT_59 [L273] SORT_1 var_63_arg_0 = var_61; [L274] SORT_59 var_63_arg_1 = var_60; [L275] SORT_62 var_63 = ((SORT_62)var_63_arg_0 << 29) | var_63_arg_1; [L276] var_63 = var_63 & mask_SORT_62 [L277] SORT_1 var_65_arg_0 = var_64; [L278] SORT_62 var_65_arg_1 = var_63; [L279] SORT_9 var_65 = ((SORT_9)var_65_arg_0 << 30) | var_65_arg_1; [L280] SORT_9 var_66_arg_0 = var_65; [L281] var_66_arg_0 = var_66_arg_0 & mask_SORT_9 [L282] SORT_20 var_66 = var_66_arg_0; [L283] SORT_20 var_67_arg_0 = var_21; [L284] SORT_20 var_67_arg_1 = var_66; [L285] SORT_1 var_67 = var_67_arg_0 <= var_67_arg_1; [L286] SORT_1 var_68_arg_0 = var_67; [L287] SORT_1 var_68_arg_1 = var_8; [L288] SORT_1 var_68_arg_2 = var_7; [L289] SORT_1 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L290] SORT_1 var_69_arg_0 = input_3; [L291] SORT_1 var_69_arg_1 = var_68; [L292] SORT_1 var_69 = var_69_arg_0 ^ var_69_arg_1; [L293] SORT_1 var_70_arg_0 = var_69; [L294] SORT_1 var_70 = ~var_70_arg_0; [L295] SORT_1 var_79_arg_0 = var_78; [L296] SORT_1 var_79_arg_1 = var_70; [L297] SORT_1 var_79_arg_2 = var_8; [L298] SORT_1 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L299] SORT_1 var_80_arg_0 = var_79; [L300] SORT_1 var_80 = ~var_80_arg_0; [L301] SORT_1 var_81_arg_0 = var_79; [L302] SORT_1 var_81 = ~var_81_arg_0; [L303] SORT_1 var_82_arg_0 = var_80; [L304] SORT_1 var_82_arg_1 = var_81; [L305] SORT_1 var_82 = var_82_arg_0 & var_82_arg_1; [L306] var_82 = var_82 & mask_SORT_1 [L307] SORT_1 bad_83_arg_0 = var_82; [L308] CALL __VERIFIER_assert(!(bad_83_arg_0)) [L20] COND FALSE !(!(cond)) [L308] RET __VERIFIER_assert(!(bad_83_arg_0)) [L310] SORT_96 var_139_arg_0 = state_100; [L311] SORT_96 var_139_arg_1 = var_138; [L312] SORT_1 var_139 = var_139_arg_0 == var_139_arg_1; [L313] SORT_72 var_132_arg_0 = var_131; [L314] var_132_arg_0 = var_132_arg_0 & mask_SORT_72 [L315] SORT_96 var_132 = var_132_arg_0; [L316] SORT_96 var_133_arg_0 = var_132; [L317] SORT_96 var_133_arg_1 = state_97; [L318] SORT_1 var_133 = var_133_arg_0 <= var_133_arg_1; [L319] SORT_72 var_135_arg_0 = var_134; [L320] var_135_arg_0 = var_135_arg_0 & mask_SORT_72 [L321] SORT_96 var_135 = var_135_arg_0; [L322] SORT_96 var_136_arg_0 = state_97; [L323] SORT_96 var_136_arg_1 = var_135; [L324] SORT_1 var_136 = var_136_arg_0 <= var_136_arg_1; [L325] SORT_1 var_137_arg_0 = var_133; [L326] SORT_1 var_137_arg_1 = var_136; [L327] SORT_1 var_137 = var_137_arg_0 & var_137_arg_1; [L328] SORT_1 var_140_arg_0 = var_139; [L329] SORT_1 var_140_arg_1 = var_137; [L330] SORT_1 var_140_arg_2 = var_8; [L331] SORT_1 var_140 = var_140_arg_0 ? var_140_arg_1 : var_140_arg_2; [L332] SORT_1 var_141_arg_0 = input_4; [L333] SORT_1 var_141_arg_1 = var_8; [L334] SORT_1 var_141_arg_2 = var_140; [L335] SORT_1 var_141 = var_141_arg_0 ? var_141_arg_1 : var_141_arg_2; [L336] SORT_1 next_142_arg_1 = var_141; [L337] SORT_12 var_113_arg_0 = var_112; [L338] var_113_arg_0 = (var_113_arg_0 & msb_SORT_12) ? (var_113_arg_0 | ~mask_SORT_12) : (var_113_arg_0 & mask_SORT_12) [L339] SORT_41 var_113 = (int)((signed char)var_113_arg_0); [L340] SORT_11 var_114_arg_0 = state_17; [L341] var_114_arg_0 = (var_114_arg_0 & msb_SORT_11) ? (var_114_arg_0 | ~mask_SORT_11) : (var_114_arg_0 & mask_SORT_11) [L342] SORT_41 var_114 = (int)((short)var_114_arg_0); [L343] SORT_41 var_115_arg_0 = var_113; [L344] SORT_41 var_115_arg_1 = var_114; [L345] SORT_41 var_115 = var_115_arg_0 * var_115_arg_1; [L346] SORT_105 var_107_arg_0 = var_106; [L347] var_107_arg_0 = (var_107_arg_0 & msb_SORT_105) ? (var_107_arg_0 | ~mask_SORT_105) : (var_107_arg_0 & mask_SORT_105) [L348] SORT_26 var_107 = (int)((signed char)var_107_arg_0); [L349] SORT_11 var_108_arg_0 = var_16; [L350] var_108_arg_0 = (var_108_arg_0 & msb_SORT_11) ? (var_108_arg_0 | ~mask_SORT_11) : (var_108_arg_0 & mask_SORT_11) [L351] SORT_26 var_108 = (int)((short)var_108_arg_0); [L352] SORT_26 var_109_arg_0 = var_107; [L353] SORT_26 var_109_arg_1 = var_108; [L354] SORT_26 var_109 = var_109_arg_0 * var_109_arg_1; [L355] var_109 = var_109 & mask_SORT_26 [L356] SORT_26 var_151_arg_0 = var_109; [L357] SORT_1 var_151 = var_151_arg_0 >> 17; [L358] SORT_26 var_149_arg_0 = var_109; [L359] SORT_1 var_149 = var_149_arg_0 >> 17; [L360] SORT_26 var_147_arg_0 = var_109; [L361] SORT_1 var_147 = var_147_arg_0 >> 17; [L362] SORT_26 var_145_arg_0 = var_109; [L363] SORT_1 var_145 = var_145_arg_0 >> 17; [L364] SORT_26 var_143_arg_0 = var_109; [L365] SORT_1 var_143 = var_143_arg_0 >> 17; [L366] SORT_1 var_144_arg_0 = var_143; [L367] SORT_26 var_144_arg_1 = var_109; [L368] SORT_29 var_144 = ((SORT_29)var_144_arg_0 << 18) | var_144_arg_1; [L369] var_144 = var_144 & mask_SORT_29 [L370] SORT_1 var_146_arg_0 = var_145; [L371] SORT_29 var_146_arg_1 = var_144; [L372] SORT_32 var_146 = ((SORT_32)var_146_arg_0 << 19) | var_146_arg_1; [L373] var_146 = var_146 & mask_SORT_32 [L374] SORT_1 var_148_arg_0 = var_147; [L375] SORT_32 var_148_arg_1 = var_146; [L376] SORT_35 var_148 = ((SORT_35)var_148_arg_0 << 20) | var_148_arg_1; [L377] var_148 = var_148 & mask_SORT_35 [L378] SORT_1 var_150_arg_0 = var_149; [L379] SORT_35 var_150_arg_1 = var_148; [L380] SORT_38 var_150 = ((SORT_38)var_150_arg_0 << 21) | var_150_arg_1; [L381] var_150 = var_150 & mask_SORT_38 [L382] SORT_1 var_152_arg_0 = var_151; [L383] SORT_38 var_152_arg_1 = var_150; [L384] SORT_41 var_152 = ((SORT_41)var_152_arg_0 << 22) | var_152_arg_1; [L385] SORT_41 var_153_arg_0 = var_115; [L386] SORT_41 var_153_arg_1 = var_152; [L387] SORT_41 var_153 = var_153_arg_0 + var_153_arg_1; [L388] SORT_154 var_156_arg_0 = var_155; [L389] var_156_arg_0 = var_156_arg_0 & mask_SORT_154 [L390] SORT_41 var_156 = var_156_arg_0; [L391] SORT_41 var_157_arg_0 = var_153; [L392] SORT_41 var_157_arg_1 = var_156; [L393] SORT_41 var_157 = var_157_arg_0 + var_157_arg_1; [L394] SORT_41 var_158_arg_0 = var_157; [L395] SORT_11 var_158 = var_158_arg_0 >> 7; [L396] SORT_1 var_159_arg_0 = input_4; [L397] SORT_11 var_159_arg_1 = var_119; [L398] SORT_11 var_159_arg_2 = var_158; [L399] SORT_11 var_159 = var_159_arg_0 ? var_159_arg_1 : var_159_arg_2; [L400] SORT_11 next_160_arg_1 = var_159; [L401] SORT_1 var_161_arg_0 = var_8; [L402] var_161_arg_0 = var_161_arg_0 & mask_SORT_1 [L403] SORT_11 var_161 = var_161_arg_0; [L404] SORT_11 var_162_arg_0 = state_76; [L405] SORT_11 var_162_arg_1 = var_161; [L406] SORT_11 var_162 = var_162_arg_0 + var_162_arg_1; [L407] var_162 = var_162 & mask_SORT_11 [L408] SORT_11 next_163_arg_1 = var_162; [L409] SORT_72 var_167_arg_0 = var_166; [L410] SORT_1 var_167_arg_1 = input_3; [L411] SORT_96 var_167 = ((SORT_96)var_167_arg_0 << 1) | var_167_arg_1; [L412] SORT_1 var_164_arg_0 = input_3; [L413] var_164_arg_0 = var_164_arg_0 & mask_SORT_1 [L414] SORT_96 var_164 = var_164_arg_0; [L415] SORT_96 var_165_arg_0 = state_97; [L416] SORT_96 var_165_arg_1 = var_164; [L417] SORT_96 var_165 = var_165_arg_0 + var_165_arg_1; [L418] SORT_1 var_168_arg_0 = var_139; [L419] SORT_96 var_168_arg_1 = var_167; [L420] SORT_96 var_168_arg_2 = var_165; [L421] SORT_96 var_168 = var_168_arg_0 ? var_168_arg_1 : var_168_arg_2; [L422] SORT_1 var_170_arg_0 = input_4; [L423] SORT_96 var_170_arg_1 = var_169; [L424] SORT_96 var_170_arg_2 = var_168; [L425] SORT_96 var_170 = var_170_arg_0 ? var_170_arg_1 : var_170_arg_2; [L426] var_170 = var_170 & mask_SORT_96 [L427] SORT_96 next_171_arg_1 = var_170; [L428] SORT_1 var_172_arg_0 = var_8; [L429] var_172_arg_0 = var_172_arg_0 & mask_SORT_1 [L430] SORT_96 var_172 = var_172_arg_0; [L431] SORT_96 var_173_arg_0 = state_100; [L432] SORT_96 var_173_arg_1 = var_172; [L433] SORT_96 var_173 = var_173_arg_0 + var_173_arg_1; [L434] SORT_1 var_174_arg_0 = var_139; [L435] SORT_96 var_174_arg_1 = var_169; [L436] SORT_96 var_174_arg_2 = var_173; [L437] SORT_96 var_174 = var_174_arg_0 ? var_174_arg_1 : var_174_arg_2; [L438] SORT_1 var_175_arg_0 = input_4; [L439] SORT_96 var_175_arg_1 = var_169; [L440] SORT_96 var_175_arg_2 = var_174; [L441] SORT_96 var_175 = var_175_arg_0 ? var_175_arg_1 : var_175_arg_2; [L442] var_175 = var_175 & mask_SORT_96 [L443] SORT_96 next_176_arg_1 = var_175; [L445] state_5 = next_142_arg_1 [L446] state_17 = next_160_arg_1 [L447] state_76 = next_163_arg_1 [L448] state_97 = next_171_arg_1 [L449] state_100 = next_176_arg_1 [L131] input_2 = __VERIFIER_nondet_uchar() [L132] input_3 = __VERIFIER_nondet_uchar() [L133] input_3 = input_3 & mask_SORT_1 [L134] input_4 = __VERIFIER_nondet_uchar() [L135] input_4 = input_4 & mask_SORT_1 [L137] SORT_1 var_84_arg_0 = state_5; [L138] SORT_1 var_84 = ~var_84_arg_0; [L139] SORT_1 var_85_arg_0 = var_84; [L140] SORT_1 var_85 = ~var_85_arg_0; [L141] SORT_1 var_86_arg_0 = state_5; [L142] SORT_1 var_86_arg_1 = var_85; [L143] SORT_1 var_86 = var_86_arg_0 | var_86_arg_1; [L144] var_86 = var_86 & mask_SORT_1 [L145] SORT_1 constr_87_arg_0 = var_86; [L146] CALL assume_abort_if_not(constr_87_arg_0) [L21] COND FALSE !(!cond) [L146] RET assume_abort_if_not(constr_87_arg_0) [L147] SORT_1 var_88_arg_0 = var_8; [L148] var_88_arg_0 = var_88_arg_0 & mask_SORT_1 [L149] SORT_11 var_88 = var_88_arg_0; [L150] SORT_11 var_89_arg_0 = state_76; [L151] SORT_11 var_89_arg_1 = var_88; [L152] SORT_1 var_89 = var_89_arg_0 <= var_89_arg_1; [L153] SORT_1 var_90_arg_0 = input_4; [L154] SORT_1 var_90_arg_1 = var_89; [L155] SORT_1 var_90 = var_90_arg_0 ^ var_90_arg_1; [L156] SORT_1 var_91_arg_0 = var_90; [L157] SORT_1 var_91 = ~var_91_arg_0; [L158] SORT_1 var_92_arg_0 = var_90; [L159] SORT_1 var_92 = ~var_92_arg_0; [L160] SORT_1 var_93_arg_0 = var_91; [L161] SORT_1 var_93_arg_1 = var_92; [L162] SORT_1 var_93 = var_93_arg_0 | var_93_arg_1; [L163] var_93 = var_93 & mask_SORT_1 [L164] SORT_1 constr_94_arg_0 = var_93; [L165] CALL assume_abort_if_not(constr_94_arg_0) [L21] COND FALSE !(!cond) [L165] RET assume_abort_if_not(constr_94_arg_0) [L167] SORT_72 var_74_arg_0 = var_73; [L168] var_74_arg_0 = var_74_arg_0 & mask_SORT_72 [L169] SORT_11 var_74 = var_74_arg_0; [L170] SORT_11 var_78_arg_0 = var_74; [L171] SORT_11 var_78_arg_1 = state_76; [L172] SORT_1 var_78 = var_78_arg_0 < var_78_arg_1; [L173] SORT_1 var_15_arg_0 = input_3; [L174] SORT_12 var_15_arg_1 = var_14; [L175] SORT_12 var_15_arg_2 = var_13; [L176] SORT_12 var_15 = var_15_arg_0 ? var_15_arg_1 : var_15_arg_2; [L177] var_15 = var_15 & mask_SORT_12 [L178] SORT_12 var_16_arg_0 = var_13; [L179] SORT_12 var_16_arg_1 = var_15; [L180] SORT_11 var_16 = ((SORT_11)var_16_arg_0 << 8) | var_16_arg_1; [L181] SORT_11 var_18_arg_0 = var_16; [L182] SORT_11 var_18_arg_1 = state_17; [L183] SORT_11 var_18 = var_18_arg_0 - var_18_arg_1; [L184] var_18 = var_18 & mask_SORT_11 [L185] SORT_11 var_19_arg_0 = var_18; [L186] SORT_1 var_19 = var_19_arg_0 >> 15; [L187] SORT_1 var_21_arg_0 = var_19; [L188] SORT_9 var_21_arg_1 = var_10; [L189] SORT_20 var_21 = ((SORT_20)var_21_arg_0 << 31) | var_21_arg_1; [L190] var_21 = var_21 & mask_SORT_20 [L191] SORT_11 var_64_arg_0 = var_18; [L192] SORT_1 var_64 = var_64_arg_0 >> 15; [L193] SORT_11 var_61_arg_0 = var_18; [L194] SORT_1 var_61 = var_61_arg_0 >> 15; [L195] SORT_11 var_58_arg_0 = var_18; [L196] SORT_1 var_58 = var_58_arg_0 >> 15; [L197] SORT_11 var_55_arg_0 = var_18; [L198] SORT_1 var_55 = var_55_arg_0 >> 15; [L199] SORT_11 var_52_arg_0 = var_18; [L200] SORT_1 var_52 = var_52_arg_0 >> 15; [L201] SORT_11 var_49_arg_0 = var_18; [L202] SORT_1 var_49 = var_49_arg_0 >> 15; [L203] SORT_11 var_46_arg_0 = var_18; [L204] SORT_1 var_46 = var_46_arg_0 >> 15; [L205] SORT_11 var_43_arg_0 = var_18; [L206] SORT_1 var_43 = var_43_arg_0 >> 15; [L207] SORT_11 var_40_arg_0 = var_18; [L208] SORT_1 var_40 = var_40_arg_0 >> 15; [L209] SORT_11 var_37_arg_0 = var_18; [L210] SORT_1 var_37 = var_37_arg_0 >> 15; [L211] SORT_11 var_34_arg_0 = var_18; [L212] SORT_1 var_34 = var_34_arg_0 >> 15; [L213] SORT_11 var_31_arg_0 = var_18; [L214] SORT_1 var_31 = var_31_arg_0 >> 15; [L215] SORT_11 var_28_arg_0 = var_18; [L216] SORT_1 var_28 = var_28_arg_0 >> 15; [L217] SORT_11 var_25_arg_0 = var_18; [L218] SORT_1 var_25 = var_25_arg_0 >> 15; [L219] SORT_11 var_22_arg_0 = var_18; [L220] SORT_1 var_22 = var_22_arg_0 >> 15; [L221] SORT_1 var_24_arg_0 = var_22; [L222] SORT_11 var_24_arg_1 = var_18; [L223] SORT_23 var_24 = ((SORT_23)var_24_arg_0 << 16) | var_24_arg_1; [L224] var_24 = var_24 & mask_SORT_23 [L225] SORT_1 var_27_arg_0 = var_25; [L226] SORT_23 var_27_arg_1 = var_24; [L227] SORT_26 var_27 = ((SORT_26)var_27_arg_0 << 17) | var_27_arg_1; [L228] var_27 = var_27 & mask_SORT_26 [L229] SORT_1 var_30_arg_0 = var_28; [L230] SORT_26 var_30_arg_1 = var_27; [L231] SORT_29 var_30 = ((SORT_29)var_30_arg_0 << 18) | var_30_arg_1; [L232] var_30 = var_30 & mask_SORT_29 [L233] SORT_1 var_33_arg_0 = var_31; [L234] SORT_29 var_33_arg_1 = var_30; [L235] SORT_32 var_33 = ((SORT_32)var_33_arg_0 << 19) | var_33_arg_1; [L236] var_33 = var_33 & mask_SORT_32 [L237] SORT_1 var_36_arg_0 = var_34; [L238] SORT_32 var_36_arg_1 = var_33; [L239] SORT_35 var_36 = ((SORT_35)var_36_arg_0 << 20) | var_36_arg_1; [L240] var_36 = var_36 & mask_SORT_35 [L241] SORT_1 var_39_arg_0 = var_37; [L242] SORT_35 var_39_arg_1 = var_36; [L243] SORT_38 var_39 = ((SORT_38)var_39_arg_0 << 21) | var_39_arg_1; [L244] var_39 = var_39 & mask_SORT_38 [L245] SORT_1 var_42_arg_0 = var_40; [L246] SORT_38 var_42_arg_1 = var_39; [L247] SORT_41 var_42 = ((SORT_41)var_42_arg_0 << 22) | var_42_arg_1; [L248] var_42 = var_42 & mask_SORT_41 [L249] SORT_1 var_45_arg_0 = var_43; [L250] SORT_41 var_45_arg_1 = var_42; [L251] SORT_44 var_45 = ((SORT_44)var_45_arg_0 << 23) | var_45_arg_1; [L252] var_45 = var_45 & mask_SORT_44 [L253] SORT_1 var_48_arg_0 = var_46; [L254] SORT_44 var_48_arg_1 = var_45; [L255] SORT_47 var_48 = ((SORT_47)var_48_arg_0 << 24) | var_48_arg_1; [L256] var_48 = var_48 & mask_SORT_47 [L257] SORT_1 var_51_arg_0 = var_49; [L258] SORT_47 var_51_arg_1 = var_48; [L259] SORT_50 var_51 = ((SORT_50)var_51_arg_0 << 25) | var_51_arg_1; [L260] var_51 = var_51 & mask_SORT_50 [L261] SORT_1 var_54_arg_0 = var_52; [L262] SORT_50 var_54_arg_1 = var_51; [L263] SORT_53 var_54 = ((SORT_53)var_54_arg_0 << 26) | var_54_arg_1; [L264] var_54 = var_54 & mask_SORT_53 [L265] SORT_1 var_57_arg_0 = var_55; [L266] SORT_53 var_57_arg_1 = var_54; [L267] SORT_56 var_57 = ((SORT_56)var_57_arg_0 << 27) | var_57_arg_1; [L268] var_57 = var_57 & mask_SORT_56 [L269] SORT_1 var_60_arg_0 = var_58; [L270] SORT_56 var_60_arg_1 = var_57; [L271] SORT_59 var_60 = ((SORT_59)var_60_arg_0 << 28) | var_60_arg_1; [L272] var_60 = var_60 & mask_SORT_59 [L273] SORT_1 var_63_arg_0 = var_61; [L274] SORT_59 var_63_arg_1 = var_60; [L275] SORT_62 var_63 = ((SORT_62)var_63_arg_0 << 29) | var_63_arg_1; [L276] var_63 = var_63 & mask_SORT_62 [L277] SORT_1 var_65_arg_0 = var_64; [L278] SORT_62 var_65_arg_1 = var_63; [L279] SORT_9 var_65 = ((SORT_9)var_65_arg_0 << 30) | var_65_arg_1; [L280] SORT_9 var_66_arg_0 = var_65; [L281] var_66_arg_0 = var_66_arg_0 & mask_SORT_9 [L282] SORT_20 var_66 = var_66_arg_0; [L283] SORT_20 var_67_arg_0 = var_21; [L284] SORT_20 var_67_arg_1 = var_66; [L285] SORT_1 var_67 = var_67_arg_0 <= var_67_arg_1; [L286] SORT_1 var_68_arg_0 = var_67; [L287] SORT_1 var_68_arg_1 = var_8; [L288] SORT_1 var_68_arg_2 = var_7; [L289] SORT_1 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L290] SORT_1 var_69_arg_0 = input_3; [L291] SORT_1 var_69_arg_1 = var_68; [L292] SORT_1 var_69 = var_69_arg_0 ^ var_69_arg_1; [L293] SORT_1 var_70_arg_0 = var_69; [L294] SORT_1 var_70 = ~var_70_arg_0; [L295] SORT_1 var_79_arg_0 = var_78; [L296] SORT_1 var_79_arg_1 = var_70; [L297] SORT_1 var_79_arg_2 = var_8; [L298] SORT_1 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L299] SORT_1 var_80_arg_0 = var_79; [L300] SORT_1 var_80 = ~var_80_arg_0; [L301] SORT_1 var_81_arg_0 = var_79; [L302] SORT_1 var_81 = ~var_81_arg_0; [L303] SORT_1 var_82_arg_0 = var_80; [L304] SORT_1 var_82_arg_1 = var_81; [L305] SORT_1 var_82 = var_82_arg_0 & var_82_arg_1; [L306] var_82 = var_82 & mask_SORT_1 [L307] SORT_1 bad_83_arg_0 = var_82; [L308] CALL __VERIFIER_assert(!(bad_83_arg_0)) [L20] COND TRUE !(cond) [L20] reach_error() - StatisticsResult: Ultimate Automizer benchmark data CFG has 2 procedures, 19 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 151.7s, OverallIterations: 8, TraceHistogramMax: 14, PathProgramHistogramMax: 6, EmptinessCheckTime: 0.0s, AutomataDifference: 5.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 117 SdHoareTripleChecker+Valid, 4.1s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 105 mSDsluCounter, 684 SdHoareTripleChecker+Invalid, 3.8s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 513 mSDsCounter, 44 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 722 IncrementalHoareTripleChecker+Invalid, 766 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 44 mSolverCounterUnsat, 171 mSDtfsCounter, 722 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 1028 GetRequests, 951 SyntacticMatches, 10 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 116 ImplicationChecksByTransitivity, 2.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=56occurred in iteration=7, InterpolantAutomatonStates: 47, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 7 MinimizatonAttempts, 36 StatesRemovedByMinimization, 6 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 1.8s SsaConstructionTime, 15.8s SatisfiabilityAnalysisTime, 122.4s InterpolantComputationTime, 1071 NumberOfCodeBlocks, 1047 NumberOfCodeBlocksAsserted, 65 NumberOfCheckSat, 947 ConstructedInterpolants, 35 QuantifiedInterpolants, 17399 SizeOfPredicates, 693 NumberOfNonLiveVariables, 18850 ConjunctsInSsa, 1122 ConjunctsInUnsatCore, 17 InterpolantComputations, 2 PerfectInterpolantSequences, 1928/2618 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Result: UNKNOWN