./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/reducercommutativity/rangesum.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 2329fc70 Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/config/TaipanReach.xml -i ../../sv-benchmarks/c/reducercommutativity/rangesum.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 4dc91bf2fc8981aab63c1ee768384f1c8f580edfe4618d65089a78f799b6ddb8 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-2329fc7 [2022-12-14 06:32:18,644 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-12-14 06:32:18,646 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-12-14 06:32:18,663 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-12-14 06:32:18,663 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-12-14 06:32:18,664 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-12-14 06:32:18,665 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-12-14 06:32:18,667 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-12-14 06:32:18,668 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-12-14 06:32:18,669 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-12-14 06:32:18,670 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-12-14 06:32:18,671 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-12-14 06:32:18,671 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-12-14 06:32:18,672 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-12-14 06:32:18,673 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-12-14 06:32:18,674 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-12-14 06:32:18,675 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-12-14 06:32:18,676 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-12-14 06:32:18,677 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-12-14 06:32:18,679 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-12-14 06:32:18,680 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-12-14 06:32:18,681 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-12-14 06:32:18,682 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-12-14 06:32:18,683 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-12-14 06:32:18,686 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-12-14 06:32:18,686 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-12-14 06:32:18,686 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-12-14 06:32:18,687 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-12-14 06:32:18,688 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-12-14 06:32:18,689 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-12-14 06:32:18,689 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-12-14 06:32:18,689 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-12-14 06:32:18,690 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-12-14 06:32:18,691 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-12-14 06:32:18,691 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-12-14 06:32:18,692 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-12-14 06:32:18,692 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-12-14 06:32:18,692 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-12-14 06:32:18,693 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-12-14 06:32:18,693 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-12-14 06:32:18,694 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-12-14 06:32:18,695 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/config/svcomp-Reach-32bit-Taipan_Default.epf [2022-12-14 06:32:18,714 INFO L113 SettingsManager]: Loading preferences was successful [2022-12-14 06:32:18,714 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-12-14 06:32:18,714 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-12-14 06:32:18,714 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-12-14 06:32:18,715 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-12-14 06:32:18,719 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-12-14 06:32:18,719 INFO L138 SettingsManager]: * User list type=DISABLED [2022-12-14 06:32:18,719 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-12-14 06:32:18,720 INFO L138 SettingsManager]: * Explicit value domain=true [2022-12-14 06:32:18,720 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2022-12-14 06:32:18,720 INFO L138 SettingsManager]: * Octagon Domain=false [2022-12-14 06:32:18,720 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-12-14 06:32:18,720 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2022-12-14 06:32:18,720 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2022-12-14 06:32:18,720 INFO L138 SettingsManager]: * Interval Domain=false [2022-12-14 06:32:18,721 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2022-12-14 06:32:18,721 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2022-12-14 06:32:18,721 INFO L138 SettingsManager]: * Simplification Technique=POLY_PAC [2022-12-14 06:32:18,722 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-12-14 06:32:18,722 INFO L138 SettingsManager]: * sizeof long=4 [2022-12-14 06:32:18,722 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-12-14 06:32:18,722 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-12-14 06:32:18,722 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-12-14 06:32:18,722 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-12-14 06:32:18,722 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-12-14 06:32:18,723 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-12-14 06:32:18,723 INFO L138 SettingsManager]: * sizeof long double=12 [2022-12-14 06:32:18,723 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-12-14 06:32:18,723 INFO L138 SettingsManager]: * Use constant arrays=true [2022-12-14 06:32:18,723 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-12-14 06:32:18,723 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-12-14 06:32:18,724 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-12-14 06:32:18,724 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-12-14 06:32:18,724 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-12-14 06:32:18,724 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2022-12-14 06:32:18,724 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-12-14 06:32:18,724 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-12-14 06:32:18,724 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2022-12-14 06:32:18,725 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-12-14 06:32:18,725 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-12-14 06:32:18,725 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-12-14 06:32:18,725 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 4dc91bf2fc8981aab63c1ee768384f1c8f580edfe4618d65089a78f799b6ddb8 [2022-12-14 06:32:18,913 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-12-14 06:32:18,933 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-12-14 06:32:18,935 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-12-14 06:32:18,937 INFO L271 PluginConnector]: Initializing CDTParser... [2022-12-14 06:32:18,937 INFO L275 PluginConnector]: CDTParser initialized [2022-12-14 06:32:18,938 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/../../sv-benchmarks/c/reducercommutativity/rangesum.i [2022-12-14 06:32:21,494 INFO L500 CDTParser]: Created temporary CDT project at NULL [2022-12-14 06:32:21,651 INFO L351 CDTParser]: Found 1 translation units. [2022-12-14 06:32:21,652 INFO L172 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/sv-benchmarks/c/reducercommutativity/rangesum.i [2022-12-14 06:32:21,656 INFO L394 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/data/b13e05686/bd6f5a9fe46543cfbb523de9419ef7c7/FLAG4f58b2557 [2022-12-14 06:32:22,052 INFO L402 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/data/b13e05686/bd6f5a9fe46543cfbb523de9419ef7c7 [2022-12-14 06:32:22,055 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-12-14 06:32:22,056 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-12-14 06:32:22,057 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-12-14 06:32:22,057 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-12-14 06:32:22,060 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-12-14 06:32:22,060 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.12 06:32:22" (1/1) ... [2022-12-14 06:32:22,061 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7950de2d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 06:32:22, skipping insertion in model container [2022-12-14 06:32:22,061 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.12 06:32:22" (1/1) ... [2022-12-14 06:32:22,066 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-12-14 06:32:22,077 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-12-14 06:32:22,183 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/sv-benchmarks/c/reducercommutativity/rangesum.i[1544,1557] [2022-12-14 06:32:22,186 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-12-14 06:32:22,192 INFO L203 MainTranslator]: Completed pre-run [2022-12-14 06:32:22,207 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/sv-benchmarks/c/reducercommutativity/rangesum.i[1544,1557] [2022-12-14 06:32:22,207 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-12-14 06:32:22,217 INFO L208 MainTranslator]: Completed translation [2022-12-14 06:32:22,218 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 06:32:22 WrapperNode [2022-12-14 06:32:22,218 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-12-14 06:32:22,219 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-12-14 06:32:22,219 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-12-14 06:32:22,219 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-12-14 06:32:22,224 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 06:32:22" (1/1) ... [2022-12-14 06:32:22,229 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 06:32:22" (1/1) ... [2022-12-14 06:32:22,242 INFO L138 Inliner]: procedures = 17, calls = 22, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 73 [2022-12-14 06:32:22,242 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-12-14 06:32:22,243 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-12-14 06:32:22,243 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-12-14 06:32:22,243 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-12-14 06:32:22,250 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 06:32:22" (1/1) ... [2022-12-14 06:32:22,251 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 06:32:22" (1/1) ... [2022-12-14 06:32:22,252 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 06:32:22" (1/1) ... [2022-12-14 06:32:22,253 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 06:32:22" (1/1) ... [2022-12-14 06:32:22,258 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 06:32:22" (1/1) ... [2022-12-14 06:32:22,262 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 06:32:22" (1/1) ... [2022-12-14 06:32:22,263 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 06:32:22" (1/1) ... [2022-12-14 06:32:22,264 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 06:32:22" (1/1) ... [2022-12-14 06:32:22,265 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-12-14 06:32:22,266 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-12-14 06:32:22,266 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-12-14 06:32:22,266 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-12-14 06:32:22,267 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 06:32:22" (1/1) ... [2022-12-14 06:32:22,273 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-12-14 06:32:22,280 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 [2022-12-14 06:32:22,289 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-12-14 06:32:22,291 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-12-14 06:32:22,322 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-12-14 06:32:22,322 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-12-14 06:32:22,322 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-12-14 06:32:22,322 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-12-14 06:32:22,322 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-12-14 06:32:22,323 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-12-14 06:32:22,323 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-12-14 06:32:22,323 INFO L130 BoogieDeclarations]: Found specification of procedure rangesum [2022-12-14 06:32:22,323 INFO L138 BoogieDeclarations]: Found implementation of procedure rangesum [2022-12-14 06:32:22,323 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-12-14 06:32:22,384 INFO L235 CfgBuilder]: Building ICFG [2022-12-14 06:32:22,386 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-12-14 06:32:22,511 INFO L276 CfgBuilder]: Performing block encoding [2022-12-14 06:32:22,571 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-12-14 06:32:22,571 INFO L300 CfgBuilder]: Removed 3 assume(true) statements. [2022-12-14 06:32:22,573 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.12 06:32:22 BoogieIcfgContainer [2022-12-14 06:32:22,573 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-12-14 06:32:22,575 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-12-14 06:32:22,576 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-12-14 06:32:22,579 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-12-14 06:32:22,579 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 14.12 06:32:22" (1/3) ... [2022-12-14 06:32:22,580 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@533a06bf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.12 06:32:22, skipping insertion in model container [2022-12-14 06:32:22,580 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 06:32:22" (2/3) ... [2022-12-14 06:32:22,580 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@533a06bf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.12 06:32:22, skipping insertion in model container [2022-12-14 06:32:22,580 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.12 06:32:22" (3/3) ... [2022-12-14 06:32:22,582 INFO L112 eAbstractionObserver]: Analyzing ICFG rangesum.i [2022-12-14 06:32:22,598 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-12-14 06:32:22,598 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-12-14 06:32:22,654 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-12-14 06:32:22,661 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@3de01a4a, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-12-14 06:32:22,661 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-12-14 06:32:22,665 INFO L276 IsEmpty]: Start isEmpty. Operand has 19 states, 13 states have (on average 1.4615384615384615) internal successors, (19), 14 states have internal predecessors, (19), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-12-14 06:32:22,670 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-12-14 06:32:22,671 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 06:32:22,671 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 06:32:22,672 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-12-14 06:32:22,677 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 06:32:22,677 INFO L85 PathProgramCache]: Analyzing trace with hash 890449984, now seen corresponding path program 1 times [2022-12-14 06:32:22,687 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 06:32:22,687 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2137377106] [2022-12-14 06:32:22,688 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 06:32:22,688 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 06:32:22,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 06:32:22,810 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 06:32:22,810 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2137377106] [2022-12-14 06:32:22,810 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unsupported non-linear arithmetic [2022-12-14 06:32:22,810 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [714438158] [2022-12-14 06:32:22,811 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 06:32:22,811 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 06:32:22,811 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 [2022-12-14 06:32:22,812 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-14 06:32:22,813 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-12-14 06:32:22,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 06:32:22,896 INFO L263 TraceCheckSpWp]: Trace formula consists of 138 conjuncts, 3 conjunts are in the unsatisfiable core [2022-12-14 06:32:22,901 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-14 06:32:22,968 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-12-14 06:32:22,968 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-12-14 06:32:22,968 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [714438158] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-14 06:32:22,969 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-14 06:32:22,969 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-12-14 06:32:22,971 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2099712748] [2022-12-14 06:32:22,972 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-14 06:32:22,976 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-12-14 06:32:22,976 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 06:32:23,002 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-12-14 06:32:23,002 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-12-14 06:32:23,004 INFO L87 Difference]: Start difference. First operand has 19 states, 13 states have (on average 1.4615384615384615) internal successors, (19), 14 states have internal predecessors, (19), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 3 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-12-14 06:32:23,045 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 06:32:23,046 INFO L93 Difference]: Finished difference Result 36 states and 47 transitions. [2022-12-14 06:32:23,047 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-12-14 06:32:23,048 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 3 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 21 [2022-12-14 06:32:23,049 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 06:32:23,055 INFO L225 Difference]: With dead ends: 36 [2022-12-14 06:32:23,055 INFO L226 Difference]: Without dead ends: 17 [2022-12-14 06:32:23,058 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 19 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-12-14 06:32:23,061 INFO L413 NwaCegarLoop]: 16 mSDtfsCounter, 0 mSDsluCounter, 14 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 30 SdHoareTripleChecker+Invalid, 17 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-12-14 06:32:23,062 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 30 Invalid, 17 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 17 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-12-14 06:32:23,078 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states. [2022-12-14 06:32:23,091 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 17. [2022-12-14 06:32:23,092 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 12 states have (on average 1.25) internal successors, (15), 12 states have internal predecessors, (15), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-12-14 06:32:23,093 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 21 transitions. [2022-12-14 06:32:23,094 INFO L78 Accepts]: Start accepts. Automaton has 17 states and 21 transitions. Word has length 21 [2022-12-14 06:32:23,095 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 06:32:23,095 INFO L495 AbstractCegarLoop]: Abstraction has 17 states and 21 transitions. [2022-12-14 06:32:23,095 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 3 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-12-14 06:32:23,095 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 21 transitions. [2022-12-14 06:32:23,096 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-12-14 06:32:23,096 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 06:32:23,097 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 06:32:23,102 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-12-14 06:32:23,297 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 06:32:23,299 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-12-14 06:32:23,301 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 06:32:23,301 INFO L85 PathProgramCache]: Analyzing trace with hash -857535421, now seen corresponding path program 1 times [2022-12-14 06:32:23,302 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 06:32:23,302 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [882278193] [2022-12-14 06:32:23,302 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 06:32:23,303 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 06:32:23,373 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-12-14 06:32:23,373 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [733960492] [2022-12-14 06:32:23,374 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 06:32:23,374 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 06:32:23,375 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 [2022-12-14 06:32:23,378 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-14 06:32:23,381 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-12-14 06:32:23,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 06:32:23,526 INFO L263 TraceCheckSpWp]: Trace formula consists of 147 conjuncts, 4 conjunts are in the unsatisfiable core [2022-12-14 06:32:23,527 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-14 06:32:23,551 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-12-14 06:32:23,551 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-14 06:32:23,582 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-12-14 06:32:23,582 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 06:32:23,582 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [882278193] [2022-12-14 06:32:23,582 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-12-14 06:32:23,582 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [733960492] [2022-12-14 06:32:23,583 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [733960492] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-14 06:32:23,583 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1965304770] [2022-12-14 06:32:23,597 INFO L159 IcfgInterpreter]: Started Sifa with 16 locations of interest [2022-12-14 06:32:23,598 INFO L166 IcfgInterpreter]: Building call graph [2022-12-14 06:32:23,600 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2022-12-14 06:32:23,604 INFO L176 IcfgInterpreter]: Starting interpretation [2022-12-14 06:32:23,605 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2022-12-14 06:32:23,676 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 06:32:23,696 INFO L321 Elim1Store]: treesize reduction 15, result has 37.5 percent of original size [2022-12-14 06:32:23,697 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 30 [2022-12-14 06:32:23,712 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 06:32:23,728 INFO L321 Elim1Store]: treesize reduction 18, result has 35.7 percent of original size [2022-12-14 06:32:23,729 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 5 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 2 case distinctions, treesize of input 27 treesize of output 37 [2022-12-14 06:32:23,765 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 06:32:23,767 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 33 [2022-12-14 06:32:23,854 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 06:32:23,857 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 06:32:23,873 INFO L321 Elim1Store]: treesize reduction 49, result has 12.5 percent of original size [2022-12-14 06:32:23,874 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 234 treesize of output 222 [2022-12-14 06:32:23,952 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 12 [2022-12-14 06:32:24,049 INFO L197 IcfgInterpreter]: Interpreting procedure rangesum with input of size 27 for LOIs [2022-12-14 06:32:24,058 INFO L180 IcfgInterpreter]: Interpretation finished [2022-12-14 06:32:24,324 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSifa [1965304770] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-14 06:32:24,325 INFO L184 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2022-12-14 06:32:24,325 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [4, 4] total 11 [2022-12-14 06:32:24,325 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1932598931] [2022-12-14 06:32:24,325 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-14 06:32:24,326 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-12-14 06:32:24,326 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 06:32:24,327 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-12-14 06:32:24,327 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=84, Unknown=0, NotChecked=0, Total=110 [2022-12-14 06:32:24,327 INFO L87 Difference]: Start difference. First operand 17 states and 21 transitions. Second operand has 7 states, 6 states have (on average 2.0) internal successors, (12), 5 states have internal predecessors, (12), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) [2022-12-14 06:32:24,494 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 06:32:24,494 INFO L93 Difference]: Finished difference Result 30 states and 40 transitions. [2022-12-14 06:32:24,495 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-12-14 06:32:24,495 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 2.0) internal successors, (12), 5 states have internal predecessors, (12), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) Word has length 22 [2022-12-14 06:32:24,495 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 06:32:24,495 INFO L225 Difference]: With dead ends: 30 [2022-12-14 06:32:24,496 INFO L226 Difference]: Without dead ends: 18 [2022-12-14 06:32:24,496 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 52 SyntacticMatches, 3 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=30, Invalid=102, Unknown=0, NotChecked=0, Total=132 [2022-12-14 06:32:24,497 INFO L413 NwaCegarLoop]: 6 mSDtfsCounter, 10 mSDsluCounter, 6 mSDsCounter, 0 mSdLazyCounter, 61 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 13 SdHoareTripleChecker+Valid, 12 SdHoareTripleChecker+Invalid, 64 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 61 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-12-14 06:32:24,497 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [13 Valid, 12 Invalid, 64 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 61 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-12-14 06:32:24,497 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states. [2022-12-14 06:32:24,501 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 18. [2022-12-14 06:32:24,501 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 13 states have (on average 1.2307692307692308) internal successors, (16), 13 states have internal predecessors, (16), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-12-14 06:32:24,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 22 transitions. [2022-12-14 06:32:24,502 INFO L78 Accepts]: Start accepts. Automaton has 18 states and 22 transitions. Word has length 22 [2022-12-14 06:32:24,502 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 06:32:24,502 INFO L495 AbstractCegarLoop]: Abstraction has 18 states and 22 transitions. [2022-12-14 06:32:24,502 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 6 states have (on average 2.0) internal successors, (12), 5 states have internal predecessors, (12), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) [2022-12-14 06:32:24,502 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 22 transitions. [2022-12-14 06:32:24,502 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-12-14 06:32:24,502 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 06:32:24,503 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 06:32:24,508 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2022-12-14 06:32:24,703 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 06:32:24,704 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-12-14 06:32:24,704 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 06:32:24,705 INFO L85 PathProgramCache]: Analyzing trace with hash -235427948, now seen corresponding path program 1 times [2022-12-14 06:32:24,705 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 06:32:24,705 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2017968326] [2022-12-14 06:32:24,705 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 06:32:24,705 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 06:32:24,748 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-12-14 06:32:24,749 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1745466779] [2022-12-14 06:32:24,749 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 06:32:24,749 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 06:32:24,750 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 [2022-12-14 06:32:24,752 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-14 06:32:24,755 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-12-14 06:32:24,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 06:32:24,892 INFO L263 TraceCheckSpWp]: Trace formula consists of 159 conjuncts, 4 conjunts are in the unsatisfiable core [2022-12-14 06:32:24,894 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-14 06:32:24,913 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2022-12-14 06:32:24,913 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-14 06:32:24,933 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2022-12-14 06:32:24,933 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 06:32:24,933 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2017968326] [2022-12-14 06:32:24,933 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-12-14 06:32:24,934 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1745466779] [2022-12-14 06:32:24,934 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1745466779] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-14 06:32:24,934 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1352619066] [2022-12-14 06:32:24,938 INFO L159 IcfgInterpreter]: Started Sifa with 16 locations of interest [2022-12-14 06:32:24,938 INFO L166 IcfgInterpreter]: Building call graph [2022-12-14 06:32:24,938 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2022-12-14 06:32:24,938 INFO L176 IcfgInterpreter]: Starting interpretation [2022-12-14 06:32:24,939 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2022-12-14 06:32:24,955 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 06:32:24,965 INFO L321 Elim1Store]: treesize reduction 15, result has 37.5 percent of original size [2022-12-14 06:32:24,965 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 30 [2022-12-14 06:32:24,974 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 06:32:24,987 INFO L321 Elim1Store]: treesize reduction 18, result has 35.7 percent of original size [2022-12-14 06:32:24,987 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 5 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 2 case distinctions, treesize of input 27 treesize of output 37 [2022-12-14 06:32:25,010 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 06:32:25,011 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 33 [2022-12-14 06:32:25,072 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 06:32:25,074 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 06:32:25,086 INFO L321 Elim1Store]: treesize reduction 49, result has 12.5 percent of original size [2022-12-14 06:32:25,086 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 234 treesize of output 222 [2022-12-14 06:32:25,147 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 12 [2022-12-14 06:32:25,298 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 06:32:25,299 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 20 [2022-12-14 06:32:25,378 INFO L173 IndexEqualityManager]: detected equality via solver [2022-12-14 06:32:25,379 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 16 [2022-12-14 06:32:25,502 INFO L197 IcfgInterpreter]: Interpreting procedure rangesum with input of size 17 for LOIs [2022-12-14 06:32:25,547 INFO L180 IcfgInterpreter]: Interpretation finished [2022-12-14 06:32:26,254 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '522#(and (<= 0 |ULTIMATE.start_init_nondet_#in~x#1.offset|) (<= 0 |ULTIMATE.start_init_nondet_~x#1.offset|) (<= 1 |ULTIMATE.start_init_nondet_~i~0#1|) (<= |ULTIMATE.start_main_~ret2~0#1| 2147483647) (<= |ULTIMATE.start_init_nondet_#in~x#1.offset| 0) (or (not (= |ULTIMATE.start_main_~ret2~0#1| |ULTIMATE.start_main_~ret~1#1|)) (not (= |ULTIMATE.start_main_~ret5~0#1| |ULTIMATE.start_main_~ret~1#1|))) (<= 1 ~N~0) (<= |ULTIMATE.start_init_nondet_~x#1.offset| 0) (<= 0 (+ |ULTIMATE.start_main_~ret~1#1| 2147483648)) (<= 0 |ULTIMATE.start_init_nondet_~x#1.base|) (<= 0 (+ |ULTIMATE.start_main_~ret5~0#1| 2147483648)) (<= |ULTIMATE.start_main_~ret~1#1| 2147483647) (= |ULTIMATE.start_main_~i~2#1| 0) (= |ULTIMATE.start_main_~#x~0#1.offset| 0) (<= 0 (+ |ULTIMATE.start_main_~ret2~0#1| 2147483648)) (<= 0 |ULTIMATE.start_init_nondet_#in~x#1.base|) (<= ~N~0 1) (= |#NULL.offset| 0) (<= |ULTIMATE.start_main_~ret5~0#1| 2147483647) (<= 0 |ULTIMATE.start_main_~#x~0#1.base|) (<= 0 |#StackHeapBarrier|) (= |#NULL.base| 0))' at error location [2022-12-14 06:32:26,255 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2022-12-14 06:32:26,255 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-12-14 06:32:26,255 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 6 [2022-12-14 06:32:26,255 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [434350434] [2022-12-14 06:32:26,255 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-12-14 06:32:26,255 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-12-14 06:32:26,255 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 06:32:26,256 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-12-14 06:32:26,256 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=77, Invalid=303, Unknown=0, NotChecked=0, Total=380 [2022-12-14 06:32:26,257 INFO L87 Difference]: Start difference. First operand 18 states and 22 transitions. Second operand has 6 states, 6 states have (on average 3.1666666666666665) internal successors, (19), 6 states have internal predecessors, (19), 1 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2022-12-14 06:32:26,280 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 06:32:26,280 INFO L93 Difference]: Finished difference Result 33 states and 41 transitions. [2022-12-14 06:32:26,281 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-12-14 06:32:26,281 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 3.1666666666666665) internal successors, (19), 6 states have internal predecessors, (19), 1 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) Word has length 25 [2022-12-14 06:32:26,281 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 06:32:26,281 INFO L225 Difference]: With dead ends: 33 [2022-12-14 06:32:26,282 INFO L226 Difference]: Without dead ends: 19 [2022-12-14 06:32:26,282 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 73 GetRequests, 55 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 102 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=77, Invalid=303, Unknown=0, NotChecked=0, Total=380 [2022-12-14 06:32:26,283 INFO L413 NwaCegarLoop]: 13 mSDtfsCounter, 0 mSDsluCounter, 48 mSDsCounter, 0 mSdLazyCounter, 35 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 61 SdHoareTripleChecker+Invalid, 35 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 35 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-12-14 06:32:26,284 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 61 Invalid, 35 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 35 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-12-14 06:32:26,284 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2022-12-14 06:32:26,288 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2022-12-14 06:32:26,288 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 14 states have (on average 1.2142857142857142) internal successors, (17), 14 states have internal predecessors, (17), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-12-14 06:32:26,289 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 23 transitions. [2022-12-14 06:32:26,289 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 23 transitions. Word has length 25 [2022-12-14 06:32:26,289 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 06:32:26,289 INFO L495 AbstractCegarLoop]: Abstraction has 19 states and 23 transitions. [2022-12-14 06:32:26,289 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 3.1666666666666665) internal successors, (19), 6 states have internal predecessors, (19), 1 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2022-12-14 06:32:26,290 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 23 transitions. [2022-12-14 06:32:26,290 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-12-14 06:32:26,290 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 06:32:26,290 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 06:32:26,295 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2022-12-14 06:32:26,491 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 06:32:26,493 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-12-14 06:32:26,494 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 06:32:26,495 INFO L85 PathProgramCache]: Analyzing trace with hash 648268311, now seen corresponding path program 2 times [2022-12-14 06:32:26,495 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 06:32:26,496 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [597509371] [2022-12-14 06:32:26,496 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 06:32:26,497 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 06:32:26,550 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-12-14 06:32:26,550 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1427251068] [2022-12-14 06:32:26,551 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-12-14 06:32:26,551 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 06:32:26,551 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 [2022-12-14 06:32:26,552 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-14 06:32:26,553 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-12-14 06:32:26,605 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2022-12-14 06:32:26,606 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-12-14 06:32:26,606 INFO L263 TraceCheckSpWp]: Trace formula consists of 128 conjuncts, 3 conjunts are in the unsatisfiable core [2022-12-14 06:32:26,608 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-14 06:32:26,629 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-12-14 06:32:26,629 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-12-14 06:32:26,629 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 06:32:26,630 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [597509371] [2022-12-14 06:32:26,630 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-12-14 06:32:26,630 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1427251068] [2022-12-14 06:32:26,630 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1427251068] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-14 06:32:26,630 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-14 06:32:26,630 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-12-14 06:32:26,630 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [985649634] [2022-12-14 06:32:26,630 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-14 06:32:26,631 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-12-14 06:32:26,631 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 06:32:26,631 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-12-14 06:32:26,631 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-12-14 06:32:26,632 INFO L87 Difference]: Start difference. First operand 19 states and 23 transitions. Second operand has 4 states, 4 states have (on average 4.0) internal successors, (16), 4 states have internal predecessors, (16), 2 states have call successors, (3), 2 states have call predecessors, (3), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-12-14 06:32:26,655 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 06:32:26,655 INFO L93 Difference]: Finished difference Result 29 states and 34 transitions. [2022-12-14 06:32:26,656 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-12-14 06:32:26,656 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 4.0) internal successors, (16), 4 states have internal predecessors, (16), 2 states have call successors, (3), 2 states have call predecessors, (3), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 26 [2022-12-14 06:32:26,656 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 06:32:26,656 INFO L225 Difference]: With dead ends: 29 [2022-12-14 06:32:26,657 INFO L226 Difference]: Without dead ends: 20 [2022-12-14 06:32:26,657 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-12-14 06:32:26,658 INFO L413 NwaCegarLoop]: 13 mSDtfsCounter, 8 mSDsluCounter, 5 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 8 SdHoareTripleChecker+Valid, 18 SdHoareTripleChecker+Invalid, 21 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-12-14 06:32:26,658 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [8 Valid, 18 Invalid, 21 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 21 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-12-14 06:32:26,659 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2022-12-14 06:32:26,662 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2022-12-14 06:32:26,662 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 15 states have (on average 1.2) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-12-14 06:32:26,662 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 24 transitions. [2022-12-14 06:32:26,662 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 24 transitions. Word has length 26 [2022-12-14 06:32:26,663 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 06:32:26,663 INFO L495 AbstractCegarLoop]: Abstraction has 20 states and 24 transitions. [2022-12-14 06:32:26,663 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 4.0) internal successors, (16), 4 states have internal predecessors, (16), 2 states have call successors, (3), 2 states have call predecessors, (3), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-12-14 06:32:26,663 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 24 transitions. [2022-12-14 06:32:26,664 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-12-14 06:32:26,664 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 06:32:26,664 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 06:32:26,669 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2022-12-14 06:32:26,865 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 06:32:26,871 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-12-14 06:32:26,872 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 06:32:26,873 INFO L85 PathProgramCache]: Analyzing trace with hash 1533229909, now seen corresponding path program 1 times [2022-12-14 06:32:26,873 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 06:32:26,873 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [964147916] [2022-12-14 06:32:26,874 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 06:32:26,874 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 06:32:26,931 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-12-14 06:32:26,931 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1129345486] [2022-12-14 06:32:26,932 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 06:32:26,932 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 06:32:26,933 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 [2022-12-14 06:32:26,935 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-14 06:32:26,938 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-12-14 06:32:27,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 06:32:27,051 INFO L263 TraceCheckSpWp]: Trace formula consists of 175 conjuncts, 4 conjunts are in the unsatisfiable core [2022-12-14 06:32:27,052 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-14 06:32:27,071 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 10 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2022-12-14 06:32:27,071 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-14 06:32:27,105 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2022-12-14 06:32:27,105 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 06:32:27,105 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [964147916] [2022-12-14 06:32:27,105 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-12-14 06:32:27,105 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1129345486] [2022-12-14 06:32:27,106 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1129345486] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-14 06:32:27,106 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1816672550] [2022-12-14 06:32:27,108 INFO L159 IcfgInterpreter]: Started Sifa with 16 locations of interest [2022-12-14 06:32:27,108 INFO L166 IcfgInterpreter]: Building call graph [2022-12-14 06:32:27,108 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2022-12-14 06:32:27,108 INFO L176 IcfgInterpreter]: Starting interpretation [2022-12-14 06:32:27,108 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2022-12-14 06:32:27,122 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 06:32:27,132 INFO L321 Elim1Store]: treesize reduction 15, result has 37.5 percent of original size [2022-12-14 06:32:27,133 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 30 [2022-12-14 06:32:27,140 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 06:32:27,150 INFO L321 Elim1Store]: treesize reduction 18, result has 35.7 percent of original size [2022-12-14 06:32:27,150 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 5 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 2 case distinctions, treesize of input 27 treesize of output 37 [2022-12-14 06:32:27,167 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 06:32:27,168 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 28 [2022-12-14 06:32:27,205 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 06:32:27,205 INFO L173 IndexEqualityManager]: detected equality via solver [2022-12-14 06:32:27,221 INFO L321 Elim1Store]: treesize reduction 54, result has 28.0 percent of original size [2022-12-14 06:32:27,221 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 224 treesize of output 223 [2022-12-14 06:32:27,272 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 12 [2022-12-14 06:32:27,345 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 06:32:27,345 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 20 [2022-12-14 06:32:27,406 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 06:32:27,406 INFO L173 IndexEqualityManager]: detected equality via solver [2022-12-14 06:32:27,407 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 27 [2022-12-14 06:32:27,430 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 24 [2022-12-14 06:32:27,449 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 24 [2022-12-14 06:32:27,462 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 12 [2022-12-14 06:32:27,533 INFO L197 IcfgInterpreter]: Interpreting procedure rangesum with input of size 17 for LOIs [2022-12-14 06:32:27,580 INFO L180 IcfgInterpreter]: Interpretation finished [2022-12-14 06:32:28,079 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '933#(and (<= 0 |ULTIMATE.start_init_nondet_#in~x#1.offset|) (<= 0 |ULTIMATE.start_init_nondet_~x#1.offset|) (<= 1 |ULTIMATE.start_init_nondet_~i~0#1|) (<= |ULTIMATE.start_main_~ret2~0#1| 2147483647) (<= ~N~0 2147483647) (<= |ULTIMATE.start_init_nondet_#in~x#1.offset| 0) (or (not (= |ULTIMATE.start_main_~ret2~0#1| |ULTIMATE.start_main_~ret~1#1|)) (not (= |ULTIMATE.start_main_~ret5~0#1| |ULTIMATE.start_main_~ret~1#1|))) (<= 1 ~N~0) (<= |ULTIMATE.start_init_nondet_~x#1.offset| 0) (<= 0 |ULTIMATE.start_main_~i~2#1|) (<= 0 (+ |ULTIMATE.start_main_~ret~1#1| 2147483648)) (<= 0 |ULTIMATE.start_init_nondet_~x#1.base|) (<= 0 (+ |ULTIMATE.start_main_~ret5~0#1| 2147483648)) (<= |ULTIMATE.start_main_~ret~1#1| 2147483647) (= |ULTIMATE.start_main_~#x~0#1.offset| 0) (<= 0 (+ |ULTIMATE.start_main_~ret2~0#1| 2147483648)) (<= 0 |ULTIMATE.start_init_nondet_#in~x#1.base|) (= |#NULL.offset| 0) (<= |ULTIMATE.start_main_~ret5~0#1| 2147483647) (<= 0 |ULTIMATE.start_main_~#x~0#1.base|) (<= 0 |#StackHeapBarrier|) (= |#NULL.base| 0))' at error location [2022-12-14 06:32:28,079 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2022-12-14 06:32:28,079 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-12-14 06:32:28,079 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 6] total 8 [2022-12-14 06:32:28,079 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [999400411] [2022-12-14 06:32:28,079 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-12-14 06:32:28,080 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-12-14 06:32:28,080 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 06:32:28,080 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-12-14 06:32:28,081 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=75, Invalid=345, Unknown=0, NotChecked=0, Total=420 [2022-12-14 06:32:28,081 INFO L87 Difference]: Start difference. First operand 20 states and 24 transitions. Second operand has 8 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 8 states have internal predecessors, (23), 2 states have call successors, (6), 3 states have call predecessors, (6), 3 states have return successors, (6), 1 states have call predecessors, (6), 2 states have call successors, (6) [2022-12-14 06:32:28,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 06:32:28,103 INFO L93 Difference]: Finished difference Result 35 states and 45 transitions. [2022-12-14 06:32:28,103 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-12-14 06:32:28,103 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 8 states have internal predecessors, (23), 2 states have call successors, (6), 3 states have call predecessors, (6), 3 states have return successors, (6), 1 states have call predecessors, (6), 2 states have call successors, (6) Word has length 27 [2022-12-14 06:32:28,103 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 06:32:28,104 INFO L225 Difference]: With dead ends: 35 [2022-12-14 06:32:28,104 INFO L226 Difference]: Without dead ends: 21 [2022-12-14 06:32:28,104 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 79 GetRequests, 60 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 116 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=75, Invalid=345, Unknown=0, NotChecked=0, Total=420 [2022-12-14 06:32:28,105 INFO L413 NwaCegarLoop]: 13 mSDtfsCounter, 15 mSDsluCounter, 6 mSDsCounter, 0 mSdLazyCounter, 24 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 15 SdHoareTripleChecker+Valid, 19 SdHoareTripleChecker+Invalid, 24 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 24 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-12-14 06:32:28,105 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [15 Valid, 19 Invalid, 24 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 24 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-12-14 06:32:28,106 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2022-12-14 06:32:28,110 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2022-12-14 06:32:28,110 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 16 states have (on average 1.1875) internal successors, (19), 16 states have internal predecessors, (19), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-12-14 06:32:28,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 25 transitions. [2022-12-14 06:32:28,111 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 25 transitions. Word has length 27 [2022-12-14 06:32:28,111 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 06:32:28,111 INFO L495 AbstractCegarLoop]: Abstraction has 21 states and 25 transitions. [2022-12-14 06:32:28,111 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 8 states have internal predecessors, (23), 2 states have call successors, (6), 3 states have call predecessors, (6), 3 states have return successors, (6), 1 states have call predecessors, (6), 2 states have call successors, (6) [2022-12-14 06:32:28,111 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 25 transitions. [2022-12-14 06:32:28,112 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-12-14 06:32:28,112 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 06:32:28,112 INFO L195 NwaCegarLoop]: trace histogram [6, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 06:32:28,116 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2022-12-14 06:32:28,313 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 06:32:28,313 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-12-14 06:32:28,313 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 06:32:28,314 INFO L85 PathProgramCache]: Analyzing trace with hash 1502007822, now seen corresponding path program 2 times [2022-12-14 06:32:28,314 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 06:32:28,314 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1867896968] [2022-12-14 06:32:28,314 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 06:32:28,314 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 06:32:28,359 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-12-14 06:32:28,359 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1100664034] [2022-12-14 06:32:28,359 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-12-14 06:32:28,359 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 06:32:28,360 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 [2022-12-14 06:32:28,361 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-14 06:32:28,362 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-12-14 06:32:28,433 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2022-12-14 06:32:28,433 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-12-14 06:32:28,435 INFO L263 TraceCheckSpWp]: Trace formula consists of 187 conjuncts, 41 conjunts are in the unsatisfiable core [2022-12-14 06:32:28,438 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-14 06:32:28,873 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-12-14 06:32:28,873 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-14 06:32:29,868 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-12-14 06:32:29,868 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 99 treesize of output 95 [2022-12-14 06:32:39,959 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-12-14 06:32:39,960 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 423 treesize of output 339 [2022-12-14 06:32:44,339 WARN L859 $PredicateComparison]: unable to prove that (let ((.cse0 (div c_~N~0 2))) (or (not (< 0 .cse0)) (let ((.cse10 (+ c_rangesum_~cnt~0 1))) (let ((.cse8 (< .cse10 0))) (let ((.cse1 (< .cse0 c_rangesum_~i~1)) (.cse19 (not .cse8)) (.cse7 (= .cse10 0))) (and (or .cse1 (and (or (let ((.cse3 (< c_rangesum_~cnt~0 0))) (and (forall ((v_rangesum_~ret~0_79 Int)) (or (<= (mod (div v_rangesum_~ret~0_79 c_rangesum_~cnt~0) 4294967296) 2147483647) (not (= (mod v_rangesum_~ret~0_79 c_rangesum_~cnt~0) 0)))) (forall ((v_rangesum_~ret~0_79 Int)) (let ((.cse2 (div v_rangesum_~ret~0_79 c_rangesum_~cnt~0))) (or (not (< v_rangesum_~ret~0_79 0)) (= (mod v_rangesum_~ret~0_79 c_rangesum_~cnt~0) 0) (not (<= (mod .cse2 4294967296) 2147483647)) (= 0 (mod (+ .cse2 4294967295) 4294967296))))) (or .cse3 (forall ((v_rangesum_~ret~0_79 Int)) (or (not (< v_rangesum_~ret~0_79 0)) (= (mod v_rangesum_~ret~0_79 c_rangesum_~cnt~0) 0) (not (<= (mod (div v_rangesum_~ret~0_79 c_rangesum_~cnt~0) 4294967296) 2147483647))))) (forall ((v_rangesum_~ret~0_79 Int)) (let ((.cse4 (mod (div v_rangesum_~ret~0_79 c_rangesum_~cnt~0) 4294967296))) (or (= .cse4 0) (not (= (mod v_rangesum_~ret~0_79 c_rangesum_~cnt~0) 0)) (not (<= .cse4 2147483647))))) (forall ((v_rangesum_~ret~0_79 Int)) (let ((.cse5 (mod (div v_rangesum_~ret~0_79 c_rangesum_~cnt~0) 4294967296))) (or (= .cse5 0) (< v_rangesum_~ret~0_79 0) (not (<= .cse5 2147483647))))) (forall ((v_rangesum_~ret~0_79 Int)) (let ((.cse6 (div v_rangesum_~ret~0_79 c_rangesum_~cnt~0))) (or (<= (mod .cse6 4294967296) 2147483647) (<= (mod (+ .cse6 1) 4294967296) 2147483647)))) (or (not .cse3) (forall ((v_rangesum_~ret~0_79 Int)) (<= (mod (div v_rangesum_~ret~0_79 c_rangesum_~cnt~0) 4294967296) 2147483647))) (forall ((v_rangesum_~ret~0_79 Int)) (or (<= (mod (div v_rangesum_~ret~0_79 c_rangesum_~cnt~0) 4294967296) 2147483647) (< v_rangesum_~ret~0_79 0))))) (= c_rangesum_~cnt~0 0)) (or .cse7 (and (or .cse8 (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse9 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (or (= (mod .cse9 .cse10) 0) (not (<= (mod (div .cse9 .cse10) 4294967296) 2147483647)) (not (< .cse9 0)))))) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse11 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (let ((.cse12 (div .cse11 .cse10))) (or (= (mod .cse11 .cse10) 0) (not (<= (mod .cse12 4294967296) 2147483647)) (not (< .cse11 0)) (= (mod (+ .cse12 4294967295) 4294967296) 0))))) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse13 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (let ((.cse14 (mod (div .cse13 .cse10) 4294967296))) (or (< .cse13 0) (= .cse14 0) (not (<= .cse14 2147483647)))))) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse15 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (or (not (= (mod .cse15 .cse10) 0)) (<= (mod (div .cse15 .cse10) 4294967296) 2147483647)))) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse17 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (let ((.cse16 (mod (div .cse17 .cse10) 4294967296))) (or (= .cse16 0) (not (<= .cse16 2147483647)) (not (= (mod .cse17 .cse10) 0)))))) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse18 (div (+ v_rangesum_~ret~0_79 v_arrayElimCell_45) .cse10))) (or (<= (mod (+ .cse18 1) 4294967296) 2147483647) (<= (mod .cse18 4294967296) 2147483647)))) (or (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (<= (mod (div (+ v_rangesum_~ret~0_79 v_arrayElimCell_45) .cse10) 4294967296) 2147483647)) .cse19) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse20 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (or (< .cse20 0) (<= (mod (div .cse20 .cse10) 4294967296) 2147483647))))) (< c_rangesum_~i~1 .cse0)))) (or (not .cse1) (and (let ((.cse22 (+ 2 c_rangesum_~cnt~0))) (or (let ((.cse31 (< .cse22 0))) (and (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse21 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (or (<= (mod (div .cse21 .cse22) 4294967296) 2147483647) (not (= (mod .cse21 .cse22) 0))))) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse23 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (let ((.cse24 (mod (div .cse23 .cse22) 4294967296))) (or (< .cse23 0) (not (<= .cse24 2147483647)) (= .cse24 0))))) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse26 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (let ((.cse25 (div .cse26 .cse22))) (or (= (mod (+ 4294967295 .cse25) 4294967296) 0) (not (<= (mod .cse25 4294967296) 2147483647)) (= (mod .cse26 .cse22) 0) (not (< .cse26 0)))))) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse27 (div (+ v_rangesum_~ret~0_79 v_arrayElimCell_45) .cse22))) (or (<= (mod .cse27 4294967296) 2147483647) (<= (mod (+ .cse27 1) 4294967296) 2147483647)))) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse29 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (let ((.cse28 (mod (div .cse29 .cse22) 4294967296))) (or (not (<= .cse28 2147483647)) (not (= (mod .cse29 .cse22) 0)) (= .cse28 0))))) (or (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse30 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (or (not (<= (mod (div .cse30 .cse22) 4294967296) 2147483647)) (= (mod .cse30 .cse22) 0) (not (< .cse30 0))))) .cse31) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse32 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (or (< .cse32 0) (<= (mod (div .cse32 .cse22) 4294967296) 2147483647)))) (or (not .cse31) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (<= (mod (div (+ v_rangesum_~ret~0_79 v_arrayElimCell_45) .cse22) 4294967296) 2147483647))))) (= .cse22 0))) (or (and (forall ((v_rangesum_~ret~0_79 Int)) (or (<= (mod (div v_rangesum_~ret~0_79 .cse10) 4294967296) 2147483647) (< v_rangesum_~ret~0_79 0))) (forall ((v_rangesum_~ret~0_79 Int)) (let ((.cse33 (div v_rangesum_~ret~0_79 .cse10))) (or (<= (mod (+ .cse33 1) 4294967296) 2147483647) (<= (mod .cse33 4294967296) 2147483647)))) (forall ((v_rangesum_~ret~0_79 Int)) (let ((.cse34 (div v_rangesum_~ret~0_79 .cse10))) (or (not (< v_rangesum_~ret~0_79 0)) (= (mod v_rangesum_~ret~0_79 .cse10) 0) (not (<= (mod .cse34 4294967296) 2147483647)) (= (mod (+ .cse34 4294967295) 4294967296) 0)))) (forall ((v_rangesum_~ret~0_79 Int)) (or (not (= (mod v_rangesum_~ret~0_79 .cse10) 0)) (<= (mod (div v_rangesum_~ret~0_79 .cse10) 4294967296) 2147483647))) (forall ((v_rangesum_~ret~0_79 Int)) (let ((.cse35 (mod (div v_rangesum_~ret~0_79 .cse10) 4294967296))) (or (not (= (mod v_rangesum_~ret~0_79 .cse10) 0)) (not (<= .cse35 2147483647)) (= .cse35 0)))) (forall ((v_rangesum_~ret~0_79 Int)) (let ((.cse36 (mod (div v_rangesum_~ret~0_79 .cse10) 4294967296))) (or (< v_rangesum_~ret~0_79 0) (not (<= .cse36 2147483647)) (= .cse36 0)))) (or .cse8 (forall ((v_rangesum_~ret~0_79 Int)) (or (not (< v_rangesum_~ret~0_79 0)) (= (mod v_rangesum_~ret~0_79 .cse10) 0) (not (<= (mod (div v_rangesum_~ret~0_79 .cse10) 4294967296) 2147483647))))) (or .cse19 (forall ((v_rangesum_~ret~0_79 Int)) (<= (mod (div v_rangesum_~ret~0_79 .cse10) 4294967296) 2147483647)))) .cse7))))))))) is different from true [2022-12-14 06:32:47,760 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-12-14 06:32:47,760 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 69 treesize of output 65 [2022-12-14 06:32:55,240 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 38 [2022-12-14 06:33:04,987 WARN L233 SmtUtils]: Spent 6.09s on a formula simplification. DAG size of input: 51 DAG size of output: 11 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-12-14 06:33:07,041 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-12-14 06:33:07,041 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 99 treesize of output 95 [2022-12-14 06:33:16,101 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-12-14 06:33:16,101 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 365 treesize of output 281 [2022-12-14 06:33:21,501 WARN L859 $PredicateComparison]: unable to prove that (or (let ((.cse2 (+ c_rangesum_~cnt~0 1))) (let ((.cse3 (< .cse2 0)) (.cse36 (div c_~N~0 2))) (let ((.cse0 (< .cse36 c_rangesum_~i~1)) (.cse5 (not .cse3)) (.cse8 (= .cse2 0))) (and (or (not .cse0) (and (or (and (forall ((v_rangesum_~ret~0_103 Int)) (let ((.cse1 (div v_rangesum_~ret~0_103 .cse2))) (or (<= (mod (+ .cse1 1) 4294967296) 2147483647) (<= (mod .cse1 4294967296) 2147483647)))) (or (forall ((v_rangesum_~ret~0_103 Int)) (or (not (< v_rangesum_~ret~0_103 0)) (= (mod v_rangesum_~ret~0_103 .cse2) 0) (not (<= (mod (div v_rangesum_~ret~0_103 .cse2) 4294967296) 2147483647)))) .cse3) (forall ((v_rangesum_~ret~0_103 Int)) (or (not (= (mod v_rangesum_~ret~0_103 .cse2) 0)) (<= (mod (div v_rangesum_~ret~0_103 .cse2) 4294967296) 2147483647))) (forall ((v_rangesum_~ret~0_103 Int)) (let ((.cse4 (mod (div v_rangesum_~ret~0_103 .cse2) 4294967296))) (or (< v_rangesum_~ret~0_103 0) (= .cse4 0) (not (<= .cse4 2147483647))))) (or (forall ((v_rangesum_~ret~0_103 Int)) (<= (mod (div v_rangesum_~ret~0_103 .cse2) 4294967296) 2147483647)) .cse5) (forall ((v_rangesum_~ret~0_103 Int)) (let ((.cse6 (div v_rangesum_~ret~0_103 .cse2))) (or (not (< v_rangesum_~ret~0_103 0)) (= (mod v_rangesum_~ret~0_103 .cse2) 0) (= (mod (+ .cse6 4294967295) 4294967296) 0) (not (<= (mod .cse6 4294967296) 2147483647))))) (forall ((v_rangesum_~ret~0_103 Int)) (or (< v_rangesum_~ret~0_103 0) (<= (mod (div v_rangesum_~ret~0_103 .cse2) 4294967296) 2147483647))) (forall ((v_rangesum_~ret~0_103 Int)) (let ((.cse7 (mod (div v_rangesum_~ret~0_103 .cse2) 4294967296))) (or (not (= (mod v_rangesum_~ret~0_103 .cse2) 0)) (= .cse7 0) (not (<= .cse7 2147483647)))))) .cse8) (let ((.cse10 (+ 2 c_rangesum_~cnt~0))) (or (let ((.cse14 (< .cse10 0))) (and (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse9 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (let ((.cse11 (mod (div .cse9 .cse10) 4294967296))) (or (not (= (mod .cse9 .cse10) 0)) (= .cse11 0) (not (<= .cse11 2147483647)))))) (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse12 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (or (< .cse12 0) (<= (mod (div .cse12 .cse10) 4294967296) 2147483647)))) (or (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse13 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (or (not (<= (mod (div .cse13 .cse10) 4294967296) 2147483647)) (not (< .cse13 0)) (= (mod .cse13 .cse10) 0)))) .cse14) (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse16 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (let ((.cse15 (div .cse16 .cse10))) (or (not (<= (mod .cse15 4294967296) 2147483647)) (= (mod (+ .cse15 4294967295) 4294967296) 0) (not (< .cse16 0)) (= (mod .cse16 .cse10) 0))))) (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse17 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (let ((.cse18 (mod (div .cse17 .cse10) 4294967296))) (or (< .cse17 0) (= .cse18 0) (not (<= .cse18 2147483647)))))) (or (not .cse14) (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (<= (mod (div (+ v_rangesum_~ret~0_103 v_arrayElimCell_52) .cse10) 4294967296) 2147483647))) (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse19 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (or (not (= (mod .cse19 .cse10) 0)) (<= (mod (div .cse19 .cse10) 4294967296) 2147483647)))) (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse20 (div (+ v_rangesum_~ret~0_103 v_arrayElimCell_52) .cse10))) (or (<= (mod (+ .cse20 1) 4294967296) 2147483647) (<= (mod .cse20 4294967296) 2147483647)))))) (= .cse10 0))))) (or .cse0 (and (or (let ((.cse21 (< c_rangesum_~cnt~0 0))) (and (or .cse21 (forall ((v_rangesum_~ret~0_103 Int)) (or (not (<= (mod (div v_rangesum_~ret~0_103 c_rangesum_~cnt~0) 4294967296) 2147483647)) (= (mod v_rangesum_~ret~0_103 c_rangesum_~cnt~0) 0) (not (< v_rangesum_~ret~0_103 0))))) (forall ((v_rangesum_~ret~0_103 Int)) (let ((.cse22 (mod (div v_rangesum_~ret~0_103 c_rangesum_~cnt~0) 4294967296))) (or (not (<= .cse22 2147483647)) (< v_rangesum_~ret~0_103 0) (= .cse22 0)))) (forall ((v_rangesum_~ret~0_103 Int)) (or (< v_rangesum_~ret~0_103 0) (<= (mod (div v_rangesum_~ret~0_103 c_rangesum_~cnt~0) 4294967296) 2147483647))) (forall ((v_rangesum_~ret~0_103 Int)) (let ((.cse23 (mod (div v_rangesum_~ret~0_103 c_rangesum_~cnt~0) 4294967296))) (or (not (<= .cse23 2147483647)) (not (= (mod v_rangesum_~ret~0_103 c_rangesum_~cnt~0) 0)) (= .cse23 0)))) (or (forall ((v_rangesum_~ret~0_103 Int)) (<= (mod (div v_rangesum_~ret~0_103 c_rangesum_~cnt~0) 4294967296) 2147483647)) (not .cse21)) (forall ((v_rangesum_~ret~0_103 Int)) (let ((.cse24 (div v_rangesum_~ret~0_103 c_rangesum_~cnt~0))) (or (not (<= (mod .cse24 4294967296) 2147483647)) (= (mod (+ 4294967295 .cse24) 4294967296) 0) (= (mod v_rangesum_~ret~0_103 c_rangesum_~cnt~0) 0) (not (< v_rangesum_~ret~0_103 0))))) (forall ((v_rangesum_~ret~0_103 Int)) (let ((.cse25 (div v_rangesum_~ret~0_103 c_rangesum_~cnt~0))) (or (<= (mod (+ .cse25 1) 4294967296) 2147483647) (<= (mod .cse25 4294967296) 2147483647)))) (forall ((v_rangesum_~ret~0_103 Int)) (or (not (= (mod v_rangesum_~ret~0_103 c_rangesum_~cnt~0) 0)) (<= (mod (div v_rangesum_~ret~0_103 c_rangesum_~cnt~0) 4294967296) 2147483647))))) (= c_rangesum_~cnt~0 0)) (or (and (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse26 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (or (< .cse26 0) (<= (mod (div .cse26 .cse2) 4294967296) 2147483647)))) (or .cse5 (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (<= (mod (div (+ v_rangesum_~ret~0_103 v_arrayElimCell_52) .cse2) 4294967296) 2147483647))) (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse27 (div (+ v_rangesum_~ret~0_103 v_arrayElimCell_52) .cse2))) (or (<= (mod (+ .cse27 1) 4294967296) 2147483647) (<= (mod .cse27 4294967296) 2147483647)))) (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse28 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (let ((.cse29 (mod (div .cse28 .cse2) 4294967296))) (or (< .cse28 0) (= .cse29 0) (not (<= .cse29 2147483647)))))) (or .cse3 (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse30 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (or (not (< .cse30 0)) (= (mod .cse30 .cse2) 0) (not (<= (mod (div .cse30 .cse2) 4294967296) 2147483647)))))) (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse31 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (or (<= (mod (div .cse31 .cse2) 4294967296) 2147483647) (not (= (mod .cse31 .cse2) 0))))) (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse33 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (let ((.cse32 (mod (div .cse33 .cse2) 4294967296))) (or (= .cse32 0) (not (= (mod .cse33 .cse2) 0)) (not (<= .cse32 2147483647)))))) (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse35 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (let ((.cse34 (div .cse35 .cse2))) (or (= (mod (+ .cse34 4294967295) 4294967296) 0) (not (< .cse35 0)) (= (mod .cse35 .cse2) 0) (not (<= (mod .cse34 4294967296) 2147483647))))))) .cse8 (< c_rangesum_~i~1 .cse36)))))))) (not (<= c_~N~0 2)) (not (< 1 c_~N~0))) is different from true [2022-12-14 06:33:21,884 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 7 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 15 not checked. [2022-12-14 06:33:21,884 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 06:33:21,884 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1867896968] [2022-12-14 06:33:21,884 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-12-14 06:33:21,884 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1100664034] [2022-12-14 06:33:21,884 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1100664034] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-14 06:33:21,884 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1884066772] [2022-12-14 06:33:21,885 INFO L159 IcfgInterpreter]: Started Sifa with 16 locations of interest [2022-12-14 06:33:21,886 INFO L166 IcfgInterpreter]: Building call graph [2022-12-14 06:33:21,886 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2022-12-14 06:33:21,886 INFO L176 IcfgInterpreter]: Starting interpretation [2022-12-14 06:33:21,886 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2022-12-14 06:33:21,896 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 06:33:21,906 INFO L321 Elim1Store]: treesize reduction 18, result has 35.7 percent of original size [2022-12-14 06:33:21,906 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 5 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 2 case distinctions, treesize of input 27 treesize of output 37 [2022-12-14 06:33:21,913 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 06:33:21,914 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 26 [2022-12-14 06:33:21,926 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 06:33:21,927 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 28 [2022-12-14 06:33:21,963 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 06:33:21,963 INFO L173 IndexEqualityManager]: detected equality via solver [2022-12-14 06:33:21,981 INFO L321 Elim1Store]: treesize reduction 54, result has 28.0 percent of original size [2022-12-14 06:33:21,981 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 224 treesize of output 223 [2022-12-14 06:33:22,038 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 12 [2022-12-14 06:33:22,098 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 06:33:22,099 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 20 [2022-12-14 06:33:22,151 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2022-12-14 06:33:22,172 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 24 [2022-12-14 06:33:22,190 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 24 [2022-12-14 06:33:22,198 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 12 [2022-12-14 06:33:22,264 INFO L197 IcfgInterpreter]: Interpreting procedure rangesum with input of size 17 for LOIs [2022-12-14 06:33:22,305 INFO L180 IcfgInterpreter]: Interpretation finished [2022-12-14 06:33:23,408 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '1241#(and (<= 0 |ULTIMATE.start_init_nondet_#in~x#1.offset|) (<= 0 |ULTIMATE.start_init_nondet_~x#1.offset|) (<= 1 |ULTIMATE.start_init_nondet_~i~0#1|) (<= |ULTIMATE.start_main_~ret2~0#1| 2147483647) (<= ~N~0 2147483647) (<= |ULTIMATE.start_init_nondet_#in~x#1.offset| 0) (or (not (= |ULTIMATE.start_main_~ret2~0#1| |ULTIMATE.start_main_~ret~1#1|)) (not (= |ULTIMATE.start_main_~ret5~0#1| |ULTIMATE.start_main_~ret~1#1|))) (<= 1 ~N~0) (<= |ULTIMATE.start_init_nondet_~x#1.offset| 0) (<= 0 |ULTIMATE.start_main_~i~2#1|) (<= 0 (+ |ULTIMATE.start_main_~ret~1#1| 2147483648)) (<= 0 |ULTIMATE.start_init_nondet_~x#1.base|) (<= 0 (+ |ULTIMATE.start_main_~ret5~0#1| 2147483648)) (<= |ULTIMATE.start_main_~ret~1#1| 2147483647) (= |ULTIMATE.start_main_~#x~0#1.offset| 0) (<= 0 (+ |ULTIMATE.start_main_~ret2~0#1| 2147483648)) (<= 0 |ULTIMATE.start_init_nondet_#in~x#1.base|) (= |#NULL.offset| 0) (<= |ULTIMATE.start_main_~ret5~0#1| 2147483647) (<= 0 |ULTIMATE.start_main_~#x~0#1.base|) (<= 0 |#StackHeapBarrier|) (= |#NULL.base| 0))' at error location [2022-12-14 06:33:23,408 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2022-12-14 06:33:23,408 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-12-14 06:33:23,408 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 22] total 34 [2022-12-14 06:33:23,408 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1527442348] [2022-12-14 06:33:23,408 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-12-14 06:33:23,409 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 34 states [2022-12-14 06:33:23,409 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 06:33:23,409 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2022-12-14 06:33:23,410 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=210, Invalid=1776, Unknown=2, NotChecked=174, Total=2162 [2022-12-14 06:33:23,410 INFO L87 Difference]: Start difference. First operand 21 states and 25 transitions. Second operand has 34 states, 30 states have (on average 1.3666666666666667) internal successors, (41), 29 states have internal predecessors, (41), 4 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 5 states have call predecessors, (6), 4 states have call successors, (6) [2022-12-14 06:33:25,566 WARN L859 $PredicateComparison]: unable to prove that (let ((.cse3 (div c_~N~0 2)) (.cse28 (+ 2 c_rangesum_~cnt~0)) (.cse14 (+ c_rangesum_~cnt~0 1))) (let ((.cse12 (< .cse14 0)) (.cse6 (< c_rangesum_~cnt~0 0)) (.cse37 (< .cse28 0)) (.cse4 (< .cse3 c_rangesum_~i~1))) (let ((.cse26 (not .cse4)) (.cse39 (not .cse37)) (.cse40 (= .cse28 0)) (.cse10 (not .cse6)) (.cse1 (= c_rangesum_~cnt~0 0)) (.cse23 (not .cse12)) (.cse11 (= .cse14 0)) (.cse25 (< c_rangesum_~i~1 .cse3)) (.cse0 (<= c_~N~0 2)) (.cse2 (< 1 c_~N~0))) (and (<= c_rangesum_~i~1 0) .cse0 .cse1 .cse2 (or (not (< 0 .cse3)) (and (or .cse4 (and (or (and (forall ((v_rangesum_~ret~0_79 Int)) (or (<= (mod (div v_rangesum_~ret~0_79 c_rangesum_~cnt~0) 4294967296) 2147483647) (not (= (mod v_rangesum_~ret~0_79 c_rangesum_~cnt~0) 0)))) (forall ((v_rangesum_~ret~0_79 Int)) (let ((.cse5 (div v_rangesum_~ret~0_79 c_rangesum_~cnt~0))) (or (not (< v_rangesum_~ret~0_79 0)) (= (mod v_rangesum_~ret~0_79 c_rangesum_~cnt~0) 0) (not (<= (mod .cse5 4294967296) 2147483647)) (= 0 (mod (+ .cse5 4294967295) 4294967296))))) (or .cse6 (forall ((v_rangesum_~ret~0_79 Int)) (or (not (< v_rangesum_~ret~0_79 0)) (= (mod v_rangesum_~ret~0_79 c_rangesum_~cnt~0) 0) (not (<= (mod (div v_rangesum_~ret~0_79 c_rangesum_~cnt~0) 4294967296) 2147483647))))) (forall ((v_rangesum_~ret~0_79 Int)) (let ((.cse7 (mod (div v_rangesum_~ret~0_79 c_rangesum_~cnt~0) 4294967296))) (or (= .cse7 0) (not (= (mod v_rangesum_~ret~0_79 c_rangesum_~cnt~0) 0)) (not (<= .cse7 2147483647))))) (forall ((v_rangesum_~ret~0_79 Int)) (let ((.cse8 (mod (div v_rangesum_~ret~0_79 c_rangesum_~cnt~0) 4294967296))) (or (= .cse8 0) (< v_rangesum_~ret~0_79 0) (not (<= .cse8 2147483647))))) (forall ((v_rangesum_~ret~0_79 Int)) (let ((.cse9 (div v_rangesum_~ret~0_79 c_rangesum_~cnt~0))) (or (<= (mod .cse9 4294967296) 2147483647) (<= (mod (+ .cse9 1) 4294967296) 2147483647)))) (or .cse10 (forall ((v_rangesum_~ret~0_79 Int)) (<= (mod (div v_rangesum_~ret~0_79 c_rangesum_~cnt~0) 4294967296) 2147483647))) (forall ((v_rangesum_~ret~0_79 Int)) (or (<= (mod (div v_rangesum_~ret~0_79 c_rangesum_~cnt~0) 4294967296) 2147483647) (< v_rangesum_~ret~0_79 0)))) .cse1) (or .cse11 (and (or .cse12 (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse13 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (or (= (mod .cse13 .cse14) 0) (not (<= (mod (div .cse13 .cse14) 4294967296) 2147483647)) (not (< .cse13 0)))))) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse15 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (let ((.cse16 (div .cse15 .cse14))) (or (= (mod .cse15 .cse14) 0) (not (<= (mod .cse16 4294967296) 2147483647)) (not (< .cse15 0)) (= (mod (+ .cse16 4294967295) 4294967296) 0))))) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse17 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (let ((.cse18 (mod (div .cse17 .cse14) 4294967296))) (or (< .cse17 0) (= .cse18 0) (not (<= .cse18 2147483647)))))) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse19 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (or (not (= (mod .cse19 .cse14) 0)) (<= (mod (div .cse19 .cse14) 4294967296) 2147483647)))) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse21 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (let ((.cse20 (mod (div .cse21 .cse14) 4294967296))) (or (= .cse20 0) (not (<= .cse20 2147483647)) (not (= (mod .cse21 .cse14) 0)))))) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse22 (div (+ v_rangesum_~ret~0_79 v_arrayElimCell_45) .cse14))) (or (<= (mod (+ .cse22 1) 4294967296) 2147483647) (<= (mod .cse22 4294967296) 2147483647)))) (or (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (<= (mod (div (+ v_rangesum_~ret~0_79 v_arrayElimCell_45) .cse14) 4294967296) 2147483647)) .cse23) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse24 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (or (< .cse24 0) (<= (mod (div .cse24 .cse14) 4294967296) 2147483647))))) .cse25))) (or .cse26 (and (or (and (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse27 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (or (<= (mod (div .cse27 .cse28) 4294967296) 2147483647) (not (= (mod .cse27 .cse28) 0))))) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse29 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (let ((.cse30 (mod (div .cse29 .cse28) 4294967296))) (or (< .cse29 0) (not (<= .cse30 2147483647)) (= .cse30 0))))) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse32 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (let ((.cse31 (div .cse32 .cse28))) (or (= (mod (+ 4294967295 .cse31) 4294967296) 0) (not (<= (mod .cse31 4294967296) 2147483647)) (= (mod .cse32 .cse28) 0) (not (< .cse32 0)))))) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse33 (div (+ v_rangesum_~ret~0_79 v_arrayElimCell_45) .cse28))) (or (<= (mod .cse33 4294967296) 2147483647) (<= (mod (+ .cse33 1) 4294967296) 2147483647)))) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse35 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (let ((.cse34 (mod (div .cse35 .cse28) 4294967296))) (or (not (<= .cse34 2147483647)) (not (= (mod .cse35 .cse28) 0)) (= .cse34 0))))) (or (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse36 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (or (not (<= (mod (div .cse36 .cse28) 4294967296) 2147483647)) (= (mod .cse36 .cse28) 0) (not (< .cse36 0))))) .cse37) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse38 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (or (< .cse38 0) (<= (mod (div .cse38 .cse28) 4294967296) 2147483647)))) (or .cse39 (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (<= (mod (div (+ v_rangesum_~ret~0_79 v_arrayElimCell_45) .cse28) 4294967296) 2147483647)))) .cse40) (or (and (forall ((v_rangesum_~ret~0_79 Int)) (or (<= (mod (div v_rangesum_~ret~0_79 .cse14) 4294967296) 2147483647) (< v_rangesum_~ret~0_79 0))) (forall ((v_rangesum_~ret~0_79 Int)) (let ((.cse41 (div v_rangesum_~ret~0_79 .cse14))) (or (<= (mod (+ .cse41 1) 4294967296) 2147483647) (<= (mod .cse41 4294967296) 2147483647)))) (forall ((v_rangesum_~ret~0_79 Int)) (let ((.cse42 (div v_rangesum_~ret~0_79 .cse14))) (or (not (< v_rangesum_~ret~0_79 0)) (= (mod v_rangesum_~ret~0_79 .cse14) 0) (not (<= (mod .cse42 4294967296) 2147483647)) (= (mod (+ .cse42 4294967295) 4294967296) 0)))) (forall ((v_rangesum_~ret~0_79 Int)) (or (not (= (mod v_rangesum_~ret~0_79 .cse14) 0)) (<= (mod (div v_rangesum_~ret~0_79 .cse14) 4294967296) 2147483647))) (forall ((v_rangesum_~ret~0_79 Int)) (let ((.cse43 (mod (div v_rangesum_~ret~0_79 .cse14) 4294967296))) (or (not (= (mod v_rangesum_~ret~0_79 .cse14) 0)) (not (<= .cse43 2147483647)) (= .cse43 0)))) (forall ((v_rangesum_~ret~0_79 Int)) (let ((.cse44 (mod (div v_rangesum_~ret~0_79 .cse14) 4294967296))) (or (< v_rangesum_~ret~0_79 0) (not (<= .cse44 2147483647)) (= .cse44 0)))) (or .cse12 (forall ((v_rangesum_~ret~0_79 Int)) (or (not (< v_rangesum_~ret~0_79 0)) (= (mod v_rangesum_~ret~0_79 .cse14) 0) (not (<= (mod (div v_rangesum_~ret~0_79 .cse14) 4294967296) 2147483647))))) (or .cse23 (forall ((v_rangesum_~ret~0_79 Int)) (<= (mod (div v_rangesum_~ret~0_79 .cse14) 4294967296) 2147483647)))) .cse11))))) (or (and (or .cse26 (and (or (and (forall ((v_rangesum_~ret~0_103 Int)) (let ((.cse45 (div v_rangesum_~ret~0_103 .cse14))) (or (<= (mod (+ .cse45 1) 4294967296) 2147483647) (<= (mod .cse45 4294967296) 2147483647)))) (or (forall ((v_rangesum_~ret~0_103 Int)) (or (not (< v_rangesum_~ret~0_103 0)) (= (mod v_rangesum_~ret~0_103 .cse14) 0) (not (<= (mod (div v_rangesum_~ret~0_103 .cse14) 4294967296) 2147483647)))) .cse12) (forall ((v_rangesum_~ret~0_103 Int)) (or (not (= (mod v_rangesum_~ret~0_103 .cse14) 0)) (<= (mod (div v_rangesum_~ret~0_103 .cse14) 4294967296) 2147483647))) (forall ((v_rangesum_~ret~0_103 Int)) (let ((.cse46 (mod (div v_rangesum_~ret~0_103 .cse14) 4294967296))) (or (< v_rangesum_~ret~0_103 0) (= .cse46 0) (not (<= .cse46 2147483647))))) (or (forall ((v_rangesum_~ret~0_103 Int)) (<= (mod (div v_rangesum_~ret~0_103 .cse14) 4294967296) 2147483647)) .cse23) (forall ((v_rangesum_~ret~0_103 Int)) (let ((.cse47 (div v_rangesum_~ret~0_103 .cse14))) (or (not (< v_rangesum_~ret~0_103 0)) (= (mod v_rangesum_~ret~0_103 .cse14) 0) (= (mod (+ .cse47 4294967295) 4294967296) 0) (not (<= (mod .cse47 4294967296) 2147483647))))) (forall ((v_rangesum_~ret~0_103 Int)) (or (< v_rangesum_~ret~0_103 0) (<= (mod (div v_rangesum_~ret~0_103 .cse14) 4294967296) 2147483647))) (forall ((v_rangesum_~ret~0_103 Int)) (let ((.cse48 (mod (div v_rangesum_~ret~0_103 .cse14) 4294967296))) (or (not (= (mod v_rangesum_~ret~0_103 .cse14) 0)) (= .cse48 0) (not (<= .cse48 2147483647)))))) .cse11) (or (and (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse49 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (let ((.cse50 (mod (div .cse49 .cse28) 4294967296))) (or (not (= (mod .cse49 .cse28) 0)) (= .cse50 0) (not (<= .cse50 2147483647)))))) (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse51 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (or (< .cse51 0) (<= (mod (div .cse51 .cse28) 4294967296) 2147483647)))) (or (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse52 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (or (not (<= (mod (div .cse52 .cse28) 4294967296) 2147483647)) (not (< .cse52 0)) (= (mod .cse52 .cse28) 0)))) .cse37) (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse54 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (let ((.cse53 (div .cse54 .cse28))) (or (not (<= (mod .cse53 4294967296) 2147483647)) (= (mod (+ .cse53 4294967295) 4294967296) 0) (not (< .cse54 0)) (= (mod .cse54 .cse28) 0))))) (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse55 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (let ((.cse56 (mod (div .cse55 .cse28) 4294967296))) (or (< .cse55 0) (= .cse56 0) (not (<= .cse56 2147483647)))))) (or .cse39 (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (<= (mod (div (+ v_rangesum_~ret~0_103 v_arrayElimCell_52) .cse28) 4294967296) 2147483647))) (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse57 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (or (not (= (mod .cse57 .cse28) 0)) (<= (mod (div .cse57 .cse28) 4294967296) 2147483647)))) (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse58 (div (+ v_rangesum_~ret~0_103 v_arrayElimCell_52) .cse28))) (or (<= (mod (+ .cse58 1) 4294967296) 2147483647) (<= (mod .cse58 4294967296) 2147483647))))) .cse40))) (or .cse4 (and (or (and (or .cse6 (forall ((v_rangesum_~ret~0_103 Int)) (or (not (<= (mod (div v_rangesum_~ret~0_103 c_rangesum_~cnt~0) 4294967296) 2147483647)) (= (mod v_rangesum_~ret~0_103 c_rangesum_~cnt~0) 0) (not (< v_rangesum_~ret~0_103 0))))) (forall ((v_rangesum_~ret~0_103 Int)) (let ((.cse59 (mod (div v_rangesum_~ret~0_103 c_rangesum_~cnt~0) 4294967296))) (or (not (<= .cse59 2147483647)) (< v_rangesum_~ret~0_103 0) (= .cse59 0)))) (forall ((v_rangesum_~ret~0_103 Int)) (or (< v_rangesum_~ret~0_103 0) (<= (mod (div v_rangesum_~ret~0_103 c_rangesum_~cnt~0) 4294967296) 2147483647))) (forall ((v_rangesum_~ret~0_103 Int)) (let ((.cse60 (mod (div v_rangesum_~ret~0_103 c_rangesum_~cnt~0) 4294967296))) (or (not (<= .cse60 2147483647)) (not (= (mod v_rangesum_~ret~0_103 c_rangesum_~cnt~0) 0)) (= .cse60 0)))) (or (forall ((v_rangesum_~ret~0_103 Int)) (<= (mod (div v_rangesum_~ret~0_103 c_rangesum_~cnt~0) 4294967296) 2147483647)) .cse10) (forall ((v_rangesum_~ret~0_103 Int)) (let ((.cse61 (div v_rangesum_~ret~0_103 c_rangesum_~cnt~0))) (or (not (<= (mod .cse61 4294967296) 2147483647)) (= (mod (+ 4294967295 .cse61) 4294967296) 0) (= (mod v_rangesum_~ret~0_103 c_rangesum_~cnt~0) 0) (not (< v_rangesum_~ret~0_103 0))))) (forall ((v_rangesum_~ret~0_103 Int)) (let ((.cse62 (div v_rangesum_~ret~0_103 c_rangesum_~cnt~0))) (or (<= (mod (+ .cse62 1) 4294967296) 2147483647) (<= (mod .cse62 4294967296) 2147483647)))) (forall ((v_rangesum_~ret~0_103 Int)) (or (not (= (mod v_rangesum_~ret~0_103 c_rangesum_~cnt~0) 0)) (<= (mod (div v_rangesum_~ret~0_103 c_rangesum_~cnt~0) 4294967296) 2147483647)))) .cse1) (or (and (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse63 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (or (< .cse63 0) (<= (mod (div .cse63 .cse14) 4294967296) 2147483647)))) (or .cse23 (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (<= (mod (div (+ v_rangesum_~ret~0_103 v_arrayElimCell_52) .cse14) 4294967296) 2147483647))) (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse64 (div (+ v_rangesum_~ret~0_103 v_arrayElimCell_52) .cse14))) (or (<= (mod (+ .cse64 1) 4294967296) 2147483647) (<= (mod .cse64 4294967296) 2147483647)))) (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse65 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (let ((.cse66 (mod (div .cse65 .cse14) 4294967296))) (or (< .cse65 0) (= .cse66 0) (not (<= .cse66 2147483647)))))) (or .cse12 (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse67 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (or (not (< .cse67 0)) (= (mod .cse67 .cse14) 0) (not (<= (mod (div .cse67 .cse14) 4294967296) 2147483647)))))) (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse68 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (or (<= (mod (div .cse68 .cse14) 4294967296) 2147483647) (not (= (mod .cse68 .cse14) 0))))) (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse70 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (let ((.cse69 (mod (div .cse70 .cse14) 4294967296))) (or (= .cse69 0) (not (= (mod .cse70 .cse14) 0)) (not (<= .cse69 2147483647)))))) (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse72 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (let ((.cse71 (div .cse72 .cse14))) (or (= (mod (+ .cse71 4294967295) 4294967296) 0) (not (< .cse72 0)) (= (mod .cse72 .cse14) 0) (not (<= (mod .cse71 4294967296) 2147483647))))))) .cse11 .cse25)))) (not .cse0) (not .cse2)))))) is different from true [2022-12-14 06:33:27,600 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse19 (< c_rangesum_~cnt~0 0)) (.cse81 (div c_~N~0 2)) (.cse36 (+ 2 c_rangesum_~cnt~0)) (.cse14 (+ c_rangesum_~cnt~0 1))) (let ((.cse12 (< .cse14 0)) (.cse45 (< .cse36 0)) (.cse3 (< .cse81 c_rangesum_~i~1)) (.cse23 (not .cse19))) (let ((.cse4 (let ((.cse84 (div c_rangesum_~ret~0 c_rangesum_~cnt~0))) (let ((.cse85 (mod .cse84 4294967296)) (.cse83 (= (mod c_rangesum_~ret~0 c_rangesum_~cnt~0) 0))) (let ((.cse82 (< c_rangesum_~ret~0 0)) (.cse86 (not .cse83)) (.cse87 (<= .cse85 2147483647))) (and (or (and (or (not .cse82) .cse83 (and (= (mod (+ 4294967295 .cse84) 4294967296) 0) .cse19)) (or (= .cse85 0) (and .cse82 .cse86))) (not .cse87)) (or (and .cse82 .cse23 .cse86 (<= (mod (+ .cse84 1) 4294967296) 2147483647)) .cse87)))))) (.cse17 (not (< 0 .cse81))) (.cse15 (not .cse3)) (.cse47 (not .cse45)) (.cse48 (= .cse36 0)) (.cse1 (= c_rangesum_~cnt~0 0)) (.cse8 (not .cse12)) (.cse16 (= .cse14 0)) (.cse34 (< c_rangesum_~i~1 .cse81)) (.cse0 (not (<= c_~N~0 2))) (.cse2 (not (< 1 c_~N~0)))) (and (or .cse0 .cse1 .cse2) (or (and (or .cse3 .cse1 .cse4) (or (let ((.cse13 (+ c_rangesum_~ret~0 (select (select |c_#memory_int| c_rangesum_~x.base) (+ (* c_rangesum_~i~1 4) c_rangesum_~x.offset))))) (let ((.cse7 (div .cse13 .cse14))) (let ((.cse10 (mod .cse7 4294967296)) (.cse11 (= 0 (mod .cse13 .cse14)))) (let ((.cse9 (not .cse11)) (.cse6 (< .cse13 0)) (.cse5 (<= .cse10 2147483647))) (and (or .cse5 (and .cse6 (<= (mod (+ .cse7 1) 4294967296) 2147483647) .cse8 .cse9)) (or (and (or (= .cse10 0) (and .cse6 .cse9)) (or .cse11 (and .cse12 (= (mod (+ .cse7 4294967295) 4294967296) 0)) (not .cse6))) (not .cse5))))))) .cse15 .cse16)) .cse17) (or .cse1 .cse4 .cse17) (or .cse17 (and (or .cse3 (and (or (and (forall ((v_rangesum_~ret~0_79 Int)) (or (<= (mod (div v_rangesum_~ret~0_79 c_rangesum_~cnt~0) 4294967296) 2147483647) (not (= (mod v_rangesum_~ret~0_79 c_rangesum_~cnt~0) 0)))) (forall ((v_rangesum_~ret~0_79 Int)) (let ((.cse18 (div v_rangesum_~ret~0_79 c_rangesum_~cnt~0))) (or (not (< v_rangesum_~ret~0_79 0)) (= (mod v_rangesum_~ret~0_79 c_rangesum_~cnt~0) 0) (not (<= (mod .cse18 4294967296) 2147483647)) (= 0 (mod (+ .cse18 4294967295) 4294967296))))) (or .cse19 (forall ((v_rangesum_~ret~0_79 Int)) (or (not (< v_rangesum_~ret~0_79 0)) (= (mod v_rangesum_~ret~0_79 c_rangesum_~cnt~0) 0) (not (<= (mod (div v_rangesum_~ret~0_79 c_rangesum_~cnt~0) 4294967296) 2147483647))))) (forall ((v_rangesum_~ret~0_79 Int)) (let ((.cse20 (mod (div v_rangesum_~ret~0_79 c_rangesum_~cnt~0) 4294967296))) (or (= .cse20 0) (not (= (mod v_rangesum_~ret~0_79 c_rangesum_~cnt~0) 0)) (not (<= .cse20 2147483647))))) (forall ((v_rangesum_~ret~0_79 Int)) (let ((.cse21 (mod (div v_rangesum_~ret~0_79 c_rangesum_~cnt~0) 4294967296))) (or (= .cse21 0) (< v_rangesum_~ret~0_79 0) (not (<= .cse21 2147483647))))) (forall ((v_rangesum_~ret~0_79 Int)) (let ((.cse22 (div v_rangesum_~ret~0_79 c_rangesum_~cnt~0))) (or (<= (mod .cse22 4294967296) 2147483647) (<= (mod (+ .cse22 1) 4294967296) 2147483647)))) (or .cse23 (forall ((v_rangesum_~ret~0_79 Int)) (<= (mod (div v_rangesum_~ret~0_79 c_rangesum_~cnt~0) 4294967296) 2147483647))) (forall ((v_rangesum_~ret~0_79 Int)) (or (<= (mod (div v_rangesum_~ret~0_79 c_rangesum_~cnt~0) 4294967296) 2147483647) (< v_rangesum_~ret~0_79 0)))) .cse1) (or .cse16 (and (or .cse12 (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse24 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (or (= (mod .cse24 .cse14) 0) (not (<= (mod (div .cse24 .cse14) 4294967296) 2147483647)) (not (< .cse24 0)))))) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse25 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (let ((.cse26 (div .cse25 .cse14))) (or (= (mod .cse25 .cse14) 0) (not (<= (mod .cse26 4294967296) 2147483647)) (not (< .cse25 0)) (= (mod (+ .cse26 4294967295) 4294967296) 0))))) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse27 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (let ((.cse28 (mod (div .cse27 .cse14) 4294967296))) (or (< .cse27 0) (= .cse28 0) (not (<= .cse28 2147483647)))))) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse29 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (or (not (= (mod .cse29 .cse14) 0)) (<= (mod (div .cse29 .cse14) 4294967296) 2147483647)))) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse31 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (let ((.cse30 (mod (div .cse31 .cse14) 4294967296))) (or (= .cse30 0) (not (<= .cse30 2147483647)) (not (= (mod .cse31 .cse14) 0)))))) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse32 (div (+ v_rangesum_~ret~0_79 v_arrayElimCell_45) .cse14))) (or (<= (mod (+ .cse32 1) 4294967296) 2147483647) (<= (mod .cse32 4294967296) 2147483647)))) (or (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (<= (mod (div (+ v_rangesum_~ret~0_79 v_arrayElimCell_45) .cse14) 4294967296) 2147483647)) .cse8) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse33 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (or (< .cse33 0) (<= (mod (div .cse33 .cse14) 4294967296) 2147483647))))) .cse34))) (or .cse15 (and (or (and (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse35 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (or (<= (mod (div .cse35 .cse36) 4294967296) 2147483647) (not (= (mod .cse35 .cse36) 0))))) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse37 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (let ((.cse38 (mod (div .cse37 .cse36) 4294967296))) (or (< .cse37 0) (not (<= .cse38 2147483647)) (= .cse38 0))))) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse40 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (let ((.cse39 (div .cse40 .cse36))) (or (= (mod (+ 4294967295 .cse39) 4294967296) 0) (not (<= (mod .cse39 4294967296) 2147483647)) (= (mod .cse40 .cse36) 0) (not (< .cse40 0)))))) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse41 (div (+ v_rangesum_~ret~0_79 v_arrayElimCell_45) .cse36))) (or (<= (mod .cse41 4294967296) 2147483647) (<= (mod (+ .cse41 1) 4294967296) 2147483647)))) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse43 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (let ((.cse42 (mod (div .cse43 .cse36) 4294967296))) (or (not (<= .cse42 2147483647)) (not (= (mod .cse43 .cse36) 0)) (= .cse42 0))))) (or (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse44 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (or (not (<= (mod (div .cse44 .cse36) 4294967296) 2147483647)) (= (mod .cse44 .cse36) 0) (not (< .cse44 0))))) .cse45) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse46 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (or (< .cse46 0) (<= (mod (div .cse46 .cse36) 4294967296) 2147483647)))) (or .cse47 (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (<= (mod (div (+ v_rangesum_~ret~0_79 v_arrayElimCell_45) .cse36) 4294967296) 2147483647)))) .cse48) (or (and (forall ((v_rangesum_~ret~0_79 Int)) (or (<= (mod (div v_rangesum_~ret~0_79 .cse14) 4294967296) 2147483647) (< v_rangesum_~ret~0_79 0))) (forall ((v_rangesum_~ret~0_79 Int)) (let ((.cse49 (div v_rangesum_~ret~0_79 .cse14))) (or (<= (mod (+ .cse49 1) 4294967296) 2147483647) (<= (mod .cse49 4294967296) 2147483647)))) (forall ((v_rangesum_~ret~0_79 Int)) (let ((.cse50 (div v_rangesum_~ret~0_79 .cse14))) (or (not (< v_rangesum_~ret~0_79 0)) (= (mod v_rangesum_~ret~0_79 .cse14) 0) (not (<= (mod .cse50 4294967296) 2147483647)) (= (mod (+ .cse50 4294967295) 4294967296) 0)))) (forall ((v_rangesum_~ret~0_79 Int)) (or (not (= (mod v_rangesum_~ret~0_79 .cse14) 0)) (<= (mod (div v_rangesum_~ret~0_79 .cse14) 4294967296) 2147483647))) (forall ((v_rangesum_~ret~0_79 Int)) (let ((.cse51 (mod (div v_rangesum_~ret~0_79 .cse14) 4294967296))) (or (not (= (mod v_rangesum_~ret~0_79 .cse14) 0)) (not (<= .cse51 2147483647)) (= .cse51 0)))) (forall ((v_rangesum_~ret~0_79 Int)) (let ((.cse52 (mod (div v_rangesum_~ret~0_79 .cse14) 4294967296))) (or (< v_rangesum_~ret~0_79 0) (not (<= .cse52 2147483647)) (= .cse52 0)))) (or .cse12 (forall ((v_rangesum_~ret~0_79 Int)) (or (not (< v_rangesum_~ret~0_79 0)) (= (mod v_rangesum_~ret~0_79 .cse14) 0) (not (<= (mod (div v_rangesum_~ret~0_79 .cse14) 4294967296) 2147483647))))) (or .cse8 (forall ((v_rangesum_~ret~0_79 Int)) (<= (mod (div v_rangesum_~ret~0_79 .cse14) 4294967296) 2147483647)))) .cse16))))) (or (and (or .cse15 (and (or (and (forall ((v_rangesum_~ret~0_103 Int)) (let ((.cse53 (div v_rangesum_~ret~0_103 .cse14))) (or (<= (mod (+ .cse53 1) 4294967296) 2147483647) (<= (mod .cse53 4294967296) 2147483647)))) (or (forall ((v_rangesum_~ret~0_103 Int)) (or (not (< v_rangesum_~ret~0_103 0)) (= (mod v_rangesum_~ret~0_103 .cse14) 0) (not (<= (mod (div v_rangesum_~ret~0_103 .cse14) 4294967296) 2147483647)))) .cse12) (forall ((v_rangesum_~ret~0_103 Int)) (or (not (= (mod v_rangesum_~ret~0_103 .cse14) 0)) (<= (mod (div v_rangesum_~ret~0_103 .cse14) 4294967296) 2147483647))) (forall ((v_rangesum_~ret~0_103 Int)) (let ((.cse54 (mod (div v_rangesum_~ret~0_103 .cse14) 4294967296))) (or (< v_rangesum_~ret~0_103 0) (= .cse54 0) (not (<= .cse54 2147483647))))) (or (forall ((v_rangesum_~ret~0_103 Int)) (<= (mod (div v_rangesum_~ret~0_103 .cse14) 4294967296) 2147483647)) .cse8) (forall ((v_rangesum_~ret~0_103 Int)) (let ((.cse55 (div v_rangesum_~ret~0_103 .cse14))) (or (not (< v_rangesum_~ret~0_103 0)) (= (mod v_rangesum_~ret~0_103 .cse14) 0) (= (mod (+ .cse55 4294967295) 4294967296) 0) (not (<= (mod .cse55 4294967296) 2147483647))))) (forall ((v_rangesum_~ret~0_103 Int)) (or (< v_rangesum_~ret~0_103 0) (<= (mod (div v_rangesum_~ret~0_103 .cse14) 4294967296) 2147483647))) (forall ((v_rangesum_~ret~0_103 Int)) (let ((.cse56 (mod (div v_rangesum_~ret~0_103 .cse14) 4294967296))) (or (not (= (mod v_rangesum_~ret~0_103 .cse14) 0)) (= .cse56 0) (not (<= .cse56 2147483647)))))) .cse16) (or (and (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse57 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (let ((.cse58 (mod (div .cse57 .cse36) 4294967296))) (or (not (= (mod .cse57 .cse36) 0)) (= .cse58 0) (not (<= .cse58 2147483647)))))) (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse59 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (or (< .cse59 0) (<= (mod (div .cse59 .cse36) 4294967296) 2147483647)))) (or (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse60 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (or (not (<= (mod (div .cse60 .cse36) 4294967296) 2147483647)) (not (< .cse60 0)) (= (mod .cse60 .cse36) 0)))) .cse45) (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse62 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (let ((.cse61 (div .cse62 .cse36))) (or (not (<= (mod .cse61 4294967296) 2147483647)) (= (mod (+ .cse61 4294967295) 4294967296) 0) (not (< .cse62 0)) (= (mod .cse62 .cse36) 0))))) (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse63 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (let ((.cse64 (mod (div .cse63 .cse36) 4294967296))) (or (< .cse63 0) (= .cse64 0) (not (<= .cse64 2147483647)))))) (or .cse47 (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (<= (mod (div (+ v_rangesum_~ret~0_103 v_arrayElimCell_52) .cse36) 4294967296) 2147483647))) (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse65 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (or (not (= (mod .cse65 .cse36) 0)) (<= (mod (div .cse65 .cse36) 4294967296) 2147483647)))) (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse66 (div (+ v_rangesum_~ret~0_103 v_arrayElimCell_52) .cse36))) (or (<= (mod (+ .cse66 1) 4294967296) 2147483647) (<= (mod .cse66 4294967296) 2147483647))))) .cse48))) (or .cse3 (and (or (and (or .cse19 (forall ((v_rangesum_~ret~0_103 Int)) (or (not (<= (mod (div v_rangesum_~ret~0_103 c_rangesum_~cnt~0) 4294967296) 2147483647)) (= (mod v_rangesum_~ret~0_103 c_rangesum_~cnt~0) 0) (not (< v_rangesum_~ret~0_103 0))))) (forall ((v_rangesum_~ret~0_103 Int)) (let ((.cse67 (mod (div v_rangesum_~ret~0_103 c_rangesum_~cnt~0) 4294967296))) (or (not (<= .cse67 2147483647)) (< v_rangesum_~ret~0_103 0) (= .cse67 0)))) (forall ((v_rangesum_~ret~0_103 Int)) (or (< v_rangesum_~ret~0_103 0) (<= (mod (div v_rangesum_~ret~0_103 c_rangesum_~cnt~0) 4294967296) 2147483647))) (forall ((v_rangesum_~ret~0_103 Int)) (let ((.cse68 (mod (div v_rangesum_~ret~0_103 c_rangesum_~cnt~0) 4294967296))) (or (not (<= .cse68 2147483647)) (not (= (mod v_rangesum_~ret~0_103 c_rangesum_~cnt~0) 0)) (= .cse68 0)))) (or (forall ((v_rangesum_~ret~0_103 Int)) (<= (mod (div v_rangesum_~ret~0_103 c_rangesum_~cnt~0) 4294967296) 2147483647)) .cse23) (forall ((v_rangesum_~ret~0_103 Int)) (let ((.cse69 (div v_rangesum_~ret~0_103 c_rangesum_~cnt~0))) (or (not (<= (mod .cse69 4294967296) 2147483647)) (= (mod (+ 4294967295 .cse69) 4294967296) 0) (= (mod v_rangesum_~ret~0_103 c_rangesum_~cnt~0) 0) (not (< v_rangesum_~ret~0_103 0))))) (forall ((v_rangesum_~ret~0_103 Int)) (let ((.cse70 (div v_rangesum_~ret~0_103 c_rangesum_~cnt~0))) (or (<= (mod (+ .cse70 1) 4294967296) 2147483647) (<= (mod .cse70 4294967296) 2147483647)))) (forall ((v_rangesum_~ret~0_103 Int)) (or (not (= (mod v_rangesum_~ret~0_103 c_rangesum_~cnt~0) 0)) (<= (mod (div v_rangesum_~ret~0_103 c_rangesum_~cnt~0) 4294967296) 2147483647)))) .cse1) (or (and (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse71 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (or (< .cse71 0) (<= (mod (div .cse71 .cse14) 4294967296) 2147483647)))) (or .cse8 (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (<= (mod (div (+ v_rangesum_~ret~0_103 v_arrayElimCell_52) .cse14) 4294967296) 2147483647))) (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse72 (div (+ v_rangesum_~ret~0_103 v_arrayElimCell_52) .cse14))) (or (<= (mod (+ .cse72 1) 4294967296) 2147483647) (<= (mod .cse72 4294967296) 2147483647)))) (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse73 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (let ((.cse74 (mod (div .cse73 .cse14) 4294967296))) (or (< .cse73 0) (= .cse74 0) (not (<= .cse74 2147483647)))))) (or .cse12 (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse75 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (or (not (< .cse75 0)) (= (mod .cse75 .cse14) 0) (not (<= (mod (div .cse75 .cse14) 4294967296) 2147483647)))))) (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse76 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (or (<= (mod (div .cse76 .cse14) 4294967296) 2147483647) (not (= (mod .cse76 .cse14) 0))))) (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse78 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (let ((.cse77 (mod (div .cse78 .cse14) 4294967296))) (or (= .cse77 0) (not (= (mod .cse78 .cse14) 0)) (not (<= .cse77 2147483647)))))) (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse80 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (let ((.cse79 (div .cse80 .cse14))) (or (= (mod (+ .cse79 4294967295) 4294967296) 0) (not (< .cse80 0)) (= (mod .cse80 .cse14) 0) (not (<= (mod .cse79 4294967296) 2147483647))))))) .cse16 .cse34)))) .cse0 .cse2))))) is different from false [2022-12-14 06:33:29,611 WARN L859 $PredicateComparison]: unable to prove that (let ((.cse19 (< c_rangesum_~cnt~0 0)) (.cse81 (div c_~N~0 2)) (.cse36 (+ 2 c_rangesum_~cnt~0)) (.cse14 (+ c_rangesum_~cnt~0 1))) (let ((.cse12 (< .cse14 0)) (.cse45 (< .cse36 0)) (.cse3 (< .cse81 c_rangesum_~i~1)) (.cse23 (not .cse19))) (let ((.cse4 (let ((.cse84 (div c_rangesum_~ret~0 c_rangesum_~cnt~0))) (let ((.cse85 (mod .cse84 4294967296)) (.cse83 (= (mod c_rangesum_~ret~0 c_rangesum_~cnt~0) 0))) (let ((.cse82 (< c_rangesum_~ret~0 0)) (.cse86 (not .cse83)) (.cse87 (<= .cse85 2147483647))) (and (or (and (or (not .cse82) .cse83 (and (= (mod (+ 4294967295 .cse84) 4294967296) 0) .cse19)) (or (= .cse85 0) (and .cse82 .cse86))) (not .cse87)) (or (and .cse82 .cse23 .cse86 (<= (mod (+ .cse84 1) 4294967296) 2147483647)) .cse87)))))) (.cse17 (not (< 0 .cse81))) (.cse15 (not .cse3)) (.cse47 (not .cse45)) (.cse48 (= .cse36 0)) (.cse1 (= c_rangesum_~cnt~0 0)) (.cse8 (not .cse12)) (.cse16 (= .cse14 0)) (.cse34 (< c_rangesum_~i~1 .cse81)) (.cse0 (not (<= c_~N~0 2))) (.cse2 (not (< 1 c_~N~0)))) (and (or .cse0 .cse1 .cse2) (or (and (or .cse3 .cse1 .cse4) (or (let ((.cse13 (+ c_rangesum_~ret~0 (select (select |c_#memory_int| c_rangesum_~x.base) (+ (* c_rangesum_~i~1 4) c_rangesum_~x.offset))))) (let ((.cse7 (div .cse13 .cse14))) (let ((.cse10 (mod .cse7 4294967296)) (.cse11 (= 0 (mod .cse13 .cse14)))) (let ((.cse9 (not .cse11)) (.cse6 (< .cse13 0)) (.cse5 (<= .cse10 2147483647))) (and (or .cse5 (and .cse6 (<= (mod (+ .cse7 1) 4294967296) 2147483647) .cse8 .cse9)) (or (and (or (= .cse10 0) (and .cse6 .cse9)) (or .cse11 (and .cse12 (= (mod (+ .cse7 4294967295) 4294967296) 0)) (not .cse6))) (not .cse5))))))) .cse15 .cse16)) .cse17) (or .cse1 .cse4 .cse17) (or .cse17 (and (or .cse3 (and (or (and (forall ((v_rangesum_~ret~0_79 Int)) (or (<= (mod (div v_rangesum_~ret~0_79 c_rangesum_~cnt~0) 4294967296) 2147483647) (not (= (mod v_rangesum_~ret~0_79 c_rangesum_~cnt~0) 0)))) (forall ((v_rangesum_~ret~0_79 Int)) (let ((.cse18 (div v_rangesum_~ret~0_79 c_rangesum_~cnt~0))) (or (not (< v_rangesum_~ret~0_79 0)) (= (mod v_rangesum_~ret~0_79 c_rangesum_~cnt~0) 0) (not (<= (mod .cse18 4294967296) 2147483647)) (= 0 (mod (+ .cse18 4294967295) 4294967296))))) (or .cse19 (forall ((v_rangesum_~ret~0_79 Int)) (or (not (< v_rangesum_~ret~0_79 0)) (= (mod v_rangesum_~ret~0_79 c_rangesum_~cnt~0) 0) (not (<= (mod (div v_rangesum_~ret~0_79 c_rangesum_~cnt~0) 4294967296) 2147483647))))) (forall ((v_rangesum_~ret~0_79 Int)) (let ((.cse20 (mod (div v_rangesum_~ret~0_79 c_rangesum_~cnt~0) 4294967296))) (or (= .cse20 0) (not (= (mod v_rangesum_~ret~0_79 c_rangesum_~cnt~0) 0)) (not (<= .cse20 2147483647))))) (forall ((v_rangesum_~ret~0_79 Int)) (let ((.cse21 (mod (div v_rangesum_~ret~0_79 c_rangesum_~cnt~0) 4294967296))) (or (= .cse21 0) (< v_rangesum_~ret~0_79 0) (not (<= .cse21 2147483647))))) (forall ((v_rangesum_~ret~0_79 Int)) (let ((.cse22 (div v_rangesum_~ret~0_79 c_rangesum_~cnt~0))) (or (<= (mod .cse22 4294967296) 2147483647) (<= (mod (+ .cse22 1) 4294967296) 2147483647)))) (or .cse23 (forall ((v_rangesum_~ret~0_79 Int)) (<= (mod (div v_rangesum_~ret~0_79 c_rangesum_~cnt~0) 4294967296) 2147483647))) (forall ((v_rangesum_~ret~0_79 Int)) (or (<= (mod (div v_rangesum_~ret~0_79 c_rangesum_~cnt~0) 4294967296) 2147483647) (< v_rangesum_~ret~0_79 0)))) .cse1) (or .cse16 (and (or .cse12 (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse24 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (or (= (mod .cse24 .cse14) 0) (not (<= (mod (div .cse24 .cse14) 4294967296) 2147483647)) (not (< .cse24 0)))))) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse25 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (let ((.cse26 (div .cse25 .cse14))) (or (= (mod .cse25 .cse14) 0) (not (<= (mod .cse26 4294967296) 2147483647)) (not (< .cse25 0)) (= (mod (+ .cse26 4294967295) 4294967296) 0))))) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse27 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (let ((.cse28 (mod (div .cse27 .cse14) 4294967296))) (or (< .cse27 0) (= .cse28 0) (not (<= .cse28 2147483647)))))) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse29 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (or (not (= (mod .cse29 .cse14) 0)) (<= (mod (div .cse29 .cse14) 4294967296) 2147483647)))) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse31 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (let ((.cse30 (mod (div .cse31 .cse14) 4294967296))) (or (= .cse30 0) (not (<= .cse30 2147483647)) (not (= (mod .cse31 .cse14) 0)))))) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse32 (div (+ v_rangesum_~ret~0_79 v_arrayElimCell_45) .cse14))) (or (<= (mod (+ .cse32 1) 4294967296) 2147483647) (<= (mod .cse32 4294967296) 2147483647)))) (or (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (<= (mod (div (+ v_rangesum_~ret~0_79 v_arrayElimCell_45) .cse14) 4294967296) 2147483647)) .cse8) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse33 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (or (< .cse33 0) (<= (mod (div .cse33 .cse14) 4294967296) 2147483647))))) .cse34))) (or .cse15 (and (or (and (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse35 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (or (<= (mod (div .cse35 .cse36) 4294967296) 2147483647) (not (= (mod .cse35 .cse36) 0))))) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse37 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (let ((.cse38 (mod (div .cse37 .cse36) 4294967296))) (or (< .cse37 0) (not (<= .cse38 2147483647)) (= .cse38 0))))) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse40 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (let ((.cse39 (div .cse40 .cse36))) (or (= (mod (+ 4294967295 .cse39) 4294967296) 0) (not (<= (mod .cse39 4294967296) 2147483647)) (= (mod .cse40 .cse36) 0) (not (< .cse40 0)))))) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse41 (div (+ v_rangesum_~ret~0_79 v_arrayElimCell_45) .cse36))) (or (<= (mod .cse41 4294967296) 2147483647) (<= (mod (+ .cse41 1) 4294967296) 2147483647)))) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse43 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (let ((.cse42 (mod (div .cse43 .cse36) 4294967296))) (or (not (<= .cse42 2147483647)) (not (= (mod .cse43 .cse36) 0)) (= .cse42 0))))) (or (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse44 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (or (not (<= (mod (div .cse44 .cse36) 4294967296) 2147483647)) (= (mod .cse44 .cse36) 0) (not (< .cse44 0))))) .cse45) (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (let ((.cse46 (+ v_rangesum_~ret~0_79 v_arrayElimCell_45))) (or (< .cse46 0) (<= (mod (div .cse46 .cse36) 4294967296) 2147483647)))) (or .cse47 (forall ((v_rangesum_~ret~0_79 Int) (v_arrayElimCell_45 Int)) (<= (mod (div (+ v_rangesum_~ret~0_79 v_arrayElimCell_45) .cse36) 4294967296) 2147483647)))) .cse48) (or (and (forall ((v_rangesum_~ret~0_79 Int)) (or (<= (mod (div v_rangesum_~ret~0_79 .cse14) 4294967296) 2147483647) (< v_rangesum_~ret~0_79 0))) (forall ((v_rangesum_~ret~0_79 Int)) (let ((.cse49 (div v_rangesum_~ret~0_79 .cse14))) (or (<= (mod (+ .cse49 1) 4294967296) 2147483647) (<= (mod .cse49 4294967296) 2147483647)))) (forall ((v_rangesum_~ret~0_79 Int)) (let ((.cse50 (div v_rangesum_~ret~0_79 .cse14))) (or (not (< v_rangesum_~ret~0_79 0)) (= (mod v_rangesum_~ret~0_79 .cse14) 0) (not (<= (mod .cse50 4294967296) 2147483647)) (= (mod (+ .cse50 4294967295) 4294967296) 0)))) (forall ((v_rangesum_~ret~0_79 Int)) (or (not (= (mod v_rangesum_~ret~0_79 .cse14) 0)) (<= (mod (div v_rangesum_~ret~0_79 .cse14) 4294967296) 2147483647))) (forall ((v_rangesum_~ret~0_79 Int)) (let ((.cse51 (mod (div v_rangesum_~ret~0_79 .cse14) 4294967296))) (or (not (= (mod v_rangesum_~ret~0_79 .cse14) 0)) (not (<= .cse51 2147483647)) (= .cse51 0)))) (forall ((v_rangesum_~ret~0_79 Int)) (let ((.cse52 (mod (div v_rangesum_~ret~0_79 .cse14) 4294967296))) (or (< v_rangesum_~ret~0_79 0) (not (<= .cse52 2147483647)) (= .cse52 0)))) (or .cse12 (forall ((v_rangesum_~ret~0_79 Int)) (or (not (< v_rangesum_~ret~0_79 0)) (= (mod v_rangesum_~ret~0_79 .cse14) 0) (not (<= (mod (div v_rangesum_~ret~0_79 .cse14) 4294967296) 2147483647))))) (or .cse8 (forall ((v_rangesum_~ret~0_79 Int)) (<= (mod (div v_rangesum_~ret~0_79 .cse14) 4294967296) 2147483647)))) .cse16))))) (or (and (or .cse15 (and (or (and (forall ((v_rangesum_~ret~0_103 Int)) (let ((.cse53 (div v_rangesum_~ret~0_103 .cse14))) (or (<= (mod (+ .cse53 1) 4294967296) 2147483647) (<= (mod .cse53 4294967296) 2147483647)))) (or (forall ((v_rangesum_~ret~0_103 Int)) (or (not (< v_rangesum_~ret~0_103 0)) (= (mod v_rangesum_~ret~0_103 .cse14) 0) (not (<= (mod (div v_rangesum_~ret~0_103 .cse14) 4294967296) 2147483647)))) .cse12) (forall ((v_rangesum_~ret~0_103 Int)) (or (not (= (mod v_rangesum_~ret~0_103 .cse14) 0)) (<= (mod (div v_rangesum_~ret~0_103 .cse14) 4294967296) 2147483647))) (forall ((v_rangesum_~ret~0_103 Int)) (let ((.cse54 (mod (div v_rangesum_~ret~0_103 .cse14) 4294967296))) (or (< v_rangesum_~ret~0_103 0) (= .cse54 0) (not (<= .cse54 2147483647))))) (or (forall ((v_rangesum_~ret~0_103 Int)) (<= (mod (div v_rangesum_~ret~0_103 .cse14) 4294967296) 2147483647)) .cse8) (forall ((v_rangesum_~ret~0_103 Int)) (let ((.cse55 (div v_rangesum_~ret~0_103 .cse14))) (or (not (< v_rangesum_~ret~0_103 0)) (= (mod v_rangesum_~ret~0_103 .cse14) 0) (= (mod (+ .cse55 4294967295) 4294967296) 0) (not (<= (mod .cse55 4294967296) 2147483647))))) (forall ((v_rangesum_~ret~0_103 Int)) (or (< v_rangesum_~ret~0_103 0) (<= (mod (div v_rangesum_~ret~0_103 .cse14) 4294967296) 2147483647))) (forall ((v_rangesum_~ret~0_103 Int)) (let ((.cse56 (mod (div v_rangesum_~ret~0_103 .cse14) 4294967296))) (or (not (= (mod v_rangesum_~ret~0_103 .cse14) 0)) (= .cse56 0) (not (<= .cse56 2147483647)))))) .cse16) (or (and (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse57 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (let ((.cse58 (mod (div .cse57 .cse36) 4294967296))) (or (not (= (mod .cse57 .cse36) 0)) (= .cse58 0) (not (<= .cse58 2147483647)))))) (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse59 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (or (< .cse59 0) (<= (mod (div .cse59 .cse36) 4294967296) 2147483647)))) (or (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse60 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (or (not (<= (mod (div .cse60 .cse36) 4294967296) 2147483647)) (not (< .cse60 0)) (= (mod .cse60 .cse36) 0)))) .cse45) (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse62 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (let ((.cse61 (div .cse62 .cse36))) (or (not (<= (mod .cse61 4294967296) 2147483647)) (= (mod (+ .cse61 4294967295) 4294967296) 0) (not (< .cse62 0)) (= (mod .cse62 .cse36) 0))))) (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse63 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (let ((.cse64 (mod (div .cse63 .cse36) 4294967296))) (or (< .cse63 0) (= .cse64 0) (not (<= .cse64 2147483647)))))) (or .cse47 (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (<= (mod (div (+ v_rangesum_~ret~0_103 v_arrayElimCell_52) .cse36) 4294967296) 2147483647))) (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse65 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (or (not (= (mod .cse65 .cse36) 0)) (<= (mod (div .cse65 .cse36) 4294967296) 2147483647)))) (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse66 (div (+ v_rangesum_~ret~0_103 v_arrayElimCell_52) .cse36))) (or (<= (mod (+ .cse66 1) 4294967296) 2147483647) (<= (mod .cse66 4294967296) 2147483647))))) .cse48))) (or .cse3 (and (or (and (or .cse19 (forall ((v_rangesum_~ret~0_103 Int)) (or (not (<= (mod (div v_rangesum_~ret~0_103 c_rangesum_~cnt~0) 4294967296) 2147483647)) (= (mod v_rangesum_~ret~0_103 c_rangesum_~cnt~0) 0) (not (< v_rangesum_~ret~0_103 0))))) (forall ((v_rangesum_~ret~0_103 Int)) (let ((.cse67 (mod (div v_rangesum_~ret~0_103 c_rangesum_~cnt~0) 4294967296))) (or (not (<= .cse67 2147483647)) (< v_rangesum_~ret~0_103 0) (= .cse67 0)))) (forall ((v_rangesum_~ret~0_103 Int)) (or (< v_rangesum_~ret~0_103 0) (<= (mod (div v_rangesum_~ret~0_103 c_rangesum_~cnt~0) 4294967296) 2147483647))) (forall ((v_rangesum_~ret~0_103 Int)) (let ((.cse68 (mod (div v_rangesum_~ret~0_103 c_rangesum_~cnt~0) 4294967296))) (or (not (<= .cse68 2147483647)) (not (= (mod v_rangesum_~ret~0_103 c_rangesum_~cnt~0) 0)) (= .cse68 0)))) (or (forall ((v_rangesum_~ret~0_103 Int)) (<= (mod (div v_rangesum_~ret~0_103 c_rangesum_~cnt~0) 4294967296) 2147483647)) .cse23) (forall ((v_rangesum_~ret~0_103 Int)) (let ((.cse69 (div v_rangesum_~ret~0_103 c_rangesum_~cnt~0))) (or (not (<= (mod .cse69 4294967296) 2147483647)) (= (mod (+ 4294967295 .cse69) 4294967296) 0) (= (mod v_rangesum_~ret~0_103 c_rangesum_~cnt~0) 0) (not (< v_rangesum_~ret~0_103 0))))) (forall ((v_rangesum_~ret~0_103 Int)) (let ((.cse70 (div v_rangesum_~ret~0_103 c_rangesum_~cnt~0))) (or (<= (mod (+ .cse70 1) 4294967296) 2147483647) (<= (mod .cse70 4294967296) 2147483647)))) (forall ((v_rangesum_~ret~0_103 Int)) (or (not (= (mod v_rangesum_~ret~0_103 c_rangesum_~cnt~0) 0)) (<= (mod (div v_rangesum_~ret~0_103 c_rangesum_~cnt~0) 4294967296) 2147483647)))) .cse1) (or (and (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse71 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (or (< .cse71 0) (<= (mod (div .cse71 .cse14) 4294967296) 2147483647)))) (or .cse8 (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (<= (mod (div (+ v_rangesum_~ret~0_103 v_arrayElimCell_52) .cse14) 4294967296) 2147483647))) (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse72 (div (+ v_rangesum_~ret~0_103 v_arrayElimCell_52) .cse14))) (or (<= (mod (+ .cse72 1) 4294967296) 2147483647) (<= (mod .cse72 4294967296) 2147483647)))) (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse73 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (let ((.cse74 (mod (div .cse73 .cse14) 4294967296))) (or (< .cse73 0) (= .cse74 0) (not (<= .cse74 2147483647)))))) (or .cse12 (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse75 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (or (not (< .cse75 0)) (= (mod .cse75 .cse14) 0) (not (<= (mod (div .cse75 .cse14) 4294967296) 2147483647)))))) (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse76 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (or (<= (mod (div .cse76 .cse14) 4294967296) 2147483647) (not (= (mod .cse76 .cse14) 0))))) (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse78 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (let ((.cse77 (mod (div .cse78 .cse14) 4294967296))) (or (= .cse77 0) (not (= (mod .cse78 .cse14) 0)) (not (<= .cse77 2147483647)))))) (forall ((v_arrayElimCell_52 Int) (v_rangesum_~ret~0_103 Int)) (let ((.cse80 (+ v_rangesum_~ret~0_103 v_arrayElimCell_52))) (let ((.cse79 (div .cse80 .cse14))) (or (= (mod (+ .cse79 4294967295) 4294967296) 0) (not (< .cse80 0)) (= (mod .cse80 .cse14) 0) (not (<= (mod .cse79 4294967296) 2147483647))))))) .cse16 .cse34)))) .cse0 .cse2))))) is different from true [2022-12-14 06:33:36,183 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 06:33:36,184 INFO L93 Difference]: Finished difference Result 40 states and 51 transitions. [2022-12-14 06:33:36,184 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2022-12-14 06:33:36,184 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 30 states have (on average 1.3666666666666667) internal successors, (41), 29 states have internal predecessors, (41), 4 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 5 states have call predecessors, (6), 4 states have call successors, (6) Word has length 30 [2022-12-14 06:33:36,184 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 06:33:36,186 INFO L225 Difference]: With dead ends: 40 [2022-12-14 06:33:36,186 INFO L226 Difference]: Without dead ends: 24 [2022-12-14 06:33:36,187 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 40 SyntacticMatches, 3 SemanticMatches, 58 ConstructedPredicates, 4 IntricatePredicates, 0 DeprecatedPredicates, 1059 ImplicationChecksByTransitivity, 36.9s TimeCoverageRelationStatistics Valid=332, Invalid=2759, Unknown=5, NotChecked=444, Total=3540 [2022-12-14 06:33:36,187 INFO L413 NwaCegarLoop]: 10 mSDtfsCounter, 13 mSDsluCounter, 61 mSDsCounter, 0 mSdLazyCounter, 276 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 13 SdHoareTripleChecker+Valid, 71 SdHoareTripleChecker+Invalid, 355 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 276 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 64 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-12-14 06:33:36,188 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [13 Valid, 71 Invalid, 355 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 276 Invalid, 0 Unknown, 64 Unchecked, 0.7s Time] [2022-12-14 06:33:36,188 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2022-12-14 06:33:36,197 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 22. [2022-12-14 06:33:36,197 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 17 states have (on average 1.1764705882352942) internal successors, (20), 17 states have internal predecessors, (20), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-12-14 06:33:36,197 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 26 transitions. [2022-12-14 06:33:36,197 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 26 transitions. Word has length 30 [2022-12-14 06:33:36,198 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 06:33:36,198 INFO L495 AbstractCegarLoop]: Abstraction has 22 states and 26 transitions. [2022-12-14 06:33:36,198 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 34 states, 30 states have (on average 1.3666666666666667) internal successors, (41), 29 states have internal predecessors, (41), 4 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 5 states have call predecessors, (6), 4 states have call successors, (6) [2022-12-14 06:33:36,198 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 26 transitions. [2022-12-14 06:33:36,199 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-12-14 06:33:36,199 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 06:33:36,199 INFO L195 NwaCegarLoop]: trace histogram [6, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 06:33:36,204 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2022-12-14 06:33:36,400 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 06:33:36,400 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-12-14 06:33:36,401 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 06:33:36,401 INFO L85 PathProgramCache]: Analyzing trace with hash 346737003, now seen corresponding path program 3 times [2022-12-14 06:33:36,401 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 06:33:36,401 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [90178546] [2022-12-14 06:33:36,401 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 06:33:36,402 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 06:33:36,426 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-12-14 06:33:36,426 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1591606566] [2022-12-14 06:33:36,426 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-12-14 06:33:36,427 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 06:33:36,427 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 [2022-12-14 06:33:36,427 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-14 06:33:36,428 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-12-14 06:33:36,485 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-12-14 06:33:36,485 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-12-14 06:33:36,487 INFO L263 TraceCheckSpWp]: Trace formula consists of 196 conjuncts, 7 conjunts are in the unsatisfiable core [2022-12-14 06:33:36,488 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-14 06:33:36,522 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 25 proven. 4 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2022-12-14 06:33:36,522 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-14 06:33:36,552 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2022-12-14 06:33:36,552 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 06:33:36,552 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [90178546] [2022-12-14 06:33:36,552 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-12-14 06:33:36,552 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1591606566] [2022-12-14 06:33:36,553 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1591606566] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-14 06:33:36,553 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1257640522] [2022-12-14 06:33:36,554 INFO L159 IcfgInterpreter]: Started Sifa with 16 locations of interest [2022-12-14 06:33:36,554 INFO L166 IcfgInterpreter]: Building call graph [2022-12-14 06:33:36,554 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2022-12-14 06:33:36,554 INFO L176 IcfgInterpreter]: Starting interpretation [2022-12-14 06:33:36,555 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2022-12-14 06:33:36,566 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 06:33:36,578 INFO L321 Elim1Store]: treesize reduction 18, result has 35.7 percent of original size [2022-12-14 06:33:36,578 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 5 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 2 case distinctions, treesize of input 27 treesize of output 37 [2022-12-14 06:33:36,585 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 06:33:36,586 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 26 [2022-12-14 06:33:36,602 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 06:33:36,602 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 33 [2022-12-14 06:33:36,637 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 06:33:36,639 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 06:33:36,654 INFO L321 Elim1Store]: treesize reduction 49, result has 12.5 percent of original size [2022-12-14 06:33:36,654 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 234 treesize of output 222 [2022-12-14 06:33:36,694 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 12 [2022-12-14 06:33:36,803 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 06:33:36,803 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 20 [2022-12-14 06:33:36,861 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 06:33:36,861 INFO L173 IndexEqualityManager]: detected equality via solver [2022-12-14 06:33:36,862 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 27 [2022-12-14 06:33:36,886 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 24 [2022-12-14 06:33:36,903 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 24 [2022-12-14 06:33:36,915 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 12 [2022-12-14 06:33:36,982 INFO L197 IcfgInterpreter]: Interpreting procedure rangesum with input of size 17 for LOIs [2022-12-14 06:33:37,024 INFO L180 IcfgInterpreter]: Interpretation finished [2022-12-14 06:33:37,826 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '1568#(and (<= 0 |ULTIMATE.start_init_nondet_#in~x#1.offset|) (<= 0 |ULTIMATE.start_init_nondet_~x#1.offset|) (<= 1 |ULTIMATE.start_init_nondet_~i~0#1|) (<= |ULTIMATE.start_main_~ret2~0#1| 2147483647) (<= ~N~0 2147483647) (<= |ULTIMATE.start_init_nondet_#in~x#1.offset| 0) (or (not (= |ULTIMATE.start_main_~ret2~0#1| |ULTIMATE.start_main_~ret~1#1|)) (not (= |ULTIMATE.start_main_~ret5~0#1| |ULTIMATE.start_main_~ret~1#1|))) (<= 1 ~N~0) (<= |ULTIMATE.start_init_nondet_~x#1.offset| 0) (<= 0 |ULTIMATE.start_main_~i~2#1|) (<= 0 (+ |ULTIMATE.start_main_~ret~1#1| 2147483648)) (<= 0 |ULTIMATE.start_init_nondet_~x#1.base|) (<= 0 (+ |ULTIMATE.start_main_~ret5~0#1| 2147483648)) (<= |ULTIMATE.start_main_~ret~1#1| 2147483647) (= |ULTIMATE.start_main_~#x~0#1.offset| 0) (<= 0 (+ |ULTIMATE.start_main_~ret2~0#1| 2147483648)) (<= 0 |ULTIMATE.start_init_nondet_#in~x#1.base|) (= |#NULL.offset| 0) (<= |ULTIMATE.start_main_~ret5~0#1| 2147483647) (<= 0 |ULTIMATE.start_main_~#x~0#1.base|) (<= 0 |#StackHeapBarrier|) (= |#NULL.base| 0))' at error location [2022-12-14 06:33:37,826 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2022-12-14 06:33:37,826 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-12-14 06:33:37,826 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 10 [2022-12-14 06:33:37,826 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1436416569] [2022-12-14 06:33:37,826 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-12-14 06:33:37,827 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-12-14 06:33:37,827 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 06:33:37,827 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-12-14 06:33:37,828 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=97, Invalid=409, Unknown=0, NotChecked=0, Total=506 [2022-12-14 06:33:37,828 INFO L87 Difference]: Start difference. First operand 22 states and 26 transitions. Second operand has 10 states, 10 states have (on average 2.5) internal successors, (25), 10 states have internal predecessors, (25), 2 states have call successors, (6), 3 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2022-12-14 06:33:37,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 06:33:37,921 INFO L93 Difference]: Finished difference Result 33 states and 38 transitions. [2022-12-14 06:33:37,921 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-12-14 06:33:37,922 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 2.5) internal successors, (25), 10 states have internal predecessors, (25), 2 states have call successors, (6), 3 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 31 [2022-12-14 06:33:37,922 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 06:33:37,922 INFO L225 Difference]: With dead ends: 33 [2022-12-14 06:33:37,922 INFO L226 Difference]: Without dead ends: 23 [2022-12-14 06:33:37,923 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 66 SyntacticMatches, 4 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 176 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=124, Invalid=526, Unknown=0, NotChecked=0, Total=650 [2022-12-14 06:33:37,923 INFO L413 NwaCegarLoop]: 10 mSDtfsCounter, 27 mSDsluCounter, 19 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 27 SdHoareTripleChecker+Valid, 29 SdHoareTripleChecker+Invalid, 81 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-12-14 06:33:37,924 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [27 Valid, 29 Invalid, 81 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-12-14 06:33:37,924 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2022-12-14 06:33:37,932 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2022-12-14 06:33:37,932 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-12-14 06:33:37,933 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 27 transitions. [2022-12-14 06:33:37,933 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 27 transitions. Word has length 31 [2022-12-14 06:33:37,933 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 06:33:37,933 INFO L495 AbstractCegarLoop]: Abstraction has 23 states and 27 transitions. [2022-12-14 06:33:37,933 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 2.5) internal successors, (25), 10 states have internal predecessors, (25), 2 states have call successors, (6), 3 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2022-12-14 06:33:37,933 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 27 transitions. [2022-12-14 06:33:37,934 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-12-14 06:33:37,934 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 06:33:37,934 INFO L195 NwaCegarLoop]: trace histogram [6, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 06:33:37,939 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2022-12-14 06:33:38,135 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable6 [2022-12-14 06:33:38,136 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-12-14 06:33:38,137 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 06:33:38,137 INFO L85 PathProgramCache]: Analyzing trace with hash 221279939, now seen corresponding path program 4 times [2022-12-14 06:33:38,138 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 06:33:38,138 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2075498536] [2022-12-14 06:33:38,138 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 06:33:38,139 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 06:33:38,172 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-12-14 06:33:38,172 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [214592881] [2022-12-14 06:33:38,172 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-12-14 06:33:38,172 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 06:33:38,172 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 [2022-12-14 06:33:38,173 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-14 06:33:38,174 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-12-14 06:33:38,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 06:33:38,243 INFO L263 TraceCheckSpWp]: Trace formula consists of 203 conjuncts, 8 conjunts are in the unsatisfiable core [2022-12-14 06:33:38,245 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-14 06:33:38,288 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 23 proven. 6 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2022-12-14 06:33:38,288 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-14 06:33:38,366 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 3 proven. 26 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2022-12-14 06:33:38,366 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 06:33:38,366 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2075498536] [2022-12-14 06:33:38,366 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-12-14 06:33:38,366 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [214592881] [2022-12-14 06:33:38,366 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [214592881] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-14 06:33:38,366 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [954516458] [2022-12-14 06:33:38,368 INFO L159 IcfgInterpreter]: Started Sifa with 16 locations of interest [2022-12-14 06:33:38,368 INFO L166 IcfgInterpreter]: Building call graph [2022-12-14 06:33:38,369 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2022-12-14 06:33:38,369 INFO L176 IcfgInterpreter]: Starting interpretation [2022-12-14 06:33:38,369 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2022-12-14 06:33:38,381 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 06:33:38,393 INFO L321 Elim1Store]: treesize reduction 18, result has 35.7 percent of original size [2022-12-14 06:33:38,393 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 5 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 2 case distinctions, treesize of input 27 treesize of output 37 [2022-12-14 06:33:38,401 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 06:33:38,402 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 26 [2022-12-14 06:33:38,413 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 06:33:38,414 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 28 [2022-12-14 06:33:38,449 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 06:33:38,450 INFO L173 IndexEqualityManager]: detected equality via solver [2022-12-14 06:33:38,471 INFO L321 Elim1Store]: treesize reduction 54, result has 28.0 percent of original size [2022-12-14 06:33:38,472 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 224 treesize of output 223 [2022-12-14 06:33:38,533 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 12 [2022-12-14 06:33:38,594 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 20 [2022-12-14 06:33:38,671 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 06:33:38,672 INFO L173 IndexEqualityManager]: detected equality via solver [2022-12-14 06:33:38,672 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 27 [2022-12-14 06:33:38,696 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 06:33:38,705 INFO L321 Elim1Store]: treesize reduction 45, result has 6.3 percent of original size [2022-12-14 06:33:38,705 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 4 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 80 treesize of output 72 [2022-12-14 06:33:38,729 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 24 [2022-12-14 06:33:38,750 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 12 [2022-12-14 06:33:38,872 INFO L197 IcfgInterpreter]: Interpreting procedure rangesum with input of size 17 for LOIs [2022-12-14 06:33:38,910 INFO L180 IcfgInterpreter]: Interpretation finished [2022-12-14 06:33:39,602 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '1875#(and (<= 0 |ULTIMATE.start_init_nondet_#in~x#1.offset|) (<= 0 |ULTIMATE.start_init_nondet_~x#1.offset|) (<= 1 |ULTIMATE.start_init_nondet_~i~0#1|) (<= |ULTIMATE.start_main_~ret2~0#1| 2147483647) (<= ~N~0 2147483647) (<= |ULTIMATE.start_init_nondet_#in~x#1.offset| 0) (or (not (= |ULTIMATE.start_main_~ret2~0#1| |ULTIMATE.start_main_~ret~1#1|)) (not (= |ULTIMATE.start_main_~ret5~0#1| |ULTIMATE.start_main_~ret~1#1|))) (<= 1 ~N~0) (<= |ULTIMATE.start_init_nondet_~x#1.offset| 0) (<= 0 |ULTIMATE.start_main_~i~2#1|) (<= 0 (+ |ULTIMATE.start_main_~ret~1#1| 2147483648)) (<= 0 |ULTIMATE.start_init_nondet_~x#1.base|) (<= 0 (+ |ULTIMATE.start_main_~ret5~0#1| 2147483648)) (<= |ULTIMATE.start_main_~ret~1#1| 2147483647) (= |ULTIMATE.start_main_~#x~0#1.offset| 0) (<= 0 (+ |ULTIMATE.start_main_~ret2~0#1| 2147483648)) (<= 0 |ULTIMATE.start_init_nondet_#in~x#1.base|) (= |#NULL.offset| 0) (<= |ULTIMATE.start_main_~ret5~0#1| 2147483647) (<= 0 |ULTIMATE.start_main_~#x~0#1.base|) (<= 0 |#StackHeapBarrier|) (= |#NULL.base| 0))' at error location [2022-12-14 06:33:39,602 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2022-12-14 06:33:39,603 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-12-14 06:33:39,603 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 10] total 13 [2022-12-14 06:33:39,603 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1533347352] [2022-12-14 06:33:39,603 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-12-14 06:33:39,603 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2022-12-14 06:33:39,603 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 06:33:39,604 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-12-14 06:33:39,604 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=114, Invalid=536, Unknown=0, NotChecked=0, Total=650 [2022-12-14 06:33:39,604 INFO L87 Difference]: Start difference. First operand 23 states and 27 transitions. Second operand has 13 states, 12 states have (on average 2.25) internal successors, (27), 13 states have internal predecessors, (27), 2 states have call successors, (6), 3 states have call predecessors, (6), 3 states have return successors, (6), 1 states have call predecessors, (6), 2 states have call successors, (6) [2022-12-14 06:33:39,668 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 06:33:39,668 INFO L93 Difference]: Finished difference Result 40 states and 50 transitions. [2022-12-14 06:33:39,668 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-12-14 06:33:39,668 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 12 states have (on average 2.25) internal successors, (27), 13 states have internal predecessors, (27), 2 states have call successors, (6), 3 states have call predecessors, (6), 3 states have return successors, (6), 1 states have call predecessors, (6), 2 states have call successors, (6) Word has length 32 [2022-12-14 06:33:39,668 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 06:33:39,669 INFO L225 Difference]: With dead ends: 40 [2022-12-14 06:33:39,669 INFO L226 Difference]: Without dead ends: 24 [2022-12-14 06:33:39,669 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 65 SyntacticMatches, 5 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 245 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=120, Invalid=582, Unknown=0, NotChecked=0, Total=702 [2022-12-14 06:33:39,670 INFO L413 NwaCegarLoop]: 10 mSDtfsCounter, 29 mSDsluCounter, 19 mSDsCounter, 0 mSdLazyCounter, 60 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 29 SdHoareTripleChecker+Valid, 29 SdHoareTripleChecker+Invalid, 68 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 60 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-12-14 06:33:39,670 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [29 Valid, 29 Invalid, 68 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 60 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-12-14 06:33:39,670 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2022-12-14 06:33:39,680 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2022-12-14 06:33:39,681 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 19 states have (on average 1.1578947368421053) internal successors, (22), 19 states have internal predecessors, (22), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-12-14 06:33:39,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 28 transitions. [2022-12-14 06:33:39,681 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 28 transitions. Word has length 32 [2022-12-14 06:33:39,681 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 06:33:39,682 INFO L495 AbstractCegarLoop]: Abstraction has 24 states and 28 transitions. [2022-12-14 06:33:39,682 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 12 states have (on average 2.25) internal successors, (27), 13 states have internal predecessors, (27), 2 states have call successors, (6), 3 states have call predecessors, (6), 3 states have return successors, (6), 1 states have call predecessors, (6), 2 states have call successors, (6) [2022-12-14 06:33:39,682 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 28 transitions. [2022-12-14 06:33:39,682 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-12-14 06:33:39,682 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 06:33:39,683 INFO L195 NwaCegarLoop]: trace histogram [9, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 06:33:39,687 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2022-12-14 06:33:39,883 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable7 [2022-12-14 06:33:39,884 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-12-14 06:33:39,885 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 06:33:39,886 INFO L85 PathProgramCache]: Analyzing trace with hash 795085204, now seen corresponding path program 5 times [2022-12-14 06:33:39,886 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 06:33:39,887 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [49684220] [2022-12-14 06:33:39,887 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 06:33:39,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 06:33:39,940 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-12-14 06:33:39,940 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1720912431] [2022-12-14 06:33:39,940 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-12-14 06:33:39,940 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 06:33:39,940 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 [2022-12-14 06:33:39,941 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-14 06:33:39,943 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-12-14 06:33:40,162 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2022-12-14 06:33:40,162 INFO L229 tOrderPrioritization]: Conjunction of SSA is sat [2022-12-14 06:33:40,162 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-14 06:33:40,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-14 06:33:40,267 INFO L130 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2022-12-14 06:33:40,267 INFO L360 BasicCegarLoop]: Counterexample is feasible [2022-12-14 06:33:40,268 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-12-14 06:33:40,275 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2022-12-14 06:33:40,470 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 06:33:40,475 INFO L445 BasicCegarLoop]: Path program histogram: [5, 2, 1, 1] [2022-12-14 06:33:40,481 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-12-14 06:33:40,527 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 14.12 06:33:40 BoogieIcfgContainer [2022-12-14 06:33:40,527 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-12-14 06:33:40,528 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-12-14 06:33:40,528 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-12-14 06:33:40,528 INFO L275 PluginConnector]: Witness Printer initialized [2022-12-14 06:33:40,528 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.12 06:32:22" (3/4) ... [2022-12-14 06:33:40,530 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2022-12-14 06:33:40,562 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/witness.graphml [2022-12-14 06:33:40,562 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-12-14 06:33:40,562 INFO L158 Benchmark]: Toolchain (without parser) took 78506.15ms. Allocated memory was 119.5MB in the beginning and 144.7MB in the end (delta: 25.2MB). Free memory was 78.5MB in the beginning and 93.3MB in the end (delta: -14.8MB). Peak memory consumption was 12.7MB. Max. memory is 16.1GB. [2022-12-14 06:33:40,562 INFO L158 Benchmark]: CDTParser took 0.19ms. Allocated memory is still 119.5MB. Free memory is still 91.1MB. There was no memory consumed. Max. memory is 16.1GB. [2022-12-14 06:33:40,562 INFO L158 Benchmark]: CACSL2BoogieTranslator took 161.24ms. Allocated memory is still 119.5MB. Free memory was 78.1MB in the beginning and 67.6MB in the end (delta: 10.5MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. [2022-12-14 06:33:40,562 INFO L158 Benchmark]: Boogie Procedure Inliner took 23.83ms. Allocated memory is still 119.5MB. Free memory was 67.6MB in the beginning and 66.0MB in the end (delta: 1.6MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-12-14 06:33:40,562 INFO L158 Benchmark]: Boogie Preprocessor took 22.64ms. Allocated memory is still 119.5MB. Free memory was 66.0MB in the beginning and 64.7MB in the end (delta: 1.3MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-12-14 06:33:40,563 INFO L158 Benchmark]: RCFGBuilder took 306.74ms. Allocated memory is still 119.5MB. Free memory was 64.7MB in the beginning and 48.8MB in the end (delta: 15.8MB). Peak memory consumption was 14.7MB. Max. memory is 16.1GB. [2022-12-14 06:33:40,563 INFO L158 Benchmark]: TraceAbstraction took 77951.86ms. Allocated memory was 119.5MB in the beginning and 144.7MB in the end (delta: 25.2MB). Free memory was 47.9MB in the beginning and 97.5MB in the end (delta: -49.6MB). There was no memory consumed. Max. memory is 16.1GB. [2022-12-14 06:33:40,563 INFO L158 Benchmark]: Witness Printer took 34.04ms. Allocated memory is still 144.7MB. Free memory was 97.5MB in the beginning and 93.3MB in the end (delta: 4.2MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. [2022-12-14 06:33:40,564 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19ms. Allocated memory is still 119.5MB. Free memory is still 91.1MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 161.24ms. Allocated memory is still 119.5MB. Free memory was 78.1MB in the beginning and 67.6MB in the end (delta: 10.5MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 23.83ms. Allocated memory is still 119.5MB. Free memory was 67.6MB in the beginning and 66.0MB in the end (delta: 1.6MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * Boogie Preprocessor took 22.64ms. Allocated memory is still 119.5MB. Free memory was 66.0MB in the beginning and 64.7MB in the end (delta: 1.3MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * RCFGBuilder took 306.74ms. Allocated memory is still 119.5MB. Free memory was 64.7MB in the beginning and 48.8MB in the end (delta: 15.8MB). Peak memory consumption was 14.7MB. Max. memory is 16.1GB. * TraceAbstraction took 77951.86ms. Allocated memory was 119.5MB in the beginning and 144.7MB in the end (delta: 25.2MB). Free memory was 47.9MB in the beginning and 97.5MB in the end (delta: -49.6MB). There was no memory consumed. Max. memory is 16.1GB. * Witness Printer took 34.04ms. Allocated memory is still 144.7MB. Free memory was 97.5MB in the beginning and 93.3MB in the end (delta: 4.2MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 64]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L15] int N; [L43] N = __VERIFIER_nondet_int() [L44] COND TRUE N > 1 [L45] int x[N]; [L46] CALL init_nondet(x) [L17] int i; [L18] i = 0 VAL [i=0, N=3, x={3:0}, x={3:0}] [L18] COND TRUE i < N [L19] x[i] = __VERIFIER_nondet_int() [L18] i++ VAL [i=1, N=3, x={3:0}, x={3:0}] [L18] COND TRUE i < N [L19] x[i] = __VERIFIER_nondet_int() [L18] i++ VAL [i=2, N=3, x={3:0}, x={3:0}] [L18] COND TRUE i < N [L19] x[i] = __VERIFIER_nondet_int() [L18] i++ VAL [i=3, N=3, x={3:0}, x={3:0}] [L18] COND FALSE !(i < N) [L46] RET init_nondet(x) [L47] int temp; [L48] int ret; [L49] int ret2; [L50] int ret5; VAL [N=3, x={3:0}] [L52] CALL, EXPR rangesum(x) VAL [N=3, x={3:0}] [L25] int i; [L26] long long ret; [L27] ret = 0 [L28] int cnt = 0; [L29] i = 0 VAL [cnt=0, i=0, N=3, ret=0, x={3:0}, x={3:0}] [L29] COND TRUE i < N [L30] COND FALSE !(i > N/2) [L29] i++ VAL [cnt=0, i=1, N=3, ret=0, x={3:0}, x={3:0}, x[i]=22] [L29] COND TRUE i < N [L30] COND FALSE !(i > N/2) [L29] i++ VAL [cnt=0, i=2, N=3, ret=0, x={3:0}, x={3:0}, x[i]=22] [L29] COND TRUE i < N [L30] COND TRUE i > N/2 [L31] EXPR x[i] [L31] ret = ret + x[i] [L32] cnt = cnt + 1 [L29] i++ VAL [cnt=1, i=3, N=3, ret=2, x={3:0}, x={3:0}, x[i]=0] [L29] COND FALSE !(i < N) [L35] COND TRUE cnt !=0 [L36] return ret / cnt; [L52] RET, EXPR rangesum(x) VAL [N=3, rangesum(x)=2, x={3:0}] [L52] ret = rangesum(x) [L54] EXPR x[0] [L54] temp=x[0] [L54] EXPR x[1] [L54] x[0] = x[1] [L54] x[1] = temp VAL [N=3, ret=2, temp=1, x={3:0}] [L55] CALL, EXPR rangesum(x) VAL [N=3, x={3:0}] [L25] int i; [L26] long long ret; [L27] ret = 0 [L28] int cnt = 0; [L29] i = 0 VAL [cnt=0, i=0, N=3, ret=0, x={3:0}, x={3:0}] [L29] COND TRUE i < N [L30] COND FALSE !(i > N/2) [L29] i++ VAL [cnt=0, i=1, N=3, ret=0, x={3:0}, x={3:0}, x[i]=37] [L29] COND TRUE i < N [L30] COND FALSE !(i > N/2) [L29] i++ VAL [cnt=0, i=2, N=3, ret=0, x={3:0}, x={3:0}, x[i]=37] [L29] COND TRUE i < N [L30] COND TRUE i > N/2 [L31] EXPR x[i] [L31] ret = ret + x[i] [L32] cnt = cnt + 1 [L29] i++ VAL [cnt=1, i=3, N=3, ret=2, x={3:0}, x={3:0}, x[i]=0] [L29] COND FALSE !(i < N) [L35] COND TRUE cnt !=0 [L36] return ret / cnt; [L55] RET, EXPR rangesum(x) VAL [N=3, rangesum(x)=2, ret=2, temp=1, x={3:0}] [L55] ret2 = rangesum(x) [L56] EXPR x[0] [L56] temp=x[0] [L57] int i =0 ; VAL [i=0, N=3, ret=2, ret2=2, temp=0, x={3:0}] [L57] COND TRUE i N/2) [L29] i++ VAL [cnt=0, i=1, N=3, ret=0, x={3:0}, x={3:0}, x[i]=65] [L29] COND TRUE i < N [L30] COND FALSE !(i > N/2) [L29] i++ VAL [cnt=0, i=2, N=3, ret=0, x={3:0}, x={3:0}, x[i]=65] [L29] COND TRUE i < N [L30] COND TRUE i > N/2 [L31] EXPR x[i] [L31] ret = ret + x[i] [L32] cnt = cnt + 1 [L29] i++ VAL [cnt=1, i=3, N=3, ret=0, x={3:0}, x={3:0}, x[i]=0] [L29] COND FALSE !(i < N) [L35] COND TRUE cnt !=0 [L36] return ret / cnt; [L61] RET, EXPR rangesum(x) VAL [i=2, N=3, rangesum(x)=0, ret=2, ret2=2, temp=0, x={3:0}] [L61] ret5 = rangesum(x) [L63] COND TRUE ret != ret2 || ret !=ret5 VAL [i=2, N=3, ret=2, ret2=2, ret5=0, temp=0, x={3:0}] [L64] reach_error() VAL [i=2, N=3, ret=2, ret2=2, ret5=0, temp=0, x={3:0}] - StatisticsResult: Ultimate Automizer benchmark data CFG has 2 procedures, 19 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 77.8s, OverallIterations: 9, TraceHistogramMax: 9, PathProgramHistogramMax: 5, EmptinessCheckTime: 0.0s, AutomataDifference: 13.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 105 SdHoareTripleChecker+Valid, 1.0s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 102 mSDsluCounter, 269 SdHoareTripleChecker+Invalid, 0.9s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 64 IncrementalHoareTripleChecker+Unchecked, 178 mSDsCounter, 33 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 568 IncrementalHoareTripleChecker+Invalid, 665 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 33 mSolverCounterUnsat, 91 mSDtfsCounter, 568 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 552 GetRequests, 380 SyntacticMatches, 15 SemanticMatches, 157 ConstructedPredicates, 4 IntricatePredicates, 0 DeprecatedPredicates, 1723 ImplicationChecksByTransitivity, 40.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=24occurred in iteration=8, InterpolantAutomatonStates: 66, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 8 MinimizatonAttempts, 2 StatesRemovedByMinimization, 1 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.6s SatisfiabilityAnalysisTime, 53.9s InterpolantComputationTime, 270 NumberOfCodeBlocks, 263 NumberOfCodeBlocksAsserted, 21 NumberOfCheckSat, 367 ConstructedInterpolants, 2 QuantifiedInterpolants, 3766 SizeOfPredicates, 52 NumberOfNonLiveVariables, 1333 ConjunctsInSsa, 74 ConjunctsInUnsatCore, 14 InterpolantComputations, 2 PerfectInterpolantSequences, 331/439 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: OVERALL_TIME: 0.5s, ICFG_INTERPRETER_ENTERED_PROCEDURES: 2, DAG_INTERPRETER_EARLY_EXIT_QUERIES_NONTRIVIAL: 8, DAG_INTERPRETER_EARLY_EXITS: 2, TOOLS_POST_APPLICATIONS: 10, TOOLS_POST_TIME: 0.3s, TOOLS_POST_CALL_APPLICATIONS: 3, TOOLS_POST_CALL_TIME: 0.1s, TOOLS_POST_RETURN_APPLICATIONS: 2, TOOLS_POST_RETURN_TIME: 0.0s, TOOLS_QUANTIFIERELIM_APPLICATIONS: 15, TOOLS_QUANTIFIERELIM_TIME: 0.4s, TOOLS_QUANTIFIERELIM_MAX_TIME: 0.1s, FLUID_QUERY_TIME: 0.0s, FLUID_QUERIES: 31, FLUID_YES_ANSWERS: 0, DOMAIN_JOIN_APPLICATIONS: 0, DOMAIN_JOIN_TIME: 0.0s, DOMAIN_ALPHA_APPLICATIONS: 0, DOMAIN_ALPHA_TIME: 0.0s, DOMAIN_WIDEN_APPLICATIONS: 2, DOMAIN_WIDEN_TIME: 0.0s, DOMAIN_ISSUBSETEQ_APPLICATIONS: 3, DOMAIN_ISSUBSETEQ_TIME: 0.0s, DOMAIN_ISBOTTOM_APPLICATIONS: 8, DOMAIN_ISBOTTOM_TIME: 0.0s, LOOP_SUMMARIZER_APPLICATIONS: 1, LOOP_SUMMARIZER_CACHE_MISSES: 1, LOOP_SUMMARIZER_OVERALL_TIME: 0.2s, LOOP_SUMMARIZER_NEW_COMPUTATION_TIME: 0.2s, LOOP_SUMMARIZER_FIXPOINT_ITERATIONS: 3, CALL_SUMMARIZER_APPLICATIONS: 2, CALL_SUMMARIZER_CACHE_MISSES: 1, CALL_SUMMARIZER_OVERALL_TIME: 0.0s, CALL_SUMMARIZER_NEW_COMPUTATION_TIME: 0.0s, PROCEDURE_GRAPH_BUILDER_TIME: 0.0s, PATH_EXPR_TIME: 0.0s, REGEX_TO_DAG_TIME: 0.0s, DAG_COMPRESSION_TIME: 0.0s, DAG_COMPRESSION_PROCESSED_NODES: 185, DAG_COMPRESSION_RETAINED_NODES: 47, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2022-12-14 06:33:40,627 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_479efd22-71aa-4859-85e3-7b28091f44ab/bin/utaipan-gh47qXpMRh/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE