./Ultimate.py --spec ../../sv-benchmarks/c/properties/valid-memsafety.prp --file ../../sv-benchmarks/c/memsafety/20051113-1.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version 2329fc70 Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/config/TaipanMemDerefMemtrack.xml -i ../../sv-benchmarks/c/memsafety/20051113-1.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 2a43a02844acf962bfa6f77d0e1512c06ac1cc2fb3c3905e584a292a069b5426 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-2329fc7 [2022-12-14 10:59:48,618 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-12-14 10:59:48,619 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-12-14 10:59:48,633 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-12-14 10:59:48,633 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-12-14 10:59:48,634 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-12-14 10:59:48,635 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-12-14 10:59:48,636 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-12-14 10:59:48,637 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-12-14 10:59:48,638 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-12-14 10:59:48,638 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-12-14 10:59:48,639 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-12-14 10:59:48,640 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-12-14 10:59:48,641 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-12-14 10:59:48,641 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-12-14 10:59:48,642 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-12-14 10:59:48,643 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-12-14 10:59:48,644 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-12-14 10:59:48,645 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-12-14 10:59:48,646 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-12-14 10:59:48,647 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-12-14 10:59:48,649 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-12-14 10:59:48,651 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-12-14 10:59:48,652 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-12-14 10:59:48,654 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-12-14 10:59:48,654 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-12-14 10:59:48,655 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-12-14 10:59:48,656 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-12-14 10:59:48,656 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-12-14 10:59:48,657 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-12-14 10:59:48,657 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-12-14 10:59:48,658 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-12-14 10:59:48,658 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-12-14 10:59:48,659 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-12-14 10:59:48,660 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-12-14 10:59:48,660 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-12-14 10:59:48,660 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-12-14 10:59:48,660 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-12-14 10:59:48,661 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-12-14 10:59:48,661 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-12-14 10:59:48,662 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-12-14 10:59:48,662 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Default.epf [2022-12-14 10:59:48,678 INFO L113 SettingsManager]: Loading preferences was successful [2022-12-14 10:59:48,678 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-12-14 10:59:48,678 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-12-14 10:59:48,679 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-12-14 10:59:48,679 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-12-14 10:59:48,679 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-12-14 10:59:48,679 INFO L138 SettingsManager]: * User list type=DISABLED [2022-12-14 10:59:48,680 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-12-14 10:59:48,680 INFO L138 SettingsManager]: * Explicit value domain=true [2022-12-14 10:59:48,680 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2022-12-14 10:59:48,680 INFO L138 SettingsManager]: * Octagon Domain=false [2022-12-14 10:59:48,680 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-12-14 10:59:48,680 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2022-12-14 10:59:48,680 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2022-12-14 10:59:48,681 INFO L138 SettingsManager]: * Interval Domain=false [2022-12-14 10:59:48,681 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2022-12-14 10:59:48,681 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2022-12-14 10:59:48,681 INFO L138 SettingsManager]: * Simplification Technique=POLY_PAC [2022-12-14 10:59:48,682 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-12-14 10:59:48,682 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-12-14 10:59:48,682 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-12-14 10:59:48,682 INFO L138 SettingsManager]: * sizeof long=4 [2022-12-14 10:59:48,682 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-12-14 10:59:48,683 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-12-14 10:59:48,683 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-12-14 10:59:48,683 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-12-14 10:59:48,683 INFO L138 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2022-12-14 10:59:48,683 INFO L138 SettingsManager]: * Bitprecise bitfields=true [2022-12-14 10:59:48,683 INFO L138 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2022-12-14 10:59:48,684 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-12-14 10:59:48,684 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-12-14 10:59:48,684 INFO L138 SettingsManager]: * sizeof long double=12 [2022-12-14 10:59:48,684 INFO L138 SettingsManager]: * Use constant arrays=true [2022-12-14 10:59:48,684 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-12-14 10:59:48,684 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-12-14 10:59:48,684 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-12-14 10:59:48,685 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-12-14 10:59:48,685 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2022-12-14 10:59:48,685 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-12-14 10:59:48,685 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2022-12-14 10:59:48,685 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-12-14 10:59:48,685 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-12-14 10:59:48,686 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2a43a02844acf962bfa6f77d0e1512c06ac1cc2fb3c3905e584a292a069b5426 [2022-12-14 10:59:48,862 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-12-14 10:59:48,881 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-12-14 10:59:48,883 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-12-14 10:59:48,885 INFO L271 PluginConnector]: Initializing CDTParser... [2022-12-14 10:59:48,885 INFO L275 PluginConnector]: CDTParser initialized [2022-12-14 10:59:48,886 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/../../sv-benchmarks/c/memsafety/20051113-1.i [2022-12-14 10:59:51,402 INFO L500 CDTParser]: Created temporary CDT project at NULL [2022-12-14 10:59:51,605 INFO L351 CDTParser]: Found 1 translation units. [2022-12-14 10:59:51,606 INFO L172 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/sv-benchmarks/c/memsafety/20051113-1.i [2022-12-14 10:59:51,618 INFO L394 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/data/82deef66b/51fda472b7c7492ea0a8b4bb245ada0f/FLAG24bd06856 [2022-12-14 10:59:51,959 INFO L402 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/data/82deef66b/51fda472b7c7492ea0a8b4bb245ada0f [2022-12-14 10:59:51,960 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-12-14 10:59:51,961 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-12-14 10:59:51,962 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-12-14 10:59:51,962 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-12-14 10:59:51,966 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-12-14 10:59:51,966 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.12 10:59:51" (1/1) ... [2022-12-14 10:59:51,967 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1cfa8636 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 10:59:51, skipping insertion in model container [2022-12-14 10:59:51,967 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.12 10:59:51" (1/1) ... [2022-12-14 10:59:51,973 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-12-14 10:59:51,994 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-12-14 10:59:52,188 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-12-14 10:59:52,197 INFO L203 MainTranslator]: Completed pre-run [2022-12-14 10:59:52,231 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-12-14 10:59:52,248 INFO L208 MainTranslator]: Completed translation [2022-12-14 10:59:52,248 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 10:59:52 WrapperNode [2022-12-14 10:59:52,248 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-12-14 10:59:52,249 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-12-14 10:59:52,249 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-12-14 10:59:52,249 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-12-14 10:59:52,255 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 10:59:52" (1/1) ... [2022-12-14 10:59:52,263 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 10:59:52" (1/1) ... [2022-12-14 10:59:52,278 INFO L138 Inliner]: procedures = 125, calls = 23, calls flagged for inlining = 5, calls inlined = 5, statements flattened = 77 [2022-12-14 10:59:52,279 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-12-14 10:59:52,279 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-12-14 10:59:52,279 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-12-14 10:59:52,279 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-12-14 10:59:52,285 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 10:59:52" (1/1) ... [2022-12-14 10:59:52,286 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 10:59:52" (1/1) ... [2022-12-14 10:59:52,288 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 10:59:52" (1/1) ... [2022-12-14 10:59:52,288 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 10:59:52" (1/1) ... [2022-12-14 10:59:52,292 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 10:59:52" (1/1) ... [2022-12-14 10:59:52,295 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 10:59:52" (1/1) ... [2022-12-14 10:59:52,295 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 10:59:52" (1/1) ... [2022-12-14 10:59:52,296 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 10:59:52" (1/1) ... [2022-12-14 10:59:52,298 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-12-14 10:59:52,298 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-12-14 10:59:52,298 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-12-14 10:59:52,299 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-12-14 10:59:52,299 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 10:59:52" (1/1) ... [2022-12-14 10:59:52,304 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-12-14 10:59:52,312 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 [2022-12-14 10:59:52,321 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-12-14 10:59:52,322 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-12-14 10:59:52,347 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-12-14 10:59:52,347 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-12-14 10:59:52,347 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-12-14 10:59:52,347 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-12-14 10:59:52,347 INFO L130 BoogieDeclarations]: Found specification of procedure dummy_abort [2022-12-14 10:59:52,347 INFO L138 BoogieDeclarations]: Found implementation of procedure dummy_abort [2022-12-14 10:59:52,347 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-12-14 10:59:52,347 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-12-14 10:59:52,348 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-12-14 10:59:52,427 INFO L235 CfgBuilder]: Building ICFG [2022-12-14 10:59:52,428 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-12-14 10:59:52,623 INFO L276 CfgBuilder]: Performing block encoding [2022-12-14 10:59:52,646 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-12-14 10:59:52,646 INFO L300 CfgBuilder]: Removed 2 assume(true) statements. [2022-12-14 10:59:52,648 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.12 10:59:52 BoogieIcfgContainer [2022-12-14 10:59:52,648 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-12-14 10:59:52,650 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-12-14 10:59:52,650 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-12-14 10:59:52,653 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-12-14 10:59:52,653 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 14.12 10:59:51" (1/3) ... [2022-12-14 10:59:52,654 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@42e4ba2c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.12 10:59:52, skipping insertion in model container [2022-12-14 10:59:52,654 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 10:59:52" (2/3) ... [2022-12-14 10:59:52,655 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@42e4ba2c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.12 10:59:52, skipping insertion in model container [2022-12-14 10:59:52,655 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.12 10:59:52" (3/3) ... [2022-12-14 10:59:52,656 INFO L112 eAbstractionObserver]: Analyzing ICFG 20051113-1.i [2022-12-14 10:59:52,671 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-12-14 10:59:52,671 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 25 error locations. [2022-12-14 10:59:52,705 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-12-14 10:59:52,709 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@46197358, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-12-14 10:59:52,710 INFO L358 AbstractCegarLoop]: Starting to check reachability of 25 error locations. [2022-12-14 10:59:52,713 INFO L276 IsEmpty]: Start isEmpty. Operand has 54 states, 25 states have (on average 2.28) internal successors, (57), 52 states have internal predecessors, (57), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-14 10:59:52,717 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 3 [2022-12-14 10:59:52,717 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 10:59:52,718 INFO L195 NwaCegarLoop]: trace histogram [1, 1] [2022-12-14 10:59:52,718 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-14 10:59:52,723 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 10:59:52,723 INFO L85 PathProgramCache]: Analyzing trace with hash 4437, now seen corresponding path program 1 times [2022-12-14 10:59:52,731 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 10:59:52,731 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1240702411] [2022-12-14 10:59:52,732 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 10:59:52,732 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 10:59:52,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 10:59:52,905 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-14 10:59:52,906 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 10:59:52,906 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1240702411] [2022-12-14 10:59:52,906 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1240702411] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-14 10:59:52,907 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-14 10:59:52,907 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2022-12-14 10:59:52,908 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1176937258] [2022-12-14 10:59:52,909 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-14 10:59:52,912 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-12-14 10:59:52,913 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 10:59:52,935 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-12-14 10:59:52,936 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-12-14 10:59:52,937 INFO L87 Difference]: Start difference. First operand has 54 states, 25 states have (on average 2.28) internal successors, (57), 52 states have internal predecessors, (57), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand has 3 states, 2 states have (on average 1.0) internal successors, (2), 2 states have internal predecessors, (2), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 10:59:53,003 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 10:59:53,004 INFO L93 Difference]: Finished difference Result 53 states and 58 transitions. [2022-12-14 10:59:53,005 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-12-14 10:59:53,006 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 1.0) internal successors, (2), 2 states have internal predecessors, (2), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 2 [2022-12-14 10:59:53,006 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 10:59:53,011 INFO L225 Difference]: With dead ends: 53 [2022-12-14 10:59:53,011 INFO L226 Difference]: Without dead ends: 52 [2022-12-14 10:59:53,012 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-12-14 10:59:53,016 INFO L413 NwaCegarLoop]: 26 mSDtfsCounter, 52 mSDsluCounter, 1 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 54 SdHoareTripleChecker+Valid, 27 SdHoareTripleChecker+Invalid, 34 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-12-14 10:59:53,017 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [54 Valid, 27 Invalid, 34 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-12-14 10:59:53,029 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2022-12-14 10:59:53,040 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2022-12-14 10:59:53,041 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 25 states have (on average 2.12) internal successors, (53), 50 states have internal predecessors, (53), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-14 10:59:53,042 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 57 transitions. [2022-12-14 10:59:53,043 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 57 transitions. Word has length 2 [2022-12-14 10:59:53,043 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 10:59:53,043 INFO L495 AbstractCegarLoop]: Abstraction has 52 states and 57 transitions. [2022-12-14 10:59:53,043 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 1.0) internal successors, (2), 2 states have internal predecessors, (2), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 10:59:53,044 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 57 transitions. [2022-12-14 10:59:53,044 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2022-12-14 10:59:53,044 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 10:59:53,044 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1] [2022-12-14 10:59:53,044 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-12-14 10:59:53,044 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-14 10:59:53,045 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 10:59:53,045 INFO L85 PathProgramCache]: Analyzing trace with hash 137584, now seen corresponding path program 1 times [2022-12-14 10:59:53,045 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 10:59:53,045 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [600459986] [2022-12-14 10:59:53,045 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 10:59:53,045 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 10:59:53,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 10:59:53,154 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-14 10:59:53,155 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 10:59:53,155 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [600459986] [2022-12-14 10:59:53,155 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [600459986] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-14 10:59:53,155 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-14 10:59:53,155 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2022-12-14 10:59:53,155 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [507387195] [2022-12-14 10:59:53,156 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-14 10:59:53,156 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-12-14 10:59:53,157 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 10:59:53,157 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-12-14 10:59:53,157 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-12-14 10:59:53,157 INFO L87 Difference]: Start difference. First operand 52 states and 57 transitions. Second operand has 3 states, 2 states have (on average 1.5) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 10:59:53,201 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 10:59:53,201 INFO L93 Difference]: Finished difference Result 51 states and 56 transitions. [2022-12-14 10:59:53,202 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-12-14 10:59:53,202 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 1.5) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 3 [2022-12-14 10:59:53,202 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 10:59:53,203 INFO L225 Difference]: With dead ends: 51 [2022-12-14 10:59:53,203 INFO L226 Difference]: Without dead ends: 51 [2022-12-14 10:59:53,203 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-12-14 10:59:53,204 INFO L413 NwaCegarLoop]: 27 mSDtfsCounter, 49 mSDsluCounter, 1 mSDsCounter, 0 mSdLazyCounter, 31 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 51 SdHoareTripleChecker+Valid, 28 SdHoareTripleChecker+Invalid, 31 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 31 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-12-14 10:59:53,205 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [51 Valid, 28 Invalid, 31 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 31 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-12-14 10:59:53,205 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2022-12-14 10:59:53,207 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2022-12-14 10:59:53,207 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 51 states, 25 states have (on average 2.08) internal successors, (52), 49 states have internal predecessors, (52), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-14 10:59:53,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 56 transitions. [2022-12-14 10:59:53,208 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 56 transitions. Word has length 3 [2022-12-14 10:59:53,208 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 10:59:53,209 INFO L495 AbstractCegarLoop]: Abstraction has 51 states and 56 transitions. [2022-12-14 10:59:53,209 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 1.5) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 10:59:53,209 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 56 transitions. [2022-12-14 10:59:53,209 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2022-12-14 10:59:53,209 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 10:59:53,209 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2022-12-14 10:59:53,209 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-12-14 10:59:53,210 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-14 10:59:53,210 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 10:59:53,210 INFO L85 PathProgramCache]: Analyzing trace with hash 132222767, now seen corresponding path program 1 times [2022-12-14 10:59:53,210 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 10:59:53,210 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1374006704] [2022-12-14 10:59:53,210 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 10:59:53,211 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 10:59:53,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 10:59:53,282 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-14 10:59:53,282 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 10:59:53,282 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1374006704] [2022-12-14 10:59:53,282 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1374006704] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-14 10:59:53,282 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-14 10:59:53,282 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-12-14 10:59:53,283 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1130015447] [2022-12-14 10:59:53,283 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-14 10:59:53,283 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-12-14 10:59:53,283 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 10:59:53,284 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-12-14 10:59:53,284 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-12-14 10:59:53,284 INFO L87 Difference]: Start difference. First operand 51 states and 56 transitions. Second operand has 5 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 10:59:53,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 10:59:53,344 INFO L93 Difference]: Finished difference Result 44 states and 49 transitions. [2022-12-14 10:59:53,345 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-12-14 10:59:53,345 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 5 [2022-12-14 10:59:53,345 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 10:59:53,346 INFO L225 Difference]: With dead ends: 44 [2022-12-14 10:59:53,346 INFO L226 Difference]: Without dead ends: 44 [2022-12-14 10:59:53,346 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-12-14 10:59:53,348 INFO L413 NwaCegarLoop]: 19 mSDtfsCounter, 116 mSDsluCounter, 2 mSDsCounter, 0 mSdLazyCounter, 38 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 118 SdHoareTripleChecker+Valid, 21 SdHoareTripleChecker+Invalid, 50 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 38 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-12-14 10:59:53,348 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [118 Valid, 21 Invalid, 50 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 38 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-12-14 10:59:53,349 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2022-12-14 10:59:53,352 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2022-12-14 10:59:53,352 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 44 states, 25 states have (on average 1.8) internal successors, (45), 42 states have internal predecessors, (45), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-14 10:59:53,353 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 49 transitions. [2022-12-14 10:59:53,353 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 49 transitions. Word has length 5 [2022-12-14 10:59:53,353 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 10:59:53,353 INFO L495 AbstractCegarLoop]: Abstraction has 44 states and 49 transitions. [2022-12-14 10:59:53,353 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 10:59:53,353 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 49 transitions. [2022-12-14 10:59:53,353 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2022-12-14 10:59:53,353 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 10:59:53,354 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2022-12-14 10:59:53,354 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-12-14 10:59:53,354 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr3REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-14 10:59:53,354 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 10:59:53,354 INFO L85 PathProgramCache]: Analyzing trace with hash 132222768, now seen corresponding path program 1 times [2022-12-14 10:59:53,355 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 10:59:53,355 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [448959504] [2022-12-14 10:59:53,355 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 10:59:53,355 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 10:59:53,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 10:59:53,485 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-14 10:59:53,485 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 10:59:53,485 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [448959504] [2022-12-14 10:59:53,486 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [448959504] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-14 10:59:53,486 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-14 10:59:53,486 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-12-14 10:59:53,486 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [968110579] [2022-12-14 10:59:53,486 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-14 10:59:53,486 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-12-14 10:59:53,487 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 10:59:53,487 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-12-14 10:59:53,487 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-12-14 10:59:53,488 INFO L87 Difference]: Start difference. First operand 44 states and 49 transitions. Second operand has 5 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 10:59:53,552 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 10:59:53,552 INFO L93 Difference]: Finished difference Result 37 states and 42 transitions. [2022-12-14 10:59:53,553 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-12-14 10:59:53,553 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 5 [2022-12-14 10:59:53,553 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 10:59:53,553 INFO L225 Difference]: With dead ends: 37 [2022-12-14 10:59:53,553 INFO L226 Difference]: Without dead ends: 37 [2022-12-14 10:59:53,554 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2022-12-14 10:59:53,554 INFO L413 NwaCegarLoop]: 19 mSDtfsCounter, 66 mSDsluCounter, 6 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 66 SdHoareTripleChecker+Valid, 25 SdHoareTripleChecker+Invalid, 43 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-12-14 10:59:53,555 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [66 Valid, 25 Invalid, 43 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-12-14 10:59:53,555 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2022-12-14 10:59:53,557 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 37. [2022-12-14 10:59:53,557 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 25 states have (on average 1.52) internal successors, (38), 35 states have internal predecessors, (38), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-14 10:59:53,557 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 42 transitions. [2022-12-14 10:59:53,557 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 42 transitions. Word has length 5 [2022-12-14 10:59:53,558 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 10:59:53,558 INFO L495 AbstractCegarLoop]: Abstraction has 37 states and 42 transitions. [2022-12-14 10:59:53,558 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 10:59:53,558 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 42 transitions. [2022-12-14 10:59:53,558 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2022-12-14 10:59:53,558 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 10:59:53,558 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 10:59:53,559 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-12-14 10:59:53,559 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr16REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-14 10:59:53,559 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 10:59:53,559 INFO L85 PathProgramCache]: Analyzing trace with hash 261368873, now seen corresponding path program 1 times [2022-12-14 10:59:53,559 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 10:59:53,560 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1350886451] [2022-12-14 10:59:53,560 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 10:59:53,560 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 10:59:53,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 10:59:53,624 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-14 10:59:53,625 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 10:59:53,625 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1350886451] [2022-12-14 10:59:53,625 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1350886451] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-14 10:59:53,625 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-14 10:59:53,625 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-12-14 10:59:53,625 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [506723822] [2022-12-14 10:59:53,625 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-14 10:59:53,626 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-12-14 10:59:53,626 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 10:59:53,626 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-12-14 10:59:53,626 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-12-14 10:59:53,626 INFO L87 Difference]: Start difference. First operand 37 states and 42 transitions. Second operand has 4 states, 3 states have (on average 4.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 10:59:53,667 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 10:59:53,667 INFO L93 Difference]: Finished difference Result 35 states and 40 transitions. [2022-12-14 10:59:53,667 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-12-14 10:59:53,667 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 4.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 12 [2022-12-14 10:59:53,668 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 10:59:53,668 INFO L225 Difference]: With dead ends: 35 [2022-12-14 10:59:53,668 INFO L226 Difference]: Without dead ends: 35 [2022-12-14 10:59:53,668 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-12-14 10:59:53,669 INFO L413 NwaCegarLoop]: 17 mSDtfsCounter, 49 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 49 SdHoareTripleChecker+Valid, 20 SdHoareTripleChecker+Invalid, 45 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-12-14 10:59:53,669 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [49 Valid, 20 Invalid, 45 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-12-14 10:59:53,670 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2022-12-14 10:59:53,671 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 35. [2022-12-14 10:59:53,671 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 25 states have (on average 1.44) internal successors, (36), 33 states have internal predecessors, (36), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-14 10:59:53,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 40 transitions. [2022-12-14 10:59:53,672 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 40 transitions. Word has length 12 [2022-12-14 10:59:53,672 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 10:59:53,672 INFO L495 AbstractCegarLoop]: Abstraction has 35 states and 40 transitions. [2022-12-14 10:59:53,672 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 4.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 10:59:53,672 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 40 transitions. [2022-12-14 10:59:53,673 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2022-12-14 10:59:53,673 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 10:59:53,673 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 10:59:53,673 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-12-14 10:59:53,673 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr17REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-14 10:59:53,673 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 10:59:53,674 INFO L85 PathProgramCache]: Analyzing trace with hash 261368874, now seen corresponding path program 1 times [2022-12-14 10:59:53,674 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 10:59:53,674 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1138091567] [2022-12-14 10:59:53,674 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 10:59:53,674 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 10:59:53,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 10:59:53,802 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-14 10:59:53,802 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 10:59:53,802 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1138091567] [2022-12-14 10:59:53,802 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1138091567] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-14 10:59:53,802 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-14 10:59:53,802 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-12-14 10:59:53,803 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [618499246] [2022-12-14 10:59:53,803 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-14 10:59:53,803 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-12-14 10:59:53,803 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 10:59:53,804 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-12-14 10:59:53,804 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-12-14 10:59:53,804 INFO L87 Difference]: Start difference. First operand 35 states and 40 transitions. Second operand has 4 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 10:59:53,844 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 10:59:53,844 INFO L93 Difference]: Finished difference Result 34 states and 39 transitions. [2022-12-14 10:59:53,845 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-12-14 10:59:53,845 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 12 [2022-12-14 10:59:53,845 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 10:59:53,845 INFO L225 Difference]: With dead ends: 34 [2022-12-14 10:59:53,846 INFO L226 Difference]: Without dead ends: 34 [2022-12-14 10:59:53,846 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-12-14 10:59:53,847 INFO L413 NwaCegarLoop]: 19 mSDtfsCounter, 44 mSDsluCounter, 5 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 44 SdHoareTripleChecker+Valid, 24 SdHoareTripleChecker+Invalid, 38 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-12-14 10:59:53,847 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [44 Valid, 24 Invalid, 38 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-12-14 10:59:53,848 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2022-12-14 10:59:53,849 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2022-12-14 10:59:53,850 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 25 states have (on average 1.4) internal successors, (35), 32 states have internal predecessors, (35), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-14 10:59:53,850 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 39 transitions. [2022-12-14 10:59:53,850 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 39 transitions. Word has length 12 [2022-12-14 10:59:53,850 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 10:59:53,850 INFO L495 AbstractCegarLoop]: Abstraction has 34 states and 39 transitions. [2022-12-14 10:59:53,851 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 10:59:53,851 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 39 transitions. [2022-12-14 10:59:53,851 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-12-14 10:59:53,851 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 10:59:53,851 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 10:59:53,851 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2022-12-14 10:59:53,852 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr19REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-14 10:59:53,852 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 10:59:53,852 INFO L85 PathProgramCache]: Analyzing trace with hash 2067384363, now seen corresponding path program 1 times [2022-12-14 10:59:53,852 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 10:59:53,852 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [573333316] [2022-12-14 10:59:53,852 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 10:59:53,853 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 10:59:53,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 10:59:53,978 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-14 10:59:53,978 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 10:59:53,978 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [573333316] [2022-12-14 10:59:53,978 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [573333316] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-14 10:59:53,978 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-14 10:59:53,978 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-12-14 10:59:53,978 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2036881378] [2022-12-14 10:59:53,978 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-14 10:59:53,979 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-12-14 10:59:53,979 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 10:59:53,979 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-12-14 10:59:53,979 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-12-14 10:59:53,980 INFO L87 Difference]: Start difference. First operand 34 states and 39 transitions. Second operand has 4 states, 3 states have (on average 4.666666666666667) internal successors, (14), 3 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 10:59:54,047 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 10:59:54,047 INFO L93 Difference]: Finished difference Result 54 states and 64 transitions. [2022-12-14 10:59:54,048 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-12-14 10:59:54,048 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 4.666666666666667) internal successors, (14), 3 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 14 [2022-12-14 10:59:54,048 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 10:59:54,049 INFO L225 Difference]: With dead ends: 54 [2022-12-14 10:59:54,049 INFO L226 Difference]: Without dead ends: 54 [2022-12-14 10:59:54,049 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-12-14 10:59:54,050 INFO L413 NwaCegarLoop]: 19 mSDtfsCounter, 59 mSDsluCounter, 15 mSDsCounter, 0 mSdLazyCounter, 50 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 61 SdHoareTripleChecker+Valid, 34 SdHoareTripleChecker+Invalid, 54 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 50 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-12-14 10:59:54,050 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [61 Valid, 34 Invalid, 54 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 50 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-12-14 10:59:54,051 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2022-12-14 10:59:54,055 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 37. [2022-12-14 10:59:54,055 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 28 states have (on average 1.3928571428571428) internal successors, (39), 35 states have internal predecessors, (39), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-14 10:59:54,055 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 43 transitions. [2022-12-14 10:59:54,055 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 43 transitions. Word has length 14 [2022-12-14 10:59:54,056 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 10:59:54,056 INFO L495 AbstractCegarLoop]: Abstraction has 37 states and 43 transitions. [2022-12-14 10:59:54,056 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 4.666666666666667) internal successors, (14), 3 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 10:59:54,056 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 43 transitions. [2022-12-14 10:59:54,056 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-12-14 10:59:54,057 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 10:59:54,057 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 10:59:54,057 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2022-12-14 10:59:54,057 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr19REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-14 10:59:54,057 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 10:59:54,057 INFO L85 PathProgramCache]: Analyzing trace with hash -381578525, now seen corresponding path program 1 times [2022-12-14 10:59:54,058 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 10:59:54,058 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1155005947] [2022-12-14 10:59:54,058 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 10:59:54,058 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 10:59:54,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 10:59:54,213 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-14 10:59:54,214 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 10:59:54,214 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1155005947] [2022-12-14 10:59:54,214 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1155005947] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-14 10:59:54,214 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [155550339] [2022-12-14 10:59:54,214 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 10:59:54,214 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 10:59:54,215 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 [2022-12-14 10:59:54,215 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-14 10:59:54,216 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-12-14 10:59:54,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 10:59:54,277 INFO L263 TraceCheckSpWp]: Trace formula consists of 146 conjuncts, 18 conjunts are in the unsatisfiable core [2022-12-14 10:59:54,282 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-14 10:59:54,412 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-14 10:59:54,412 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-14 10:59:54,573 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-12-14 10:59:54,574 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 17 [2022-12-14 10:59:54,616 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-14 10:59:54,616 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [155550339] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-14 10:59:54,617 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [824087083] [2022-12-14 10:59:54,635 INFO L159 IcfgInterpreter]: Started Sifa with 15 locations of interest [2022-12-14 10:59:54,635 INFO L166 IcfgInterpreter]: Building call graph [2022-12-14 10:59:54,639 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2022-12-14 10:59:54,644 INFO L176 IcfgInterpreter]: Starting interpretation [2022-12-14 10:59:54,645 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2022-12-14 10:59:54,683 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 10:59:54,685 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 10:59:54,688 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 22 [2022-12-14 10:59:54,716 INFO L180 IcfgInterpreter]: Interpretation finished [2022-12-14 10:59:54,877 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSifa [824087083] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-14 10:59:54,877 INFO L184 FreeRefinementEngine]: Found 1 perfect and 3 imperfect interpolant sequences. [2022-12-14 10:59:54,878 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [3, 5, 5] total 15 [2022-12-14 10:59:54,878 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1590605935] [2022-12-14 10:59:54,878 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-14 10:59:54,879 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-12-14 10:59:54,879 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 10:59:54,879 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-12-14 10:59:54,879 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=183, Unknown=0, NotChecked=0, Total=240 [2022-12-14 10:59:54,879 INFO L87 Difference]: Start difference. First operand 37 states and 43 transitions. Second operand has 4 states, 4 states have (on average 3.75) internal successors, (15), 3 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 10:59:54,965 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 10:59:54,966 INFO L93 Difference]: Finished difference Result 38 states and 44 transitions. [2022-12-14 10:59:54,966 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-12-14 10:59:54,966 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.75) internal successors, (15), 3 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 17 [2022-12-14 10:59:54,967 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 10:59:54,967 INFO L225 Difference]: With dead ends: 38 [2022-12-14 10:59:54,967 INFO L226 Difference]: Without dead ends: 38 [2022-12-14 10:59:54,967 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 36 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=57, Invalid=183, Unknown=0, NotChecked=0, Total=240 [2022-12-14 10:59:54,968 INFO L413 NwaCegarLoop]: 15 mSDtfsCounter, 21 mSDsluCounter, 9 mSDsCounter, 0 mSdLazyCounter, 53 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 23 SdHoareTripleChecker+Valid, 24 SdHoareTripleChecker+Invalid, 62 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 53 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-12-14 10:59:54,968 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [23 Valid, 24 Invalid, 62 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 53 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-12-14 10:59:54,969 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2022-12-14 10:59:54,970 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 38. [2022-12-14 10:59:54,971 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 29 states have (on average 1.3793103448275863) internal successors, (40), 36 states have internal predecessors, (40), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-14 10:59:54,971 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 44 transitions. [2022-12-14 10:59:54,971 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 44 transitions. Word has length 17 [2022-12-14 10:59:54,971 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 10:59:54,972 INFO L495 AbstractCegarLoop]: Abstraction has 38 states and 44 transitions. [2022-12-14 10:59:54,972 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 3.75) internal successors, (15), 3 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 10:59:54,972 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 44 transitions. [2022-12-14 10:59:54,972 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-12-14 10:59:54,972 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 10:59:54,972 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 10:59:54,979 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-12-14 10:59:55,173 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 10:59:55,174 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr19REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-14 10:59:55,174 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 10:59:55,174 INFO L85 PathProgramCache]: Analyzing trace with hash 1706990188, now seen corresponding path program 1 times [2022-12-14 10:59:55,174 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 10:59:55,174 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1666728223] [2022-12-14 10:59:55,174 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 10:59:55,175 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 10:59:55,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 10:59:55,313 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-12-14 10:59:55,313 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 10:59:55,313 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1666728223] [2022-12-14 10:59:55,314 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1666728223] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-14 10:59:55,314 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1271825619] [2022-12-14 10:59:55,314 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 10:59:55,314 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 10:59:55,314 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 [2022-12-14 10:59:55,315 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-14 10:59:55,316 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-12-14 10:59:55,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 10:59:55,371 INFO L263 TraceCheckSpWp]: Trace formula consists of 153 conjuncts, 18 conjunts are in the unsatisfiable core [2022-12-14 10:59:55,372 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-14 10:59:55,479 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-12-14 10:59:55,479 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-14 10:59:55,607 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-12-14 10:59:55,607 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 17 [2022-12-14 10:59:55,646 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-12-14 10:59:55,646 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1271825619] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-14 10:59:55,646 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1407174815] [2022-12-14 10:59:55,647 INFO L159 IcfgInterpreter]: Started Sifa with 15 locations of interest [2022-12-14 10:59:55,647 INFO L166 IcfgInterpreter]: Building call graph [2022-12-14 10:59:55,647 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2022-12-14 10:59:55,648 INFO L176 IcfgInterpreter]: Starting interpretation [2022-12-14 10:59:55,648 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2022-12-14 10:59:55,660 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 10:59:55,661 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 10:59:55,662 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 22 [2022-12-14 10:59:55,689 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 10:59:55,690 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 28 [2022-12-14 10:59:55,762 INFO L173 IndexEqualityManager]: detected equality via solver [2022-12-14 10:59:55,789 INFO L321 Elim1Store]: treesize reduction 76, result has 25.5 percent of original size [2022-12-14 10:59:55,789 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 5 case distinctions, treesize of input 232 treesize of output 233 [2022-12-14 10:59:55,849 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2022-12-14 10:59:55,870 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-12-14 10:59:55,889 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-12-14 10:59:55,908 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 32 [2022-12-14 10:59:55,931 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 44 [2022-12-14 10:59:55,952 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 56 [2022-12-14 10:59:55,987 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 68 [2022-12-14 10:59:56,022 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 10:59:56,023 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 10:59:56,024 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 10:59:56,025 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 10:59:56,025 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 10:59:56,026 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 10:59:56,028 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 6 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 80 [2022-12-14 10:59:56,122 INFO L180 IcfgInterpreter]: Interpretation finished [2022-12-14 10:59:57,234 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '995#(and (= |ULTIMATE.start_#Ultimate.C_memset_#amount#1| 94) (<= |ULTIMATE.start_Sum_~instrs#1.offset| 0) (<= |ULTIMATE.start_Sum_#in~instrs#1.offset| 0) (<= |ULTIMATE.start_#Ultimate.C_memset_#res#1.offset| 0) (<= 0 |ULTIMATE.start_Sum_~instrs#1.offset|) (<= 0 |ULTIMATE.start_#Ultimate.C_memset_#ptr#1.offset|) (<= |ULTIMATE.start_#Ultimate.C_memset_#ptr#1.offset| 0) (<= 0 |ULTIMATE.start_Sum_#in~instrs#1.offset|) (= |ULTIMATE.start_#Ultimate.C_memset_#value#1| 0) (not (<= (+ (* 30 |ULTIMATE.start_Sum_~i~0#1|) 18 |ULTIMATE.start_Sum_~instrs#1.offset|) (select |#length| |ULTIMATE.start_Sum_~instrs#1.base|))) (<= 0 |ULTIMATE.start_Sum_~i~0#1|) (= |#NULL.offset| 0) (= |ULTIMATE.start_main_~p~0#1.offset| 0) (<= 0 |ULTIMATE.start_#Ultimate.C_memset_#res#1.offset|) (<= 0 |ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) (<= 0 |#StackHeapBarrier|) (= |#NULL.base| 0))' at error location [2022-12-14 10:59:57,234 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2022-12-14 10:59:57,234 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-14 10:59:57,234 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 5, 5] total 12 [2022-12-14 10:59:57,234 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [631259861] [2022-12-14 10:59:57,235 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-14 10:59:57,235 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-12-14 10:59:57,235 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 10:59:57,235 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-12-14 10:59:57,235 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=108, Invalid=542, Unknown=0, NotChecked=0, Total=650 [2022-12-14 10:59:57,236 INFO L87 Difference]: Start difference. First operand 38 states and 44 transitions. Second operand has 14 states, 13 states have (on average 4.076923076923077) internal successors, (53), 13 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 10:59:57,449 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 10:59:57,450 INFO L93 Difference]: Finished difference Result 95 states and 115 transitions. [2022-12-14 10:59:57,450 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-12-14 10:59:57,450 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 13 states have (on average 4.076923076923077) internal successors, (53), 13 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 18 [2022-12-14 10:59:57,450 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 10:59:57,451 INFO L225 Difference]: With dead ends: 95 [2022-12-14 10:59:57,451 INFO L226 Difference]: Without dead ends: 95 [2022-12-14 10:59:57,451 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 27 SyntacticMatches, 4 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 241 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=153, Invalid=717, Unknown=0, NotChecked=0, Total=870 [2022-12-14 10:59:57,452 INFO L413 NwaCegarLoop]: 33 mSDtfsCounter, 255 mSDsluCounter, 74 mSDsCounter, 0 mSdLazyCounter, 195 mSolverCounterSat, 26 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 255 SdHoareTripleChecker+Valid, 107 SdHoareTripleChecker+Invalid, 221 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 26 IncrementalHoareTripleChecker+Valid, 195 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-12-14 10:59:57,452 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [255 Valid, 107 Invalid, 221 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [26 Valid, 195 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-12-14 10:59:57,453 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states. [2022-12-14 10:59:57,455 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 44. [2022-12-14 10:59:57,456 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 44 states, 35 states have (on average 1.3714285714285714) internal successors, (48), 42 states have internal predecessors, (48), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-14 10:59:57,456 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 52 transitions. [2022-12-14 10:59:57,456 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 52 transitions. Word has length 18 [2022-12-14 10:59:57,456 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 10:59:57,456 INFO L495 AbstractCegarLoop]: Abstraction has 44 states and 52 transitions. [2022-12-14 10:59:57,457 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 13 states have (on average 4.076923076923077) internal successors, (53), 13 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 10:59:57,457 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 52 transitions. [2022-12-14 10:59:57,457 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-12-14 10:59:57,457 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 10:59:57,457 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 10:59:57,462 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-12-14 10:59:57,658 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 10:59:57,659 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr20REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-14 10:59:57,660 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 10:59:57,660 INFO L85 PathProgramCache]: Analyzing trace with hash 1705108231, now seen corresponding path program 1 times [2022-12-14 10:59:57,661 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 10:59:57,661 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1893196466] [2022-12-14 10:59:57,661 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 10:59:57,661 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 10:59:57,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 10:59:57,745 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-12-14 10:59:57,745 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 10:59:57,745 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1893196466] [2022-12-14 10:59:57,745 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1893196466] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-14 10:59:57,745 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-14 10:59:57,745 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-12-14 10:59:57,746 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [852674786] [2022-12-14 10:59:57,746 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-14 10:59:57,746 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-12-14 10:59:57,746 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 10:59:57,746 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-12-14 10:59:57,746 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-12-14 10:59:57,747 INFO L87 Difference]: Start difference. First operand 44 states and 52 transitions. Second operand has 4 states, 3 states have (on average 6.0) internal successors, (18), 4 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 10:59:57,780 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 10:59:57,780 INFO L93 Difference]: Finished difference Result 42 states and 50 transitions. [2022-12-14 10:59:57,780 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-12-14 10:59:57,780 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 6.0) internal successors, (18), 4 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 18 [2022-12-14 10:59:57,781 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 10:59:57,781 INFO L225 Difference]: With dead ends: 42 [2022-12-14 10:59:57,782 INFO L226 Difference]: Without dead ends: 42 [2022-12-14 10:59:57,782 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-12-14 10:59:57,782 INFO L413 NwaCegarLoop]: 16 mSDtfsCounter, 29 mSDsluCounter, 8 mSDsCounter, 0 mSdLazyCounter, 42 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 30 SdHoareTripleChecker+Valid, 24 SdHoareTripleChecker+Invalid, 46 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 42 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-12-14 10:59:57,783 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [30 Valid, 24 Invalid, 46 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 42 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-12-14 10:59:57,783 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2022-12-14 10:59:57,785 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 42. [2022-12-14 10:59:57,786 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 35 states have (on average 1.3142857142857143) internal successors, (46), 40 states have internal predecessors, (46), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-14 10:59:57,786 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 50 transitions. [2022-12-14 10:59:57,786 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 50 transitions. Word has length 18 [2022-12-14 10:59:57,786 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 10:59:57,787 INFO L495 AbstractCegarLoop]: Abstraction has 42 states and 50 transitions. [2022-12-14 10:59:57,787 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 6.0) internal successors, (18), 4 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 10:59:57,787 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 50 transitions. [2022-12-14 10:59:57,787 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-12-14 10:59:57,787 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 10:59:57,787 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 10:59:57,788 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2022-12-14 10:59:57,788 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr21REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-14 10:59:57,788 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 10:59:57,788 INFO L85 PathProgramCache]: Analyzing trace with hash 1705108232, now seen corresponding path program 1 times [2022-12-14 10:59:57,788 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 10:59:57,788 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1104228357] [2022-12-14 10:59:57,789 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 10:59:57,789 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 10:59:57,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 10:59:58,040 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-12-14 10:59:58,040 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 10:59:58,040 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1104228357] [2022-12-14 10:59:58,041 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1104228357] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-14 10:59:58,041 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-14 10:59:58,041 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-12-14 10:59:58,041 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2001272748] [2022-12-14 10:59:58,041 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-14 10:59:58,041 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-12-14 10:59:58,041 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 10:59:58,042 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-12-14 10:59:58,042 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-12-14 10:59:58,042 INFO L87 Difference]: Start difference. First operand 42 states and 50 transitions. Second operand has 5 states, 5 states have (on average 3.6) internal successors, (18), 5 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 10:59:58,086 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 10:59:58,086 INFO L93 Difference]: Finished difference Result 42 states and 49 transitions. [2022-12-14 10:59:58,087 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-12-14 10:59:58,087 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.6) internal successors, (18), 5 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 18 [2022-12-14 10:59:58,087 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 10:59:58,087 INFO L225 Difference]: With dead ends: 42 [2022-12-14 10:59:58,088 INFO L226 Difference]: Without dead ends: 42 [2022-12-14 10:59:58,088 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-12-14 10:59:58,088 INFO L413 NwaCegarLoop]: 21 mSDtfsCounter, 23 mSDsluCounter, 36 mSDsCounter, 0 mSdLazyCounter, 63 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 25 SdHoareTripleChecker+Valid, 57 SdHoareTripleChecker+Invalid, 64 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 63 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-12-14 10:59:58,089 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [25 Valid, 57 Invalid, 64 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 63 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-12-14 10:59:58,089 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2022-12-14 10:59:58,090 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 42. [2022-12-14 10:59:58,091 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 35 states have (on average 1.2857142857142858) internal successors, (45), 40 states have internal predecessors, (45), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-14 10:59:58,091 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 49 transitions. [2022-12-14 10:59:58,091 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 49 transitions. Word has length 18 [2022-12-14 10:59:58,091 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 10:59:58,091 INFO L495 AbstractCegarLoop]: Abstraction has 42 states and 49 transitions. [2022-12-14 10:59:58,091 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 3.6) internal successors, (18), 5 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 10:59:58,092 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 49 transitions. [2022-12-14 10:59:58,092 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-12-14 10:59:58,092 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 10:59:58,092 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 10:59:58,092 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2022-12-14 10:59:58,092 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr21REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-14 10:59:58,093 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 10:59:58,093 INFO L85 PathProgramCache]: Analyzing trace with hash 531912094, now seen corresponding path program 1 times [2022-12-14 10:59:58,093 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 10:59:58,093 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [634735799] [2022-12-14 10:59:58,093 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 10:59:58,093 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 10:59:58,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 10:59:58,288 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-12-14 10:59:58,289 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 10:59:58,289 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [634735799] [2022-12-14 10:59:58,289 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [634735799] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-14 10:59:58,289 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [812635886] [2022-12-14 10:59:58,289 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 10:59:58,289 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 10:59:58,289 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 [2022-12-14 10:59:58,290 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-14 10:59:58,291 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-12-14 10:59:58,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 10:59:58,348 INFO L263 TraceCheckSpWp]: Trace formula consists of 171 conjuncts, 16 conjunts are in the unsatisfiable core [2022-12-14 10:59:58,349 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-14 10:59:58,422 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-12-14 10:59:58,422 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-12-14 10:59:58,422 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [812635886] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-14 10:59:58,422 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-12-14 10:59:58,422 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [6] total 9 [2022-12-14 10:59:58,422 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1082137868] [2022-12-14 10:59:58,423 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-14 10:59:58,423 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-12-14 10:59:58,423 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 10:59:58,423 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-12-14 10:59:58,423 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2022-12-14 10:59:58,424 INFO L87 Difference]: Start difference. First operand 42 states and 49 transitions. Second operand has 5 states, 4 states have (on average 5.0) internal successors, (20), 4 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 10:59:58,478 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 10:59:58,478 INFO L93 Difference]: Finished difference Result 41 states and 48 transitions. [2022-12-14 10:59:58,478 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-12-14 10:59:58,478 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 5.0) internal successors, (20), 4 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 21 [2022-12-14 10:59:58,479 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 10:59:58,479 INFO L225 Difference]: With dead ends: 41 [2022-12-14 10:59:58,479 INFO L226 Difference]: Without dead ends: 41 [2022-12-14 10:59:58,479 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=84, Unknown=0, NotChecked=0, Total=110 [2022-12-14 10:59:58,479 INFO L413 NwaCegarLoop]: 15 mSDtfsCounter, 49 mSDsluCounter, 11 mSDsCounter, 0 mSdLazyCounter, 44 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 49 SdHoareTripleChecker+Valid, 26 SdHoareTripleChecker+Invalid, 50 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 44 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-12-14 10:59:58,480 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [49 Valid, 26 Invalid, 50 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 44 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-12-14 10:59:58,480 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2022-12-14 10:59:58,481 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 41. [2022-12-14 10:59:58,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 35 states have (on average 1.2571428571428571) internal successors, (44), 39 states have internal predecessors, (44), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-14 10:59:58,481 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 48 transitions. [2022-12-14 10:59:58,481 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 48 transitions. Word has length 21 [2022-12-14 10:59:58,481 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 10:59:58,481 INFO L495 AbstractCegarLoop]: Abstraction has 41 states and 48 transitions. [2022-12-14 10:59:58,482 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 5.0) internal successors, (20), 4 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 10:59:58,482 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 48 transitions. [2022-12-14 10:59:58,482 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-12-14 10:59:58,482 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 10:59:58,482 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 10:59:58,487 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2022-12-14 10:59:58,683 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable11 [2022-12-14 10:59:58,683 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr23REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-14 10:59:58,683 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 10:59:58,683 INFO L85 PathProgramCache]: Analyzing trace with hash 66414719, now seen corresponding path program 1 times [2022-12-14 10:59:58,684 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 10:59:58,684 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2026165386] [2022-12-14 10:59:58,684 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 10:59:58,684 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 10:59:58,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 10:59:58,868 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-12-14 10:59:58,868 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 10:59:58,868 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2026165386] [2022-12-14 10:59:58,868 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2026165386] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-14 10:59:58,868 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2106511666] [2022-12-14 10:59:58,868 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 10:59:58,868 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 10:59:58,869 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 [2022-12-14 10:59:58,869 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-14 10:59:58,870 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-12-14 10:59:58,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 10:59:58,928 INFO L263 TraceCheckSpWp]: Trace formula consists of 178 conjuncts, 16 conjunts are in the unsatisfiable core [2022-12-14 10:59:58,929 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-14 10:59:59,029 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-12-14 10:59:59,029 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-12-14 10:59:59,029 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2106511666] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-14 10:59:59,029 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-12-14 10:59:59,029 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [6] total 10 [2022-12-14 10:59:59,029 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [559497258] [2022-12-14 10:59:59,030 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-14 10:59:59,030 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-12-14 10:59:59,030 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 10:59:59,030 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-12-14 10:59:59,030 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2022-12-14 10:59:59,031 INFO L87 Difference]: Start difference. First operand 41 states and 48 transitions. Second operand has 6 states, 5 states have (on average 4.4) internal successors, (22), 5 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 10:59:59,113 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 10:59:59,113 INFO L93 Difference]: Finished difference Result 50 states and 59 transitions. [2022-12-14 10:59:59,113 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-12-14 10:59:59,113 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 4.4) internal successors, (22), 5 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 23 [2022-12-14 10:59:59,114 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 10:59:59,114 INFO L225 Difference]: With dead ends: 50 [2022-12-14 10:59:59,114 INFO L226 Difference]: Without dead ends: 50 [2022-12-14 10:59:59,114 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=119, Unknown=0, NotChecked=0, Total=156 [2022-12-14 10:59:59,115 INFO L413 NwaCegarLoop]: 14 mSDtfsCounter, 59 mSDsluCounter, 24 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 59 SdHoareTripleChecker+Valid, 38 SdHoareTripleChecker+Invalid, 88 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-12-14 10:59:59,115 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [59 Valid, 38 Invalid, 88 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 80 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-12-14 10:59:59,116 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. [2022-12-14 10:59:59,117 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 44. [2022-12-14 10:59:59,117 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 44 states, 38 states have (on average 1.263157894736842) internal successors, (48), 42 states have internal predecessors, (48), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-14 10:59:59,117 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 52 transitions. [2022-12-14 10:59:59,117 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 52 transitions. Word has length 23 [2022-12-14 10:59:59,117 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 10:59:59,117 INFO L495 AbstractCegarLoop]: Abstraction has 44 states and 52 transitions. [2022-12-14 10:59:59,117 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 4.4) internal successors, (22), 5 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 10:59:59,117 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 52 transitions. [2022-12-14 10:59:59,118 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-12-14 10:59:59,118 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 10:59:59,118 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 10:59:59,123 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2022-12-14 10:59:59,318 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2022-12-14 10:59:59,319 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr19REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-14 10:59:59,320 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 10:59:59,320 INFO L85 PathProgramCache]: Analyzing trace with hash -2003465556, now seen corresponding path program 2 times [2022-12-14 10:59:59,320 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 10:59:59,320 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1159294945] [2022-12-14 10:59:59,321 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 10:59:59,321 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 10:59:59,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 10:59:59,622 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 8 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-12-14 10:59:59,622 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 10:59:59,622 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1159294945] [2022-12-14 10:59:59,623 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1159294945] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-14 10:59:59,623 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1543339475] [2022-12-14 10:59:59,623 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-12-14 10:59:59,623 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 10:59:59,623 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 [2022-12-14 10:59:59,624 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-14 10:59:59,625 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-12-14 10:59:59,705 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2022-12-14 10:59:59,705 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-12-14 10:59:59,707 INFO L263 TraceCheckSpWp]: Trace formula consists of 153 conjuncts, 35 conjunts are in the unsatisfiable core [2022-12-14 10:59:59,710 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-14 10:59:59,749 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-12-14 10:59:59,764 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 10:59:59,765 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-12-14 10:59:59,774 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 10:59:59,774 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-12-14 10:59:59,785 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 10:59:59,786 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-12-14 10:59:59,794 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 10:59:59,794 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-12-14 10:59:59,802 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 10:59:59,803 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-12-14 10:59:59,815 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 18 [2022-12-14 10:59:59,883 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-12-14 10:59:59,914 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 3 proven. 6 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-12-14 10:59:59,914 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-14 11:00:00,087 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-12-14 11:00:00,088 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 17 [2022-12-14 11:00:00,123 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-12-14 11:00:00,123 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1543339475] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-14 11:00:00,123 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1401283205] [2022-12-14 11:00:00,125 INFO L159 IcfgInterpreter]: Started Sifa with 15 locations of interest [2022-12-14 11:00:00,125 INFO L166 IcfgInterpreter]: Building call graph [2022-12-14 11:00:00,126 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2022-12-14 11:00:00,126 INFO L176 IcfgInterpreter]: Starting interpretation [2022-12-14 11:00:00,126 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2022-12-14 11:00:00,140 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:00,141 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:00,142 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 22 [2022-12-14 11:00:00,161 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:00,162 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 31 [2022-12-14 11:00:00,219 INFO L321 Elim1Store]: treesize reduction 84, result has 15.2 percent of original size [2022-12-14 11:00:00,219 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 239 treesize of output 236 [2022-12-14 11:00:00,249 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2022-12-14 11:00:00,260 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-12-14 11:00:00,271 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:00,272 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-12-14 11:00:00,283 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:00,284 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:00,285 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 32 [2022-12-14 11:00:00,298 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:00,299 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:00,299 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:00,300 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 44 [2022-12-14 11:00:00,314 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:00,315 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:00,315 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:00,316 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:00,317 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 56 [2022-12-14 11:00:00,332 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:00,333 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:00,333 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:00,334 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:00,334 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:00,336 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 68 [2022-12-14 11:00:00,352 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:00,353 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:00,354 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:00,354 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:00,355 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:00,355 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:00,357 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 6 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 80 [2022-12-14 11:00:00,482 INFO L180 IcfgInterpreter]: Interpretation finished [2022-12-14 11:00:01,732 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '1828#(and (= |ULTIMATE.start_#Ultimate.C_memset_#amount#1| 94) (<= |ULTIMATE.start_Sum_~instrs#1.offset| 0) (<= |ULTIMATE.start_Sum_#in~instrs#1.offset| 0) (<= |ULTIMATE.start_#Ultimate.C_memset_#res#1.offset| 0) (<= 0 |ULTIMATE.start_Sum_~instrs#1.offset|) (<= 0 |ULTIMATE.start_#Ultimate.C_memset_#ptr#1.offset|) (<= |ULTIMATE.start_#Ultimate.C_memset_#ptr#1.offset| 0) (<= 0 |ULTIMATE.start_Sum_#in~instrs#1.offset|) (= |ULTIMATE.start_#Ultimate.C_memset_#value#1| 0) (not (<= (+ (* 30 |ULTIMATE.start_Sum_~i~0#1|) 18 |ULTIMATE.start_Sum_~instrs#1.offset|) (select |#length| |ULTIMATE.start_Sum_~instrs#1.base|))) (<= 0 |ULTIMATE.start_Sum_~i~0#1|) (= |#NULL.offset| 0) (= |ULTIMATE.start_main_~p~0#1.offset| 0) (<= 0 |ULTIMATE.start_#Ultimate.C_memset_#res#1.offset|) (<= 0 |ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) (<= 0 |#StackHeapBarrier|) (= |#NULL.base| 0))' at error location [2022-12-14 11:00:01,732 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2022-12-14 11:00:01,732 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-14 11:00:01,732 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 7] total 22 [2022-12-14 11:00:01,733 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [626670982] [2022-12-14 11:00:01,733 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-14 11:00:01,733 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-12-14 11:00:01,733 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 11:00:01,733 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-12-14 11:00:01,734 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=141, Invalid=1049, Unknown=0, NotChecked=0, Total=1190 [2022-12-14 11:00:01,734 INFO L87 Difference]: Start difference. First operand 44 states and 52 transitions. Second operand has 22 states, 22 states have (on average 2.8181818181818183) internal successors, (62), 22 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 11:00:02,147 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 11:00:02,147 INFO L93 Difference]: Finished difference Result 76 states and 93 transitions. [2022-12-14 11:00:02,148 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-12-14 11:00:02,148 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 2.8181818181818183) internal successors, (62), 22 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 24 [2022-12-14 11:00:02,148 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 11:00:02,148 INFO L225 Difference]: With dead ends: 76 [2022-12-14 11:00:02,148 INFO L226 Difference]: Without dead ends: 76 [2022-12-14 11:00:02,149 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 49 SyntacticMatches, 1 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 475 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=355, Invalid=1901, Unknown=0, NotChecked=0, Total=2256 [2022-12-14 11:00:02,149 INFO L413 NwaCegarLoop]: 37 mSDtfsCounter, 359 mSDsluCounter, 120 mSDsCounter, 0 mSdLazyCounter, 338 mSolverCounterSat, 70 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 359 SdHoareTripleChecker+Valid, 157 SdHoareTripleChecker+Invalid, 408 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 70 IncrementalHoareTripleChecker+Valid, 338 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-12-14 11:00:02,149 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [359 Valid, 157 Invalid, 408 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [70 Valid, 338 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-12-14 11:00:02,150 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. [2022-12-14 11:00:02,151 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 42. [2022-12-14 11:00:02,151 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 37 states have (on average 1.2162162162162162) internal successors, (45), 40 states have internal predecessors, (45), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-14 11:00:02,151 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 49 transitions. [2022-12-14 11:00:02,151 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 49 transitions. Word has length 24 [2022-12-14 11:00:02,151 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 11:00:02,151 INFO L495 AbstractCegarLoop]: Abstraction has 42 states and 49 transitions. [2022-12-14 11:00:02,152 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 2.8181818181818183) internal successors, (62), 22 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 11:00:02,152 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 49 transitions. [2022-12-14 11:00:02,152 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-12-14 11:00:02,152 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 11:00:02,152 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 11:00:02,157 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-12-14 11:00:02,353 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2022-12-14 11:00:02,354 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-14 11:00:02,355 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 11:00:02,355 INFO L85 PathProgramCache]: Analyzing trace with hash -1419737697, now seen corresponding path program 1 times [2022-12-14 11:00:02,355 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 11:00:02,355 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2018532295] [2022-12-14 11:00:02,355 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 11:00:02,355 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 11:00:02,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 11:00:02,406 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-12-14 11:00:02,406 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 11:00:02,406 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2018532295] [2022-12-14 11:00:02,406 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2018532295] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-14 11:00:02,406 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-14 11:00:02,406 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-12-14 11:00:02,406 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1765501983] [2022-12-14 11:00:02,406 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-14 11:00:02,407 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-12-14 11:00:02,407 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 11:00:02,407 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-12-14 11:00:02,407 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-12-14 11:00:02,408 INFO L87 Difference]: Start difference. First operand 42 states and 49 transitions. Second operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 4 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 11:00:02,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 11:00:02,426 INFO L93 Difference]: Finished difference Result 48 states and 55 transitions. [2022-12-14 11:00:02,426 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-12-14 11:00:02,426 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 4 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 26 [2022-12-14 11:00:02,426 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 11:00:02,426 INFO L225 Difference]: With dead ends: 48 [2022-12-14 11:00:02,427 INFO L226 Difference]: Without dead ends: 48 [2022-12-14 11:00:02,427 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-12-14 11:00:02,427 INFO L413 NwaCegarLoop]: 30 mSDtfsCounter, 5 mSDsluCounter, 56 mSDsCounter, 0 mSdLazyCounter, 24 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 86 SdHoareTripleChecker+Invalid, 24 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 24 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-12-14 11:00:02,428 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 86 Invalid, 24 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 24 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-12-14 11:00:02,428 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2022-12-14 11:00:02,429 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 44. [2022-12-14 11:00:02,430 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 44 states, 39 states have (on average 1.205128205128205) internal successors, (47), 42 states have internal predecessors, (47), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-14 11:00:02,430 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 51 transitions. [2022-12-14 11:00:02,430 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 51 transitions. Word has length 26 [2022-12-14 11:00:02,430 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 11:00:02,430 INFO L495 AbstractCegarLoop]: Abstraction has 44 states and 51 transitions. [2022-12-14 11:00:02,431 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 4 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 11:00:02,431 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 51 transitions. [2022-12-14 11:00:02,431 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-12-14 11:00:02,431 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 11:00:02,431 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 11:00:02,432 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2022-12-14 11:00:02,432 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr23REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-14 11:00:02,432 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 11:00:02,432 INFO L85 PathProgramCache]: Analyzing trace with hash -1418004692, now seen corresponding path program 1 times [2022-12-14 11:00:02,432 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 11:00:02,432 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [500156851] [2022-12-14 11:00:02,432 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 11:00:02,432 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 11:00:02,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 11:00:02,644 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-12-14 11:00:02,644 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 11:00:02,644 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [500156851] [2022-12-14 11:00:02,645 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [500156851] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-14 11:00:02,645 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1068060412] [2022-12-14 11:00:02,645 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 11:00:02,645 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 11:00:02,645 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 [2022-12-14 11:00:02,646 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-14 11:00:02,647 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-12-14 11:00:02,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 11:00:02,711 INFO L263 TraceCheckSpWp]: Trace formula consists of 193 conjuncts, 18 conjunts are in the unsatisfiable core [2022-12-14 11:00:02,713 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-14 11:00:02,835 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-12-14 11:00:02,835 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-14 11:00:02,964 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-12-14 11:00:02,965 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 17 [2022-12-14 11:00:02,992 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-12-14 11:00:02,993 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1068060412] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-14 11:00:02,993 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2074946704] [2022-12-14 11:00:02,995 INFO L159 IcfgInterpreter]: Started Sifa with 21 locations of interest [2022-12-14 11:00:02,995 INFO L166 IcfgInterpreter]: Building call graph [2022-12-14 11:00:02,995 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2022-12-14 11:00:02,995 INFO L176 IcfgInterpreter]: Starting interpretation [2022-12-14 11:00:02,996 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2022-12-14 11:00:03,015 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:03,016 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:03,016 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 22 [2022-12-14 11:00:03,041 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:03,042 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 28 [2022-12-14 11:00:03,093 INFO L173 IndexEqualityManager]: detected equality via solver [2022-12-14 11:00:03,117 INFO L321 Elim1Store]: treesize reduction 76, result has 25.5 percent of original size [2022-12-14 11:00:03,118 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 5 case distinctions, treesize of input 232 treesize of output 233 [2022-12-14 11:00:03,186 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2022-12-14 11:00:03,206 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-12-14 11:00:03,229 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-12-14 11:00:03,246 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 32 [2022-12-14 11:00:03,281 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 44 [2022-12-14 11:00:03,310 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 56 [2022-12-14 11:00:03,334 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 68 [2022-12-14 11:00:03,361 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:03,362 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:03,363 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:03,363 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:03,364 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:03,364 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:03,366 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 6 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 80 [2022-12-14 11:00:03,615 INFO L180 IcfgInterpreter]: Interpretation finished [2022-12-14 11:00:04,918 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '2249#(and (<= |ULTIMATE.start_Sum_~instrs#1.offset| 0) (<= |ULTIMATE.start_#Ultimate.C_memset_#value#1| 0) (<= |ULTIMATE.start_Sum_#in~instrs#1.offset| 0) (<= 0 |ULTIMATE.start_Sum2_#in~instrs#1.offset|) (<= |ULTIMATE.start_#Ultimate.C_memset_#res#1.offset| 0) (<= |ULTIMATE.start_Sum2_~instrs#1.offset| 0) (<= 0 |ULTIMATE.start_Sum_~instrs#1.offset|) (<= |ULTIMATE.start_#Ultimate.C_memset_#amount#1| 94) (<= |#NULL.offset| 0) (<= 0 |ULTIMATE.start_#Ultimate.C_memset_#ptr#1.offset|) (<= 0 |ULTIMATE.start_Sum2_~instrs#1.offset|) (<= |ULTIMATE.start_#Ultimate.C_memset_#ptr#1.offset| 0) (<= 0 |ULTIMATE.start_Sum_#in~instrs#1.offset|) (<= 0 |ULTIMATE.start_Sum_~i~0#1|) (<= 94 |ULTIMATE.start_#Ultimate.C_memset_#amount#1|) (= |ULTIMATE.start_main_~p~0#1.offset| 0) (<= 0 |#NULL.offset|) (<= 0 |ULTIMATE.start_#Ultimate.C_memset_#res#1.offset|) (<= 0 |ULTIMATE.start_#Ultimate.C_memset_#value#1|) (<= 0 |ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) (<= |ULTIMATE.start_Sum2_#in~instrs#1.offset| 0) (<= 0 |#StackHeapBarrier|) (<= 0 |ULTIMATE.start_Sum2_~i~1#1|) (not (<= (+ (* 30 |ULTIMATE.start_Sum2_~i~1#1|) |ULTIMATE.start_Sum2_~instrs#1.offset| 26) (select |#length| |ULTIMATE.start_Sum2_~instrs#1.base|))) (= |#NULL.base| 0))' at error location [2022-12-14 11:00:04,918 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2022-12-14 11:00:04,918 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-14 11:00:04,918 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5, 5] total 16 [2022-12-14 11:00:04,918 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1995997146] [2022-12-14 11:00:04,918 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-14 11:00:04,918 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-12-14 11:00:04,919 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 11:00:04,919 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-12-14 11:00:04,919 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=124, Invalid=806, Unknown=0, NotChecked=0, Total=930 [2022-12-14 11:00:04,919 INFO L87 Difference]: Start difference. First operand 44 states and 51 transitions. Second operand has 16 states, 16 states have (on average 4.625) internal successors, (74), 16 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 11:00:05,176 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 11:00:05,177 INFO L93 Difference]: Finished difference Result 66 states and 76 transitions. [2022-12-14 11:00:05,177 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-12-14 11:00:05,177 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 4.625) internal successors, (74), 16 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 26 [2022-12-14 11:00:05,177 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 11:00:05,177 INFO L225 Difference]: With dead ends: 66 [2022-12-14 11:00:05,177 INFO L226 Difference]: Without dead ends: 66 [2022-12-14 11:00:05,178 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 97 GetRequests, 52 SyntacticMatches, 6 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 422 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=239, Invalid=1401, Unknown=0, NotChecked=0, Total=1640 [2022-12-14 11:00:05,178 INFO L413 NwaCegarLoop]: 19 mSDtfsCounter, 144 mSDsluCounter, 99 mSDsCounter, 0 mSdLazyCounter, 297 mSolverCounterSat, 20 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 144 SdHoareTripleChecker+Valid, 118 SdHoareTripleChecker+Invalid, 317 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 20 IncrementalHoareTripleChecker+Valid, 297 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-12-14 11:00:05,179 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [144 Valid, 118 Invalid, 317 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [20 Valid, 297 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-12-14 11:00:05,179 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states. [2022-12-14 11:00:05,180 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 50. [2022-12-14 11:00:05,180 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 45 states have (on average 1.2) internal successors, (54), 48 states have internal predecessors, (54), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-14 11:00:05,181 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 58 transitions. [2022-12-14 11:00:05,181 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 58 transitions. Word has length 26 [2022-12-14 11:00:05,181 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 11:00:05,181 INFO L495 AbstractCegarLoop]: Abstraction has 50 states and 58 transitions. [2022-12-14 11:00:05,181 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 4.625) internal successors, (74), 16 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 11:00:05,181 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 58 transitions. [2022-12-14 11:00:05,182 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-12-14 11:00:05,182 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 11:00:05,182 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 11:00:05,186 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2022-12-14 11:00:05,383 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2022-12-14 11:00:05,384 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-14 11:00:05,385 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 11:00:05,385 INFO L85 PathProgramCache]: Analyzing trace with hash -1797348121, now seen corresponding path program 1 times [2022-12-14 11:00:05,386 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 11:00:05,386 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1190235692] [2022-12-14 11:00:05,386 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 11:00:05,387 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 11:00:05,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 11:00:05,624 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-12-14 11:00:05,624 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 11:00:05,624 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1190235692] [2022-12-14 11:00:05,625 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1190235692] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-14 11:00:05,625 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2066392795] [2022-12-14 11:00:05,625 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 11:00:05,625 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 11:00:05,625 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 [2022-12-14 11:00:05,626 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-14 11:00:05,627 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-12-14 11:00:05,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 11:00:05,699 INFO L263 TraceCheckSpWp]: Trace formula consists of 211 conjuncts, 26 conjunts are in the unsatisfiable core [2022-12-14 11:00:05,700 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-14 11:00:05,723 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-12-14 11:00:05,824 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-12-14 11:00:05,840 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-12-14 11:00:05,840 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-14 11:00:05,948 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 6 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-12-14 11:00:05,948 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2066392795] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-14 11:00:05,948 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1784271416] [2022-12-14 11:00:05,949 INFO L159 IcfgInterpreter]: Started Sifa with 27 locations of interest [2022-12-14 11:00:05,949 INFO L166 IcfgInterpreter]: Building call graph [2022-12-14 11:00:05,950 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2022-12-14 11:00:05,950 INFO L176 IcfgInterpreter]: Starting interpretation [2022-12-14 11:00:05,950 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2022-12-14 11:00:05,963 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:05,964 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:05,965 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 22 [2022-12-14 11:00:05,985 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:05,986 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 31 [2022-12-14 11:00:06,042 INFO L321 Elim1Store]: treesize reduction 84, result has 15.2 percent of original size [2022-12-14 11:00:06,043 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 239 treesize of output 236 [2022-12-14 11:00:06,087 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2022-12-14 11:00:06,099 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-12-14 11:00:06,109 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:06,110 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-12-14 11:00:06,122 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:06,122 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:06,123 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 32 [2022-12-14 11:00:06,137 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:06,138 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:06,138 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:06,139 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 44 [2022-12-14 11:00:06,152 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:06,153 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:06,153 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:06,154 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:06,155 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 56 [2022-12-14 11:00:06,171 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:06,171 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:06,172 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:06,173 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:06,173 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:06,174 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 68 [2022-12-14 11:00:06,190 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:06,191 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:06,192 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:06,193 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:06,193 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:06,194 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:06,195 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 6 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 80 [2022-12-14 11:00:06,593 INFO L197 IcfgInterpreter]: Interpreting procedure dummy_abort with input of size 23 for LOIs [2022-12-14 11:00:06,597 INFO L180 IcfgInterpreter]: Interpretation finished [2022-12-14 11:00:08,791 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '2606#(and (= |ULTIMATE.start_#Ultimate.C_memset_#amount#1| 94) (= |ULTIMATE.start_Sum2_#in~instrs#1.offset| |ULTIMATE.start_Sum2_~instrs#1.offset|) (<= |ULTIMATE.start_Sum_~instrs#1.offset| 0) (= 0 |ULTIMATE.start_main_~p~0#1.base|) (= |ULTIMATE.start_Sum2_#in~instrs#1.offset| 0) (<= |ULTIMATE.start_Sum_#in~instrs#1.offset| 0) (= |ULTIMATE.start_Sum2_#in~instrs#1.base| |ULTIMATE.start_Sum2_~instrs#1.base|) (<= |ULTIMATE.start_#Ultimate.C_memset_#res#1.offset| 0) (<= 0 |ULTIMATE.start_Sum_~instrs#1.offset|) (not (= |ULTIMATE.start_main_old_#valid#1| |#valid|)) (= |ULTIMATE.start_Sum2_#res#1| |ULTIMATE.start_Sum2_~count~1#1|) (= |ULTIMATE.start_Sum_#res#1| |ULTIMATE.start_Sum_~count~0#1|) (<= 0 |ULTIMATE.start_#Ultimate.C_memset_#ptr#1.offset|) (= |ULTIMATE.start_Sum2_~count~1#1| 0) (<= |ULTIMATE.start_#Ultimate.C_memset_#ptr#1.offset| 0) (<= (select (select |#memory_int| |ULTIMATE.start_Sum2_~instrs#1.base|) |ULTIMATE.start_Sum2_~instrs#1.offset|) |ULTIMATE.start_Sum2_~i~1#1|) (<= 0 |ULTIMATE.start_Sum_#in~instrs#1.offset|) (= |ULTIMATE.start_#Ultimate.C_memset_#value#1| 0) (<= 0 |ULTIMATE.start_Sum_~i~0#1|) (= 4311811859 (mod |ULTIMATE.start_Sum_#res#1| 18446744073709551616)) (<= |ULTIMATE.start_Sum2_~i~1#1| 0) (= |#NULL.offset| 0) (= |ULTIMATE.start_main_~p~0#1.offset| 0) (<= 0 |ULTIMATE.start_#Ultimate.C_memset_#res#1.offset|) (<= 0 |ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) (= (select |#valid| |ULTIMATE.start_Sum2_~instrs#1.base|) 1) (<= 0 |#StackHeapBarrier|) (<= 0 |ULTIMATE.start_Sum2_~i~1#1|) (<= (+ |ULTIMATE.start_Sum2_~instrs#1.offset| 4) (select |#length| |ULTIMATE.start_Sum2_~instrs#1.base|)) (= |ULTIMATE.start_main_#res#1| 0) (= |#NULL.base| 0))' at error location [2022-12-14 11:00:08,791 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2022-12-14 11:00:08,791 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-14 11:00:08,791 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 8, 8] total 20 [2022-12-14 11:00:08,791 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [353283322] [2022-12-14 11:00:08,791 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-14 11:00:08,791 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2022-12-14 11:00:08,792 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 11:00:08,792 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-12-14 11:00:08,793 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=231, Invalid=1409, Unknown=0, NotChecked=0, Total=1640 [2022-12-14 11:00:08,793 INFO L87 Difference]: Start difference. First operand 50 states and 58 transitions. Second operand has 20 states, 20 states have (on average 3.8) internal successors, (76), 20 states have internal predecessors, (76), 1 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-12-14 11:00:09,195 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 11:00:09,195 INFO L93 Difference]: Finished difference Result 48 states and 53 transitions. [2022-12-14 11:00:09,195 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-12-14 11:00:09,195 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 3.8) internal successors, (76), 20 states have internal predecessors, (76), 1 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 32 [2022-12-14 11:00:09,195 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 11:00:09,195 INFO L225 Difference]: With dead ends: 48 [2022-12-14 11:00:09,195 INFO L226 Difference]: Without dead ends: 48 [2022-12-14 11:00:09,196 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 120 GetRequests, 64 SyntacticMatches, 4 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 752 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=437, Invalid=2425, Unknown=0, NotChecked=0, Total=2862 [2022-12-14 11:00:09,196 INFO L413 NwaCegarLoop]: 16 mSDtfsCounter, 77 mSDsluCounter, 126 mSDsCounter, 0 mSdLazyCounter, 275 mSolverCounterSat, 16 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 77 SdHoareTripleChecker+Valid, 142 SdHoareTripleChecker+Invalid, 291 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 16 IncrementalHoareTripleChecker+Valid, 275 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-12-14 11:00:09,196 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [77 Valid, 142 Invalid, 291 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [16 Valid, 275 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-12-14 11:00:09,197 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2022-12-14 11:00:09,198 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 48. [2022-12-14 11:00:09,198 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 48 states, 43 states have (on average 1.1395348837209303) internal successors, (49), 46 states have internal predecessors, (49), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-14 11:00:09,198 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 53 transitions. [2022-12-14 11:00:09,198 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 53 transitions. Word has length 32 [2022-12-14 11:00:09,198 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 11:00:09,198 INFO L495 AbstractCegarLoop]: Abstraction has 48 states and 53 transitions. [2022-12-14 11:00:09,199 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 20 states have (on average 3.8) internal successors, (76), 20 states have internal predecessors, (76), 1 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-12-14 11:00:09,199 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 53 transitions. [2022-12-14 11:00:09,199 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2022-12-14 11:00:09,199 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 11:00:09,199 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 11:00:09,204 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2022-12-14 11:00:09,400 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable16 [2022-12-14 11:00:09,401 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-14 11:00:09,402 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 11:00:09,402 INFO L85 PathProgramCache]: Analyzing trace with hash -1650625281, now seen corresponding path program 1 times [2022-12-14 11:00:09,403 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 11:00:09,403 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [913452099] [2022-12-14 11:00:09,403 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 11:00:09,404 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 11:00:09,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 11:00:09,659 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2022-12-14 11:00:09,660 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 11:00:09,660 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [913452099] [2022-12-14 11:00:09,660 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [913452099] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-14 11:00:09,660 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1203963755] [2022-12-14 11:00:09,660 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 11:00:09,660 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 11:00:09,660 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 [2022-12-14 11:00:09,661 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-14 11:00:09,662 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-12-14 11:00:09,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 11:00:09,733 INFO L263 TraceCheckSpWp]: Trace formula consists of 252 conjuncts, 29 conjunts are in the unsatisfiable core [2022-12-14 11:00:09,735 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-14 11:00:09,749 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-12-14 11:00:09,914 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-12-14 11:00:09,928 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 5 proven. 17 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-12-14 11:00:09,928 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-14 11:00:10,099 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 13 proven. 9 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-12-14 11:00:10,099 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1203963755] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-14 11:00:10,099 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [456809621] [2022-12-14 11:00:10,100 INFO L159 IcfgInterpreter]: Started Sifa with 25 locations of interest [2022-12-14 11:00:10,100 INFO L166 IcfgInterpreter]: Building call graph [2022-12-14 11:00:10,100 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2022-12-14 11:00:10,100 INFO L176 IcfgInterpreter]: Starting interpretation [2022-12-14 11:00:10,100 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2022-12-14 11:00:10,112 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:10,113 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:10,113 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 22 [2022-12-14 11:00:10,135 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:10,136 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 28 [2022-12-14 11:00:10,169 INFO L173 IndexEqualityManager]: detected equality via solver [2022-12-14 11:00:10,197 INFO L321 Elim1Store]: treesize reduction 76, result has 25.5 percent of original size [2022-12-14 11:00:10,197 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 5 case distinctions, treesize of input 232 treesize of output 233 [2022-12-14 11:00:10,251 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2022-12-14 11:00:10,272 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-12-14 11:00:10,291 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-12-14 11:00:10,311 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 32 [2022-12-14 11:00:10,328 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 44 [2022-12-14 11:00:10,352 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 56 [2022-12-14 11:00:10,377 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 68 [2022-12-14 11:00:10,402 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:10,403 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:10,404 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:10,404 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:10,405 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:10,406 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:10,407 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 6 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 80 [2022-12-14 11:00:10,629 INFO L180 IcfgInterpreter]: Interpretation finished [2022-12-14 11:00:12,912 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '2998#(and (= |ULTIMATE.start_#Ultimate.C_memset_#amount#1| 94) (<= |ULTIMATE.start_Sum_~instrs#1.offset| 0) (= 0 |ULTIMATE.start_main_~p~0#1.base|) (<= |ULTIMATE.start_Sum_#in~instrs#1.offset| 0) (<= 0 |ULTIMATE.start_Sum2_#in~instrs#1.offset|) (<= |ULTIMATE.start_#Ultimate.C_memset_#res#1.offset| 0) (<= |ULTIMATE.start_Sum2_~instrs#1.offset| 0) (<= 0 |ULTIMATE.start_Sum_~instrs#1.offset|) (not (= |ULTIMATE.start_main_old_#valid#1| |#valid|)) (= |ULTIMATE.start_Sum2_#res#1| |ULTIMATE.start_Sum2_~count~1#1|) (<= 0 |ULTIMATE.start_#Ultimate.C_memset_#ptr#1.offset|) (<= 0 |ULTIMATE.start_Sum2_~instrs#1.offset|) (<= |ULTIMATE.start_#Ultimate.C_memset_#ptr#1.offset| 0) (<= 0 |ULTIMATE.start_Sum_#in~instrs#1.offset|) (= |ULTIMATE.start_#Ultimate.C_memset_#value#1| 0) (<= 0 |ULTIMATE.start_Sum_~i~0#1|) (= |#NULL.offset| 0) (= 4311811859 |ULTIMATE.start_Sum2_#res#1|) (= |ULTIMATE.start_main_~p~0#1.offset| 0) (<= 0 |ULTIMATE.start_#Ultimate.C_memset_#res#1.offset|) (<= 0 |ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) (<= |ULTIMATE.start_Sum2_#in~instrs#1.offset| 0) (<= 0 |#StackHeapBarrier|) (<= 0 |ULTIMATE.start_Sum2_~i~1#1|) (= |ULTIMATE.start_main_#res#1| 0) (= |#NULL.base| 0))' at error location [2022-12-14 11:00:12,912 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2022-12-14 11:00:12,912 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-14 11:00:12,912 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 11, 11] total 27 [2022-12-14 11:00:12,912 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1630588954] [2022-12-14 11:00:12,912 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-14 11:00:12,913 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2022-12-14 11:00:12,913 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 11:00:12,913 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2022-12-14 11:00:12,913 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=261, Invalid=1719, Unknown=0, NotChecked=0, Total=1980 [2022-12-14 11:00:12,914 INFO L87 Difference]: Start difference. First operand 48 states and 53 transitions. Second operand has 27 states, 27 states have (on average 3.5185185185185186) internal successors, (95), 27 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 11:00:13,307 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 11:00:13,307 INFO L93 Difference]: Finished difference Result 48 states and 52 transitions. [2022-12-14 11:00:13,307 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-12-14 11:00:13,307 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 27 states have (on average 3.5185185185185186) internal successors, (95), 27 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 38 [2022-12-14 11:00:13,307 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 11:00:13,307 INFO L225 Difference]: With dead ends: 48 [2022-12-14 11:00:13,308 INFO L226 Difference]: Without dead ends: 48 [2022-12-14 11:00:13,308 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 138 GetRequests, 73 SyntacticMatches, 10 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1129 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=531, Invalid=2661, Unknown=0, NotChecked=0, Total=3192 [2022-12-14 11:00:13,308 INFO L413 NwaCegarLoop]: 16 mSDtfsCounter, 170 mSDsluCounter, 94 mSDsCounter, 0 mSdLazyCounter, 283 mSolverCounterSat, 25 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 170 SdHoareTripleChecker+Valid, 110 SdHoareTripleChecker+Invalid, 308 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 25 IncrementalHoareTripleChecker+Valid, 283 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-12-14 11:00:13,309 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [170 Valid, 110 Invalid, 308 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [25 Valid, 283 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-12-14 11:00:13,309 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2022-12-14 11:00:13,310 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 48. [2022-12-14 11:00:13,310 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 48 states, 43 states have (on average 1.1162790697674418) internal successors, (48), 46 states have internal predecessors, (48), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-14 11:00:13,310 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 52 transitions. [2022-12-14 11:00:13,310 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 52 transitions. Word has length 38 [2022-12-14 11:00:13,310 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 11:00:13,310 INFO L495 AbstractCegarLoop]: Abstraction has 48 states and 52 transitions. [2022-12-14 11:00:13,310 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 27 states have (on average 3.5185185185185186) internal successors, (95), 27 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 11:00:13,310 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 52 transitions. [2022-12-14 11:00:13,311 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2022-12-14 11:00:13,311 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 11:00:13,311 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 4, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 11:00:13,315 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2022-12-14 11:00:13,511 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable17 [2022-12-14 11:00:13,513 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr23REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-14 11:00:13,514 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 11:00:13,514 INFO L85 PathProgramCache]: Analyzing trace with hash -1648892276, now seen corresponding path program 2 times [2022-12-14 11:00:13,514 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 11:00:13,514 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [628184781] [2022-12-14 11:00:13,515 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 11:00:13,515 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 11:00:13,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 11:00:13,789 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 8 proven. 13 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2022-12-14 11:00:13,790 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 11:00:13,790 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [628184781] [2022-12-14 11:00:13,790 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [628184781] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-14 11:00:13,790 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1528430165] [2022-12-14 11:00:13,790 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-12-14 11:00:13,790 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 11:00:13,790 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 [2022-12-14 11:00:13,791 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-14 11:00:13,792 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-12-14 11:00:13,877 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2022-12-14 11:00:13,877 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-12-14 11:00:13,878 INFO L263 TraceCheckSpWp]: Trace formula consists of 193 conjuncts, 35 conjunts are in the unsatisfiable core [2022-12-14 11:00:13,880 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-14 11:00:13,913 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-12-14 11:00:13,933 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:13,934 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-12-14 11:00:13,942 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:13,943 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-12-14 11:00:13,950 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:13,950 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-12-14 11:00:13,958 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:13,959 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-12-14 11:00:13,968 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:13,969 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-12-14 11:00:13,976 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:13,976 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-12-14 11:00:14,114 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-12-14 11:00:14,157 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 3 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-12-14 11:00:14,157 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-14 11:00:14,370 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-12-14 11:00:14,370 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 17 [2022-12-14 11:00:14,406 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-12-14 11:00:14,406 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1528430165] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-14 11:00:14,406 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1670338168] [2022-12-14 11:00:14,408 INFO L159 IcfgInterpreter]: Started Sifa with 21 locations of interest [2022-12-14 11:00:14,408 INFO L166 IcfgInterpreter]: Building call graph [2022-12-14 11:00:14,408 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2022-12-14 11:00:14,409 INFO L176 IcfgInterpreter]: Starting interpretation [2022-12-14 11:00:14,409 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2022-12-14 11:00:14,422 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:14,423 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:14,423 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 22 [2022-12-14 11:00:14,444 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:14,445 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 31 [2022-12-14 11:00:14,501 INFO L321 Elim1Store]: treesize reduction 84, result has 15.2 percent of original size [2022-12-14 11:00:14,501 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 239 treesize of output 236 [2022-12-14 11:00:14,535 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2022-12-14 11:00:14,546 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-12-14 11:00:14,557 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:14,557 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-12-14 11:00:14,568 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:14,569 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:14,569 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 32 [2022-12-14 11:00:14,581 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:14,582 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:14,583 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:14,583 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 44 [2022-12-14 11:00:14,597 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:14,597 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:14,598 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:14,598 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:14,599 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 56 [2022-12-14 11:00:14,613 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:14,614 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:14,614 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:14,615 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:14,615 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:14,616 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 68 [2022-12-14 11:00:14,632 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:14,633 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:14,634 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:14,634 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:14,635 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:14,635 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:14,637 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 6 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 80 [2022-12-14 11:00:14,827 INFO L180 IcfgInterpreter]: Interpretation finished [2022-12-14 11:00:16,388 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '3381#(and (= |ULTIMATE.start_#Ultimate.C_memset_#amount#1| 94) (<= |ULTIMATE.start_Sum_~instrs#1.offset| 0) (<= |ULTIMATE.start_Sum_#in~instrs#1.offset| 0) (<= 0 |ULTIMATE.start_Sum2_#in~instrs#1.offset|) (<= |ULTIMATE.start_#Ultimate.C_memset_#res#1.offset| 0) (<= |ULTIMATE.start_Sum2_~instrs#1.offset| 0) (<= 0 |ULTIMATE.start_Sum_~instrs#1.offset|) (<= 0 |ULTIMATE.start_#Ultimate.C_memset_#ptr#1.offset|) (<= 0 |ULTIMATE.start_Sum2_~instrs#1.offset|) (<= |ULTIMATE.start_#Ultimate.C_memset_#ptr#1.offset| 0) (<= 0 |ULTIMATE.start_Sum_#in~instrs#1.offset|) (= |ULTIMATE.start_#Ultimate.C_memset_#value#1| 0) (<= 0 |ULTIMATE.start_Sum_~i~0#1|) (= |#NULL.offset| 0) (= |ULTIMATE.start_main_~p~0#1.offset| 0) (<= 0 |ULTIMATE.start_#Ultimate.C_memset_#res#1.offset|) (<= 0 |ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) (<= |ULTIMATE.start_Sum2_#in~instrs#1.offset| 0) (<= 0 |#StackHeapBarrier|) (<= 0 |ULTIMATE.start_Sum2_~i~1#1|) (not (<= (+ (* 30 |ULTIMATE.start_Sum2_~i~1#1|) |ULTIMATE.start_Sum2_~instrs#1.offset| 26) (select |#length| |ULTIMATE.start_Sum2_~instrs#1.base|))) (= |#NULL.base| 0))' at error location [2022-12-14 11:00:16,388 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2022-12-14 11:00:16,388 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-14 11:00:16,388 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 7, 7] total 23 [2022-12-14 11:00:16,388 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [607627428] [2022-12-14 11:00:16,388 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-14 11:00:16,389 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-12-14 11:00:16,389 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 11:00:16,389 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-12-14 11:00:16,389 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=146, Invalid=1260, Unknown=0, NotChecked=0, Total=1406 [2022-12-14 11:00:16,389 INFO L87 Difference]: Start difference. First operand 48 states and 52 transitions. Second operand has 23 states, 23 states have (on average 3.652173913043478) internal successors, (84), 23 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 11:00:16,800 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 11:00:16,801 INFO L93 Difference]: Finished difference Result 46 states and 49 transitions. [2022-12-14 11:00:16,801 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-12-14 11:00:16,801 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 3.652173913043478) internal successors, (84), 23 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 38 [2022-12-14 11:00:16,801 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 11:00:16,801 INFO L225 Difference]: With dead ends: 46 [2022-12-14 11:00:16,801 INFO L226 Difference]: Without dead ends: 46 [2022-12-14 11:00:16,802 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 139 GetRequests, 79 SyntacticMatches, 12 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 740 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=361, Invalid=2089, Unknown=0, NotChecked=0, Total=2450 [2022-12-14 11:00:16,802 INFO L413 NwaCegarLoop]: 13 mSDtfsCounter, 153 mSDsluCounter, 78 mSDsCounter, 0 mSdLazyCounter, 278 mSolverCounterSat, 21 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 153 SdHoareTripleChecker+Valid, 91 SdHoareTripleChecker+Invalid, 299 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 21 IncrementalHoareTripleChecker+Valid, 278 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-12-14 11:00:16,802 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [153 Valid, 91 Invalid, 299 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [21 Valid, 278 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-12-14 11:00:16,802 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2022-12-14 11:00:16,803 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2022-12-14 11:00:16,803 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 42 states have (on average 1.0714285714285714) internal successors, (45), 44 states have internal predecessors, (45), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-14 11:00:16,803 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 49 transitions. [2022-12-14 11:00:16,803 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 49 transitions. Word has length 38 [2022-12-14 11:00:16,804 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 11:00:16,804 INFO L495 AbstractCegarLoop]: Abstraction has 46 states and 49 transitions. [2022-12-14 11:00:16,804 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 3.652173913043478) internal successors, (84), 23 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 11:00:16,804 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 49 transitions. [2022-12-14 11:00:16,804 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2022-12-14 11:00:16,804 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 11:00:16,804 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 11:00:16,808 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2022-12-14 11:00:17,005 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 11:00:17,006 INFO L420 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-14 11:00:17,006 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 11:00:17,007 INFO L85 PathProgramCache]: Analyzing trace with hash -609537934, now seen corresponding path program 2 times [2022-12-14 11:00:17,007 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 11:00:17,007 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [782140704] [2022-12-14 11:00:17,007 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 11:00:17,008 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 11:00:17,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 11:00:17,112 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2022-12-14 11:00:17,112 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 11:00:17,112 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [782140704] [2022-12-14 11:00:17,112 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [782140704] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-14 11:00:17,112 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1296711399] [2022-12-14 11:00:17,112 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-12-14 11:00:17,112 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 11:00:17,112 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 [2022-12-14 11:00:17,113 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-14 11:00:17,115 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-12-14 11:00:17,496 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2022-12-14 11:00:17,497 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-12-14 11:00:17,498 INFO L263 TraceCheckSpWp]: Trace formula consists of 207 conjuncts, 8 conjunts are in the unsatisfiable core [2022-12-14 11:00:17,499 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-14 11:00:17,522 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2022-12-14 11:00:17,522 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-14 11:00:17,564 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2022-12-14 11:00:17,565 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1296711399] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-14 11:00:17,565 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [946164294] [2022-12-14 11:00:17,567 INFO L159 IcfgInterpreter]: Started Sifa with 25 locations of interest [2022-12-14 11:00:17,567 INFO L166 IcfgInterpreter]: Building call graph [2022-12-14 11:00:17,567 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2022-12-14 11:00:17,567 INFO L176 IcfgInterpreter]: Starting interpretation [2022-12-14 11:00:17,567 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2022-12-14 11:00:17,581 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:17,582 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:17,583 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 22 [2022-12-14 11:00:17,603 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:17,604 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 28 [2022-12-14 11:00:17,640 INFO L173 IndexEqualityManager]: detected equality via solver [2022-12-14 11:00:17,667 INFO L321 Elim1Store]: treesize reduction 76, result has 25.5 percent of original size [2022-12-14 11:00:17,668 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 5 case distinctions, treesize of input 232 treesize of output 233 [2022-12-14 11:00:17,721 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2022-12-14 11:00:17,739 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-12-14 11:00:17,755 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-12-14 11:00:17,781 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 32 [2022-12-14 11:00:17,800 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 44 [2022-12-14 11:00:17,817 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 56 [2022-12-14 11:00:17,840 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 68 [2022-12-14 11:00:17,870 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:17,871 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:17,872 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:17,872 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:17,873 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:17,873 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:17,874 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 6 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 80 [2022-12-14 11:00:18,093 INFO L180 IcfgInterpreter]: Interpretation finished [2022-12-14 11:00:20,254 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '3761#(and (= |ULTIMATE.start_#Ultimate.C_memset_#amount#1| 94) (<= |ULTIMATE.start_Sum_~instrs#1.offset| 0) (= 0 |ULTIMATE.start_main_~p~0#1.base|) (<= |ULTIMATE.start_Sum_#in~instrs#1.offset| 0) (<= 0 |ULTIMATE.start_Sum2_#in~instrs#1.offset|) (<= |ULTIMATE.start_#Ultimate.C_memset_#res#1.offset| 0) (<= |ULTIMATE.start_Sum2_~instrs#1.offset| 0) (<= 0 |ULTIMATE.start_Sum_~instrs#1.offset|) (not (= |ULTIMATE.start_main_old_#valid#1| |#valid|)) (= |ULTIMATE.start_Sum2_#res#1| |ULTIMATE.start_Sum2_~count~1#1|) (<= 0 |ULTIMATE.start_#Ultimate.C_memset_#ptr#1.offset|) (<= 0 |ULTIMATE.start_Sum2_~instrs#1.offset|) (<= |ULTIMATE.start_#Ultimate.C_memset_#ptr#1.offset| 0) (<= 0 |ULTIMATE.start_Sum_#in~instrs#1.offset|) (= |ULTIMATE.start_#Ultimate.C_memset_#value#1| 0) (<= 0 |ULTIMATE.start_Sum_~i~0#1|) (= |#NULL.offset| 0) (= 4311811859 |ULTIMATE.start_Sum2_#res#1|) (= |ULTIMATE.start_main_~p~0#1.offset| 0) (<= 0 |ULTIMATE.start_#Ultimate.C_memset_#res#1.offset|) (<= 0 |ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) (<= |ULTIMATE.start_Sum2_#in~instrs#1.offset| 0) (<= 0 |#StackHeapBarrier|) (<= 0 |ULTIMATE.start_Sum2_~i~1#1|) (= |ULTIMATE.start_main_#res#1| 0) (= |#NULL.base| 0))' at error location [2022-12-14 11:00:20,254 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2022-12-14 11:00:20,254 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-14 11:00:20,254 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 8 [2022-12-14 11:00:20,254 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1823632192] [2022-12-14 11:00:20,254 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-14 11:00:20,255 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-12-14 11:00:20,255 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 11:00:20,255 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-12-14 11:00:20,256 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=160, Invalid=542, Unknown=0, NotChecked=0, Total=702 [2022-12-14 11:00:20,256 INFO L87 Difference]: Start difference. First operand 46 states and 49 transitions. Second operand has 9 states, 9 states have (on average 3.7777777777777777) internal successors, (34), 8 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 11:00:20,357 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 11:00:20,357 INFO L93 Difference]: Finished difference Result 49 states and 52 transitions. [2022-12-14 11:00:20,357 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-12-14 11:00:20,357 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 3.7777777777777777) internal successors, (34), 8 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 41 [2022-12-14 11:00:20,358 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 11:00:20,358 INFO L225 Difference]: With dead ends: 49 [2022-12-14 11:00:20,358 INFO L226 Difference]: Without dead ends: 49 [2022-12-14 11:00:20,358 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 128 GetRequests, 87 SyntacticMatches, 13 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 402 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=191, Invalid=679, Unknown=0, NotChecked=0, Total=870 [2022-12-14 11:00:20,359 INFO L413 NwaCegarLoop]: 25 mSDtfsCounter, 82 mSDsluCounter, 68 mSDsCounter, 0 mSdLazyCounter, 42 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 82 SdHoareTripleChecker+Valid, 93 SdHoareTripleChecker+Invalid, 50 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 42 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-12-14 11:00:20,359 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [82 Valid, 93 Invalid, 50 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 42 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-12-14 11:00:20,360 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2022-12-14 11:00:20,361 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 49. [2022-12-14 11:00:20,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 49 states, 45 states have (on average 1.0666666666666667) internal successors, (48), 47 states have internal predecessors, (48), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-14 11:00:20,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 52 transitions. [2022-12-14 11:00:20,361 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 52 transitions. Word has length 41 [2022-12-14 11:00:20,362 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 11:00:20,362 INFO L495 AbstractCegarLoop]: Abstraction has 49 states and 52 transitions. [2022-12-14 11:00:20,362 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 3.7777777777777777) internal successors, (34), 8 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 11:00:20,362 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 52 transitions. [2022-12-14 11:00:20,362 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2022-12-14 11:00:20,362 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 11:00:20,362 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 4, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 11:00:20,367 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Ended with exit code 0 [2022-12-14 11:00:20,563 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 11:00:20,564 INFO L420 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-14 11:00:20,565 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 11:00:20,565 INFO L85 PathProgramCache]: Analyzing trace with hash 401014747, now seen corresponding path program 3 times [2022-12-14 11:00:20,565 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 11:00:20,565 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1837092809] [2022-12-14 11:00:20,566 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 11:00:20,566 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 11:00:20,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 11:00:20,737 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2022-12-14 11:00:20,737 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 11:00:20,737 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1837092809] [2022-12-14 11:00:20,737 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1837092809] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-14 11:00:20,738 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [709351104] [2022-12-14 11:00:20,738 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-12-14 11:00:20,738 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 11:00:20,738 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 [2022-12-14 11:00:20,739 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-14 11:00:20,739 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-12-14 11:00:20,995 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-12-14 11:00:20,995 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-12-14 11:00:20,997 INFO L263 TraceCheckSpWp]: Trace formula consists of 288 conjuncts, 14 conjunts are in the unsatisfiable core [2022-12-14 11:00:20,998 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-14 11:00:21,049 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2022-12-14 11:00:21,049 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-14 11:00:21,184 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2022-12-14 11:00:21,184 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [709351104] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-14 11:00:21,184 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1826371072] [2022-12-14 11:00:21,186 INFO L159 IcfgInterpreter]: Started Sifa with 25 locations of interest [2022-12-14 11:00:21,186 INFO L166 IcfgInterpreter]: Building call graph [2022-12-14 11:00:21,186 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2022-12-14 11:00:21,186 INFO L176 IcfgInterpreter]: Starting interpretation [2022-12-14 11:00:21,187 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2022-12-14 11:00:21,200 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:21,200 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:21,201 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 22 [2022-12-14 11:00:21,218 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:21,218 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 31 [2022-12-14 11:00:21,272 INFO L321 Elim1Store]: treesize reduction 84, result has 15.2 percent of original size [2022-12-14 11:00:21,272 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 239 treesize of output 236 [2022-12-14 11:00:21,305 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2022-12-14 11:00:21,313 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-12-14 11:00:21,322 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:21,322 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-12-14 11:00:21,332 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:21,332 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:21,333 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 32 [2022-12-14 11:00:21,344 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:21,344 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:21,345 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:21,346 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 44 [2022-12-14 11:00:21,358 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:21,359 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:21,359 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:21,360 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:21,361 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 56 [2022-12-14 11:00:21,374 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:21,374 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:21,375 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:21,375 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:21,376 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:21,377 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 68 [2022-12-14 11:00:21,392 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:21,393 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:21,393 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:21,394 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:21,394 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:21,394 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:21,395 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 6 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 80 [2022-12-14 11:00:21,632 INFO L180 IcfgInterpreter]: Interpretation finished [2022-12-14 11:00:23,295 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '4159#(and (= |ULTIMATE.start_#Ultimate.C_memset_#amount#1| 94) (<= |ULTIMATE.start_Sum_~instrs#1.offset| 0) (= 0 |ULTIMATE.start_main_~p~0#1.base|) (<= |ULTIMATE.start_Sum_#in~instrs#1.offset| 0) (<= 0 |ULTIMATE.start_Sum2_#in~instrs#1.offset|) (<= |ULTIMATE.start_#Ultimate.C_memset_#res#1.offset| 0) (<= |ULTIMATE.start_Sum2_~instrs#1.offset| 0) (<= 0 |ULTIMATE.start_Sum_~instrs#1.offset|) (not (= |ULTIMATE.start_main_old_#valid#1| |#valid|)) (= |ULTIMATE.start_Sum2_#res#1| |ULTIMATE.start_Sum2_~count~1#1|) (<= 0 |ULTIMATE.start_#Ultimate.C_memset_#ptr#1.offset|) (<= 0 |ULTIMATE.start_Sum2_~instrs#1.offset|) (<= |ULTIMATE.start_#Ultimate.C_memset_#ptr#1.offset| 0) (<= 0 |ULTIMATE.start_Sum_#in~instrs#1.offset|) (= |ULTIMATE.start_#Ultimate.C_memset_#value#1| 0) (<= 0 |ULTIMATE.start_Sum_~i~0#1|) (= |#NULL.offset| 0) (= 4311811859 |ULTIMATE.start_Sum2_#res#1|) (= |ULTIMATE.start_main_~p~0#1.offset| 0) (<= 0 |ULTIMATE.start_#Ultimate.C_memset_#res#1.offset|) (<= 0 |ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) (<= |ULTIMATE.start_Sum2_#in~instrs#1.offset| 0) (<= 0 |#StackHeapBarrier|) (<= 0 |ULTIMATE.start_Sum2_~i~1#1|) (= |ULTIMATE.start_main_#res#1| 0) (= |#NULL.base| 0))' at error location [2022-12-14 11:00:23,295 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2022-12-14 11:00:23,295 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-14 11:00:23,295 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 17 [2022-12-14 11:00:23,295 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1207232002] [2022-12-14 11:00:23,296 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-14 11:00:23,296 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-12-14 11:00:23,296 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 11:00:23,296 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-12-14 11:00:23,297 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=256, Invalid=1004, Unknown=0, NotChecked=0, Total=1260 [2022-12-14 11:00:23,297 INFO L87 Difference]: Start difference. First operand 49 states and 52 transitions. Second operand has 18 states, 18 states have (on average 2.388888888888889) internal successors, (43), 17 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 11:00:24,258 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 11:00:24,258 INFO L93 Difference]: Finished difference Result 55 states and 58 transitions. [2022-12-14 11:00:24,258 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-12-14 11:00:24,259 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 2.388888888888889) internal successors, (43), 17 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2022-12-14 11:00:24,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 11:00:24,259 INFO L225 Difference]: With dead ends: 55 [2022-12-14 11:00:24,259 INFO L226 Difference]: Without dead ends: 55 [2022-12-14 11:00:24,259 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 143 GetRequests, 98 SyntacticMatches, 5 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 568 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=347, Invalid=1375, Unknown=0, NotChecked=0, Total=1722 [2022-12-14 11:00:24,260 INFO L413 NwaCegarLoop]: 25 mSDtfsCounter, 160 mSDsluCounter, 88 mSDsCounter, 0 mSdLazyCounter, 75 mSolverCounterSat, 17 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 160 SdHoareTripleChecker+Valid, 113 SdHoareTripleChecker+Invalid, 92 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 17 IncrementalHoareTripleChecker+Valid, 75 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-12-14 11:00:24,260 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [160 Valid, 113 Invalid, 92 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [17 Valid, 75 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-12-14 11:00:24,260 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2022-12-14 11:00:24,262 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 55. [2022-12-14 11:00:24,262 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 55 states, 51 states have (on average 1.0588235294117647) internal successors, (54), 53 states have internal predecessors, (54), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-14 11:00:24,262 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 58 transitions. [2022-12-14 11:00:24,262 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 58 transitions. Word has length 44 [2022-12-14 11:00:24,262 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 11:00:24,262 INFO L495 AbstractCegarLoop]: Abstraction has 55 states and 58 transitions. [2022-12-14 11:00:24,262 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 2.388888888888889) internal successors, (43), 17 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 11:00:24,262 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 58 transitions. [2022-12-14 11:00:24,263 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2022-12-14 11:00:24,263 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 11:00:24,263 INFO L195 NwaCegarLoop]: trace histogram [10, 4, 4, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 11:00:24,268 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Ended with exit code 0 [2022-12-14 11:00:24,463 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20,12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 11:00:24,464 INFO L420 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-14 11:00:24,465 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 11:00:24,465 INFO L85 PathProgramCache]: Analyzing trace with hash 1281845371, now seen corresponding path program 4 times [2022-12-14 11:00:24,466 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 11:00:24,466 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [852011364] [2022-12-14 11:00:24,466 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 11:00:24,466 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 11:00:24,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 11:00:24,764 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2022-12-14 11:00:24,764 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 11:00:24,764 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [852011364] [2022-12-14 11:00:24,764 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [852011364] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-14 11:00:24,764 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [814055540] [2022-12-14 11:00:24,764 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-12-14 11:00:24,764 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 11:00:24,764 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 [2022-12-14 11:00:24,765 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-14 11:00:24,766 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-12-14 11:00:25,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 11:00:25,225 INFO L263 TraceCheckSpWp]: Trace formula consists of 330 conjuncts, 26 conjunts are in the unsatisfiable core [2022-12-14 11:00:25,226 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-14 11:00:25,379 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2022-12-14 11:00:25,379 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-14 11:00:25,995 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2022-12-14 11:00:25,995 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [814055540] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-14 11:00:25,995 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [48374301] [2022-12-14 11:00:25,996 INFO L159 IcfgInterpreter]: Started Sifa with 25 locations of interest [2022-12-14 11:00:25,996 INFO L166 IcfgInterpreter]: Building call graph [2022-12-14 11:00:25,997 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2022-12-14 11:00:25,997 INFO L176 IcfgInterpreter]: Starting interpretation [2022-12-14 11:00:25,997 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2022-12-14 11:00:26,009 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:26,009 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:26,010 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 22 [2022-12-14 11:00:26,024 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:26,025 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 28 [2022-12-14 11:00:26,058 INFO L173 IndexEqualityManager]: detected equality via solver [2022-12-14 11:00:26,077 INFO L321 Elim1Store]: treesize reduction 76, result has 25.5 percent of original size [2022-12-14 11:00:26,078 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 5 case distinctions, treesize of input 232 treesize of output 233 [2022-12-14 11:00:26,115 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2022-12-14 11:00:26,132 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-12-14 11:00:26,147 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-12-14 11:00:26,166 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 32 [2022-12-14 11:00:26,182 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 44 [2022-12-14 11:00:26,212 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 56 [2022-12-14 11:00:26,231 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 68 [2022-12-14 11:00:26,249 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:26,250 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:26,250 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:26,251 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:26,251 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:26,252 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:00:26,252 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 6 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 80 [2022-12-14 11:00:26,466 INFO L180 IcfgInterpreter]: Interpretation finished [2022-12-14 11:00:29,549 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '4629#(and (= |ULTIMATE.start_#Ultimate.C_memset_#amount#1| 94) (<= |ULTIMATE.start_Sum_~instrs#1.offset| 0) (= 0 |ULTIMATE.start_main_~p~0#1.base|) (<= |ULTIMATE.start_Sum_#in~instrs#1.offset| 0) (<= 0 |ULTIMATE.start_Sum2_#in~instrs#1.offset|) (<= |ULTIMATE.start_#Ultimate.C_memset_#res#1.offset| 0) (<= |ULTIMATE.start_Sum2_~instrs#1.offset| 0) (<= 0 |ULTIMATE.start_Sum_~instrs#1.offset|) (not (= |ULTIMATE.start_main_old_#valid#1| |#valid|)) (= |ULTIMATE.start_Sum2_#res#1| |ULTIMATE.start_Sum2_~count~1#1|) (<= 0 |ULTIMATE.start_#Ultimate.C_memset_#ptr#1.offset|) (<= 0 |ULTIMATE.start_Sum2_~instrs#1.offset|) (<= |ULTIMATE.start_#Ultimate.C_memset_#ptr#1.offset| 0) (<= 0 |ULTIMATE.start_Sum_#in~instrs#1.offset|) (= |ULTIMATE.start_#Ultimate.C_memset_#value#1| 0) (<= 0 |ULTIMATE.start_Sum_~i~0#1|) (= |#NULL.offset| 0) (= 4311811859 |ULTIMATE.start_Sum2_#res#1|) (= |ULTIMATE.start_main_~p~0#1.offset| 0) (<= 0 |ULTIMATE.start_#Ultimate.C_memset_#res#1.offset|) (<= 0 |ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) (<= |ULTIMATE.start_Sum2_#in~instrs#1.offset| 0) (<= 0 |#StackHeapBarrier|) (<= 0 |ULTIMATE.start_Sum2_~i~1#1|) (= |ULTIMATE.start_main_#res#1| 0) (= |#NULL.base| 0))' at error location [2022-12-14 11:00:29,549 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2022-12-14 11:00:29,549 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-14 11:00:29,549 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 35 [2022-12-14 11:00:29,549 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1365082916] [2022-12-14 11:00:29,549 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-14 11:00:29,549 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 36 states [2022-12-14 11:00:29,549 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 11:00:29,550 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2022-12-14 11:00:29,550 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=549, Invalid=2313, Unknown=0, NotChecked=0, Total=2862 [2022-12-14 11:00:29,550 INFO L87 Difference]: Start difference. First operand 55 states and 58 transitions. Second operand has 36 states, 36 states have (on average 1.6944444444444444) internal successors, (61), 35 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 11:00:49,086 WARN L233 SmtUtils]: Spent 5.84s on a formula simplification. DAG size of input: 68 DAG size of output: 54 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-12-14 11:00:52,167 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 11:00:52,168 INFO L93 Difference]: Finished difference Result 67 states and 70 transitions. [2022-12-14 11:00:52,168 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2022-12-14 11:00:52,168 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 36 states have (on average 1.6944444444444444) internal successors, (61), 35 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 50 [2022-12-14 11:00:52,168 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 11:00:52,169 INFO L225 Difference]: With dead ends: 67 [2022-12-14 11:00:52,169 INFO L226 Difference]: Without dead ends: 67 [2022-12-14 11:00:52,171 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 173 GetRequests, 96 SyntacticMatches, 13 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1572 ImplicationChecksByTransitivity, 23.3s TimeCoverageRelationStatistics Valid=867, Invalid=3423, Unknown=0, NotChecked=0, Total=4290 [2022-12-14 11:00:52,171 INFO L413 NwaCegarLoop]: 25 mSDtfsCounter, 254 mSDsluCounter, 214 mSDsCounter, 0 mSdLazyCounter, 264 mSolverCounterSat, 30 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 254 SdHoareTripleChecker+Valid, 239 SdHoareTripleChecker+Invalid, 294 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 30 IncrementalHoareTripleChecker+Valid, 264 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.2s IncrementalHoareTripleChecker+Time [2022-12-14 11:00:52,172 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [254 Valid, 239 Invalid, 294 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [30 Valid, 264 Invalid, 0 Unknown, 0 Unchecked, 3.2s Time] [2022-12-14 11:00:52,172 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states. [2022-12-14 11:00:52,173 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 67. [2022-12-14 11:00:52,173 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 67 states, 63 states have (on average 1.0476190476190477) internal successors, (66), 65 states have internal predecessors, (66), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-14 11:00:52,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 70 transitions. [2022-12-14 11:00:52,173 INFO L78 Accepts]: Start accepts. Automaton has 67 states and 70 transitions. Word has length 50 [2022-12-14 11:00:52,173 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 11:00:52,173 INFO L495 AbstractCegarLoop]: Abstraction has 67 states and 70 transitions. [2022-12-14 11:00:52,173 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 36 states, 36 states have (on average 1.6944444444444444) internal successors, (61), 35 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 11:00:52,174 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 70 transitions. [2022-12-14 11:00:52,174 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2022-12-14 11:00:52,174 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 11:00:52,174 INFO L195 NwaCegarLoop]: trace histogram [22, 4, 4, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 11:00:52,179 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Ended with exit code 0 [2022-12-14 11:00:52,375 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable21 [2022-12-14 11:00:52,376 INFO L420 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-14 11:00:52,376 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 11:00:52,377 INFO L85 PathProgramCache]: Analyzing trace with hash 2045202875, now seen corresponding path program 5 times [2022-12-14 11:00:52,377 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 11:00:52,377 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1286960045] [2022-12-14 11:00:52,377 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 11:00:52,378 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 11:00:52,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 11:00:53,125 INFO L134 CoverageAnalysis]: Checked inductivity of 283 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2022-12-14 11:00:53,125 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 11:00:53,125 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1286960045] [2022-12-14 11:00:53,125 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1286960045] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-14 11:00:53,125 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [210558402] [2022-12-14 11:00:53,126 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-12-14 11:00:53,126 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 11:00:53,126 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 [2022-12-14 11:00:53,127 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-14 11:00:53,127 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-12-14 11:01:11,551 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2022-12-14 11:01:11,551 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-12-14 11:01:11,561 INFO L263 TraceCheckSpWp]: Trace formula consists of 414 conjuncts, 62 conjunts are in the unsatisfiable core [2022-12-14 11:01:11,563 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-14 11:01:12,277 INFO L134 CoverageAnalysis]: Checked inductivity of 283 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2022-12-14 11:01:12,277 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-14 11:01:13,537 INFO L134 CoverageAnalysis]: Checked inductivity of 283 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2022-12-14 11:01:13,537 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [210558402] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-14 11:01:13,537 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2010511529] [2022-12-14 11:01:13,538 INFO L159 IcfgInterpreter]: Started Sifa with 25 locations of interest [2022-12-14 11:01:13,539 INFO L166 IcfgInterpreter]: Building call graph [2022-12-14 11:01:13,539 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2022-12-14 11:01:13,539 INFO L176 IcfgInterpreter]: Starting interpretation [2022-12-14 11:01:13,539 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2022-12-14 11:01:13,553 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:01:13,554 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:01:13,555 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 22 [2022-12-14 11:01:13,578 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:01:13,578 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 31 [2022-12-14 11:01:13,629 INFO L321 Elim1Store]: treesize reduction 84, result has 15.2 percent of original size [2022-12-14 11:01:13,629 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 239 treesize of output 236 [2022-12-14 11:01:13,665 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2022-12-14 11:01:13,674 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-12-14 11:01:13,683 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:01:13,683 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-12-14 11:01:13,693 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:01:13,693 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:01:13,694 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 32 [2022-12-14 11:01:13,706 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:01:13,707 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:01:13,708 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:01:13,708 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 44 [2022-12-14 11:01:13,721 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:01:13,722 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:01:13,722 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:01:13,723 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:01:13,723 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 56 [2022-12-14 11:01:13,738 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:01:13,738 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:01:13,739 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:01:13,739 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:01:13,740 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:01:13,740 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 68 [2022-12-14 11:01:13,754 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:01:13,755 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:01:13,755 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:01:13,756 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:01:13,756 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:01:13,757 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:01:13,757 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 6 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 80 [2022-12-14 11:01:13,947 INFO L180 IcfgInterpreter]: Interpretation finished [2022-12-14 11:01:17,342 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '5243#(and (= |ULTIMATE.start_#Ultimate.C_memset_#amount#1| 94) (<= |ULTIMATE.start_Sum_~instrs#1.offset| 0) (= 0 |ULTIMATE.start_main_~p~0#1.base|) (<= |ULTIMATE.start_Sum_#in~instrs#1.offset| 0) (<= 0 |ULTIMATE.start_Sum2_#in~instrs#1.offset|) (<= |ULTIMATE.start_#Ultimate.C_memset_#res#1.offset| 0) (<= |ULTIMATE.start_Sum2_~instrs#1.offset| 0) (<= 0 |ULTIMATE.start_Sum_~instrs#1.offset|) (not (= |ULTIMATE.start_main_old_#valid#1| |#valid|)) (= |ULTIMATE.start_Sum2_#res#1| |ULTIMATE.start_Sum2_~count~1#1|) (<= 0 |ULTIMATE.start_#Ultimate.C_memset_#ptr#1.offset|) (<= 0 |ULTIMATE.start_Sum2_~instrs#1.offset|) (<= |ULTIMATE.start_#Ultimate.C_memset_#ptr#1.offset| 0) (<= 0 |ULTIMATE.start_Sum_#in~instrs#1.offset|) (= |ULTIMATE.start_#Ultimate.C_memset_#value#1| 0) (<= 0 |ULTIMATE.start_Sum_~i~0#1|) (= |#NULL.offset| 0) (= 4311811859 |ULTIMATE.start_Sum2_#res#1|) (= |ULTIMATE.start_main_~p~0#1.offset| 0) (<= 0 |ULTIMATE.start_#Ultimate.C_memset_#res#1.offset|) (<= 0 |ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) (<= |ULTIMATE.start_Sum2_#in~instrs#1.offset| 0) (<= 0 |#StackHeapBarrier|) (<= 0 |ULTIMATE.start_Sum2_~i~1#1|) (= |ULTIMATE.start_main_#res#1| 0) (= |#NULL.base| 0))' at error location [2022-12-14 11:01:17,342 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2022-12-14 11:01:17,342 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-14 11:01:17,342 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25] total 71 [2022-12-14 11:01:17,342 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1386557223] [2022-12-14 11:01:17,342 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-14 11:01:17,343 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 72 states [2022-12-14 11:01:17,343 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 11:01:17,343 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 72 interpolants. [2022-12-14 11:01:17,344 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1441, Invalid=6569, Unknown=0, NotChecked=0, Total=8010 [2022-12-14 11:01:17,344 INFO L87 Difference]: Start difference. First operand 67 states and 70 transitions. Second operand has 72 states, 72 states have (on average 1.3472222222222223) internal successors, (97), 71 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 11:03:56,752 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 11:03:56,753 INFO L93 Difference]: Finished difference Result 91 states and 94 transitions. [2022-12-14 11:03:56,753 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2022-12-14 11:03:56,753 INFO L78 Accepts]: Start accepts. Automaton has has 72 states, 72 states have (on average 1.3472222222222223) internal successors, (97), 71 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 62 [2022-12-14 11:03:56,753 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 11:03:56,754 INFO L225 Difference]: With dead ends: 91 [2022-12-14 11:03:56,754 INFO L226 Difference]: Without dead ends: 91 [2022-12-14 11:03:56,756 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 233 GetRequests, 108 SyntacticMatches, 13 SemanticMatches, 112 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4147 ImplicationChecksByTransitivity, 164.4s TimeCoverageRelationStatistics Valid=2625, Invalid=10255, Unknown=2, NotChecked=0, Total=12882 [2022-12-14 11:03:56,757 INFO L413 NwaCegarLoop]: 25 mSDtfsCounter, 124 mSDsluCounter, 556 mSDsCounter, 0 mSdLazyCounter, 1068 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 124 SdHoareTripleChecker+Valid, 581 SdHoareTripleChecker+Invalid, 1076 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 1068 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-12-14 11:03:56,757 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [124 Valid, 581 Invalid, 1076 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 1068 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-12-14 11:03:56,757 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91 states. [2022-12-14 11:03:56,758 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91 to 91. [2022-12-14 11:03:56,758 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 91 states, 87 states have (on average 1.0344827586206897) internal successors, (90), 89 states have internal predecessors, (90), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-14 11:03:56,759 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 94 transitions. [2022-12-14 11:03:56,759 INFO L78 Accepts]: Start accepts. Automaton has 91 states and 94 transitions. Word has length 62 [2022-12-14 11:03:56,759 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 11:03:56,759 INFO L495 AbstractCegarLoop]: Abstraction has 91 states and 94 transitions. [2022-12-14 11:03:56,759 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 72 states, 72 states have (on average 1.3472222222222223) internal successors, (97), 71 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 11:03:56,759 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 94 transitions. [2022-12-14 11:03:56,760 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2022-12-14 11:03:56,760 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 11:03:56,760 INFO L195 NwaCegarLoop]: trace histogram [46, 4, 4, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 11:03:56,768 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Ended with exit code 0 [2022-12-14 11:03:56,960 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable22 [2022-12-14 11:03:56,961 INFO L420 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-14 11:03:56,961 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 11:03:56,962 INFO L85 PathProgramCache]: Analyzing trace with hash -1522826181, now seen corresponding path program 6 times [2022-12-14 11:03:56,962 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 11:03:56,962 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2505974] [2022-12-14 11:03:56,963 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 11:03:56,963 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 11:03:57,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 11:03:58,933 INFO L134 CoverageAnalysis]: Checked inductivity of 1111 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2022-12-14 11:03:58,933 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 11:03:58,934 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2505974] [2022-12-14 11:03:58,934 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2505974] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-14 11:03:58,934 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1856084221] [2022-12-14 11:03:58,934 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-12-14 11:03:58,934 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 11:03:58,934 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 [2022-12-14 11:03:58,935 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-14 11:03:58,935 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4d663ca-ecef-4232-a025-8ba009cdc4d8/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-12-14 11:03:59,576 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-12-14 11:03:59,577 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-12-14 11:03:59,581 INFO L263 TraceCheckSpWp]: Trace formula consists of 582 conjuncts, 98 conjunts are in the unsatisfiable core [2022-12-14 11:03:59,583 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-14 11:04:02,318 INFO L134 CoverageAnalysis]: Checked inductivity of 1111 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2022-12-14 11:04:02,319 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-14 11:04:09,992 INFO L134 CoverageAnalysis]: Checked inductivity of 1111 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2022-12-14 11:04:09,992 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1856084221] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-14 11:04:09,992 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2023660743] [2022-12-14 11:04:09,993 INFO L159 IcfgInterpreter]: Started Sifa with 25 locations of interest [2022-12-14 11:04:09,993 INFO L166 IcfgInterpreter]: Building call graph [2022-12-14 11:04:09,993 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2022-12-14 11:04:09,993 INFO L176 IcfgInterpreter]: Starting interpretation [2022-12-14 11:04:09,993 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2022-12-14 11:04:10,003 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:04:10,004 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:04:10,005 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 22 [2022-12-14 11:04:10,026 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:04:10,026 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 31 [2022-12-14 11:04:10,083 INFO L321 Elim1Store]: treesize reduction 84, result has 15.2 percent of original size [2022-12-14 11:04:10,083 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 239 treesize of output 236 [2022-12-14 11:04:10,118 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2022-12-14 11:04:10,129 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-12-14 11:04:10,137 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:04:10,138 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-12-14 11:04:10,149 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:04:10,149 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:04:10,150 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 32 [2022-12-14 11:04:10,161 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:04:10,162 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:04:10,163 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:04:10,163 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 44 [2022-12-14 11:04:10,177 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:04:10,178 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:04:10,178 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:04:10,179 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:04:10,180 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 56 [2022-12-14 11:04:10,192 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:04:10,192 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:04:10,193 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:04:10,193 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:04:10,194 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:04:10,195 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 68 [2022-12-14 11:04:10,211 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:04:10,211 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:04:10,212 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:04:10,213 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:04:10,213 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:04:10,214 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-14 11:04:10,215 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 6 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 80 [2022-12-14 11:04:10,444 INFO L180 IcfgInterpreter]: Interpretation finished [2022-12-14 11:04:17,722 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '6145#(and (= |ULTIMATE.start_#Ultimate.C_memset_#amount#1| 94) (<= |ULTIMATE.start_Sum_~instrs#1.offset| 0) (= 0 |ULTIMATE.start_main_~p~0#1.base|) (<= |ULTIMATE.start_Sum_#in~instrs#1.offset| 0) (<= 0 |ULTIMATE.start_Sum2_#in~instrs#1.offset|) (<= |ULTIMATE.start_#Ultimate.C_memset_#res#1.offset| 0) (<= |ULTIMATE.start_Sum2_~instrs#1.offset| 0) (<= 0 |ULTIMATE.start_Sum_~instrs#1.offset|) (not (= |ULTIMATE.start_main_old_#valid#1| |#valid|)) (= |ULTIMATE.start_Sum2_#res#1| |ULTIMATE.start_Sum2_~count~1#1|) (<= 0 |ULTIMATE.start_#Ultimate.C_memset_#ptr#1.offset|) (<= 0 |ULTIMATE.start_Sum2_~instrs#1.offset|) (<= |ULTIMATE.start_#Ultimate.C_memset_#ptr#1.offset| 0) (<= 0 |ULTIMATE.start_Sum_#in~instrs#1.offset|) (= |ULTIMATE.start_#Ultimate.C_memset_#value#1| 0) (<= 0 |ULTIMATE.start_Sum_~i~0#1|) (= |#NULL.offset| 0) (= 4311811859 |ULTIMATE.start_Sum2_#res#1|) (= |ULTIMATE.start_main_~p~0#1.offset| 0) (<= 0 |ULTIMATE.start_#Ultimate.C_memset_#res#1.offset|) (<= 0 |ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) (<= |ULTIMATE.start_Sum2_#in~instrs#1.offset| 0) (<= 0 |#StackHeapBarrier|) (<= 0 |ULTIMATE.start_Sum2_~i~1#1|) (= |ULTIMATE.start_main_#res#1| 0) (= |#NULL.base| 0))' at error location [2022-12-14 11:04:17,722 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2022-12-14 11:04:17,722 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-14 11:04:17,722 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49, 49] total 143 [2022-12-14 11:04:17,722 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1235847659] [2022-12-14 11:04:17,722 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-14 11:04:17,723 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 144 states [2022-12-14 11:04:17,723 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 11:04:17,724 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 144 interpolants. [2022-12-14 11:04:17,727 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5380, Invalid=20702, Unknown=0, NotChecked=0, Total=26082 [2022-12-14 11:04:17,727 INFO L87 Difference]: Start difference. First operand 91 states and 94 transitions. Second operand has 144 states, 144 states have (on average 1.1736111111111112) internal successors, (169), 143 states have internal predecessors, (169), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-14 11:08:43,673 WARN L233 SmtUtils]: Spent 3.22m on a formula simplification. DAG size of input: 286 DAG size of output: 14 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-12-14 11:08:45,695 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse45 (mod |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4294967296))) (let ((.cse12 (< (mod (+ 36 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse45)) (.cse9 (< (mod (+ 42 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse45)) (.cse7 (< (mod (+ 30 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse45)) (.cse11 (< (mod (+ 31 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse45)) (.cse0 (< (mod (+ 14 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse45)) (.cse1 (< (mod (+ 15 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse45)) (.cse23 (< (mod (+ 16 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse45)) (.cse22 (< (mod (+ 19 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse45)) (.cse8 (< (mod (+ 41 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse45)) (.cse16 (< (mod (+ 40 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse45)) (.cse26 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 1) 4294967296) .cse45)) (.cse3 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 27) 4294967296) .cse45)) (.cse15 (< (mod (+ 39 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse45)) (.cse30 (< (mod (+ 38 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse45)) (.cse14 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 37) 4294967296) .cse45)) (.cse32 (< (mod (+ 22 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse45)) (.cse27 (< (mod (+ 18 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse45)) (.cse24 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 17) 4294967296) .cse45)) (.cse20 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 11) 4294967296) .cse45)) (.cse38 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4) 4294967296) .cse45)) (.cse39 (< (mod (+ 5 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse45)) (.cse35 (< (mod (+ 6 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse45)) (.cse36 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 10) 4294967296) .cse45)) (.cse4 (< (mod (+ 9 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse45)) (.cse2 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 26) 4294967296) .cse45)) (.cse31 (< (mod (+ 23 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse45)) (.cse37 (< (mod (+ 3 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse45)) (.cse28 (< (mod (+ 2 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse45)) (.cse42 (< (mod (+ 33 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse45)) (.cse10 (< (mod (+ 32 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse45)) (.cse41 (< (mod (+ 34 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse45)) (.cse13 (< (mod (+ 35 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse45)) (.cse43 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 24) 4294967296) .cse45)) (.cse40 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 25) 4294967296) .cse45)) (.cse19 (< (mod (+ 12 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse45)) (.cse18 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 13) 4294967296) .cse45)) (.cse6 (< (mod (+ 29 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse45)) (.cse29 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 28) 4294967296) .cse45)) (.cse25 (< (mod |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4294967296) .cse45)) (.cse17 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 43) 4294967296) .cse45)) (.cse21 (< (mod (+ 20 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse45)) (.cse33 (< (mod (+ 21 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse45)) (.cse5 (< (mod (+ 8 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse45)) (.cse34 (< (mod (+ 7 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse45)) (.cse44 (< (mod (+ 44 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse45))) (and (or (not .cse0) .cse1) (or (not .cse2) .cse3) (or .cse4 (not .cse5)) (or (not .cse6) .cse7) (or (not .cse8) .cse9) (or .cse10 (not .cse11)) (or .cse12 (not .cse13)) (or .cse14 (not .cse12)) (<= |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 94) (or (not .cse15) .cse16) (or .cse17 (not .cse9)) (or (not .cse7) .cse11) (or (not .cse18) .cse0) (or .cse19 (not .cse20)) (or .cse21 (not .cse22)) (or (not .cse1) .cse23) (or (not .cse23) .cse24) (or (not .cse25) .cse26) (or .cse22 (not .cse27)) (or .cse8 (not .cse16)) (or (not .cse26) .cse28) (or (not .cse3) .cse29) (or (not .cse30) .cse15) (or .cse30 (not .cse14)) (or .cse31 (not .cse32)) (or (not .cse33) .cse32) (or .cse34 (not .cse35)) (or .cse27 (not .cse24)) (or .cse20 (not .cse36)) (or (not .cse37) .cse38) (or .cse39 (not .cse38)) (or (not .cse39) .cse35) (or .cse36 (not .cse4)) (<= 94 |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1|) (or (not .cse40) .cse2) (or .cse41 (not .cse42)) (or .cse43 (not .cse31)) (or .cse37 (not .cse28)) (or .cse42 (not .cse10)) (or (not .cse41) .cse13) (or (not .cse43) .cse40) (or (not .cse19) .cse18) (or .cse6 (not .cse29)) .cse25 (or (not .cse17) .cse44) (or (not .cse21) .cse33) (or .cse5 (not .cse34)) (or (< (mod (+ 45 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse45) (not .cse44))))) is different from false [2022-12-14 11:08:47,715 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse44 (mod |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4294967296))) (let ((.cse12 (< (mod (+ 36 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse44)) (.cse9 (< (mod (+ 42 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse44)) (.cse7 (< (mod (+ 30 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse44)) (.cse11 (< (mod (+ 31 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse44)) (.cse0 (< (mod (+ 14 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse44)) (.cse1 (< (mod (+ 15 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse44)) (.cse23 (< (mod (+ 16 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse44)) (.cse22 (< (mod (+ 19 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse44)) (.cse8 (< (mod (+ 41 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse44)) (.cse16 (< (mod (+ 40 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse44)) (.cse26 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 1) 4294967296) .cse44)) (.cse3 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 27) 4294967296) .cse44)) (.cse15 (< (mod (+ 39 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse44)) (.cse30 (< (mod (+ 38 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse44)) (.cse14 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 37) 4294967296) .cse44)) (.cse32 (< (mod (+ 22 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse44)) (.cse27 (< (mod (+ 18 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse44)) (.cse24 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 17) 4294967296) .cse44)) (.cse20 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 11) 4294967296) .cse44)) (.cse38 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4) 4294967296) .cse44)) (.cse39 (< (mod (+ 5 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse44)) (.cse35 (< (mod (+ 6 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse44)) (.cse36 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 10) 4294967296) .cse44)) (.cse4 (< (mod (+ 9 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse44)) (.cse2 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 26) 4294967296) .cse44)) (.cse31 (< (mod (+ 23 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse44)) (.cse37 (< (mod (+ 3 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse44)) (.cse28 (< (mod (+ 2 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse44)) (.cse42 (< (mod (+ 33 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse44)) (.cse10 (< (mod (+ 32 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse44)) (.cse41 (< (mod (+ 34 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse44)) (.cse13 (< (mod (+ 35 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse44)) (.cse43 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 24) 4294967296) .cse44)) (.cse40 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 25) 4294967296) .cse44)) (.cse19 (< (mod (+ 12 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse44)) (.cse18 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 13) 4294967296) .cse44)) (.cse6 (< (mod (+ 29 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse44)) (.cse29 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 28) 4294967296) .cse44)) (.cse25 (< (mod |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4294967296) .cse44)) (.cse17 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 43) 4294967296) .cse44)) (.cse21 (< (mod (+ 20 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse44)) (.cse33 (< (mod (+ 21 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse44)) (.cse5 (< (mod (+ 8 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse44)) (.cse34 (< (mod (+ 7 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse44))) (and (or (not .cse0) .cse1) (or (not .cse2) .cse3) (or .cse4 (not .cse5)) (or (not .cse6) .cse7) (or (not .cse8) .cse9) (or .cse10 (not .cse11)) (or .cse12 (not .cse13)) (or .cse14 (not .cse12)) (or (not .cse15) .cse16) (or .cse17 (not .cse9)) (or (not .cse7) .cse11) (or (not .cse18) .cse0) (or .cse19 (not .cse20)) (or .cse21 (not .cse22)) (or (not .cse1) .cse23) (or (not .cse23) .cse24) (or (not .cse25) .cse26) (or .cse22 (not .cse27)) (or .cse8 (not .cse16)) (or (not .cse26) .cse28) (or (not .cse3) .cse29) (or (not .cse30) .cse15) (or .cse30 (not .cse14)) (or .cse31 (not .cse32)) (or (not .cse33) .cse32) (or .cse34 (not .cse35)) (or .cse27 (not .cse24)) (or .cse20 (not .cse36)) (or (not .cse37) .cse38) (or .cse39 (not .cse38)) (or (not .cse39) .cse35) (or .cse36 (not .cse4)) (or (not .cse40) .cse2) (or .cse41 (not .cse42)) (or .cse43 (not .cse31)) (or .cse37 (not .cse28)) (or .cse42 (not .cse10)) (or (not .cse41) .cse13) (or (not .cse43) .cse40) (or (not .cse19) .cse18) (or .cse6 (not .cse29)) .cse25 (or (not .cse17) (< (mod (+ 44 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse44)) (or (not .cse21) .cse33) (or .cse5 (not .cse34))))) is different from false [2022-12-14 11:08:49,732 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse17 (mod |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4294967296))) (let ((.cse12 (< (mod (+ 36 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse17)) (.cse9 (< (mod (+ 42 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse17)) (.cse7 (< (mod (+ 30 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse17)) (.cse11 (< (mod (+ 31 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse17)) (.cse0 (< (mod (+ 14 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse17)) (.cse1 (< (mod (+ 15 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse17)) (.cse23 (< (mod (+ 16 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse17)) (.cse22 (< (mod (+ 19 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse17)) (.cse8 (< (mod (+ 41 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse17)) (.cse16 (< (mod (+ 40 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse17)) (.cse26 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 1) 4294967296) .cse17)) (.cse3 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 27) 4294967296) .cse17)) (.cse15 (< (mod (+ 39 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse17)) (.cse30 (< (mod (+ 38 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse17)) (.cse14 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 37) 4294967296) .cse17)) (.cse32 (< (mod (+ 22 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse17)) (.cse27 (< (mod (+ 18 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse17)) (.cse24 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 17) 4294967296) .cse17)) (.cse20 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 11) 4294967296) .cse17)) (.cse38 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4) 4294967296) .cse17)) (.cse39 (< (mod (+ 5 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse17)) (.cse35 (< (mod (+ 6 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse17)) (.cse36 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 10) 4294967296) .cse17)) (.cse4 (< (mod (+ 9 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse17)) (.cse2 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 26) 4294967296) .cse17)) (.cse31 (< (mod (+ 23 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse17)) (.cse37 (< (mod (+ 3 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse17)) (.cse28 (< (mod (+ 2 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse17)) (.cse42 (< (mod (+ 33 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse17)) (.cse10 (< (mod (+ 32 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse17)) (.cse41 (< (mod (+ 34 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse17)) (.cse13 (< (mod (+ 35 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse17)) (.cse43 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 24) 4294967296) .cse17)) (.cse40 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 25) 4294967296) .cse17)) (.cse19 (< (mod (+ 12 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse17)) (.cse18 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 13) 4294967296) .cse17)) (.cse6 (< (mod (+ 29 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse17)) (.cse29 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 28) 4294967296) .cse17)) (.cse25 (< (mod |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4294967296) .cse17)) (.cse21 (< (mod (+ 20 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse17)) (.cse33 (< (mod (+ 21 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse17)) (.cse5 (< (mod (+ 8 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse17)) (.cse34 (< (mod (+ 7 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse17))) (and (or (not .cse0) .cse1) (or (not .cse2) .cse3) (or .cse4 (not .cse5)) (or (not .cse6) .cse7) (or (not .cse8) .cse9) (or .cse10 (not .cse11)) (or .cse12 (not .cse13)) (or .cse14 (not .cse12)) (or (not .cse15) .cse16) (or (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 43) 4294967296) .cse17) (not .cse9)) (or (not .cse7) .cse11) (or (not .cse18) .cse0) (or .cse19 (not .cse20)) (or .cse21 (not .cse22)) (or (not .cse1) .cse23) (or (not .cse23) .cse24) (or (not .cse25) .cse26) (or .cse22 (not .cse27)) (or .cse8 (not .cse16)) (or (not .cse26) .cse28) (or (not .cse3) .cse29) (or (not .cse30) .cse15) (or .cse30 (not .cse14)) (or .cse31 (not .cse32)) (or (not .cse33) .cse32) (or .cse34 (not .cse35)) (or .cse27 (not .cse24)) (or .cse20 (not .cse36)) (or (not .cse37) .cse38) (or .cse39 (not .cse38)) (or (not .cse39) .cse35) (or .cse36 (not .cse4)) (or (not .cse40) .cse2) (or .cse41 (not .cse42)) (or .cse43 (not .cse31)) (or .cse37 (not .cse28)) (or .cse42 (not .cse10)) (or (not .cse41) .cse13) (or (not .cse43) .cse40) (or (not .cse19) .cse18) (or .cse6 (not .cse29)) .cse25 (or (not .cse21) .cse33) (or .cse5 (not .cse34))))) is different from false [2022-12-14 11:08:51,745 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse9 (mod |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4294967296))) (let ((.cse12 (< (mod (+ 36 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse9)) (.cse7 (< (mod (+ 30 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse9)) (.cse11 (< (mod (+ 31 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse9)) (.cse0 (< (mod (+ 14 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse9)) (.cse1 (< (mod (+ 15 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse9)) (.cse22 (< (mod (+ 16 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse9)) (.cse21 (< (mod (+ 19 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse9)) (.cse8 (< (mod (+ 41 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse9)) (.cse16 (< (mod (+ 40 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse9)) (.cse25 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 1) 4294967296) .cse9)) (.cse3 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 27) 4294967296) .cse9)) (.cse15 (< (mod (+ 39 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse9)) (.cse29 (< (mod (+ 38 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse9)) (.cse14 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 37) 4294967296) .cse9)) (.cse31 (< (mod (+ 22 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse9)) (.cse26 (< (mod (+ 18 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse9)) (.cse23 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 17) 4294967296) .cse9)) (.cse19 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 11) 4294967296) .cse9)) (.cse37 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4) 4294967296) .cse9)) (.cse38 (< (mod (+ 5 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse9)) (.cse34 (< (mod (+ 6 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse9)) (.cse35 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 10) 4294967296) .cse9)) (.cse4 (< (mod (+ 9 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse9)) (.cse2 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 26) 4294967296) .cse9)) (.cse30 (< (mod (+ 23 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse9)) (.cse36 (< (mod (+ 3 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse9)) (.cse27 (< (mod (+ 2 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse9)) (.cse41 (< (mod (+ 33 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse9)) (.cse10 (< (mod (+ 32 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse9)) (.cse40 (< (mod (+ 34 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse9)) (.cse13 (< (mod (+ 35 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse9)) (.cse42 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 24) 4294967296) .cse9)) (.cse39 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 25) 4294967296) .cse9)) (.cse18 (< (mod (+ 12 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse9)) (.cse17 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 13) 4294967296) .cse9)) (.cse6 (< (mod (+ 29 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse9)) (.cse28 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 28) 4294967296) .cse9)) (.cse24 (< (mod |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4294967296) .cse9)) (.cse20 (< (mod (+ 20 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse9)) (.cse32 (< (mod (+ 21 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse9)) (.cse5 (< (mod (+ 8 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse9)) (.cse33 (< (mod (+ 7 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse9))) (and (or (not .cse0) .cse1) (or (not .cse2) .cse3) (or .cse4 (not .cse5)) (or (not .cse6) .cse7) (or (not .cse8) (< (mod (+ 42 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse9)) (or .cse10 (not .cse11)) (or .cse12 (not .cse13)) (or .cse14 (not .cse12)) (or (not .cse15) .cse16) (or (not .cse7) .cse11) (or (not .cse17) .cse0) (or .cse18 (not .cse19)) (or .cse20 (not .cse21)) (or (not .cse1) .cse22) (or (not .cse22) .cse23) (or (not .cse24) .cse25) (or .cse21 (not .cse26)) (or .cse8 (not .cse16)) (or (not .cse25) .cse27) (or (not .cse3) .cse28) (or (not .cse29) .cse15) (or .cse29 (not .cse14)) (or .cse30 (not .cse31)) (or (not .cse32) .cse31) (or .cse33 (not .cse34)) (or .cse26 (not .cse23)) (or .cse19 (not .cse35)) (or (not .cse36) .cse37) (or .cse38 (not .cse37)) (or (not .cse38) .cse34) (or .cse35 (not .cse4)) (or (not .cse39) .cse2) (or .cse40 (not .cse41)) (or .cse42 (not .cse30)) (or .cse36 (not .cse27)) (or .cse41 (not .cse10)) (or (not .cse40) .cse13) (or (not .cse42) .cse39) (or (not .cse18) .cse17) (or .cse6 (not .cse28)) .cse24 (or (not .cse20) .cse32) (or .cse5 (not .cse33))))) is different from false [2022-12-14 11:08:53,758 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse25 (mod |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4294967296))) (let ((.cse10 (< (mod (+ 36 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse7 (< (mod (+ 30 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse9 (< (mod (+ 31 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse0 (< (mod (+ 14 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse1 (< (mod (+ 15 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse20 (< (mod (+ 16 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse19 (< (mod (+ 19 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse14 (< (mod (+ 40 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse23 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 1) 4294967296) .cse25)) (.cse3 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 27) 4294967296) .cse25)) (.cse13 (< (mod (+ 39 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse28 (< (mod (+ 38 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse12 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 37) 4294967296) .cse25)) (.cse30 (< (mod (+ 22 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse24 (< (mod (+ 18 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse21 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 17) 4294967296) .cse25)) (.cse17 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 11) 4294967296) .cse25)) (.cse36 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4) 4294967296) .cse25)) (.cse37 (< (mod (+ 5 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse33 (< (mod (+ 6 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse34 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 10) 4294967296) .cse25)) (.cse4 (< (mod (+ 9 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse2 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 26) 4294967296) .cse25)) (.cse29 (< (mod (+ 23 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse35 (< (mod (+ 3 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse26 (< (mod (+ 2 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse40 (< (mod (+ 33 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse8 (< (mod (+ 32 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse39 (< (mod (+ 34 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse11 (< (mod (+ 35 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse41 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 24) 4294967296) .cse25)) (.cse38 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 25) 4294967296) .cse25)) (.cse16 (< (mod (+ 12 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse15 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 13) 4294967296) .cse25)) (.cse6 (< (mod (+ 29 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse27 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 28) 4294967296) .cse25)) (.cse22 (< (mod |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4294967296) .cse25)) (.cse18 (< (mod (+ 20 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse31 (< (mod (+ 21 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse5 (< (mod (+ 8 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse32 (< (mod (+ 7 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25))) (and (or (not .cse0) .cse1) (or (not .cse2) .cse3) (or .cse4 (not .cse5)) (or (not .cse6) .cse7) (or .cse8 (not .cse9)) (or .cse10 (not .cse11)) (or .cse12 (not .cse10)) (or (not .cse13) .cse14) (or (not .cse7) .cse9) (or (not .cse15) .cse0) (or .cse16 (not .cse17)) (or .cse18 (not .cse19)) (or (not .cse1) .cse20) (or (not .cse20) .cse21) (or (not .cse22) .cse23) (or .cse19 (not .cse24)) (or (< (mod (+ 41 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25) (not .cse14)) (or (not .cse23) .cse26) (or (not .cse3) .cse27) (or (not .cse28) .cse13) (or .cse28 (not .cse12)) (or .cse29 (not .cse30)) (or (not .cse31) .cse30) (or .cse32 (not .cse33)) (or .cse24 (not .cse21)) (or .cse17 (not .cse34)) (or (not .cse35) .cse36) (or .cse37 (not .cse36)) (or (not .cse37) .cse33) (or .cse34 (not .cse4)) (or (not .cse38) .cse2) (or .cse39 (not .cse40)) (or .cse41 (not .cse29)) (or .cse35 (not .cse26)) (or .cse40 (not .cse8)) (or (not .cse39) .cse11) (or (not .cse41) .cse38) (or (not .cse16) .cse15) (or .cse6 (not .cse27)) .cse22 (or (not .cse18) .cse31) (or .cse5 (not .cse32))))) is different from false [2022-12-14 11:08:55,771 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse14 (mod |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4294967296))) (let ((.cse10 (< (mod (+ 36 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse14)) (.cse7 (< (mod (+ 30 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse14)) (.cse9 (< (mod (+ 31 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse14)) (.cse0 (< (mod (+ 14 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse14)) (.cse1 (< (mod (+ 15 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse14)) (.cse20 (< (mod (+ 16 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse14)) (.cse19 (< (mod (+ 19 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse14)) (.cse23 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 1) 4294967296) .cse14)) (.cse3 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 27) 4294967296) .cse14)) (.cse13 (< (mod (+ 39 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse14)) (.cse27 (< (mod (+ 38 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse14)) (.cse12 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 37) 4294967296) .cse14)) (.cse29 (< (mod (+ 22 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse14)) (.cse24 (< (mod (+ 18 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse14)) (.cse21 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 17) 4294967296) .cse14)) (.cse17 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 11) 4294967296) .cse14)) (.cse35 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4) 4294967296) .cse14)) (.cse36 (< (mod (+ 5 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse14)) (.cse32 (< (mod (+ 6 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse14)) (.cse33 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 10) 4294967296) .cse14)) (.cse4 (< (mod (+ 9 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse14)) (.cse2 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 26) 4294967296) .cse14)) (.cse28 (< (mod (+ 23 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse14)) (.cse34 (< (mod (+ 3 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse14)) (.cse25 (< (mod (+ 2 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse14)) (.cse39 (< (mod (+ 33 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse14)) (.cse8 (< (mod (+ 32 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse14)) (.cse38 (< (mod (+ 34 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse14)) (.cse11 (< (mod (+ 35 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse14)) (.cse40 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 24) 4294967296) .cse14)) (.cse37 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 25) 4294967296) .cse14)) (.cse16 (< (mod (+ 12 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse14)) (.cse15 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 13) 4294967296) .cse14)) (.cse6 (< (mod (+ 29 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse14)) (.cse26 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 28) 4294967296) .cse14)) (.cse22 (< (mod |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4294967296) .cse14)) (.cse18 (< (mod (+ 20 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse14)) (.cse30 (< (mod (+ 21 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse14)) (.cse5 (< (mod (+ 8 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse14)) (.cse31 (< (mod (+ 7 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse14))) (and (or (not .cse0) .cse1) (or (not .cse2) .cse3) (or .cse4 (not .cse5)) (or (not .cse6) .cse7) (or .cse8 (not .cse9)) (or .cse10 (not .cse11)) (or .cse12 (not .cse10)) (or (not .cse13) (< (mod (+ 40 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse14)) (or (not .cse7) .cse9) (or (not .cse15) .cse0) (or .cse16 (not .cse17)) (or .cse18 (not .cse19)) (or (not .cse1) .cse20) (or (not .cse20) .cse21) (or (not .cse22) .cse23) (or .cse19 (not .cse24)) (or (not .cse23) .cse25) (or (not .cse3) .cse26) (or (not .cse27) .cse13) (or .cse27 (not .cse12)) (or .cse28 (not .cse29)) (or (not .cse30) .cse29) (or .cse31 (not .cse32)) (or .cse24 (not .cse21)) (or .cse17 (not .cse33)) (or (not .cse34) .cse35) (or .cse36 (not .cse35)) (or (not .cse36) .cse32) (or .cse33 (not .cse4)) (or (not .cse37) .cse2) (or .cse38 (not .cse39)) (or .cse40 (not .cse28)) (or .cse34 (not .cse25)) (or .cse39 (not .cse8)) (or (not .cse38) .cse11) (or (not .cse40) .cse37) (or (not .cse16) .cse15) (or .cse6 (not .cse26)) .cse22 (or (not .cse18) .cse30) (or .cse5 (not .cse31))))) is different from false [2022-12-14 11:08:57,784 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse26 (mod |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4294967296))) (let ((.cse10 (< (mod (+ 36 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse26)) (.cse7 (< (mod (+ 30 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse26)) (.cse9 (< (mod (+ 31 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse26)) (.cse0 (< (mod (+ 14 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse26)) (.cse1 (< (mod (+ 15 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse26)) (.cse18 (< (mod (+ 16 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse26)) (.cse17 (< (mod (+ 19 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse26)) (.cse21 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 1) 4294967296) .cse26)) (.cse3 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 27) 4294967296) .cse26)) (.cse25 (< (mod (+ 38 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse26)) (.cse12 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 37) 4294967296) .cse26)) (.cse28 (< (mod (+ 22 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse26)) (.cse22 (< (mod (+ 18 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse26)) (.cse19 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 17) 4294967296) .cse26)) (.cse15 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 11) 4294967296) .cse26)) (.cse34 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4) 4294967296) .cse26)) (.cse35 (< (mod (+ 5 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse26)) (.cse31 (< (mod (+ 6 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse26)) (.cse32 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 10) 4294967296) .cse26)) (.cse4 (< (mod (+ 9 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse26)) (.cse2 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 26) 4294967296) .cse26)) (.cse27 (< (mod (+ 23 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse26)) (.cse33 (< (mod (+ 3 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse26)) (.cse23 (< (mod (+ 2 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse26)) (.cse38 (< (mod (+ 33 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse26)) (.cse8 (< (mod (+ 32 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse26)) (.cse37 (< (mod (+ 34 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse26)) (.cse11 (< (mod (+ 35 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse26)) (.cse39 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 24) 4294967296) .cse26)) (.cse36 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 25) 4294967296) .cse26)) (.cse14 (< (mod (+ 12 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse26)) (.cse13 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 13) 4294967296) .cse26)) (.cse6 (< (mod (+ 29 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse26)) (.cse24 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 28) 4294967296) .cse26)) (.cse20 (< (mod |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4294967296) .cse26)) (.cse16 (< (mod (+ 20 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse26)) (.cse29 (< (mod (+ 21 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse26)) (.cse5 (< (mod (+ 8 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse26)) (.cse30 (< (mod (+ 7 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse26))) (and (or (not .cse0) .cse1) (or (not .cse2) .cse3) (or .cse4 (not .cse5)) (or (not .cse6) .cse7) (or .cse8 (not .cse9)) (or .cse10 (not .cse11)) (or .cse12 (not .cse10)) (or (not .cse7) .cse9) (or (not .cse13) .cse0) (or .cse14 (not .cse15)) (or .cse16 (not .cse17)) (or (not .cse1) .cse18) (or (not .cse18) .cse19) (or (not .cse20) .cse21) (or .cse17 (not .cse22)) (or (not .cse21) .cse23) (or (not .cse3) .cse24) (or (not .cse25) (< (mod (+ 39 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse26)) (or .cse25 (not .cse12)) (or .cse27 (not .cse28)) (or (not .cse29) .cse28) (or .cse30 (not .cse31)) (or .cse22 (not .cse19)) (or .cse15 (not .cse32)) (or (not .cse33) .cse34) (or .cse35 (not .cse34)) (or (not .cse35) .cse31) (or .cse32 (not .cse4)) (or (not .cse36) .cse2) (or .cse37 (not .cse38)) (or .cse39 (not .cse27)) (or .cse33 (not .cse23)) (or .cse38 (not .cse8)) (or (not .cse37) .cse11) (or (not .cse39) .cse36) (or (not .cse14) .cse13) (or .cse6 (not .cse24)) .cse20 (or (not .cse16) .cse29) (or .cse5 (not .cse30))))) is different from false [2022-12-14 11:08:59,796 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse25 (mod |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4294967296))) (let ((.cse10 (< (mod (+ 36 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse7 (< (mod (+ 30 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse9 (< (mod (+ 31 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse0 (< (mod (+ 14 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse1 (< (mod (+ 15 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse18 (< (mod (+ 16 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse17 (< (mod (+ 19 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse21 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 1) 4294967296) .cse25)) (.cse3 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 27) 4294967296) .cse25)) (.cse12 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 37) 4294967296) .cse25)) (.cse27 (< (mod (+ 22 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse22 (< (mod (+ 18 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse19 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 17) 4294967296) .cse25)) (.cse15 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 11) 4294967296) .cse25)) (.cse33 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4) 4294967296) .cse25)) (.cse34 (< (mod (+ 5 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse30 (< (mod (+ 6 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse31 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 10) 4294967296) .cse25)) (.cse4 (< (mod (+ 9 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse2 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 26) 4294967296) .cse25)) (.cse26 (< (mod (+ 23 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse32 (< (mod (+ 3 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse23 (< (mod (+ 2 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse37 (< (mod (+ 33 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse8 (< (mod (+ 32 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse36 (< (mod (+ 34 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse11 (< (mod (+ 35 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse38 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 24) 4294967296) .cse25)) (.cse35 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 25) 4294967296) .cse25)) (.cse14 (< (mod (+ 12 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse13 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 13) 4294967296) .cse25)) (.cse6 (< (mod (+ 29 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse24 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 28) 4294967296) .cse25)) (.cse20 (< (mod |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4294967296) .cse25)) (.cse16 (< (mod (+ 20 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse28 (< (mod (+ 21 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse5 (< (mod (+ 8 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25)) (.cse29 (< (mod (+ 7 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25))) (and (or (not .cse0) .cse1) (or (not .cse2) .cse3) (or .cse4 (not .cse5)) (or (not .cse6) .cse7) (or .cse8 (not .cse9)) (or .cse10 (not .cse11)) (or .cse12 (not .cse10)) (or (not .cse7) .cse9) (or (not .cse13) .cse0) (or .cse14 (not .cse15)) (or .cse16 (not .cse17)) (or (not .cse1) .cse18) (or (not .cse18) .cse19) (or (not .cse20) .cse21) (or .cse17 (not .cse22)) (or (not .cse21) .cse23) (or (not .cse3) .cse24) (or (< (mod (+ 38 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse25) (not .cse12)) (or .cse26 (not .cse27)) (or (not .cse28) .cse27) (or .cse29 (not .cse30)) (or .cse22 (not .cse19)) (or .cse15 (not .cse31)) (or (not .cse32) .cse33) (or .cse34 (not .cse33)) (or (not .cse34) .cse30) (or .cse31 (not .cse4)) (or (not .cse35) .cse2) (or .cse36 (not .cse37)) (or .cse38 (not .cse26)) (or .cse32 (not .cse23)) (or .cse37 (not .cse8)) (or (not .cse36) .cse11) (or (not .cse38) .cse35) (or (not .cse14) .cse13) (or .cse6 (not .cse24)) .cse20 (or (not .cse16) .cse28) (or .cse5 (not .cse29))))) is different from false [2022-12-14 11:09:01,809 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse12 (mod |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4294967296))) (let ((.cse10 (< (mod (+ 36 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse12)) (.cse7 (< (mod (+ 30 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse12)) (.cse9 (< (mod (+ 31 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse12)) (.cse0 (< (mod (+ 14 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse12)) (.cse1 (< (mod (+ 15 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse12)) (.cse18 (< (mod (+ 16 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse12)) (.cse17 (< (mod (+ 19 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse12)) (.cse21 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 1) 4294967296) .cse12)) (.cse3 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 27) 4294967296) .cse12)) (.cse26 (< (mod (+ 22 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse12)) (.cse22 (< (mod (+ 18 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse12)) (.cse19 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 17) 4294967296) .cse12)) (.cse15 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 11) 4294967296) .cse12)) (.cse32 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4) 4294967296) .cse12)) (.cse33 (< (mod (+ 5 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse12)) (.cse29 (< (mod (+ 6 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse12)) (.cse30 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 10) 4294967296) .cse12)) (.cse4 (< (mod (+ 9 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse12)) (.cse2 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 26) 4294967296) .cse12)) (.cse25 (< (mod (+ 23 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse12)) (.cse31 (< (mod (+ 3 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse12)) (.cse23 (< (mod (+ 2 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse12)) (.cse36 (< (mod (+ 33 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse12)) (.cse8 (< (mod (+ 32 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse12)) (.cse35 (< (mod (+ 34 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse12)) (.cse11 (< (mod (+ 35 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse12)) (.cse37 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 24) 4294967296) .cse12)) (.cse34 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 25) 4294967296) .cse12)) (.cse14 (< (mod (+ 12 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse12)) (.cse13 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 13) 4294967296) .cse12)) (.cse6 (< (mod (+ 29 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse12)) (.cse24 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 28) 4294967296) .cse12)) (.cse20 (< (mod |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4294967296) .cse12)) (.cse16 (< (mod (+ 20 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse12)) (.cse27 (< (mod (+ 21 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse12)) (.cse5 (< (mod (+ 8 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse12)) (.cse28 (< (mod (+ 7 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse12))) (and (or (not .cse0) .cse1) (or (not .cse2) .cse3) (or .cse4 (not .cse5)) (or (not .cse6) .cse7) (or .cse8 (not .cse9)) (or .cse10 (not .cse11)) (or (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 37) 4294967296) .cse12) (not .cse10)) (or (not .cse7) .cse9) (or (not .cse13) .cse0) (or .cse14 (not .cse15)) (or .cse16 (not .cse17)) (or (not .cse1) .cse18) (or (not .cse18) .cse19) (or (not .cse20) .cse21) (or .cse17 (not .cse22)) (or (not .cse21) .cse23) (or (not .cse3) .cse24) (or .cse25 (not .cse26)) (or (not .cse27) .cse26) (or .cse28 (not .cse29)) (or .cse22 (not .cse19)) (or .cse15 (not .cse30)) (or (not .cse31) .cse32) (or .cse33 (not .cse32)) (or (not .cse33) .cse29) (or .cse30 (not .cse4)) (or (not .cse34) .cse2) (or .cse35 (not .cse36)) (or .cse37 (not .cse25)) (or .cse31 (not .cse23)) (or .cse36 (not .cse8)) (or (not .cse35) .cse11) (or (not .cse37) .cse34) (or (not .cse14) .cse13) (or .cse6 (not .cse24)) .cse20 (or (not .cse16) .cse27) (or .cse5 (not .cse28))))) is different from false [2022-12-14 11:09:03,823 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse10 (mod |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4294967296))) (let ((.cse7 (< (mod (+ 30 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse10)) (.cse9 (< (mod (+ 31 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse10)) (.cse0 (< (mod (+ 14 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse10)) (.cse1 (< (mod (+ 15 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse10)) (.cse17 (< (mod (+ 16 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse10)) (.cse16 (< (mod (+ 19 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse10)) (.cse20 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 1) 4294967296) .cse10)) (.cse3 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 27) 4294967296) .cse10)) (.cse25 (< (mod (+ 22 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse10)) (.cse21 (< (mod (+ 18 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse10)) (.cse18 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 17) 4294967296) .cse10)) (.cse14 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 11) 4294967296) .cse10)) (.cse31 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4) 4294967296) .cse10)) (.cse32 (< (mod (+ 5 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse10)) (.cse28 (< (mod (+ 6 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse10)) (.cse29 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 10) 4294967296) .cse10)) (.cse4 (< (mod (+ 9 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse10)) (.cse2 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 26) 4294967296) .cse10)) (.cse24 (< (mod (+ 23 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse10)) (.cse30 (< (mod (+ 3 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse10)) (.cse22 (< (mod (+ 2 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse10)) (.cse35 (< (mod (+ 33 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse10)) (.cse8 (< (mod (+ 32 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse10)) (.cse34 (< (mod (+ 34 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse10)) (.cse11 (< (mod (+ 35 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse10)) (.cse36 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 24) 4294967296) .cse10)) (.cse33 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 25) 4294967296) .cse10)) (.cse13 (< (mod (+ 12 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse10)) (.cse12 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 13) 4294967296) .cse10)) (.cse6 (< (mod (+ 29 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse10)) (.cse23 (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 28) 4294967296) .cse10)) (.cse19 (< (mod |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4294967296) .cse10)) (.cse15 (< (mod (+ 20 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse10)) (.cse26 (< (mod (+ 21 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse10)) (.cse5 (< (mod (+ 8 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse10)) (.cse27 (< (mod (+ 7 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse10))) (and (or (not .cse0) .cse1) (or (not .cse2) .cse3) (or .cse4 (not .cse5)) (or (not .cse6) .cse7) (or .cse8 (not .cse9)) (or (< (mod (+ 36 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse10) (not .cse11)) (or (not .cse7) .cse9) (or (not .cse12) .cse0) (or .cse13 (not .cse14)) (or .cse15 (not .cse16)) (or (not .cse1) .cse17) (or (not .cse17) .cse18) (or (not .cse19) .cse20) (or .cse16 (not .cse21)) (or (not .cse20) .cse22) (or (not .cse3) .cse23) (or .cse24 (not .cse25)) (or (not .cse26) .cse25) (or .cse27 (not .cse28)) (or .cse21 (not .cse18)) (or .cse14 (not .cse29)) (or (not .cse30) .cse31) (or .cse32 (not .cse31)) (or (not .cse32) .cse28) (or .cse29 (not .cse4)) (or (not .cse33) .cse2) (or .cse34 (not .cse35)) (or .cse36 (not .cse24)) (or .cse30 (not .cse22)) (or .cse35 (not .cse8)) (or (not .cse34) .cse11) (or (not .cse36) .cse33) (or (not .cse13) .cse12) (or .cse6 (not .cse23)) .cse19 (or (not .cse15) .cse26) (or .cse5 (not .cse27))))) is different from false