./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/nla-digbench-scaling/mannadiv_unwindbound100.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 2329fc70 Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/config/TaipanReach.xml -i ../../sv-benchmarks/c/nla-digbench-scaling/mannadiv_unwindbound100.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 0bd5c2784fe43830be309c722c3fa9fc4d3ef116c17a8343acb2a2dfbcf830c0 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-2329fc7 [2022-12-14 10:17:15,865 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-12-14 10:17:15,867 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-12-14 10:17:15,885 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-12-14 10:17:15,886 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-12-14 10:17:15,887 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-12-14 10:17:15,888 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-12-14 10:17:15,890 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-12-14 10:17:15,891 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-12-14 10:17:15,892 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-12-14 10:17:15,893 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-12-14 10:17:15,894 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-12-14 10:17:15,894 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-12-14 10:17:15,895 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-12-14 10:17:15,897 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-12-14 10:17:15,898 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-12-14 10:17:15,898 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-12-14 10:17:15,899 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-12-14 10:17:15,901 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-12-14 10:17:15,903 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-12-14 10:17:15,904 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-12-14 10:17:15,906 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-12-14 10:17:15,907 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-12-14 10:17:15,908 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-12-14 10:17:15,911 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-12-14 10:17:15,912 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-12-14 10:17:15,912 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-12-14 10:17:15,913 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-12-14 10:17:15,913 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-12-14 10:17:15,914 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-12-14 10:17:15,914 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-12-14 10:17:15,915 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-12-14 10:17:15,916 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-12-14 10:17:15,917 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-12-14 10:17:15,918 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-12-14 10:17:15,918 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-12-14 10:17:15,919 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-12-14 10:17:15,919 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-12-14 10:17:15,919 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-12-14 10:17:15,920 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-12-14 10:17:15,921 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-12-14 10:17:15,921 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/config/svcomp-Reach-32bit-Taipan_Default.epf [2022-12-14 10:17:15,943 INFO L113 SettingsManager]: Loading preferences was successful [2022-12-14 10:17:15,943 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-12-14 10:17:15,944 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-12-14 10:17:15,944 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-12-14 10:17:15,945 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-12-14 10:17:15,945 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-12-14 10:17:15,945 INFO L138 SettingsManager]: * User list type=DISABLED [2022-12-14 10:17:15,945 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-12-14 10:17:15,945 INFO L138 SettingsManager]: * Explicit value domain=true [2022-12-14 10:17:15,946 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2022-12-14 10:17:15,946 INFO L138 SettingsManager]: * Octagon Domain=false [2022-12-14 10:17:15,946 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-12-14 10:17:15,946 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2022-12-14 10:17:15,946 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2022-12-14 10:17:15,947 INFO L138 SettingsManager]: * Interval Domain=false [2022-12-14 10:17:15,947 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2022-12-14 10:17:15,947 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2022-12-14 10:17:15,947 INFO L138 SettingsManager]: * Simplification Technique=POLY_PAC [2022-12-14 10:17:15,948 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-12-14 10:17:15,948 INFO L138 SettingsManager]: * sizeof long=4 [2022-12-14 10:17:15,948 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-12-14 10:17:15,948 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-12-14 10:17:15,949 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-12-14 10:17:15,949 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-12-14 10:17:15,949 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-12-14 10:17:15,949 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-12-14 10:17:15,949 INFO L138 SettingsManager]: * sizeof long double=12 [2022-12-14 10:17:15,950 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-12-14 10:17:15,950 INFO L138 SettingsManager]: * Use constant arrays=true [2022-12-14 10:17:15,950 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-12-14 10:17:15,950 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-12-14 10:17:15,950 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-12-14 10:17:15,950 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-12-14 10:17:15,951 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-12-14 10:17:15,951 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2022-12-14 10:17:15,951 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-12-14 10:17:15,951 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-12-14 10:17:15,951 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2022-12-14 10:17:15,952 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-12-14 10:17:15,952 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-12-14 10:17:15,952 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-12-14 10:17:15,952 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 0bd5c2784fe43830be309c722c3fa9fc4d3ef116c17a8343acb2a2dfbcf830c0 [2022-12-14 10:17:16,156 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-12-14 10:17:16,175 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-12-14 10:17:16,177 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-12-14 10:17:16,178 INFO L271 PluginConnector]: Initializing CDTParser... [2022-12-14 10:17:16,179 INFO L275 PluginConnector]: CDTParser initialized [2022-12-14 10:17:16,180 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/../../sv-benchmarks/c/nla-digbench-scaling/mannadiv_unwindbound100.c [2022-12-14 10:17:18,824 INFO L500 CDTParser]: Created temporary CDT project at NULL [2022-12-14 10:17:18,974 INFO L351 CDTParser]: Found 1 translation units. [2022-12-14 10:17:18,974 INFO L172 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/sv-benchmarks/c/nla-digbench-scaling/mannadiv_unwindbound100.c [2022-12-14 10:17:18,979 INFO L394 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/data/09e41e32a/ca739f77a1974fb0a8b900ea4cfbbb9b/FLAGa56c3c8bd [2022-12-14 10:17:18,990 INFO L402 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/data/09e41e32a/ca739f77a1974fb0a8b900ea4cfbbb9b [2022-12-14 10:17:18,992 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-12-14 10:17:18,993 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-12-14 10:17:18,994 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-12-14 10:17:18,994 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-12-14 10:17:18,997 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-12-14 10:17:18,997 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.12 10:17:18" (1/1) ... [2022-12-14 10:17:18,998 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@47d2dade and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 10:17:18, skipping insertion in model container [2022-12-14 10:17:18,998 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.12 10:17:18" (1/1) ... [2022-12-14 10:17:19,004 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-12-14 10:17:19,014 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-12-14 10:17:19,114 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/sv-benchmarks/c/nla-digbench-scaling/mannadiv_unwindbound100.c[573,586] [2022-12-14 10:17:19,125 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-12-14 10:17:19,132 INFO L203 MainTranslator]: Completed pre-run [2022-12-14 10:17:19,141 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/sv-benchmarks/c/nla-digbench-scaling/mannadiv_unwindbound100.c[573,586] [2022-12-14 10:17:19,144 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-12-14 10:17:19,154 INFO L208 MainTranslator]: Completed translation [2022-12-14 10:17:19,154 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 10:17:19 WrapperNode [2022-12-14 10:17:19,154 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-12-14 10:17:19,155 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-12-14 10:17:19,155 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-12-14 10:17:19,155 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-12-14 10:17:19,160 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 10:17:19" (1/1) ... [2022-12-14 10:17:19,165 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 10:17:19" (1/1) ... [2022-12-14 10:17:19,177 INFO L138 Inliner]: procedures = 14, calls = 11, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 47 [2022-12-14 10:17:19,177 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-12-14 10:17:19,178 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-12-14 10:17:19,178 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-12-14 10:17:19,178 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-12-14 10:17:19,185 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 10:17:19" (1/1) ... [2022-12-14 10:17:19,185 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 10:17:19" (1/1) ... [2022-12-14 10:17:19,186 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 10:17:19" (1/1) ... [2022-12-14 10:17:19,186 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 10:17:19" (1/1) ... [2022-12-14 10:17:19,188 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 10:17:19" (1/1) ... [2022-12-14 10:17:19,190 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 10:17:19" (1/1) ... [2022-12-14 10:17:19,191 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 10:17:19" (1/1) ... [2022-12-14 10:17:19,191 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 10:17:19" (1/1) ... [2022-12-14 10:17:19,192 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-12-14 10:17:19,193 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-12-14 10:17:19,193 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-12-14 10:17:19,193 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-12-14 10:17:19,194 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 10:17:19" (1/1) ... [2022-12-14 10:17:19,199 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-12-14 10:17:19,206 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 [2022-12-14 10:17:19,215 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-12-14 10:17:19,217 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-12-14 10:17:19,249 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-12-14 10:17:19,250 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2022-12-14 10:17:19,250 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2022-12-14 10:17:19,250 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-12-14 10:17:19,250 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-12-14 10:17:19,250 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-12-14 10:17:19,250 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-12-14 10:17:19,250 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-12-14 10:17:19,299 INFO L235 CfgBuilder]: Building ICFG [2022-12-14 10:17:19,301 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-12-14 10:17:19,389 INFO L276 CfgBuilder]: Performing block encoding [2022-12-14 10:17:19,413 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-12-14 10:17:19,413 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-12-14 10:17:19,415 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.12 10:17:19 BoogieIcfgContainer [2022-12-14 10:17:19,415 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-12-14 10:17:19,417 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-12-14 10:17:19,417 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-12-14 10:17:19,420 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-12-14 10:17:19,420 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 14.12 10:17:18" (1/3) ... [2022-12-14 10:17:19,421 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6cedf564 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.12 10:17:19, skipping insertion in model container [2022-12-14 10:17:19,421 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.12 10:17:19" (2/3) ... [2022-12-14 10:17:19,421 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6cedf564 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.12 10:17:19, skipping insertion in model container [2022-12-14 10:17:19,421 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.12 10:17:19" (3/3) ... [2022-12-14 10:17:19,422 INFO L112 eAbstractionObserver]: Analyzing ICFG mannadiv_unwindbound100.c [2022-12-14 10:17:19,437 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-12-14 10:17:19,437 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-12-14 10:17:19,480 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-12-14 10:17:19,485 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@e9bf115, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-12-14 10:17:19,485 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-12-14 10:17:19,489 INFO L276 IsEmpty]: Start isEmpty. Operand has 19 states, 11 states have (on average 1.4545454545454546) internal successors, (16), 12 states have internal predecessors, (16), 4 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-12-14 10:17:19,494 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2022-12-14 10:17:19,494 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 10:17:19,495 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 10:17:19,495 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-12-14 10:17:19,499 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 10:17:19,499 INFO L85 PathProgramCache]: Analyzing trace with hash -1046920148, now seen corresponding path program 1 times [2022-12-14 10:17:19,506 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 10:17:19,507 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [910092086] [2022-12-14 10:17:19,507 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 10:17:19,507 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 10:17:19,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 10:17:19,598 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 10:17:19,598 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [910092086] [2022-12-14 10:17:19,598 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unsupported non-linear arithmetic [2022-12-14 10:17:19,599 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1906406042] [2022-12-14 10:17:19,599 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 10:17:19,599 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 10:17:19,599 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 [2022-12-14 10:17:19,600 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-14 10:17:19,601 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-12-14 10:17:19,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 10:17:19,652 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 1 conjunts are in the unsatisfiable core [2022-12-14 10:17:19,655 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-14 10:17:19,672 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-12-14 10:17:19,673 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-12-14 10:17:19,673 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1906406042] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-14 10:17:19,673 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-14 10:17:19,673 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-12-14 10:17:19,675 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1391703119] [2022-12-14 10:17:19,676 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-14 10:17:19,679 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2022-12-14 10:17:19,679 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 10:17:19,701 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2022-12-14 10:17:19,701 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2022-12-14 10:17:19,703 INFO L87 Difference]: Start difference. First operand has 19 states, 11 states have (on average 1.4545454545454546) internal successors, (16), 12 states have internal predecessors, (16), 4 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) Second operand has 2 states, 2 states have (on average 3.5) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-12-14 10:17:19,726 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 10:17:19,726 INFO L93 Difference]: Finished difference Result 32 states and 43 transitions. [2022-12-14 10:17:19,728 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-12-14 10:17:19,729 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 3.5) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 13 [2022-12-14 10:17:19,729 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 10:17:19,736 INFO L225 Difference]: With dead ends: 32 [2022-12-14 10:17:19,736 INFO L226 Difference]: Without dead ends: 17 [2022-12-14 10:17:19,739 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2022-12-14 10:17:19,743 INFO L413 NwaCegarLoop]: 18 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 4 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 18 SdHoareTripleChecker+Invalid, 4 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 4 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-12-14 10:17:19,744 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 18 Invalid, 4 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 4 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-12-14 10:17:19,761 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states. [2022-12-14 10:17:19,777 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 17. [2022-12-14 10:17:19,778 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 10 states have (on average 1.3) internal successors, (13), 11 states have internal predecessors, (13), 4 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-12-14 10:17:19,779 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 20 transitions. [2022-12-14 10:17:19,780 INFO L78 Accepts]: Start accepts. Automaton has 17 states and 20 transitions. Word has length 13 [2022-12-14 10:17:19,781 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 10:17:19,781 INFO L495 AbstractCegarLoop]: Abstraction has 17 states and 20 transitions. [2022-12-14 10:17:19,782 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 3.5) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-12-14 10:17:19,782 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 20 transitions. [2022-12-14 10:17:19,783 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-12-14 10:17:19,783 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 10:17:19,783 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 10:17:19,789 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2022-12-14 10:17:19,984 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 10:17:19,985 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-12-14 10:17:19,985 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 10:17:19,986 INFO L85 PathProgramCache]: Analyzing trace with hash 1317434454, now seen corresponding path program 1 times [2022-12-14 10:17:19,986 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 10:17:19,986 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1003792906] [2022-12-14 10:17:19,986 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 10:17:19,987 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 10:17:20,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 10:17:20,036 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 10:17:20,036 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1003792906] [2022-12-14 10:17:20,036 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unsupported non-linear arithmetic [2022-12-14 10:17:20,036 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1756355341] [2022-12-14 10:17:20,037 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 10:17:20,037 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 10:17:20,037 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 [2022-12-14 10:17:20,038 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-14 10:17:20,039 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-12-14 10:17:20,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 10:17:20,085 INFO L263 TraceCheckSpWp]: Trace formula consists of 67 conjuncts, 3 conjunts are in the unsatisfiable core [2022-12-14 10:17:20,086 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-14 10:17:20,136 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-12-14 10:17:20,136 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-12-14 10:17:20,136 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1756355341] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-14 10:17:20,136 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-14 10:17:20,136 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-12-14 10:17:20,137 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [383079905] [2022-12-14 10:17:20,137 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-14 10:17:20,138 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-12-14 10:17:20,138 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 10:17:20,138 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-12-14 10:17:20,139 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-12-14 10:17:20,139 INFO L87 Difference]: Start difference. First operand 17 states and 20 transitions. Second operand has 4 states, 4 states have (on average 2.0) internal successors, (8), 3 states have internal predecessors, (8), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-12-14 10:17:20,156 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 10:17:20,156 INFO L93 Difference]: Finished difference Result 26 states and 29 transitions. [2022-12-14 10:17:20,156 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-12-14 10:17:20,157 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.0) internal successors, (8), 3 states have internal predecessors, (8), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 14 [2022-12-14 10:17:20,157 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 10:17:20,157 INFO L225 Difference]: With dead ends: 26 [2022-12-14 10:17:20,157 INFO L226 Difference]: Without dead ends: 19 [2022-12-14 10:17:20,157 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-12-14 10:17:20,158 INFO L413 NwaCegarLoop]: 15 mSDtfsCounter, 0 mSDsluCounter, 24 mSDsCounter, 0 mSdLazyCounter, 14 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 39 SdHoareTripleChecker+Invalid, 14 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 14 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-12-14 10:17:20,159 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 39 Invalid, 14 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 14 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-12-14 10:17:20,159 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2022-12-14 10:17:20,163 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2022-12-14 10:17:20,163 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 12 states have (on average 1.25) internal successors, (15), 13 states have internal predecessors, (15), 4 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-12-14 10:17:20,164 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 22 transitions. [2022-12-14 10:17:20,164 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 22 transitions. Word has length 14 [2022-12-14 10:17:20,165 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 10:17:20,165 INFO L495 AbstractCegarLoop]: Abstraction has 19 states and 22 transitions. [2022-12-14 10:17:20,165 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.0) internal successors, (8), 3 states have internal predecessors, (8), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-12-14 10:17:20,165 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 22 transitions. [2022-12-14 10:17:20,165 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-12-14 10:17:20,165 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 10:17:20,165 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 10:17:20,170 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2022-12-14 10:17:20,366 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable1 [2022-12-14 10:17:20,366 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-12-14 10:17:20,367 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 10:17:20,367 INFO L85 PathProgramCache]: Analyzing trace with hash 1319221914, now seen corresponding path program 1 times [2022-12-14 10:17:20,367 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 10:17:20,367 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [136619542] [2022-12-14 10:17:20,367 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 10:17:20,368 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 10:17:20,378 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-12-14 10:17:20,378 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1859485339] [2022-12-14 10:17:20,378 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 10:17:20,378 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 10:17:20,378 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 [2022-12-14 10:17:20,379 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-14 10:17:20,380 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-12-14 10:17:20,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 10:17:20,429 INFO L263 TraceCheckSpWp]: Trace formula consists of 67 conjuncts, 17 conjunts are in the unsatisfiable core [2022-12-14 10:17:20,431 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-14 10:17:20,495 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-12-14 10:17:20,496 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-12-14 10:17:20,496 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 10:17:20,496 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [136619542] [2022-12-14 10:17:20,496 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-12-14 10:17:20,496 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1859485339] [2022-12-14 10:17:20,496 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1859485339] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-14 10:17:20,497 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-14 10:17:20,497 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-12-14 10:17:20,497 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1861926561] [2022-12-14 10:17:20,497 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-14 10:17:20,497 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-12-14 10:17:20,497 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 10:17:20,498 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-12-14 10:17:20,498 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2022-12-14 10:17:20,499 INFO L87 Difference]: Start difference. First operand 19 states and 22 transitions. Second operand has 7 states, 6 states have (on average 1.5) internal successors, (9), 5 states have internal predecessors, (9), 2 states have call successors, (3), 2 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-12-14 10:17:20,555 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 10:17:20,556 INFO L93 Difference]: Finished difference Result 28 states and 32 transitions. [2022-12-14 10:17:20,556 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-12-14 10:17:20,556 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 1.5) internal successors, (9), 5 states have internal predecessors, (9), 2 states have call successors, (3), 2 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 14 [2022-12-14 10:17:20,556 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 10:17:20,557 INFO L225 Difference]: With dead ends: 28 [2022-12-14 10:17:20,557 INFO L226 Difference]: Without dead ends: 26 [2022-12-14 10:17:20,557 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2022-12-14 10:17:20,558 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 13 mSDsluCounter, 35 mSDsCounter, 0 mSdLazyCounter, 55 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 15 SdHoareTripleChecker+Valid, 47 SdHoareTripleChecker+Invalid, 56 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 55 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-12-14 10:17:20,559 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [15 Valid, 47 Invalid, 56 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 55 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-12-14 10:17:20,560 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2022-12-14 10:17:20,565 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 24. [2022-12-14 10:17:20,566 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 15 states have (on average 1.2) internal successors, (18), 17 states have internal predecessors, (18), 5 states have call successors, (5), 3 states have call predecessors, (5), 3 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-12-14 10:17:20,566 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 27 transitions. [2022-12-14 10:17:20,567 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 27 transitions. Word has length 14 [2022-12-14 10:17:20,567 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 10:17:20,567 INFO L495 AbstractCegarLoop]: Abstraction has 24 states and 27 transitions. [2022-12-14 10:17:20,568 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 6 states have (on average 1.5) internal successors, (9), 5 states have internal predecessors, (9), 2 states have call successors, (3), 2 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-12-14 10:17:20,568 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 27 transitions. [2022-12-14 10:17:20,568 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2022-12-14 10:17:20,568 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 10:17:20,569 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 10:17:20,574 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2022-12-14 10:17:20,769 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 10:17:20,770 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-12-14 10:17:20,771 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 10:17:20,771 INFO L85 PathProgramCache]: Analyzing trace with hash -1562521278, now seen corresponding path program 1 times [2022-12-14 10:17:20,772 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 10:17:20,772 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1344521810] [2022-12-14 10:17:20,772 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 10:17:20,773 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 10:17:20,809 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-12-14 10:17:20,810 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [647034669] [2022-12-14 10:17:20,810 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 10:17:20,811 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 10:17:20,811 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 [2022-12-14 10:17:20,813 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-14 10:17:20,814 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-12-14 10:17:20,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 10:17:20,852 INFO L263 TraceCheckSpWp]: Trace formula consists of 78 conjuncts, 19 conjunts are in the unsatisfiable core [2022-12-14 10:17:20,854 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-14 10:17:20,976 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-12-14 10:17:20,976 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-14 10:17:21,097 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-12-14 10:17:21,097 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 10:17:21,097 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1344521810] [2022-12-14 10:17:21,097 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-12-14 10:17:21,097 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [647034669] [2022-12-14 10:17:21,098 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [647034669] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-14 10:17:21,098 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [24537444] [2022-12-14 10:17:21,112 INFO L159 IcfgInterpreter]: Started Sifa with 17 locations of interest [2022-12-14 10:17:21,112 INFO L166 IcfgInterpreter]: Building call graph [2022-12-14 10:17:21,115 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2022-12-14 10:17:21,119 INFO L176 IcfgInterpreter]: Starting interpretation [2022-12-14 10:17:21,119 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2022-12-14 10:17:21,374 INFO L197 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 40 for LOIs [2022-12-14 10:17:21,383 INFO L197 IcfgInterpreter]: Interpreting procedure assume_abort_if_not with input of size 70 for LOIs [2022-12-14 10:17:21,411 INFO L180 IcfgInterpreter]: Interpretation finished [2022-12-14 10:17:22,444 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSifa [24537444] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-14 10:17:22,444 INFO L184 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2022-12-14 10:17:22,444 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [11, 7] total 26 [2022-12-14 10:17:22,445 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [120850392] [2022-12-14 10:17:22,445 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-14 10:17:22,445 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2022-12-14 10:17:22,446 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 10:17:22,446 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-12-14 10:17:22,447 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=102, Invalid=548, Unknown=0, NotChecked=0, Total=650 [2022-12-14 10:17:22,447 INFO L87 Difference]: Start difference. First operand 24 states and 27 transitions. Second operand has 13 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 8 states have internal predecessors, (11), 4 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-12-14 10:17:22,560 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 10:17:22,560 INFO L93 Difference]: Finished difference Result 32 states and 35 transitions. [2022-12-14 10:17:22,560 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-12-14 10:17:22,561 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 8 states have internal predecessors, (11), 4 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 20 [2022-12-14 10:17:22,561 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 10:17:22,561 INFO L225 Difference]: With dead ends: 32 [2022-12-14 10:17:22,561 INFO L226 Difference]: Without dead ends: 25 [2022-12-14 10:17:22,562 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 31 SyntacticMatches, 3 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 186 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=102, Invalid=548, Unknown=0, NotChecked=0, Total=650 [2022-12-14 10:17:22,563 INFO L413 NwaCegarLoop]: 9 mSDtfsCounter, 0 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 92 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 36 SdHoareTripleChecker+Invalid, 92 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 92 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-12-14 10:17:22,563 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 36 Invalid, 92 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 92 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-12-14 10:17:22,564 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2022-12-14 10:17:22,569 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2022-12-14 10:17:22,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 16 states have (on average 1.1875) internal successors, (19), 17 states have internal predecessors, (19), 5 states have call successors, (5), 3 states have call predecessors, (5), 3 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-12-14 10:17:22,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 28 transitions. [2022-12-14 10:17:22,571 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 28 transitions. Word has length 20 [2022-12-14 10:17:22,571 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 10:17:22,571 INFO L495 AbstractCegarLoop]: Abstraction has 25 states and 28 transitions. [2022-12-14 10:17:22,571 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 8 states have internal predecessors, (11), 4 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-12-14 10:17:22,571 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 28 transitions. [2022-12-14 10:17:22,572 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-12-14 10:17:22,572 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 10:17:22,572 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 10:17:22,577 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2022-12-14 10:17:22,773 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 10:17:22,774 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-12-14 10:17:22,774 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 10:17:22,775 INFO L85 PathProgramCache]: Analyzing trace with hash -182192907, now seen corresponding path program 1 times [2022-12-14 10:17:22,775 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 10:17:22,775 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1036023728] [2022-12-14 10:17:22,775 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 10:17:22,775 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 10:17:22,804 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-12-14 10:17:22,805 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [248403789] [2022-12-14 10:17:22,805 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 10:17:22,805 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 10:17:22,806 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 [2022-12-14 10:17:22,808 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-14 10:17:22,811 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-12-14 10:17:22,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 10:17:22,953 INFO L263 TraceCheckSpWp]: Trace formula consists of 83 conjuncts, 5 conjunts are in the unsatisfiable core [2022-12-14 10:17:22,955 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-14 10:17:23,010 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-12-14 10:17:23,011 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-14 10:17:23,041 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-12-14 10:17:23,042 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 10:17:23,042 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1036023728] [2022-12-14 10:17:23,042 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-12-14 10:17:23,042 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [248403789] [2022-12-14 10:17:23,042 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [248403789] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-14 10:17:23,042 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1586838803] [2022-12-14 10:17:23,044 INFO L159 IcfgInterpreter]: Started Sifa with 17 locations of interest [2022-12-14 10:17:23,045 INFO L166 IcfgInterpreter]: Building call graph [2022-12-14 10:17:23,045 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2022-12-14 10:17:23,045 INFO L176 IcfgInterpreter]: Starting interpretation [2022-12-14 10:17:23,045 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2022-12-14 10:17:23,420 INFO L197 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 68 for LOIs [2022-12-14 10:17:23,529 INFO L197 IcfgInterpreter]: Interpreting procedure assume_abort_if_not with input of size 70 for LOIs [2022-12-14 10:17:23,547 INFO L180 IcfgInterpreter]: Interpretation finished [2022-12-14 10:17:24,236 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '709#(and (<= 0 |#NULL.base|) (<= |#NULL.offset| 0) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond) (<= 1 ~counter~0) (= __VERIFIER_assert_~cond 0) (<= |#NULL.base| 0) (<= 0 |#NULL.offset|) (<= 0 |#StackHeapBarrier|))' at error location [2022-12-14 10:17:24,236 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2022-12-14 10:17:24,236 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-12-14 10:17:24,236 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 5] total 8 [2022-12-14 10:17:24,237 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [781911377] [2022-12-14 10:17:24,237 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-12-14 10:17:24,237 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-12-14 10:17:24,237 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 10:17:24,237 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-12-14 10:17:24,238 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=82, Invalid=380, Unknown=0, NotChecked=0, Total=462 [2022-12-14 10:17:24,238 INFO L87 Difference]: Start difference. First operand 25 states and 28 transitions. Second operand has 8 states, 8 states have (on average 3.125) internal successors, (25), 8 states have internal predecessors, (25), 5 states have call successors, (7), 4 states have call predecessors, (7), 3 states have return successors, (6), 4 states have call predecessors, (6), 4 states have call successors, (6) [2022-12-14 10:17:24,285 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 10:17:24,286 INFO L93 Difference]: Finished difference Result 56 states and 63 transitions. [2022-12-14 10:17:24,286 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-12-14 10:17:24,286 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 3.125) internal successors, (25), 8 states have internal predecessors, (25), 5 states have call successors, (7), 4 states have call predecessors, (7), 3 states have return successors, (6), 4 states have call predecessors, (6), 4 states have call successors, (6) Word has length 22 [2022-12-14 10:17:24,286 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 10:17:24,286 INFO L225 Difference]: With dead ends: 56 [2022-12-14 10:17:24,286 INFO L226 Difference]: Without dead ends: 49 [2022-12-14 10:17:24,287 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 67 GetRequests, 44 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 179 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=102, Invalid=498, Unknown=0, NotChecked=0, Total=600 [2022-12-14 10:17:24,287 INFO L413 NwaCegarLoop]: 18 mSDtfsCounter, 25 mSDsluCounter, 59 mSDsCounter, 0 mSdLazyCounter, 37 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 25 SdHoareTripleChecker+Valid, 77 SdHoareTripleChecker+Invalid, 40 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 37 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-12-14 10:17:24,288 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [25 Valid, 77 Invalid, 40 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 37 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-12-14 10:17:24,288 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2022-12-14 10:17:24,292 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 45. [2022-12-14 10:17:24,293 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 45 states, 30 states have (on average 1.2333333333333334) internal successors, (37), 33 states have internal predecessors, (37), 9 states have call successors, (9), 5 states have call predecessors, (9), 5 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-12-14 10:17:24,293 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 52 transitions. [2022-12-14 10:17:24,293 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 52 transitions. Word has length 22 [2022-12-14 10:17:24,293 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 10:17:24,293 INFO L495 AbstractCegarLoop]: Abstraction has 45 states and 52 transitions. [2022-12-14 10:17:24,294 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 3.125) internal successors, (25), 8 states have internal predecessors, (25), 5 states have call successors, (7), 4 states have call predecessors, (7), 3 states have return successors, (6), 4 states have call predecessors, (6), 4 states have call successors, (6) [2022-12-14 10:17:24,294 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 52 transitions. [2022-12-14 10:17:24,294 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-12-14 10:17:24,294 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 10:17:24,294 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 10:17:24,299 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2022-12-14 10:17:24,495 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 10:17:24,496 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-12-14 10:17:24,497 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 10:17:24,497 INFO L85 PathProgramCache]: Analyzing trace with hash -180405447, now seen corresponding path program 1 times [2022-12-14 10:17:24,497 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 10:17:24,498 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1766981914] [2022-12-14 10:17:24,498 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 10:17:24,498 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 10:17:24,530 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-12-14 10:17:24,531 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [586636246] [2022-12-14 10:17:24,531 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 10:17:24,531 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 10:17:24,532 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 [2022-12-14 10:17:24,534 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-14 10:17:24,536 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-12-14 10:17:24,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 10:17:24,576 INFO L263 TraceCheckSpWp]: Trace formula consists of 83 conjuncts, 23 conjunts are in the unsatisfiable core [2022-12-14 10:17:24,577 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-14 10:17:24,747 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-12-14 10:17:24,747 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-14 10:17:24,854 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-12-14 10:17:24,854 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 10:17:24,854 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1766981914] [2022-12-14 10:17:24,854 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-12-14 10:17:24,854 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [586636246] [2022-12-14 10:17:24,854 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [586636246] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-14 10:17:24,854 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [694588314] [2022-12-14 10:17:24,856 INFO L159 IcfgInterpreter]: Started Sifa with 16 locations of interest [2022-12-14 10:17:24,856 INFO L166 IcfgInterpreter]: Building call graph [2022-12-14 10:17:24,857 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2022-12-14 10:17:24,857 INFO L176 IcfgInterpreter]: Starting interpretation [2022-12-14 10:17:24,857 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2022-12-14 10:17:25,193 INFO L197 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 37 for LOIs [2022-12-14 10:17:25,227 INFO L197 IcfgInterpreter]: Interpreting procedure assume_abort_if_not with input of size 70 for LOIs [2022-12-14 10:17:25,254 INFO L180 IcfgInterpreter]: Interpretation finished [2022-12-14 10:17:25,900 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '1009#(and (< ~counter~0 101) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond) (<= 1 ~counter~0) (= __VERIFIER_assert_~cond 0) (= |#NULL.offset| 0) (<= 0 |#StackHeapBarrier|) (= |#NULL.base| 0))' at error location [2022-12-14 10:17:25,900 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2022-12-14 10:17:25,900 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-12-14 10:17:25,900 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 6] total 13 [2022-12-14 10:17:25,901 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [151803960] [2022-12-14 10:17:25,901 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-12-14 10:17:25,901 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2022-12-14 10:17:25,901 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 10:17:25,902 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-12-14 10:17:25,902 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=85, Invalid=565, Unknown=0, NotChecked=0, Total=650 [2022-12-14 10:17:25,902 INFO L87 Difference]: Start difference. First operand 45 states and 52 transitions. Second operand has 13 states, 12 states have (on average 2.0833333333333335) internal successors, (25), 11 states have internal predecessors, (25), 5 states have call successors, (7), 3 states have call predecessors, (7), 3 states have return successors, (6), 4 states have call predecessors, (6), 3 states have call successors, (6) [2022-12-14 10:17:26,010 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 10:17:26,010 INFO L93 Difference]: Finished difference Result 59 states and 65 transitions. [2022-12-14 10:17:26,010 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-12-14 10:17:26,010 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 12 states have (on average 2.0833333333333335) internal successors, (25), 11 states have internal predecessors, (25), 5 states have call successors, (7), 3 states have call predecessors, (7), 3 states have return successors, (6), 4 states have call predecessors, (6), 3 states have call successors, (6) Word has length 22 [2022-12-14 10:17:26,011 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 10:17:26,011 INFO L225 Difference]: With dead ends: 59 [2022-12-14 10:17:26,011 INFO L226 Difference]: Without dead ends: 51 [2022-12-14 10:17:26,012 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 68 GetRequests, 39 SyntacticMatches, 2 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 179 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=108, Invalid=704, Unknown=0, NotChecked=0, Total=812 [2022-12-14 10:17:26,013 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 26 mSDsluCounter, 38 mSDsCounter, 0 mSdLazyCounter, 109 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 27 SdHoareTripleChecker+Valid, 50 SdHoareTripleChecker+Invalid, 113 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 109 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-12-14 10:17:26,013 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [27 Valid, 50 Invalid, 113 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 109 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-12-14 10:17:26,013 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2022-12-14 10:17:26,021 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 45. [2022-12-14 10:17:26,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 45 states, 32 states have (on average 1.125) internal successors, (36), 32 states have internal predecessors, (36), 7 states have call successors, (7), 6 states have call predecessors, (7), 5 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-12-14 10:17:26,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 49 transitions. [2022-12-14 10:17:26,022 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 49 transitions. Word has length 22 [2022-12-14 10:17:26,022 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 10:17:26,022 INFO L495 AbstractCegarLoop]: Abstraction has 45 states and 49 transitions. [2022-12-14 10:17:26,022 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 12 states have (on average 2.0833333333333335) internal successors, (25), 11 states have internal predecessors, (25), 5 states have call successors, (7), 3 states have call predecessors, (7), 3 states have return successors, (6), 4 states have call predecessors, (6), 3 states have call successors, (6) [2022-12-14 10:17:26,022 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 49 transitions. [2022-12-14 10:17:26,023 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-12-14 10:17:26,023 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 10:17:26,023 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 10:17:26,027 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-12-14 10:17:26,224 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable5 [2022-12-14 10:17:26,225 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-12-14 10:17:26,226 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 10:17:26,226 INFO L85 PathProgramCache]: Analyzing trace with hash 408559265, now seen corresponding path program 1 times [2022-12-14 10:17:26,226 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 10:17:26,227 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [21695680] [2022-12-14 10:17:26,227 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 10:17:26,227 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 10:17:26,250 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-12-14 10:17:26,251 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [377470489] [2022-12-14 10:17:26,251 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 10:17:26,251 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 10:17:26,252 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 [2022-12-14 10:17:26,254 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-14 10:17:26,262 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-12-14 10:17:26,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 10:17:26,296 INFO L263 TraceCheckSpWp]: Trace formula consists of 94 conjuncts, 17 conjunts are in the unsatisfiable core [2022-12-14 10:17:26,298 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-14 10:17:26,400 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-12-14 10:17:26,401 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-14 10:17:26,480 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 7 proven. 1 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-12-14 10:17:26,480 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 10:17:26,480 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [21695680] [2022-12-14 10:17:26,480 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-12-14 10:17:26,480 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [377470489] [2022-12-14 10:17:26,480 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [377470489] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-14 10:17:26,480 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1035433283] [2022-12-14 10:17:26,482 INFO L159 IcfgInterpreter]: Started Sifa with 17 locations of interest [2022-12-14 10:17:26,482 INFO L166 IcfgInterpreter]: Building call graph [2022-12-14 10:17:26,483 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2022-12-14 10:17:26,483 INFO L176 IcfgInterpreter]: Starting interpretation [2022-12-14 10:17:26,483 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2022-12-14 10:17:27,015 INFO L197 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 11 for LOIs [2022-12-14 10:17:27,019 INFO L197 IcfgInterpreter]: Interpreting procedure assume_abort_if_not with input of size 70 for LOIs [2022-12-14 10:17:27,038 INFO L180 IcfgInterpreter]: Interpretation finished [2022-12-14 10:17:27,695 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '1349#(and (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond) (<= 1 ~counter~0) (= __VERIFIER_assert_~cond 0) (= |#NULL.offset| 0) (<= 0 |#StackHeapBarrier|) (= |#NULL.base| 0))' at error location [2022-12-14 10:17:27,695 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2022-12-14 10:17:27,695 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-12-14 10:17:27,695 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 7] total 14 [2022-12-14 10:17:27,696 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1011575042] [2022-12-14 10:17:27,696 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-12-14 10:17:27,696 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-12-14 10:17:27,696 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 10:17:27,697 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-12-14 10:17:27,697 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=665, Unknown=0, NotChecked=0, Total=756 [2022-12-14 10:17:27,697 INFO L87 Difference]: Start difference. First operand 45 states and 49 transitions. Second operand has 14 states, 12 states have (on average 2.25) internal successors, (27), 11 states have internal predecessors, (27), 5 states have call successors, (7), 3 states have call predecessors, (7), 2 states have return successors, (6), 4 states have call predecessors, (6), 3 states have call successors, (6) [2022-12-14 10:17:27,822 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 10:17:27,822 INFO L93 Difference]: Finished difference Result 51 states and 54 transitions. [2022-12-14 10:17:27,822 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-12-14 10:17:27,822 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 12 states have (on average 2.25) internal successors, (27), 11 states have internal predecessors, (27), 5 states have call successors, (7), 3 states have call predecessors, (7), 2 states have return successors, (6), 4 states have call predecessors, (6), 3 states have call successors, (6) Word has length 28 [2022-12-14 10:17:27,823 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 10:17:27,823 INFO L225 Difference]: With dead ends: 51 [2022-12-14 10:17:27,823 INFO L226 Difference]: Without dead ends: 45 [2022-12-14 10:17:27,824 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 86 GetRequests, 56 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 207 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=118, Invalid=874, Unknown=0, NotChecked=0, Total=992 [2022-12-14 10:17:27,824 INFO L413 NwaCegarLoop]: 16 mSDtfsCounter, 15 mSDsluCounter, 53 mSDsCounter, 0 mSdLazyCounter, 92 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 15 SdHoareTripleChecker+Valid, 69 SdHoareTripleChecker+Invalid, 96 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 92 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-12-14 10:17:27,825 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [15 Valid, 69 Invalid, 96 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 92 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-12-14 10:17:27,825 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2022-12-14 10:17:27,833 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 45. [2022-12-14 10:17:27,833 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 45 states, 32 states have (on average 1.03125) internal successors, (33), 32 states have internal predecessors, (33), 7 states have call successors, (7), 6 states have call predecessors, (7), 5 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-12-14 10:17:27,833 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 46 transitions. [2022-12-14 10:17:27,834 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 46 transitions. Word has length 28 [2022-12-14 10:17:27,834 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 10:17:27,834 INFO L495 AbstractCegarLoop]: Abstraction has 45 states and 46 transitions. [2022-12-14 10:17:27,834 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 12 states have (on average 2.25) internal successors, (27), 11 states have internal predecessors, (27), 5 states have call successors, (7), 3 states have call predecessors, (7), 2 states have return successors, (6), 4 states have call predecessors, (6), 3 states have call successors, (6) [2022-12-14 10:17:27,834 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 46 transitions. [2022-12-14 10:17:27,834 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2022-12-14 10:17:27,834 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 10:17:27,835 INFO L195 NwaCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 4, 4, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 10:17:27,839 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2022-12-14 10:17:28,035 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable6 [2022-12-14 10:17:28,037 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-12-14 10:17:28,037 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 10:17:28,038 INFO L85 PathProgramCache]: Analyzing trace with hash -235004718, now seen corresponding path program 2 times [2022-12-14 10:17:28,038 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 10:17:28,038 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [207120007] [2022-12-14 10:17:28,038 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 10:17:28,039 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 10:17:28,064 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-12-14 10:17:28,065 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [955875251] [2022-12-14 10:17:28,065 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-12-14 10:17:28,065 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 10:17:28,066 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 [2022-12-14 10:17:28,068 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-14 10:17:28,070 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-12-14 10:17:28,121 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2022-12-14 10:17:28,122 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-12-14 10:17:28,122 INFO L263 TraceCheckSpWp]: Trace formula consists of 131 conjuncts, 11 conjunts are in the unsatisfiable core [2022-12-14 10:17:28,124 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-14 10:17:28,167 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 8 proven. 56 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-12-14 10:17:28,167 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-14 10:17:28,227 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 8 proven. 32 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2022-12-14 10:17:28,227 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 10:17:28,227 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [207120007] [2022-12-14 10:17:28,228 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-12-14 10:17:28,228 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [955875251] [2022-12-14 10:17:28,228 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [955875251] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-14 10:17:28,228 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [99486985] [2022-12-14 10:17:28,230 INFO L159 IcfgInterpreter]: Started Sifa with 17 locations of interest [2022-12-14 10:17:28,230 INFO L166 IcfgInterpreter]: Building call graph [2022-12-14 10:17:28,230 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2022-12-14 10:17:28,230 INFO L176 IcfgInterpreter]: Starting interpretation [2022-12-14 10:17:28,230 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2022-12-14 10:17:28,712 INFO L197 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 11 for LOIs [2022-12-14 10:17:28,716 INFO L197 IcfgInterpreter]: Interpreting procedure assume_abort_if_not with input of size 70 for LOIs [2022-12-14 10:17:28,735 INFO L180 IcfgInterpreter]: Interpretation finished [2022-12-14 10:17:29,407 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '1790#(and (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond) (<= 1 ~counter~0) (= __VERIFIER_assert_~cond 0) (= |#NULL.offset| 0) (<= 0 |#StackHeapBarrier|) (= |#NULL.base| 0))' at error location [2022-12-14 10:17:29,407 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2022-12-14 10:17:29,407 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-12-14 10:17:29,408 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 8] total 14 [2022-12-14 10:17:29,408 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1152583202] [2022-12-14 10:17:29,408 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-12-14 10:17:29,408 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-12-14 10:17:29,408 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 10:17:29,409 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-12-14 10:17:29,409 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=169, Invalid=587, Unknown=0, NotChecked=0, Total=756 [2022-12-14 10:17:29,409 INFO L87 Difference]: Start difference. First operand 45 states and 46 transitions. Second operand has 14 states, 14 states have (on average 3.7142857142857144) internal successors, (52), 14 states have internal predecessors, (52), 11 states have call successors, (13), 7 states have call predecessors, (13), 6 states have return successors, (12), 10 states have call predecessors, (12), 10 states have call successors, (12) [2022-12-14 10:17:29,560 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 10:17:29,560 INFO L93 Difference]: Finished difference Result 98 states and 104 transitions. [2022-12-14 10:17:29,561 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2022-12-14 10:17:29,561 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 3.7142857142857144) internal successors, (52), 14 states have internal predecessors, (52), 11 states have call successors, (13), 7 states have call predecessors, (13), 6 states have return successors, (12), 10 states have call predecessors, (12), 10 states have call successors, (12) Word has length 46 [2022-12-14 10:17:29,561 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 10:17:29,561 INFO L225 Difference]: With dead ends: 98 [2022-12-14 10:17:29,562 INFO L226 Difference]: Without dead ends: 93 [2022-12-14 10:17:29,562 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 145 GetRequests, 110 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 433 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=282, Invalid=1050, Unknown=0, NotChecked=0, Total=1332 [2022-12-14 10:17:29,562 INFO L413 NwaCegarLoop]: 23 mSDtfsCounter, 47 mSDsluCounter, 80 mSDsCounter, 0 mSdLazyCounter, 75 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 47 SdHoareTripleChecker+Valid, 103 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 75 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-12-14 10:17:29,563 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [47 Valid, 103 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 75 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-12-14 10:17:29,563 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states. [2022-12-14 10:17:29,571 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 93. [2022-12-14 10:17:29,571 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 93 states, 68 states have (on average 1.0147058823529411) internal successors, (69), 68 states have internal predecessors, (69), 13 states have call successors, (13), 12 states have call predecessors, (13), 11 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2022-12-14 10:17:29,572 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 94 transitions. [2022-12-14 10:17:29,572 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 94 transitions. Word has length 46 [2022-12-14 10:17:29,572 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 10:17:29,572 INFO L495 AbstractCegarLoop]: Abstraction has 93 states and 94 transitions. [2022-12-14 10:17:29,572 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 3.7142857142857144) internal successors, (52), 14 states have internal predecessors, (52), 11 states have call successors, (13), 7 states have call predecessors, (13), 6 states have return successors, (12), 10 states have call predecessors, (12), 10 states have call successors, (12) [2022-12-14 10:17:29,573 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 94 transitions. [2022-12-14 10:17:29,576 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2022-12-14 10:17:29,576 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 10:17:29,576 INFO L195 NwaCegarLoop]: trace histogram [11, 11, 10, 10, 10, 10, 10, 10, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 10:17:29,580 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2022-12-14 10:17:29,777 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 10:17:29,778 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-12-14 10:17:29,779 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 10:17:29,779 INFO L85 PathProgramCache]: Analyzing trace with hash -1419782260, now seen corresponding path program 3 times [2022-12-14 10:17:29,780 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 10:17:29,780 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [320729147] [2022-12-14 10:17:29,781 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 10:17:29,781 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 10:17:29,811 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-12-14 10:17:29,812 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1908148044] [2022-12-14 10:17:29,812 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-12-14 10:17:29,813 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 10:17:29,813 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 [2022-12-14 10:17:29,816 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-14 10:17:29,819 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-12-14 10:17:29,924 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-12-14 10:17:29,924 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-12-14 10:17:29,926 INFO L263 TraceCheckSpWp]: Trace formula consists of 227 conjuncts, 23 conjunts are in the unsatisfiable core [2022-12-14 10:17:29,928 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-14 10:17:30,051 INFO L134 CoverageAnalysis]: Checked inductivity of 402 backedges. 20 proven. 380 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-12-14 10:17:30,051 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-14 10:17:30,245 INFO L134 CoverageAnalysis]: Checked inductivity of 402 backedges. 20 proven. 200 refuted. 0 times theorem prover too weak. 182 trivial. 0 not checked. [2022-12-14 10:17:30,245 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 10:17:30,245 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [320729147] [2022-12-14 10:17:30,245 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-12-14 10:17:30,246 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1908148044] [2022-12-14 10:17:30,246 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1908148044] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-14 10:17:30,246 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1080502853] [2022-12-14 10:17:30,248 INFO L159 IcfgInterpreter]: Started Sifa with 17 locations of interest [2022-12-14 10:17:30,248 INFO L166 IcfgInterpreter]: Building call graph [2022-12-14 10:17:30,248 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2022-12-14 10:17:30,248 INFO L176 IcfgInterpreter]: Starting interpretation [2022-12-14 10:17:30,248 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2022-12-14 10:17:30,756 INFO L197 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 11 for LOIs [2022-12-14 10:17:30,759 INFO L197 IcfgInterpreter]: Interpreting procedure assume_abort_if_not with input of size 70 for LOIs [2022-12-14 10:17:30,783 INFO L180 IcfgInterpreter]: Interpretation finished [2022-12-14 10:17:31,422 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '2671#(and (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond) (<= 1 ~counter~0) (= __VERIFIER_assert_~cond 0) (= |#NULL.offset| 0) (<= 0 |#StackHeapBarrier|) (= |#NULL.base| 0))' at error location [2022-12-14 10:17:31,422 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2022-12-14 10:17:31,422 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-12-14 10:17:31,422 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 14] total 26 [2022-12-14 10:17:31,423 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1667994275] [2022-12-14 10:17:31,423 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-12-14 10:17:31,423 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-12-14 10:17:31,423 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 10:17:31,424 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-12-14 10:17:31,424 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=439, Invalid=1121, Unknown=0, NotChecked=0, Total=1560 [2022-12-14 10:17:31,424 INFO L87 Difference]: Start difference. First operand 93 states and 94 transitions. Second operand has 26 states, 26 states have (on average 4.076923076923077) internal successors, (106), 26 states have internal predecessors, (106), 23 states have call successors, (25), 13 states have call predecessors, (25), 12 states have return successors, (24), 22 states have call predecessors, (24), 22 states have call successors, (24) [2022-12-14 10:17:31,724 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 10:17:31,724 INFO L93 Difference]: Finished difference Result 194 states and 206 transitions. [2022-12-14 10:17:31,724 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2022-12-14 10:17:31,724 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 4.076923076923077) internal successors, (106), 26 states have internal predecessors, (106), 23 states have call successors, (25), 13 states have call predecessors, (25), 12 states have return successors, (24), 22 states have call predecessors, (24), 22 states have call successors, (24) Word has length 94 [2022-12-14 10:17:31,725 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 10:17:31,726 INFO L225 Difference]: With dead ends: 194 [2022-12-14 10:17:31,726 INFO L226 Difference]: Without dead ends: 189 [2022-12-14 10:17:31,727 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 301 GetRequests, 242 SyntacticMatches, 0 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1078 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=954, Invalid=2706, Unknown=0, NotChecked=0, Total=3660 [2022-12-14 10:17:31,728 INFO L413 NwaCegarLoop]: 35 mSDtfsCounter, 131 mSDsluCounter, 116 mSDsCounter, 0 mSdLazyCounter, 157 mSolverCounterSat, 29 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 131 SdHoareTripleChecker+Valid, 151 SdHoareTripleChecker+Invalid, 186 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 29 IncrementalHoareTripleChecker+Valid, 157 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-12-14 10:17:31,728 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [131 Valid, 151 Invalid, 186 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [29 Valid, 157 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-12-14 10:17:31,728 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189 states. [2022-12-14 10:17:31,752 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189 to 189. [2022-12-14 10:17:31,753 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 189 states, 140 states have (on average 1.0071428571428571) internal successors, (141), 140 states have internal predecessors, (141), 25 states have call successors, (25), 24 states have call predecessors, (25), 23 states have return successors, (24), 24 states have call predecessors, (24), 24 states have call successors, (24) [2022-12-14 10:17:31,754 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 189 states to 189 states and 190 transitions. [2022-12-14 10:17:31,754 INFO L78 Accepts]: Start accepts. Automaton has 189 states and 190 transitions. Word has length 94 [2022-12-14 10:17:31,755 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 10:17:31,755 INFO L495 AbstractCegarLoop]: Abstraction has 189 states and 190 transitions. [2022-12-14 10:17:31,755 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 4.076923076923077) internal successors, (106), 26 states have internal predecessors, (106), 23 states have call successors, (25), 13 states have call predecessors, (25), 12 states have return successors, (24), 22 states have call predecessors, (24), 22 states have call successors, (24) [2022-12-14 10:17:31,755 INFO L276 IsEmpty]: Start isEmpty. Operand 189 states and 190 transitions. [2022-12-14 10:17:31,758 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 191 [2022-12-14 10:17:31,758 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 10:17:31,758 INFO L195 NwaCegarLoop]: trace histogram [23, 23, 22, 22, 22, 22, 22, 22, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 10:17:31,764 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2022-12-14 10:17:31,959 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 10:17:31,960 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-12-14 10:17:31,961 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 10:17:31,961 INFO L85 PathProgramCache]: Analyzing trace with hash -1763378944, now seen corresponding path program 4 times [2022-12-14 10:17:31,962 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 10:17:31,962 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [865928399] [2022-12-14 10:17:31,962 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 10:17:31,963 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 10:17:32,003 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-12-14 10:17:32,004 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [383991449] [2022-12-14 10:17:32,004 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-12-14 10:17:32,004 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 10:17:32,004 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 [2022-12-14 10:17:32,006 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-14 10:17:32,007 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-12-14 10:17:32,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-14 10:17:32,099 INFO L263 TraceCheckSpWp]: Trace formula consists of 419 conjuncts, 47 conjunts are in the unsatisfiable core [2022-12-14 10:17:32,102 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-14 10:17:32,357 INFO L134 CoverageAnalysis]: Checked inductivity of 1938 backedges. 44 proven. 1892 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-12-14 10:17:32,357 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-14 10:17:32,836 INFO L134 CoverageAnalysis]: Checked inductivity of 1938 backedges. 44 proven. 968 refuted. 0 times theorem prover too weak. 926 trivial. 0 not checked. [2022-12-14 10:17:32,836 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 10:17:32,836 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [865928399] [2022-12-14 10:17:32,836 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-12-14 10:17:32,836 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [383991449] [2022-12-14 10:17:32,836 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [383991449] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-14 10:17:32,836 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1585455866] [2022-12-14 10:17:32,838 INFO L159 IcfgInterpreter]: Started Sifa with 17 locations of interest [2022-12-14 10:17:32,838 INFO L166 IcfgInterpreter]: Building call graph [2022-12-14 10:17:32,839 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2022-12-14 10:17:32,839 INFO L176 IcfgInterpreter]: Starting interpretation [2022-12-14 10:17:32,839 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2022-12-14 10:17:33,240 INFO L197 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 11 for LOIs [2022-12-14 10:17:33,244 INFO L197 IcfgInterpreter]: Interpreting procedure assume_abort_if_not with input of size 70 for LOIs [2022-12-14 10:17:33,258 INFO L180 IcfgInterpreter]: Interpretation finished [2022-12-14 10:17:33,816 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '4440#(and (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond) (<= 1 ~counter~0) (= __VERIFIER_assert_~cond 0) (= |#NULL.offset| 0) (<= 0 |#StackHeapBarrier|) (= |#NULL.base| 0))' at error location [2022-12-14 10:17:33,816 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2022-12-14 10:17:33,816 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-12-14 10:17:33,816 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 26] total 50 [2022-12-14 10:17:33,817 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1077195745] [2022-12-14 10:17:33,817 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-12-14 10:17:33,817 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 50 states [2022-12-14 10:17:33,817 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 10:17:33,818 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2022-12-14 10:17:33,819 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1411, Invalid=2621, Unknown=0, NotChecked=0, Total=4032 [2022-12-14 10:17:33,819 INFO L87 Difference]: Start difference. First operand 189 states and 190 transitions. Second operand has 50 states, 50 states have (on average 4.28) internal successors, (214), 50 states have internal predecessors, (214), 47 states have call successors, (49), 25 states have call predecessors, (49), 24 states have return successors, (48), 46 states have call predecessors, (48), 46 states have call successors, (48) [2022-12-14 10:17:35,050 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 10:17:35,051 INFO L93 Difference]: Finished difference Result 386 states and 410 transitions. [2022-12-14 10:17:35,051 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 94 states. [2022-12-14 10:17:35,051 INFO L78 Accepts]: Start accepts. Automaton has has 50 states, 50 states have (on average 4.28) internal successors, (214), 50 states have internal predecessors, (214), 47 states have call successors, (49), 25 states have call predecessors, (49), 24 states have return successors, (48), 46 states have call predecessors, (48), 46 states have call successors, (48) Word has length 190 [2022-12-14 10:17:35,052 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 10:17:35,055 INFO L225 Difference]: With dead ends: 386 [2022-12-14 10:17:35,055 INFO L226 Difference]: Without dead ends: 381 [2022-12-14 10:17:35,057 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 613 GetRequests, 506 SyntacticMatches, 0 SemanticMatches, 107 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2908 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=3594, Invalid=8178, Unknown=0, NotChecked=0, Total=11772 [2022-12-14 10:17:35,058 INFO L413 NwaCegarLoop]: 59 mSDtfsCounter, 182 mSDsluCounter, 295 mSDsCounter, 0 mSdLazyCounter, 404 mSolverCounterSat, 30 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 182 SdHoareTripleChecker+Valid, 354 SdHoareTripleChecker+Invalid, 434 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 30 IncrementalHoareTripleChecker+Valid, 404 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-12-14 10:17:35,058 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [182 Valid, 354 Invalid, 434 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [30 Valid, 404 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-12-14 10:17:35,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 381 states. [2022-12-14 10:17:35,078 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 381 to 381. [2022-12-14 10:17:35,078 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 381 states, 284 states have (on average 1.0035211267605635) internal successors, (285), 284 states have internal predecessors, (285), 49 states have call successors, (49), 48 states have call predecessors, (49), 47 states have return successors, (48), 48 states have call predecessors, (48), 48 states have call successors, (48) [2022-12-14 10:17:35,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 381 states to 381 states and 382 transitions. [2022-12-14 10:17:35,080 INFO L78 Accepts]: Start accepts. Automaton has 381 states and 382 transitions. Word has length 190 [2022-12-14 10:17:35,080 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 10:17:35,080 INFO L495 AbstractCegarLoop]: Abstraction has 381 states and 382 transitions. [2022-12-14 10:17:35,080 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 50 states, 50 states have (on average 4.28) internal successors, (214), 50 states have internal predecessors, (214), 47 states have call successors, (49), 25 states have call predecessors, (49), 24 states have return successors, (48), 46 states have call predecessors, (48), 46 states have call successors, (48) [2022-12-14 10:17:35,080 INFO L276 IsEmpty]: Start isEmpty. Operand 381 states and 382 transitions. [2022-12-14 10:17:35,085 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 383 [2022-12-14 10:17:35,085 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 10:17:35,085 INFO L195 NwaCegarLoop]: trace histogram [47, 47, 46, 46, 46, 46, 46, 46, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 10:17:35,091 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Ended with exit code 0 [2022-12-14 10:17:35,285 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-12-14 10:17:35,287 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-12-14 10:17:35,288 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 10:17:35,288 INFO L85 PathProgramCache]: Analyzing trace with hash 1767238632, now seen corresponding path program 5 times [2022-12-14 10:17:35,288 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 10:17:35,289 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [227851580] [2022-12-14 10:17:35,289 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 10:17:35,289 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 10:17:35,332 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-12-14 10:17:35,332 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1874122416] [2022-12-14 10:17:35,332 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-12-14 10:17:35,333 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 10:17:35,333 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 [2022-12-14 10:17:35,334 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-14 10:17:35,335 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-12-14 10:17:35,725 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 47 check-sat command(s) [2022-12-14 10:17:35,725 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-12-14 10:17:35,734 INFO L263 TraceCheckSpWp]: Trace formula consists of 803 conjuncts, 95 conjunts are in the unsatisfiable core [2022-12-14 10:17:35,739 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-14 10:17:36,596 INFO L134 CoverageAnalysis]: Checked inductivity of 8466 backedges. 92 proven. 8372 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-12-14 10:17:36,596 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-14 10:17:38,610 INFO L134 CoverageAnalysis]: Checked inductivity of 8466 backedges. 92 proven. 4232 refuted. 0 times theorem prover too weak. 4142 trivial. 0 not checked. [2022-12-14 10:17:38,610 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 10:17:38,610 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [227851580] [2022-12-14 10:17:38,610 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-12-14 10:17:38,610 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1874122416] [2022-12-14 10:17:38,610 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1874122416] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-14 10:17:38,610 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [500285229] [2022-12-14 10:17:38,612 INFO L159 IcfgInterpreter]: Started Sifa with 17 locations of interest [2022-12-14 10:17:38,612 INFO L166 IcfgInterpreter]: Building call graph [2022-12-14 10:17:38,612 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2022-12-14 10:17:38,612 INFO L176 IcfgInterpreter]: Starting interpretation [2022-12-14 10:17:38,612 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2022-12-14 10:17:39,042 INFO L197 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 11 for LOIs [2022-12-14 10:17:39,046 INFO L197 IcfgInterpreter]: Interpreting procedure assume_abort_if_not with input of size 70 for LOIs [2022-12-14 10:17:39,065 INFO L180 IcfgInterpreter]: Interpretation finished [2022-12-14 10:17:39,973 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '7985#(and (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond) (<= 1 ~counter~0) (= __VERIFIER_assert_~cond 0) (= |#NULL.offset| 0) (<= 0 |#StackHeapBarrier|) (= |#NULL.base| 0))' at error location [2022-12-14 10:17:39,973 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2022-12-14 10:17:39,973 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-12-14 10:17:39,974 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 50] total 98 [2022-12-14 10:17:39,974 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1751091879] [2022-12-14 10:17:39,974 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-12-14 10:17:39,976 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 98 states [2022-12-14 10:17:39,976 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 10:17:39,979 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 98 interpolants. [2022-12-14 10:17:39,984 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5083, Invalid=7349, Unknown=0, NotChecked=0, Total=12432 [2022-12-14 10:17:39,984 INFO L87 Difference]: Start difference. First operand 381 states and 382 transitions. Second operand has 98 states, 98 states have (on average 4.387755102040816) internal successors, (430), 98 states have internal predecessors, (430), 95 states have call successors, (97), 49 states have call predecessors, (97), 48 states have return successors, (96), 94 states have call predecessors, (96), 94 states have call successors, (96) [2022-12-14 10:17:43,953 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 10:17:43,954 INFO L93 Difference]: Finished difference Result 770 states and 818 transitions. [2022-12-14 10:17:43,954 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 190 states. [2022-12-14 10:17:43,954 INFO L78 Accepts]: Start accepts. Automaton has has 98 states, 98 states have (on average 4.387755102040816) internal successors, (430), 98 states have internal predecessors, (430), 95 states have call successors, (97), 49 states have call predecessors, (97), 48 states have return successors, (96), 94 states have call predecessors, (96), 94 states have call successors, (96) Word has length 382 [2022-12-14 10:17:43,955 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 10:17:43,956 INFO L225 Difference]: With dead ends: 770 [2022-12-14 10:17:43,957 INFO L226 Difference]: Without dead ends: 765 [2022-12-14 10:17:43,962 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 1237 GetRequests, 1034 SyntacticMatches, 0 SemanticMatches, 203 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8728 ImplicationChecksByTransitivity, 5.7s TimeCoverageRelationStatistics Valid=14058, Invalid=27762, Unknown=0, NotChecked=0, Total=41820 [2022-12-14 10:17:43,962 INFO L413 NwaCegarLoop]: 107 mSDtfsCounter, 431 mSDsluCounter, 540 mSDsCounter, 0 mSdLazyCounter, 797 mSolverCounterSat, 81 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 431 SdHoareTripleChecker+Valid, 647 SdHoareTripleChecker+Invalid, 878 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 81 IncrementalHoareTripleChecker+Valid, 797 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-12-14 10:17:43,962 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [431 Valid, 647 Invalid, 878 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [81 Valid, 797 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-12-14 10:17:43,963 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 765 states. [2022-12-14 10:17:43,997 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 765 to 765. [2022-12-14 10:17:43,998 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 765 states, 572 states have (on average 1.0017482517482517) internal successors, (573), 572 states have internal predecessors, (573), 97 states have call successors, (97), 96 states have call predecessors, (97), 95 states have return successors, (96), 96 states have call predecessors, (96), 96 states have call successors, (96) [2022-12-14 10:17:44,000 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 765 states to 765 states and 766 transitions. [2022-12-14 10:17:44,000 INFO L78 Accepts]: Start accepts. Automaton has 765 states and 766 transitions. Word has length 382 [2022-12-14 10:17:44,000 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 10:17:44,000 INFO L495 AbstractCegarLoop]: Abstraction has 765 states and 766 transitions. [2022-12-14 10:17:44,001 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 98 states, 98 states have (on average 4.387755102040816) internal successors, (430), 98 states have internal predecessors, (430), 95 states have call successors, (97), 49 states have call predecessors, (97), 48 states have return successors, (96), 94 states have call predecessors, (96), 94 states have call successors, (96) [2022-12-14 10:17:44,001 INFO L276 IsEmpty]: Start isEmpty. Operand 765 states and 766 transitions. [2022-12-14 10:17:44,015 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 767 [2022-12-14 10:17:44,015 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 10:17:44,015 INFO L195 NwaCegarLoop]: trace histogram [95, 95, 94, 94, 94, 94, 94, 94, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 10:17:44,023 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Ended with exit code 0 [2022-12-14 10:17:44,216 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable10 [2022-12-14 10:17:44,217 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-12-14 10:17:44,218 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 10:17:44,218 INFO L85 PathProgramCache]: Analyzing trace with hash 1053987256, now seen corresponding path program 6 times [2022-12-14 10:17:44,219 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 10:17:44,219 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [41587205] [2022-12-14 10:17:44,219 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 10:17:44,220 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 10:17:44,252 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-12-14 10:17:44,252 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1982626585] [2022-12-14 10:17:44,252 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-12-14 10:17:44,252 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 10:17:44,252 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 [2022-12-14 10:17:44,253 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-14 10:17:44,254 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-12-14 10:17:45,603 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-12-14 10:17:45,603 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-12-14 10:17:45,616 INFO L263 TraceCheckSpWp]: Trace formula consists of 1571 conjuncts, 191 conjunts are in the unsatisfiable core [2022-12-14 10:17:45,626 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-14 10:17:48,245 INFO L134 CoverageAnalysis]: Checked inductivity of 35346 backedges. 188 proven. 35156 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-12-14 10:17:48,245 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-14 10:17:51,047 INFO L134 CoverageAnalysis]: Checked inductivity of 35346 backedges. 188 proven. 17672 refuted. 0 times theorem prover too weak. 17486 trivial. 0 not checked. [2022-12-14 10:17:51,047 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-12-14 10:17:51,047 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [41587205] [2022-12-14 10:17:51,048 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-12-14 10:17:51,048 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1982626585] [2022-12-14 10:17:51,048 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1982626585] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-14 10:17:51,048 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [977377935] [2022-12-14 10:17:51,050 INFO L159 IcfgInterpreter]: Started Sifa with 17 locations of interest [2022-12-14 10:17:51,050 INFO L166 IcfgInterpreter]: Building call graph [2022-12-14 10:17:51,050 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2022-12-14 10:17:51,050 INFO L176 IcfgInterpreter]: Starting interpretation [2022-12-14 10:17:51,050 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2022-12-14 10:17:51,546 INFO L197 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 11 for LOIs [2022-12-14 10:17:51,550 INFO L197 IcfgInterpreter]: Interpreting procedure assume_abort_if_not with input of size 70 for LOIs [2022-12-14 10:17:51,570 INFO L180 IcfgInterpreter]: Interpretation finished [2022-12-14 10:17:52,568 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '14992#(and (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond) (<= 1 ~counter~0) (= __VERIFIER_assert_~cond 0) (= |#NULL.offset| 0) (<= 0 |#StackHeapBarrier|) (= |#NULL.base| 0))' at error location [2022-12-14 10:17:52,568 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2022-12-14 10:17:52,568 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-12-14 10:17:52,569 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [97, 98] total 104 [2022-12-14 10:17:52,569 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1181119262] [2022-12-14 10:17:52,569 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-12-14 10:17:52,570 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 104 states [2022-12-14 10:17:52,571 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-12-14 10:17:52,573 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 104 interpolants. [2022-12-14 10:17:52,574 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5704, Invalid=8102, Unknown=0, NotChecked=0, Total=13806 [2022-12-14 10:17:52,575 INFO L87 Difference]: Start difference. First operand 765 states and 766 transitions. Second operand has 104 states, 104 states have (on average 5.721153846153846) internal successors, (595), 104 states have internal predecessors, (595), 101 states have call successors, (193), 97 states have call predecessors, (193), 96 states have return successors, (192), 100 states have call predecessors, (192), 100 states have call successors, (192) [2022-12-14 10:17:56,468 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-14 10:17:56,468 INFO L93 Difference]: Finished difference Result 818 states and 824 transitions. [2022-12-14 10:17:56,468 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 202 states. [2022-12-14 10:17:56,469 INFO L78 Accepts]: Start accepts. Automaton has has 104 states, 104 states have (on average 5.721153846153846) internal successors, (595), 104 states have internal predecessors, (595), 101 states have call successors, (193), 97 states have call predecessors, (193), 96 states have return successors, (192), 100 states have call predecessors, (192), 100 states have call successors, (192) Word has length 766 [2022-12-14 10:17:56,470 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-14 10:17:56,473 INFO L225 Difference]: With dead ends: 818 [2022-12-14 10:17:56,473 INFO L226 Difference]: Without dead ends: 813 [2022-12-14 10:17:56,476 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2395 GetRequests, 2090 SyntacticMatches, 90 SemanticMatches, 215 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12583 ImplicationChecksByTransitivity, 8.5s TimeCoverageRelationStatistics Valid=15897, Invalid=30975, Unknown=0, NotChecked=0, Total=46872 [2022-12-14 10:17:56,477 INFO L413 NwaCegarLoop]: 113 mSDtfsCounter, 32 mSDsluCounter, 438 mSDsCounter, 0 mSdLazyCounter, 805 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 32 SdHoareTripleChecker+Valid, 551 SdHoareTripleChecker+Invalid, 809 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 805 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-12-14 10:17:56,477 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [32 Valid, 551 Invalid, 809 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 805 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-12-14 10:17:56,478 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 813 states. [2022-12-14 10:17:56,511 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 813 to 813. [2022-12-14 10:17:56,512 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 813 states, 608 states have (on average 1.0016447368421053) internal successors, (609), 608 states have internal predecessors, (609), 103 states have call successors, (103), 102 states have call predecessors, (103), 101 states have return successors, (102), 102 states have call predecessors, (102), 102 states have call successors, (102) [2022-12-14 10:17:56,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 813 states to 813 states and 814 transitions. [2022-12-14 10:17:56,514 INFO L78 Accepts]: Start accepts. Automaton has 813 states and 814 transitions. Word has length 766 [2022-12-14 10:17:56,515 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-14 10:17:56,515 INFO L495 AbstractCegarLoop]: Abstraction has 813 states and 814 transitions. [2022-12-14 10:17:56,516 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 104 states, 104 states have (on average 5.721153846153846) internal successors, (595), 104 states have internal predecessors, (595), 101 states have call successors, (193), 97 states have call predecessors, (193), 96 states have return successors, (192), 100 states have call predecessors, (192), 100 states have call successors, (192) [2022-12-14 10:17:56,516 INFO L276 IsEmpty]: Start isEmpty. Operand 813 states and 814 transitions. [2022-12-14 10:17:56,527 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 815 [2022-12-14 10:17:56,527 INFO L187 NwaCegarLoop]: Found error trace [2022-12-14 10:17:56,528 INFO L195 NwaCegarLoop]: trace histogram [101, 101, 100, 100, 100, 100, 100, 100, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-14 10:17:56,535 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Ended with exit code 0 [2022-12-14 10:17:56,728 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable11 [2022-12-14 10:17:56,729 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-12-14 10:17:56,730 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-14 10:17:56,730 INFO L85 PathProgramCache]: Analyzing trace with hash 1872537714, now seen corresponding path program 7 times [2022-12-14 10:17:56,731 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-12-14 10:17:56,731 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [10998029] [2022-12-14 10:17:56,731 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-14 10:17:56,731 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-14 10:17:56,790 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-12-14 10:17:56,791 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [577439766] [2022-12-14 10:17:56,791 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-12-14 10:17:56,791 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-14 10:17:56,791 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 [2022-12-14 10:17:56,792 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-14 10:17:56,793 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-12-14 10:17:57,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-14 10:17:57,340 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-14 10:17:57,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-14 10:17:57,951 INFO L130 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2022-12-14 10:17:57,951 INFO L360 BasicCegarLoop]: Counterexample is feasible [2022-12-14 10:17:57,952 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-12-14 10:17:57,963 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2022-12-14 10:17:58,154 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2022-12-14 10:17:58,163 INFO L445 BasicCegarLoop]: Path program histogram: [7, 1, 1, 1, 1, 1, 1] [2022-12-14 10:17:58,175 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-12-14 10:17:58,311 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 14.12 10:17:58 BoogieIcfgContainer [2022-12-14 10:17:58,311 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-12-14 10:17:58,311 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-12-14 10:17:58,311 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-12-14 10:17:58,311 INFO L275 PluginConnector]: Witness Printer initialized [2022-12-14 10:17:58,312 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.12 10:17:19" (3/4) ... [2022-12-14 10:17:58,313 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2022-12-14 10:17:58,425 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/witness.graphml [2022-12-14 10:17:58,426 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-12-14 10:17:58,426 INFO L158 Benchmark]: Toolchain (without parser) took 39432.60ms. Allocated memory was 157.3MB in the beginning and 226.5MB in the end (delta: 69.2MB). Free memory was 125.4MB in the beginning and 118.2MB in the end (delta: 7.3MB). Peak memory consumption was 80.2MB. Max. memory is 16.1GB. [2022-12-14 10:17:58,426 INFO L158 Benchmark]: CDTParser took 0.14ms. Allocated memory is still 157.3MB. Free memory is still 101.8MB. There was no memory consumed. Max. memory is 16.1GB. [2022-12-14 10:17:58,426 INFO L158 Benchmark]: CACSL2BoogieTranslator took 160.00ms. Allocated memory is still 157.3MB. Free memory was 125.0MB in the beginning and 114.9MB in the end (delta: 10.1MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2022-12-14 10:17:58,427 INFO L158 Benchmark]: Boogie Procedure Inliner took 22.54ms. Allocated memory is still 157.3MB. Free memory was 114.9MB in the beginning and 113.3MB in the end (delta: 1.5MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-12-14 10:17:58,427 INFO L158 Benchmark]: Boogie Preprocessor took 14.86ms. Allocated memory is still 157.3MB. Free memory was 113.3MB in the beginning and 112.0MB in the end (delta: 1.3MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-12-14 10:17:58,427 INFO L158 Benchmark]: RCFGBuilder took 222.52ms. Allocated memory is still 157.3MB. Free memory was 112.0MB in the beginning and 100.4MB in the end (delta: 11.6MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. [2022-12-14 10:17:58,427 INFO L158 Benchmark]: TraceAbstraction took 38893.70ms. Allocated memory was 157.3MB in the beginning and 226.5MB in the end (delta: 69.2MB). Free memory was 99.4MB in the beginning and 146.9MB in the end (delta: -47.5MB). Peak memory consumption was 127.8MB. Max. memory is 16.1GB. [2022-12-14 10:17:58,427 INFO L158 Benchmark]: Witness Printer took 114.29ms. Allocated memory is still 226.5MB. Free memory was 146.9MB in the beginning and 118.2MB in the end (delta: 28.7MB). Peak memory consumption was 29.4MB. Max. memory is 16.1GB. [2022-12-14 10:17:58,428 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14ms. Allocated memory is still 157.3MB. Free memory is still 101.8MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 160.00ms. Allocated memory is still 157.3MB. Free memory was 125.0MB in the beginning and 114.9MB in the end (delta: 10.1MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 22.54ms. Allocated memory is still 157.3MB. Free memory was 114.9MB in the beginning and 113.3MB in the end (delta: 1.5MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * Boogie Preprocessor took 14.86ms. Allocated memory is still 157.3MB. Free memory was 113.3MB in the beginning and 112.0MB in the end (delta: 1.3MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * RCFGBuilder took 222.52ms. Allocated memory is still 157.3MB. Free memory was 112.0MB in the beginning and 100.4MB in the end (delta: 11.6MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. * TraceAbstraction took 38893.70ms. Allocated memory was 157.3MB in the beginning and 226.5MB in the end (delta: 69.2MB). Free memory was 99.4MB in the beginning and 146.9MB in the end (delta: -47.5MB). Peak memory consumption was 127.8MB. Max. memory is 16.1GB. * Witness Printer took 114.29ms. Allocated memory is still 226.5MB. Free memory was 146.9MB in the beginning and 118.2MB in the end (delta: 28.7MB). Peak memory consumption was 29.4MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 18]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L22] int counter = 0; [L24] int x1, x2; [L25] int y1, y2, y3; [L26] x1 = __VERIFIER_nondet_int() [L27] x2 = __VERIFIER_nondet_int() [L29] CALL assume_abort_if_not(x1 >= 0) VAL [\old(cond)=1, counter=0] [L13] COND FALSE !(!cond) [L29] RET assume_abort_if_not(x1 >= 0) VAL [counter=0, x1=101, x2=1] [L30] CALL assume_abort_if_not(x2 != 0) VAL [\old(cond)=1, counter=0] [L13] COND FALSE !(!cond) [L30] RET assume_abort_if_not(x2 != 0) VAL [counter=0, x1=101, x2=1] [L32] y1 = 0 [L33] y2 = 0 [L34] y3 = x1 VAL [counter=0, x1=101, x2=1, y1=0, y2=0, y3=101] [L36] EXPR counter++ VAL [counter=1, counter++=0, x1=101, x2=1, y1=0, y2=0, y3=101] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=1] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=1] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=1, x1=101, x2=1, y1=0, y2=0, y3=101] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=1, x1=101, x2=1, y1=1, y2=0, y3=100] [L36] EXPR counter++ VAL [counter=2, counter++=1, x1=101, x2=1, y1=1, y2=0, y3=100] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=2] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=2] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=2, x1=101, x2=1, y1=1, y2=0, y3=100] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=2, x1=101, x2=1, y1=2, y2=0, y3=99] [L36] EXPR counter++ VAL [counter=3, counter++=2, x1=101, x2=1, y1=2, y2=0, y3=99] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=3] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=3] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=3, x1=101, x2=1, y1=2, y2=0, y3=99] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=3, x1=101, x2=1, y1=3, y2=0, y3=98] [L36] EXPR counter++ VAL [counter=4, counter++=3, x1=101, x2=1, y1=3, y2=0, y3=98] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=4] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=4] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=4, x1=101, x2=1, y1=3, y2=0, y3=98] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=4, x1=101, x2=1, y1=4, y2=0, y3=97] [L36] EXPR counter++ VAL [counter=5, counter++=4, x1=101, x2=1, y1=4, y2=0, y3=97] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=5] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=5] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=5, x1=101, x2=1, y1=4, y2=0, y3=97] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=5, x1=101, x2=1, y1=5, y2=0, y3=96] [L36] EXPR counter++ VAL [counter=6, counter++=5, x1=101, x2=1, y1=5, y2=0, y3=96] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=6] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=6] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=6, x1=101, x2=1, y1=5, y2=0, y3=96] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=6, x1=101, x2=1, y1=6, y2=0, y3=95] [L36] EXPR counter++ VAL [counter=7, counter++=6, x1=101, x2=1, y1=6, y2=0, y3=95] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=7] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=7] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=7, x1=101, x2=1, y1=6, y2=0, y3=95] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=7, x1=101, x2=1, y1=7, y2=0, y3=94] [L36] EXPR counter++ VAL [counter=8, counter++=7, x1=101, x2=1, y1=7, y2=0, y3=94] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=8] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=8] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=8, x1=101, x2=1, y1=7, y2=0, y3=94] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=8, x1=101, x2=1, y1=8, y2=0, y3=93] [L36] EXPR counter++ VAL [counter=9, counter++=8, x1=101, x2=1, y1=8, y2=0, y3=93] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=9] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=9] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=9, x1=101, x2=1, y1=8, y2=0, y3=93] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=9, x1=101, x2=1, y1=9, y2=0, y3=92] [L36] EXPR counter++ VAL [counter=10, counter++=9, x1=101, x2=1, y1=9, y2=0, y3=92] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=10] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=10] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=10, x1=101, x2=1, y1=9, y2=0, y3=92] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=10, x1=101, x2=1, y1=10, y2=0, y3=91] [L36] EXPR counter++ VAL [counter=11, counter++=10, x1=101, x2=1, y1=10, y2=0, y3=91] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=11] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=11] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=11, x1=101, x2=1, y1=10, y2=0, y3=91] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=11, x1=101, x2=1, y1=11, y2=0, y3=90] [L36] EXPR counter++ VAL [counter=12, counter++=11, x1=101, x2=1, y1=11, y2=0, y3=90] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=12] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=12] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=12, x1=101, x2=1, y1=11, y2=0, y3=90] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=12, x1=101, x2=1, y1=12, y2=0, y3=89] [L36] EXPR counter++ VAL [counter=13, counter++=12, x1=101, x2=1, y1=12, y2=0, y3=89] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=13] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=13] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=13, x1=101, x2=1, y1=12, y2=0, y3=89] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=13, x1=101, x2=1, y1=13, y2=0, y3=88] [L36] EXPR counter++ VAL [counter=14, counter++=13, x1=101, x2=1, y1=13, y2=0, y3=88] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=14] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=14] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=14, x1=101, x2=1, y1=13, y2=0, y3=88] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=14, x1=101, x2=1, y1=14, y2=0, y3=87] [L36] EXPR counter++ VAL [counter=15, counter++=14, x1=101, x2=1, y1=14, y2=0, y3=87] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=15] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=15] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=15, x1=101, x2=1, y1=14, y2=0, y3=87] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=15, x1=101, x2=1, y1=15, y2=0, y3=86] [L36] EXPR counter++ VAL [counter=16, counter++=15, x1=101, x2=1, y1=15, y2=0, y3=86] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=16] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=16] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=16, x1=101, x2=1, y1=15, y2=0, y3=86] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=16, x1=101, x2=1, y1=16, y2=0, y3=85] [L36] EXPR counter++ VAL [counter=17, counter++=16, x1=101, x2=1, y1=16, y2=0, y3=85] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=17] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=17] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=17, x1=101, x2=1, y1=16, y2=0, y3=85] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=17, x1=101, x2=1, y1=17, y2=0, y3=84] [L36] EXPR counter++ VAL [counter=18, counter++=17, x1=101, x2=1, y1=17, y2=0, y3=84] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=18] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=18] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=18, x1=101, x2=1, y1=17, y2=0, y3=84] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=18, x1=101, x2=1, y1=18, y2=0, y3=83] [L36] EXPR counter++ VAL [counter=19, counter++=18, x1=101, x2=1, y1=18, y2=0, y3=83] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=19] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=19] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=19, x1=101, x2=1, y1=18, y2=0, y3=83] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=19, x1=101, x2=1, y1=19, y2=0, y3=82] [L36] EXPR counter++ VAL [counter=20, counter++=19, x1=101, x2=1, y1=19, y2=0, y3=82] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=20] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=20] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=20, x1=101, x2=1, y1=19, y2=0, y3=82] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=20, x1=101, x2=1, y1=20, y2=0, y3=81] [L36] EXPR counter++ VAL [counter=21, counter++=20, x1=101, x2=1, y1=20, y2=0, y3=81] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=21] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=21] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=21, x1=101, x2=1, y1=20, y2=0, y3=81] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=21, x1=101, x2=1, y1=21, y2=0, y3=80] [L36] EXPR counter++ VAL [counter=22, counter++=21, x1=101, x2=1, y1=21, y2=0, y3=80] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=22] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=22] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=22, x1=101, x2=1, y1=21, y2=0, y3=80] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=22, x1=101, x2=1, y1=22, y2=0, y3=79] [L36] EXPR counter++ VAL [counter=23, counter++=22, x1=101, x2=1, y1=22, y2=0, y3=79] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=23] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=23] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=23, x1=101, x2=1, y1=22, y2=0, y3=79] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=23, x1=101, x2=1, y1=23, y2=0, y3=78] [L36] EXPR counter++ VAL [counter=24, counter++=23, x1=101, x2=1, y1=23, y2=0, y3=78] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=24] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=24] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=24, x1=101, x2=1, y1=23, y2=0, y3=78] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=24, x1=101, x2=1, y1=24, y2=0, y3=77] [L36] EXPR counter++ VAL [counter=25, counter++=24, x1=101, x2=1, y1=24, y2=0, y3=77] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=25] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=25] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=25, x1=101, x2=1, y1=24, y2=0, y3=77] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=25, x1=101, x2=1, y1=25, y2=0, y3=76] [L36] EXPR counter++ VAL [counter=26, counter++=25, x1=101, x2=1, y1=25, y2=0, y3=76] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=26] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=26] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=26, x1=101, x2=1, y1=25, y2=0, y3=76] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=26, x1=101, x2=1, y1=26, y2=0, y3=75] [L36] EXPR counter++ VAL [counter=27, counter++=26, x1=101, x2=1, y1=26, y2=0, y3=75] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=27] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=27] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=27, x1=101, x2=1, y1=26, y2=0, y3=75] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=27, x1=101, x2=1, y1=27, y2=0, y3=74] [L36] EXPR counter++ VAL [counter=28, counter++=27, x1=101, x2=1, y1=27, y2=0, y3=74] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=28] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=28] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=28, x1=101, x2=1, y1=27, y2=0, y3=74] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=28, x1=101, x2=1, y1=28, y2=0, y3=73] [L36] EXPR counter++ VAL [counter=29, counter++=28, x1=101, x2=1, y1=28, y2=0, y3=73] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=29] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=29] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=29, x1=101, x2=1, y1=28, y2=0, y3=73] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=29, x1=101, x2=1, y1=29, y2=0, y3=72] [L36] EXPR counter++ VAL [counter=30, counter++=29, x1=101, x2=1, y1=29, y2=0, y3=72] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=30] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=30] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=30, x1=101, x2=1, y1=29, y2=0, y3=72] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=30, x1=101, x2=1, y1=30, y2=0, y3=71] [L36] EXPR counter++ VAL [counter=31, counter++=30, x1=101, x2=1, y1=30, y2=0, y3=71] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=31] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=31] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=31, x1=101, x2=1, y1=30, y2=0, y3=71] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=31, x1=101, x2=1, y1=31, y2=0, y3=70] [L36] EXPR counter++ VAL [counter=32, counter++=31, x1=101, x2=1, y1=31, y2=0, y3=70] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=32] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=32] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=32, x1=101, x2=1, y1=31, y2=0, y3=70] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=32, x1=101, x2=1, y1=32, y2=0, y3=69] [L36] EXPR counter++ VAL [counter=33, counter++=32, x1=101, x2=1, y1=32, y2=0, y3=69] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=33] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=33] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=33, x1=101, x2=1, y1=32, y2=0, y3=69] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=33, x1=101, x2=1, y1=33, y2=0, y3=68] [L36] EXPR counter++ VAL [counter=34, counter++=33, x1=101, x2=1, y1=33, y2=0, y3=68] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=34] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=34] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=34, x1=101, x2=1, y1=33, y2=0, y3=68] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=34, x1=101, x2=1, y1=34, y2=0, y3=67] [L36] EXPR counter++ VAL [counter=35, counter++=34, x1=101, x2=1, y1=34, y2=0, y3=67] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=35] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=35] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=35, x1=101, x2=1, y1=34, y2=0, y3=67] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=35, x1=101, x2=1, y1=35, y2=0, y3=66] [L36] EXPR counter++ VAL [counter=36, counter++=35, x1=101, x2=1, y1=35, y2=0, y3=66] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=36] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=36] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=36, x1=101, x2=1, y1=35, y2=0, y3=66] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=36, x1=101, x2=1, y1=36, y2=0, y3=65] [L36] EXPR counter++ VAL [counter=37, counter++=36, x1=101, x2=1, y1=36, y2=0, y3=65] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=37] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=37] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=37, x1=101, x2=1, y1=36, y2=0, y3=65] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=37, x1=101, x2=1, y1=37, y2=0, y3=64] [L36] EXPR counter++ VAL [counter=38, counter++=37, x1=101, x2=1, y1=37, y2=0, y3=64] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=38] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=38] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=38, x1=101, x2=1, y1=37, y2=0, y3=64] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=38, x1=101, x2=1, y1=38, y2=0, y3=63] [L36] EXPR counter++ VAL [counter=39, counter++=38, x1=101, x2=1, y1=38, y2=0, y3=63] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=39] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=39] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=39, x1=101, x2=1, y1=38, y2=0, y3=63] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=39, x1=101, x2=1, y1=39, y2=0, y3=62] [L36] EXPR counter++ VAL [counter=40, counter++=39, x1=101, x2=1, y1=39, y2=0, y3=62] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=40] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=40] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=40, x1=101, x2=1, y1=39, y2=0, y3=62] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=40, x1=101, x2=1, y1=40, y2=0, y3=61] [L36] EXPR counter++ VAL [counter=41, counter++=40, x1=101, x2=1, y1=40, y2=0, y3=61] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=41] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=41] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=41, x1=101, x2=1, y1=40, y2=0, y3=61] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=41, x1=101, x2=1, y1=41, y2=0, y3=60] [L36] EXPR counter++ VAL [counter=42, counter++=41, x1=101, x2=1, y1=41, y2=0, y3=60] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=42] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=42] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=42, x1=101, x2=1, y1=41, y2=0, y3=60] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=42, x1=101, x2=1, y1=42, y2=0, y3=59] [L36] EXPR counter++ VAL [counter=43, counter++=42, x1=101, x2=1, y1=42, y2=0, y3=59] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=43] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=43] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=43, x1=101, x2=1, y1=42, y2=0, y3=59] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=43, x1=101, x2=1, y1=43, y2=0, y3=58] [L36] EXPR counter++ VAL [counter=44, counter++=43, x1=101, x2=1, y1=43, y2=0, y3=58] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=44] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=44] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=44, x1=101, x2=1, y1=43, y2=0, y3=58] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=44, x1=101, x2=1, y1=44, y2=0, y3=57] [L36] EXPR counter++ VAL [counter=45, counter++=44, x1=101, x2=1, y1=44, y2=0, y3=57] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=45] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=45] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=45, x1=101, x2=1, y1=44, y2=0, y3=57] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=45, x1=101, x2=1, y1=45, y2=0, y3=56] [L36] EXPR counter++ VAL [counter=46, counter++=45, x1=101, x2=1, y1=45, y2=0, y3=56] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=46] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=46] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=46, x1=101, x2=1, y1=45, y2=0, y3=56] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=46, x1=101, x2=1, y1=46, y2=0, y3=55] [L36] EXPR counter++ VAL [counter=47, counter++=46, x1=101, x2=1, y1=46, y2=0, y3=55] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=47] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=47] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=47, x1=101, x2=1, y1=46, y2=0, y3=55] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=47, x1=101, x2=1, y1=47, y2=0, y3=54] [L36] EXPR counter++ VAL [counter=48, counter++=47, x1=101, x2=1, y1=47, y2=0, y3=54] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=48] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=48] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=48, x1=101, x2=1, y1=47, y2=0, y3=54] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=48, x1=101, x2=1, y1=48, y2=0, y3=53] [L36] EXPR counter++ VAL [counter=49, counter++=48, x1=101, x2=1, y1=48, y2=0, y3=53] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=49] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=49] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=49, x1=101, x2=1, y1=48, y2=0, y3=53] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=49, x1=101, x2=1, y1=49, y2=0, y3=52] [L36] EXPR counter++ VAL [counter=50, counter++=49, x1=101, x2=1, y1=49, y2=0, y3=52] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=50] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=50] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=50, x1=101, x2=1, y1=49, y2=0, y3=52] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=50, x1=101, x2=1, y1=50, y2=0, y3=51] [L36] EXPR counter++ VAL [counter=51, counter++=50, x1=101, x2=1, y1=50, y2=0, y3=51] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=51] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=51] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=51, x1=101, x2=1, y1=50, y2=0, y3=51] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=51, x1=101, x2=1, y1=51, y2=0, y3=50] [L36] EXPR counter++ VAL [counter=52, counter++=51, x1=101, x2=1, y1=51, y2=0, y3=50] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=52] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=52] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=52, x1=101, x2=1, y1=51, y2=0, y3=50] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=52, x1=101, x2=1, y1=52, y2=0, y3=49] [L36] EXPR counter++ VAL [counter=53, counter++=52, x1=101, x2=1, y1=52, y2=0, y3=49] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=53] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=53] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=53, x1=101, x2=1, y1=52, y2=0, y3=49] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=53, x1=101, x2=1, y1=53, y2=0, y3=48] [L36] EXPR counter++ VAL [counter=54, counter++=53, x1=101, x2=1, y1=53, y2=0, y3=48] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=54] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=54] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=54, x1=101, x2=1, y1=53, y2=0, y3=48] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=54, x1=101, x2=1, y1=54, y2=0, y3=47] [L36] EXPR counter++ VAL [counter=55, counter++=54, x1=101, x2=1, y1=54, y2=0, y3=47] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=55] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=55] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=55, x1=101, x2=1, y1=54, y2=0, y3=47] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=55, x1=101, x2=1, y1=55, y2=0, y3=46] [L36] EXPR counter++ VAL [counter=56, counter++=55, x1=101, x2=1, y1=55, y2=0, y3=46] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=56] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=56] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=56, x1=101, x2=1, y1=55, y2=0, y3=46] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=56, x1=101, x2=1, y1=56, y2=0, y3=45] [L36] EXPR counter++ VAL [counter=57, counter++=56, x1=101, x2=1, y1=56, y2=0, y3=45] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=57] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=57] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=57, x1=101, x2=1, y1=56, y2=0, y3=45] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=57, x1=101, x2=1, y1=57, y2=0, y3=44] [L36] EXPR counter++ VAL [counter=58, counter++=57, x1=101, x2=1, y1=57, y2=0, y3=44] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=58] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=58] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=58, x1=101, x2=1, y1=57, y2=0, y3=44] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=58, x1=101, x2=1, y1=58, y2=0, y3=43] [L36] EXPR counter++ VAL [counter=59, counter++=58, x1=101, x2=1, y1=58, y2=0, y3=43] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=59] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=59] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=59, x1=101, x2=1, y1=58, y2=0, y3=43] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=59, x1=101, x2=1, y1=59, y2=0, y3=42] [L36] EXPR counter++ VAL [counter=60, counter++=59, x1=101, x2=1, y1=59, y2=0, y3=42] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=60] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=60] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=60, x1=101, x2=1, y1=59, y2=0, y3=42] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=60, x1=101, x2=1, y1=60, y2=0, y3=41] [L36] EXPR counter++ VAL [counter=61, counter++=60, x1=101, x2=1, y1=60, y2=0, y3=41] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=61] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=61] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=61, x1=101, x2=1, y1=60, y2=0, y3=41] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=61, x1=101, x2=1, y1=61, y2=0, y3=40] [L36] EXPR counter++ VAL [counter=62, counter++=61, x1=101, x2=1, y1=61, y2=0, y3=40] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=62] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=62] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=62, x1=101, x2=1, y1=61, y2=0, y3=40] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=62, x1=101, x2=1, y1=62, y2=0, y3=39] [L36] EXPR counter++ VAL [counter=63, counter++=62, x1=101, x2=1, y1=62, y2=0, y3=39] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=63] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=63] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=63, x1=101, x2=1, y1=62, y2=0, y3=39] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=63, x1=101, x2=1, y1=63, y2=0, y3=38] [L36] EXPR counter++ VAL [counter=64, counter++=63, x1=101, x2=1, y1=63, y2=0, y3=38] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=64] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=64] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=64, x1=101, x2=1, y1=63, y2=0, y3=38] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=64, x1=101, x2=1, y1=64, y2=0, y3=37] [L36] EXPR counter++ VAL [counter=65, counter++=64, x1=101, x2=1, y1=64, y2=0, y3=37] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=65] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=65] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=65, x1=101, x2=1, y1=64, y2=0, y3=37] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=65, x1=101, x2=1, y1=65, y2=0, y3=36] [L36] EXPR counter++ VAL [counter=66, counter++=65, x1=101, x2=1, y1=65, y2=0, y3=36] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=66] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=66] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=66, x1=101, x2=1, y1=65, y2=0, y3=36] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=66, x1=101, x2=1, y1=66, y2=0, y3=35] [L36] EXPR counter++ VAL [counter=67, counter++=66, x1=101, x2=1, y1=66, y2=0, y3=35] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=67] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=67] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=67, x1=101, x2=1, y1=66, y2=0, y3=35] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=67, x1=101, x2=1, y1=67, y2=0, y3=34] [L36] EXPR counter++ VAL [counter=68, counter++=67, x1=101, x2=1, y1=67, y2=0, y3=34] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=68] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=68] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=68, x1=101, x2=1, y1=67, y2=0, y3=34] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=68, x1=101, x2=1, y1=68, y2=0, y3=33] [L36] EXPR counter++ VAL [counter=69, counter++=68, x1=101, x2=1, y1=68, y2=0, y3=33] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=69] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=69] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=69, x1=101, x2=1, y1=68, y2=0, y3=33] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=69, x1=101, x2=1, y1=69, y2=0, y3=32] [L36] EXPR counter++ VAL [counter=70, counter++=69, x1=101, x2=1, y1=69, y2=0, y3=32] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=70] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=70] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=70, x1=101, x2=1, y1=69, y2=0, y3=32] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=70, x1=101, x2=1, y1=70, y2=0, y3=31] [L36] EXPR counter++ VAL [counter=71, counter++=70, x1=101, x2=1, y1=70, y2=0, y3=31] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=71] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=71] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=71, x1=101, x2=1, y1=70, y2=0, y3=31] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=71, x1=101, x2=1, y1=71, y2=0, y3=30] [L36] EXPR counter++ VAL [counter=72, counter++=71, x1=101, x2=1, y1=71, y2=0, y3=30] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=72] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=72] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=72, x1=101, x2=1, y1=71, y2=0, y3=30] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=72, x1=101, x2=1, y1=72, y2=0, y3=29] [L36] EXPR counter++ VAL [counter=73, counter++=72, x1=101, x2=1, y1=72, y2=0, y3=29] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=73] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=73] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=73, x1=101, x2=1, y1=72, y2=0, y3=29] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=73, x1=101, x2=1, y1=73, y2=0, y3=28] [L36] EXPR counter++ VAL [counter=74, counter++=73, x1=101, x2=1, y1=73, y2=0, y3=28] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=74] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=74] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=74, x1=101, x2=1, y1=73, y2=0, y3=28] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=74, x1=101, x2=1, y1=74, y2=0, y3=27] [L36] EXPR counter++ VAL [counter=75, counter++=74, x1=101, x2=1, y1=74, y2=0, y3=27] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=75] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=75] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=75, x1=101, x2=1, y1=74, y2=0, y3=27] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=75, x1=101, x2=1, y1=75, y2=0, y3=26] [L36] EXPR counter++ VAL [counter=76, counter++=75, x1=101, x2=1, y1=75, y2=0, y3=26] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=76] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=76] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=76, x1=101, x2=1, y1=75, y2=0, y3=26] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=76, x1=101, x2=1, y1=76, y2=0, y3=25] [L36] EXPR counter++ VAL [counter=77, counter++=76, x1=101, x2=1, y1=76, y2=0, y3=25] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=77] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=77] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=77, x1=101, x2=1, y1=76, y2=0, y3=25] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=77, x1=101, x2=1, y1=77, y2=0, y3=24] [L36] EXPR counter++ VAL [counter=78, counter++=77, x1=101, x2=1, y1=77, y2=0, y3=24] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=78] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=78] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=78, x1=101, x2=1, y1=77, y2=0, y3=24] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=78, x1=101, x2=1, y1=78, y2=0, y3=23] [L36] EXPR counter++ VAL [counter=79, counter++=78, x1=101, x2=1, y1=78, y2=0, y3=23] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=79] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=79] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=79, x1=101, x2=1, y1=78, y2=0, y3=23] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=79, x1=101, x2=1, y1=79, y2=0, y3=22] [L36] EXPR counter++ VAL [counter=80, counter++=79, x1=101, x2=1, y1=79, y2=0, y3=22] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=80] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=80] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=80, x1=101, x2=1, y1=79, y2=0, y3=22] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=80, x1=101, x2=1, y1=80, y2=0, y3=21] [L36] EXPR counter++ VAL [counter=81, counter++=80, x1=101, x2=1, y1=80, y2=0, y3=21] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=81] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=81] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=81, x1=101, x2=1, y1=80, y2=0, y3=21] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=81, x1=101, x2=1, y1=81, y2=0, y3=20] [L36] EXPR counter++ VAL [counter=82, counter++=81, x1=101, x2=1, y1=81, y2=0, y3=20] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=82] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=82] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=82, x1=101, x2=1, y1=81, y2=0, y3=20] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=82, x1=101, x2=1, y1=82, y2=0, y3=19] [L36] EXPR counter++ VAL [counter=83, counter++=82, x1=101, x2=1, y1=82, y2=0, y3=19] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=83] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=83] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=83, x1=101, x2=1, y1=82, y2=0, y3=19] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=83, x1=101, x2=1, y1=83, y2=0, y3=18] [L36] EXPR counter++ VAL [counter=84, counter++=83, x1=101, x2=1, y1=83, y2=0, y3=18] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=84] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=84] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=84, x1=101, x2=1, y1=83, y2=0, y3=18] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=84, x1=101, x2=1, y1=84, y2=0, y3=17] [L36] EXPR counter++ VAL [counter=85, counter++=84, x1=101, x2=1, y1=84, y2=0, y3=17] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=85] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=85] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=85, x1=101, x2=1, y1=84, y2=0, y3=17] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=85, x1=101, x2=1, y1=85, y2=0, y3=16] [L36] EXPR counter++ VAL [counter=86, counter++=85, x1=101, x2=1, y1=85, y2=0, y3=16] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=86] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=86] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=86, x1=101, x2=1, y1=85, y2=0, y3=16] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=86, x1=101, x2=1, y1=86, y2=0, y3=15] [L36] EXPR counter++ VAL [counter=87, counter++=86, x1=101, x2=1, y1=86, y2=0, y3=15] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=87] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=87] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=87, x1=101, x2=1, y1=86, y2=0, y3=15] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=87, x1=101, x2=1, y1=87, y2=0, y3=14] [L36] EXPR counter++ VAL [counter=88, counter++=87, x1=101, x2=1, y1=87, y2=0, y3=14] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=88] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=88] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=88, x1=101, x2=1, y1=87, y2=0, y3=14] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=88, x1=101, x2=1, y1=88, y2=0, y3=13] [L36] EXPR counter++ VAL [counter=89, counter++=88, x1=101, x2=1, y1=88, y2=0, y3=13] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=89] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=89] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=89, x1=101, x2=1, y1=88, y2=0, y3=13] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=89, x1=101, x2=1, y1=89, y2=0, y3=12] [L36] EXPR counter++ VAL [counter=90, counter++=89, x1=101, x2=1, y1=89, y2=0, y3=12] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=90] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=90] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=90, x1=101, x2=1, y1=89, y2=0, y3=12] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=90, x1=101, x2=1, y1=90, y2=0, y3=11] [L36] EXPR counter++ VAL [counter=91, counter++=90, x1=101, x2=1, y1=90, y2=0, y3=11] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=91] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=91] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=91, x1=101, x2=1, y1=90, y2=0, y3=11] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=91, x1=101, x2=1, y1=91, y2=0, y3=10] [L36] EXPR counter++ VAL [counter=92, counter++=91, x1=101, x2=1, y1=91, y2=0, y3=10] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=92] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=92] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=92, x1=101, x2=1, y1=91, y2=0, y3=10] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=92, x1=101, x2=1, y1=92, y2=0, y3=9] [L36] EXPR counter++ VAL [counter=93, counter++=92, x1=101, x2=1, y1=92, y2=0, y3=9] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=93] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=93] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=93, x1=101, x2=1, y1=92, y2=0, y3=9] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=93, x1=101, x2=1, y1=93, y2=0, y3=8] [L36] EXPR counter++ VAL [counter=94, counter++=93, x1=101, x2=1, y1=93, y2=0, y3=8] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=94] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=94] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=94, x1=101, x2=1, y1=93, y2=0, y3=8] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=94, x1=101, x2=1, y1=94, y2=0, y3=7] [L36] EXPR counter++ VAL [counter=95, counter++=94, x1=101, x2=1, y1=94, y2=0, y3=7] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=95] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=95] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=95, x1=101, x2=1, y1=94, y2=0, y3=7] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=95, x1=101, x2=1, y1=95, y2=0, y3=6] [L36] EXPR counter++ VAL [counter=96, counter++=95, x1=101, x2=1, y1=95, y2=0, y3=6] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=96] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=96] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=96, x1=101, x2=1, y1=95, y2=0, y3=6] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=96, x1=101, x2=1, y1=96, y2=0, y3=5] [L36] EXPR counter++ VAL [counter=97, counter++=96, x1=101, x2=1, y1=96, y2=0, y3=5] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=97] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=97] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=97, x1=101, x2=1, y1=96, y2=0, y3=5] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=97, x1=101, x2=1, y1=97, y2=0, y3=4] [L36] EXPR counter++ VAL [counter=98, counter++=97, x1=101, x2=1, y1=97, y2=0, y3=4] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=98] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=98] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=98, x1=101, x2=1, y1=97, y2=0, y3=4] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=98, x1=101, x2=1, y1=98, y2=0, y3=3] [L36] EXPR counter++ VAL [counter=99, counter++=98, x1=101, x2=1, y1=98, y2=0, y3=3] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=99] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=99] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=99, x1=101, x2=1, y1=98, y2=0, y3=3] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=99, x1=101, x2=1, y1=99, y2=0, y3=2] [L36] EXPR counter++ VAL [counter=100, counter++=99, x1=101, x2=1, y1=99, y2=0, y3=2] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=100] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1, counter=100] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=100, x1=101, x2=1, y1=99, y2=0, y3=2] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=100, x1=101, x2=1, y1=100, y2=0, y3=1] [L36] EXPR counter++ VAL [counter=101, counter++=100, x1=101, x2=1, y1=100, y2=0, y3=1] [L36] COND FALSE !(counter++<100) [L50] CALL __VERIFIER_assert(y1*x2 + y2 == x1) VAL [\old(cond)=0, counter=101] [L16] COND TRUE !(cond) VAL [\old(cond)=0, cond=0, counter=101] [L18] reach_error() VAL [\old(cond)=0, cond=0, counter=101] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 19 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 38.7s, OverallIterations: 13, TraceHistogramMax: 101, PathProgramHistogramMax: 7, EmptinessCheckTime: 0.0s, AutomataDifference: 10.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 905 SdHoareTripleChecker+Valid, 1.8s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 902 mSDsluCounter, 2142 SdHoareTripleChecker+Invalid, 1.6s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 1705 mSDsCounter, 165 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 2641 IncrementalHoareTripleChecker+Invalid, 2806 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 165 mSolverCounterUnsat, 437 mSDtfsCounter, 2641 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 5009 GetRequests, 4183 SyntacticMatches, 95 SemanticMatches, 731 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26484 ImplicationChecksByTransitivity, 21.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=813occurred in iteration=12, InterpolantAutomatonStates: 613, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.2s AutomataMinimizationTime, 12 MinimizatonAttempts, 12 StatesRemovedByMinimization, 3 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.3s SsaConstructionTime, 2.4s SatisfiabilityAnalysisTime, 10.5s InterpolantComputationTime, 2452 NumberOfCodeBlocks, 2452 NumberOfCodeBlocksAsserted, 67 NumberOfCheckSat, 3160 ConstructedInterpolants, 0 QuantifiedInterpolants, 8122 SizeOfPredicates, 192 NumberOfNonLiveVariables, 3686 ConjunctsInSsa, 452 ConjunctsInUnsatCore, 21 InterpolantComputations, 3 PerfectInterpolantSequences, 23525/92504 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: OVERALL_TIME: 0.3s, ICFG_INTERPRETER_ENTERED_PROCEDURES: 3, DAG_INTERPRETER_EARLY_EXIT_QUERIES_NONTRIVIAL: 17, DAG_INTERPRETER_EARLY_EXITS: 1, TOOLS_POST_APPLICATIONS: 14, TOOLS_POST_TIME: 0.0s, TOOLS_POST_CALL_APPLICATIONS: 10, TOOLS_POST_CALL_TIME: 0.1s, TOOLS_POST_RETURN_APPLICATIONS: 6, TOOLS_POST_RETURN_TIME: 0.0s, TOOLS_QUANTIFIERELIM_APPLICATIONS: 30, TOOLS_QUANTIFIERELIM_TIME: 0.2s, TOOLS_QUANTIFIERELIM_MAX_TIME: 0.0s, FLUID_QUERY_TIME: 0.0s, FLUID_QUERIES: 46, FLUID_YES_ANSWERS: 0, DOMAIN_JOIN_APPLICATIONS: 10, DOMAIN_JOIN_TIME: 0.1s, DOMAIN_ALPHA_APPLICATIONS: 0, DOMAIN_ALPHA_TIME: 0.0s, DOMAIN_WIDEN_APPLICATIONS: 0, DOMAIN_WIDEN_TIME: 0.0s, DOMAIN_ISSUBSETEQ_APPLICATIONS: 0, DOMAIN_ISSUBSETEQ_TIME: 0.0s, DOMAIN_ISBOTTOM_APPLICATIONS: 17, DOMAIN_ISBOTTOM_TIME: 0.0s, LOOP_SUMMARIZER_APPLICATIONS: 0, LOOP_SUMMARIZER_CACHE_MISSES: 0, LOOP_SUMMARIZER_OVERALL_TIME: 0.0s, LOOP_SUMMARIZER_NEW_COMPUTATION_TIME: 0.0s, LOOP_SUMMARIZER_FIXPOINT_ITERATIONS: 0, CALL_SUMMARIZER_APPLICATIONS: 6, CALL_SUMMARIZER_CACHE_MISSES: 2, CALL_SUMMARIZER_OVERALL_TIME: 0.0s, CALL_SUMMARIZER_NEW_COMPUTATION_TIME: 0.0s, PROCEDURE_GRAPH_BUILDER_TIME: 0.0s, PATH_EXPR_TIME: 0.0s, REGEX_TO_DAG_TIME: 0.0s, DAG_COMPRESSION_TIME: 0.0s, DAG_COMPRESSION_PROCESSED_NODES: 146, DAG_COMPRESSION_RETAINED_NODES: 50, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2022-12-14 10:17:58,443 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9a084e1-b6b1-4474-96f6-d9fd131353af/bin/utaipan-gh47qXpMRh/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE