./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/array-industry-pattern/array_mul_init.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version e7bb482b Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/array-industry-pattern/array_mul_init.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 09dc663f7f76eee13b6af61297831e3fbddcb16c16389bf8d94f2d27048733d0 --- Real Ultimate output --- This is Ultimate 0.2.3-dev-e7bb482 [2023-11-06 21:57:41,928 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-06 21:57:42,048 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/config/svcomp-Termination-32bit-Automizer_Default.epf [2023-11-06 21:57:42,056 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-06 21:57:42,057 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-06 21:57:42,098 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-06 21:57:42,099 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-06 21:57:42,100 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-06 21:57:42,101 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-06 21:57:42,106 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-06 21:57:42,107 INFO L153 SettingsManager]: * Use SBE=true [2023-11-06 21:57:42,108 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-06 21:57:42,109 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-06 21:57:42,111 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-06 21:57:42,111 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-06 21:57:42,112 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-06 21:57:42,112 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-06 21:57:42,113 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-06 21:57:42,114 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-06 21:57:42,114 INFO L153 SettingsManager]: * sizeof long=4 [2023-11-06 21:57:42,115 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-06 21:57:42,115 INFO L153 SettingsManager]: * sizeof POINTER=4 [2023-11-06 21:57:42,116 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-06 21:57:42,117 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-06 21:57:42,117 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-06 21:57:42,117 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-06 21:57:42,118 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-06 21:57:42,118 INFO L153 SettingsManager]: * sizeof long double=12 [2023-11-06 21:57:42,119 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-06 21:57:42,119 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-06 21:57:42,121 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-06 21:57:42,121 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-06 21:57:42,121 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-06 21:57:42,122 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-06 21:57:42,122 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-06 21:57:42,125 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-06 21:57:42,125 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 09dc663f7f76eee13b6af61297831e3fbddcb16c16389bf8d94f2d27048733d0 [2023-11-06 21:57:42,436 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-06 21:57:42,470 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-06 21:57:42,473 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-06 21:57:42,474 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-06 21:57:42,475 INFO L274 PluginConnector]: CDTParser initialized [2023-11-06 21:57:42,498 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/../../sv-benchmarks/c/array-industry-pattern/array_mul_init.i [2023-11-06 21:57:45,560 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-06 21:57:45,833 INFO L384 CDTParser]: Found 1 translation units. [2023-11-06 21:57:45,833 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/sv-benchmarks/c/array-industry-pattern/array_mul_init.i [2023-11-06 21:57:45,841 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/data/26cf39725/84166a56229a471f9adca8eace7b111f/FLAG6817becdf [2023-11-06 21:57:45,858 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/data/26cf39725/84166a56229a471f9adca8eace7b111f [2023-11-06 21:57:45,861 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-06 21:57:45,862 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-06 21:57:45,864 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-06 21:57:45,864 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-06 21:57:45,870 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-06 21:57:45,871 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.11 09:57:45" (1/1) ... [2023-11-06 21:57:45,872 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7ec2436 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.11 09:57:45, skipping insertion in model container [2023-11-06 21:57:45,872 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.11 09:57:45" (1/1) ... [2023-11-06 21:57:45,897 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-06 21:57:46,053 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-06 21:57:46,065 INFO L202 MainTranslator]: Completed pre-run [2023-11-06 21:57:46,094 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-06 21:57:46,110 INFO L206 MainTranslator]: Completed translation [2023-11-06 21:57:46,110 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.11 09:57:46 WrapperNode [2023-11-06 21:57:46,110 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-06 21:57:46,111 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-06 21:57:46,111 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-06 21:57:46,112 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-06 21:57:46,120 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.11 09:57:46" (1/1) ... [2023-11-06 21:57:46,133 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.11 09:57:46" (1/1) ... [2023-11-06 21:57:46,156 INFO L138 Inliner]: procedures = 16, calls = 21, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 74 [2023-11-06 21:57:46,157 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-06 21:57:46,158 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-06 21:57:46,158 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-06 21:57:46,158 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-06 21:57:46,168 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.11 09:57:46" (1/1) ... [2023-11-06 21:57:46,169 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.11 09:57:46" (1/1) ... [2023-11-06 21:57:46,171 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.11 09:57:46" (1/1) ... [2023-11-06 21:57:46,171 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.11 09:57:46" (1/1) ... [2023-11-06 21:57:46,187 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.11 09:57:46" (1/1) ... [2023-11-06 21:57:46,204 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.11 09:57:46" (1/1) ... [2023-11-06 21:57:46,205 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.11 09:57:46" (1/1) ... [2023-11-06 21:57:46,207 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.11 09:57:46" (1/1) ... [2023-11-06 21:57:46,209 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-06 21:57:46,210 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-06 21:57:46,210 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-06 21:57:46,210 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-06 21:57:46,211 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.11 09:57:46" (1/1) ... [2023-11-06 21:57:46,218 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-06 21:57:46,233 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 21:57:46,248 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-06 21:57:46,271 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-06 21:57:46,297 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2023-11-06 21:57:46,297 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2023-11-06 21:57:46,297 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2023-11-06 21:57:46,297 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2023-11-06 21:57:46,298 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-06 21:57:46,300 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-06 21:57:46,300 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2023-11-06 21:57:46,300 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-11-06 21:57:46,404 INFO L236 CfgBuilder]: Building ICFG [2023-11-06 21:57:46,407 INFO L262 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-06 21:57:46,689 INFO L277 CfgBuilder]: Performing block encoding [2023-11-06 21:57:46,695 INFO L297 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-06 21:57:46,696 INFO L302 CfgBuilder]: Removed 3 assume(true) statements. [2023-11-06 21:57:46,697 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.11 09:57:46 BoogieIcfgContainer [2023-11-06 21:57:46,698 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-06 21:57:46,699 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-06 21:57:46,699 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-06 21:57:46,703 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-06 21:57:46,704 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-06 21:57:46,704 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 06.11 09:57:45" (1/3) ... [2023-11-06 21:57:46,705 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@42787ca6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.11 09:57:46, skipping insertion in model container [2023-11-06 21:57:46,705 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-06 21:57:46,705 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.11 09:57:46" (2/3) ... [2023-11-06 21:57:46,706 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@42787ca6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.11 09:57:46, skipping insertion in model container [2023-11-06 21:57:46,706 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-06 21:57:46,706 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.11 09:57:46" (3/3) ... [2023-11-06 21:57:46,707 INFO L332 chiAutomizerObserver]: Analyzing ICFG array_mul_init.i [2023-11-06 21:57:46,771 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-06 21:57:46,772 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-06 21:57:46,772 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-06 21:57:46,772 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-06 21:57:46,772 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-06 21:57:46,773 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-06 21:57:46,773 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-06 21:57:46,773 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-06 21:57:46,779 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 22 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-06 21:57:46,800 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 14 [2023-11-06 21:57:46,801 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-06 21:57:46,801 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-06 21:57:46,807 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-06 21:57:46,807 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-06 21:57:46,808 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-06 21:57:46,808 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 22 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-06 21:57:46,812 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 14 [2023-11-06 21:57:46,812 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-06 21:57:46,812 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-06 21:57:46,812 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-06 21:57:46,813 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-06 21:57:46,820 INFO L748 eck$LassoCheckResult]: Stem: 17#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(17, 2); 9#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post1#1, main_#t~nondet3#1, main_#t~nondet4#1, main_#t~post2#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem10#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~short11#1, main_#t~post5#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~#b~0#1.base, main_~#b~0#1.offset, main_~k~0#1, main_~i~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~k~0#1;havoc main_~i~0#1;main_~i~0#1 := 0; 4#L21-3true [2023-11-06 21:57:46,822 INFO L750 eck$LassoCheckResult]: Loop: 4#L21-3true assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 18#L21-2true main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4#L21-3true [2023-11-06 21:57:46,829 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-11-06 21:57:46,830 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2023-11-06 21:57:46,840 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-06 21:57:46,841 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [151936122] [2023-11-06 21:57:46,841 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 21:57:46,842 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-06 21:57:46,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-06 21:57:46,977 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-06 21:57:47,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-06 21:57:47,031 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-06 21:57:47,035 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-11-06 21:57:47,035 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2023-11-06 21:57:47,035 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-06 21:57:47,036 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1798927247] [2023-11-06 21:57:47,036 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 21:57:47,036 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-06 21:57:47,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-06 21:57:47,071 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-06 21:57:47,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-06 21:57:47,091 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-06 21:57:47,093 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-11-06 21:57:47,093 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2023-11-06 21:57:47,093 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-06 21:57:47,094 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1549509259] [2023-11-06 21:57:47,094 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 21:57:47,094 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-06 21:57:47,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-06 21:57:47,152 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-06 21:57:47,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-06 21:57:47,181 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-06 21:57:47,799 INFO L210 LassoAnalysis]: Preferences: [2023-11-06 21:57:47,800 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-06 21:57:47,800 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-06 21:57:47,800 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-06 21:57:47,800 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2023-11-06 21:57:47,801 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-06 21:57:47,801 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-06 21:57:47,801 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-06 21:57:47,801 INFO L133 ssoRankerPreferences]: Filename of dumped script: array_mul_init.i_Iteration1_Lasso [2023-11-06 21:57:47,801 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-06 21:57:47,802 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-06 21:57:47,828 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-06 21:57:47,839 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-06 21:57:47,842 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-06 21:57:47,849 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-06 21:57:47,853 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-06 21:57:48,245 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-06 21:57:48,248 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-06 21:57:48,251 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-06 21:57:48,254 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-06 21:57:48,257 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-06 21:57:48,259 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-06 21:57:48,263 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-06 21:57:48,265 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-06 21:57:48,268 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-06 21:57:48,581 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-06 21:57:48,586 INFO L490 LassoAnalysis]: Using template 'affine'. [2023-11-06 21:57:48,587 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-06 21:57:48,588 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 21:57:48,593 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-06 21:57:48,603 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2023-11-06 21:57:48,603 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-06 21:57:48,620 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-06 21:57:48,621 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-06 21:57:48,621 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-06 21:57:48,621 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-06 21:57:48,622 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-06 21:57:48,624 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-06 21:57:48,624 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-06 21:57:48,643 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-06 21:57:48,650 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2023-11-06 21:57:48,650 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-06 21:57:48,650 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 21:57:48,652 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-06 21:57:48,663 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-06 21:57:48,677 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-06 21:57:48,677 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-06 21:57:48,677 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-06 21:57:48,677 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-06 21:57:48,677 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-06 21:57:48,679 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2023-11-06 21:57:48,680 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-06 21:57:48,680 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-06 21:57:48,693 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-06 21:57:48,701 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2023-11-06 21:57:48,702 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-06 21:57:48,702 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 21:57:48,704 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-06 21:57:48,719 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-06 21:57:48,731 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-06 21:57:48,732 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-06 21:57:48,732 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-06 21:57:48,732 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-06 21:57:48,732 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-06 21:57:48,734 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-06 21:57:48,734 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-06 21:57:48,735 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2023-11-06 21:57:48,746 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-06 21:57:48,749 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2023-11-06 21:57:48,750 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-06 21:57:48,750 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 21:57:48,753 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-06 21:57:48,762 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2023-11-06 21:57:48,764 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-06 21:57:48,774 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-06 21:57:48,775 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-06 21:57:48,775 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-06 21:57:48,775 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-06 21:57:48,775 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-06 21:57:48,777 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-06 21:57:48,778 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-06 21:57:48,805 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-06 21:57:48,809 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2023-11-06 21:57:48,809 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-06 21:57:48,810 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 21:57:48,811 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-06 21:57:48,827 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-06 21:57:48,839 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-06 21:57:48,840 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-06 21:57:48,840 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-06 21:57:48,840 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-06 21:57:48,841 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2023-11-06 21:57:48,845 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-06 21:57:48,848 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-06 21:57:48,861 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-06 21:57:48,871 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2023-11-06 21:57:48,877 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-06 21:57:48,877 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 21:57:48,878 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-06 21:57:48,887 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-06 21:57:48,900 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-06 21:57:48,900 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-06 21:57:48,900 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-06 21:57:48,900 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-06 21:57:48,901 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2023-11-06 21:57:48,909 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-06 21:57:48,910 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-06 21:57:48,928 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-06 21:57:48,938 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2023-11-06 21:57:48,938 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-06 21:57:48,938 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 21:57:48,940 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-06 21:57:48,949 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2023-11-06 21:57:48,949 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-06 21:57:48,962 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-06 21:57:48,963 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-06 21:57:48,963 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-06 21:57:48,963 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-06 21:57:48,963 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-06 21:57:48,964 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-06 21:57:48,964 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-06 21:57:48,993 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-06 21:57:49,002 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2023-11-06 21:57:49,002 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-06 21:57:49,003 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 21:57:49,004 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-06 21:57:49,007 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2023-11-06 21:57:49,008 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-06 21:57:49,021 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-06 21:57:49,021 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-06 21:57:49,021 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-06 21:57:49,021 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-06 21:57:49,029 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-06 21:57:49,029 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-06 21:57:49,045 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-06 21:57:49,056 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2023-11-06 21:57:49,056 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-06 21:57:49,056 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 21:57:49,058 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-06 21:57:49,071 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-06 21:57:49,084 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2023-11-06 21:57:49,084 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-06 21:57:49,084 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-06 21:57:49,084 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-06 21:57:49,085 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-06 21:57:49,093 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-06 21:57:49,093 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-06 21:57:49,113 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-06 21:57:49,121 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Forceful destruction successful, exit code 0 [2023-11-06 21:57:49,122 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-06 21:57:49,122 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 21:57:49,123 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-06 21:57:49,127 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2023-11-06 21:57:49,128 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-06 21:57:49,143 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-06 21:57:49,143 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-06 21:57:49,143 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-06 21:57:49,143 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-06 21:57:49,147 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-06 21:57:49,147 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-06 21:57:49,165 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-06 21:57:49,172 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Forceful destruction successful, exit code 0 [2023-11-06 21:57:49,173 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-06 21:57:49,173 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 21:57:49,174 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-06 21:57:49,187 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-06 21:57:49,199 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-06 21:57:49,199 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-06 21:57:49,199 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-06 21:57:49,199 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-06 21:57:49,204 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2023-11-06 21:57:49,205 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-06 21:57:49,205 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-06 21:57:49,216 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-06 21:57:49,225 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Forceful destruction successful, exit code 0 [2023-11-06 21:57:49,226 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-06 21:57:49,226 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 21:57:49,227 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-06 21:57:49,235 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2023-11-06 21:57:49,235 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-06 21:57:49,246 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-06 21:57:49,247 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-06 21:57:49,247 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-06 21:57:49,247 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-06 21:57:49,249 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-06 21:57:49,250 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-06 21:57:49,261 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-06 21:57:49,269 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Forceful destruction successful, exit code 0 [2023-11-06 21:57:49,273 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-06 21:57:49,274 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 21:57:49,275 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-06 21:57:49,277 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2023-11-06 21:57:49,278 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-06 21:57:49,291 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-06 21:57:49,291 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-06 21:57:49,291 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-06 21:57:49,292 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-06 21:57:49,294 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-06 21:57:49,294 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-06 21:57:49,313 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-06 21:57:49,322 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Forceful destruction successful, exit code 0 [2023-11-06 21:57:49,322 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-06 21:57:49,322 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 21:57:49,324 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-06 21:57:49,330 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Waiting until timeout for monitored process [2023-11-06 21:57:49,330 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-06 21:57:49,346 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-06 21:57:49,346 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-06 21:57:49,346 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-06 21:57:49,346 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-06 21:57:49,351 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-06 21:57:49,352 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-06 21:57:49,377 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-06 21:57:49,386 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Forceful destruction successful, exit code 0 [2023-11-06 21:57:49,387 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-06 21:57:49,387 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 21:57:49,395 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-06 21:57:49,398 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Waiting until timeout for monitored process [2023-11-06 21:57:49,399 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-06 21:57:49,413 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-06 21:57:49,413 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-06 21:57:49,413 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-06 21:57:49,413 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-06 21:57:49,425 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-06 21:57:49,426 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-06 21:57:49,444 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2023-11-06 21:57:49,516 INFO L443 ModelExtractionUtils]: Simplification made 20 calls to the SMT solver. [2023-11-06 21:57:49,516 INFO L444 ModelExtractionUtils]: 0 out of 19 variables were initially zero. Simplification set additionally 16 variables to zero. [2023-11-06 21:57:49,518 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-06 21:57:49,518 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 21:57:49,546 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-06 21:57:49,550 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2023-11-06 21:57:49,564 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Waiting until timeout for monitored process [2023-11-06 21:57:49,584 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2023-11-06 21:57:49,584 INFO L513 LassoAnalysis]: Proved termination. [2023-11-06 21:57:49,585 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select #length ULTIMATE.start_main_~#a~0#1.base)_1, ULTIMATE.start_main_~i~0#1) = 199999*v_rep(select #length ULTIMATE.start_main_~#a~0#1.base)_1 - 8*ULTIMATE.start_main_~i~0#1 Supporting invariants [] [2023-11-06 21:57:49,594 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Forceful destruction successful, exit code 0 [2023-11-06 21:57:49,646 INFO L156 tatePredicateManager]: 11 out of 11 supporting invariants were superfluous and have been removed [2023-11-06 21:57:49,657 WARN L1553 BoogieBacktranslator]: Unfinished Backtranslation: ArrayAccessExpression #length[~#a~0!base] could not be translated [2023-11-06 21:57:49,683 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-11-06 21:57:49,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-06 21:57:49,716 INFO L262 TraceCheckSpWp]: Trace formula consists of 41 conjuncts, 2 conjunts are in the unsatisfiable core [2023-11-06 21:57:49,718 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-06 21:57:49,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-06 21:57:49,739 INFO L262 TraceCheckSpWp]: Trace formula consists of 20 conjuncts, 6 conjunts are in the unsatisfiable core [2023-11-06 21:57:49,740 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-06 21:57:49,784 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-06 21:57:49,836 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2023-11-06 21:57:49,838 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 22 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-06 21:57:49,907 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 22 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 43 states and 63 transitions. Complement of second has 8 states. [2023-11-06 21:57:49,910 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2023-11-06 21:57:49,915 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-06 21:57:49,916 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 31 transitions. [2023-11-06 21:57:49,917 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 31 transitions. Stem has 2 letters. Loop has 2 letters. [2023-11-06 21:57:49,918 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-06 21:57:49,918 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 31 transitions. Stem has 4 letters. Loop has 2 letters. [2023-11-06 21:57:49,921 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-06 21:57:49,922 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 31 transitions. Stem has 2 letters. Loop has 4 letters. [2023-11-06 21:57:49,922 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-06 21:57:49,923 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 43 states and 63 transitions. [2023-11-06 21:57:49,931 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-06 21:57:49,937 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 43 states to 19 states and 27 transitions. [2023-11-06 21:57:49,938 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 16 [2023-11-06 21:57:49,938 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2023-11-06 21:57:49,939 INFO L73 IsDeterministic]: Start isDeterministic. Operand 19 states and 27 transitions. [2023-11-06 21:57:49,939 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-06 21:57:49,939 INFO L218 hiAutomatonCegarLoop]: Abstraction has 19 states and 27 transitions. [2023-11-06 21:57:49,960 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states and 27 transitions. [2023-11-06 21:57:49,970 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2023-11-06 21:57:49,971 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.4210526315789473) internal successors, (27), 18 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-06 21:57:49,973 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 27 transitions. [2023-11-06 21:57:49,974 INFO L240 hiAutomatonCegarLoop]: Abstraction has 19 states and 27 transitions. [2023-11-06 21:57:49,974 INFO L428 stractBuchiCegarLoop]: Abstraction has 19 states and 27 transitions. [2023-11-06 21:57:49,975 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-06 21:57:49,975 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 19 states and 27 transitions. [2023-11-06 21:57:49,976 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-06 21:57:49,976 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-06 21:57:49,976 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-06 21:57:49,976 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2023-11-06 21:57:49,976 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-06 21:57:49,977 INFO L748 eck$LassoCheckResult]: Stem: 166#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(17, 2); 157#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post1#1, main_#t~nondet3#1, main_#t~nondet4#1, main_#t~post2#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem10#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~short11#1, main_#t~post5#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~#b~0#1.base, main_~#b~0#1.offset, main_~k~0#1, main_~i~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~k~0#1;havoc main_~i~0#1;main_~i~0#1 := 0; 152#L21-3 assume !(main_~i~0#1 < 100000); 153#L21-4 main_~i~0#1 := 0; 164#L26-3 [2023-11-06 21:57:49,977 INFO L750 eck$LassoCheckResult]: Loop: 164#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 165#L28 assume 0 != main_#t~nondet3#1;havoc main_#t~nondet3#1;havoc main_#t~nondet4#1;main_~k~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;call write~int(main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~k~0#1 * main_~k~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 163#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 164#L26-3 [2023-11-06 21:57:49,982 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-11-06 21:57:49,982 INFO L85 PathProgramCache]: Analyzing trace with hash 925707, now seen corresponding path program 1 times [2023-11-06 21:57:49,982 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-06 21:57:49,984 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1675604730] [2023-11-06 21:57:49,984 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 21:57:49,984 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-06 21:57:49,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-06 21:57:50,077 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-06 21:57:50,077 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-06 21:57:50,077 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1675604730] [2023-11-06 21:57:50,078 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1675604730] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-06 21:57:50,078 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-06 21:57:50,078 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-06 21:57:50,079 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1208638744] [2023-11-06 21:57:50,080 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-06 21:57:50,082 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-06 21:57:50,083 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-11-06 21:57:50,083 INFO L85 PathProgramCache]: Analyzing trace with hash 53723, now seen corresponding path program 1 times [2023-11-06 21:57:50,083 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-06 21:57:50,083 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [783740222] [2023-11-06 21:57:50,083 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 21:57:50,084 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-06 21:57:50,091 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-06 21:57:50,092 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1737414047] [2023-11-06 21:57:50,092 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 21:57:50,093 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-06 21:57:50,093 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 21:57:50,094 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-06 21:57:50,114 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2023-11-06 21:57:50,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-06 21:57:50,165 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-06 21:57:50,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-06 21:57:50,175 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-06 21:57:50,307 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-06 21:57:50,309 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-11-06 21:57:50,310 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-11-06 21:57:50,311 INFO L87 Difference]: Start difference. First operand 19 states and 27 transitions. cyclomatic complexity: 11 Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-06 21:57:50,363 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-06 21:57:50,363 INFO L93 Difference]: Finished difference Result 30 states and 36 transitions. [2023-11-06 21:57:50,363 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 30 states and 36 transitions. [2023-11-06 21:57:50,365 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2023-11-06 21:57:50,366 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 30 states to 26 states and 32 transitions. [2023-11-06 21:57:50,366 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 23 [2023-11-06 21:57:50,367 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 23 [2023-11-06 21:57:50,367 INFO L73 IsDeterministic]: Start isDeterministic. Operand 26 states and 32 transitions. [2023-11-06 21:57:50,367 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-06 21:57:50,367 INFO L218 hiAutomatonCegarLoop]: Abstraction has 26 states and 32 transitions. [2023-11-06 21:57:50,368 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states and 32 transitions. [2023-11-06 21:57:50,369 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 17. [2023-11-06 21:57:50,370 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 1.2352941176470589) internal successors, (21), 16 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-06 21:57:50,371 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 21 transitions. [2023-11-06 21:57:50,371 INFO L240 hiAutomatonCegarLoop]: Abstraction has 17 states and 21 transitions. [2023-11-06 21:57:50,372 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-11-06 21:57:50,373 INFO L428 stractBuchiCegarLoop]: Abstraction has 17 states and 21 transitions. [2023-11-06 21:57:50,373 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-06 21:57:50,373 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 17 states and 21 transitions. [2023-11-06 21:57:50,374 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2023-11-06 21:57:50,374 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-06 21:57:50,374 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-06 21:57:50,375 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2023-11-06 21:57:50,375 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-06 21:57:50,375 INFO L748 eck$LassoCheckResult]: Stem: 218#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(17, 2); 211#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post1#1, main_#t~nondet3#1, main_#t~nondet4#1, main_#t~post2#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem10#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~short11#1, main_#t~post5#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~#b~0#1.base, main_~#b~0#1.offset, main_~k~0#1, main_~i~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~k~0#1;havoc main_~i~0#1;main_~i~0#1 := 0; 205#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 206#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 207#L21-3 assume !(main_~i~0#1 < 100000); 208#L21-4 main_~i~0#1 := 0; 219#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 217#L28 [2023-11-06 21:57:50,378 INFO L750 eck$LassoCheckResult]: Loop: 217#L28 assume 0 != main_#t~nondet3#1;havoc main_#t~nondet3#1;havoc main_#t~nondet4#1;main_~k~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;call write~int(main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~k~0#1 * main_~k~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 214#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 215#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 217#L28 [2023-11-06 21:57:50,378 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-11-06 21:57:50,378 INFO L85 PathProgramCache]: Analyzing trace with hash 1809669547, now seen corresponding path program 1 times [2023-11-06 21:57:50,379 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-06 21:57:50,379 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [518688184] [2023-11-06 21:57:50,379 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 21:57:50,379 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-06 21:57:50,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-06 21:57:50,454 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-06 21:57:50,454 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-06 21:57:50,454 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [518688184] [2023-11-06 21:57:50,454 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [518688184] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-06 21:57:50,455 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [280073788] [2023-11-06 21:57:50,455 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 21:57:50,455 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-06 21:57:50,455 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 21:57:50,459 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-06 21:57:50,481 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2023-11-06 21:57:50,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-06 21:57:50,531 INFO L262 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-06 21:57:50,533 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-06 21:57:50,549 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-06 21:57:50,549 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-06 21:57:50,577 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-06 21:57:50,578 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [280073788] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-06 21:57:50,578 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-06 21:57:50,578 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2023-11-06 21:57:50,579 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1342708906] [2023-11-06 21:57:50,579 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-06 21:57:50,579 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-06 21:57:50,591 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-11-06 21:57:50,591 INFO L85 PathProgramCache]: Analyzing trace with hash 56723, now seen corresponding path program 2 times [2023-11-06 21:57:50,591 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-06 21:57:50,591 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1381789341] [2023-11-06 21:57:50,592 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 21:57:50,592 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-06 21:57:50,601 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-06 21:57:50,606 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1461309906] [2023-11-06 21:57:50,606 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2023-11-06 21:57:50,606 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-06 21:57:50,607 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 21:57:50,611 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-06 21:57:50,647 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2023-11-06 21:57:50,682 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2023-11-06 21:57:50,682 INFO L229 tOrderPrioritization]: Conjunction of SSA is sat [2023-11-06 21:57:50,682 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-06 21:57:50,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-06 21:57:50,693 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-06 21:57:50,835 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-06 21:57:50,835 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-06 21:57:50,835 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2023-11-06 21:57:50,836 INFO L87 Difference]: Start difference. First operand 17 states and 21 transitions. cyclomatic complexity: 7 Second operand has 7 states, 7 states have (on average 2.0) internal successors, (14), 7 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-06 21:57:50,984 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-06 21:57:50,984 INFO L93 Difference]: Finished difference Result 51 states and 61 transitions. [2023-11-06 21:57:50,984 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 61 transitions. [2023-11-06 21:57:50,986 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2023-11-06 21:57:50,988 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 51 states and 61 transitions. [2023-11-06 21:57:50,988 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 43 [2023-11-06 21:57:50,988 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 43 [2023-11-06 21:57:50,988 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 61 transitions. [2023-11-06 21:57:50,989 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-06 21:57:50,989 INFO L218 hiAutomatonCegarLoop]: Abstraction has 51 states and 61 transitions. [2023-11-06 21:57:50,989 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 61 transitions. [2023-11-06 21:57:50,992 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 32. [2023-11-06 21:57:50,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 32 states have (on average 1.21875) internal successors, (39), 31 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-06 21:57:50,993 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 39 transitions. [2023-11-06 21:57:50,993 INFO L240 hiAutomatonCegarLoop]: Abstraction has 32 states and 39 transitions. [2023-11-06 21:57:50,994 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2023-11-06 21:57:50,995 INFO L428 stractBuchiCegarLoop]: Abstraction has 32 states and 39 transitions. [2023-11-06 21:57:50,995 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-06 21:57:50,995 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 32 states and 39 transitions. [2023-11-06 21:57:50,996 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2023-11-06 21:57:50,996 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-06 21:57:50,996 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-06 21:57:50,997 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 4, 3, 3, 1, 1, 1, 1] [2023-11-06 21:57:50,997 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-06 21:57:50,998 INFO L748 eck$LassoCheckResult]: Stem: 332#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(17, 2); 325#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post1#1, main_#t~nondet3#1, main_#t~nondet4#1, main_#t~post2#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem10#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~short11#1, main_#t~post5#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~#b~0#1.base, main_~#b~0#1.offset, main_~k~0#1, main_~i~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~k~0#1;havoc main_~i~0#1;main_~i~0#1 := 0; 317#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 318#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 319#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 320#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 344#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 342#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 340#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 338#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 337#L21-3 assume !(main_~i~0#1 < 100000); 333#L21-4 main_~i~0#1 := 0; 334#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 331#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 328#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 329#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 348#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 347#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 346#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 345#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 343#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 341#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 336#L28 [2023-11-06 21:57:50,998 INFO L750 eck$LassoCheckResult]: Loop: 336#L28 assume 0 != main_#t~nondet3#1;havoc main_#t~nondet3#1;havoc main_#t~nondet4#1;main_~k~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;call write~int(main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~k~0#1 * main_~k~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 339#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 335#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 336#L28 [2023-11-06 21:57:50,999 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-11-06 21:57:50,999 INFO L85 PathProgramCache]: Analyzing trace with hash -1950889807, now seen corresponding path program 1 times [2023-11-06 21:57:50,999 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-06 21:57:50,999 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1117196737] [2023-11-06 21:57:50,999 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 21:57:51,000 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-06 21:57:51,049 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Forceful destruction successful, exit code 0 [2023-11-06 21:57:51,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-06 21:57:51,309 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2023-11-06 21:57:51,310 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-06 21:57:51,310 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1117196737] [2023-11-06 21:57:51,310 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1117196737] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-06 21:57:51,311 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [590645937] [2023-11-06 21:57:51,311 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 21:57:51,311 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-06 21:57:51,311 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 21:57:51,312 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-06 21:57:51,331 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2023-11-06 21:57:51,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-06 21:57:51,396 INFO L262 TraceCheckSpWp]: Trace formula consists of 132 conjuncts, 6 conjunts are in the unsatisfiable core [2023-11-06 21:57:51,398 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-06 21:57:51,436 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2023-11-06 21:57:51,436 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-06 21:57:51,515 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2023-11-06 21:57:51,515 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [590645937] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-06 21:57:51,516 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-06 21:57:51,516 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2023-11-06 21:57:51,516 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [863499816] [2023-11-06 21:57:51,516 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-06 21:57:51,517 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-06 21:57:51,517 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-11-06 21:57:51,517 INFO L85 PathProgramCache]: Analyzing trace with hash 56723, now seen corresponding path program 3 times [2023-11-06 21:57:51,517 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-06 21:57:51,518 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [931858205] [2023-11-06 21:57:51,518 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 21:57:51,518 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-06 21:57:51,522 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-06 21:57:51,523 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [341051207] [2023-11-06 21:57:51,523 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-06 21:57:51,523 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-06 21:57:51,523 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 21:57:51,529 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-06 21:57:51,561 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2023-11-06 21:57:51,607 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2023-11-06 21:57:51,607 INFO L229 tOrderPrioritization]: Conjunction of SSA is sat [2023-11-06 21:57:51,607 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-06 21:57:51,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-06 21:57:51,615 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-06 21:57:51,738 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-06 21:57:51,739 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2023-11-06 21:57:51,739 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2023-11-06 21:57:51,739 INFO L87 Difference]: Start difference. First operand 32 states and 39 transitions. cyclomatic complexity: 10 Second operand has 13 states, 13 states have (on average 2.1538461538461537) internal successors, (28), 13 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-06 21:57:52,028 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-06 21:57:52,028 INFO L93 Difference]: Finished difference Result 117 states and 139 transitions. [2023-11-06 21:57:52,028 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 117 states and 139 transitions. [2023-11-06 21:57:52,032 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2023-11-06 21:57:52,034 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 117 states to 117 states and 139 transitions. [2023-11-06 21:57:52,034 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 97 [2023-11-06 21:57:52,035 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 97 [2023-11-06 21:57:52,035 INFO L73 IsDeterministic]: Start isDeterministic. Operand 117 states and 139 transitions. [2023-11-06 21:57:52,036 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-06 21:57:52,036 INFO L218 hiAutomatonCegarLoop]: Abstraction has 117 states and 139 transitions. [2023-11-06 21:57:52,037 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states and 139 transitions. [2023-11-06 21:57:52,044 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 62. [2023-11-06 21:57:52,044 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 62 states, 62 states have (on average 1.2096774193548387) internal successors, (75), 61 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-06 21:57:52,047 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 75 transitions. [2023-11-06 21:57:52,047 INFO L240 hiAutomatonCegarLoop]: Abstraction has 62 states and 75 transitions. [2023-11-06 21:57:52,048 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2023-11-06 21:57:52,049 INFO L428 stractBuchiCegarLoop]: Abstraction has 62 states and 75 transitions. [2023-11-06 21:57:52,049 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2023-11-06 21:57:52,049 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 62 states and 75 transitions. [2023-11-06 21:57:52,051 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2023-11-06 21:57:52,051 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-06 21:57:52,051 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-06 21:57:52,057 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 10, 9, 9, 1, 1, 1, 1] [2023-11-06 21:57:52,057 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-06 21:57:52,057 INFO L748 eck$LassoCheckResult]: Stem: 624#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(17, 2); 616#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post1#1, main_#t~nondet3#1, main_#t~nondet4#1, main_#t~post2#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem10#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~short11#1, main_#t~post5#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~#b~0#1.base, main_~#b~0#1.offset, main_~k~0#1, main_~i~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~k~0#1;havoc main_~i~0#1;main_~i~0#1 := 0; 608#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 609#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 610#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 611#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 661#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 659#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 657#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 655#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 653#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 651#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 649#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 647#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 645#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 643#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 641#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 639#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 637#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 635#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 633#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 631#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 630#L21-3 assume !(main_~i~0#1 < 100000); 625#L21-4 main_~i~0#1 := 0; 626#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 627#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 619#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 620#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 622#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 623#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 669#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 668#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 667#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 666#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 665#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 664#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 663#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 662#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 660#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 658#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 656#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 654#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 652#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 650#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 648#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 646#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 644#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 642#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 640#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 638#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 636#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 634#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 629#L28 [2023-11-06 21:57:52,057 INFO L750 eck$LassoCheckResult]: Loop: 629#L28 assume 0 != main_#t~nondet3#1;havoc main_#t~nondet3#1;havoc main_#t~nondet4#1;main_~k~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;call write~int(main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~k~0#1 * main_~k~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 632#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 628#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 629#L28 [2023-11-06 21:57:52,058 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-11-06 21:57:52,058 INFO L85 PathProgramCache]: Analyzing trace with hash 403223997, now seen corresponding path program 2 times [2023-11-06 21:57:52,058 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-06 21:57:52,058 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1490525674] [2023-11-06 21:57:52,058 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 21:57:52,059 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-06 21:57:52,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-06 21:57:52,598 INFO L134 CoverageAnalysis]: Checked inductivity of 217 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 117 trivial. 0 not checked. [2023-11-06 21:57:52,598 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-06 21:57:52,598 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1490525674] [2023-11-06 21:57:52,599 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1490525674] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-06 21:57:52,599 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1004851371] [2023-11-06 21:57:52,599 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2023-11-06 21:57:52,599 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-06 21:57:52,599 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 21:57:52,603 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-06 21:57:52,612 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2023-11-06 21:57:52,738 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2023-11-06 21:57:52,739 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-06 21:57:52,740 INFO L262 TraceCheckSpWp]: Trace formula consists of 270 conjuncts, 12 conjunts are in the unsatisfiable core [2023-11-06 21:57:52,744 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-06 21:57:52,818 INFO L134 CoverageAnalysis]: Checked inductivity of 217 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 117 trivial. 0 not checked. [2023-11-06 21:57:52,818 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-06 21:57:53,070 INFO L134 CoverageAnalysis]: Checked inductivity of 217 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 117 trivial. 0 not checked. [2023-11-06 21:57:53,071 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1004851371] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-06 21:57:53,071 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-06 21:57:53,071 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 25 [2023-11-06 21:57:53,075 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [107016788] [2023-11-06 21:57:53,075 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-06 21:57:53,077 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-06 21:57:53,077 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-11-06 21:57:53,077 INFO L85 PathProgramCache]: Analyzing trace with hash 56723, now seen corresponding path program 4 times [2023-11-06 21:57:53,077 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-06 21:57:53,082 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1546393608] [2023-11-06 21:57:53,083 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 21:57:53,083 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-06 21:57:53,089 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-06 21:57:53,089 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [563386756] [2023-11-06 21:57:53,089 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2023-11-06 21:57:53,090 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-06 21:57:53,090 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 21:57:53,097 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-06 21:57:53,115 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2023-11-06 21:57:53,159 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2023-11-06 21:57:53,159 INFO L229 tOrderPrioritization]: Conjunction of SSA is sat [2023-11-06 21:57:53,159 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-06 21:57:53,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-06 21:57:53,168 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-06 21:57:53,283 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-06 21:57:53,283 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2023-11-06 21:57:53,284 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2023-11-06 21:57:53,284 INFO L87 Difference]: Start difference. First operand 62 states and 75 transitions. cyclomatic complexity: 16 Second operand has 25 states, 25 states have (on average 2.08) internal successors, (52), 25 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-06 21:57:53,849 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-06 21:57:53,849 INFO L93 Difference]: Finished difference Result 249 states and 295 transitions. [2023-11-06 21:57:53,849 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 249 states and 295 transitions. [2023-11-06 21:57:53,857 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2023-11-06 21:57:53,864 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 249 states to 249 states and 295 transitions. [2023-11-06 21:57:53,864 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 205 [2023-11-06 21:57:53,866 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 205 [2023-11-06 21:57:53,866 INFO L73 IsDeterministic]: Start isDeterministic. Operand 249 states and 295 transitions. [2023-11-06 21:57:53,871 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-06 21:57:53,873 INFO L218 hiAutomatonCegarLoop]: Abstraction has 249 states and 295 transitions. [2023-11-06 21:57:53,874 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 249 states and 295 transitions. [2023-11-06 21:57:53,885 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 249 to 122. [2023-11-06 21:57:53,891 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 122 states, 122 states have (on average 1.2049180327868851) internal successors, (147), 121 states have internal predecessors, (147), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-06 21:57:53,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 147 transitions. [2023-11-06 21:57:53,897 INFO L240 hiAutomatonCegarLoop]: Abstraction has 122 states and 147 transitions. [2023-11-06 21:57:53,898 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2023-11-06 21:57:53,899 INFO L428 stractBuchiCegarLoop]: Abstraction has 122 states and 147 transitions. [2023-11-06 21:57:53,900 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2023-11-06 21:57:53,900 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 122 states and 147 transitions. [2023-11-06 21:57:53,903 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2023-11-06 21:57:53,903 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-06 21:57:53,903 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-06 21:57:53,908 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [22, 22, 22, 21, 21, 1, 1, 1, 1] [2023-11-06 21:57:53,911 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-06 21:57:53,913 INFO L748 eck$LassoCheckResult]: Stem: 1269#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(17, 2); 1261#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post1#1, main_#t~nondet3#1, main_#t~nondet4#1, main_#t~post2#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem10#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~short11#1, main_#t~post5#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~#b~0#1.base, main_~#b~0#1.offset, main_~k~0#1, main_~i~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~k~0#1;havoc main_~i~0#1;main_~i~0#1 := 0; 1253#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1254#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1255#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1256#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1354#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1352#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1350#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1348#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1346#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1344#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1342#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1340#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1338#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1336#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1334#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1332#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1330#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1328#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1326#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1324#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1322#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1320#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1318#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1316#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1314#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1312#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1310#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1308#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1306#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1304#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1302#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1300#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1298#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1296#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1294#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1292#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1290#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1288#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1286#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1284#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1282#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1280#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1278#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1276#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1275#L21-3 assume !(main_~i~0#1 < 100000); 1270#L21-4 main_~i~0#1 := 0; 1271#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1272#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1264#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1265#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1267#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1268#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1374#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1373#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1372#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1371#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1370#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1369#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1368#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1367#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1366#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1365#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1364#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1363#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1362#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1361#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1360#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1359#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1358#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1357#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1356#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1355#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1353#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1351#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1349#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1347#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1345#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1343#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1341#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1339#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1337#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1335#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1333#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1331#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1329#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1327#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1325#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1323#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1321#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1319#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1317#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1315#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1313#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1311#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1309#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1307#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1305#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1303#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1301#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1299#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1297#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1295#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1293#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1291#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1289#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1287#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1285#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1283#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1281#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1279#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1274#L28 [2023-11-06 21:57:53,917 INFO L750 eck$LassoCheckResult]: Loop: 1274#L28 assume 0 != main_#t~nondet3#1;havoc main_#t~nondet3#1;havoc main_#t~nondet4#1;main_~k~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;call write~int(main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~k~0#1 * main_~k~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1277#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1273#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1274#L28 [2023-11-06 21:57:53,917 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-11-06 21:57:53,917 INFO L85 PathProgramCache]: Analyzing trace with hash 615339989, now seen corresponding path program 3 times [2023-11-06 21:57:53,918 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-06 21:57:53,918 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1460868856] [2023-11-06 21:57:53,918 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 21:57:53,918 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-06 21:57:54,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-06 21:57:55,253 INFO L134 CoverageAnalysis]: Checked inductivity of 1135 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 651 trivial. 0 not checked. [2023-11-06 21:57:55,253 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-06 21:57:55,253 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1460868856] [2023-11-06 21:57:55,253 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1460868856] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-06 21:57:55,253 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [211392233] [2023-11-06 21:57:55,253 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-06 21:57:55,254 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-06 21:57:55,254 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 21:57:55,261 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-06 21:57:55,281 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2023-11-06 21:58:05,570 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 23 check-sat command(s) [2023-11-06 21:58:05,570 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-06 21:58:05,578 INFO L262 TraceCheckSpWp]: Trace formula consists of 546 conjuncts, 24 conjunts are in the unsatisfiable core [2023-11-06 21:58:05,589 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-06 21:58:05,725 INFO L134 CoverageAnalysis]: Checked inductivity of 1135 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 651 trivial. 0 not checked. [2023-11-06 21:58:05,725 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-06 21:58:06,830 INFO L134 CoverageAnalysis]: Checked inductivity of 1135 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 651 trivial. 0 not checked. [2023-11-06 21:58:06,831 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [211392233] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-06 21:58:06,831 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-06 21:58:06,831 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25] total 49 [2023-11-06 21:58:06,831 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1396524178] [2023-11-06 21:58:06,832 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-06 21:58:06,832 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-06 21:58:06,833 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-11-06 21:58:06,833 INFO L85 PathProgramCache]: Analyzing trace with hash 56723, now seen corresponding path program 5 times [2023-11-06 21:58:06,833 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-06 21:58:06,833 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [907627611] [2023-11-06 21:58:06,833 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 21:58:06,833 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-06 21:58:06,841 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-06 21:58:06,842 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1526987131] [2023-11-06 21:58:06,842 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-06 21:58:06,842 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-06 21:58:06,842 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 21:58:06,846 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-06 21:58:06,869 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2023-11-06 21:58:06,930 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2023-11-06 21:58:06,930 INFO L229 tOrderPrioritization]: Conjunction of SSA is sat [2023-11-06 21:58:06,930 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-06 21:58:06,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-06 21:58:06,939 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-06 21:58:07,084 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-06 21:58:07,085 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2023-11-06 21:58:07,087 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2023-11-06 21:58:07,087 INFO L87 Difference]: Start difference. First operand 122 states and 147 transitions. cyclomatic complexity: 28 Second operand has 49 states, 49 states have (on average 2.0408163265306123) internal successors, (100), 49 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-06 21:58:08,645 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-06 21:58:08,645 INFO L93 Difference]: Finished difference Result 513 states and 607 transitions. [2023-11-06 21:58:08,646 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 513 states and 607 transitions. [2023-11-06 21:58:08,652 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2023-11-06 21:58:08,656 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 513 states to 513 states and 607 transitions. [2023-11-06 21:58:08,657 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 421 [2023-11-06 21:58:08,657 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 421 [2023-11-06 21:58:08,657 INFO L73 IsDeterministic]: Start isDeterministic. Operand 513 states and 607 transitions. [2023-11-06 21:58:08,659 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-06 21:58:08,660 INFO L218 hiAutomatonCegarLoop]: Abstraction has 513 states and 607 transitions. [2023-11-06 21:58:08,661 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 513 states and 607 transitions. [2023-11-06 21:58:08,677 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 513 to 242. [2023-11-06 21:58:08,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 242 states, 242 states have (on average 1.2024793388429753) internal successors, (291), 241 states have internal predecessors, (291), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-06 21:58:08,680 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 242 states to 242 states and 291 transitions. [2023-11-06 21:58:08,680 INFO L240 hiAutomatonCegarLoop]: Abstraction has 242 states and 291 transitions. [2023-11-06 21:58:08,680 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2023-11-06 21:58:08,681 INFO L428 stractBuchiCegarLoop]: Abstraction has 242 states and 291 transitions. [2023-11-06 21:58:08,681 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2023-11-06 21:58:08,682 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 242 states and 291 transitions. [2023-11-06 21:58:08,684 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2023-11-06 21:58:08,684 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-06 21:58:08,684 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-06 21:58:08,689 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [46, 46, 46, 45, 45, 1, 1, 1, 1] [2023-11-06 21:58:08,689 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-06 21:58:08,690 INFO L748 eck$LassoCheckResult]: Stem: 2622#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(17, 2); 2614#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post1#1, main_#t~nondet3#1, main_#t~nondet4#1, main_#t~post2#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem10#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~short11#1, main_#t~post5#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~#b~0#1.base, main_~#b~0#1.offset, main_~k~0#1, main_~i~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~k~0#1;havoc main_~i~0#1;main_~i~0#1 := 0; 2606#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2607#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2608#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2609#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2803#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2801#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2799#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2797#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2795#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2793#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2791#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2789#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2787#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2785#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2783#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2781#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2779#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2777#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2775#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2773#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2771#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2769#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2767#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2765#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2763#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2761#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2759#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2757#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2755#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2753#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2751#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2749#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2747#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2745#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2743#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2741#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2739#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2737#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2735#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2733#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2731#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2729#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2727#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2725#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2723#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2721#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2719#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2717#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2715#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2713#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2711#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2709#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2707#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2705#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2703#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2701#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2699#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2697#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2695#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2693#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2691#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2689#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2687#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2685#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2683#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2681#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2679#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2677#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2675#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2673#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2671#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2669#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2667#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2665#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2663#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2661#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2659#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2657#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2655#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2653#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2651#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2649#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2647#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2645#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2643#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2641#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2639#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2637#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2635#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2633#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2631#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2629#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2628#L21-3 assume !(main_~i~0#1 < 100000); 2623#L21-4 main_~i~0#1 := 0; 2624#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2625#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2617#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2618#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2620#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2621#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2847#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2846#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2845#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2844#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2843#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2842#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2841#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2840#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2839#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2838#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2837#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2836#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2835#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2834#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2833#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2832#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2831#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2830#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2829#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2828#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2827#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2826#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2825#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2824#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2823#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2822#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2821#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2820#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2819#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2818#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2817#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2816#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2815#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2814#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2813#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2812#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2811#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2810#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2809#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2808#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2807#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2806#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2805#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2804#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2802#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2800#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2798#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2796#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2794#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2792#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2790#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2788#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2786#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2784#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2782#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2780#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2778#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2776#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2774#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2772#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2770#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2768#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2766#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2764#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2762#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2760#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2758#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2756#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2754#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2752#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2750#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2748#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2746#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2744#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2742#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2740#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2738#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2736#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2734#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2732#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2730#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2728#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2726#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2724#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2722#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2720#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2718#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2716#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2714#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2712#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2710#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2708#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2706#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2704#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2702#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2700#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2698#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2696#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2694#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2692#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2690#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2688#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2686#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2684#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2682#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2680#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2678#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2676#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2674#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2672#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2670#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2668#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2666#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2664#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2662#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2660#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2658#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2656#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2654#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2652#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2650#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2648#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2646#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2644#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2642#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2640#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2638#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2636#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2634#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2632#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2627#L28 [2023-11-06 21:58:08,691 INFO L750 eck$LassoCheckResult]: Loop: 2627#L28 assume 0 != main_#t~nondet3#1;havoc main_#t~nondet3#1;havoc main_#t~nondet4#1;main_~k~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;call write~int(main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~k~0#1 * main_~k~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2630#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2626#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2627#L28 [2023-11-06 21:58:08,691 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-11-06 21:58:08,691 INFO L85 PathProgramCache]: Analyzing trace with hash 982432773, now seen corresponding path program 4 times [2023-11-06 21:58:08,692 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-06 21:58:08,692 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1257909817] [2023-11-06 21:58:08,692 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 21:58:08,692 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-06 21:58:08,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-06 21:58:12,510 INFO L134 CoverageAnalysis]: Checked inductivity of 5131 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 3015 trivial. 0 not checked. [2023-11-06 21:58:12,512 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-06 21:58:12,512 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1257909817] [2023-11-06 21:58:12,512 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1257909817] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-06 21:58:12,512 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [237103025] [2023-11-06 21:58:12,512 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2023-11-06 21:58:12,512 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-06 21:58:12,512 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 21:58:12,515 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-06 21:58:12,516 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Waiting until timeout for monitored process [2023-11-06 21:58:12,887 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2023-11-06 21:58:12,887 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-06 21:58:12,895 INFO L262 TraceCheckSpWp]: Trace formula consists of 1098 conjuncts, 48 conjunts are in the unsatisfiable core [2023-11-06 21:58:12,907 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-06 21:58:13,140 INFO L134 CoverageAnalysis]: Checked inductivity of 5131 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 3015 trivial. 0 not checked. [2023-11-06 21:58:13,140 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-06 21:58:16,727 INFO L134 CoverageAnalysis]: Checked inductivity of 5131 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 3015 trivial. 0 not checked. [2023-11-06 21:58:16,728 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [237103025] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-06 21:58:16,728 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-06 21:58:16,728 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49, 49] total 97 [2023-11-06 21:58:16,728 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [67804798] [2023-11-06 21:58:16,728 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-06 21:58:16,729 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-06 21:58:16,730 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-11-06 21:58:16,730 INFO L85 PathProgramCache]: Analyzing trace with hash 56723, now seen corresponding path program 6 times [2023-11-06 21:58:16,730 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-06 21:58:16,730 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1017715462] [2023-11-06 21:58:16,730 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 21:58:16,730 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-06 21:58:16,735 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-06 21:58:16,735 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2007388300] [2023-11-06 21:58:16,735 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2023-11-06 21:58:16,736 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-06 21:58:16,736 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 21:58:16,745 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-06 21:58:16,761 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Waiting until timeout for monitored process [2023-11-06 21:58:16,834 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2023-11-06 21:58:16,834 INFO L229 tOrderPrioritization]: Conjunction of SSA is sat [2023-11-06 21:58:16,834 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-06 21:58:16,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-06 21:58:16,842 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-06 21:58:16,971 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-06 21:58:16,973 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 97 interpolants. [2023-11-06 21:58:16,978 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4656, Invalid=4656, Unknown=0, NotChecked=0, Total=9312 [2023-11-06 21:58:16,978 INFO L87 Difference]: Start difference. First operand 242 states and 291 transitions. cyclomatic complexity: 52 Second operand has 97 states, 97 states have (on average 2.020618556701031) internal successors, (196), 97 states have internal predecessors, (196), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-06 21:58:23,058 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-06 21:58:23,059 INFO L93 Difference]: Finished difference Result 1041 states and 1231 transitions. [2023-11-06 21:58:23,059 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1041 states and 1231 transitions. [2023-11-06 21:58:23,071 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2023-11-06 21:58:23,081 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1041 states to 1041 states and 1231 transitions. [2023-11-06 21:58:23,081 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 853 [2023-11-06 21:58:23,082 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 853 [2023-11-06 21:58:23,082 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1041 states and 1231 transitions. [2023-11-06 21:58:23,084 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-06 21:58:23,084 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1041 states and 1231 transitions. [2023-11-06 21:58:23,086 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1041 states and 1231 transitions. [2023-11-06 21:58:23,104 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1041 to 482. [2023-11-06 21:58:23,105 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 482 states, 482 states have (on average 1.2012448132780082) internal successors, (579), 481 states have internal predecessors, (579), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-06 21:58:23,108 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 482 states to 482 states and 579 transitions. [2023-11-06 21:58:23,108 INFO L240 hiAutomatonCegarLoop]: Abstraction has 482 states and 579 transitions. [2023-11-06 21:58:23,108 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2023-11-06 21:58:23,109 INFO L428 stractBuchiCegarLoop]: Abstraction has 482 states and 579 transitions. [2023-11-06 21:58:23,109 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2023-11-06 21:58:23,109 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 482 states and 579 transitions. [2023-11-06 21:58:23,114 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2023-11-06 21:58:23,114 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-06 21:58:23,115 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-06 21:58:23,129 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [94, 94, 94, 93, 93, 1, 1, 1, 1] [2023-11-06 21:58:23,129 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-06 21:58:23,130 INFO L748 eck$LassoCheckResult]: Stem: 5391#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(17, 2); 5383#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post1#1, main_#t~nondet3#1, main_#t~nondet4#1, main_#t~post2#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem10#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~short11#1, main_#t~post5#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~#b~0#1.base, main_~#b~0#1.offset, main_~k~0#1, main_~i~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~k~0#1;havoc main_~i~0#1;main_~i~0#1 := 0; 5375#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5376#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5377#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5378#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5764#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5762#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5760#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5758#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5756#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5754#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5752#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5750#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5748#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5746#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5744#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5742#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5740#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5738#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5736#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5734#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5732#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5730#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5728#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5726#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5724#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5722#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5720#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5718#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5716#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5714#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5712#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5710#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5708#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5706#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5704#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5702#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5700#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5698#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5696#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5694#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5692#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5690#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5688#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5686#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5684#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5682#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5680#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5678#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5676#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5674#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5672#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5670#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5668#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5666#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5664#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5662#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5660#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5658#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5656#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5654#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5652#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5650#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5648#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5646#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5644#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5642#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5640#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5638#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5636#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5634#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5632#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5630#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5628#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5626#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5624#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5622#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5620#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5618#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5616#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5614#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5612#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5610#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5608#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5606#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5604#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5602#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5600#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5598#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5596#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5594#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5592#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5590#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5588#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5586#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5584#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5582#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5580#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5578#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5576#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5574#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5572#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5570#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5568#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5566#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5564#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5562#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5560#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5558#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5556#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5554#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5552#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5550#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5548#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5546#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5544#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5542#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5540#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5538#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5536#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5534#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5532#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5530#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5528#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5526#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5524#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5522#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5520#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5518#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5516#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5514#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5512#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5510#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5508#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5506#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5504#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5502#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5500#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5498#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5496#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5494#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5492#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5490#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5488#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5486#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5484#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5482#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5480#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5478#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5476#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5474#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5472#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5470#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5468#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5466#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5464#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5462#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5460#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5458#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5456#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5454#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5452#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5450#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5448#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5446#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5444#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5442#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5440#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5438#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5436#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5434#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5432#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5430#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5428#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5426#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5424#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5422#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5420#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5418#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5416#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5414#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5412#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5410#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5408#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5406#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5404#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5402#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5400#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5398#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5397#L21-3 assume !(main_~i~0#1 < 100000); 5392#L21-4 main_~i~0#1 := 0; 5393#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5394#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5386#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5387#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5389#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5390#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5856#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5855#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5854#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5853#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5852#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5851#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5850#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5849#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5848#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5847#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5846#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5845#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5844#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5843#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5842#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5841#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5840#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5839#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5838#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5837#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5836#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5835#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5834#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5833#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5832#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5831#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5830#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5829#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5828#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5827#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5826#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5825#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5824#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5823#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5822#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5821#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5820#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5819#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5818#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5817#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5816#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5815#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5814#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5813#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5812#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5811#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5810#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5809#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5808#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5807#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5806#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5805#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5804#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5803#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5802#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5801#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5800#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5799#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5798#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5797#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5796#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5795#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5794#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5793#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5792#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5791#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5790#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5789#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5788#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5787#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5786#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5785#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5784#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5783#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5782#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5781#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5780#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5779#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5778#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5777#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5776#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5775#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5774#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5773#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5772#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5771#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5770#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5769#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5768#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5767#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5766#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5765#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5763#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5761#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5759#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5757#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5755#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5753#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5751#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5749#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5747#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5745#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5743#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5741#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5739#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5737#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5735#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5733#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5731#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5729#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5727#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5725#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5723#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5721#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5719#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5717#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5715#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5713#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5711#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5709#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5707#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5705#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5703#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5701#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5699#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5697#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5695#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5693#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5691#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5689#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5687#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5685#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5683#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5681#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5679#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5677#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5675#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5673#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5671#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5669#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5667#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5665#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5663#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5661#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5659#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5657#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5655#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5653#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5651#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5649#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5647#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5645#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5643#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5641#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5639#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5637#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5635#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5633#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5631#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5629#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5627#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5625#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5623#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5621#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5619#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5617#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5615#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5613#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5611#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5609#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5607#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5605#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5603#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5601#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5599#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5597#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5595#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5593#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5591#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5589#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5587#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5585#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5583#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5581#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5579#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5577#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5575#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5573#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5571#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5569#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5567#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5565#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5563#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5561#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5559#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5557#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5555#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5553#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5551#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5549#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5547#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5545#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5543#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5541#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5539#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5537#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5535#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5533#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5531#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5529#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5527#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5525#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5523#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5521#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5519#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5517#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5515#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5513#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5511#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5509#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5507#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5505#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5503#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5501#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5499#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5497#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5495#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5493#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5491#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5489#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5487#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5485#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5483#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5481#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5479#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5477#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5475#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5473#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5471#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5469#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5467#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5465#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5463#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5461#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5459#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5457#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5455#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5453#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5451#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5449#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5447#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5445#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5443#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5441#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5439#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5437#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5435#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5433#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5431#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5429#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5427#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5425#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5423#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5421#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5419#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5417#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5415#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5413#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5411#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5409#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5407#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5405#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5403#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5401#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5396#L28 [2023-11-06 21:58:23,131 INFO L750 eck$LassoCheckResult]: Loop: 5396#L28 assume 0 != main_#t~nondet3#1;havoc main_#t~nondet3#1;havoc main_#t~nondet4#1;main_~k~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;call write~int(main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~k~0#1 * main_~k~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5399#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5395#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5396#L28 [2023-11-06 21:58:23,132 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-11-06 21:58:23,132 INFO L85 PathProgramCache]: Analyzing trace with hash 1696203877, now seen corresponding path program 5 times [2023-11-06 21:58:23,132 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-06 21:58:23,133 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2098606303] [2023-11-06 21:58:23,133 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 21:58:23,133 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-06 21:58:23,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-06 21:58:34,413 INFO L134 CoverageAnalysis]: Checked inductivity of 21763 backedges. 0 proven. 8836 refuted. 0 times theorem prover too weak. 12927 trivial. 0 not checked. [2023-11-06 21:58:34,414 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-06 21:58:34,414 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2098606303] [2023-11-06 21:58:34,414 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2098606303] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-06 21:58:34,414 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1659214195] [2023-11-06 21:58:34,414 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-06 21:58:34,415 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-06 21:58:34,415 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 21:58:34,416 INFO L229 MonitoredProcess]: Starting monitored process 29 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-06 21:58:34,418 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e1eb90e-20e3-4c96-a873-6322700a6b39/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Waiting until timeout for monitored process