./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_BER_test7-1.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version e7bb482b Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_BER_test7-1.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 3d4f4fa5c64db6e2d1986e03259021eba4df8a22df3a334e78927feece513264 --- Real Ultimate output --- This is Ultimate 0.2.3-dev-e7bb482 [2023-11-06 22:46:31,195 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-06 22:46:31,338 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/config/svcomp-Termination-32bit-Automizer_Default.epf [2023-11-06 22:46:31,343 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-06 22:46:31,344 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-06 22:46:31,379 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-06 22:46:31,383 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-06 22:46:31,384 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-06 22:46:31,385 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-06 22:46:31,390 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-06 22:46:31,391 INFO L153 SettingsManager]: * Use SBE=true [2023-11-06 22:46:31,391 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-06 22:46:31,392 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-06 22:46:31,394 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-06 22:46:31,394 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-06 22:46:31,394 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-06 22:46:31,395 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-06 22:46:31,396 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-06 22:46:31,396 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-06 22:46:31,397 INFO L153 SettingsManager]: * sizeof long=4 [2023-11-06 22:46:31,397 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-06 22:46:31,398 INFO L153 SettingsManager]: * sizeof POINTER=4 [2023-11-06 22:46:31,398 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-06 22:46:31,399 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-06 22:46:31,399 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-06 22:46:31,400 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-06 22:46:31,400 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-06 22:46:31,401 INFO L153 SettingsManager]: * sizeof long double=12 [2023-11-06 22:46:31,401 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-06 22:46:31,402 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-06 22:46:31,403 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-06 22:46:31,403 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-06 22:46:31,404 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-06 22:46:31,404 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-06 22:46:31,404 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-06 22:46:31,405 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-06 22:46:31,405 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 3d4f4fa5c64db6e2d1986e03259021eba4df8a22df3a334e78927feece513264 [2023-11-06 22:46:31,722 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-06 22:46:31,752 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-06 22:46:31,755 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-06 22:46:31,756 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-06 22:46:31,757 INFO L274 PluginConnector]: CDTParser initialized [2023-11-06 22:46:31,758 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/../../sv-benchmarks/c/uthash-2.0.2/uthash_BER_test7-1.i [2023-11-06 22:46:34,735 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-06 22:46:35,178 INFO L384 CDTParser]: Found 1 translation units. [2023-11-06 22:46:35,179 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/sv-benchmarks/c/uthash-2.0.2/uthash_BER_test7-1.i [2023-11-06 22:46:35,212 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/data/46862bf75/8074c5715b5245899c8b17a0aed62f64/FLAGfd1b5de06 [2023-11-06 22:46:35,226 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/data/46862bf75/8074c5715b5245899c8b17a0aed62f64 [2023-11-06 22:46:35,229 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-06 22:46:35,231 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-06 22:46:35,232 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-06 22:46:35,233 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-06 22:46:35,239 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-06 22:46:35,240 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.11 10:46:35" (1/1) ... [2023-11-06 22:46:35,241 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@68832de0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.11 10:46:35, skipping insertion in model container [2023-11-06 22:46:35,241 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.11 10:46:35" (1/1) ... [2023-11-06 22:46:35,306 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-06 22:46:35,954 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-06 22:46:35,968 INFO L202 MainTranslator]: Completed pre-run [2023-11-06 22:46:36,082 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-06 22:46:36,126 WARN L672 CHandler]: The function memcmp is called, but not defined or handled by StandardFunctionHandler. [2023-11-06 22:46:36,161 INFO L206 MainTranslator]: Completed translation [2023-11-06 22:46:36,162 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.11 10:46:36 WrapperNode [2023-11-06 22:46:36,162 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-06 22:46:36,163 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-06 22:46:36,163 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-06 22:46:36,163 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-06 22:46:36,171 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.11 10:46:36" (1/1) ... [2023-11-06 22:46:36,251 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.11 10:46:36" (1/1) ... [2023-11-06 22:46:36,339 INFO L138 Inliner]: procedures = 176, calls = 280, calls flagged for inlining = 5, calls inlined = 4, statements flattened = 1335 [2023-11-06 22:46:36,340 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-06 22:46:36,341 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-06 22:46:36,341 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-06 22:46:36,341 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-06 22:46:36,351 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.11 10:46:36" (1/1) ... [2023-11-06 22:46:36,351 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.11 10:46:36" (1/1) ... [2023-11-06 22:46:36,365 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.11 10:46:36" (1/1) ... [2023-11-06 22:46:36,371 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.11 10:46:36" (1/1) ... [2023-11-06 22:46:36,472 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.11 10:46:36" (1/1) ... [2023-11-06 22:46:36,501 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.11 10:46:36" (1/1) ... [2023-11-06 22:46:36,509 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.11 10:46:36" (1/1) ... [2023-11-06 22:46:36,527 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.11 10:46:36" (1/1) ... [2023-11-06 22:46:36,542 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-06 22:46:36,543 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-06 22:46:36,543 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-06 22:46:36,543 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-06 22:46:36,544 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.11 10:46:36" (1/1) ... [2023-11-06 22:46:36,551 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-06 22:46:36,564 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 22:46:36,584 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-06 22:46:36,602 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-06 22:46:36,626 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2023-11-06 22:46:36,626 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2023-11-06 22:46:36,626 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2023-11-06 22:46:36,627 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2023-11-06 22:46:36,627 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2023-11-06 22:46:36,627 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2023-11-06 22:46:36,627 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2023-11-06 22:46:36,628 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2023-11-06 22:46:36,628 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp [2023-11-06 22:46:36,628 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2023-11-06 22:46:36,628 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-11-06 22:46:36,629 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2023-11-06 22:46:36,629 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-06 22:46:36,629 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-06 22:46:36,904 INFO L236 CfgBuilder]: Building ICFG [2023-11-06 22:46:36,906 INFO L262 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-06 22:46:36,911 WARN L818 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-06 22:46:38,938 INFO L277 CfgBuilder]: Performing block encoding [2023-11-06 22:46:38,950 INFO L297 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-06 22:46:38,950 INFO L302 CfgBuilder]: Removed 63 assume(true) statements. [2023-11-06 22:46:38,953 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.11 10:46:38 BoogieIcfgContainer [2023-11-06 22:46:38,953 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-06 22:46:38,954 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-06 22:46:38,955 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-06 22:46:38,959 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-06 22:46:38,960 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-06 22:46:38,960 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 06.11 10:46:35" (1/3) ... [2023-11-06 22:46:38,962 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@6c19ac76 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.11 10:46:38, skipping insertion in model container [2023-11-06 22:46:38,962 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-06 22:46:38,962 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.11 10:46:36" (2/3) ... [2023-11-06 22:46:38,963 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@6c19ac76 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.11 10:46:38, skipping insertion in model container [2023-11-06 22:46:38,963 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-06 22:46:38,963 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.11 10:46:38" (3/3) ... [2023-11-06 22:46:38,965 INFO L332 chiAutomizerObserver]: Analyzing ICFG uthash_BER_test7-1.i [2023-11-06 22:46:39,035 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-06 22:46:39,036 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-06 22:46:39,036 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-06 22:46:39,036 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-06 22:46:39,036 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-06 22:46:39,037 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-06 22:46:39,037 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-06 22:46:39,037 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-06 22:46:39,044 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 355 states, 350 states have (on average 1.6942857142857144) internal successors, (593), 350 states have internal predecessors, (593), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-06 22:46:39,095 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 343 [2023-11-06 22:46:39,095 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-06 22:46:39,095 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-06 22:46:39,104 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-06 22:46:39,104 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2023-11-06 22:46:39,104 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-06 22:46:39,106 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 355 states, 350 states have (on average 1.6942857142857144) internal successors, (593), 350 states have internal predecessors, (593), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-06 22:46:39,123 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 343 [2023-11-06 22:46:39,123 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-06 22:46:39,123 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-06 22:46:39,124 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-06 22:46:39,124 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2023-11-06 22:46:39,134 INFO L748 eck$LassoCheckResult]: Stem: 218#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 231#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 306#L715-4true [2023-11-06 22:46:39,134 INFO L750 eck$LassoCheckResult]: Loop: 306#L715-4true call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 287#L715-1true assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 41#L717true assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; 143#L717-2true call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 263#L722-269true assume !true; 86#L715-3true call main_#t~mem3#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 306#L715-4true [2023-11-06 22:46:39,141 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-11-06 22:46:39,141 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 1 times [2023-11-06 22:46:39,152 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-06 22:46:39,153 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [611755146] [2023-11-06 22:46:39,153 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 22:46:39,154 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-06 22:46:39,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-06 22:46:39,290 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-06 22:46:39,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-06 22:46:39,348 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-06 22:46:39,351 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-11-06 22:46:39,351 INFO L85 PathProgramCache]: Analyzing trace with hash 1336145772, now seen corresponding path program 1 times [2023-11-06 22:46:39,351 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-06 22:46:39,352 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [558374723] [2023-11-06 22:46:39,352 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 22:46:39,352 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-06 22:46:39,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-06 22:46:39,401 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-06 22:46:39,402 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [558374723] [2023-11-06 22:46:39,402 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unsupported non-linear arithmetic [2023-11-06 22:46:39,403 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [896635049] [2023-11-06 22:46:39,403 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 22:46:39,403 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-06 22:46:39,404 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 22:46:39,410 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-06 22:46:39,437 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2023-11-06 22:46:39,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-06 22:46:39,573 INFO L262 TraceCheckSpWp]: Trace formula consists of 72 conjuncts, 1 conjunts are in the unsatisfiable core [2023-11-06 22:46:39,575 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-06 22:46:39,594 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-06 22:46:39,595 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-06 22:46:39,596 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [896635049] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-06 22:46:39,596 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-06 22:46:39,596 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2023-11-06 22:46:39,597 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1319101272] [2023-11-06 22:46:39,598 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-06 22:46:39,602 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-06 22:46:39,603 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-06 22:46:39,644 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2023-11-06 22:46:39,644 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2023-11-06 22:46:39,647 INFO L87 Difference]: Start difference. First operand has 355 states, 350 states have (on average 1.6942857142857144) internal successors, (593), 350 states have internal predecessors, (593), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 3.0) internal successors, (6), 2 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-06 22:46:39,685 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-06 22:46:39,686 INFO L93 Difference]: Finished difference Result 352 states and 525 transitions. [2023-11-06 22:46:39,688 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 352 states and 525 transitions. [2023-11-06 22:46:39,702 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 337 [2023-11-06 22:46:39,714 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 352 states to 344 states and 517 transitions. [2023-11-06 22:46:39,715 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 344 [2023-11-06 22:46:39,718 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 344 [2023-11-06 22:46:39,718 INFO L73 IsDeterministic]: Start isDeterministic. Operand 344 states and 517 transitions. [2023-11-06 22:46:39,726 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-06 22:46:39,726 INFO L218 hiAutomatonCegarLoop]: Abstraction has 344 states and 517 transitions. [2023-11-06 22:46:39,747 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 344 states and 517 transitions. [2023-11-06 22:46:39,781 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 344 to 344. [2023-11-06 22:46:39,783 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 344 states, 340 states have (on average 1.5029411764705882) internal successors, (511), 339 states have internal predecessors, (511), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-06 22:46:39,786 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 344 states to 344 states and 517 transitions. [2023-11-06 22:46:39,787 INFO L240 hiAutomatonCegarLoop]: Abstraction has 344 states and 517 transitions. [2023-11-06 22:46:39,792 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2023-11-06 22:46:39,798 INFO L428 stractBuchiCegarLoop]: Abstraction has 344 states and 517 transitions. [2023-11-06 22:46:39,799 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-06 22:46:39,799 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 344 states and 517 transitions. [2023-11-06 22:46:39,803 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 337 [2023-11-06 22:46:39,803 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-06 22:46:39,803 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-06 22:46:39,805 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-06 22:46:39,806 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-06 22:46:39,806 INFO L748 eck$LassoCheckResult]: Stem: 1027#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 1028#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 894#L715-4 [2023-11-06 22:46:39,809 INFO L750 eck$LassoCheckResult]: Loop: 894#L715-4 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1066#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 821#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 822#L717-2 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 967#L722-269 havoc main_~_ha_hashv~0#1; 1054#L722-176 goto; 1002#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 851#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 852#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 777#L722-73 assume main_#t~switch31#1;call main_#t~mem32#1 := read~int(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem32#1 % 256 % 4294967296);havoc main_#t~mem32#1; 778#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 895#L722-76 assume main_#t~switch31#1;call main_#t~mem33#1 := read~int(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem33#1 % 256 % 4294967296);havoc main_#t~mem33#1; 896#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 938#L722-79 assume main_#t~switch31#1;call main_#t~mem34#1 := read~int(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem34#1 % 256 % 4294967296);havoc main_#t~mem34#1; 939#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 1006#L722-82 assume main_#t~switch31#1;call main_#t~mem35#1 := read~int(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);havoc main_#t~mem35#1; 823#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 824#L722-85 assume main_#t~switch31#1;call main_#t~mem36#1 := read~int(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);havoc main_#t~mem36#1; 855#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 846#L722-88 assume !main_#t~switch31#1; 847#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 1043#L722-91 assume main_#t~switch31#1;call main_#t~mem38#1 := read~int(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem38#1; 765#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 766#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 767#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 768#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 985#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 798#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 799#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 930#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 1052#L722-105 havoc main_#t~switch31#1; 1041#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1037#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 920#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1030#L722-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 948#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 949#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 750#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 968#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 776#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 743#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 744#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 838#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 860#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 987#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 807#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 910#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 911#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 980#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 735#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 736#L722-170 goto; 992#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 960#L722-173 goto; 961#L722-175 goto; 1025#L722-266 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 1046#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 1048#L722-194 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 830#L722-193 goto; 831#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 862#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 863#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 943#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 955#L722-202 goto; 839#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 840#L722-205 assume main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem89#1.base, 12 + main_#t~mem89#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset; 990#L722-207 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 854#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 756#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 757#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 918#L722-260 goto; 993#L722-262 havoc main_~_ha_bkt~0#1; 965#L722-263 goto; 966#L722-265 goto; 885#L722-267 havoc main_~_ha_hashv~0#1; 759#L722-268 goto; 760#L715-3 call main_#t~mem3#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 894#L715-4 [2023-11-06 22:46:39,810 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-11-06 22:46:39,810 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 2 times [2023-11-06 22:46:39,810 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-06 22:46:39,810 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [596572947] [2023-11-06 22:46:39,811 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 22:46:39,811 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-06 22:46:39,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-06 22:46:39,837 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-06 22:46:39,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-06 22:46:39,868 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-06 22:46:39,869 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-11-06 22:46:39,869 INFO L85 PathProgramCache]: Analyzing trace with hash -280030059, now seen corresponding path program 1 times [2023-11-06 22:46:39,870 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-06 22:46:39,870 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [194957275] [2023-11-06 22:46:39,870 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 22:46:39,871 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-06 22:46:39,970 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-06 22:46:39,971 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [549711074] [2023-11-06 22:46:39,971 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 22:46:39,971 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-06 22:46:39,972 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 22:46:40,021 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-06 22:46:40,041 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2023-11-06 22:46:40,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-06 22:46:40,364 INFO L262 TraceCheckSpWp]: Trace formula consists of 546 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-06 22:46:40,370 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-06 22:46:40,436 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-06 22:46:40,436 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-06 22:46:40,437 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-06 22:46:40,439 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [194957275] [2023-11-06 22:46:40,439 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-06 22:46:40,440 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [549711074] [2023-11-06 22:46:40,440 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [549711074] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-06 22:46:40,440 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-06 22:46:40,441 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-06 22:46:40,441 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1040475085] [2023-11-06 22:46:40,441 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-06 22:46:40,442 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-06 22:46:40,442 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-06 22:46:40,442 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-11-06 22:46:40,443 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-11-06 22:46:40,443 INFO L87 Difference]: Start difference. First operand 344 states and 517 transitions. cyclomatic complexity: 176 Second operand has 3 states, 3 states have (on average 25.333333333333332) internal successors, (76), 3 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-06 22:46:40,625 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-06 22:46:40,627 INFO L93 Difference]: Finished difference Result 365 states and 538 transitions. [2023-11-06 22:46:40,627 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 365 states and 538 transitions. [2023-11-06 22:46:40,632 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 358 [2023-11-06 22:46:40,640 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 365 states to 365 states and 538 transitions. [2023-11-06 22:46:40,640 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 365 [2023-11-06 22:46:40,642 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 365 [2023-11-06 22:46:40,643 INFO L73 IsDeterministic]: Start isDeterministic. Operand 365 states and 538 transitions. [2023-11-06 22:46:40,650 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-06 22:46:40,650 INFO L218 hiAutomatonCegarLoop]: Abstraction has 365 states and 538 transitions. [2023-11-06 22:46:40,653 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 365 states and 538 transitions. [2023-11-06 22:46:40,684 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 365 to 364. [2023-11-06 22:46:40,689 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 364 states, 360 states have (on average 1.475) internal successors, (531), 359 states have internal predecessors, (531), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-06 22:46:40,691 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 364 states to 364 states and 537 transitions. [2023-11-06 22:46:40,692 INFO L240 hiAutomatonCegarLoop]: Abstraction has 364 states and 537 transitions. [2023-11-06 22:46:40,692 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-11-06 22:46:40,693 INFO L428 stractBuchiCegarLoop]: Abstraction has 364 states and 537 transitions. [2023-11-06 22:46:40,693 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-06 22:46:40,693 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 364 states and 537 transitions. [2023-11-06 22:46:40,696 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 357 [2023-11-06 22:46:40,696 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-06 22:46:40,696 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-06 22:46:40,700 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-06 22:46:40,700 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-06 22:46:40,701 INFO L748 eck$LassoCheckResult]: Stem: 1969#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 1970#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1835#L715-4 [2023-11-06 22:46:40,701 INFO L750 eck$LassoCheckResult]: Loop: 1835#L715-4 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2009#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 1760#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1761#L717-2 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 1909#L722-269 havoc main_~_ha_hashv~0#1; 1997#L722-176 goto; 1944#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 1792#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 1793#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 1715#L722-73 assume main_#t~switch31#1;call main_#t~mem32#1 := read~int(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem32#1 % 256 % 4294967296);havoc main_#t~mem32#1; 1716#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 1836#L722-76 assume main_#t~switch31#1;call main_#t~mem33#1 := read~int(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem33#1 % 256 % 4294967296);havoc main_#t~mem33#1; 1837#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 1880#L722-79 assume main_#t~switch31#1;call main_#t~mem34#1 := read~int(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem34#1 % 256 % 4294967296);havoc main_#t~mem34#1; 1881#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 1948#L722-82 assume main_#t~switch31#1;call main_#t~mem35#1 := read~int(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);havoc main_#t~mem35#1; 1764#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 1765#L722-85 assume main_#t~switch31#1;call main_#t~mem36#1 := read~int(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);havoc main_#t~mem36#1; 1796#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 1787#L722-88 assume main_#t~switch31#1;call main_#t~mem37#1 := read~int(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);havoc main_#t~mem37#1; 1788#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 1985#L722-91 assume main_#t~switch31#1;call main_#t~mem38#1 := read~int(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem38#1; 1705#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 1706#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 1707#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 1708#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 1926#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 1742#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 1743#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 1995#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 1996#L722-105 havoc main_#t~switch31#1; 1983#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1981#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 1862#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1973#L722-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 1890#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1891#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 1692#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1913#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 1721#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1686#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 1687#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1779#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 1805#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1929#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 1752#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1856#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 1857#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1927#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 1681#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 1682#L722-170 goto; 1934#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 1902#L722-173 goto; 1903#L722-175 goto; 1967#L722-266 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 1988#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 1990#L722-194 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 1769#L722-193 goto; 1770#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 1800#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 1801#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 1885#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 1896#L722-202 goto; 1780#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 1781#L722-205 assume main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem89#1.base, 12 + main_#t~mem89#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset; 1931#L722-207 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 1795#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 1696#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 1697#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 1859#L722-260 goto; 1935#L722-262 havoc main_~_ha_bkt~0#1; 1907#L722-263 goto; 1908#L722-265 goto; 1824#L722-267 havoc main_~_ha_hashv~0#1; 1699#L722-268 goto; 1700#L715-3 call main_#t~mem3#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 1835#L715-4 [2023-11-06 22:46:40,703 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-11-06 22:46:40,703 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 3 times [2023-11-06 22:46:40,703 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-06 22:46:40,704 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [344856010] [2023-11-06 22:46:40,704 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 22:46:40,704 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-06 22:46:40,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-06 22:46:40,751 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-06 22:46:40,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-06 22:46:40,776 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-06 22:46:40,776 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-11-06 22:46:40,777 INFO L85 PathProgramCache]: Analyzing trace with hash -1540947309, now seen corresponding path program 1 times [2023-11-06 22:46:40,777 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-06 22:46:40,777 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1205694867] [2023-11-06 22:46:40,778 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 22:46:40,778 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-06 22:46:40,863 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-06 22:46:40,866 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2078837326] [2023-11-06 22:46:40,866 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 22:46:40,867 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-06 22:46:40,867 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 22:46:40,874 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-06 22:46:40,883 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2023-11-06 22:46:41,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-06 22:46:41,191 INFO L262 TraceCheckSpWp]: Trace formula consists of 552 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-06 22:46:41,194 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-06 22:46:41,222 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-06 22:46:41,222 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-06 22:46:41,223 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-06 22:46:41,223 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1205694867] [2023-11-06 22:46:41,223 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-06 22:46:41,223 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2078837326] [2023-11-06 22:46:41,223 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2078837326] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-06 22:46:41,224 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-06 22:46:41,224 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-11-06 22:46:41,224 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2102271899] [2023-11-06 22:46:41,224 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-06 22:46:41,225 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-06 22:46:41,225 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-06 22:46:41,226 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-06 22:46:41,226 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-11-06 22:46:41,226 INFO L87 Difference]: Start difference. First operand 364 states and 537 transitions. cyclomatic complexity: 176 Second operand has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-06 22:46:41,343 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-06 22:46:41,343 INFO L93 Difference]: Finished difference Result 351 states and 517 transitions. [2023-11-06 22:46:41,344 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 351 states and 517 transitions. [2023-11-06 22:46:41,347 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 344 [2023-11-06 22:46:41,352 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 351 states to 351 states and 517 transitions. [2023-11-06 22:46:41,352 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 351 [2023-11-06 22:46:41,353 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 351 [2023-11-06 22:46:41,353 INFO L73 IsDeterministic]: Start isDeterministic. Operand 351 states and 517 transitions. [2023-11-06 22:46:41,354 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-06 22:46:41,354 INFO L218 hiAutomatonCegarLoop]: Abstraction has 351 states and 517 transitions. [2023-11-06 22:46:41,355 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 351 states and 517 transitions. [2023-11-06 22:46:41,364 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 351 to 350. [2023-11-06 22:46:41,365 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 350 states, 346 states have (on average 1.4739884393063585) internal successors, (510), 345 states have internal predecessors, (510), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-06 22:46:41,367 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 350 states to 350 states and 516 transitions. [2023-11-06 22:46:41,367 INFO L240 hiAutomatonCegarLoop]: Abstraction has 350 states and 516 transitions. [2023-11-06 22:46:41,368 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-06 22:46:41,369 INFO L428 stractBuchiCegarLoop]: Abstraction has 350 states and 516 transitions. [2023-11-06 22:46:41,369 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-06 22:46:41,369 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 350 states and 516 transitions. [2023-11-06 22:46:41,371 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 343 [2023-11-06 22:46:41,372 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-06 22:46:41,372 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-06 22:46:41,373 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-06 22:46:41,373 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-06 22:46:41,374 INFO L748 eck$LassoCheckResult]: Stem: 2918#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 2919#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2783#L715-4 [2023-11-06 22:46:41,374 INFO L750 eck$LassoCheckResult]: Loop: 2783#L715-4 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2959#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 2708#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 2709#L717-2 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 2857#L722-269 havoc main_~_ha_hashv~0#1; 2946#L722-176 goto; 2893#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 2740#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 2741#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 2664#L722-73 assume !main_#t~switch31#1; 2665#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 2784#L722-76 assume !main_#t~switch31#1; 2785#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 2828#L722-79 assume !main_#t~switch31#1; 2829#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 2897#L722-82 assume !main_#t~switch31#1; 2712#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 2713#L722-85 assume !main_#t~switch31#1; 2744#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 2735#L722-88 assume !main_#t~switch31#1; 2736#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 2934#L722-91 assume !main_#t~switch31#1; 2654#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 2655#L722-94 assume !main_#t~switch31#1; 2656#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 2657#L722-97 assume !main_#t~switch31#1; 2966#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 2967#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 2691#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 2944#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 2945#L722-105 havoc main_#t~switch31#1; 2932#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2930#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 2810#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2922#L722-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 2838#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2839#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 2641#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2861#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 2669#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2635#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 2636#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2727#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 2751#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2878#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 2698#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2802#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 2803#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2874#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 2628#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 2629#L722-170 goto; 2889#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 2850#L722-173 goto; 2851#L722-175 goto; 2916#L722-266 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 2937#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 2939#L722-194 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 2719#L722-193 goto; 2720#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 2753#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 2754#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 2836#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 2845#L722-202 goto; 2728#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 2729#L722-205 assume main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem89#1.base, 12 + main_#t~mem89#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset; 2881#L722-207 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 2743#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 2647#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 2648#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 2807#L722-260 goto; 2882#L722-262 havoc main_~_ha_bkt~0#1; 2853#L722-263 goto; 2854#L722-265 goto; 2772#L722-267 havoc main_~_ha_hashv~0#1; 2643#L722-268 goto; 2644#L715-3 call main_#t~mem3#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 2783#L715-4 [2023-11-06 22:46:41,375 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-11-06 22:46:41,375 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 4 times [2023-11-06 22:46:41,375 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-06 22:46:41,376 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1046721371] [2023-11-06 22:46:41,376 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 22:46:41,376 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-06 22:46:41,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-06 22:46:41,392 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-06 22:46:41,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-06 22:46:41,411 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-06 22:46:41,412 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-11-06 22:46:41,412 INFO L85 PathProgramCache]: Analyzing trace with hash -1275385819, now seen corresponding path program 1 times [2023-11-06 22:46:41,412 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-06 22:46:41,413 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1784888321] [2023-11-06 22:46:41,413 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 22:46:41,413 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-06 22:46:41,464 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-06 22:46:41,465 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [191190811] [2023-11-06 22:46:41,465 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 22:46:41,465 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-06 22:46:41,466 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 22:46:41,469 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-06 22:46:41,485 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2023-11-06 22:46:41,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-06 22:46:41,812 INFO L262 TraceCheckSpWp]: Trace formula consists of 498 conjuncts, 4 conjunts are in the unsatisfiable core [2023-11-06 22:46:41,823 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-06 22:46:41,897 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-06 22:46:41,897 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-06 22:46:41,898 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-06 22:46:41,898 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1784888321] [2023-11-06 22:46:41,898 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-06 22:46:41,898 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [191190811] [2023-11-06 22:46:41,898 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [191190811] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-06 22:46:41,898 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-06 22:46:41,898 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2023-11-06 22:46:41,899 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1005594830] [2023-11-06 22:46:41,899 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-06 22:46:41,899 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-06 22:46:41,899 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-06 22:46:41,900 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2023-11-06 22:46:41,900 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2023-11-06 22:46:41,900 INFO L87 Difference]: Start difference. First operand 350 states and 516 transitions. cyclomatic complexity: 169 Second operand has 5 states, 5 states have (on average 15.2) internal successors, (76), 5 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-06 22:46:42,054 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-06 22:46:42,055 INFO L93 Difference]: Finished difference Result 460 states and 682 transitions. [2023-11-06 22:46:42,055 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 460 states and 682 transitions. [2023-11-06 22:46:42,060 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 453 [2023-11-06 22:46:42,065 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 460 states to 460 states and 682 transitions. [2023-11-06 22:46:42,066 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 460 [2023-11-06 22:46:42,066 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 460 [2023-11-06 22:46:42,067 INFO L73 IsDeterministic]: Start isDeterministic. Operand 460 states and 682 transitions. [2023-11-06 22:46:42,068 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-06 22:46:42,068 INFO L218 hiAutomatonCegarLoop]: Abstraction has 460 states and 682 transitions. [2023-11-06 22:46:42,069 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 460 states and 682 transitions. [2023-11-06 22:46:42,076 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 460 to 373. [2023-11-06 22:46:42,077 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 373 states, 369 states have (on average 1.4498644986449865) internal successors, (535), 368 states have internal predecessors, (535), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-06 22:46:42,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 373 states to 373 states and 541 transitions. [2023-11-06 22:46:42,080 INFO L240 hiAutomatonCegarLoop]: Abstraction has 373 states and 541 transitions. [2023-11-06 22:46:42,081 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2023-11-06 22:46:42,082 INFO L428 stractBuchiCegarLoop]: Abstraction has 373 states and 541 transitions. [2023-11-06 22:46:42,082 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2023-11-06 22:46:42,082 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 373 states and 541 transitions. [2023-11-06 22:46:42,084 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 366 [2023-11-06 22:46:42,084 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-06 22:46:42,085 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-06 22:46:42,086 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-06 22:46:42,086 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-06 22:46:42,086 INFO L748 eck$LassoCheckResult]: Stem: 3967#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 3968#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 3827#L715-4 [2023-11-06 22:46:42,087 INFO L750 eck$LassoCheckResult]: Loop: 3827#L715-4 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 4014#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 3748#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 3749#L717-2 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 3902#L722-269 havoc main_~_ha_hashv~0#1; 3998#L722-176 goto; 3938#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 3939#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 3990#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 3991#L722-73 assume !main_#t~switch31#1; 4025#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 4026#L722-76 assume !main_#t~switch31#1; 3945#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 3946#L722-79 assume !main_#t~switch31#1; 3943#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 3944#L722-82 assume !main_#t~switch31#1; 3755#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 3756#L722-85 assume !main_#t~switch31#1; 3787#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 3788#L722-88 assume !main_#t~switch31#1; 3983#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 3984#L722-91 assume !main_#t~switch31#1; 3697#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 3698#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 3699#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 3700#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 4023#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 3733#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 3734#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 3863#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 3997#L722-105 havoc main_#t~switch31#1; 3981#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3979#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 3854#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3971#L722-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 3883#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3884#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 3684#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3904#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 3712#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3678#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 3679#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3770#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 3795#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3923#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 3741#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3846#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 3847#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3919#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 3671#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 3672#L722-170 goto; 3930#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 3895#L722-173 goto; 3896#L722-175 goto; 3965#L722-266 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 3987#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 3989#L722-194 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 3762#L722-193 goto; 3763#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 3797#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 3798#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 3879#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 3890#L722-202 goto; 3771#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 3772#L722-205 assume main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem89#1.base, 12 + main_#t~mem89#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset; 3926#L722-207 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 3786#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 3688#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 3689#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 3851#L722-260 goto; 3931#L722-262 havoc main_~_ha_bkt~0#1; 3900#L722-263 goto; 3901#L722-265 goto; 3822#L722-267 havoc main_~_ha_hashv~0#1; 3691#L722-268 goto; 3692#L715-3 call main_#t~mem3#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 3827#L715-4 [2023-11-06 22:46:42,087 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-11-06 22:46:42,087 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 5 times [2023-11-06 22:46:42,088 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-06 22:46:42,088 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2081093050] [2023-11-06 22:46:42,088 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 22:46:42,088 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-06 22:46:42,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-06 22:46:42,103 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-06 22:46:42,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-06 22:46:42,121 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-06 22:46:42,122 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-11-06 22:46:42,122 INFO L85 PathProgramCache]: Analyzing trace with hash 309299617, now seen corresponding path program 1 times [2023-11-06 22:46:42,122 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-06 22:46:42,123 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1983606470] [2023-11-06 22:46:42,123 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 22:46:42,123 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-06 22:46:42,177 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-06 22:46:42,178 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1162487306] [2023-11-06 22:46:42,178 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 22:46:42,178 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-06 22:46:42,178 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 22:46:42,182 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-06 22:46:42,201 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2023-11-06 22:46:44,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-06 22:46:44,418 INFO L262 TraceCheckSpWp]: Trace formula consists of 510 conjuncts, 13 conjunts are in the unsatisfiable core [2023-11-06 22:46:44,421 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-06 22:46:44,594 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-06 22:46:44,594 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-06 22:46:44,595 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-06 22:46:44,595 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1983606470] [2023-11-06 22:46:44,595 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-06 22:46:44,595 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1162487306] [2023-11-06 22:46:44,596 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1162487306] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-06 22:46:44,596 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-06 22:46:44,596 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2023-11-06 22:46:44,596 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1389365337] [2023-11-06 22:46:44,596 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-06 22:46:44,597 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-06 22:46:44,597 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-06 22:46:44,598 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2023-11-06 22:46:44,598 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2023-11-06 22:46:44,598 INFO L87 Difference]: Start difference. First operand 373 states and 541 transitions. cyclomatic complexity: 171 Second operand has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-06 22:46:45,170 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-06 22:46:45,170 INFO L93 Difference]: Finished difference Result 390 states and 561 transitions. [2023-11-06 22:46:45,170 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 390 states and 561 transitions. [2023-11-06 22:46:45,174 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 383 [2023-11-06 22:46:45,178 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 390 states to 390 states and 561 transitions. [2023-11-06 22:46:45,179 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 390 [2023-11-06 22:46:45,179 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 390 [2023-11-06 22:46:45,180 INFO L73 IsDeterministic]: Start isDeterministic. Operand 390 states and 561 transitions. [2023-11-06 22:46:45,181 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-06 22:46:45,181 INFO L218 hiAutomatonCegarLoop]: Abstraction has 390 states and 561 transitions. [2023-11-06 22:46:45,182 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 390 states and 561 transitions. [2023-11-06 22:46:45,188 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 390 to 387. [2023-11-06 22:46:45,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 387 states, 383 states have (on average 1.4386422976501305) internal successors, (551), 382 states have internal predecessors, (551), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-06 22:46:45,192 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 387 states to 387 states and 557 transitions. [2023-11-06 22:46:45,192 INFO L240 hiAutomatonCegarLoop]: Abstraction has 387 states and 557 transitions. [2023-11-06 22:46:45,192 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2023-11-06 22:46:45,193 INFO L428 stractBuchiCegarLoop]: Abstraction has 387 states and 557 transitions. [2023-11-06 22:46:45,194 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2023-11-06 22:46:45,194 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 387 states and 557 transitions. [2023-11-06 22:46:45,196 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 380 [2023-11-06 22:46:45,196 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-06 22:46:45,196 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-06 22:46:45,197 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-06 22:46:45,197 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-06 22:46:45,198 INFO L748 eck$LassoCheckResult]: Stem: 4961#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 4962#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 4823#L715-4 [2023-11-06 22:46:45,198 INFO L750 eck$LassoCheckResult]: Loop: 4823#L715-4 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 5006#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 4745#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 4746#L717-2 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 4897#L722-269 havoc main_~_ha_hashv~0#1; 4991#L722-176 goto; 4932#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 4933#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 4984#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 4985#L722-73 assume !main_#t~switch31#1; 5018#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 5019#L722-76 assume !main_#t~switch31#1; 4939#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 4940#L722-79 assume !main_#t~switch31#1; 4937#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 4938#L722-82 assume !main_#t~switch31#1; 4752#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 4753#L722-85 assume !main_#t~switch31#1; 4869#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 5036#L722-88 assume !main_#t~switch31#1; 5035#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 4996#L722-91 assume !main_#t~switch31#1; 4694#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 4695#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 4995#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 5045#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 5044#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 5043#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 5042#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 5041#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 4990#L722-105 havoc main_#t~switch31#1; 5040#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5039#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 4969#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4965#L722-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 4966#L722-116 assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~nondet44#1 := main_~_hj_j~0#1; 4878#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4879#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 4681#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4899#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 4709#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4675#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 4676#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4767#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 4791#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4917#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 4738#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4842#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 4843#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4913#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 4668#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 4669#L722-170 goto; 4924#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 4890#L722-173 goto; 4891#L722-175 goto; 4959#L722-266 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 4981#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 4983#L722-194 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 4759#L722-193 goto; 4760#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 4793#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 4794#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 4874#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 4885#L722-202 goto; 4768#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 4769#L722-205 assume main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem89#1.base, 12 + main_#t~mem89#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset; 4920#L722-207 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 4783#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 4685#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 4686#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 4847#L722-260 goto; 4928#L722-262 havoc main_~_ha_bkt~0#1; 4895#L722-263 goto; 4896#L722-265 goto; 4818#L722-267 havoc main_~_ha_hashv~0#1; 4688#L722-268 goto; 4689#L715-3 call main_#t~mem3#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 4823#L715-4 [2023-11-06 22:46:45,199 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-11-06 22:46:45,199 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 6 times [2023-11-06 22:46:45,199 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-06 22:46:45,200 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [579178592] [2023-11-06 22:46:45,200 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 22:46:45,200 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-06 22:46:45,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-06 22:46:45,216 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-06 22:46:45,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-06 22:46:45,232 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-06 22:46:45,232 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-11-06 22:46:45,233 INFO L85 PathProgramCache]: Analyzing trace with hash 2026981588, now seen corresponding path program 1 times [2023-11-06 22:46:45,233 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-06 22:46:45,233 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1891298954] [2023-11-06 22:46:45,233 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 22:46:45,234 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-06 22:46:45,286 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-06 22:46:45,287 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [951652320] [2023-11-06 22:46:45,287 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 22:46:45,287 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-06 22:46:45,288 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 22:46:45,294 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-06 22:46:45,329 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2023-11-06 22:46:45,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-06 22:46:45,717 INFO L262 TraceCheckSpWp]: Trace formula consists of 511 conjuncts, 15 conjunts are in the unsatisfiable core [2023-11-06 22:46:45,719 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-06 22:46:45,933 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-06 22:46:45,933 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-06 22:46:45,933 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-06 22:46:45,934 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1891298954] [2023-11-06 22:46:45,934 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-06 22:46:45,934 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [951652320] [2023-11-06 22:46:45,934 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [951652320] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-06 22:46:45,934 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-06 22:46:45,935 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2023-11-06 22:46:45,935 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [21852812] [2023-11-06 22:46:45,935 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-06 22:46:45,936 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-06 22:46:45,936 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-06 22:46:45,936 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-06 22:46:45,936 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2023-11-06 22:46:45,937 INFO L87 Difference]: Start difference. First operand 387 states and 557 transitions. cyclomatic complexity: 173 Second operand has 7 states, 7 states have (on average 11.0) internal successors, (77), 7 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-06 22:46:46,825 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-06 22:46:46,826 INFO L93 Difference]: Finished difference Result 398 states and 573 transitions. [2023-11-06 22:46:46,826 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 398 states and 573 transitions. [2023-11-06 22:46:46,830 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 391 [2023-11-06 22:46:46,835 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 398 states to 398 states and 573 transitions. [2023-11-06 22:46:46,836 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 398 [2023-11-06 22:46:46,836 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 398 [2023-11-06 22:46:46,837 INFO L73 IsDeterministic]: Start isDeterministic. Operand 398 states and 573 transitions. [2023-11-06 22:46:46,838 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-06 22:46:46,838 INFO L218 hiAutomatonCegarLoop]: Abstraction has 398 states and 573 transitions. [2023-11-06 22:46:46,839 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 398 states and 573 transitions. [2023-11-06 22:46:46,847 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 398 to 395. [2023-11-06 22:46:46,848 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 395 states, 391 states have (on average 1.4398976982097187) internal successors, (563), 390 states have internal predecessors, (563), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-06 22:46:46,851 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 395 states to 395 states and 569 transitions. [2023-11-06 22:46:46,852 INFO L240 hiAutomatonCegarLoop]: Abstraction has 395 states and 569 transitions. [2023-11-06 22:46:46,852 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2023-11-06 22:46:46,855 INFO L428 stractBuchiCegarLoop]: Abstraction has 395 states and 569 transitions. [2023-11-06 22:46:46,855 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2023-11-06 22:46:46,855 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 395 states and 569 transitions. [2023-11-06 22:46:46,858 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 388 [2023-11-06 22:46:46,858 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-06 22:46:46,858 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-06 22:46:46,862 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-06 22:46:46,862 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-06 22:46:46,863 INFO L748 eck$LassoCheckResult]: Stem: 5983#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 5984#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 5848#L715-4 [2023-11-06 22:46:46,863 INFO L750 eck$LassoCheckResult]: Loop: 5848#L715-4 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 6029#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 5770#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 5771#L717-2 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 5921#L722-269 havoc main_~_ha_hashv~0#1; 6012#L722-176 goto; 5958#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 5805#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 5806#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 5729#L722-73 assume !main_#t~switch31#1; 5730#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 5849#L722-76 assume !main_#t~switch31#1; 5850#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 5892#L722-79 assume !main_#t~switch31#1; 5893#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 5962#L722-82 assume !main_#t~switch31#1; 5777#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 5778#L722-85 assume !main_#t~switch31#1; 5809#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 5798#L722-88 assume !main_#t~switch31#1; 5799#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 6001#L722-91 assume !main_#t~switch31#1; 5719#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 5720#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 6016#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 5936#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 5937#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 6062#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 6063#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 6067#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 6011#L722-105 havoc main_#t~switch31#1; 6065#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5996#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 5991#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5987#L722-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 5988#L722-116 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 5954#L722-118 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);assume main_#t~nondet44#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 5955#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6042#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 5706#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5923#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 5734#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5700#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 5701#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5792#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 5816#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5942#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 5763#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5867#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 5868#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5938#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 5693#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 5694#L722-170 goto; 5949#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 5914#L722-173 goto; 5915#L722-175 goto; 5981#L722-266 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 6004#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 6006#L722-194 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 5784#L722-193 goto; 5785#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 5818#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 5819#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 5898#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 5909#L722-202 goto; 5793#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 5794#L722-205 assume main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem89#1.base, 12 + main_#t~mem89#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset; 5945#L722-207 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 5808#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 5710#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 5711#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 5872#L722-260 goto; 5953#L722-262 havoc main_~_ha_bkt~0#1; 5919#L722-263 goto; 5920#L722-265 goto; 5843#L722-267 havoc main_~_ha_hashv~0#1; 5713#L722-268 goto; 5714#L715-3 call main_#t~mem3#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 5848#L715-4 [2023-11-06 22:46:46,864 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-11-06 22:46:46,864 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 7 times [2023-11-06 22:46:46,865 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-06 22:46:46,865 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [833344344] [2023-11-06 22:46:46,865 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 22:46:46,865 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-06 22:46:46,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-06 22:46:46,895 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-06 22:46:46,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-06 22:46:46,917 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-06 22:46:46,921 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-11-06 22:46:46,925 INFO L85 PathProgramCache]: Analyzing trace with hash 309060570, now seen corresponding path program 1 times [2023-11-06 22:46:46,926 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-06 22:46:46,926 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1942312183] [2023-11-06 22:46:46,926 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 22:46:46,927 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-06 22:46:46,998 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-06 22:46:46,998 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [162270825] [2023-11-06 22:46:46,999 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 22:46:46,999 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-06 22:46:46,999 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 22:46:47,003 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-06 22:46:47,037 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2023-11-06 22:46:51,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-06 22:46:51,034 INFO L262 TraceCheckSpWp]: Trace formula consists of 510 conjuncts, 34 conjunts are in the unsatisfiable core [2023-11-06 22:46:51,037 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-06 22:47:00,603 WARN L293 SmtUtils]: Spent 6.39s on a formula simplification that was a NOOP. DAG size: 11 (called from [L 731] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2023-11-06 22:47:25,638 WARN L293 SmtUtils]: Spent 24.03s on a formula simplification that was a NOOP. DAG size: 12 (called from [L 731] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2023-11-06 22:47:37,741 WARN L293 SmtUtils]: Spent 12.10s on a formula simplification that was a NOOP. DAG size: 3 (called from [L 731] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2023-11-06 22:47:50,118 WARN L293 SmtUtils]: Spent 12.38s on a formula simplification that was a NOOP. DAG size: 3 (called from [L 731] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2023-11-06 22:48:14,720 WARN L293 SmtUtils]: Spent 24.60s on a formula simplification. DAG size of input: 12 DAG size of output: 1 (called from [L 731] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2023-11-06 22:48:14,722 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-06 22:48:14,722 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-06 22:48:14,723 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-06 22:48:14,723 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1942312183] [2023-11-06 22:48:14,723 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-06 22:48:14,723 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [162270825] [2023-11-06 22:48:14,723 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [162270825] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-06 22:48:14,723 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-06 22:48:14,724 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2023-11-06 22:48:14,724 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1689959906] [2023-11-06 22:48:14,724 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-06 22:48:14,724 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-06 22:48:14,724 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-06 22:48:14,725 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2023-11-06 22:48:14,725 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2023-11-06 22:48:14,725 INFO L87 Difference]: Start difference. First operand 395 states and 569 transitions. cyclomatic complexity: 177 Second operand has 11 states, 11 states have (on average 7.090909090909091) internal successors, (78), 11 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-06 22:48:28,487 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-06 22:48:40,511 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.02s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-06 22:48:52,584 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.07s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-06 22:49:04,629 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.04s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-06 22:49:16,736 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.11s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-06 22:49:19,633 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.90s for a HTC check with result VALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-06 22:49:31,639 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.01s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-06 22:49:43,670 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.03s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-06 22:49:55,708 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.04s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-06 22:49:58,656 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.36s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-06 22:50:03,318 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.76s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-06 22:50:04,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-06 22:50:04,453 INFO L93 Difference]: Finished difference Result 416 states and 598 transitions. [2023-11-06 22:50:04,453 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 416 states and 598 transitions. [2023-11-06 22:50:04,457 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 409 [2023-11-06 22:50:04,462 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 416 states to 416 states and 598 transitions. [2023-11-06 22:50:04,462 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 416 [2023-11-06 22:50:04,463 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 416 [2023-11-06 22:50:04,463 INFO L73 IsDeterministic]: Start isDeterministic. Operand 416 states and 598 transitions. [2023-11-06 22:50:04,464 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-06 22:50:04,464 INFO L218 hiAutomatonCegarLoop]: Abstraction has 416 states and 598 transitions. [2023-11-06 22:50:04,465 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 416 states and 598 transitions. [2023-11-06 22:50:04,472 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 416 to 409. [2023-11-06 22:50:04,473 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 409 states, 405 states have (on average 1.4370370370370371) internal successors, (582), 404 states have internal predecessors, (582), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-06 22:50:04,476 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 409 states to 409 states and 588 transitions. [2023-11-06 22:50:04,476 INFO L240 hiAutomatonCegarLoop]: Abstraction has 409 states and 588 transitions. [2023-11-06 22:50:04,476 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2023-11-06 22:50:04,477 INFO L428 stractBuchiCegarLoop]: Abstraction has 409 states and 588 transitions. [2023-11-06 22:50:04,477 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2023-11-06 22:50:04,477 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 409 states and 588 transitions. [2023-11-06 22:50:04,480 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 402 [2023-11-06 22:50:04,480 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-06 22:50:04,480 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-06 22:50:04,481 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-06 22:50:04,481 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-06 22:50:04,481 INFO L748 eck$LassoCheckResult]: Stem: 7047#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 7048#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 6908#L715-4 [2023-11-06 22:50:04,482 INFO L750 eck$LassoCheckResult]: Loop: 6908#L715-4 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 7092#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 6831#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 6832#L717-2 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 6983#L722-269 havoc main_~_ha_hashv~0#1; 7075#L722-176 goto; 7021#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 6866#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 6867#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 6790#L722-73 assume !main_#t~switch31#1; 6791#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 6909#L722-76 assume !main_#t~switch31#1; 6910#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 6953#L722-79 assume !main_#t~switch31#1; 6954#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 7025#L722-82 assume !main_#t~switch31#1; 6838#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 6839#L722-85 assume !main_#t~switch31#1; 6870#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 6859#L722-88 assume !main_#t~switch31#1; 6860#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 7063#L722-91 assume !main_#t~switch31#1; 6780#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 6781#L722-94 assume !main_#t~switch31#1; 7137#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 7135#L722-97 assume !main_#t~switch31#1; 7134#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 6816#L722-100 assume !main_#t~switch31#1; 6817#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 7073#L722-103 assume !main_#t~switch31#1; 7074#L722-105 havoc main_#t~switch31#1; 7089#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7123#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 7121#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7119#L722-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 7117#L722-116 assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~nondet44#1 := main_~_hj_j~0#1; 6963#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6964#L722-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 7097#L722-123 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet45#1 := main_~_ha_hashv~0#1; 6767#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7108#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 6795#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7106#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 6966#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7103#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 7004#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7005#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 6824#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6927#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 6928#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7000#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 6754#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 6755#L722-170 goto; 7012#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 6976#L722-173 goto; 6977#L722-175 goto; 7045#L722-266 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 7066#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 7068#L722-194 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 6845#L722-193 goto; 6846#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 6878#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 6879#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 6959#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 6971#L722-202 goto; 6854#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 6855#L722-205 assume main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem89#1.base, 12 + main_#t~mem89#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset; 7008#L722-207 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 6869#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 6771#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 6772#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 6932#L722-260 goto; 7016#L722-262 havoc main_~_ha_bkt~0#1; 6981#L722-263 goto; 6982#L722-265 goto; 6903#L722-267 havoc main_~_ha_hashv~0#1; 6774#L722-268 goto; 6775#L715-3 call main_#t~mem3#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 6908#L715-4 [2023-11-06 22:50:04,482 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-11-06 22:50:04,482 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 8 times [2023-11-06 22:50:04,483 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-06 22:50:04,483 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1175582269] [2023-11-06 22:50:04,483 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 22:50:04,483 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-06 22:50:04,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-06 22:50:04,498 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-06 22:50:04,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-06 22:50:04,515 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-06 22:50:04,516 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-11-06 22:50:04,516 INFO L85 PathProgramCache]: Analyzing trace with hash -1129219842, now seen corresponding path program 1 times [2023-11-06 22:50:04,516 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-06 22:50:04,517 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1171235687] [2023-11-06 22:50:04,517 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 22:50:04,517 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-06 22:50:04,573 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-06 22:50:04,574 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [969499038] [2023-11-06 22:50:04,574 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 22:50:04,574 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-06 22:50:04,574 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 22:50:04,578 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-06 22:50:04,587 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2023-11-06 22:50:04,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-06 22:50:04,983 INFO L262 TraceCheckSpWp]: Trace formula consists of 488 conjuncts, 4 conjunts are in the unsatisfiable core [2023-11-06 22:50:04,989 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-06 22:50:05,048 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-06 22:50:05,049 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-06 22:50:05,050 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-06 22:50:05,050 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1171235687] [2023-11-06 22:50:05,050 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-06 22:50:05,050 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [969499038] [2023-11-06 22:50:05,051 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [969499038] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-06 22:50:05,051 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-06 22:50:05,051 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-11-06 22:50:05,051 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1746334874] [2023-11-06 22:50:05,051 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-06 22:50:05,052 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-06 22:50:05,052 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-06 22:50:05,053 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-06 22:50:05,053 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-11-06 22:50:05,053 INFO L87 Difference]: Start difference. First operand 409 states and 588 transitions. cyclomatic complexity: 182 Second operand has 4 states, 4 states have (on average 19.5) internal successors, (78), 4 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-06 22:50:05,131 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-06 22:50:05,131 INFO L93 Difference]: Finished difference Result 324 states and 462 transitions. [2023-11-06 22:50:05,131 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 324 states and 462 transitions. [2023-11-06 22:50:05,135 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 317 [2023-11-06 22:50:05,139 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 324 states to 324 states and 462 transitions. [2023-11-06 22:50:05,139 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 324 [2023-11-06 22:50:05,140 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 324 [2023-11-06 22:50:05,140 INFO L73 IsDeterministic]: Start isDeterministic. Operand 324 states and 462 transitions. [2023-11-06 22:50:05,141 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-06 22:50:05,141 INFO L218 hiAutomatonCegarLoop]: Abstraction has 324 states and 462 transitions. [2023-11-06 22:50:05,142 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 324 states and 462 transitions. [2023-11-06 22:50:05,148 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 324 to 324. [2023-11-06 22:50:05,149 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 324 states, 320 states have (on average 1.425) internal successors, (456), 319 states have internal predecessors, (456), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-06 22:50:05,151 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 324 states to 324 states and 462 transitions. [2023-11-06 22:50:05,152 INFO L240 hiAutomatonCegarLoop]: Abstraction has 324 states and 462 transitions. [2023-11-06 22:50:05,152 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-06 22:50:05,155 INFO L428 stractBuchiCegarLoop]: Abstraction has 324 states and 462 transitions. [2023-11-06 22:50:05,156 INFO L335 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2023-11-06 22:50:05,156 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 324 states and 462 transitions. [2023-11-06 22:50:05,158 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 317 [2023-11-06 22:50:05,158 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-06 22:50:05,159 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-06 22:50:05,159 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-06 22:50:05,159 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-06 22:50:05,160 INFO L748 eck$LassoCheckResult]: Stem: 7990#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 7991#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 7865#L715-4 [2023-11-06 22:50:05,161 INFO L750 eck$LassoCheckResult]: Loop: 7865#L715-4 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 8022#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 7799#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 7800#L717-2 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 7930#L722-269 havoc main_~_ha_hashv~0#1; 8014#L722-176 goto; 7968#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 7828#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 7829#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 7757#L722-73 assume !main_#t~switch31#1; 7758#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 7866#L722-76 assume !main_#t~switch31#1; 7867#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 7901#L722-79 assume !main_#t~switch31#1; 7902#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 7971#L722-82 assume !main_#t~switch31#1; 7803#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 7804#L722-85 assume !main_#t~switch31#1; 7831#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 7821#L722-88 assume !main_#t~switch31#1; 7822#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 8004#L722-91 assume !main_#t~switch31#1; 7749#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 7750#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 7751#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 7752#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 7946#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 7783#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 7784#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 7895#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 8013#L722-105 havoc main_#t~switch31#1; 8002#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 8000#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 7996#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7994#L722-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 7995#L722-116 assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~nondet44#1 := main_~_hj_j~0#1; 7910#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7911#L722-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 7735#L722-123 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet45#1 := main_~_ha_hashv~0#1; 7736#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 8035#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 7762#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 8033#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 7913#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 8030#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 7951#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7952#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 7789#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7881#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 7882#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7947#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 7723#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 7724#L722-170 goto; 7959#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 7923#L722-173 goto; 7924#L722-175 goto; 7988#L722-266 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 8007#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 8009#L722-194 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 7810#L722-193 goto; 7811#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 7839#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 7840#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 7908#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 7918#L722-202 goto; 7819#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 7820#L722-205 assume main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem89#1.base, 12 + main_#t~mem89#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset; 7955#L722-207 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 7830#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 7742#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 7743#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 7886#L722-260 goto; 7963#L722-262 havoc main_~_ha_bkt~0#1; 7928#L722-263 goto; 7929#L722-265 goto; 7863#L722-267 havoc main_~_ha_hashv~0#1; 7738#L722-268 goto; 7739#L715-3 call main_#t~mem3#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 7865#L715-4 [2023-11-06 22:50:05,162 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-11-06 22:50:05,162 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 9 times [2023-11-06 22:50:05,162 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-06 22:50:05,162 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [787009532] [2023-11-06 22:50:05,162 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 22:50:05,163 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-06 22:50:05,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-06 22:50:05,182 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-06 22:50:05,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-06 22:50:05,202 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-06 22:50:05,203 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-11-06 22:50:05,203 INFO L85 PathProgramCache]: Analyzing trace with hash -915801098, now seen corresponding path program 1 times [2023-11-06 22:50:05,203 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-06 22:50:05,203 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1189178472] [2023-11-06 22:50:05,204 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 22:50:05,204 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-06 22:50:05,252 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-06 22:50:05,252 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1456078519] [2023-11-06 22:50:05,253 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 22:50:05,253 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-06 22:50:05,253 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 22:50:05,257 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-06 22:50:05,295 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2023-11-06 22:50:05,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-06 22:50:05,765 INFO L262 TraceCheckSpWp]: Trace formula consists of 512 conjuncts, 13 conjunts are in the unsatisfiable core [2023-11-06 22:50:05,767 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-06 22:50:05,885 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-06 22:50:05,885 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-06 22:50:05,885 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-06 22:50:05,885 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1189178472] [2023-11-06 22:50:05,886 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-06 22:50:05,886 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1456078519] [2023-11-06 22:50:05,886 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1456078519] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-06 22:50:05,886 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-06 22:50:05,886 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2023-11-06 22:50:05,887 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1979334868] [2023-11-06 22:50:05,887 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-06 22:50:05,887 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-06 22:50:05,887 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-06 22:50:05,888 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-06 22:50:05,888 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2023-11-06 22:50:05,888 INFO L87 Difference]: Start difference. First operand 324 states and 462 transitions. cyclomatic complexity: 141 Second operand has 7 states, 7 states have (on average 11.142857142857142) internal successors, (78), 7 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-06 22:50:06,428 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-06 22:50:06,428 INFO L93 Difference]: Finished difference Result 330 states and 470 transitions. [2023-11-06 22:50:06,428 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 330 states and 470 transitions. [2023-11-06 22:50:06,431 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 323 [2023-11-06 22:50:06,435 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 330 states to 330 states and 470 transitions. [2023-11-06 22:50:06,436 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 330 [2023-11-06 22:50:06,436 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 330 [2023-11-06 22:50:06,436 INFO L73 IsDeterministic]: Start isDeterministic. Operand 330 states and 470 transitions. [2023-11-06 22:50:06,437 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-06 22:50:06,437 INFO L218 hiAutomatonCegarLoop]: Abstraction has 330 states and 470 transitions. [2023-11-06 22:50:06,438 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 330 states and 470 transitions. [2023-11-06 22:50:06,443 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 330 to 326. [2023-11-06 22:50:06,444 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 326 states, 322 states have (on average 1.4223602484472049) internal successors, (458), 321 states have internal predecessors, (458), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-06 22:50:06,447 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 326 states to 326 states and 464 transitions. [2023-11-06 22:50:06,447 INFO L240 hiAutomatonCegarLoop]: Abstraction has 326 states and 464 transitions. [2023-11-06 22:50:06,449 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2023-11-06 22:50:06,451 INFO L428 stractBuchiCegarLoop]: Abstraction has 326 states and 464 transitions. [2023-11-06 22:50:06,451 INFO L335 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2023-11-06 22:50:06,451 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 326 states and 464 transitions. [2023-11-06 22:50:06,453 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 319 [2023-11-06 22:50:06,453 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-06 22:50:06,454 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-06 22:50:06,454 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-06 22:50:06,454 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-06 22:50:06,455 INFO L748 eck$LassoCheckResult]: Stem: 8890#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 8891#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 8767#L715-4 [2023-11-06 22:50:06,455 INFO L750 eck$LassoCheckResult]: Loop: 8767#L715-4 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 8923#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 8697#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 8698#L717-2 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 8832#L722-269 havoc main_~_ha_hashv~0#1; 8914#L722-176 goto; 8869#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 8729#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 8730#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 8658#L722-73 assume !main_#t~switch31#1; 8659#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 8768#L722-76 assume !main_#t~switch31#1; 8769#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 8803#L722-79 assume !main_#t~switch31#1; 8804#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 8872#L722-82 assume !main_#t~switch31#1; 8704#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 8705#L722-85 assume !main_#t~switch31#1; 8732#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 8722#L722-88 assume !main_#t~switch31#1; 8723#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 8904#L722-91 assume !main_#t~switch31#1; 8650#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 8651#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 8652#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 8653#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 8847#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 8684#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 8685#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 8797#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 8913#L722-105 havoc main_#t~switch31#1; 8902#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 8900#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 8896#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 8894#L722-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 8895#L722-116 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 8866#L722-118 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);assume main_#t~nondet44#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 8812#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 8813#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 8938#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 8936#L722-128 assume !(0 == main_~_hj_i~0#1 % 4294967296); 8937#L722-130 assume 0 == main_~_ha_hashv~0#1 % 4294967296 / 4096 % 4294967296;main_#t~nondet46#1 := main_~_hj_i~0#1; 8663#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 8934#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 8815#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 8931#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 8852#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 8853#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 8690#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 8783#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 8784#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 8848#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 8624#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 8625#L722-170 goto; 8861#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 8825#L722-173 goto; 8826#L722-175 goto; 8888#L722-266 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 8907#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 8909#L722-194 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 8711#L722-193 goto; 8712#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 8740#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 8741#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 8808#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 8820#L722-202 goto; 8720#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 8721#L722-205 assume main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem89#1.base, 12 + main_#t~mem89#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset; 8857#L722-207 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 8731#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 8641#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 8642#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 8788#L722-260 goto; 8865#L722-262 havoc main_~_ha_bkt~0#1; 8830#L722-263 goto; 8831#L722-265 goto; 8764#L722-267 havoc main_~_ha_hashv~0#1; 8644#L722-268 goto; 8645#L715-3 call main_#t~mem3#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 8767#L715-4 [2023-11-06 22:50:06,456 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-11-06 22:50:06,456 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 10 times [2023-11-06 22:50:06,456 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-06 22:50:06,456 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1169108053] [2023-11-06 22:50:06,456 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 22:50:06,457 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-06 22:50:06,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-06 22:50:06,474 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-06 22:50:06,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-06 22:50:06,492 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-06 22:50:06,493 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-11-06 22:50:06,494 INFO L85 PathProgramCache]: Analyzing trace with hash 764528357, now seen corresponding path program 1 times [2023-11-06 22:50:06,494 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-06 22:50:06,494 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1575884177] [2023-11-06 22:50:06,494 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 22:50:06,495 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-06 22:50:06,588 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-06 22:50:06,588 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1679924923] [2023-11-06 22:50:06,588 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 22:50:06,588 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-06 22:50:06,589 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 22:50:06,593 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-06 22:50:06,606 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2023-11-06 22:50:08,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-06 22:50:08,462 INFO L262 TraceCheckSpWp]: Trace formula consists of 511 conjuncts, 20 conjunts are in the unsatisfiable core [2023-11-06 22:50:08,464 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-06 22:50:08,717 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-06 22:50:08,718 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-06 22:50:08,718 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-06 22:50:08,722 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1575884177] [2023-11-06 22:50:08,722 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-06 22:50:08,722 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1679924923] [2023-11-06 22:50:08,722 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1679924923] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-06 22:50:08,723 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-06 22:50:08,723 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2023-11-06 22:50:08,723 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [776655536] [2023-11-06 22:50:08,723 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-06 22:50:08,724 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-06 22:50:08,724 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-06 22:50:08,724 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2023-11-06 22:50:08,724 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2023-11-06 22:50:08,725 INFO L87 Difference]: Start difference. First operand 326 states and 464 transitions. cyclomatic complexity: 141 Second operand has 10 states, 10 states have (on average 7.9) internal successors, (79), 10 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-06 22:50:20,911 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-06 22:50:33,117 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-06 22:50:45,446 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.02s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-06 22:50:45,924 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-06 22:50:45,924 INFO L93 Difference]: Finished difference Result 337 states and 480 transitions. [2023-11-06 22:50:45,924 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 337 states and 480 transitions. [2023-11-06 22:50:45,927 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 330 [2023-11-06 22:50:45,931 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 337 states to 337 states and 480 transitions. [2023-11-06 22:50:45,931 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 337 [2023-11-06 22:50:45,931 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 337 [2023-11-06 22:50:45,931 INFO L73 IsDeterministic]: Start isDeterministic. Operand 337 states and 480 transitions. [2023-11-06 22:50:45,932 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-06 22:50:45,932 INFO L218 hiAutomatonCegarLoop]: Abstraction has 337 states and 480 transitions. [2023-11-06 22:50:45,933 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 337 states and 480 transitions. [2023-11-06 22:50:45,938 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 337 to 330. [2023-11-06 22:50:45,939 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 330 states, 326 states have (on average 1.4202453987730062) internal successors, (463), 325 states have internal predecessors, (463), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-06 22:50:45,941 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 330 states to 330 states and 469 transitions. [2023-11-06 22:50:45,941 INFO L240 hiAutomatonCegarLoop]: Abstraction has 330 states and 469 transitions. [2023-11-06 22:50:45,942 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2023-11-06 22:50:45,943 INFO L428 stractBuchiCegarLoop]: Abstraction has 330 states and 469 transitions. [2023-11-06 22:50:45,943 INFO L335 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2023-11-06 22:50:45,943 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 330 states and 469 transitions. [2023-11-06 22:50:45,945 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 323 [2023-11-06 22:50:45,945 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-06 22:50:45,945 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-06 22:50:45,946 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-06 22:50:45,946 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-06 22:50:45,946 INFO L748 eck$LassoCheckResult]: Stem: 9809#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 9810#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 9683#L715-4 [2023-11-06 22:50:45,946 INFO L750 eck$LassoCheckResult]: Loop: 9683#L715-4 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 9842#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 9618#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 9619#L717-2 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 9748#L722-269 havoc main_~_ha_hashv~0#1; 9832#L722-176 goto; 9787#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 9645#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 9646#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 9578#L722-73 assume !main_#t~switch31#1; 9579#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 9684#L722-76 assume !main_#t~switch31#1; 9685#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 9719#L722-79 assume !main_#t~switch31#1; 9720#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 9789#L722-82 assume !main_#t~switch31#1; 9620#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 9621#L722-85 assume !main_#t~switch31#1; 9648#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 9638#L722-88 assume !main_#t~switch31#1; 9639#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 9822#L722-91 assume !main_#t~switch31#1; 9566#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 9567#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 9568#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 9569#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 9763#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 9600#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 9601#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 9713#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 9831#L722-105 havoc main_#t~switch31#1; 9820#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 9818#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 9814#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 9812#L722-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 9813#L722-116 assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~nondet44#1 := main_~_hj_j~0#1; 9844#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 9859#L722-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 9858#L722-123 assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296); 9840#L722-125 assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);assume main_#t~nondet45#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296; 9841#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 9860#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 9577#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 9852#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 9731#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 9849#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 9770#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 9771#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 9606#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 9699#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 9700#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 9764#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 9540#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 9541#L722-170 goto; 9778#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 9741#L722-173 goto; 9742#L722-175 goto; 9806#L722-266 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 9825#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 9827#L722-194 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 9627#L722-193 goto; 9628#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 9656#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 9657#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 9724#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 9736#L722-202 goto; 9636#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 9637#L722-205 assume main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem89#1.base, 12 + main_#t~mem89#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset; 9774#L722-207 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 9647#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 9557#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 9558#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 9704#L722-260 goto; 9782#L722-262 havoc main_~_ha_bkt~0#1; 9746#L722-263 goto; 9747#L722-265 goto; 9678#L722-267 havoc main_~_ha_hashv~0#1; 9560#L722-268 goto; 9561#L715-3 call main_#t~mem3#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 9683#L715-4 [2023-11-06 22:50:45,947 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-11-06 22:50:45,947 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 11 times [2023-11-06 22:50:45,947 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-06 22:50:45,947 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [839396097] [2023-11-06 22:50:45,948 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 22:50:45,948 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-06 22:50:45,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-06 22:50:45,960 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-06 22:50:45,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-06 22:50:45,975 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-06 22:50:45,975 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-11-06 22:50:45,976 INFO L85 PathProgramCache]: Analyzing trace with hash -306625747, now seen corresponding path program 1 times [2023-11-06 22:50:45,976 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-06 22:50:45,976 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [700859485] [2023-11-06 22:50:45,976 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 22:50:45,976 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-06 22:50:46,021 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-06 22:50:46,022 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1790192700] [2023-11-06 22:50:46,022 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 22:50:46,022 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-06 22:50:46,022 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 22:50:46,029 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-06 22:50:46,043 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2023-11-06 22:50:52,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-06 22:50:52,174 INFO L262 TraceCheckSpWp]: Trace formula consists of 511 conjuncts, 9 conjunts are in the unsatisfiable core [2023-11-06 22:50:52,176 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-06 22:50:52,247 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-06 22:50:52,247 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-06 22:50:52,247 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-06 22:50:52,247 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [700859485] [2023-11-06 22:50:52,247 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-06 22:50:52,248 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1790192700] [2023-11-06 22:50:52,248 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1790192700] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-06 22:50:52,248 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-06 22:50:52,248 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2023-11-06 22:50:52,248 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1164353229] [2023-11-06 22:50:52,248 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-06 22:50:52,249 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-06 22:50:52,249 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-06 22:50:52,249 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2023-11-06 22:50:52,249 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2023-11-06 22:50:52,250 INFO L87 Difference]: Start difference. First operand 330 states and 469 transitions. cyclomatic complexity: 142 Second operand has 6 states, 6 states have (on average 13.166666666666666) internal successors, (79), 6 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-06 22:50:52,490 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-06 22:50:52,490 INFO L93 Difference]: Finished difference Result 337 states and 478 transitions. [2023-11-06 22:50:52,490 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 337 states and 478 transitions. [2023-11-06 22:50:52,494 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 330 [2023-11-06 22:50:52,498 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 337 states to 337 states and 478 transitions. [2023-11-06 22:50:52,498 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 337 [2023-11-06 22:50:52,498 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 337 [2023-11-06 22:50:52,498 INFO L73 IsDeterministic]: Start isDeterministic. Operand 337 states and 478 transitions. [2023-11-06 22:50:52,499 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-06 22:50:52,499 INFO L218 hiAutomatonCegarLoop]: Abstraction has 337 states and 478 transitions. [2023-11-06 22:50:52,500 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 337 states and 478 transitions. [2023-11-06 22:50:52,505 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 337 to 330. [2023-11-06 22:50:52,506 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 330 states, 326 states have (on average 1.4171779141104295) internal successors, (462), 325 states have internal predecessors, (462), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-06 22:50:52,508 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 330 states to 330 states and 468 transitions. [2023-11-06 22:50:52,508 INFO L240 hiAutomatonCegarLoop]: Abstraction has 330 states and 468 transitions. [2023-11-06 22:50:52,508 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2023-11-06 22:50:52,509 INFO L428 stractBuchiCegarLoop]: Abstraction has 330 states and 468 transitions. [2023-11-06 22:50:52,509 INFO L335 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2023-11-06 22:50:52,509 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 330 states and 468 transitions. [2023-11-06 22:50:52,512 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 323 [2023-11-06 22:50:52,512 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-06 22:50:52,512 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-06 22:50:52,512 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-06 22:50:52,513 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-06 22:50:52,513 INFO L748 eck$LassoCheckResult]: Stem: 10720#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 10721#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 10597#L715-4 [2023-11-06 22:50:52,513 INFO L750 eck$LassoCheckResult]: Loop: 10597#L715-4 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 10754#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 10532#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 10533#L717-2 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 10662#L722-269 havoc main_~_ha_hashv~0#1; 10745#L722-176 goto; 10699#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 10559#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 10560#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 10490#L722-73 assume !main_#t~switch31#1; 10491#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 10598#L722-76 assume !main_#t~switch31#1; 10599#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 10633#L722-79 assume !main_#t~switch31#1; 10634#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 10702#L722-82 assume !main_#t~switch31#1; 10534#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 10535#L722-85 assume !main_#t~switch31#1; 10562#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 10554#L722-88 assume !main_#t~switch31#1; 10555#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 10735#L722-91 assume !main_#t~switch31#1; 10480#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 10481#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 10482#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 10483#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 10680#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 10514#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 10515#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 10627#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 10744#L722-105 havoc main_#t~switch31#1; 10733#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 10731#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 10726#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 10727#L722-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 10756#L722-116 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 10696#L722-118 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);assume main_#t~nondet44#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 10642#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 10643#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 10774#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 10773#L722-128 assume !(0 == main_~_hj_i~0#1 % 4294967296); 10771#L722-130 assume 0 == main_~_ha_hashv~0#1 % 4294967296 / 4096 % 4294967296;main_#t~nondet46#1 := main_~_hj_i~0#1; 10770#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 10769#L722-135 assume !(0 == main_~_hj_j~0#1 % 4294967296); 10768#L722-137 assume 0 == 65536 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~nondet47#1 := main_~_hj_j~0#1; 10644#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 10762#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 10682#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 10683#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 10518#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 10610#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 10611#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 10675#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 10452#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 10453#L722-170 goto; 10689#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 10655#L722-173 goto; 10656#L722-175 goto; 10718#L722-266 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 10738#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 10740#L722-194 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 10539#L722-193 goto; 10540#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 10568#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 10569#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 10638#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 10649#L722-202 goto; 10550#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 10551#L722-205 assume main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem89#1.base, 12 + main_#t~mem89#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset; 10686#L722-207 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 10561#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 10471#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 10472#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 10618#L722-260 goto; 10693#L722-262 havoc main_~_ha_bkt~0#1; 10660#L722-263 goto; 10661#L722-265 goto; 10590#L722-267 havoc main_~_ha_hashv~0#1; 10474#L722-268 goto; 10475#L715-3 call main_#t~mem3#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 10597#L715-4 [2023-11-06 22:50:52,514 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-11-06 22:50:52,514 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 12 times [2023-11-06 22:50:52,514 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-06 22:50:52,514 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [119378313] [2023-11-06 22:50:52,514 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 22:50:52,515 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-06 22:50:52,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-06 22:50:52,526 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-06 22:50:52,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-06 22:50:52,540 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-06 22:50:52,541 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-11-06 22:50:52,541 INFO L85 PathProgramCache]: Analyzing trace with hash -124709969, now seen corresponding path program 1 times [2023-11-06 22:50:52,541 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-06 22:50:52,542 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1035461814] [2023-11-06 22:50:52,542 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 22:50:52,542 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-06 22:50:52,587 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-06 22:50:52,587 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [715318334] [2023-11-06 22:50:52,588 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-06 22:50:52,588 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-06 22:50:52,588 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/z3 [2023-11-06 22:50:52,593 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-06 22:50:52,621 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3eafa62e-6360-463c-a597-e2cb89e8dd47/bin/uautomizer-verify-WvqO1wxjHP/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process