./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/termination-crafted/Arrays03-ValueRestictsIndex-2.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version cf1a7837 Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/termination-crafted/Arrays03-ValueRestictsIndex-2.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 302c18c494f9017ecbb07643194b1d54ba0a6bba467355d4f775638dea57e539 --- Real Ultimate output --- This is Ultimate 0.2.3-dev-cf1a783 [2023-11-12 02:21:13,553 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-12 02:21:13,654 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/config/svcomp-Termination-64bit-Automizer_Default.epf [2023-11-12 02:21:13,660 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-12 02:21:13,660 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-12 02:21:13,689 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-12 02:21:13,690 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-12 02:21:13,690 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-12 02:21:13,692 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-12 02:21:13,697 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-12 02:21:13,698 INFO L153 SettingsManager]: * Use SBE=true [2023-11-12 02:21:13,698 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-12 02:21:13,699 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-12 02:21:13,701 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-12 02:21:13,701 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-12 02:21:13,702 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-12 02:21:13,702 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-12 02:21:13,703 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-12 02:21:13,703 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-12 02:21:13,704 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-12 02:21:13,706 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-12 02:21:13,706 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-12 02:21:13,707 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-12 02:21:13,707 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-12 02:21:13,708 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-12 02:21:13,708 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-12 02:21:13,708 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-12 02:21:13,709 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-12 02:21:13,709 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-12 02:21:13,710 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-12 02:21:13,711 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-12 02:21:13,712 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-12 02:21:13,713 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-12 02:21:13,713 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 302c18c494f9017ecbb07643194b1d54ba0a6bba467355d4f775638dea57e539 [2023-11-12 02:21:13,989 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-12 02:21:14,028 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-12 02:21:14,031 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-12 02:21:14,033 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-12 02:21:14,034 INFO L274 PluginConnector]: CDTParser initialized [2023-11-12 02:21:14,035 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/../../sv-benchmarks/c/termination-crafted/Arrays03-ValueRestictsIndex-2.c [2023-11-12 02:21:17,245 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-12 02:21:17,476 INFO L384 CDTParser]: Found 1 translation units. [2023-11-12 02:21:17,477 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/sv-benchmarks/c/termination-crafted/Arrays03-ValueRestictsIndex-2.c [2023-11-12 02:21:17,484 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/data/d56eed327/98a581eb4d484b2ab8e6a366bd173dbb/FLAG14b238199 [2023-11-12 02:21:17,504 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/data/d56eed327/98a581eb4d484b2ab8e6a366bd173dbb [2023-11-12 02:21:17,510 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-12 02:21:17,512 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-12 02:21:17,518 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-12 02:21:17,519 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-12 02:21:17,525 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-12 02:21:17,526 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.11 02:21:17" (1/1) ... [2023-11-12 02:21:17,528 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@621ffa35 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 02:21:17, skipping insertion in model container [2023-11-12 02:21:17,529 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.11 02:21:17" (1/1) ... [2023-11-12 02:21:17,554 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-12 02:21:17,749 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-12 02:21:17,759 INFO L202 MainTranslator]: Completed pre-run [2023-11-12 02:21:17,780 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-12 02:21:17,803 INFO L206 MainTranslator]: Completed translation [2023-11-12 02:21:17,803 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 02:21:17 WrapperNode [2023-11-12 02:21:17,804 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-12 02:21:17,805 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-12 02:21:17,805 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-12 02:21:17,806 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-12 02:21:17,813 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 02:21:17" (1/1) ... [2023-11-12 02:21:17,820 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 02:21:17" (1/1) ... [2023-11-12 02:21:17,841 INFO L138 Inliner]: procedures = 8, calls = 8, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 48 [2023-11-12 02:21:17,841 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-12 02:21:17,842 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-12 02:21:17,843 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-12 02:21:17,843 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-12 02:21:17,853 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 02:21:17" (1/1) ... [2023-11-12 02:21:17,854 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 02:21:17" (1/1) ... [2023-11-12 02:21:17,870 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 02:21:17" (1/1) ... [2023-11-12 02:21:17,871 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 02:21:17" (1/1) ... [2023-11-12 02:21:17,876 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 02:21:17" (1/1) ... [2023-11-12 02:21:17,884 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 02:21:17" (1/1) ... [2023-11-12 02:21:17,885 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 02:21:17" (1/1) ... [2023-11-12 02:21:17,886 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 02:21:17" (1/1) ... [2023-11-12 02:21:17,888 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-12 02:21:17,889 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-12 02:21:17,889 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-12 02:21:17,889 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-12 02:21:17,890 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 02:21:17" (1/1) ... [2023-11-12 02:21:17,896 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-12 02:21:17,912 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 [2023-11-12 02:21:17,951 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-12 02:21:17,963 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-12 02:21:17,993 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2023-11-12 02:21:17,993 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-12 02:21:17,993 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-12 02:21:17,993 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2023-11-12 02:21:17,993 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2023-11-12 02:21:17,994 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-11-12 02:21:18,072 INFO L236 CfgBuilder]: Building ICFG [2023-11-12 02:21:18,074 INFO L262 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-12 02:21:18,212 INFO L277 CfgBuilder]: Performing block encoding [2023-11-12 02:21:18,218 INFO L297 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-12 02:21:18,219 INFO L302 CfgBuilder]: Removed 2 assume(true) statements. [2023-11-12 02:21:18,221 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.11 02:21:18 BoogieIcfgContainer [2023-11-12 02:21:18,221 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-12 02:21:18,223 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-12 02:21:18,223 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-12 02:21:18,227 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-12 02:21:18,228 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-12 02:21:18,228 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 12.11 02:21:17" (1/3) ... [2023-11-12 02:21:18,229 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7654048b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 12.11 02:21:18, skipping insertion in model container [2023-11-12 02:21:18,230 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-12 02:21:18,230 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 02:21:17" (2/3) ... [2023-11-12 02:21:18,230 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7654048b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 12.11 02:21:18, skipping insertion in model container [2023-11-12 02:21:18,231 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-12 02:21:18,231 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.11 02:21:18" (3/3) ... [2023-11-12 02:21:18,232 INFO L332 chiAutomizerObserver]: Analyzing ICFG Arrays03-ValueRestictsIndex-2.c [2023-11-12 02:21:18,288 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-12 02:21:18,288 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-12 02:21:18,288 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-12 02:21:18,289 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-12 02:21:18,289 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-12 02:21:18,289 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-12 02:21:18,289 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-12 02:21:18,290 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-12 02:21:18,294 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 14 states, 13 states have (on average 1.5384615384615385) internal successors, (20), 13 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-12 02:21:18,310 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 3 [2023-11-12 02:21:18,311 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-12 02:21:18,311 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-12 02:21:18,316 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-12 02:21:18,317 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-12 02:21:18,317 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-12 02:21:18,318 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 14 states, 13 states have (on average 1.5384615384615385) internal successors, (20), 13 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-12 02:21:18,319 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 3 [2023-11-12 02:21:18,320 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-12 02:21:18,320 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-12 02:21:18,320 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-12 02:21:18,320 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-12 02:21:18,328 INFO L748 eck$LassoCheckResult]: Stem: 11#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 5#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 3#L15-3true [2023-11-12 02:21:18,329 INFO L750 eck$LassoCheckResult]: Loop: 3#L15-3true assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 7#L15-2true main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 3#L15-3true [2023-11-12 02:21:18,335 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-12 02:21:18,335 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2023-11-12 02:21:18,345 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-12 02:21:18,346 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [293413810] [2023-11-12 02:21:18,347 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-12 02:21:18,347 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-12 02:21:18,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-12 02:21:18,490 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-12 02:21:18,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-12 02:21:18,533 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-12 02:21:18,537 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-12 02:21:18,537 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2023-11-12 02:21:18,538 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-12 02:21:18,538 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2036425371] [2023-11-12 02:21:18,539 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-12 02:21:18,539 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-12 02:21:18,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-12 02:21:18,565 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-12 02:21:18,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-12 02:21:18,589 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-12 02:21:18,591 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-12 02:21:18,591 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2023-11-12 02:21:18,592 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-12 02:21:18,592 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1072792321] [2023-11-12 02:21:18,592 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-12 02:21:18,593 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-12 02:21:18,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-12 02:21:18,630 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-12 02:21:18,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-12 02:21:18,660 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-12 02:21:18,933 INFO L210 LassoAnalysis]: Preferences: [2023-11-12 02:21:18,934 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-12 02:21:18,934 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-12 02:21:18,935 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-12 02:21:18,935 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2023-11-12 02:21:18,935 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-12 02:21:18,935 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-12 02:21:18,935 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-12 02:21:18,936 INFO L133 ssoRankerPreferences]: Filename of dumped script: Arrays03-ValueRestictsIndex-2.c_Iteration1_Lasso [2023-11-12 02:21:18,936 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-12 02:21:18,936 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-12 02:21:18,955 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-12 02:21:18,965 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-12 02:21:18,969 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-12 02:21:18,972 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-12 02:21:18,975 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-12 02:21:19,095 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-12 02:21:19,098 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-12 02:21:19,101 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-12 02:21:19,104 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-12 02:21:19,108 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-12 02:21:19,114 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-12 02:21:19,308 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-12 02:21:19,313 INFO L490 LassoAnalysis]: Using template 'affine'. [2023-11-12 02:21:19,315 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-12 02:21:19,315 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 [2023-11-12 02:21:19,319 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-12 02:21:19,327 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2023-11-12 02:21:19,328 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-12 02:21:19,342 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-12 02:21:19,342 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-12 02:21:19,343 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-12 02:21:19,343 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-12 02:21:19,343 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-12 02:21:19,346 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-12 02:21:19,346 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-12 02:21:19,356 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-12 02:21:19,366 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2023-11-12 02:21:19,366 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-12 02:21:19,366 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 [2023-11-12 02:21:19,368 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-12 02:21:19,373 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2023-11-12 02:21:19,374 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-12 02:21:19,386 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-12 02:21:19,387 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-12 02:21:19,387 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-12 02:21:19,387 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-12 02:21:19,387 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-12 02:21:19,388 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-12 02:21:19,388 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-12 02:21:19,397 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-12 02:21:19,401 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Ended with exit code 0 [2023-11-12 02:21:19,401 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-12 02:21:19,402 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 [2023-11-12 02:21:19,403 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-12 02:21:19,431 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2023-11-12 02:21:19,437 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-12 02:21:19,450 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-12 02:21:19,450 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-12 02:21:19,451 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-12 02:21:19,451 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-12 02:21:19,451 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-12 02:21:19,453 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-12 02:21:19,453 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-12 02:21:19,465 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-12 02:21:19,475 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2023-11-12 02:21:19,475 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-12 02:21:19,476 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 [2023-11-12 02:21:19,477 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-12 02:21:19,482 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2023-11-12 02:21:19,482 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-12 02:21:19,495 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-12 02:21:19,495 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-12 02:21:19,496 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-12 02:21:19,496 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-12 02:21:19,496 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-12 02:21:19,497 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-12 02:21:19,497 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-12 02:21:19,513 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-12 02:21:19,521 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2023-11-12 02:21:19,522 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-12 02:21:19,522 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 [2023-11-12 02:21:19,524 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-12 02:21:19,527 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2023-11-12 02:21:19,528 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-12 02:21:19,541 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-12 02:21:19,542 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-12 02:21:19,542 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-12 02:21:19,542 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-12 02:21:19,547 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-12 02:21:19,547 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-12 02:21:19,560 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-12 02:21:19,569 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2023-11-12 02:21:19,570 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-12 02:21:19,570 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 [2023-11-12 02:21:19,572 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-12 02:21:19,578 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-12 02:21:19,591 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-12 02:21:19,592 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-12 02:21:19,592 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-12 02:21:19,592 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-12 02:21:19,593 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2023-11-12 02:21:19,598 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-12 02:21:19,598 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-12 02:21:19,612 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-12 02:21:19,621 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2023-11-12 02:21:19,621 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-12 02:21:19,621 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 [2023-11-12 02:21:19,624 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-12 02:21:19,634 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2023-11-12 02:21:19,635 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-12 02:21:19,647 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-12 02:21:19,648 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-12 02:21:19,648 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-12 02:21:19,648 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-12 02:21:19,660 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-12 02:21:19,661 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-12 02:21:19,677 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2023-11-12 02:21:19,705 INFO L443 ModelExtractionUtils]: Simplification made 11 calls to the SMT solver. [2023-11-12 02:21:19,706 INFO L444 ModelExtractionUtils]: 0 out of 13 variables were initially zero. Simplification set additionally 10 variables to zero. [2023-11-12 02:21:19,707 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-12 02:21:19,708 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 [2023-11-12 02:21:19,746 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-12 02:21:19,770 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2023-11-12 02:21:19,770 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2023-11-12 02:21:19,803 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2023-11-12 02:21:19,803 INFO L513 LassoAnalysis]: Proved termination. [2023-11-12 02:21:19,804 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select #length ULTIMATE.start_main_~#a~0#1.base)_1, ULTIMATE.start_main_~i~0#1) = 2095*v_rep(select #length ULTIMATE.start_main_~#a~0#1.base)_1 - 8*ULTIMATE.start_main_~i~0#1 Supporting invariants [] [2023-11-12 02:21:19,819 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2023-11-12 02:21:19,826 INFO L156 tatePredicateManager]: 1 out of 1 supporting invariants were superfluous and have been removed [2023-11-12 02:21:19,837 WARN L1567 BoogieBacktranslator]: Unfinished Backtranslation: ArrayAccessExpression #length[~#a~0!base] could not be translated [2023-11-12 02:21:19,862 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-12 02:21:19,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-12 02:21:19,877 INFO L262 TraceCheckSpWp]: Trace formula consists of 19 conjuncts, 2 conjunts are in the unsatisfiable core [2023-11-12 02:21:19,879 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-12 02:21:19,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-12 02:21:19,898 INFO L262 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 6 conjunts are in the unsatisfiable core [2023-11-12 02:21:19,899 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-12 02:21:19,964 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-12 02:21:19,999 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2023-11-12 02:21:20,002 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 14 states, 13 states have (on average 1.5384615384615385) internal successors, (20), 13 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-12 02:21:20,057 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 14 states, 13 states have (on average 1.5384615384615385) internal successors, (20), 13 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 27 states and 41 transitions. Complement of second has 8 states. [2023-11-12 02:21:20,060 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2023-11-12 02:21:20,083 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-12 02:21:20,085 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 20 transitions. [2023-11-12 02:21:20,094 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2023-11-12 02:21:20,098 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 20 transitions. Stem has 2 letters. Loop has 2 letters. [2023-11-12 02:21:20,099 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-12 02:21:20,099 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 20 transitions. Stem has 4 letters. Loop has 2 letters. [2023-11-12 02:21:20,106 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-12 02:21:20,106 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 20 transitions. Stem has 2 letters. Loop has 4 letters. [2023-11-12 02:21:20,106 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-12 02:21:20,107 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 27 states and 41 transitions. [2023-11-12 02:21:20,110 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-11-12 02:21:20,114 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 27 states to 10 states and 13 transitions. [2023-11-12 02:21:20,115 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2023-11-12 02:21:20,116 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2023-11-12 02:21:20,117 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10 states and 13 transitions. [2023-11-12 02:21:20,117 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-12 02:21:20,117 INFO L218 hiAutomatonCegarLoop]: Abstraction has 10 states and 13 transitions. [2023-11-12 02:21:20,140 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10 states and 13 transitions. [2023-11-12 02:21:20,161 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10 to 10. [2023-11-12 02:21:20,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.3) internal successors, (13), 9 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-12 02:21:20,171 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 13 transitions. [2023-11-12 02:21:20,172 INFO L240 hiAutomatonCegarLoop]: Abstraction has 10 states and 13 transitions. [2023-11-12 02:21:20,172 INFO L428 stractBuchiCegarLoop]: Abstraction has 10 states and 13 transitions. [2023-11-12 02:21:20,172 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-12 02:21:20,172 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 13 transitions. [2023-11-12 02:21:20,177 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-11-12 02:21:20,177 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-12 02:21:20,177 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-12 02:21:20,178 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2023-11-12 02:21:20,178 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2023-11-12 02:21:20,179 INFO L748 eck$LassoCheckResult]: Stem: 91#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 92#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 86#L15-3 assume !(main_~i~0#1 < 1048); 84#L15-4 havoc main_~i~0#1; 85#L19 assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1; 93#L20 assume !main_#t~short5#1; 89#L20-2 assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 90#L22-2 [2023-11-12 02:21:20,179 INFO L750 eck$LassoCheckResult]: Loop: 90#L22-2 assume !!(main_~x~0#1 >= 0);main_~x~0#1 := main_~x~0#1 - main_~k~0#1; 90#L22-2 [2023-11-12 02:21:20,188 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-12 02:21:20,188 INFO L85 PathProgramCache]: Analyzing trace with hash 1807952492, now seen corresponding path program 1 times [2023-11-12 02:21:20,188 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-12 02:21:20,189 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1629154192] [2023-11-12 02:21:20,189 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-12 02:21:20,189 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-12 02:21:20,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-12 02:21:20,265 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-12 02:21:20,266 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-12 02:21:20,266 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1629154192] [2023-11-12 02:21:20,267 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1629154192] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-12 02:21:20,267 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-12 02:21:20,267 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-12 02:21:20,268 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1787002570] [2023-11-12 02:21:20,269 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-12 02:21:20,271 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-12 02:21:20,271 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-12 02:21:20,272 INFO L85 PathProgramCache]: Analyzing trace with hash 68, now seen corresponding path program 1 times [2023-11-12 02:21:20,272 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-12 02:21:20,272 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1388214056] [2023-11-12 02:21:20,272 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-12 02:21:20,273 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-12 02:21:20,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-12 02:21:20,276 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-12 02:21:20,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-12 02:21:20,279 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-12 02:21:20,296 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-12 02:21:20,298 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-11-12 02:21:20,299 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-11-12 02:21:20,301 INFO L87 Difference]: Start difference. First operand 10 states and 13 transitions. cyclomatic complexity: 5 Second operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-12 02:21:20,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-12 02:21:20,315 INFO L93 Difference]: Finished difference Result 11 states and 13 transitions. [2023-11-12 02:21:20,316 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 11 states and 13 transitions. [2023-11-12 02:21:20,317 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-11-12 02:21:20,317 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 11 states to 11 states and 13 transitions. [2023-11-12 02:21:20,317 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2023-11-12 02:21:20,318 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2023-11-12 02:21:20,318 INFO L73 IsDeterministic]: Start isDeterministic. Operand 11 states and 13 transitions. [2023-11-12 02:21:20,318 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-12 02:21:20,318 INFO L218 hiAutomatonCegarLoop]: Abstraction has 11 states and 13 transitions. [2023-11-12 02:21:20,319 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11 states and 13 transitions. [2023-11-12 02:21:20,319 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11 to 10. [2023-11-12 02:21:20,320 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.2) internal successors, (12), 9 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-12 02:21:20,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 12 transitions. [2023-11-12 02:21:20,321 INFO L240 hiAutomatonCegarLoop]: Abstraction has 10 states and 12 transitions. [2023-11-12 02:21:20,321 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-11-12 02:21:20,322 INFO L428 stractBuchiCegarLoop]: Abstraction has 10 states and 12 transitions. [2023-11-12 02:21:20,322 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-12 02:21:20,323 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 12 transitions. [2023-11-12 02:21:20,323 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-11-12 02:21:20,323 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-12 02:21:20,324 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-12 02:21:20,324 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-12 02:21:20,324 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2023-11-12 02:21:20,325 INFO L748 eck$LassoCheckResult]: Stem: 118#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 119#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 113#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 114#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 115#L15-3 assume !(main_~i~0#1 < 1048); 111#L15-4 havoc main_~i~0#1; 112#L19 assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1; 120#L20 assume !main_#t~short5#1; 116#L20-2 assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 117#L22-2 [2023-11-12 02:21:20,325 INFO L750 eck$LassoCheckResult]: Loop: 117#L22-2 assume !!(main_~x~0#1 >= 0);main_~x~0#1 := main_~x~0#1 - main_~k~0#1; 117#L22-2 [2023-11-12 02:21:20,325 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-12 02:21:20,325 INFO L85 PathProgramCache]: Analyzing trace with hash -369324246, now seen corresponding path program 1 times [2023-11-12 02:21:20,326 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-12 02:21:20,326 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1384258359] [2023-11-12 02:21:20,326 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-12 02:21:20,326 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-12 02:21:20,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-12 02:21:20,390 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-12 02:21:20,391 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-12 02:21:20,391 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1384258359] [2023-11-12 02:21:20,391 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1384258359] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-12 02:21:20,391 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [936366255] [2023-11-12 02:21:20,392 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-12 02:21:20,392 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-12 02:21:20,392 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 [2023-11-12 02:21:20,393 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-12 02:21:20,402 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2023-11-12 02:21:20,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-12 02:21:20,458 INFO L262 TraceCheckSpWp]: Trace formula consists of 43 conjuncts, 2 conjunts are in the unsatisfiable core [2023-11-12 02:21:20,459 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-12 02:21:20,475 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2023-11-12 02:21:20,475 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-12 02:21:20,476 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [936366255] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-12 02:21:20,476 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2023-11-12 02:21:20,476 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [4] total 5 [2023-11-12 02:21:20,476 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [80161284] [2023-11-12 02:21:20,477 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-12 02:21:20,477 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-12 02:21:20,477 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-12 02:21:20,478 INFO L85 PathProgramCache]: Analyzing trace with hash 68, now seen corresponding path program 2 times [2023-11-12 02:21:20,478 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-12 02:21:20,478 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [736859085] [2023-11-12 02:21:20,478 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-12 02:21:20,478 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-12 02:21:20,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-12 02:21:20,482 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-12 02:21:20,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-12 02:21:20,485 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-12 02:21:20,512 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-12 02:21:20,513 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-11-12 02:21:20,513 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2023-11-12 02:21:20,513 INFO L87 Difference]: Start difference. First operand 10 states and 12 transitions. cyclomatic complexity: 4 Second operand has 3 states, 2 states have (on average 4.5) internal successors, (9), 3 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-12 02:21:20,527 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-12 02:21:20,527 INFO L93 Difference]: Finished difference Result 11 states and 12 transitions. [2023-11-12 02:21:20,527 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 11 states and 12 transitions. [2023-11-12 02:21:20,530 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-11-12 02:21:20,530 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 11 states to 10 states and 11 transitions. [2023-11-12 02:21:20,531 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2023-11-12 02:21:20,531 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2023-11-12 02:21:20,531 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10 states and 11 transitions. [2023-11-12 02:21:20,531 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-12 02:21:20,531 INFO L218 hiAutomatonCegarLoop]: Abstraction has 10 states and 11 transitions. [2023-11-12 02:21:20,531 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10 states and 11 transitions. [2023-11-12 02:21:20,534 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10 to 10. [2023-11-12 02:21:20,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.1) internal successors, (11), 9 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-12 02:21:20,538 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 11 transitions. [2023-11-12 02:21:20,541 INFO L240 hiAutomatonCegarLoop]: Abstraction has 10 states and 11 transitions. [2023-11-12 02:21:20,542 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-11-12 02:21:20,543 INFO L428 stractBuchiCegarLoop]: Abstraction has 10 states and 11 transitions. [2023-11-12 02:21:20,543 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-12 02:21:20,544 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 11 transitions. [2023-11-12 02:21:20,544 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-11-12 02:21:20,544 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-12 02:21:20,544 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-12 02:21:20,545 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-12 02:21:20,545 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2023-11-12 02:21:20,546 INFO L748 eck$LassoCheckResult]: Stem: 171#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 172#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 168#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 169#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 170#L15-3 assume !(main_~i~0#1 < 1048); 164#L15-4 havoc main_~i~0#1; 165#L19 assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1; 173#L20 assume main_#t~short5#1;call main_#t~mem4#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short5#1 := 42 == main_#t~mem4#1; 166#L20-2 assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 167#L22-2 [2023-11-12 02:21:20,546 INFO L750 eck$LassoCheckResult]: Loop: 167#L22-2 assume !!(main_~x~0#1 >= 0);main_~x~0#1 := main_~x~0#1 - main_~k~0#1; 167#L22-2 [2023-11-12 02:21:20,546 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-12 02:21:20,546 INFO L85 PathProgramCache]: Analyzing trace with hash -369324308, now seen corresponding path program 1 times [2023-11-12 02:21:20,547 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-12 02:21:20,547 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1617426466] [2023-11-12 02:21:20,547 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-12 02:21:20,547 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-12 02:21:20,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-12 02:21:20,660 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-12 02:21:20,661 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-12 02:21:20,661 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1617426466] [2023-11-12 02:21:20,661 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1617426466] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-12 02:21:20,662 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [668048822] [2023-11-12 02:21:20,662 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-12 02:21:20,663 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-12 02:21:20,663 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 [2023-11-12 02:21:20,665 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-12 02:21:20,691 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2023-11-12 02:21:20,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-12 02:21:20,719 INFO L262 TraceCheckSpWp]: Trace formula consists of 50 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-12 02:21:20,720 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-12 02:21:20,735 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-12 02:21:20,736 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-12 02:21:20,765 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-12 02:21:20,765 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [668048822] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-12 02:21:20,765 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-12 02:21:20,766 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2023-11-12 02:21:20,766 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1055041476] [2023-11-12 02:21:20,767 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-12 02:21:20,768 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-12 02:21:20,768 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-12 02:21:20,768 INFO L85 PathProgramCache]: Analyzing trace with hash 68, now seen corresponding path program 3 times [2023-11-12 02:21:20,769 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-12 02:21:20,769 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [717452756] [2023-11-12 02:21:20,769 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-12 02:21:20,769 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-12 02:21:20,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-12 02:21:20,775 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-12 02:21:20,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-12 02:21:20,783 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-12 02:21:20,800 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-12 02:21:20,801 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-12 02:21:20,801 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2023-11-12 02:21:20,801 INFO L87 Difference]: Start difference. First operand 10 states and 11 transitions. cyclomatic complexity: 3 Second operand has 7 states, 7 states have (on average 2.2857142857142856) internal successors, (16), 7 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-12 02:21:20,842 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-12 02:21:20,842 INFO L93 Difference]: Finished difference Result 16 states and 17 transitions. [2023-11-12 02:21:20,843 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 16 states and 17 transitions. [2023-11-12 02:21:20,843 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-11-12 02:21:20,844 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 16 states to 16 states and 17 transitions. [2023-11-12 02:21:20,844 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2023-11-12 02:21:20,844 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2023-11-12 02:21:20,844 INFO L73 IsDeterministic]: Start isDeterministic. Operand 16 states and 17 transitions. [2023-11-12 02:21:20,845 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-12 02:21:20,845 INFO L218 hiAutomatonCegarLoop]: Abstraction has 16 states and 17 transitions. [2023-11-12 02:21:20,845 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states and 17 transitions. [2023-11-12 02:21:20,846 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2023-11-12 02:21:20,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.0625) internal successors, (17), 15 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-12 02:21:20,847 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 17 transitions. [2023-11-12 02:21:20,848 INFO L240 hiAutomatonCegarLoop]: Abstraction has 16 states and 17 transitions. [2023-11-12 02:21:20,848 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2023-11-12 02:21:20,849 INFO L428 stractBuchiCegarLoop]: Abstraction has 16 states and 17 transitions. [2023-11-12 02:21:20,849 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2023-11-12 02:21:20,849 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 16 states and 17 transitions. [2023-11-12 02:21:20,850 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-11-12 02:21:20,850 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-12 02:21:20,850 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-12 02:21:20,851 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 1, 1, 1, 1, 1, 1, 1] [2023-11-12 02:21:20,851 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2023-11-12 02:21:20,851 INFO L748 eck$LassoCheckResult]: Stem: 256#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 257#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 250#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 251#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 252#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 253#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 263#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 262#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 261#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 260#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 259#L15-3 assume !(main_~i~0#1 < 1048); 248#L15-4 havoc main_~i~0#1; 249#L19 assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1; 258#L20 assume main_#t~short5#1;call main_#t~mem4#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short5#1 := 42 == main_#t~mem4#1; 254#L20-2 assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 255#L22-2 [2023-11-12 02:21:20,852 INFO L750 eck$LassoCheckResult]: Loop: 255#L22-2 assume !!(main_~x~0#1 >= 0);main_~x~0#1 := main_~x~0#1 - main_~k~0#1; 255#L22-2 [2023-11-12 02:21:20,852 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-12 02:21:20,852 INFO L85 PathProgramCache]: Analyzing trace with hash 1716187174, now seen corresponding path program 2 times [2023-11-12 02:21:20,852 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-12 02:21:20,853 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1110657308] [2023-11-12 02:21:20,853 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-12 02:21:20,853 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-12 02:21:20,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-12 02:21:20,974 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-12 02:21:20,974 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-12 02:21:20,974 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1110657308] [2023-11-12 02:21:20,974 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1110657308] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-12 02:21:20,975 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1208197625] [2023-11-12 02:21:20,975 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2023-11-12 02:21:20,975 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-12 02:21:20,975 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 [2023-11-12 02:21:20,979 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-12 02:21:21,014 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2023-11-12 02:21:21,054 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2023-11-12 02:21:21,054 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-12 02:21:21,055 INFO L262 TraceCheckSpWp]: Trace formula consists of 83 conjuncts, 6 conjunts are in the unsatisfiable core [2023-11-12 02:21:21,057 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-12 02:21:21,090 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-12 02:21:21,090 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-12 02:21:21,160 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-12 02:21:21,161 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1208197625] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-12 02:21:21,161 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-12 02:21:21,161 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2023-11-12 02:21:21,161 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1005898114] [2023-11-12 02:21:21,161 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-12 02:21:21,162 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-12 02:21:21,162 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-12 02:21:21,162 INFO L85 PathProgramCache]: Analyzing trace with hash 68, now seen corresponding path program 4 times [2023-11-12 02:21:21,162 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-12 02:21:21,163 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1536465439] [2023-11-12 02:21:21,163 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-12 02:21:21,163 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-12 02:21:21,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-12 02:21:21,166 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-12 02:21:21,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-12 02:21:21,168 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-12 02:21:21,183 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-12 02:21:21,183 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2023-11-12 02:21:21,184 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2023-11-12 02:21:21,184 INFO L87 Difference]: Start difference. First operand 16 states and 17 transitions. cyclomatic complexity: 3 Second operand has 13 states, 13 states have (on average 2.1538461538461537) internal successors, (28), 13 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-12 02:21:21,237 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-12 02:21:21,238 INFO L93 Difference]: Finished difference Result 28 states and 29 transitions. [2023-11-12 02:21:21,238 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 28 states and 29 transitions. [2023-11-12 02:21:21,239 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-11-12 02:21:21,240 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 28 states to 28 states and 29 transitions. [2023-11-12 02:21:21,240 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2023-11-12 02:21:21,240 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2023-11-12 02:21:21,241 INFO L73 IsDeterministic]: Start isDeterministic. Operand 28 states and 29 transitions. [2023-11-12 02:21:21,241 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-12 02:21:21,241 INFO L218 hiAutomatonCegarLoop]: Abstraction has 28 states and 29 transitions. [2023-11-12 02:21:21,241 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states and 29 transitions. [2023-11-12 02:21:21,243 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2023-11-12 02:21:21,244 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.0357142857142858) internal successors, (29), 27 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-12 02:21:21,244 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 29 transitions. [2023-11-12 02:21:21,245 INFO L240 hiAutomatonCegarLoop]: Abstraction has 28 states and 29 transitions. [2023-11-12 02:21:21,245 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2023-11-12 02:21:21,246 INFO L428 stractBuchiCegarLoop]: Abstraction has 28 states and 29 transitions. [2023-11-12 02:21:21,246 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2023-11-12 02:21:21,246 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 28 states and 29 transitions. [2023-11-12 02:21:21,247 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-11-12 02:21:21,247 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-12 02:21:21,248 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-12 02:21:21,249 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 1, 1, 1, 1, 1, 1, 1] [2023-11-12 02:21:21,249 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2023-11-12 02:21:21,249 INFO L748 eck$LassoCheckResult]: Stem: 400#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 401#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 394#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 395#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 396#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 397#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 403#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 419#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 418#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 417#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 416#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 415#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 414#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 413#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 412#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 411#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 410#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 409#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 408#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 407#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 406#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 405#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 404#L15-3 assume !(main_~i~0#1 < 1048); 392#L15-4 havoc main_~i~0#1; 393#L19 assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1; 402#L20 assume main_#t~short5#1;call main_#t~mem4#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short5#1 := 42 == main_#t~mem4#1; 398#L20-2 assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 399#L22-2 [2023-11-12 02:21:21,249 INFO L750 eck$LassoCheckResult]: Loop: 399#L22-2 assume !!(main_~x~0#1 >= 0);main_~x~0#1 := main_~x~0#1 - main_~k~0#1; 399#L22-2 [2023-11-12 02:21:21,250 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-12 02:21:21,250 INFO L85 PathProgramCache]: Analyzing trace with hash 1328175130, now seen corresponding path program 3 times [2023-11-12 02:21:21,250 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-12 02:21:21,250 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1726694884] [2023-11-12 02:21:21,250 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-12 02:21:21,251 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-12 02:21:21,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-12 02:21:21,620 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-12 02:21:21,621 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-12 02:21:21,621 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1726694884] [2023-11-12 02:21:21,621 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1726694884] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-12 02:21:21,621 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [39895476] [2023-11-12 02:21:21,622 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-12 02:21:21,622 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-12 02:21:21,622 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 [2023-11-12 02:21:21,630 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-12 02:21:21,646 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2023-11-12 02:21:21,810 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2023-11-12 02:21:21,810 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-12 02:21:21,812 INFO L262 TraceCheckSpWp]: Trace formula consists of 149 conjuncts, 12 conjunts are in the unsatisfiable core [2023-11-12 02:21:21,815 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-12 02:21:21,896 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-12 02:21:21,897 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-12 02:21:22,151 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-12 02:21:22,151 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [39895476] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-12 02:21:22,151 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-12 02:21:22,151 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 25 [2023-11-12 02:21:22,152 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1428235913] [2023-11-12 02:21:22,152 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-12 02:21:22,152 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-12 02:21:22,153 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-12 02:21:22,153 INFO L85 PathProgramCache]: Analyzing trace with hash 68, now seen corresponding path program 5 times [2023-11-12 02:21:22,153 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-12 02:21:22,153 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1319382101] [2023-11-12 02:21:22,153 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-12 02:21:22,154 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-12 02:21:22,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-12 02:21:22,157 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-12 02:21:22,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-12 02:21:22,162 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-12 02:21:22,179 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-12 02:21:22,180 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2023-11-12 02:21:22,182 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2023-11-12 02:21:22,182 INFO L87 Difference]: Start difference. First operand 28 states and 29 transitions. cyclomatic complexity: 3 Second operand has 25 states, 25 states have (on average 2.08) internal successors, (52), 25 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-12 02:21:22,292 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-12 02:21:22,292 INFO L93 Difference]: Finished difference Result 52 states and 53 transitions. [2023-11-12 02:21:22,292 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 52 states and 53 transitions. [2023-11-12 02:21:22,296 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-11-12 02:21:22,298 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 52 states to 52 states and 53 transitions. [2023-11-12 02:21:22,298 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2023-11-12 02:21:22,298 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2023-11-12 02:21:22,298 INFO L73 IsDeterministic]: Start isDeterministic. Operand 52 states and 53 transitions. [2023-11-12 02:21:22,299 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-12 02:21:22,299 INFO L218 hiAutomatonCegarLoop]: Abstraction has 52 states and 53 transitions. [2023-11-12 02:21:22,299 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states and 53 transitions. [2023-11-12 02:21:22,305 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2023-11-12 02:21:22,306 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 52 states have (on average 1.0192307692307692) internal successors, (53), 51 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-12 02:21:22,307 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 53 transitions. [2023-11-12 02:21:22,307 INFO L240 hiAutomatonCegarLoop]: Abstraction has 52 states and 53 transitions. [2023-11-12 02:21:22,308 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2023-11-12 02:21:22,309 INFO L428 stractBuchiCegarLoop]: Abstraction has 52 states and 53 transitions. [2023-11-12 02:21:22,310 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2023-11-12 02:21:22,310 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 52 states and 53 transitions. [2023-11-12 02:21:22,318 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-11-12 02:21:22,318 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-12 02:21:22,319 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-12 02:21:22,322 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [22, 22, 1, 1, 1, 1, 1, 1, 1] [2023-11-12 02:21:22,323 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2023-11-12 02:21:22,323 INFO L748 eck$LassoCheckResult]: Stem: 664#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 665#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 658#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 659#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 660#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 661#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 667#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 707#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 706#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 705#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 704#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 703#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 702#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 701#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 700#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 699#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 698#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 697#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 696#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 695#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 694#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 693#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 692#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 691#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 690#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 689#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 688#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 687#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 686#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 685#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 684#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 683#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 682#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 681#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 680#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 679#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 678#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 677#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 676#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 675#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 674#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 673#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 672#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 671#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 670#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 669#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 668#L15-3 assume !(main_~i~0#1 < 1048); 656#L15-4 havoc main_~i~0#1; 657#L19 assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1; 666#L20 assume main_#t~short5#1;call main_#t~mem4#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short5#1 := 42 == main_#t~mem4#1; 662#L20-2 assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 663#L22-2 [2023-11-12 02:21:22,323 INFO L750 eck$LassoCheckResult]: Loop: 663#L22-2 assume !!(main_~x~0#1 >= 0);main_~x~0#1 := main_~x~0#1 - main_~k~0#1; 663#L22-2 [2023-11-12 02:21:22,323 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-12 02:21:22,324 INFO L85 PathProgramCache]: Analyzing trace with hash 1458388482, now seen corresponding path program 4 times [2023-11-12 02:21:22,324 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-12 02:21:22,324 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1639200382] [2023-11-12 02:21:22,324 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-12 02:21:22,324 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-12 02:21:22,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-12 02:21:23,073 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-12 02:21:23,074 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-12 02:21:23,074 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1639200382] [2023-11-12 02:21:23,074 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1639200382] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-12 02:21:23,074 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [134858899] [2023-11-12 02:21:23,074 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2023-11-12 02:21:23,074 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-12 02:21:23,074 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 [2023-11-12 02:21:23,078 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-12 02:21:23,097 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2023-11-12 02:21:23,212 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2023-11-12 02:21:23,212 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-12 02:21:23,214 INFO L262 TraceCheckSpWp]: Trace formula consists of 281 conjuncts, 24 conjunts are in the unsatisfiable core [2023-11-12 02:21:23,220 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-12 02:21:23,337 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-12 02:21:23,337 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-12 02:21:24,316 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-12 02:21:24,317 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [134858899] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-12 02:21:24,317 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-12 02:21:24,317 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25] total 49 [2023-11-12 02:21:24,317 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1914795102] [2023-11-12 02:21:24,317 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-12 02:21:24,318 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-12 02:21:24,318 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-12 02:21:24,318 INFO L85 PathProgramCache]: Analyzing trace with hash 68, now seen corresponding path program 6 times [2023-11-12 02:21:24,319 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-12 02:21:24,319 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1764503797] [2023-11-12 02:21:24,319 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-12 02:21:24,319 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-12 02:21:24,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-12 02:21:24,322 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-12 02:21:24,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-12 02:21:24,325 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-12 02:21:24,339 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-12 02:21:24,340 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2023-11-12 02:21:24,341 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2023-11-12 02:21:24,342 INFO L87 Difference]: Start difference. First operand 52 states and 53 transitions. cyclomatic complexity: 3 Second operand has 49 states, 49 states have (on average 2.0408163265306123) internal successors, (100), 49 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-12 02:21:24,581 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-12 02:21:24,582 INFO L93 Difference]: Finished difference Result 100 states and 101 transitions. [2023-11-12 02:21:24,582 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 100 states and 101 transitions. [2023-11-12 02:21:24,586 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-11-12 02:21:24,587 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 100 states to 100 states and 101 transitions. [2023-11-12 02:21:24,589 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2023-11-12 02:21:24,589 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2023-11-12 02:21:24,589 INFO L73 IsDeterministic]: Start isDeterministic. Operand 100 states and 101 transitions. [2023-11-12 02:21:24,591 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-12 02:21:24,591 INFO L218 hiAutomatonCegarLoop]: Abstraction has 100 states and 101 transitions. [2023-11-12 02:21:24,592 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states and 101 transitions. [2023-11-12 02:21:24,597 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 100. [2023-11-12 02:21:24,601 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 100 states, 100 states have (on average 1.01) internal successors, (101), 99 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-12 02:21:24,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 101 transitions. [2023-11-12 02:21:24,606 INFO L240 hiAutomatonCegarLoop]: Abstraction has 100 states and 101 transitions. [2023-11-12 02:21:24,607 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2023-11-12 02:21:24,607 INFO L428 stractBuchiCegarLoop]: Abstraction has 100 states and 101 transitions. [2023-11-12 02:21:24,608 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2023-11-12 02:21:24,608 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 100 states and 101 transitions. [2023-11-12 02:21:24,609 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-11-12 02:21:24,609 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-12 02:21:24,610 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-12 02:21:24,613 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [46, 46, 1, 1, 1, 1, 1, 1, 1] [2023-11-12 02:21:24,615 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2023-11-12 02:21:24,616 INFO L748 eck$LassoCheckResult]: Stem: 1168#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1169#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 1162#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1163#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1164#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1165#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1171#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1259#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1258#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1257#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1256#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1255#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1254#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1253#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1252#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1251#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1250#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1249#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1248#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1247#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1246#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1245#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1244#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1243#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1242#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1241#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1240#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1239#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1238#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1237#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1236#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1235#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1234#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1233#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1232#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1231#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1230#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1229#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1228#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1227#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1226#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1225#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1224#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1223#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1222#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1221#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1220#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1219#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1218#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1217#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1216#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1215#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1214#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1213#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1212#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1211#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1210#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1209#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1208#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1207#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1206#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1205#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1204#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1203#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1202#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1201#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1200#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1199#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1198#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1197#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1196#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1195#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1194#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1193#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1192#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1191#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1190#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1189#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1188#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1187#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1186#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1185#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1184#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1183#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1182#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1181#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1180#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1179#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1178#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1177#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1176#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1175#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1174#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1173#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1172#L15-3 assume !(main_~i~0#1 < 1048); 1160#L15-4 havoc main_~i~0#1; 1161#L19 assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1; 1170#L20 assume main_#t~short5#1;call main_#t~mem4#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short5#1 := 42 == main_#t~mem4#1; 1166#L20-2 assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 1167#L22-2 [2023-11-12 02:21:24,620 INFO L750 eck$LassoCheckResult]: Loop: 1167#L22-2 assume !!(main_~x~0#1 >= 0);main_~x~0#1 := main_~x~0#1 - main_~k~0#1; 1167#L22-2 [2023-11-12 02:21:24,620 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-12 02:21:24,620 INFO L85 PathProgramCache]: Analyzing trace with hash 546267602, now seen corresponding path program 5 times [2023-11-12 02:21:24,621 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-12 02:21:24,621 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1438535481] [2023-11-12 02:21:24,621 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-12 02:21:24,621 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-12 02:21:24,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-12 02:21:27,224 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-12 02:21:27,225 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-12 02:21:27,225 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1438535481] [2023-11-12 02:21:27,225 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1438535481] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-12 02:21:27,225 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [64821123] [2023-11-12 02:21:27,225 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-12 02:21:27,225 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-12 02:21:27,225 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 [2023-11-12 02:21:27,232 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-12 02:21:27,235 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2023-11-12 02:21:48,020 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2023-11-12 02:21:48,020 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-12 02:21:48,044 INFO L262 TraceCheckSpWp]: Trace formula consists of 545 conjuncts, 48 conjunts are in the unsatisfiable core [2023-11-12 02:21:48,050 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-12 02:21:48,248 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-12 02:21:48,248 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-12 02:21:51,821 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-12 02:21:51,821 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [64821123] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-12 02:21:51,821 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-12 02:21:51,822 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49, 49] total 97 [2023-11-12 02:21:51,822 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1614389225] [2023-11-12 02:21:51,822 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-12 02:21:51,823 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-12 02:21:51,823 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-12 02:21:51,824 INFO L85 PathProgramCache]: Analyzing trace with hash 68, now seen corresponding path program 7 times [2023-11-12 02:21:51,824 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-12 02:21:51,824 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [692265448] [2023-11-12 02:21:51,824 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-12 02:21:51,824 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-12 02:21:51,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-12 02:21:51,828 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-12 02:21:51,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-12 02:21:51,831 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-12 02:21:51,846 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-12 02:21:51,848 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 97 interpolants. [2023-11-12 02:21:51,852 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4656, Invalid=4656, Unknown=0, NotChecked=0, Total=9312 [2023-11-12 02:21:51,853 INFO L87 Difference]: Start difference. First operand 100 states and 101 transitions. cyclomatic complexity: 3 Second operand has 97 states, 97 states have (on average 2.020618556701031) internal successors, (196), 97 states have internal predecessors, (196), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-12 02:21:52,335 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-12 02:21:52,336 INFO L93 Difference]: Finished difference Result 196 states and 197 transitions. [2023-11-12 02:21:52,336 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 196 states and 197 transitions. [2023-11-12 02:21:52,338 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-11-12 02:21:52,342 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 196 states to 196 states and 197 transitions. [2023-11-12 02:21:52,343 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2023-11-12 02:21:52,343 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2023-11-12 02:21:52,343 INFO L73 IsDeterministic]: Start isDeterministic. Operand 196 states and 197 transitions. [2023-11-12 02:21:52,349 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-12 02:21:52,349 INFO L218 hiAutomatonCegarLoop]: Abstraction has 196 states and 197 transitions. [2023-11-12 02:21:52,352 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 196 states and 197 transitions. [2023-11-12 02:21:52,363 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 196 to 196. [2023-11-12 02:21:52,366 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 196 states, 196 states have (on average 1.0051020408163265) internal successors, (197), 195 states have internal predecessors, (197), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-12 02:21:52,367 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196 states to 196 states and 197 transitions. [2023-11-12 02:21:52,367 INFO L240 hiAutomatonCegarLoop]: Abstraction has 196 states and 197 transitions. [2023-11-12 02:21:52,368 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2023-11-12 02:21:52,371 INFO L428 stractBuchiCegarLoop]: Abstraction has 196 states and 197 transitions. [2023-11-12 02:21:52,372 INFO L335 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2023-11-12 02:21:52,372 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 196 states and 197 transitions. [2023-11-12 02:21:52,373 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-11-12 02:21:52,373 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-12 02:21:52,373 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-12 02:21:52,386 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [94, 94, 1, 1, 1, 1, 1, 1, 1] [2023-11-12 02:21:52,389 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2023-11-12 02:21:52,389 INFO L748 eck$LassoCheckResult]: Stem: 2152#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2153#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 2146#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2147#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2148#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2149#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2155#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2339#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2338#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2337#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2336#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2335#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2334#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2333#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2332#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2331#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2330#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2329#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2328#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2327#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2326#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2325#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2324#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2323#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2322#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2321#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2320#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2319#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2318#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2317#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2316#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2315#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2314#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2313#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2312#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2311#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2310#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2309#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2308#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2307#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2306#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2305#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2304#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2303#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2302#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2301#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2300#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2299#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2298#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2297#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2296#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2295#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2294#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2293#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2292#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2291#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2290#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2289#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2288#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2287#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2286#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2285#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2284#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2283#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2282#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2281#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2280#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2279#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2278#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2277#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2276#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2275#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2274#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2273#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2272#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2271#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2270#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2269#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2268#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2267#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2266#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2265#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2264#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2263#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2262#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2261#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2260#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2259#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2258#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2257#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2256#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2255#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2254#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2253#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2252#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2251#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2250#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2249#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2248#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2247#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2246#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2245#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2244#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2243#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2242#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2241#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2240#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2239#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2238#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2237#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2236#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2235#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2234#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2233#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2232#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2231#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2230#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2229#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2228#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2227#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2226#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2225#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2224#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2223#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2222#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2221#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2220#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2219#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2218#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2217#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2216#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2215#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2214#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2213#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2212#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2211#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2210#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2209#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2208#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2207#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2206#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2205#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2204#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2203#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2202#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2201#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2200#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2199#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2198#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2197#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2196#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2195#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2194#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2193#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2192#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2191#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2190#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2189#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2188#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2187#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2186#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2185#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2184#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2183#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2182#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2181#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2180#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2179#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2178#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2177#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2176#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2175#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2174#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2173#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2172#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2171#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2170#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2169#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2168#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2167#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2166#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2165#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2164#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2163#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2162#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2161#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2160#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2159#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2158#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2157#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2156#L15-3 assume !(main_~i~0#1 < 1048); 2144#L15-4 havoc main_~i~0#1; 2145#L19 assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1; 2154#L20 assume main_#t~short5#1;call main_#t~mem4#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short5#1 := 42 == main_#t~mem4#1; 2150#L20-2 assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 2151#L22-2 [2023-11-12 02:21:52,393 INFO L750 eck$LassoCheckResult]: Loop: 2151#L22-2 assume !!(main_~x~0#1 >= 0);main_~x~0#1 := main_~x~0#1 - main_~k~0#1; 2151#L22-2 [2023-11-12 02:21:52,393 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-12 02:21:52,393 INFO L85 PathProgramCache]: Analyzing trace with hash 1352993138, now seen corresponding path program 6 times [2023-11-12 02:21:52,394 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-12 02:21:52,394 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [257696322] [2023-11-12 02:21:52,394 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-12 02:21:52,394 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-12 02:21:52,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-12 02:22:00,988 INFO L134 CoverageAnalysis]: Checked inductivity of 8836 backedges. 0 proven. 8836 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-12 02:22:00,989 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-12 02:22:00,989 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [257696322] [2023-11-12 02:22:00,989 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [257696322] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-12 02:22:00,989 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [244598866] [2023-11-12 02:22:00,990 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2023-11-12 02:22:00,990 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-12 02:22:00,990 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 [2023-11-12 02:22:00,998 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-12 02:22:01,005 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2dcef9fc-3baf-4b13-a5d7-db3a0dc158b7/bin/uautomizer-verify-uTZkv6EMXl/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process