./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/array-examples/standard_sentinel-2.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version cf1a7837 Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/array-examples/standard_sentinel-2.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 590a845a219659d0ad58521e10c3551f2ec7e80ca70e994a8616abe765f6f296 --- Real Ultimate output --- This is Ultimate 0.2.3-dev-cf1a783 [2023-11-12 02:25:17,453 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-12 02:25:17,525 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/config/svcomp-Termination-32bit-Automizer_Default.epf [2023-11-12 02:25:17,531 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-12 02:25:17,531 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-12 02:25:17,558 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-12 02:25:17,559 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-12 02:25:17,559 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-12 02:25:17,560 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-12 02:25:17,561 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-12 02:25:17,562 INFO L153 SettingsManager]: * Use SBE=true [2023-11-12 02:25:17,562 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-12 02:25:17,563 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-12 02:25:17,563 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-12 02:25:17,564 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-12 02:25:17,564 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-12 02:25:17,565 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-12 02:25:17,565 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-12 02:25:17,566 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-12 02:25:17,566 INFO L153 SettingsManager]: * sizeof long=4 [2023-11-12 02:25:17,567 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-12 02:25:17,568 INFO L153 SettingsManager]: * sizeof POINTER=4 [2023-11-12 02:25:17,568 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-12 02:25:17,569 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-12 02:25:17,569 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-12 02:25:17,569 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-12 02:25:17,570 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-12 02:25:17,570 INFO L153 SettingsManager]: * sizeof long double=12 [2023-11-12 02:25:17,571 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-12 02:25:17,571 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-12 02:25:17,572 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-12 02:25:17,572 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-12 02:25:17,573 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-12 02:25:17,573 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-12 02:25:17,574 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-12 02:25:17,575 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-12 02:25:17,575 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 590a845a219659d0ad58521e10c3551f2ec7e80ca70e994a8616abe765f6f296 [2023-11-12 02:25:17,859 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-12 02:25:17,890 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-12 02:25:17,893 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-12 02:25:17,894 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-12 02:25:17,895 INFO L274 PluginConnector]: CDTParser initialized [2023-11-12 02:25:17,897 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/../../sv-benchmarks/c/array-examples/standard_sentinel-2.i [2023-11-12 02:25:21,442 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-12 02:25:21,692 INFO L384 CDTParser]: Found 1 translation units. [2023-11-12 02:25:21,693 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/sv-benchmarks/c/array-examples/standard_sentinel-2.i [2023-11-12 02:25:21,708 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/data/ea2d05f7e/32da35771bca44bf8a4d6670dca46121/FLAG3c05f4315 [2023-11-12 02:25:21,734 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/data/ea2d05f7e/32da35771bca44bf8a4d6670dca46121 [2023-11-12 02:25:21,738 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-12 02:25:21,740 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-12 02:25:21,742 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-12 02:25:21,742 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-12 02:25:21,751 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-12 02:25:21,752 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.11 02:25:21" (1/1) ... [2023-11-12 02:25:21,753 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@21e7f351 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 02:25:21, skipping insertion in model container [2023-11-12 02:25:21,753 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.11 02:25:21" (1/1) ... [2023-11-12 02:25:21,786 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-12 02:25:22,012 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-12 02:25:22,028 INFO L202 MainTranslator]: Completed pre-run [2023-11-12 02:25:22,061 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-12 02:25:22,084 INFO L206 MainTranslator]: Completed translation [2023-11-12 02:25:22,085 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 02:25:22 WrapperNode [2023-11-12 02:25:22,085 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-12 02:25:22,087 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-12 02:25:22,087 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-12 02:25:22,087 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-12 02:25:22,097 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 02:25:22" (1/1) ... [2023-11-12 02:25:22,108 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 02:25:22" (1/1) ... [2023-11-12 02:25:22,131 INFO L138 Inliner]: procedures = 16, calls = 14, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 54 [2023-11-12 02:25:22,132 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-12 02:25:22,133 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-12 02:25:22,133 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-12 02:25:22,133 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-12 02:25:22,144 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 02:25:22" (1/1) ... [2023-11-12 02:25:22,145 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 02:25:22" (1/1) ... [2023-11-12 02:25:22,147 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 02:25:22" (1/1) ... [2023-11-12 02:25:22,148 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 02:25:22" (1/1) ... [2023-11-12 02:25:22,154 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 02:25:22" (1/1) ... [2023-11-12 02:25:22,159 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 02:25:22" (1/1) ... [2023-11-12 02:25:22,160 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 02:25:22" (1/1) ... [2023-11-12 02:25:22,162 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 02:25:22" (1/1) ... [2023-11-12 02:25:22,164 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-12 02:25:22,166 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-12 02:25:22,166 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-12 02:25:22,166 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-12 02:25:22,167 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 02:25:22" (1/1) ... [2023-11-12 02:25:22,187 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-12 02:25:22,203 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/z3 [2023-11-12 02:25:22,221 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-12 02:25:22,247 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-12 02:25:22,283 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2023-11-12 02:25:22,284 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2023-11-12 02:25:22,284 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2023-11-12 02:25:22,284 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2023-11-12 02:25:22,284 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-12 02:25:22,285 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-12 02:25:22,285 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2023-11-12 02:25:22,285 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-11-12 02:25:22,380 INFO L236 CfgBuilder]: Building ICFG [2023-11-12 02:25:22,383 INFO L262 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-12 02:25:22,571 INFO L277 CfgBuilder]: Performing block encoding [2023-11-12 02:25:22,579 INFO L297 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-12 02:25:22,579 INFO L302 CfgBuilder]: Removed 2 assume(true) statements. [2023-11-12 02:25:22,582 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.11 02:25:22 BoogieIcfgContainer [2023-11-12 02:25:22,582 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-12 02:25:22,584 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-12 02:25:22,584 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-12 02:25:22,589 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-12 02:25:22,591 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-12 02:25:22,591 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 12.11 02:25:21" (1/3) ... [2023-11-12 02:25:22,592 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@42174bd7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 12.11 02:25:22, skipping insertion in model container [2023-11-12 02:25:22,593 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-12 02:25:22,593 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 02:25:22" (2/3) ... [2023-11-12 02:25:22,594 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@42174bd7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 12.11 02:25:22, skipping insertion in model container [2023-11-12 02:25:22,594 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-12 02:25:22,594 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.11 02:25:22" (3/3) ... [2023-11-12 02:25:22,596 INFO L332 chiAutomizerObserver]: Analyzing ICFG standard_sentinel-2.i [2023-11-12 02:25:22,672 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-12 02:25:22,672 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-12 02:25:22,672 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-12 02:25:22,673 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-12 02:25:22,673 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-12 02:25:22,673 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-12 02:25:22,673 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-12 02:25:22,673 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-12 02:25:22,678 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 18 states, 17 states have (on average 1.411764705882353) internal successors, (24), 17 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-12 02:25:22,700 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2023-11-12 02:25:22,701 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-12 02:25:22,701 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-12 02:25:22,707 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-12 02:25:22,708 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-12 02:25:22,708 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-12 02:25:22,708 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 18 states, 17 states have (on average 1.411764705882353) internal successors, (24), 17 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-12 02:25:22,711 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2023-11-12 02:25:22,711 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-12 02:25:22,712 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-12 02:25:22,712 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-12 02:25:22,712 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-12 02:25:22,720 INFO L748 eck$LassoCheckResult]: Stem: 14#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(22, 2); 5#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet2#1, main_#t~nondet4#1, main_#t~post3#1, main_~i~0#1, main_#t~mem5#1, main_~i~1#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~marker~0#1, main_~pos~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_#t~nondet1#1;main_~marker~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;main_~pos~0#1 := main_#t~nondet2#1;havoc main_#t~nondet2#1;main_~i~0#1 := 0; 11#L20-3true [2023-11-12 02:25:22,721 INFO L750 eck$LassoCheckResult]: Loop: 11#L20-3true assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 12#L20-2true main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11#L20-3true [2023-11-12 02:25:22,727 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-12 02:25:22,727 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2023-11-12 02:25:22,740 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-12 02:25:22,741 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1957183799] [2023-11-12 02:25:22,741 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-12 02:25:22,742 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-12 02:25:22,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-12 02:25:22,913 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-12 02:25:22,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-12 02:25:22,974 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-12 02:25:22,977 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-12 02:25:22,978 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2023-11-12 02:25:22,978 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-12 02:25:22,979 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2140261919] [2023-11-12 02:25:22,979 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-12 02:25:22,980 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-12 02:25:23,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-12 02:25:23,014 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-12 02:25:23,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-12 02:25:23,033 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-12 02:25:23,035 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-12 02:25:23,036 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2023-11-12 02:25:23,036 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-12 02:25:23,037 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [408017996] [2023-11-12 02:25:23,038 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-12 02:25:23,038 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-12 02:25:23,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-12 02:25:23,108 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-12 02:25:23,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-12 02:25:23,134 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-12 02:25:23,735 INFO L210 LassoAnalysis]: Preferences: [2023-11-12 02:25:23,735 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-12 02:25:23,736 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-12 02:25:23,736 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-12 02:25:23,736 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2023-11-12 02:25:23,736 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-12 02:25:23,737 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-12 02:25:23,737 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-12 02:25:23,737 INFO L133 ssoRankerPreferences]: Filename of dumped script: standard_sentinel-2.i_Iteration1_Lasso [2023-11-12 02:25:23,737 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-12 02:25:23,738 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-12 02:25:23,766 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-12 02:25:24,113 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-12 02:25:24,116 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-12 02:25:24,119 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-12 02:25:24,123 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-12 02:25:24,127 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-12 02:25:24,131 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-12 02:25:24,135 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-12 02:25:24,139 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-12 02:25:24,142 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-12 02:25:24,412 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-12 02:25:24,417 INFO L490 LassoAnalysis]: Using template 'affine'. [2023-11-12 02:25:24,420 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-12 02:25:24,420 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/z3 [2023-11-12 02:25:24,426 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-12 02:25:24,444 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-12 02:25:24,444 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2023-11-12 02:25:24,459 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-12 02:25:24,459 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-12 02:25:24,459 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-12 02:25:24,459 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-12 02:25:24,470 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-12 02:25:24,471 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-12 02:25:24,484 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-12 02:25:24,488 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2023-11-12 02:25:24,488 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-12 02:25:24,488 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/z3 [2023-11-12 02:25:24,490 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-12 02:25:24,492 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2023-11-12 02:25:24,494 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-12 02:25:24,515 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-12 02:25:24,515 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-12 02:25:24,515 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-12 02:25:24,516 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-12 02:25:24,522 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-12 02:25:24,524 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-12 02:25:24,543 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-12 02:25:24,561 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2023-11-12 02:25:24,562 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-12 02:25:24,562 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/z3 [2023-11-12 02:25:24,564 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-12 02:25:24,570 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-12 02:25:24,585 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2023-11-12 02:25:24,586 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-12 02:25:24,586 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-12 02:25:24,586 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-12 02:25:24,586 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-12 02:25:24,603 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-12 02:25:24,603 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-12 02:25:24,620 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2023-11-12 02:25:24,672 INFO L443 ModelExtractionUtils]: Simplification made 10 calls to the SMT solver. [2023-11-12 02:25:24,673 INFO L444 ModelExtractionUtils]: 4 out of 13 variables were initially zero. Simplification set additionally 6 variables to zero. [2023-11-12 02:25:24,675 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-12 02:25:24,675 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/z3 [2023-11-12 02:25:24,709 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-12 02:25:24,711 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2023-11-12 02:25:24,712 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2023-11-12 02:25:24,730 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2023-11-12 02:25:24,730 INFO L513 LassoAnalysis]: Proved termination. [2023-11-12 02:25:24,731 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select #length ULTIMATE.start_main_~#a~0#1.base)_1, ULTIMATE.start_main_~i~0#1) = 199999*v_rep(select #length ULTIMATE.start_main_~#a~0#1.base)_1 - 8*ULTIMATE.start_main_~i~0#1 Supporting invariants [] [2023-11-12 02:25:24,737 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2023-11-12 02:25:24,770 INFO L156 tatePredicateManager]: 5 out of 5 supporting invariants were superfluous and have been removed [2023-11-12 02:25:24,790 WARN L1567 BoogieBacktranslator]: Unfinished Backtranslation: ArrayAccessExpression #length[~#a~0!base] could not be translated [2023-11-12 02:25:24,820 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-12 02:25:24,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-12 02:25:24,855 INFO L262 TraceCheckSpWp]: Trace formula consists of 31 conjuncts, 2 conjunts are in the unsatisfiable core [2023-11-12 02:25:24,877 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-12 02:25:24,887 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2023-11-12 02:25:24,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-12 02:25:24,904 INFO L262 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 6 conjunts are in the unsatisfiable core [2023-11-12 02:25:24,905 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-12 02:25:24,943 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-12 02:25:24,981 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2023-11-12 02:25:24,984 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 18 states, 17 states have (on average 1.411764705882353) internal successors, (24), 17 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-12 02:25:25,060 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 18 states, 17 states have (on average 1.411764705882353) internal successors, (24), 17 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 35 states and 49 transitions. Complement of second has 8 states. [2023-11-12 02:25:25,062 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2023-11-12 02:25:25,067 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-12 02:25:25,068 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 24 transitions. [2023-11-12 02:25:25,070 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 24 transitions. Stem has 2 letters. Loop has 2 letters. [2023-11-12 02:25:25,071 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-12 02:25:25,071 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 24 transitions. Stem has 4 letters. Loop has 2 letters. [2023-11-12 02:25:25,071 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-12 02:25:25,071 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 24 transitions. Stem has 2 letters. Loop has 4 letters. [2023-11-12 02:25:25,072 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-12 02:25:25,073 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 35 states and 49 transitions. [2023-11-12 02:25:25,076 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2023-11-12 02:25:25,080 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 35 states to 9 states and 11 transitions. [2023-11-12 02:25:25,082 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6 [2023-11-12 02:25:25,082 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2023-11-12 02:25:25,083 INFO L73 IsDeterministic]: Start isDeterministic. Operand 9 states and 11 transitions. [2023-11-12 02:25:25,083 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-12 02:25:25,083 INFO L218 hiAutomatonCegarLoop]: Abstraction has 9 states and 11 transitions. [2023-11-12 02:25:25,102 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9 states and 11 transitions. [2023-11-12 02:25:25,111 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9 to 9. [2023-11-12 02:25:25,111 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 8 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-12 02:25:25,112 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 11 transitions. [2023-11-12 02:25:25,113 INFO L240 hiAutomatonCegarLoop]: Abstraction has 9 states and 11 transitions. [2023-11-12 02:25:25,114 INFO L428 stractBuchiCegarLoop]: Abstraction has 9 states and 11 transitions. [2023-11-12 02:25:25,114 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-12 02:25:25,114 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 9 states and 11 transitions. [2023-11-12 02:25:25,115 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2023-11-12 02:25:25,115 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-12 02:25:25,115 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-12 02:25:25,116 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1] [2023-11-12 02:25:25,116 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-12 02:25:25,116 INFO L748 eck$LassoCheckResult]: Stem: 119#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(22, 2); 120#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet2#1, main_#t~nondet4#1, main_#t~post3#1, main_~i~0#1, main_#t~mem5#1, main_~i~1#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~marker~0#1, main_~pos~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_#t~nondet1#1;main_~marker~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;main_~pos~0#1 := main_#t~nondet2#1;havoc main_#t~nondet2#1;main_~i~0#1 := 0; 114#L20-3 assume !(main_~i~0#1 < 100000); 115#L20-4 havoc main_~i~0#1; 118#L25 assume main_~pos~0#1 >= 0 && main_~pos~0#1 < 100000;call write~int(main_~marker~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~pos~0#1, 4);main_~i~1#1 := 0; 117#L28-3 [2023-11-12 02:25:25,117 INFO L750 eck$LassoCheckResult]: Loop: 117#L28-3 call main_#t~mem5#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~1#1, 4); 116#L28-1 assume !!(main_#t~mem5#1 != main_~marker~0#1);havoc main_#t~mem5#1;main_~i~1#1 := 1 + main_~i~1#1; 117#L28-3 [2023-11-12 02:25:25,117 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-12 02:25:25,118 INFO L85 PathProgramCache]: Analyzing trace with hash 28696936, now seen corresponding path program 1 times [2023-11-12 02:25:25,118 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-12 02:25:25,118 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [72003768] [2023-11-12 02:25:25,118 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-12 02:25:25,119 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-12 02:25:25,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-12 02:25:25,195 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-12 02:25:25,196 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-12 02:25:25,197 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [72003768] [2023-11-12 02:25:25,198 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [72003768] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-12 02:25:25,199 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-12 02:25:25,199 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-12 02:25:25,199 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [835562720] [2023-11-12 02:25:25,200 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-12 02:25:25,203 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-12 02:25:25,203 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-12 02:25:25,204 INFO L85 PathProgramCache]: Analyzing trace with hash 1734, now seen corresponding path program 1 times [2023-11-12 02:25:25,204 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-12 02:25:25,204 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [312662563] [2023-11-12 02:25:25,204 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-12 02:25:25,205 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-12 02:25:25,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-12 02:25:25,224 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-12 02:25:25,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-12 02:25:25,234 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-12 02:25:25,284 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-12 02:25:25,286 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-11-12 02:25:25,289 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-11-12 02:25:25,290 INFO L87 Difference]: Start difference. First operand 9 states and 11 transitions. cyclomatic complexity: 4 Second operand has 3 states, 3 states have (on average 1.6666666666666667) internal successors, (5), 3 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-12 02:25:25,307 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-12 02:25:25,307 INFO L93 Difference]: Finished difference Result 10 states and 11 transitions. [2023-11-12 02:25:25,307 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 10 states and 11 transitions. [2023-11-12 02:25:25,313 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2023-11-12 02:25:25,314 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 10 states to 10 states and 11 transitions. [2023-11-12 02:25:25,315 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2023-11-12 02:25:25,315 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2023-11-12 02:25:25,315 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10 states and 11 transitions. [2023-11-12 02:25:25,316 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-12 02:25:25,316 INFO L218 hiAutomatonCegarLoop]: Abstraction has 10 states and 11 transitions. [2023-11-12 02:25:25,317 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10 states and 11 transitions. [2023-11-12 02:25:25,318 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10 to 9. [2023-11-12 02:25:25,319 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 1.1111111111111112) internal successors, (10), 8 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-12 02:25:25,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 10 transitions. [2023-11-12 02:25:25,320 INFO L240 hiAutomatonCegarLoop]: Abstraction has 9 states and 10 transitions. [2023-11-12 02:25:25,322 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-11-12 02:25:25,323 INFO L428 stractBuchiCegarLoop]: Abstraction has 9 states and 10 transitions. [2023-11-12 02:25:25,323 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-12 02:25:25,323 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 9 states and 10 transitions. [2023-11-12 02:25:25,324 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2023-11-12 02:25:25,324 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-12 02:25:25,324 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-12 02:25:25,325 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2023-11-12 02:25:25,325 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-12 02:25:25,326 INFO L748 eck$LassoCheckResult]: Stem: 144#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(22, 2); 145#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet2#1, main_#t~nondet4#1, main_#t~post3#1, main_~i~0#1, main_#t~mem5#1, main_~i~1#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~marker~0#1, main_~pos~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_#t~nondet1#1;main_~marker~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;main_~pos~0#1 := main_#t~nondet2#1;havoc main_#t~nondet2#1;main_~i~0#1 := 0; 137#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 138#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 139#L20-3 assume !(main_~i~0#1 < 100000); 140#L20-4 havoc main_~i~0#1; 143#L25 assume main_~pos~0#1 >= 0 && main_~pos~0#1 < 100000;call write~int(main_~marker~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~pos~0#1, 4);main_~i~1#1 := 0; 142#L28-3 [2023-11-12 02:25:25,326 INFO L750 eck$LassoCheckResult]: Loop: 142#L28-3 call main_#t~mem5#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~1#1, 4); 141#L28-1 assume !!(main_#t~mem5#1 != main_~marker~0#1);havoc main_#t~mem5#1;main_~i~1#1 := 1 + main_~i~1#1; 142#L28-3 [2023-11-12 02:25:25,327 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-12 02:25:25,327 INFO L85 PathProgramCache]: Analyzing trace with hash 1809669542, now seen corresponding path program 1 times [2023-11-12 02:25:25,327 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-12 02:25:25,328 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1479090358] [2023-11-12 02:25:25,328 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-12 02:25:25,328 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-12 02:25:25,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-12 02:25:25,450 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-12 02:25:25,451 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-12 02:25:25,451 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1479090358] [2023-11-12 02:25:25,451 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1479090358] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-12 02:25:25,452 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1669692325] [2023-11-12 02:25:25,452 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-12 02:25:25,452 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-12 02:25:25,453 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/z3 [2023-11-12 02:25:25,454 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-12 02:25:25,470 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2023-11-12 02:25:25,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-12 02:25:25,535 INFO L262 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-12 02:25:25,537 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-12 02:25:25,553 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-12 02:25:25,553 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-12 02:25:25,578 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-12 02:25:25,578 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1669692325] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-12 02:25:25,579 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-12 02:25:25,579 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2023-11-12 02:25:25,579 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [173218481] [2023-11-12 02:25:25,579 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-12 02:25:25,580 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-12 02:25:25,581 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-12 02:25:25,582 INFO L85 PathProgramCache]: Analyzing trace with hash 1734, now seen corresponding path program 2 times [2023-11-12 02:25:25,583 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-12 02:25:25,587 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [354146474] [2023-11-12 02:25:25,588 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-12 02:25:25,588 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-12 02:25:25,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-12 02:25:25,601 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-12 02:25:25,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-12 02:25:25,606 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-12 02:25:25,679 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-12 02:25:25,680 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-12 02:25:25,686 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2023-11-12 02:25:25,686 INFO L87 Difference]: Start difference. First operand 9 states and 10 transitions. cyclomatic complexity: 3 Second operand has 7 states, 7 states have (on average 2.0) internal successors, (14), 7 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-12 02:25:25,734 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-12 02:25:25,735 INFO L93 Difference]: Finished difference Result 15 states and 16 transitions. [2023-11-12 02:25:25,735 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 15 states and 16 transitions. [2023-11-12 02:25:25,740 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2023-11-12 02:25:25,741 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 15 states to 15 states and 16 transitions. [2023-11-12 02:25:25,741 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2023-11-12 02:25:25,742 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2023-11-12 02:25:25,742 INFO L73 IsDeterministic]: Start isDeterministic. Operand 15 states and 16 transitions. [2023-11-12 02:25:25,743 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-12 02:25:25,743 INFO L218 hiAutomatonCegarLoop]: Abstraction has 15 states and 16 transitions. [2023-11-12 02:25:25,743 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states and 16 transitions. [2023-11-12 02:25:25,744 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 15. [2023-11-12 02:25:25,745 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 1.0666666666666667) internal successors, (16), 14 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-12 02:25:25,747 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 16 transitions. [2023-11-12 02:25:25,748 INFO L240 hiAutomatonCegarLoop]: Abstraction has 15 states and 16 transitions. [2023-11-12 02:25:25,749 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2023-11-12 02:25:25,751 INFO L428 stractBuchiCegarLoop]: Abstraction has 15 states and 16 transitions. [2023-11-12 02:25:25,751 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-12 02:25:25,751 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 15 states and 16 transitions. [2023-11-12 02:25:25,754 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2023-11-12 02:25:25,755 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-12 02:25:25,755 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-12 02:25:25,757 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 1, 1, 1, 1, 1] [2023-11-12 02:25:25,757 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-12 02:25:25,758 INFO L748 eck$LassoCheckResult]: Stem: 215#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(22, 2); 216#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet2#1, main_#t~nondet4#1, main_#t~post3#1, main_~i~0#1, main_#t~mem5#1, main_~i~1#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~marker~0#1, main_~pos~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_#t~nondet1#1;main_~marker~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;main_~pos~0#1 := main_#t~nondet2#1;havoc main_#t~nondet2#1;main_~i~0#1 := 0; 207#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 208#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 209#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 210#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 211#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 221#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 220#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 219#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 218#L20-3 assume !(main_~i~0#1 < 100000); 217#L20-4 havoc main_~i~0#1; 214#L25 assume main_~pos~0#1 >= 0 && main_~pos~0#1 < 100000;call write~int(main_~marker~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~pos~0#1, 4);main_~i~1#1 := 0; 213#L28-3 [2023-11-12 02:25:25,758 INFO L750 eck$LassoCheckResult]: Loop: 213#L28-3 call main_#t~mem5#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~1#1, 4); 212#L28-1 assume !!(main_#t~mem5#1 != main_~marker~0#1);havoc main_#t~mem5#1;main_~i~1#1 := 1 + main_~i~1#1; 213#L28-3 [2023-11-12 02:25:25,759 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-12 02:25:25,759 INFO L85 PathProgramCache]: Analyzing trace with hash 82232672, now seen corresponding path program 2 times [2023-11-12 02:25:25,760 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-12 02:25:25,760 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1382211446] [2023-11-12 02:25:25,760 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-12 02:25:25,760 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-12 02:25:25,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-12 02:25:25,958 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-12 02:25:25,958 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-12 02:25:25,959 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1382211446] [2023-11-12 02:25:25,959 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1382211446] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-12 02:25:25,959 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [929701928] [2023-11-12 02:25:25,960 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2023-11-12 02:25:25,960 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-12 02:25:25,960 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/z3 [2023-11-12 02:25:25,961 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-12 02:25:25,993 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2023-11-12 02:25:26,056 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2023-11-12 02:25:26,056 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-12 02:25:26,057 INFO L262 TraceCheckSpWp]: Trace formula consists of 89 conjuncts, 6 conjunts are in the unsatisfiable core [2023-11-12 02:25:26,059 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-12 02:25:26,093 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-12 02:25:26,094 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-12 02:25:26,200 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-12 02:25:26,201 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [929701928] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-12 02:25:26,201 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-12 02:25:26,201 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2023-11-12 02:25:26,202 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1068540860] [2023-11-12 02:25:26,202 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-12 02:25:26,203 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-12 02:25:26,204 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-12 02:25:26,204 INFO L85 PathProgramCache]: Analyzing trace with hash 1734, now seen corresponding path program 3 times [2023-11-12 02:25:26,204 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-12 02:25:26,204 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1908496978] [2023-11-12 02:25:26,204 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-12 02:25:26,205 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-12 02:25:26,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-12 02:25:26,212 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-12 02:25:26,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-12 02:25:26,221 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-12 02:25:26,273 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-12 02:25:26,273 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2023-11-12 02:25:26,274 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2023-11-12 02:25:26,274 INFO L87 Difference]: Start difference. First operand 15 states and 16 transitions. cyclomatic complexity: 3 Second operand has 13 states, 13 states have (on average 2.0) internal successors, (26), 13 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-12 02:25:26,352 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-12 02:25:26,353 INFO L93 Difference]: Finished difference Result 27 states and 28 transitions. [2023-11-12 02:25:26,353 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 27 states and 28 transitions. [2023-11-12 02:25:26,354 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2023-11-12 02:25:26,355 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 27 states to 27 states and 28 transitions. [2023-11-12 02:25:26,355 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2023-11-12 02:25:26,355 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2023-11-12 02:25:26,356 INFO L73 IsDeterministic]: Start isDeterministic. Operand 27 states and 28 transitions. [2023-11-12 02:25:26,356 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-12 02:25:26,356 INFO L218 hiAutomatonCegarLoop]: Abstraction has 27 states and 28 transitions. [2023-11-12 02:25:26,356 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states and 28 transitions. [2023-11-12 02:25:26,358 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2023-11-12 02:25:26,359 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 1.037037037037037) internal successors, (28), 26 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-12 02:25:26,360 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 28 transitions. [2023-11-12 02:25:26,360 INFO L240 hiAutomatonCegarLoop]: Abstraction has 27 states and 28 transitions. [2023-11-12 02:25:26,360 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2023-11-12 02:25:26,361 INFO L428 stractBuchiCegarLoop]: Abstraction has 27 states and 28 transitions. [2023-11-12 02:25:26,362 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2023-11-12 02:25:26,362 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 27 states and 28 transitions. [2023-11-12 02:25:26,363 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2023-11-12 02:25:26,363 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-12 02:25:26,363 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-12 02:25:26,364 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 1, 1, 1, 1, 1] [2023-11-12 02:25:26,364 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-12 02:25:26,365 INFO L748 eck$LassoCheckResult]: Stem: 345#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(22, 2); 346#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet2#1, main_#t~nondet4#1, main_#t~post3#1, main_~i~0#1, main_#t~mem5#1, main_~i~1#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~marker~0#1, main_~pos~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_#t~nondet1#1;main_~marker~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;main_~pos~0#1 := main_#t~nondet2#1;havoc main_#t~nondet2#1;main_~i~0#1 := 0; 337#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 338#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 339#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 340#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 341#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 363#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 362#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 361#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 360#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 359#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 358#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 357#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 356#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 355#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 354#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 353#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 352#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 351#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 350#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 349#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 348#L20-3 assume !(main_~i~0#1 < 100000); 347#L20-4 havoc main_~i~0#1; 344#L25 assume main_~pos~0#1 >= 0 && main_~pos~0#1 < 100000;call write~int(main_~marker~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~pos~0#1, 4);main_~i~1#1 := 0; 343#L28-3 [2023-11-12 02:25:26,365 INFO L750 eck$LassoCheckResult]: Loop: 343#L28-3 call main_#t~mem5#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~1#1, 4); 342#L28-1 assume !!(main_#t~mem5#1 != main_~marker~0#1);havoc main_#t~mem5#1;main_~i~1#1 := 1 + main_~i~1#1; 343#L28-3 [2023-11-12 02:25:26,365 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-12 02:25:26,366 INFO L85 PathProgramCache]: Analyzing trace with hash 1520933460, now seen corresponding path program 3 times [2023-11-12 02:25:26,366 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-12 02:25:26,366 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1913508157] [2023-11-12 02:25:26,366 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-12 02:25:26,367 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-12 02:25:26,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-12 02:25:26,812 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-12 02:25:26,813 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-12 02:25:26,813 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1913508157] [2023-11-12 02:25:26,813 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1913508157] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-12 02:25:26,814 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [834109011] [2023-11-12 02:25:26,814 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-12 02:25:26,814 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-12 02:25:26,814 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/z3 [2023-11-12 02:25:26,816 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-12 02:25:26,822 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2023-11-12 02:25:26,982 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2023-11-12 02:25:26,983 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-12 02:25:26,984 INFO L262 TraceCheckSpWp]: Trace formula consists of 155 conjuncts, 12 conjunts are in the unsatisfiable core [2023-11-12 02:25:26,987 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-12 02:25:27,067 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-12 02:25:27,068 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-12 02:25:27,324 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-12 02:25:27,325 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [834109011] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-12 02:25:27,325 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-12 02:25:27,325 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 25 [2023-11-12 02:25:27,326 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1786516085] [2023-11-12 02:25:27,326 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-12 02:25:27,327 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-12 02:25:27,329 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-12 02:25:27,329 INFO L85 PathProgramCache]: Analyzing trace with hash 1734, now seen corresponding path program 4 times [2023-11-12 02:25:27,329 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-12 02:25:27,330 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [88608798] [2023-11-12 02:25:27,330 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-12 02:25:27,330 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-12 02:25:27,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-12 02:25:27,336 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-12 02:25:27,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-12 02:25:27,342 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-12 02:25:27,382 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-12 02:25:27,382 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2023-11-12 02:25:27,384 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2023-11-12 02:25:27,384 INFO L87 Difference]: Start difference. First operand 27 states and 28 transitions. cyclomatic complexity: 3 Second operand has 25 states, 25 states have (on average 2.0) internal successors, (50), 25 states have internal predecessors, (50), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-12 02:25:27,499 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-12 02:25:27,499 INFO L93 Difference]: Finished difference Result 51 states and 52 transitions. [2023-11-12 02:25:27,500 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 52 transitions. [2023-11-12 02:25:27,504 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2023-11-12 02:25:27,506 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 51 states and 52 transitions. [2023-11-12 02:25:27,506 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2023-11-12 02:25:27,507 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2023-11-12 02:25:27,507 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 52 transitions. [2023-11-12 02:25:27,507 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-12 02:25:27,507 INFO L218 hiAutomatonCegarLoop]: Abstraction has 51 states and 52 transitions. [2023-11-12 02:25:27,508 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 52 transitions. [2023-11-12 02:25:27,512 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2023-11-12 02:25:27,512 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 51 states, 51 states have (on average 1.0196078431372548) internal successors, (52), 50 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-12 02:25:27,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 52 transitions. [2023-11-12 02:25:27,513 INFO L240 hiAutomatonCegarLoop]: Abstraction has 51 states and 52 transitions. [2023-11-12 02:25:27,514 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2023-11-12 02:25:27,516 INFO L428 stractBuchiCegarLoop]: Abstraction has 51 states and 52 transitions. [2023-11-12 02:25:27,517 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2023-11-12 02:25:27,517 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 51 states and 52 transitions. [2023-11-12 02:25:27,524 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2023-11-12 02:25:27,524 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-12 02:25:27,525 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-12 02:25:27,528 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [22, 22, 1, 1, 1, 1, 1] [2023-11-12 02:25:27,529 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-12 02:25:27,529 INFO L748 eck$LassoCheckResult]: Stem: 595#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(22, 2); 596#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet2#1, main_#t~nondet4#1, main_#t~post3#1, main_~i~0#1, main_#t~mem5#1, main_~i~1#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~marker~0#1, main_~pos~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_#t~nondet1#1;main_~marker~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;main_~pos~0#1 := main_#t~nondet2#1;havoc main_#t~nondet2#1;main_~i~0#1 := 0; 587#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 588#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 589#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 590#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 591#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 637#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 636#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 635#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 634#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 633#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 632#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 631#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 630#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 629#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 628#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 627#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 626#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 625#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 624#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 623#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 622#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 621#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 620#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 619#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 618#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 617#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 616#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 615#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 614#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 613#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 612#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 611#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 610#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 609#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 608#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 607#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 606#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 605#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 604#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 603#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 602#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 601#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 600#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 599#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 598#L20-3 assume !(main_~i~0#1 < 100000); 597#L20-4 havoc main_~i~0#1; 594#L25 assume main_~pos~0#1 >= 0 && main_~pos~0#1 < 100000;call write~int(main_~marker~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~pos~0#1, 4);main_~i~1#1 := 0; 593#L28-3 [2023-11-12 02:25:27,529 INFO L750 eck$LassoCheckResult]: Loop: 593#L28-3 call main_#t~mem5#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~1#1, 4); 592#L28-1 assume !!(main_#t~mem5#1 != main_~marker~0#1);havoc main_#t~mem5#1;main_~i~1#1 := 1 + main_~i~1#1; 593#L28-3 [2023-11-12 02:25:27,530 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-12 02:25:27,530 INFO L85 PathProgramCache]: Analyzing trace with hash -96806340, now seen corresponding path program 4 times [2023-11-12 02:25:27,530 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-12 02:25:27,530 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1721463937] [2023-11-12 02:25:27,530 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-12 02:25:27,531 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-12 02:25:27,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-12 02:25:28,327 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-12 02:25:28,327 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-12 02:25:28,327 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1721463937] [2023-11-12 02:25:28,328 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1721463937] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-12 02:25:28,328 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [415306366] [2023-11-12 02:25:28,328 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2023-11-12 02:25:28,328 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-12 02:25:28,328 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/z3 [2023-11-12 02:25:28,334 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-12 02:25:28,338 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2023-11-12 02:25:28,461 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2023-11-12 02:25:28,461 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-12 02:25:28,464 INFO L262 TraceCheckSpWp]: Trace formula consists of 287 conjuncts, 24 conjunts are in the unsatisfiable core [2023-11-12 02:25:28,468 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-12 02:25:28,580 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-12 02:25:28,580 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-12 02:25:29,543 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-12 02:25:29,544 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [415306366] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-12 02:25:29,544 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-12 02:25:29,544 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25] total 49 [2023-11-12 02:25:29,544 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1109924006] [2023-11-12 02:25:29,545 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-12 02:25:29,545 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-12 02:25:29,546 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-12 02:25:29,546 INFO L85 PathProgramCache]: Analyzing trace with hash 1734, now seen corresponding path program 5 times [2023-11-12 02:25:29,546 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-12 02:25:29,546 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1609513829] [2023-11-12 02:25:29,546 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-12 02:25:29,547 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-12 02:25:29,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-12 02:25:29,560 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-12 02:25:29,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-12 02:25:29,564 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-12 02:25:29,629 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-12 02:25:29,630 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2023-11-12 02:25:29,632 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2023-11-12 02:25:29,634 INFO L87 Difference]: Start difference. First operand 51 states and 52 transitions. cyclomatic complexity: 3 Second operand has 49 states, 49 states have (on average 2.0) internal successors, (98), 49 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-12 02:25:29,850 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-12 02:25:29,850 INFO L93 Difference]: Finished difference Result 99 states and 100 transitions. [2023-11-12 02:25:29,850 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 99 states and 100 transitions. [2023-11-12 02:25:29,852 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2023-11-12 02:25:29,853 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 99 states to 99 states and 100 transitions. [2023-11-12 02:25:29,854 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2023-11-12 02:25:29,854 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2023-11-12 02:25:29,854 INFO L73 IsDeterministic]: Start isDeterministic. Operand 99 states and 100 transitions. [2023-11-12 02:25:29,855 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-12 02:25:29,855 INFO L218 hiAutomatonCegarLoop]: Abstraction has 99 states and 100 transitions. [2023-11-12 02:25:29,856 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states and 100 transitions. [2023-11-12 02:25:29,861 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 99. [2023-11-12 02:25:29,861 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 99 states, 99 states have (on average 1.0101010101010102) internal successors, (100), 98 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-12 02:25:29,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 100 transitions. [2023-11-12 02:25:29,863 INFO L240 hiAutomatonCegarLoop]: Abstraction has 99 states and 100 transitions. [2023-11-12 02:25:29,863 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2023-11-12 02:25:29,864 INFO L428 stractBuchiCegarLoop]: Abstraction has 99 states and 100 transitions. [2023-11-12 02:25:29,864 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2023-11-12 02:25:29,864 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 99 states and 100 transitions. [2023-11-12 02:25:29,865 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2023-11-12 02:25:29,865 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-12 02:25:29,866 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-12 02:25:29,869 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [46, 46, 1, 1, 1, 1, 1] [2023-11-12 02:25:29,870 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-12 02:25:29,870 INFO L748 eck$LassoCheckResult]: Stem: 1085#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(22, 2); 1086#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet2#1, main_#t~nondet4#1, main_#t~post3#1, main_~i~0#1, main_#t~mem5#1, main_~i~1#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~marker~0#1, main_~pos~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_#t~nondet1#1;main_~marker~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;main_~pos~0#1 := main_#t~nondet2#1;havoc main_#t~nondet2#1;main_~i~0#1 := 0; 1077#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1078#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1079#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1080#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1081#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1175#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1174#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1173#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1172#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1171#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1170#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1169#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1168#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1167#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1166#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1165#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1164#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1163#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1162#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1161#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1160#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1159#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1158#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1157#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1156#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1155#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1154#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1153#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1152#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1151#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1150#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1149#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1148#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1147#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1146#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1145#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1144#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1143#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1142#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1141#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1140#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1139#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1138#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1137#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1136#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1135#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1134#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1133#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1132#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1131#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1130#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1129#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1128#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1127#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1126#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1125#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1124#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1123#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1122#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1121#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1120#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1119#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1118#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1117#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1116#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1115#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1114#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1113#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1112#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1111#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1110#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1109#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1108#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1107#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1106#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1105#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1104#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1103#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1102#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1101#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1100#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1099#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1098#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1097#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1096#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1095#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1094#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1093#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1092#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1091#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1090#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 1089#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1088#L20-3 assume !(main_~i~0#1 < 100000); 1087#L20-4 havoc main_~i~0#1; 1084#L25 assume main_~pos~0#1 >= 0 && main_~pos~0#1 < 100000;call write~int(main_~marker~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~pos~0#1, 4);main_~i~1#1 := 0; 1083#L28-3 [2023-11-12 02:25:29,871 INFO L750 eck$LassoCheckResult]: Loop: 1083#L28-3 call main_#t~mem5#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~1#1, 4); 1082#L28-1 assume !!(main_#t~mem5#1 != main_~marker~0#1);havoc main_#t~mem5#1;main_~i~1#1 := 1 + main_~i~1#1; 1083#L28-3 [2023-11-12 02:25:29,871 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-12 02:25:29,871 INFO L85 PathProgramCache]: Analyzing trace with hash -21777908, now seen corresponding path program 5 times [2023-11-12 02:25:29,872 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-12 02:25:29,872 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2132803592] [2023-11-12 02:25:29,872 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-12 02:25:29,872 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-12 02:25:29,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-12 02:25:32,976 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-12 02:25:32,977 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-12 02:25:32,977 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2132803592] [2023-11-12 02:25:32,977 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2132803592] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-12 02:25:32,977 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [75056223] [2023-11-12 02:25:32,977 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-12 02:25:32,978 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-12 02:25:32,978 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/z3 [2023-11-12 02:25:32,983 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-12 02:25:33,001 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2023-11-12 02:25:52,238 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2023-11-12 02:25:52,239 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-12 02:25:52,257 INFO L262 TraceCheckSpWp]: Trace formula consists of 551 conjuncts, 48 conjunts are in the unsatisfiable core [2023-11-12 02:25:52,264 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-12 02:25:52,479 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-12 02:25:52,479 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-12 02:25:56,221 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-12 02:25:56,222 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [75056223] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-12 02:25:56,222 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-12 02:25:56,222 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49, 49] total 97 [2023-11-12 02:25:56,222 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [88562667] [2023-11-12 02:25:56,222 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-12 02:25:56,224 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-12 02:25:56,224 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-12 02:25:56,224 INFO L85 PathProgramCache]: Analyzing trace with hash 1734, now seen corresponding path program 6 times [2023-11-12 02:25:56,224 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-12 02:25:56,225 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [929382555] [2023-11-12 02:25:56,225 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-12 02:25:56,225 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-12 02:25:56,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-12 02:25:56,230 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-12 02:25:56,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-12 02:25:56,234 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-12 02:25:56,274 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-12 02:25:56,275 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 97 interpolants. [2023-11-12 02:25:56,280 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4656, Invalid=4656, Unknown=0, NotChecked=0, Total=9312 [2023-11-12 02:25:56,281 INFO L87 Difference]: Start difference. First operand 99 states and 100 transitions. cyclomatic complexity: 3 Second operand has 97 states, 97 states have (on average 2.0) internal successors, (194), 97 states have internal predecessors, (194), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-12 02:25:56,752 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-12 02:25:56,752 INFO L93 Difference]: Finished difference Result 195 states and 196 transitions. [2023-11-12 02:25:56,753 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 195 states and 196 transitions. [2023-11-12 02:25:56,758 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2023-11-12 02:25:56,764 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 195 states to 195 states and 196 transitions. [2023-11-12 02:25:56,764 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2023-11-12 02:25:56,765 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2023-11-12 02:25:56,765 INFO L73 IsDeterministic]: Start isDeterministic. Operand 195 states and 196 transitions. [2023-11-12 02:25:56,773 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-12 02:25:56,773 INFO L218 hiAutomatonCegarLoop]: Abstraction has 195 states and 196 transitions. [2023-11-12 02:25:56,776 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 195 states and 196 transitions. [2023-11-12 02:25:56,785 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 195 to 195. [2023-11-12 02:25:56,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 195 states, 195 states have (on average 1.005128205128205) internal successors, (196), 194 states have internal predecessors, (196), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-12 02:25:56,794 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195 states to 195 states and 196 transitions. [2023-11-12 02:25:56,794 INFO L240 hiAutomatonCegarLoop]: Abstraction has 195 states and 196 transitions. [2023-11-12 02:25:56,794 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2023-11-12 02:25:56,796 INFO L428 stractBuchiCegarLoop]: Abstraction has 195 states and 196 transitions. [2023-11-12 02:25:56,796 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2023-11-12 02:25:56,797 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 195 states and 196 transitions. [2023-11-12 02:25:56,798 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2023-11-12 02:25:56,798 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-12 02:25:56,799 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-12 02:25:56,820 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [94, 94, 1, 1, 1, 1, 1] [2023-11-12 02:25:56,820 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-12 02:25:56,824 INFO L748 eck$LassoCheckResult]: Stem: 2055#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(22, 2); 2056#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet2#1, main_#t~nondet4#1, main_#t~post3#1, main_~i~0#1, main_#t~mem5#1, main_~i~1#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~marker~0#1, main_~pos~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_#t~nondet1#1;main_~marker~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;main_~pos~0#1 := main_#t~nondet2#1;havoc main_#t~nondet2#1;main_~i~0#1 := 0; 2047#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2048#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2049#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2050#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2051#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2241#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2240#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2239#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2238#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2237#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2236#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2235#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2234#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2233#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2232#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2231#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2230#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2229#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2228#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2227#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2226#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2225#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2224#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2223#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2222#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2221#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2220#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2219#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2218#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2217#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2216#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2215#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2214#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2213#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2212#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2211#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2210#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2209#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2208#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2207#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2206#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2205#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2204#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2203#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2202#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2201#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2200#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2199#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2198#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2197#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2196#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2195#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2194#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2193#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2192#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2191#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2190#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2189#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2188#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2187#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2186#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2185#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2184#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2183#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2182#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2181#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2180#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2179#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2178#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2177#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2176#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2175#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2174#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2173#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2172#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2171#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2170#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2169#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2168#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2167#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2166#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2165#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2164#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2163#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2162#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2161#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2160#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2159#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2158#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2157#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2156#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2155#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2154#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2153#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2152#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2151#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2150#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2149#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2148#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2147#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2146#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2145#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2144#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2143#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2142#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2141#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2140#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2139#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2138#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2137#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2136#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2135#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2134#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2133#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2132#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2131#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2130#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2129#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2128#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2127#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2126#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2125#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2124#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2123#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2122#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2121#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2120#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2119#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2118#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2117#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2116#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2115#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2114#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2113#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2112#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2111#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2110#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2109#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2108#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2107#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2106#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2105#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2104#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2103#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2102#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2101#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2100#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2099#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2098#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2097#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2096#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2095#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2094#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2093#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2092#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2091#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2090#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2089#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2088#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2087#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2086#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2085#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2084#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2083#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2082#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2081#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2080#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2079#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2078#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2077#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2076#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2075#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2074#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2073#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2072#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2071#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2070#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2069#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2068#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2067#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2066#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2065#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2064#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2063#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2062#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2061#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2060#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet4#1;call write~int(main_#t~nondet4#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet4#1; 2059#L20-2 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2058#L20-3 assume !(main_~i~0#1 < 100000); 2057#L20-4 havoc main_~i~0#1; 2054#L25 assume main_~pos~0#1 >= 0 && main_~pos~0#1 < 100000;call write~int(main_~marker~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~pos~0#1, 4);main_~i~1#1 := 0; 2053#L28-3 [2023-11-12 02:25:56,825 INFO L750 eck$LassoCheckResult]: Loop: 2053#L28-3 call main_#t~mem5#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~1#1, 4); 2052#L28-1 assume !!(main_#t~mem5#1 != main_~marker~0#1);havoc main_#t~mem5#1;main_~i~1#1 := 1 + main_~i~1#1; 2053#L28-3 [2023-11-12 02:25:56,826 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-12 02:25:56,826 INFO L85 PathProgramCache]: Analyzing trace with hash 1766769068, now seen corresponding path program 6 times [2023-11-12 02:25:56,826 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-12 02:25:56,827 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [857343992] [2023-11-12 02:25:56,830 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-12 02:25:56,830 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-12 02:25:57,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-12 02:26:05,940 INFO L134 CoverageAnalysis]: Checked inductivity of 8836 backedges. 0 proven. 8836 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-12 02:26:05,940 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-12 02:26:05,940 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [857343992] [2023-11-12 02:26:05,940 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [857343992] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-12 02:26:05,941 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1725622810] [2023-11-12 02:26:05,941 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2023-11-12 02:26:05,941 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-12 02:26:05,941 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/z3 [2023-11-12 02:26:05,947 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-12 02:26:05,949 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a4140a96-ea7e-42e1-8d51-1c2fa377860d/bin/uautomizer-verify-uTZkv6EMXl/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process