./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/termination-memory-alloca/Urban-2013WST-Fig2-modified1000-alloca.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 9bd2c7ff Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9d2a5025-28a0-462c-97c1-8d751adae854/bin/uautomizer-verify-uCwYo4JHxu/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9d2a5025-28a0-462c-97c1-8d751adae854/bin/uautomizer-verify-uCwYo4JHxu/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9d2a5025-28a0-462c-97c1-8d751adae854/bin/uautomizer-verify-uCwYo4JHxu/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9d2a5025-28a0-462c-97c1-8d751adae854/bin/uautomizer-verify-uCwYo4JHxu/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/termination-memory-alloca/Urban-2013WST-Fig2-modified1000-alloca.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9d2a5025-28a0-462c-97c1-8d751adae854/bin/uautomizer-verify-uCwYo4JHxu/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9d2a5025-28a0-462c-97c1-8d751adae854/bin/uautomizer-verify-uCwYo4JHxu --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 68763c9a2179c48c1fc2989bd19031bbd8829c13b9c8eeaf244defd8aef53cfe --- Real Ultimate output --- This is Ultimate 0.2.3-dev-9bd2c7f [2023-11-19 07:41:41,536 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-19 07:41:41,646 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9d2a5025-28a0-462c-97c1-8d751adae854/bin/uautomizer-verify-uCwYo4JHxu/config/svcomp-Termination-64bit-Automizer_Default.epf [2023-11-19 07:41:41,655 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-19 07:41:41,657 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-19 07:41:41,693 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-19 07:41:41,694 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-19 07:41:41,695 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-19 07:41:41,697 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-19 07:41:41,701 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-19 07:41:41,702 INFO L153 SettingsManager]: * Use SBE=true [2023-11-19 07:41:41,702 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-19 07:41:41,703 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-19 07:41:41,705 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-19 07:41:41,705 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-19 07:41:41,706 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-19 07:41:41,706 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-19 07:41:41,707 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-19 07:41:41,707 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-19 07:41:41,708 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-19 07:41:41,708 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-19 07:41:41,709 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-19 07:41:41,709 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-19 07:41:41,710 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-19 07:41:41,710 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-19 07:41:41,711 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-19 07:41:41,711 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-19 07:41:41,712 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-19 07:41:41,712 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-19 07:41:41,713 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-19 07:41:41,714 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-19 07:41:41,714 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-19 07:41:41,715 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-19 07:41:41,715 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9d2a5025-28a0-462c-97c1-8d751adae854/bin/uautomizer-verify-uCwYo4JHxu/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9d2a5025-28a0-462c-97c1-8d751adae854/bin/uautomizer-verify-uCwYo4JHxu Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 68763c9a2179c48c1fc2989bd19031bbd8829c13b9c8eeaf244defd8aef53cfe [2023-11-19 07:41:42,043 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-19 07:41:42,069 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-19 07:41:42,074 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-19 07:41:42,075 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-19 07:41:42,075 INFO L274 PluginConnector]: CDTParser initialized [2023-11-19 07:41:42,077 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9d2a5025-28a0-462c-97c1-8d751adae854/bin/uautomizer-verify-uCwYo4JHxu/../../sv-benchmarks/c/termination-memory-alloca/Urban-2013WST-Fig2-modified1000-alloca.i [2023-11-19 07:41:45,223 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-19 07:41:45,575 INFO L384 CDTParser]: Found 1 translation units. [2023-11-19 07:41:45,576 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9d2a5025-28a0-462c-97c1-8d751adae854/sv-benchmarks/c/termination-memory-alloca/Urban-2013WST-Fig2-modified1000-alloca.i [2023-11-19 07:41:45,598 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9d2a5025-28a0-462c-97c1-8d751adae854/bin/uautomizer-verify-uCwYo4JHxu/data/d65d88e67/83633f07075b433d9fcd28f8411d1f37/FLAGa00cc3ecb [2023-11-19 07:41:45,614 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9d2a5025-28a0-462c-97c1-8d751adae854/bin/uautomizer-verify-uCwYo4JHxu/data/d65d88e67/83633f07075b433d9fcd28f8411d1f37 [2023-11-19 07:41:45,617 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-19 07:41:45,619 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-19 07:41:45,622 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-19 07:41:45,622 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-19 07:41:45,628 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-19 07:41:45,629 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 19.11 07:41:45" (1/1) ... [2023-11-19 07:41:45,631 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@10cc007f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 07:41:45, skipping insertion in model container [2023-11-19 07:41:45,631 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 19.11 07:41:45" (1/1) ... [2023-11-19 07:41:45,696 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-19 07:41:45,992 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-19 07:41:46,006 INFO L202 MainTranslator]: Completed pre-run [2023-11-19 07:41:46,042 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-19 07:41:46,071 INFO L206 MainTranslator]: Completed translation [2023-11-19 07:41:46,072 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 07:41:46 WrapperNode [2023-11-19 07:41:46,072 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-19 07:41:46,073 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-19 07:41:46,073 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-19 07:41:46,073 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-19 07:41:46,081 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 07:41:46" (1/1) ... [2023-11-19 07:41:46,093 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 07:41:46" (1/1) ... [2023-11-19 07:41:46,113 INFO L138 Inliner]: procedures = 109, calls = 13, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 33 [2023-11-19 07:41:46,113 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-19 07:41:46,114 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-19 07:41:46,114 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-19 07:41:46,114 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-19 07:41:46,124 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 07:41:46" (1/1) ... [2023-11-19 07:41:46,124 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 07:41:46" (1/1) ... [2023-11-19 07:41:46,127 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 07:41:46" (1/1) ... [2023-11-19 07:41:46,127 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 07:41:46" (1/1) ... [2023-11-19 07:41:46,132 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 07:41:46" (1/1) ... [2023-11-19 07:41:46,135 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 07:41:46" (1/1) ... [2023-11-19 07:41:46,136 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 07:41:46" (1/1) ... [2023-11-19 07:41:46,138 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 07:41:46" (1/1) ... [2023-11-19 07:41:46,140 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-19 07:41:46,141 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-19 07:41:46,141 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-19 07:41:46,141 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-19 07:41:46,142 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 07:41:46" (1/1) ... [2023-11-19 07:41:46,148 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:41:46,163 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9d2a5025-28a0-462c-97c1-8d751adae854/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:41:46,177 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9d2a5025-28a0-462c-97c1-8d751adae854/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:41:46,208 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9d2a5025-28a0-462c-97c1-8d751adae854/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-19 07:41:46,219 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2023-11-19 07:41:46,219 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2023-11-19 07:41:46,219 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2023-11-19 07:41:46,220 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-11-19 07:41:46,220 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-19 07:41:46,220 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-19 07:41:46,333 INFO L236 CfgBuilder]: Building ICFG [2023-11-19 07:41:46,336 INFO L262 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-19 07:41:46,472 INFO L277 CfgBuilder]: Performing block encoding [2023-11-19 07:41:46,480 INFO L297 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-19 07:41:46,480 INFO L302 CfgBuilder]: Removed 2 assume(true) statements. [2023-11-19 07:41:46,484 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 19.11 07:41:46 BoogieIcfgContainer [2023-11-19 07:41:46,484 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-19 07:41:46,485 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-19 07:41:46,485 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-19 07:41:46,496 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-19 07:41:46,497 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-19 07:41:46,497 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 19.11 07:41:45" (1/3) ... [2023-11-19 07:41:46,498 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@53ce67fc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 19.11 07:41:46, skipping insertion in model container [2023-11-19 07:41:46,498 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-19 07:41:46,498 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 07:41:46" (2/3) ... [2023-11-19 07:41:46,499 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@53ce67fc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 19.11 07:41:46, skipping insertion in model container [2023-11-19 07:41:46,499 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-19 07:41:46,499 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 19.11 07:41:46" (3/3) ... [2023-11-19 07:41:46,505 INFO L332 chiAutomizerObserver]: Analyzing ICFG Urban-2013WST-Fig2-modified1000-alloca.i [2023-11-19 07:41:46,577 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-19 07:41:46,577 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-19 07:41:46,577 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-19 07:41:46,577 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-19 07:41:46,577 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-19 07:41:46,578 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-19 07:41:46,578 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-19 07:41:46,578 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-19 07:41:46,582 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 11 states, 10 states have (on average 1.4) internal successors, (14), 10 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-19 07:41:46,603 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2023-11-19 07:41:46,603 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-19 07:41:46,603 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-19 07:41:46,609 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-19 07:41:46,609 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2023-11-19 07:41:46,609 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-19 07:41:46,610 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 11 states, 10 states have (on average 1.4) internal successors, (14), 10 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-19 07:41:46,611 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2023-11-19 07:41:46,611 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-19 07:41:46,611 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-19 07:41:46,612 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-19 07:41:46,612 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2023-11-19 07:41:46,618 INFO L748 eck$LassoCheckResult]: Stem: 6#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 10#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem6#1, main_#t~mem5#1, main_#t~mem7#1, main_#t~mem4#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 5#L549-3true [2023-11-19 07:41:46,619 INFO L750 eck$LassoCheckResult]: Loop: 5#L549-3true call main_#t~mem4#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 2#L549-1true assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 7#L551-3true assume !true; 11#L551-4true call main_#t~mem7#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 5#L549-3true [2023-11-19 07:41:46,626 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-19 07:41:46,626 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2023-11-19 07:41:46,637 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-19 07:41:46,637 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [246841990] [2023-11-19 07:41:46,638 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:41:46,638 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-19 07:41:46,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-19 07:41:46,806 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-19 07:41:46,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-19 07:41:46,861 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-19 07:41:46,867 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-19 07:41:46,868 INFO L85 PathProgramCache]: Analyzing trace with hash 1144360, now seen corresponding path program 1 times [2023-11-19 07:41:46,868 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-19 07:41:46,868 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1193826744] [2023-11-19 07:41:46,869 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:41:46,869 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-19 07:41:46,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-19 07:41:46,970 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-19 07:41:46,971 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-19 07:41:46,971 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1193826744] [2023-11-19 07:41:46,972 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1193826744] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-19 07:41:46,972 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-19 07:41:46,972 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2023-11-19 07:41:46,973 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [884244875] [2023-11-19 07:41:46,973 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-19 07:41:46,978 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-19 07:41:46,979 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-19 07:41:47,017 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2023-11-19 07:41:47,019 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2023-11-19 07:41:47,021 INFO L87 Difference]: Start difference. First operand has 11 states, 10 states have (on average 1.4) internal successors, (14), 10 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 2.0) internal successors, (4), 2 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-19 07:41:47,028 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-19 07:41:47,028 INFO L93 Difference]: Finished difference Result 11 states and 12 transitions. [2023-11-19 07:41:47,030 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 11 states and 12 transitions. [2023-11-19 07:41:47,031 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2023-11-19 07:41:47,035 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 11 states to 7 states and 8 transitions. [2023-11-19 07:41:47,036 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2023-11-19 07:41:47,037 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2023-11-19 07:41:47,037 INFO L73 IsDeterministic]: Start isDeterministic. Operand 7 states and 8 transitions. [2023-11-19 07:41:47,038 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-19 07:41:47,038 INFO L218 hiAutomatonCegarLoop]: Abstraction has 7 states and 8 transitions. [2023-11-19 07:41:47,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7 states and 8 transitions. [2023-11-19 07:41:47,067 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7 to 7. [2023-11-19 07:41:47,068 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 1.1428571428571428) internal successors, (8), 6 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-19 07:41:47,069 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 8 transitions. [2023-11-19 07:41:47,070 INFO L240 hiAutomatonCegarLoop]: Abstraction has 7 states and 8 transitions. [2023-11-19 07:41:47,072 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2023-11-19 07:41:47,077 INFO L428 stractBuchiCegarLoop]: Abstraction has 7 states and 8 transitions. [2023-11-19 07:41:47,077 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-19 07:41:47,077 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 7 states and 8 transitions. [2023-11-19 07:41:47,079 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2023-11-19 07:41:47,079 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-19 07:41:47,080 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-19 07:41:47,081 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-19 07:41:47,081 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2023-11-19 07:41:47,082 INFO L748 eck$LassoCheckResult]: Stem: 33#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 34#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem6#1, main_#t~mem5#1, main_#t~mem7#1, main_#t~mem4#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 32#L549-3 [2023-11-19 07:41:47,082 INFO L750 eck$LassoCheckResult]: Loop: 32#L549-3 call main_#t~mem4#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 30#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 31#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 35#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 36#L551-4 call main_#t~mem7#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 32#L549-3 [2023-11-19 07:41:47,084 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-19 07:41:47,084 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 2 times [2023-11-19 07:41:47,085 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-19 07:41:47,086 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [401357114] [2023-11-19 07:41:47,086 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:41:47,086 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-19 07:41:47,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-19 07:41:47,120 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-19 07:41:47,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-19 07:41:47,146 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-19 07:41:47,148 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-19 07:41:47,148 INFO L85 PathProgramCache]: Analyzing trace with hash 35468273, now seen corresponding path program 1 times [2023-11-19 07:41:47,148 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-19 07:41:47,149 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [656465956] [2023-11-19 07:41:47,149 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:41:47,150 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-19 07:41:47,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-19 07:41:47,446 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-19 07:41:47,446 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-19 07:41:47,447 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [656465956] [2023-11-19 07:41:47,447 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [656465956] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-19 07:41:47,447 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-19 07:41:47,447 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-11-19 07:41:47,448 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [8866779] [2023-11-19 07:41:47,448 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-19 07:41:47,449 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-19 07:41:47,449 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-19 07:41:47,449 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-19 07:41:47,450 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-11-19 07:41:47,450 INFO L87 Difference]: Start difference. First operand 7 states and 8 transitions. cyclomatic complexity: 2 Second operand has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-19 07:41:47,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-19 07:41:47,496 INFO L93 Difference]: Finished difference Result 9 states and 10 transitions. [2023-11-19 07:41:47,497 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 9 states and 10 transitions. [2023-11-19 07:41:47,497 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2023-11-19 07:41:47,498 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 9 states to 9 states and 10 transitions. [2023-11-19 07:41:47,498 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9 [2023-11-19 07:41:47,499 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9 [2023-11-19 07:41:47,499 INFO L73 IsDeterministic]: Start isDeterministic. Operand 9 states and 10 transitions. [2023-11-19 07:41:47,499 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-19 07:41:47,499 INFO L218 hiAutomatonCegarLoop]: Abstraction has 9 states and 10 transitions. [2023-11-19 07:41:47,500 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9 states and 10 transitions. [2023-11-19 07:41:47,501 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9 to 9. [2023-11-19 07:41:47,501 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 1.1111111111111112) internal successors, (10), 8 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-19 07:41:47,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 10 transitions. [2023-11-19 07:41:47,502 INFO L240 hiAutomatonCegarLoop]: Abstraction has 9 states and 10 transitions. [2023-11-19 07:41:47,502 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-19 07:41:47,503 INFO L428 stractBuchiCegarLoop]: Abstraction has 9 states and 10 transitions. [2023-11-19 07:41:47,504 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-19 07:41:47,504 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 9 states and 10 transitions. [2023-11-19 07:41:47,505 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2023-11-19 07:41:47,505 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-19 07:41:47,505 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-19 07:41:47,505 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-19 07:41:47,506 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 1, 1, 1, 1, 1] [2023-11-19 07:41:47,506 INFO L748 eck$LassoCheckResult]: Stem: 60#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 61#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem6#1, main_#t~mem5#1, main_#t~mem7#1, main_#t~mem4#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 57#L549-3 [2023-11-19 07:41:47,506 INFO L750 eck$LassoCheckResult]: Loop: 57#L549-3 call main_#t~mem4#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 55#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 56#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 58#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 59#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 63#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 62#L551-4 call main_#t~mem7#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 57#L549-3 [2023-11-19 07:41:47,507 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-19 07:41:47,507 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 3 times [2023-11-19 07:41:47,507 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-19 07:41:47,508 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [325250970] [2023-11-19 07:41:47,508 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:41:47,508 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-19 07:41:47,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-19 07:41:47,521 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-19 07:41:47,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-19 07:41:47,529 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-19 07:41:47,530 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-19 07:41:47,530 INFO L85 PathProgramCache]: Analyzing trace with hash -274676436, now seen corresponding path program 1 times [2023-11-19 07:41:47,531 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-19 07:41:47,531 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [691160572] [2023-11-19 07:41:47,531 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:41:47,532 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-19 07:41:47,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-19 07:41:47,764 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-19 07:41:47,765 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-19 07:41:47,765 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [691160572] [2023-11-19 07:41:47,766 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [691160572] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-19 07:41:47,766 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [140359544] [2023-11-19 07:41:47,766 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:41:47,767 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-19 07:41:47,767 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9d2a5025-28a0-462c-97c1-8d751adae854/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:41:47,769 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9d2a5025-28a0-462c-97c1-8d751adae854/bin/uautomizer-verify-uCwYo4JHxu/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-19 07:41:47,784 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9d2a5025-28a0-462c-97c1-8d751adae854/bin/uautomizer-verify-uCwYo4JHxu/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2023-11-19 07:41:47,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-19 07:41:47,876 INFO L262 TraceCheckSpWp]: Trace formula consists of 47 conjuncts, 8 conjunts are in the unsatisfiable core [2023-11-19 07:41:47,881 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-19 07:41:47,975 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2023-11-19 07:41:48,024 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-19 07:41:48,054 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2023-11-19 07:41:48,063 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-19 07:41:48,063 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-19 07:41:48,143 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-19 07:41:48,144 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [140359544] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-19 07:41:48,144 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-19 07:41:48,144 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5, 5] total 10 [2023-11-19 07:41:48,144 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [376769033] [2023-11-19 07:41:48,145 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-19 07:41:48,146 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-19 07:41:48,146 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-19 07:41:48,163 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2023-11-19 07:41:48,163 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=55, Unknown=0, NotChecked=0, Total=90 [2023-11-19 07:41:48,164 INFO L87 Difference]: Start difference. First operand 9 states and 10 transitions. cyclomatic complexity: 2 Second operand has 10 states, 10 states have (on average 1.5) internal successors, (15), 10 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-19 07:41:48,296 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-19 07:41:48,296 INFO L93 Difference]: Finished difference Result 15 states and 16 transitions. [2023-11-19 07:41:48,297 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 15 states and 16 transitions. [2023-11-19 07:41:48,300 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 13 [2023-11-19 07:41:48,301 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 15 states to 15 states and 16 transitions. [2023-11-19 07:41:48,302 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 [2023-11-19 07:41:48,302 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 15 [2023-11-19 07:41:48,302 INFO L73 IsDeterministic]: Start isDeterministic. Operand 15 states and 16 transitions. [2023-11-19 07:41:48,303 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-19 07:41:48,303 INFO L218 hiAutomatonCegarLoop]: Abstraction has 15 states and 16 transitions. [2023-11-19 07:41:48,303 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states and 16 transitions. [2023-11-19 07:41:48,306 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 15. [2023-11-19 07:41:48,306 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 1.0666666666666667) internal successors, (16), 14 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-19 07:41:48,307 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 16 transitions. [2023-11-19 07:41:48,308 INFO L240 hiAutomatonCegarLoop]: Abstraction has 15 states and 16 transitions. [2023-11-19 07:41:48,308 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2023-11-19 07:41:48,310 INFO L428 stractBuchiCegarLoop]: Abstraction has 15 states and 16 transitions. [2023-11-19 07:41:48,311 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-19 07:41:48,311 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 15 states and 16 transitions. [2023-11-19 07:41:48,313 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 13 [2023-11-19 07:41:48,313 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-19 07:41:48,313 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-19 07:41:48,314 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-19 07:41:48,314 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [5, 4, 1, 1, 1, 1] [2023-11-19 07:41:48,314 INFO L748 eck$LassoCheckResult]: Stem: 140#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 141#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem6#1, main_#t~mem5#1, main_#t~mem7#1, main_#t~mem4#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 136#L549-3 [2023-11-19 07:41:48,315 INFO L750 eck$LassoCheckResult]: Loop: 136#L549-3 call main_#t~mem4#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 134#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 135#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 137#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 138#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 139#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 148#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 147#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 146#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 145#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 144#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 143#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 142#L551-4 call main_#t~mem7#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 136#L549-3 [2023-11-19 07:41:48,315 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-19 07:41:48,315 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 4 times [2023-11-19 07:41:48,317 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-19 07:41:48,318 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [167799754] [2023-11-19 07:41:48,318 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:41:48,318 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-19 07:41:48,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-19 07:41:48,338 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-19 07:41:48,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-19 07:41:48,357 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-19 07:41:48,358 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-19 07:41:48,359 INFO L85 PathProgramCache]: Analyzing trace with hash 351922269, now seen corresponding path program 2 times [2023-11-19 07:41:48,359 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-19 07:41:48,360 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1409689940] [2023-11-19 07:41:48,360 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:41:48,361 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-19 07:41:48,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-19 07:41:48,941 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-19 07:41:48,942 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-19 07:41:48,942 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1409689940] [2023-11-19 07:41:48,942 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1409689940] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-19 07:41:48,942 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [320120861] [2023-11-19 07:41:48,943 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2023-11-19 07:41:48,943 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-19 07:41:48,943 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9d2a5025-28a0-462c-97c1-8d751adae854/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:41:48,969 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9d2a5025-28a0-462c-97c1-8d751adae854/bin/uautomizer-verify-uCwYo4JHxu/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-19 07:41:48,983 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9d2a5025-28a0-462c-97c1-8d751adae854/bin/uautomizer-verify-uCwYo4JHxu/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2023-11-19 07:41:49,051 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2023-11-19 07:41:49,051 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-19 07:41:49,052 INFO L262 TraceCheckSpWp]: Trace formula consists of 92 conjuncts, 17 conjunts are in the unsatisfiable core [2023-11-19 07:41:49,056 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-19 07:41:49,065 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2023-11-19 07:41:49,087 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-19 07:41:49,102 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-19 07:41:49,116 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-19 07:41:49,130 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-19 07:41:49,140 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2023-11-19 07:41:49,143 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-19 07:41:49,144 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-19 07:41:49,261 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-19 07:41:49,261 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [320120861] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-19 07:41:49,261 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-19 07:41:49,261 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 8, 8] total 19 [2023-11-19 07:41:49,262 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1050951677] [2023-11-19 07:41:49,262 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-19 07:41:49,262 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-19 07:41:49,263 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-19 07:41:49,263 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2023-11-19 07:41:49,264 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=140, Invalid=202, Unknown=0, NotChecked=0, Total=342 [2023-11-19 07:41:49,265 INFO L87 Difference]: Start difference. First operand 15 states and 16 transitions. cyclomatic complexity: 2 Second operand has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 19 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-19 07:41:49,467 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-19 07:41:49,467 INFO L93 Difference]: Finished difference Result 27 states and 28 transitions. [2023-11-19 07:41:49,467 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 27 states and 28 transitions. [2023-11-19 07:41:49,469 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 25 [2023-11-19 07:41:49,470 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 27 states to 27 states and 28 transitions. [2023-11-19 07:41:49,470 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 27 [2023-11-19 07:41:49,470 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 27 [2023-11-19 07:41:49,470 INFO L73 IsDeterministic]: Start isDeterministic. Operand 27 states and 28 transitions. [2023-11-19 07:41:49,471 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-19 07:41:49,471 INFO L218 hiAutomatonCegarLoop]: Abstraction has 27 states and 28 transitions. [2023-11-19 07:41:49,471 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states and 28 transitions. [2023-11-19 07:41:49,473 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2023-11-19 07:41:49,473 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 1.037037037037037) internal successors, (28), 26 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-19 07:41:49,474 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 28 transitions. [2023-11-19 07:41:49,474 INFO L240 hiAutomatonCegarLoop]: Abstraction has 27 states and 28 transitions. [2023-11-19 07:41:49,475 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2023-11-19 07:41:49,476 INFO L428 stractBuchiCegarLoop]: Abstraction has 27 states and 28 transitions. [2023-11-19 07:41:49,476 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2023-11-19 07:41:49,476 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 27 states and 28 transitions. [2023-11-19 07:41:49,477 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 25 [2023-11-19 07:41:49,478 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-19 07:41:49,478 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-19 07:41:49,478 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-19 07:41:49,479 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [11, 10, 1, 1, 1, 1] [2023-11-19 07:41:49,479 INFO L748 eck$LassoCheckResult]: Stem: 288#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 289#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem6#1, main_#t~mem5#1, main_#t~mem7#1, main_#t~mem4#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 284#L549-3 [2023-11-19 07:41:49,479 INFO L750 eck$LassoCheckResult]: Loop: 284#L549-3 call main_#t~mem4#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 282#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 283#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 285#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 286#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 287#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 308#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 307#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 306#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 305#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 304#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 303#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 302#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 301#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 300#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 299#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 298#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 297#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 296#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 295#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 294#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 293#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 292#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 291#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 290#L551-4 call main_#t~mem7#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 284#L549-3 [2023-11-19 07:41:49,480 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-19 07:41:49,480 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 5 times [2023-11-19 07:41:49,480 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-19 07:41:49,480 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1851018810] [2023-11-19 07:41:49,481 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:41:49,481 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-19 07:41:49,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-19 07:41:49,487 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-19 07:41:49,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-19 07:41:49,492 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-19 07:41:49,493 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-19 07:41:49,493 INFO L85 PathProgramCache]: Analyzing trace with hash 646907007, now seen corresponding path program 3 times [2023-11-19 07:41:49,493 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-19 07:41:49,493 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [603968659] [2023-11-19 07:41:49,493 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:41:49,494 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-19 07:41:49,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-19 07:41:51,110 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-19 07:41:51,110 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-19 07:41:51,110 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [603968659] [2023-11-19 07:41:51,111 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [603968659] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-19 07:41:51,111 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [46675157] [2023-11-19 07:41:51,111 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-19 07:41:51,111 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-19 07:41:51,112 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9d2a5025-28a0-462c-97c1-8d751adae854/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:41:51,114 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9d2a5025-28a0-462c-97c1-8d751adae854/bin/uautomizer-verify-uCwYo4JHxu/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-19 07:41:51,139 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9d2a5025-28a0-462c-97c1-8d751adae854/bin/uautomizer-verify-uCwYo4JHxu/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2023-11-19 07:41:51,280 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2023-11-19 07:41:51,280 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-19 07:41:51,283 INFO L262 TraceCheckSpWp]: Trace formula consists of 182 conjuncts, 35 conjunts are in the unsatisfiable core [2023-11-19 07:41:51,289 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-19 07:41:51,299 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2023-11-19 07:41:51,319 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-19 07:41:51,333 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-19 07:41:51,346 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-19 07:41:51,360 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-19 07:41:51,374 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-19 07:41:51,388 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-19 07:41:51,402 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-19 07:41:51,416 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-19 07:41:51,430 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-19 07:41:51,449 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-19 07:41:51,459 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2023-11-19 07:41:51,463 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-19 07:41:51,463 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-19 07:41:51,901 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-19 07:41:51,901 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [46675157] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-19 07:41:51,901 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-19 07:41:51,902 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 14, 14] total 36 [2023-11-19 07:41:51,902 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [381608857] [2023-11-19 07:41:51,902 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-19 07:41:51,903 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-19 07:41:51,903 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-19 07:41:51,904 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2023-11-19 07:41:51,905 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=541, Invalid=719, Unknown=0, NotChecked=0, Total=1260 [2023-11-19 07:41:51,906 INFO L87 Difference]: Start difference. First operand 27 states and 28 transitions. cyclomatic complexity: 2 Second operand has 36 states, 36 states have (on average 1.8888888888888888) internal successors, (68), 36 states have internal predecessors, (68), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-19 07:41:52,410 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-19 07:41:52,410 INFO L93 Difference]: Finished difference Result 51 states and 52 transitions. [2023-11-19 07:41:52,411 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 52 transitions. [2023-11-19 07:41:52,413 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 49 [2023-11-19 07:41:52,414 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 51 states and 52 transitions. [2023-11-19 07:41:52,414 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 51 [2023-11-19 07:41:52,418 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 51 [2023-11-19 07:41:52,420 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 52 transitions. [2023-11-19 07:41:52,420 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-19 07:41:52,421 INFO L218 hiAutomatonCegarLoop]: Abstraction has 51 states and 52 transitions. [2023-11-19 07:41:52,421 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 52 transitions. [2023-11-19 07:41:52,424 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2023-11-19 07:41:52,426 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 51 states, 51 states have (on average 1.0196078431372548) internal successors, (52), 50 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-19 07:41:52,430 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 52 transitions. [2023-11-19 07:41:52,430 INFO L240 hiAutomatonCegarLoop]: Abstraction has 51 states and 52 transitions. [2023-11-19 07:41:52,431 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2023-11-19 07:41:52,434 INFO L428 stractBuchiCegarLoop]: Abstraction has 51 states and 52 transitions. [2023-11-19 07:41:52,434 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2023-11-19 07:41:52,434 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 51 states and 52 transitions. [2023-11-19 07:41:52,438 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 49 [2023-11-19 07:41:52,439 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-19 07:41:52,439 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-19 07:41:52,440 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-19 07:41:52,441 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [23, 22, 1, 1, 1, 1] [2023-11-19 07:41:52,441 INFO L748 eck$LassoCheckResult]: Stem: 573#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 574#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem6#1, main_#t~mem5#1, main_#t~mem7#1, main_#t~mem4#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 569#L549-3 [2023-11-19 07:41:52,441 INFO L750 eck$LassoCheckResult]: Loop: 569#L549-3 call main_#t~mem4#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 567#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 568#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 572#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 570#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 571#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 617#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 616#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 615#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 614#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 613#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 612#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 611#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 610#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 609#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 608#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 607#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 606#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 605#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 604#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 603#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 602#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 601#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 600#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 599#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 598#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 597#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 596#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 595#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 594#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 593#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 592#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 591#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 590#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 589#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 588#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 587#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 586#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 585#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 584#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 583#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 582#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 581#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 580#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 579#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 578#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 577#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 576#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 575#L551-4 call main_#t~mem7#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 569#L549-3 [2023-11-19 07:41:52,442 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-19 07:41:52,442 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 6 times [2023-11-19 07:41:52,442 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-19 07:41:52,443 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2029504960] [2023-11-19 07:41:52,443 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:41:52,444 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-19 07:41:52,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-19 07:41:52,455 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-19 07:41:52,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-19 07:41:52,460 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-19 07:41:52,461 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-19 07:41:52,462 INFO L85 PathProgramCache]: Analyzing trace with hash 1009537987, now seen corresponding path program 4 times [2023-11-19 07:41:52,462 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-19 07:41:52,462 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1332609928] [2023-11-19 07:41:52,462 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:41:52,463 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-19 07:41:52,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-19 07:41:56,833 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-19 07:41:56,833 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-19 07:41:56,834 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1332609928] [2023-11-19 07:41:56,834 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1332609928] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-19 07:41:56,834 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1550680155] [2023-11-19 07:41:56,834 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2023-11-19 07:41:56,834 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-19 07:41:56,834 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9d2a5025-28a0-462c-97c1-8d751adae854/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:41:56,841 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9d2a5025-28a0-462c-97c1-8d751adae854/bin/uautomizer-verify-uCwYo4JHxu/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-19 07:41:56,872 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9d2a5025-28a0-462c-97c1-8d751adae854/bin/uautomizer-verify-uCwYo4JHxu/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2023-11-19 07:41:57,262 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2023-11-19 07:41:57,262 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-19 07:41:57,267 INFO L262 TraceCheckSpWp]: Trace formula consists of 362 conjuncts, 71 conjunts are in the unsatisfiable core [2023-11-19 07:41:57,278 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-19 07:41:57,284 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2023-11-19 07:41:57,295 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-19 07:41:57,317 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-19 07:41:57,332 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-19 07:41:57,343 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-19 07:41:57,363 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-19 07:41:57,384 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-19 07:41:57,399 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-19 07:41:57,411 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-19 07:41:57,424 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-19 07:41:57,436 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-19 07:41:57,446 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-19 07:41:57,471 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-19 07:41:57,483 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-19 07:41:57,501 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-19 07:41:57,512 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-19 07:41:57,521 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-19 07:41:57,533 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-19 07:41:57,542 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-19 07:41:57,551 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-19 07:41:57,561 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-19 07:41:57,576 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-19 07:41:57,585 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-19 07:41:57,592 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2023-11-19 07:41:57,598 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-19 07:41:57,598 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-19 07:41:58,768 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-19 07:41:58,768 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1550680155] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-19 07:41:58,768 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-19 07:41:58,768 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 26, 26] total 72 [2023-11-19 07:41:58,768 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [970839686] [2023-11-19 07:41:58,769 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-19 07:41:58,769 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-19 07:41:58,770 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-19 07:41:58,773 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 72 interpolants. [2023-11-19 07:41:58,775 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=2233, Invalid=2879, Unknown=0, NotChecked=0, Total=5112 [2023-11-19 07:41:58,776 INFO L87 Difference]: Start difference. First operand 51 states and 52 transitions. cyclomatic complexity: 2 Second operand has 72 states, 72 states have (on average 1.9444444444444444) internal successors, (140), 72 states have internal predecessors, (140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-19 07:42:00,121 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-19 07:42:00,121 INFO L93 Difference]: Finished difference Result 99 states and 100 transitions. [2023-11-19 07:42:00,121 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 99 states and 100 transitions. [2023-11-19 07:42:00,123 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 97 [2023-11-19 07:42:00,124 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 99 states to 99 states and 100 transitions. [2023-11-19 07:42:00,124 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 99 [2023-11-19 07:42:00,125 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 99 [2023-11-19 07:42:00,125 INFO L73 IsDeterministic]: Start isDeterministic. Operand 99 states and 100 transitions. [2023-11-19 07:42:00,130 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-19 07:42:00,130 INFO L218 hiAutomatonCegarLoop]: Abstraction has 99 states and 100 transitions. [2023-11-19 07:42:00,131 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states and 100 transitions. [2023-11-19 07:42:00,136 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 99. [2023-11-19 07:42:00,138 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 99 states, 99 states have (on average 1.0101010101010102) internal successors, (100), 98 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-19 07:42:00,141 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 100 transitions. [2023-11-19 07:42:00,141 INFO L240 hiAutomatonCegarLoop]: Abstraction has 99 states and 100 transitions. [2023-11-19 07:42:00,141 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 94 states. [2023-11-19 07:42:00,144 INFO L428 stractBuchiCegarLoop]: Abstraction has 99 states and 100 transitions. [2023-11-19 07:42:00,144 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2023-11-19 07:42:00,144 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 99 states and 100 transitions. [2023-11-19 07:42:00,148 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 97 [2023-11-19 07:42:00,150 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-19 07:42:00,150 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-19 07:42:00,152 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-19 07:42:00,152 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [47, 46, 1, 1, 1, 1] [2023-11-19 07:42:00,153 INFO L748 eck$LassoCheckResult]: Stem: 1134#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1135#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem6#1, main_#t~mem5#1, main_#t~mem7#1, main_#t~mem4#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 1130#L549-3 [2023-11-19 07:42:00,153 INFO L750 eck$LassoCheckResult]: Loop: 1130#L549-3 call main_#t~mem4#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 1128#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1129#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1131#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1132#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1133#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1226#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1225#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1224#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1223#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1222#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1221#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1220#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1219#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1218#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1217#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1216#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1215#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1214#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1213#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1212#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1211#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1210#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1209#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1208#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1207#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1206#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1205#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1204#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1203#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1202#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1201#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1200#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1199#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1198#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1197#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1196#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1195#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1194#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1193#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1192#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1191#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1190#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1189#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1188#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1187#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1186#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1185#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1184#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1183#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1182#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1181#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1180#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1179#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1178#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1177#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1176#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1175#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1174#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1173#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1172#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1171#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1170#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1169#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1168#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1167#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1166#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1165#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1164#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1163#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1162#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1161#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1160#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1159#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1158#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1157#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1156#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1155#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1154#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1153#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1152#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1151#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1150#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1149#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1148#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1147#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1146#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1145#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1144#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1143#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1142#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1141#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1140#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1139#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1138#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1137#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 1136#L551-4 call main_#t~mem7#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 1130#L549-3 [2023-11-19 07:42:00,154 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-19 07:42:00,154 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 7 times [2023-11-19 07:42:00,154 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-19 07:42:00,155 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [300188072] [2023-11-19 07:42:00,155 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:42:00,155 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-19 07:42:00,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-19 07:42:00,161 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-19 07:42:00,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-19 07:42:00,166 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-19 07:42:00,166 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-19 07:42:00,167 INFO L85 PathProgramCache]: Analyzing trace with hash 1846627915, now seen corresponding path program 5 times [2023-11-19 07:42:00,167 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-19 07:42:00,167 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1474328916] [2023-11-19 07:42:00,167 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:42:00,167 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-19 07:42:00,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-19 07:42:13,067 INFO L134 CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-19 07:42:13,068 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-19 07:42:13,068 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1474328916] [2023-11-19 07:42:13,068 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1474328916] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-19 07:42:13,068 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1203822773] [2023-11-19 07:42:13,068 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-19 07:42:13,069 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-19 07:42:13,069 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9d2a5025-28a0-462c-97c1-8d751adae854/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:42:13,073 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9d2a5025-28a0-462c-97c1-8d751adae854/bin/uautomizer-verify-uCwYo4JHxu/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-19 07:42:13,090 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9d2a5025-28a0-462c-97c1-8d751adae854/bin/uautomizer-verify-uCwYo4JHxu/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process