./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/loop-simple/deep-nested.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 9bd2c7ff Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/loop-simple/deep-nested.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash f4fa4f6a03e1cc5362361e8e2a443a39504511936859bef102e6d3337f038be8 --- Real Ultimate output --- This is Ultimate 0.2.3-dev-9bd2c7f [2023-11-19 07:57:08,092 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-19 07:57:08,202 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/config/svcomp-Termination-32bit-Automizer_Default.epf [2023-11-19 07:57:08,210 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-19 07:57:08,211 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-19 07:57:08,256 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-19 07:57:08,257 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-19 07:57:08,257 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-19 07:57:08,258 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-19 07:57:08,264 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-19 07:57:08,265 INFO L153 SettingsManager]: * Use SBE=true [2023-11-19 07:57:08,265 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-19 07:57:08,266 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-19 07:57:08,267 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-19 07:57:08,268 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-19 07:57:08,268 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-19 07:57:08,269 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-19 07:57:08,269 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-19 07:57:08,270 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-19 07:57:08,270 INFO L153 SettingsManager]: * sizeof long=4 [2023-11-19 07:57:08,272 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-19 07:57:08,273 INFO L153 SettingsManager]: * sizeof POINTER=4 [2023-11-19 07:57:08,273 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-19 07:57:08,273 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-19 07:57:08,274 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-19 07:57:08,274 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-19 07:57:08,274 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-19 07:57:08,275 INFO L153 SettingsManager]: * sizeof long double=12 [2023-11-19 07:57:08,275 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-19 07:57:08,276 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-19 07:57:08,277 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-19 07:57:08,277 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-19 07:57:08,277 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-19 07:57:08,278 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-19 07:57:08,278 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-19 07:57:08,278 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-19 07:57:08,279 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> f4fa4f6a03e1cc5362361e8e2a443a39504511936859bef102e6d3337f038be8 [2023-11-19 07:57:08,616 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-19 07:57:08,644 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-19 07:57:08,647 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-19 07:57:08,648 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-19 07:57:08,649 INFO L274 PluginConnector]: CDTParser initialized [2023-11-19 07:57:08,650 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/../../sv-benchmarks/c/loop-simple/deep-nested.c [2023-11-19 07:57:11,776 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-19 07:57:11,999 INFO L384 CDTParser]: Found 1 translation units. [2023-11-19 07:57:11,999 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/sv-benchmarks/c/loop-simple/deep-nested.c [2023-11-19 07:57:12,007 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/data/41503e0d9/c0ab308705304d10ad9bff557c5b4c62/FLAG00bf7eae7 [2023-11-19 07:57:12,029 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/data/41503e0d9/c0ab308705304d10ad9bff557c5b4c62 [2023-11-19 07:57:12,032 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-19 07:57:12,037 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-19 07:57:12,039 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-19 07:57:12,039 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-19 07:57:12,050 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-19 07:57:12,051 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 19.11 07:57:12" (1/1) ... [2023-11-19 07:57:12,053 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6ab7a015 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 07:57:12, skipping insertion in model container [2023-11-19 07:57:12,054 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 19.11 07:57:12" (1/1) ... [2023-11-19 07:57:12,081 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-19 07:57:12,283 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-19 07:57:12,297 INFO L202 MainTranslator]: Completed pre-run [2023-11-19 07:57:12,331 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-19 07:57:12,350 INFO L206 MainTranslator]: Completed translation [2023-11-19 07:57:12,350 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 07:57:12 WrapperNode [2023-11-19 07:57:12,350 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-19 07:57:12,352 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-19 07:57:12,353 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-19 07:57:12,353 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-19 07:57:12,361 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 07:57:12" (1/1) ... [2023-11-19 07:57:12,371 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 07:57:12" (1/1) ... [2023-11-19 07:57:12,398 INFO L138 Inliner]: procedures = 10, calls = 8, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 61 [2023-11-19 07:57:12,399 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-19 07:57:12,399 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-19 07:57:12,400 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-19 07:57:12,400 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-19 07:57:12,411 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 07:57:12" (1/1) ... [2023-11-19 07:57:12,412 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 07:57:12" (1/1) ... [2023-11-19 07:57:12,426 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 07:57:12" (1/1) ... [2023-11-19 07:57:12,426 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 07:57:12" (1/1) ... [2023-11-19 07:57:12,429 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 07:57:12" (1/1) ... [2023-11-19 07:57:12,433 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 07:57:12" (1/1) ... [2023-11-19 07:57:12,434 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 07:57:12" (1/1) ... [2023-11-19 07:57:12,435 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 07:57:12" (1/1) ... [2023-11-19 07:57:12,437 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-19 07:57:12,438 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-19 07:57:12,438 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-19 07:57:12,438 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-19 07:57:12,439 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 07:57:12" (1/1) ... [2023-11-19 07:57:12,454 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:12,470 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:12,484 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:12,500 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-19 07:57:12,527 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2023-11-19 07:57:12,528 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-19 07:57:12,528 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-19 07:57:12,528 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2023-11-19 07:57:12,604 INFO L236 CfgBuilder]: Building ICFG [2023-11-19 07:57:12,607 INFO L262 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-19 07:57:12,861 INFO L277 CfgBuilder]: Performing block encoding [2023-11-19 07:57:12,870 INFO L297 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-19 07:57:12,871 INFO L302 CfgBuilder]: Removed 5 assume(true) statements. [2023-11-19 07:57:12,874 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 19.11 07:57:12 BoogieIcfgContainer [2023-11-19 07:57:12,875 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-19 07:57:12,876 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-19 07:57:12,876 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-19 07:57:12,881 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-19 07:57:12,882 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-19 07:57:12,882 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 19.11 07:57:12" (1/3) ... [2023-11-19 07:57:12,884 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4a152cbb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 19.11 07:57:12, skipping insertion in model container [2023-11-19 07:57:12,884 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-19 07:57:12,884 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 07:57:12" (2/3) ... [2023-11-19 07:57:12,885 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4a152cbb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 19.11 07:57:12, skipping insertion in model container [2023-11-19 07:57:12,885 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-19 07:57:12,886 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 19.11 07:57:12" (3/3) ... [2023-11-19 07:57:12,887 INFO L332 chiAutomizerObserver]: Analyzing ICFG deep-nested.c [2023-11-19 07:57:12,953 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-19 07:57:12,953 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-19 07:57:12,953 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-19 07:57:12,954 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-19 07:57:12,954 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-19 07:57:12,954 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-19 07:57:12,954 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-19 07:57:12,955 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-19 07:57:12,960 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 18 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 17 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-19 07:57:12,983 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 12 [2023-11-19 07:57:12,983 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-19 07:57:12,984 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-19 07:57:12,990 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-19 07:57:12,990 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-19 07:57:12,991 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-19 07:57:12,991 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 18 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 17 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-19 07:57:12,995 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 12 [2023-11-19 07:57:12,996 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-19 07:57:12,996 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-19 07:57:12,997 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-19 07:57:12,997 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-19 07:57:13,006 INFO L748 eck$LassoCheckResult]: Stem: 16#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(14, 2);call #Ultimate.allocInit(12, 3); 5#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~pre8#1, main_#t~pre7#1, main_#t~pre6#1, main_#t~pre5#1, main_#t~pre4#1, main_~a~0#1, main_~b~0#1, main_~c~0#1, main_~d~0#1, main_~e~0#1, main_~uint32_max~0#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~c~0#1;havoc main_~d~0#1;havoc main_~e~0#1;havoc main_~uint32_max~0#1;main_~uint32_max~0#1 := 4294967295;main_~a~0#1 := 0; 6#L17-3true [2023-11-19 07:57:13,007 INFO L750 eck$LassoCheckResult]: Loop: 6#L17-3true assume !!(main_~a~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~b~0#1 := 0; 13#L18-3true assume !(main_~b~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 9#L17-2true main_#t~pre4#1 := 1 + main_~a~0#1;main_~a~0#1 := 1 + main_~a~0#1;havoc main_#t~pre4#1; 6#L17-3true [2023-11-19 07:57:13,015 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-19 07:57:13,016 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2023-11-19 07:57:13,027 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-19 07:57:13,029 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [30379397] [2023-11-19 07:57:13,029 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:57:13,030 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-19 07:57:13,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-19 07:57:13,148 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-19 07:57:13,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-19 07:57:13,186 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-19 07:57:13,190 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-19 07:57:13,190 INFO L85 PathProgramCache]: Analyzing trace with hash 39964, now seen corresponding path program 1 times [2023-11-19 07:57:13,191 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-19 07:57:13,191 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [394442457] [2023-11-19 07:57:13,191 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:57:13,192 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-19 07:57:13,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-19 07:57:13,517 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-19 07:57:13,517 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-19 07:57:13,518 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [394442457] [2023-11-19 07:57:13,518 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [394442457] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-19 07:57:13,518 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-19 07:57:13,519 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2023-11-19 07:57:13,519 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1064759198] [2023-11-19 07:57:13,520 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-19 07:57:13,524 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-19 07:57:13,525 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-19 07:57:13,591 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-11-19 07:57:13,592 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-11-19 07:57:13,594 INFO L87 Difference]: Start difference. First operand has 18 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 17 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.0) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-19 07:57:13,687 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-19 07:57:13,688 INFO L93 Difference]: Finished difference Result 26 states and 33 transitions. [2023-11-19 07:57:13,689 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 26 states and 33 transitions. [2023-11-19 07:57:13,693 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 20 [2023-11-19 07:57:13,698 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 26 states to 22 states and 29 transitions. [2023-11-19 07:57:13,699 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 22 [2023-11-19 07:57:13,700 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 22 [2023-11-19 07:57:13,701 INFO L73 IsDeterministic]: Start isDeterministic. Operand 22 states and 29 transitions. [2023-11-19 07:57:13,702 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-19 07:57:13,702 INFO L218 hiAutomatonCegarLoop]: Abstraction has 22 states and 29 transitions. [2023-11-19 07:57:13,721 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states and 29 transitions. [2023-11-19 07:57:13,730 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 14. [2023-11-19 07:57:13,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 13 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-19 07:57:13,734 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 18 transitions. [2023-11-19 07:57:13,735 INFO L240 hiAutomatonCegarLoop]: Abstraction has 14 states and 18 transitions. [2023-11-19 07:57:13,740 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-11-19 07:57:13,746 INFO L428 stractBuchiCegarLoop]: Abstraction has 14 states and 18 transitions. [2023-11-19 07:57:13,746 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-19 07:57:13,746 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 14 states and 18 transitions. [2023-11-19 07:57:13,747 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 12 [2023-11-19 07:57:13,747 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-19 07:57:13,747 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-19 07:57:13,748 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-19 07:57:13,748 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2023-11-19 07:57:13,748 INFO L748 eck$LassoCheckResult]: Stem: 66#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(14, 2);call #Ultimate.allocInit(12, 3); 58#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~pre8#1, main_#t~pre7#1, main_#t~pre6#1, main_#t~pre5#1, main_#t~pre4#1, main_~a~0#1, main_~b~0#1, main_~c~0#1, main_~d~0#1, main_~e~0#1, main_~uint32_max~0#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~c~0#1;havoc main_~d~0#1;havoc main_~e~0#1;havoc main_~uint32_max~0#1;main_~uint32_max~0#1 := 4294967295;main_~a~0#1 := 0; 59#L17-3 [2023-11-19 07:57:13,748 INFO L750 eck$LassoCheckResult]: Loop: 59#L17-3 assume !!(main_~a~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~b~0#1 := 0; 60#L18-3 assume !!(main_~b~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~c~0#1 := 0; 54#L19-3 assume !(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 63#L18-2 main_#t~pre5#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre5#1; 64#L18-3 assume !(main_~b~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 61#L17-2 main_#t~pre4#1 := 1 + main_~a~0#1;main_~a~0#1 := 1 + main_~a~0#1;havoc main_#t~pre4#1; 59#L17-3 [2023-11-19 07:57:13,749 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-19 07:57:13,749 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 2 times [2023-11-19 07:57:13,749 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-19 07:57:13,749 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [435392894] [2023-11-19 07:57:13,750 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:57:13,750 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-19 07:57:13,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-19 07:57:13,757 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-19 07:57:13,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-19 07:57:13,764 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-19 07:57:13,764 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-19 07:57:13,765 INFO L85 PathProgramCache]: Analyzing trace with hash 1191194659, now seen corresponding path program 1 times [2023-11-19 07:57:13,765 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-19 07:57:13,765 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [886938401] [2023-11-19 07:57:13,765 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:57:13,766 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-19 07:57:13,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-19 07:57:13,878 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-19 07:57:13,879 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-19 07:57:13,879 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [886938401] [2023-11-19 07:57:13,879 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [886938401] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-19 07:57:13,879 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-19 07:57:13,879 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-19 07:57:13,880 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [366693572] [2023-11-19 07:57:13,880 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-19 07:57:13,880 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-19 07:57:13,881 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-19 07:57:13,881 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-19 07:57:13,881 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2023-11-19 07:57:13,882 INFO L87 Difference]: Start difference. First operand 14 states and 18 transitions. cyclomatic complexity: 5 Second operand has 4 states, 4 states have (on average 1.5) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-19 07:57:13,940 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-19 07:57:13,940 INFO L93 Difference]: Finished difference Result 21 states and 27 transitions. [2023-11-19 07:57:13,940 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 21 states and 27 transitions. [2023-11-19 07:57:13,942 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 19 [2023-11-19 07:57:13,942 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 21 states to 21 states and 27 transitions. [2023-11-19 07:57:13,943 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 21 [2023-11-19 07:57:13,943 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 21 [2023-11-19 07:57:13,943 INFO L73 IsDeterministic]: Start isDeterministic. Operand 21 states and 27 transitions. [2023-11-19 07:57:13,943 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-19 07:57:13,944 INFO L218 hiAutomatonCegarLoop]: Abstraction has 21 states and 27 transitions. [2023-11-19 07:57:13,944 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states and 27 transitions. [2023-11-19 07:57:13,945 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 15. [2023-11-19 07:57:13,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 1.2666666666666666) internal successors, (19), 14 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-19 07:57:13,946 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 19 transitions. [2023-11-19 07:57:13,947 INFO L240 hiAutomatonCegarLoop]: Abstraction has 15 states and 19 transitions. [2023-11-19 07:57:13,947 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-19 07:57:13,948 INFO L428 stractBuchiCegarLoop]: Abstraction has 15 states and 19 transitions. [2023-11-19 07:57:13,948 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-19 07:57:13,948 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 15 states and 19 transitions. [2023-11-19 07:57:13,949 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 13 [2023-11-19 07:57:13,949 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-19 07:57:13,949 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-19 07:57:13,950 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-19 07:57:13,950 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-19 07:57:13,950 INFO L748 eck$LassoCheckResult]: Stem: 109#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(14, 2);call #Ultimate.allocInit(12, 3); 100#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~pre8#1, main_#t~pre7#1, main_#t~pre6#1, main_#t~pre5#1, main_#t~pre4#1, main_~a~0#1, main_~b~0#1, main_~c~0#1, main_~d~0#1, main_~e~0#1, main_~uint32_max~0#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~c~0#1;havoc main_~d~0#1;havoc main_~e~0#1;havoc main_~uint32_max~0#1;main_~uint32_max~0#1 := 4294967295;main_~a~0#1 := 0; 101#L17-3 [2023-11-19 07:57:13,950 INFO L750 eck$LassoCheckResult]: Loop: 101#L17-3 assume !!(main_~a~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~b~0#1 := 0; 102#L18-3 assume !!(main_~b~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~c~0#1 := 0; 107#L19-3 assume !!(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~d~0#1 := 0; 108#L20-3 assume !(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 95#L19-2 main_#t~pre6#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre6#1; 96#L19-3 assume !(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 105#L18-2 main_#t~pre5#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre5#1; 106#L18-3 assume !(main_~b~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 104#L17-2 main_#t~pre4#1 := 1 + main_~a~0#1;main_~a~0#1 := 1 + main_~a~0#1;havoc main_#t~pre4#1; 101#L17-3 [2023-11-19 07:57:13,951 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-19 07:57:13,951 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 3 times [2023-11-19 07:57:13,951 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-19 07:57:13,952 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [467403232] [2023-11-19 07:57:13,952 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:57:13,952 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-19 07:57:13,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-19 07:57:13,959 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-19 07:57:13,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-19 07:57:13,966 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-19 07:57:13,966 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-19 07:57:13,966 INFO L85 PathProgramCache]: Analyzing trace with hash -1508685402, now seen corresponding path program 1 times [2023-11-19 07:57:13,967 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-19 07:57:13,967 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [375946411] [2023-11-19 07:57:13,967 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:57:13,967 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-19 07:57:13,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-19 07:57:14,165 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-19 07:57:14,166 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-19 07:57:14,166 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [375946411] [2023-11-19 07:57:14,166 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [375946411] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-19 07:57:14,167 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-19 07:57:14,167 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-19 07:57:14,167 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [16056585] [2023-11-19 07:57:14,167 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-19 07:57:14,168 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-19 07:57:14,168 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-19 07:57:14,168 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-19 07:57:14,169 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2023-11-19 07:57:14,169 INFO L87 Difference]: Start difference. First operand 15 states and 19 transitions. cyclomatic complexity: 5 Second operand has 4 states, 4 states have (on average 2.25) internal successors, (9), 3 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-19 07:57:14,212 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-19 07:57:14,212 INFO L93 Difference]: Finished difference Result 20 states and 25 transitions. [2023-11-19 07:57:14,212 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 20 states and 25 transitions. [2023-11-19 07:57:14,213 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 18 [2023-11-19 07:57:14,214 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 20 states to 20 states and 25 transitions. [2023-11-19 07:57:14,214 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20 [2023-11-19 07:57:14,215 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20 [2023-11-19 07:57:14,215 INFO L73 IsDeterministic]: Start isDeterministic. Operand 20 states and 25 transitions. [2023-11-19 07:57:14,215 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-19 07:57:14,215 INFO L218 hiAutomatonCegarLoop]: Abstraction has 20 states and 25 transitions. [2023-11-19 07:57:14,216 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states and 25 transitions. [2023-11-19 07:57:14,217 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 16. [2023-11-19 07:57:14,217 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.25) internal successors, (20), 15 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-19 07:57:14,218 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 20 transitions. [2023-11-19 07:57:14,218 INFO L240 hiAutomatonCegarLoop]: Abstraction has 16 states and 20 transitions. [2023-11-19 07:57:14,219 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-19 07:57:14,220 INFO L428 stractBuchiCegarLoop]: Abstraction has 16 states and 20 transitions. [2023-11-19 07:57:14,220 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-19 07:57:14,220 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 16 states and 20 transitions. [2023-11-19 07:57:14,221 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 14 [2023-11-19 07:57:14,221 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-19 07:57:14,221 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-19 07:57:14,222 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-19 07:57:14,222 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-19 07:57:14,222 INFO L748 eck$LassoCheckResult]: Stem: 152#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(14, 2);call #Ultimate.allocInit(12, 3); 142#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~pre8#1, main_#t~pre7#1, main_#t~pre6#1, main_#t~pre5#1, main_#t~pre4#1, main_~a~0#1, main_~b~0#1, main_~c~0#1, main_~d~0#1, main_~e~0#1, main_~uint32_max~0#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~c~0#1;havoc main_~d~0#1;havoc main_~e~0#1;havoc main_~uint32_max~0#1;main_~uint32_max~0#1 := 4294967295;main_~a~0#1 := 0; 143#L17-3 [2023-11-19 07:57:14,222 INFO L750 eck$LassoCheckResult]: Loop: 143#L17-3 assume !!(main_~a~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~b~0#1 := 0; 144#L18-3 assume !!(main_~b~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~c~0#1 := 0; 150#L19-3 assume !!(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~d~0#1 := 0; 151#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 139#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 140#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 149#L20-3 assume !(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 137#L19-2 main_#t~pre6#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre6#1; 138#L19-3 assume !(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 147#L18-2 main_#t~pre5#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre5#1; 148#L18-3 assume !(main_~b~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 146#L17-2 main_#t~pre4#1 := 1 + main_~a~0#1;main_~a~0#1 := 1 + main_~a~0#1;havoc main_#t~pre4#1; 143#L17-3 [2023-11-19 07:57:14,223 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-19 07:57:14,223 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 4 times [2023-11-19 07:57:14,223 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-19 07:57:14,223 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [308205808] [2023-11-19 07:57:14,223 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:57:14,224 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-19 07:57:14,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-19 07:57:14,230 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-19 07:57:14,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-19 07:57:14,243 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-19 07:57:14,244 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-19 07:57:14,244 INFO L85 PathProgramCache]: Analyzing trace with hash 111172885, now seen corresponding path program 1 times [2023-11-19 07:57:14,244 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-19 07:57:14,244 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1081134451] [2023-11-19 07:57:14,245 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:57:14,245 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-19 07:57:14,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-19 07:57:14,386 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-19 07:57:14,386 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-19 07:57:14,386 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1081134451] [2023-11-19 07:57:14,387 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1081134451] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-19 07:57:14,387 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-19 07:57:14,387 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-19 07:57:14,387 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2116746885] [2023-11-19 07:57:14,387 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-19 07:57:14,388 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-19 07:57:14,388 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-19 07:57:14,389 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-19 07:57:14,389 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2023-11-19 07:57:14,389 INFO L87 Difference]: Start difference. First operand 16 states and 20 transitions. cyclomatic complexity: 5 Second operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-19 07:57:14,429 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-19 07:57:14,429 INFO L93 Difference]: Finished difference Result 19 states and 23 transitions. [2023-11-19 07:57:14,429 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 19 states and 23 transitions. [2023-11-19 07:57:14,430 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 17 [2023-11-19 07:57:14,431 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 19 states to 19 states and 23 transitions. [2023-11-19 07:57:14,431 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 19 [2023-11-19 07:57:14,431 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 19 [2023-11-19 07:57:14,432 INFO L73 IsDeterministic]: Start isDeterministic. Operand 19 states and 23 transitions. [2023-11-19 07:57:14,432 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-19 07:57:14,432 INFO L218 hiAutomatonCegarLoop]: Abstraction has 19 states and 23 transitions. [2023-11-19 07:57:14,432 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states and 23 transitions. [2023-11-19 07:57:14,433 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 17. [2023-11-19 07:57:14,434 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 1.2352941176470589) internal successors, (21), 16 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-19 07:57:14,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 21 transitions. [2023-11-19 07:57:14,435 INFO L240 hiAutomatonCegarLoop]: Abstraction has 17 states and 21 transitions. [2023-11-19 07:57:14,435 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-19 07:57:14,436 INFO L428 stractBuchiCegarLoop]: Abstraction has 17 states and 21 transitions. [2023-11-19 07:57:14,436 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2023-11-19 07:57:14,436 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 17 states and 21 transitions. [2023-11-19 07:57:14,437 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 15 [2023-11-19 07:57:14,437 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-19 07:57:14,437 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-19 07:57:14,438 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-19 07:57:14,438 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-19 07:57:14,438 INFO L748 eck$LassoCheckResult]: Stem: 194#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(14, 2);call #Ultimate.allocInit(12, 3); 183#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~pre8#1, main_#t~pre7#1, main_#t~pre6#1, main_#t~pre5#1, main_#t~pre4#1, main_~a~0#1, main_~b~0#1, main_~c~0#1, main_~d~0#1, main_~e~0#1, main_~uint32_max~0#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~c~0#1;havoc main_~d~0#1;havoc main_~e~0#1;havoc main_~uint32_max~0#1;main_~uint32_max~0#1 := 4294967295;main_~a~0#1 := 0; 184#L17-3 [2023-11-19 07:57:14,438 INFO L750 eck$LassoCheckResult]: Loop: 184#L17-3 assume !!(main_~a~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~b~0#1 := 0; 185#L18-3 assume !!(main_~b~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~c~0#1 := 0; 190#L19-3 assume !!(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~d~0#1 := 0; 191#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 181#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 182#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 186#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 195#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 192#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 193#L20-3 assume !(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 179#L19-2 main_#t~pre6#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre6#1; 180#L19-3 assume !(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 188#L18-2 main_#t~pre5#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre5#1; 189#L18-3 assume !(main_~b~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 187#L17-2 main_#t~pre4#1 := 1 + main_~a~0#1;main_~a~0#1 := 1 + main_~a~0#1;havoc main_#t~pre4#1; 184#L17-3 [2023-11-19 07:57:14,439 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-19 07:57:14,439 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 5 times [2023-11-19 07:57:14,439 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-19 07:57:14,440 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [353245881] [2023-11-19 07:57:14,440 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:57:14,440 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-19 07:57:14,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-19 07:57:14,445 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-19 07:57:14,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-19 07:57:14,450 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-19 07:57:14,451 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-19 07:57:14,451 INFO L85 PathProgramCache]: Analyzing trace with hash 275053855, now seen corresponding path program 1 times [2023-11-19 07:57:14,451 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-19 07:57:14,452 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [660029644] [2023-11-19 07:57:14,452 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:57:14,452 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-19 07:57:14,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-19 07:57:17,084 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 3 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-19 07:57:17,085 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-19 07:57:17,085 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [660029644] [2023-11-19 07:57:17,085 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [660029644] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-19 07:57:17,091 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [457561304] [2023-11-19 07:57:17,092 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:57:17,092 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-19 07:57:17,093 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:17,104 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-19 07:57:17,144 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2023-11-19 07:57:17,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-19 07:57:17,176 WARN L260 TraceCheckSpWp]: Trace formula consists of 30 conjuncts, 19 conjunts are in the unsatisfiable core [2023-11-19 07:57:17,180 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-19 07:57:17,615 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 3 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-19 07:57:17,615 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-19 07:57:18,328 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-19 07:57:18,328 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [457561304] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-19 07:57:18,328 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-19 07:57:18,329 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 9] total 20 [2023-11-19 07:57:18,329 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [765644634] [2023-11-19 07:57:18,329 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-19 07:57:18,329 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-19 07:57:18,330 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-19 07:57:18,330 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2023-11-19 07:57:18,331 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=101, Invalid=319, Unknown=0, NotChecked=0, Total=420 [2023-11-19 07:57:18,332 INFO L87 Difference]: Start difference. First operand 17 states and 21 transitions. cyclomatic complexity: 5 Second operand has 21 states, 21 states have (on average 1.5238095238095237) internal successors, (32), 20 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-19 07:57:21,020 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-19 07:57:21,020 INFO L93 Difference]: Finished difference Result 84 states and 103 transitions. [2023-11-19 07:57:21,021 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 84 states and 103 transitions. [2023-11-19 07:57:21,024 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 79 [2023-11-19 07:57:21,025 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 84 states to 84 states and 103 transitions. [2023-11-19 07:57:21,025 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 84 [2023-11-19 07:57:21,026 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 84 [2023-11-19 07:57:21,026 INFO L73 IsDeterministic]: Start isDeterministic. Operand 84 states and 103 transitions. [2023-11-19 07:57:21,027 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-19 07:57:21,027 INFO L218 hiAutomatonCegarLoop]: Abstraction has 84 states and 103 transitions. [2023-11-19 07:57:21,028 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84 states and 103 transitions. [2023-11-19 07:57:21,032 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84 to 53. [2023-11-19 07:57:21,033 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 53 states, 53 states have (on average 1.2452830188679245) internal successors, (66), 52 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-19 07:57:21,034 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 66 transitions. [2023-11-19 07:57:21,034 INFO L240 hiAutomatonCegarLoop]: Abstraction has 53 states and 66 transitions. [2023-11-19 07:57:21,035 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2023-11-19 07:57:21,036 INFO L428 stractBuchiCegarLoop]: Abstraction has 53 states and 66 transitions. [2023-11-19 07:57:21,036 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2023-11-19 07:57:21,036 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 53 states and 66 transitions. [2023-11-19 07:57:21,037 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 51 [2023-11-19 07:57:21,038 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-19 07:57:21,038 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-19 07:57:21,039 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-19 07:57:21,039 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [4, 4, 4, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-19 07:57:21,039 INFO L748 eck$LassoCheckResult]: Stem: 453#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(14, 2);call #Ultimate.allocInit(12, 3); 442#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~pre8#1, main_#t~pre7#1, main_#t~pre6#1, main_#t~pre5#1, main_#t~pre4#1, main_~a~0#1, main_~b~0#1, main_~c~0#1, main_~d~0#1, main_~e~0#1, main_~uint32_max~0#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~c~0#1;havoc main_~d~0#1;havoc main_~e~0#1;havoc main_~uint32_max~0#1;main_~uint32_max~0#1 := 4294967295;main_~a~0#1 := 0; 443#L17-3 [2023-11-19 07:57:21,039 INFO L750 eck$LassoCheckResult]: Loop: 443#L17-3 assume !!(main_~a~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~b~0#1 := 0; 444#L18-3 assume !!(main_~b~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~c~0#1 := 0; 452#L19-3 assume !!(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~d~0#1 := 0; 473#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 472#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 471#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 454#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 455#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 475#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 476#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 474#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 449#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 450#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 451#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 470#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 469#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 467#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 468#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 490#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 489#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 463#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 464#L20-3 assume !(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 480#L19-2 main_#t~pre6#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre6#1; 459#L19-3 assume !(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 460#L18-2 main_#t~pre5#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre5#1; 479#L18-3 assume !(main_~b~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 446#L17-2 main_#t~pre4#1 := 1 + main_~a~0#1;main_~a~0#1 := 1 + main_~a~0#1;havoc main_#t~pre4#1; 443#L17-3 [2023-11-19 07:57:21,040 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-19 07:57:21,040 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 6 times [2023-11-19 07:57:21,042 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-19 07:57:21,042 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1366823393] [2023-11-19 07:57:21,042 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:57:21,043 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-19 07:57:21,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-19 07:57:21,048 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-19 07:57:21,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-19 07:57:21,052 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-19 07:57:21,053 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-19 07:57:21,053 INFO L85 PathProgramCache]: Analyzing trace with hash -210637178, now seen corresponding path program 2 times [2023-11-19 07:57:21,053 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-19 07:57:21,054 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1402934154] [2023-11-19 07:57:21,054 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:57:21,054 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-19 07:57:21,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-19 07:57:21,301 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 1 proven. 22 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2023-11-19 07:57:21,302 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-19 07:57:21,302 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1402934154] [2023-11-19 07:57:21,302 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1402934154] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-19 07:57:21,303 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1535292922] [2023-11-19 07:57:21,303 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2023-11-19 07:57:21,303 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-19 07:57:21,303 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:21,329 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-19 07:57:21,356 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2023-11-19 07:57:21,391 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2023-11-19 07:57:21,392 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-19 07:57:21,393 INFO L262 TraceCheckSpWp]: Trace formula consists of 48 conjuncts, 10 conjunts are in the unsatisfiable core [2023-11-19 07:57:21,396 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-19 07:57:21,586 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 1 proven. 22 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2023-11-19 07:57:21,586 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-19 07:57:21,822 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2023-11-19 07:57:21,822 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1535292922] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-19 07:57:21,822 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-19 07:57:21,823 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 6, 6] total 18 [2023-11-19 07:57:21,824 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1737411476] [2023-11-19 07:57:21,824 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-19 07:57:21,826 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-19 07:57:21,826 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-19 07:57:21,828 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2023-11-19 07:57:21,830 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=256, Unknown=0, NotChecked=0, Total=306 [2023-11-19 07:57:21,830 INFO L87 Difference]: Start difference. First operand 53 states and 66 transitions. cyclomatic complexity: 14 Second operand has 18 states, 18 states have (on average 3.4444444444444446) internal successors, (62), 18 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-19 07:57:23,733 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-19 07:57:23,733 INFO L93 Difference]: Finished difference Result 206 states and 251 transitions. [2023-11-19 07:57:23,733 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 206 states and 251 transitions. [2023-11-19 07:57:23,738 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 204 [2023-11-19 07:57:23,742 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 206 states to 206 states and 251 transitions. [2023-11-19 07:57:23,742 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 206 [2023-11-19 07:57:23,743 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 206 [2023-11-19 07:57:23,743 INFO L73 IsDeterministic]: Start isDeterministic. Operand 206 states and 251 transitions. [2023-11-19 07:57:23,744 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-19 07:57:23,744 INFO L218 hiAutomatonCegarLoop]: Abstraction has 206 states and 251 transitions. [2023-11-19 07:57:23,745 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206 states and 251 transitions. [2023-11-19 07:57:23,758 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206 to 86. [2023-11-19 07:57:23,762 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 86 states, 86 states have (on average 1.2325581395348837) internal successors, (106), 85 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-19 07:57:23,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 106 transitions. [2023-11-19 07:57:23,766 INFO L240 hiAutomatonCegarLoop]: Abstraction has 86 states and 106 transitions. [2023-11-19 07:57:23,767 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2023-11-19 07:57:23,768 INFO L428 stractBuchiCegarLoop]: Abstraction has 86 states and 106 transitions. [2023-11-19 07:57:23,769 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2023-11-19 07:57:23,770 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 86 states and 106 transitions. [2023-11-19 07:57:23,771 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 84 [2023-11-19 07:57:23,771 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-19 07:57:23,771 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-19 07:57:23,773 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-19 07:57:23,774 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [10, 10, 10, 6, 6, 6, 4, 4, 4, 2, 2, 2, 1, 1, 1] [2023-11-19 07:57:23,775 INFO L748 eck$LassoCheckResult]: Stem: 977#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(14, 2);call #Ultimate.allocInit(12, 3); 966#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~pre8#1, main_#t~pre7#1, main_#t~pre6#1, main_#t~pre5#1, main_#t~pre4#1, main_~a~0#1, main_~b~0#1, main_~c~0#1, main_~d~0#1, main_~e~0#1, main_~uint32_max~0#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~c~0#1;havoc main_~d~0#1;havoc main_~e~0#1;havoc main_~uint32_max~0#1;main_~uint32_max~0#1 := 4294967295;main_~a~0#1 := 0; 967#L17-3 [2023-11-19 07:57:23,775 INFO L750 eck$LassoCheckResult]: Loop: 967#L17-3 assume !!(main_~a~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~b~0#1 := 0; 968#L18-3 assume !!(main_~b~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~c~0#1 := 0; 1037#L19-3 assume !!(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~d~0#1 := 0; 1036#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 1035#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 1034#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 1033#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 1032#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 1030#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 1031#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 1029#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 1025#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 1028#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 1019#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 1027#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 1026#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 1024#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 1022#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 1023#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 1021#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 1020#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 1018#L20-3 assume !(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 962#L19-2 main_#t~pre6#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre6#1; 963#L19-3 assume !!(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~d~0#1 := 0; 974#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 964#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 965#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 969#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 978#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 975#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 976#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 989#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 996#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 995#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 994#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 992#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 993#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 991#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 990#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 988#L20-3 assume !(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 987#L19-2 main_#t~pre6#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre6#1; 985#L19-3 assume !(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 971#L18-2 main_#t~pre5#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre5#1; 972#L18-3 assume !!(main_~b~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~c~0#1 := 0; 973#L19-3 assume !!(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~d~0#1 := 0; 979#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 1043#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 1042#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 1041#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 1039#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 1040#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 1047#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 1046#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 1045#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 1044#L20-3 assume !(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 998#L19-2 main_#t~pre6#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre6#1; 1017#L19-3 assume !!(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~d~0#1 := 0; 984#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 1001#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 1011#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 1009#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 1010#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 1003#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 1000#L20-3 assume !(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 986#L19-2 main_#t~pre6#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre6#1; 983#L19-3 assume !(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 982#L18-2 main_#t~pre5#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre5#1; 980#L18-3 assume !(main_~b~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 970#L17-2 main_#t~pre4#1 := 1 + main_~a~0#1;main_~a~0#1 := 1 + main_~a~0#1;havoc main_#t~pre4#1; 967#L17-3 [2023-11-19 07:57:23,777 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-19 07:57:23,781 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 7 times [2023-11-19 07:57:23,781 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-19 07:57:23,781 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [131967203] [2023-11-19 07:57:23,781 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:57:23,787 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-19 07:57:23,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-19 07:57:23,794 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-19 07:57:23,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-19 07:57:23,803 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-19 07:57:23,804 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-19 07:57:23,804 INFO L85 PathProgramCache]: Analyzing trace with hash 456020144, now seen corresponding path program 3 times [2023-11-19 07:57:23,804 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-19 07:57:23,805 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1296129950] [2023-11-19 07:57:23,805 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:57:23,805 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-19 07:57:23,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-19 07:57:24,268 INFO L134 CoverageAnalysis]: Checked inductivity of 295 backedges. 173 proven. 30 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2023-11-19 07:57:24,269 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-19 07:57:24,269 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1296129950] [2023-11-19 07:57:24,269 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1296129950] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-19 07:57:24,269 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [569235902] [2023-11-19 07:57:24,269 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-19 07:57:24,270 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-19 07:57:24,270 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:24,272 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-19 07:57:24,279 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2023-11-19 07:57:24,361 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2023-11-19 07:57:24,361 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-19 07:57:24,362 INFO L262 TraceCheckSpWp]: Trace formula consists of 44 conjuncts, 16 conjunts are in the unsatisfiable core [2023-11-19 07:57:24,366 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-19 07:57:24,730 INFO L134 CoverageAnalysis]: Checked inductivity of 295 backedges. 68 proven. 38 refuted. 0 times theorem prover too weak. 189 trivial. 0 not checked. [2023-11-19 07:57:24,730 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-19 07:57:25,220 INFO L134 CoverageAnalysis]: Checked inductivity of 295 backedges. 59 proven. 47 refuted. 0 times theorem prover too weak. 189 trivial. 0 not checked. [2023-11-19 07:57:25,220 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [569235902] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-19 07:57:25,221 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-19 07:57:25,221 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 20 [2023-11-19 07:57:25,221 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1907974060] [2023-11-19 07:57:25,221 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-19 07:57:25,222 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-19 07:57:25,222 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-19 07:57:25,222 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2023-11-19 07:57:25,223 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=99, Invalid=281, Unknown=0, NotChecked=0, Total=380 [2023-11-19 07:57:25,223 INFO L87 Difference]: Start difference. First operand 86 states and 106 transitions. cyclomatic complexity: 21 Second operand has 20 states, 20 states have (on average 3.15) internal successors, (63), 20 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-19 07:57:25,892 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-19 07:57:25,892 INFO L93 Difference]: Finished difference Result 110 states and 125 transitions. [2023-11-19 07:57:25,893 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 110 states and 125 transitions. [2023-11-19 07:57:25,894 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 104 [2023-11-19 07:57:25,895 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 110 states to 110 states and 125 transitions. [2023-11-19 07:57:25,895 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 110 [2023-11-19 07:57:25,896 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 110 [2023-11-19 07:57:25,896 INFO L73 IsDeterministic]: Start isDeterministic. Operand 110 states and 125 transitions. [2023-11-19 07:57:25,897 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-19 07:57:25,897 INFO L218 hiAutomatonCegarLoop]: Abstraction has 110 states and 125 transitions. [2023-11-19 07:57:25,897 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states and 125 transitions. [2023-11-19 07:57:25,907 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 77. [2023-11-19 07:57:25,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 77 states, 77 states have (on average 1.1688311688311688) internal successors, (90), 76 states have internal predecessors, (90), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-19 07:57:25,916 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 90 transitions. [2023-11-19 07:57:25,918 INFO L240 hiAutomatonCegarLoop]: Abstraction has 77 states and 90 transitions. [2023-11-19 07:57:25,918 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2023-11-19 07:57:25,919 INFO L428 stractBuchiCegarLoop]: Abstraction has 77 states and 90 transitions. [2023-11-19 07:57:25,919 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2023-11-19 07:57:25,920 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 77 states and 90 transitions. [2023-11-19 07:57:25,920 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 75 [2023-11-19 07:57:25,921 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-19 07:57:25,921 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-19 07:57:25,922 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-19 07:57:25,922 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [12, 12, 12, 6, 6, 6, 4, 4, 4, 2, 2, 2, 1, 1, 1] [2023-11-19 07:57:25,923 INFO L748 eck$LassoCheckResult]: Stem: 1643#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(14, 2);call #Ultimate.allocInit(12, 3); 1633#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~pre8#1, main_#t~pre7#1, main_#t~pre6#1, main_#t~pre5#1, main_#t~pre4#1, main_~a~0#1, main_~b~0#1, main_~c~0#1, main_~d~0#1, main_~e~0#1, main_~uint32_max~0#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~c~0#1;havoc main_~d~0#1;havoc main_~e~0#1;havoc main_~uint32_max~0#1;main_~uint32_max~0#1 := 4294967295;main_~a~0#1 := 0; 1631#L17-3 [2023-11-19 07:57:25,923 INFO L750 eck$LassoCheckResult]: Loop: 1631#L17-3 assume !!(main_~a~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~b~0#1 := 0; 1632#L18-3 assume !!(main_~b~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~c~0#1 := 0; 1702#L19-3 assume !!(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~d~0#1 := 0; 1694#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 1693#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 1692#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 1691#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 1690#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 1687#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 1688#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 1686#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 1638#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 1639#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 1672#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 1701#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 1700#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 1699#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 1675#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 1676#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 1674#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 1673#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 1671#L20-3 assume !(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 1627#L19-2 main_#t~pre6#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre6#1; 1628#L19-3 assume !!(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~d~0#1 := 0; 1650#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 1698#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 1697#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 1696#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 1695#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 1683#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 1684#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 1682#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 1681#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 1680#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 1656#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 1679#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 1678#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 1677#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 1662#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 1664#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 1661#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 1658#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 1655#L20-3 assume !(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 1652#L19-2 main_#t~pre6#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre6#1; 1649#L19-3 assume !(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 1636#L18-2 main_#t~pre5#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre5#1; 1637#L18-3 assume !!(main_~b~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~c~0#1 := 0; 1642#L19-3 assume !!(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~d~0#1 := 0; 1640#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 1641#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 1703#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 1644#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 1629#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 1630#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 1634#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 1689#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 1685#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 1670#L20-3 assume !(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 1669#L19-2 main_#t~pre6#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre6#1; 1668#L19-3 assume !!(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~d~0#1 := 0; 1648#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 1654#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 1667#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 1666#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 1665#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 1660#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 1663#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 1659#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 1657#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 1653#L20-3 assume !(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 1651#L19-2 main_#t~pre6#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre6#1; 1647#L19-3 assume !(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 1646#L18-2 main_#t~pre5#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre5#1; 1645#L18-3 assume !(main_~b~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 1635#L17-2 main_#t~pre4#1 := 1 + main_~a~0#1;main_~a~0#1 := 1 + main_~a~0#1;havoc main_#t~pre4#1; 1631#L17-3 [2023-11-19 07:57:25,923 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-19 07:57:25,924 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 8 times [2023-11-19 07:57:25,924 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-19 07:57:25,924 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1223396485] [2023-11-19 07:57:25,924 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:57:25,925 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-19 07:57:25,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-19 07:57:25,932 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-19 07:57:25,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-19 07:57:25,935 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-19 07:57:25,937 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-19 07:57:25,937 INFO L85 PathProgramCache]: Analyzing trace with hash 810872384, now seen corresponding path program 4 times [2023-11-19 07:57:25,938 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-19 07:57:25,938 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [96239524] [2023-11-19 07:57:25,938 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:57:25,938 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-19 07:57:26,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-19 07:57:26,357 INFO L134 CoverageAnalysis]: Checked inductivity of 370 backedges. 195 proven. 67 refuted. 0 times theorem prover too weak. 108 trivial. 0 not checked. [2023-11-19 07:57:26,357 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-19 07:57:26,357 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [96239524] [2023-11-19 07:57:26,358 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [96239524] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-19 07:57:26,358 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1676182414] [2023-11-19 07:57:26,358 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2023-11-19 07:57:26,358 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-19 07:57:26,358 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:26,360 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-19 07:57:26,392 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2023-11-19 07:57:26,449 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2023-11-19 07:57:26,449 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-19 07:57:26,451 INFO L262 TraceCheckSpWp]: Trace formula consists of 128 conjuncts, 10 conjunts are in the unsatisfiable core [2023-11-19 07:57:26,457 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-19 07:57:26,669 INFO L134 CoverageAnalysis]: Checked inductivity of 370 backedges. 119 proven. 56 refuted. 0 times theorem prover too weak. 195 trivial. 0 not checked. [2023-11-19 07:57:26,669 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-19 07:57:26,921 INFO L134 CoverageAnalysis]: Checked inductivity of 370 backedges. 25 proven. 150 refuted. 0 times theorem prover too weak. 195 trivial. 0 not checked. [2023-11-19 07:57:26,921 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1676182414] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-19 07:57:26,921 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-19 07:57:26,921 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 7] total 15 [2023-11-19 07:57:26,922 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [700773233] [2023-11-19 07:57:26,922 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-19 07:57:26,923 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-19 07:57:26,923 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-19 07:57:26,923 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2023-11-19 07:57:26,924 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=164, Unknown=0, NotChecked=0, Total=210 [2023-11-19 07:57:26,924 INFO L87 Difference]: Start difference. First operand 77 states and 90 transitions. cyclomatic complexity: 14 Second operand has 15 states, 15 states have (on average 4.4) internal successors, (66), 15 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-19 07:57:27,454 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-19 07:57:27,455 INFO L93 Difference]: Finished difference Result 208 states and 246 transitions. [2023-11-19 07:57:27,455 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 208 states and 246 transitions. [2023-11-19 07:57:27,457 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 202 [2023-11-19 07:57:27,459 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 208 states to 208 states and 246 transitions. [2023-11-19 07:57:27,459 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 208 [2023-11-19 07:57:27,460 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 208 [2023-11-19 07:57:27,460 INFO L73 IsDeterministic]: Start isDeterministic. Operand 208 states and 246 transitions. [2023-11-19 07:57:27,461 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-19 07:57:27,461 INFO L218 hiAutomatonCegarLoop]: Abstraction has 208 states and 246 transitions. [2023-11-19 07:57:27,462 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 208 states and 246 transitions. [2023-11-19 07:57:27,467 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 208 to 95. [2023-11-19 07:57:27,468 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 95 states, 95 states have (on average 1.1578947368421053) internal successors, (110), 94 states have internal predecessors, (110), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-19 07:57:27,469 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 110 transitions. [2023-11-19 07:57:27,469 INFO L240 hiAutomatonCegarLoop]: Abstraction has 95 states and 110 transitions. [2023-11-19 07:57:27,470 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2023-11-19 07:57:27,471 INFO L428 stractBuchiCegarLoop]: Abstraction has 95 states and 110 transitions. [2023-11-19 07:57:27,471 INFO L335 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2023-11-19 07:57:27,471 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 95 states and 110 transitions. [2023-11-19 07:57:27,472 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 93 [2023-11-19 07:57:27,472 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-19 07:57:27,472 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-19 07:57:27,473 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-19 07:57:27,474 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [16, 16, 16, 8, 8, 8, 4, 4, 4, 2, 2, 2, 1, 1, 1] [2023-11-19 07:57:27,474 INFO L748 eck$LassoCheckResult]: Stem: 2420#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(14, 2);call #Ultimate.allocInit(12, 3); 2410#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~pre8#1, main_#t~pre7#1, main_#t~pre6#1, main_#t~pre5#1, main_#t~pre4#1, main_~a~0#1, main_~b~0#1, main_~c~0#1, main_~d~0#1, main_~e~0#1, main_~uint32_max~0#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~c~0#1;havoc main_~d~0#1;havoc main_~e~0#1;havoc main_~uint32_max~0#1;main_~uint32_max~0#1 := 4294967295;main_~a~0#1 := 0; 2411#L17-3 [2023-11-19 07:57:27,474 INFO L750 eck$LassoCheckResult]: Loop: 2411#L17-3 assume !!(main_~a~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~b~0#1 := 0; 2412#L18-3 assume !!(main_~b~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~c~0#1 := 0; 2417#L19-3 assume !!(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~d~0#1 := 0; 2422#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 2495#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 2494#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 2493#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 2492#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 2491#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 2483#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 2484#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 2419#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 2418#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 2408#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 2409#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 2413#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 2421#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 2481#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 2485#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 2480#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 2462#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 2460#L20-3 assume !(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 2406#L19-2 main_#t~pre6#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre6#1; 2407#L19-3 assume !!(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~d~0#1 := 0; 2429#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 2474#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 2473#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 2472#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 2471#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 2469#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 2470#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 2468#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 2467#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 2466#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 2435#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 2465#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 2464#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 2463#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 2441#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 2443#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 2440#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 2437#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 2434#L20-3 assume !(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 2431#L19-2 main_#t~pre6#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre6#1; 2428#L19-3 assume !(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 2415#L18-2 main_#t~pre5#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre5#1; 2416#L18-3 assume !!(main_~b~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~c~0#1 := 0; 2424#L19-3 assume !!(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~d~0#1 := 0; 2500#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 2499#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 2498#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 2497#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 2496#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 2479#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 2486#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 2477#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 2478#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 2490#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 2459#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 2489#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 2488#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 2487#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 2476#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 2482#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 2475#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 2461#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 2458#L20-3 assume !(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 2457#L19-2 main_#t~pre6#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre6#1; 2456#L19-3 assume !!(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~d~0#1 := 0; 2427#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 2455#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 2454#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 2453#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 2452#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 2450#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 2451#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 2449#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 2448#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 2447#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 2433#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 2446#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 2445#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 2444#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 2439#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 2442#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 2438#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 2436#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 2432#L20-3 assume !(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 2430#L19-2 main_#t~pre6#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre6#1; 2426#L19-3 assume !(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 2425#L18-2 main_#t~pre5#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre5#1; 2423#L18-3 assume !(main_~b~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 2414#L17-2 main_#t~pre4#1 := 1 + main_~a~0#1;main_~a~0#1 := 1 + main_~a~0#1;havoc main_#t~pre4#1; 2411#L17-3 [2023-11-19 07:57:27,475 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-19 07:57:27,475 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 9 times [2023-11-19 07:57:27,475 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-19 07:57:27,475 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1737984952] [2023-11-19 07:57:27,476 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:57:27,476 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-19 07:57:27,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-19 07:57:27,479 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-19 07:57:27,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-19 07:57:27,483 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-19 07:57:27,484 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-19 07:57:27,484 INFO L85 PathProgramCache]: Analyzing trace with hash -691812484, now seen corresponding path program 5 times [2023-11-19 07:57:27,484 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-19 07:57:27,484 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1824344474] [2023-11-19 07:57:27,484 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:57:27,485 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-19 07:57:27,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-19 07:57:27,720 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-19 07:57:27,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-19 07:57:27,936 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-19 07:57:27,937 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-19 07:57:27,937 INFO L85 PathProgramCache]: Analyzing trace with hash -2029665542, now seen corresponding path program 1 times [2023-11-19 07:57:27,937 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-19 07:57:27,937 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [553072820] [2023-11-19 07:57:27,937 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:57:27,938 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-19 07:57:27,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-19 07:57:28,579 INFO L134 CoverageAnalysis]: Checked inductivity of 635 backedges. 137 proven. 5 refuted. 0 times theorem prover too weak. 493 trivial. 0 not checked. [2023-11-19 07:57:28,579 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-19 07:57:28,579 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [553072820] [2023-11-19 07:57:28,579 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [553072820] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-19 07:57:28,580 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [284148232] [2023-11-19 07:57:28,580 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:57:28,580 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-19 07:57:28,580 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:28,584 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-19 07:57:28,593 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2023-11-19 07:57:28,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-19 07:57:28,699 INFO L262 TraceCheckSpWp]: Trace formula consists of 179 conjuncts, 15 conjunts are in the unsatisfiable core [2023-11-19 07:57:28,702 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-19 07:57:28,795 INFO L134 CoverageAnalysis]: Checked inductivity of 635 backedges. 137 proven. 5 refuted. 0 times theorem prover too weak. 493 trivial. 0 not checked. [2023-11-19 07:57:28,795 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-19 07:57:28,898 INFO L134 CoverageAnalysis]: Checked inductivity of 635 backedges. 137 proven. 5 refuted. 0 times theorem prover too weak. 493 trivial. 0 not checked. [2023-11-19 07:57:28,898 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [284148232] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-19 07:57:28,898 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-19 07:57:28,898 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 14 [2023-11-19 07:57:28,898 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [945708624] [2023-11-19 07:57:28,899 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-19 07:57:30,273 INFO L210 LassoAnalysis]: Preferences: [2023-11-19 07:57:30,274 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-19 07:57:30,274 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-19 07:57:30,274 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-19 07:57:30,275 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2023-11-19 07:57:30,275 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:30,275 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-19 07:57:30,275 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-19 07:57:30,275 INFO L133 ssoRankerPreferences]: Filename of dumped script: deep-nested.c_Iteration9_Loop [2023-11-19 07:57:30,275 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-19 07:57:30,276 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-19 07:57:30,298 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-19 07:57:30,308 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-19 07:57:30,310 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-19 07:57:30,315 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-19 07:57:30,318 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-19 07:57:30,320 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-19 07:57:30,322 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-19 07:57:30,326 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-19 07:57:30,329 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-19 07:57:30,333 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-19 07:57:30,341 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-19 07:57:30,510 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-19 07:57:30,511 INFO L404 LassoAnalysis]: Checking for nontermination... [2023-11-19 07:57:30,513 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:30,513 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:30,520 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:30,532 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2023-11-19 07:57:30,532 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-19 07:57:30,545 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2023-11-19 07:57:30,563 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2023-11-19 07:57:30,563 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_main_~e~0#1=2} Honda state: {ULTIMATE.start_main_~e~0#1=2} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2023-11-19 07:57:30,584 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:30,585 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:30,585 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:30,586 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:30,587 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2023-11-19 07:57:30,588 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2023-11-19 07:57:30,588 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-19 07:57:30,600 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2023-11-19 07:57:30,600 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_main_#t~pre7#1=0} Honda state: {ULTIMATE.start_main_#t~pre7#1=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2023-11-19 07:57:30,624 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:30,625 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:30,625 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:30,628 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:30,630 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2023-11-19 07:57:30,631 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2023-11-19 07:57:30,631 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-19 07:57:30,643 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2023-11-19 07:57:30,643 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_main_~c~0#1=2} Honda state: {ULTIMATE.start_main_~c~0#1=2} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2023-11-19 07:57:30,660 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:30,661 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:30,661 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:30,662 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:30,662 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2023-11-19 07:57:30,663 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2023-11-19 07:57:30,663 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-19 07:57:30,675 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2023-11-19 07:57:30,675 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_main_#t~pre5#1=0} Honda state: {ULTIMATE.start_main_#t~pre5#1=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2023-11-19 07:57:30,689 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:30,690 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:30,690 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:30,691 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:30,691 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2023-11-19 07:57:30,692 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2023-11-19 07:57:30,692 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-19 07:57:30,704 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2023-11-19 07:57:30,704 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_main_#t~pre6#1=0} Honda state: {ULTIMATE.start_main_#t~pre6#1=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2023-11-19 07:57:30,717 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:30,718 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:30,718 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:30,719 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:30,732 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2023-11-19 07:57:30,732 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2023-11-19 07:57:30,732 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-19 07:57:30,753 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2023-11-19 07:57:30,753 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_main_#t~pre4#1=0} Honda state: {ULTIMATE.start_main_#t~pre4#1=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2023-11-19 07:57:30,766 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:30,766 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:30,766 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:30,767 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:30,777 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2023-11-19 07:57:30,777 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-19 07:57:30,790 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2023-11-19 07:57:30,795 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2023-11-19 07:57:30,795 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_main_~b~0#1=2} Honda state: {ULTIMATE.start_main_~b~0#1=2} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2023-11-19 07:57:30,810 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:30,810 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:30,810 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:30,811 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:30,812 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2023-11-19 07:57:30,813 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2023-11-19 07:57:30,813 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-19 07:57:30,824 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2023-11-19 07:57:30,825 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_main_~d~0#1=2} Honda state: {ULTIMATE.start_main_~d~0#1=2} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2023-11-19 07:57:30,838 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:30,838 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:30,838 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:30,839 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:30,840 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Waiting until timeout for monitored process [2023-11-19 07:57:30,843 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2023-11-19 07:57:30,843 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-19 07:57:30,873 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2023-11-19 07:57:30,873 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_main_~uint32_max~0#1=-4294967293} Honda state: {ULTIMATE.start_main_~uint32_max~0#1=-4294967293} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2023-11-19 07:57:30,877 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:30,877 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:30,877 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:30,878 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:30,879 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Waiting until timeout for monitored process [2023-11-19 07:57:30,880 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2023-11-19 07:57:30,881 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-19 07:57:30,911 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:30,912 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:30,912 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:30,913 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:30,914 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Waiting until timeout for monitored process [2023-11-19 07:57:30,915 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2023-11-19 07:57:30,916 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-19 07:57:30,958 INFO L444 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2023-11-19 07:57:30,961 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:30,962 INFO L210 LassoAnalysis]: Preferences: [2023-11-19 07:57:30,962 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-19 07:57:30,962 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-19 07:57:30,962 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-19 07:57:30,962 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2023-11-19 07:57:30,962 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:30,962 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-19 07:57:30,962 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-19 07:57:30,962 INFO L133 ssoRankerPreferences]: Filename of dumped script: deep-nested.c_Iteration9_Loop [2023-11-19 07:57:30,962 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-19 07:57:30,963 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-19 07:57:30,964 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-19 07:57:30,967 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-19 07:57:30,970 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-19 07:57:30,973 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-19 07:57:30,975 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-19 07:57:30,978 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-19 07:57:30,984 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-19 07:57:30,987 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-19 07:57:30,990 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-19 07:57:30,993 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-19 07:57:30,996 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-19 07:57:31,147 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-19 07:57:31,151 INFO L490 LassoAnalysis]: Using template 'affine'. [2023-11-19 07:57:31,153 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:31,153 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:31,154 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:31,161 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:31,174 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:31,174 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:31,175 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:31,175 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:31,175 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-19 07:57:31,177 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-19 07:57:31,177 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:31,179 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Waiting until timeout for monitored process [2023-11-19 07:57:31,188 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:31,212 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:31,212 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:31,212 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:31,213 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:31,221 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:31,233 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:31,234 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:31,234 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:31,234 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:31,234 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-19 07:57:31,235 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-19 07:57:31,236 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:31,238 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Waiting until timeout for monitored process [2023-11-19 07:57:31,248 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:31,265 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:31,265 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:31,265 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:31,266 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:31,267 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Waiting until timeout for monitored process [2023-11-19 07:57:31,268 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:31,278 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:31,278 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:31,278 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:31,278 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:31,278 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-19 07:57:31,279 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-19 07:57:31,279 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:31,287 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:31,310 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:31,310 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:31,310 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:31,311 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:31,321 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:31,330 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Waiting until timeout for monitored process [2023-11-19 07:57:31,333 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:31,333 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:31,334 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:31,334 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:31,334 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-19 07:57:31,334 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-19 07:57:31,335 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:31,350 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:31,362 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:31,363 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:31,363 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:31,364 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:31,365 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Waiting until timeout for monitored process [2023-11-19 07:57:31,366 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:31,376 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:31,376 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:31,376 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:31,376 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:31,376 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-19 07:57:31,377 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-19 07:57:31,377 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:31,378 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:31,390 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:31,390 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:31,390 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:31,391 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:31,392 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Waiting until timeout for monitored process [2023-11-19 07:57:31,393 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:31,405 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:31,405 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:31,406 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:31,406 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:31,406 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-19 07:57:31,407 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-19 07:57:31,407 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:31,409 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:31,422 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:31,422 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:31,422 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:31,423 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:31,428 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:31,440 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:31,441 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:31,441 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:31,441 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:31,441 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-19 07:57:31,442 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-19 07:57:31,442 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:31,444 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Waiting until timeout for monitored process [2023-11-19 07:57:31,445 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:31,457 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:31,457 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:31,458 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:31,459 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:31,460 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Waiting until timeout for monitored process [2023-11-19 07:57:31,461 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:31,470 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:31,471 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:31,471 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:31,471 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:31,471 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-19 07:57:31,471 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-19 07:57:31,471 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:31,473 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:31,485 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:31,486 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:31,486 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:31,487 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:31,490 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:31,492 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Waiting until timeout for monitored process [2023-11-19 07:57:31,500 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:31,500 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:31,500 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:31,500 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:31,500 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-19 07:57:31,501 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-19 07:57:31,501 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:31,503 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:31,514 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:31,515 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:31,515 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:31,516 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:31,519 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Waiting until timeout for monitored process [2023-11-19 07:57:31,520 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:31,530 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:31,530 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:31,530 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:31,530 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:31,530 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-19 07:57:31,531 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-19 07:57:31,532 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:31,534 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:31,546 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:31,546 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:31,546 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:31,547 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:31,549 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Waiting until timeout for monitored process [2023-11-19 07:57:31,549 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:31,559 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:31,559 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:31,559 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:31,559 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:31,560 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-19 07:57:31,561 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-19 07:57:31,562 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:31,564 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:31,577 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:31,577 INFO L490 LassoAnalysis]: Using template '2-nested'. [2023-11-19 07:57:31,577 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:31,577 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:31,578 INFO L229 MonitoredProcess]: Starting monitored process 29 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:31,579 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Waiting until timeout for monitored process [2023-11-19 07:57:31,579 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:31,589 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:31,589 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:31,590 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:31,590 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:31,590 INFO L205 nArgumentSynthesizer]: 3 template conjuncts. [2023-11-19 07:57:31,591 INFO L401 nArgumentSynthesizer]: We have 3 Motzkin's Theorem applications. [2023-11-19 07:57:31,591 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:31,592 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:31,606 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:31,606 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:31,606 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:31,607 INFO L229 MonitoredProcess]: Starting monitored process 30 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:31,608 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Waiting until timeout for monitored process [2023-11-19 07:57:31,608 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:31,618 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:31,618 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:31,618 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:31,619 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:31,619 INFO L205 nArgumentSynthesizer]: 3 template conjuncts. [2023-11-19 07:57:31,619 INFO L401 nArgumentSynthesizer]: We have 3 Motzkin's Theorem applications. [2023-11-19 07:57:31,619 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:31,622 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:31,633 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:31,633 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:31,633 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:31,634 INFO L229 MonitoredProcess]: Starting monitored process 31 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:31,635 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (31)] Waiting until timeout for monitored process [2023-11-19 07:57:31,635 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:31,645 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:31,645 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:31,646 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:31,646 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:31,646 INFO L205 nArgumentSynthesizer]: 3 template conjuncts. [2023-11-19 07:57:31,648 INFO L401 nArgumentSynthesizer]: We have 3 Motzkin's Theorem applications. [2023-11-19 07:57:31,648 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:31,670 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:31,684 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (31)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:31,684 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:31,685 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:31,685 INFO L229 MonitoredProcess]: Starting monitored process 32 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:31,686 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (32)] Waiting until timeout for monitored process [2023-11-19 07:57:31,687 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:31,696 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:31,697 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:31,697 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:31,697 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:31,697 INFO L205 nArgumentSynthesizer]: 3 template conjuncts. [2023-11-19 07:57:31,698 INFO L401 nArgumentSynthesizer]: We have 3 Motzkin's Theorem applications. [2023-11-19 07:57:31,698 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:31,707 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:31,717 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (32)] Ended with exit code 0 [2023-11-19 07:57:31,718 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:31,718 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:31,719 INFO L229 MonitoredProcess]: Starting monitored process 33 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:31,719 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Waiting until timeout for monitored process [2023-11-19 07:57:31,720 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:31,730 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:31,730 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:31,730 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:31,730 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:31,730 INFO L205 nArgumentSynthesizer]: 3 template conjuncts. [2023-11-19 07:57:31,731 INFO L401 nArgumentSynthesizer]: We have 3 Motzkin's Theorem applications. [2023-11-19 07:57:31,731 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:31,733 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:31,745 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Ended with exit code 0 [2023-11-19 07:57:31,745 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:31,745 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:31,746 INFO L229 MonitoredProcess]: Starting monitored process 34 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:31,747 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Waiting until timeout for monitored process [2023-11-19 07:57:31,747 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:31,757 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:31,757 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:31,758 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:31,758 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:31,758 INFO L205 nArgumentSynthesizer]: 3 template conjuncts. [2023-11-19 07:57:31,759 INFO L401 nArgumentSynthesizer]: We have 3 Motzkin's Theorem applications. [2023-11-19 07:57:31,759 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:31,761 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:31,773 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:31,774 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:31,774 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:31,774 INFO L229 MonitoredProcess]: Starting monitored process 35 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:31,775 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (35)] Waiting until timeout for monitored process [2023-11-19 07:57:31,776 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:31,785 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:31,786 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:31,786 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:31,786 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:31,786 INFO L205 nArgumentSynthesizer]: 3 template conjuncts. [2023-11-19 07:57:31,787 INFO L401 nArgumentSynthesizer]: We have 3 Motzkin's Theorem applications. [2023-11-19 07:57:31,787 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:31,812 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:31,835 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (35)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:31,835 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:31,835 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:31,836 INFO L229 MonitoredProcess]: Starting monitored process 36 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:31,840 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:31,852 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:31,852 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:31,852 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:31,853 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:31,853 INFO L205 nArgumentSynthesizer]: 3 template conjuncts. [2023-11-19 07:57:31,853 INFO L401 nArgumentSynthesizer]: We have 3 Motzkin's Theorem applications. [2023-11-19 07:57:31,853 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:31,855 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Waiting until timeout for monitored process [2023-11-19 07:57:31,863 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:31,880 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:31,880 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:31,881 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:31,882 INFO L229 MonitoredProcess]: Starting monitored process 37 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:31,883 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (37)] Waiting until timeout for monitored process [2023-11-19 07:57:31,884 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:31,894 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:31,894 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:31,894 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:31,894 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:31,894 INFO L205 nArgumentSynthesizer]: 3 template conjuncts. [2023-11-19 07:57:31,896 INFO L401 nArgumentSynthesizer]: We have 3 Motzkin's Theorem applications. [2023-11-19 07:57:31,896 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:31,928 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:31,945 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (37)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:31,946 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:31,946 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:31,947 INFO L229 MonitoredProcess]: Starting monitored process 38 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:31,953 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:31,965 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:31,965 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:31,965 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:31,965 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:31,965 INFO L205 nArgumentSynthesizer]: 3 template conjuncts. [2023-11-19 07:57:31,969 INFO L401 nArgumentSynthesizer]: We have 3 Motzkin's Theorem applications. [2023-11-19 07:57:31,969 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:31,971 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (38)] Waiting until timeout for monitored process [2023-11-19 07:57:31,993 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:32,011 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (38)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:32,011 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:32,012 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:32,012 INFO L229 MonitoredProcess]: Starting monitored process 39 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:32,016 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:32,028 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:32,029 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:32,029 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:32,029 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:32,029 INFO L205 nArgumentSynthesizer]: 3 template conjuncts. [2023-11-19 07:57:32,031 INFO L401 nArgumentSynthesizer]: We have 3 Motzkin's Theorem applications. [2023-11-19 07:57:32,031 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:32,032 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (39)] Waiting until timeout for monitored process [2023-11-19 07:57:32,047 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:32,065 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (39)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:32,065 INFO L490 LassoAnalysis]: Using template '3-nested'. [2023-11-19 07:57:32,065 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:32,066 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:32,067 INFO L229 MonitoredProcess]: Starting monitored process 40 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:32,069 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:32,081 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:32,081 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:32,081 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:32,081 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:32,082 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2023-11-19 07:57:32,082 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2023-11-19 07:57:32,082 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:32,084 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (40)] Waiting until timeout for monitored process [2023-11-19 07:57:32,096 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:32,118 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (40)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:32,119 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:32,119 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:32,120 INFO L229 MonitoredProcess]: Starting monitored process 41 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:32,124 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:32,136 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (41)] Waiting until timeout for monitored process [2023-11-19 07:57:32,137 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:32,137 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:32,137 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:32,137 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:32,137 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2023-11-19 07:57:32,138 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2023-11-19 07:57:32,138 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:32,144 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:32,155 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (41)] Ended with exit code 0 [2023-11-19 07:57:32,155 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:32,155 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:32,156 INFO L229 MonitoredProcess]: Starting monitored process 42 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:32,157 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (42)] Waiting until timeout for monitored process [2023-11-19 07:57:32,158 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:32,168 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:32,168 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:32,168 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:32,168 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:32,168 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2023-11-19 07:57:32,170 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2023-11-19 07:57:32,170 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:32,172 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:32,185 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (42)] Ended with exit code 0 [2023-11-19 07:57:32,185 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:32,185 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:32,186 INFO L229 MonitoredProcess]: Starting monitored process 43 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:32,187 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (43)] Waiting until timeout for monitored process [2023-11-19 07:57:32,187 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:32,197 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:32,197 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:32,198 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:32,198 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:32,198 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2023-11-19 07:57:32,199 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2023-11-19 07:57:32,199 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:32,201 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:32,213 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (43)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:32,215 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:32,215 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:32,216 INFO L229 MonitoredProcess]: Starting monitored process 44 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:32,218 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (44)] Waiting until timeout for monitored process [2023-11-19 07:57:32,220 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:32,230 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:32,230 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:32,231 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:32,231 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:32,231 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2023-11-19 07:57:32,231 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2023-11-19 07:57:32,231 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:32,233 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:32,245 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (44)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:32,245 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:32,245 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:32,246 INFO L229 MonitoredProcess]: Starting monitored process 45 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:32,247 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (45)] Waiting until timeout for monitored process [2023-11-19 07:57:32,247 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:32,257 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:32,258 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:32,258 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:32,258 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:32,258 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2023-11-19 07:57:32,259 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2023-11-19 07:57:32,259 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:32,262 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:32,273 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (45)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:32,274 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:32,274 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:32,275 INFO L229 MonitoredProcess]: Starting monitored process 46 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:32,276 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (46)] Waiting until timeout for monitored process [2023-11-19 07:57:32,277 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:32,287 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:32,287 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:32,287 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:32,287 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:32,288 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2023-11-19 07:57:32,292 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2023-11-19 07:57:32,292 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:32,326 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:32,353 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (46)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:32,353 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:32,353 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:32,354 INFO L229 MonitoredProcess]: Starting monitored process 47 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:32,360 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:32,372 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (47)] Waiting until timeout for monitored process [2023-11-19 07:57:32,372 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:32,372 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:32,372 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:32,373 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:32,373 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2023-11-19 07:57:32,373 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2023-11-19 07:57:32,373 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:32,375 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:32,386 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (47)] Ended with exit code 0 [2023-11-19 07:57:32,386 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:32,386 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:32,387 INFO L229 MonitoredProcess]: Starting monitored process 48 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:32,388 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (48)] Waiting until timeout for monitored process [2023-11-19 07:57:32,388 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:32,398 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:32,398 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:32,399 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:32,399 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:32,399 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2023-11-19 07:57:32,400 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2023-11-19 07:57:32,400 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:32,402 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:32,414 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (48)] Ended with exit code 0 [2023-11-19 07:57:32,415 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:32,415 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:32,416 INFO L229 MonitoredProcess]: Starting monitored process 49 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:32,417 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (49)] Waiting until timeout for monitored process [2023-11-19 07:57:32,417 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:32,427 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:32,427 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:32,427 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:32,427 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:32,427 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2023-11-19 07:57:32,429 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2023-11-19 07:57:32,429 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:32,432 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:32,445 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (49)] Ended with exit code 0 [2023-11-19 07:57:32,445 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:32,445 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:32,446 INFO L229 MonitoredProcess]: Starting monitored process 50 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:32,448 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (50)] Waiting until timeout for monitored process [2023-11-19 07:57:32,448 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:32,458 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:32,459 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:32,459 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:32,459 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:32,459 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2023-11-19 07:57:32,461 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2023-11-19 07:57:32,461 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:32,465 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:32,477 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (50)] Ended with exit code 0 [2023-11-19 07:57:32,477 INFO L490 LassoAnalysis]: Using template '4-nested'. [2023-11-19 07:57:32,477 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:32,478 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:32,478 INFO L229 MonitoredProcess]: Starting monitored process 51 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:32,479 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (51)] Waiting until timeout for monitored process [2023-11-19 07:57:32,481 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:32,491 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:32,491 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:32,491 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:32,491 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:32,491 INFO L205 nArgumentSynthesizer]: 5 template conjuncts. [2023-11-19 07:57:32,493 INFO L401 nArgumentSynthesizer]: We have 5 Motzkin's Theorem applications. [2023-11-19 07:57:32,493 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:32,495 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:32,506 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (51)] Ended with exit code 0 [2023-11-19 07:57:32,506 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:32,506 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:32,507 INFO L229 MonitoredProcess]: Starting monitored process 52 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:32,508 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (52)] Waiting until timeout for monitored process [2023-11-19 07:57:32,508 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:32,518 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:32,518 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:32,518 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:32,518 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:32,518 INFO L205 nArgumentSynthesizer]: 5 template conjuncts. [2023-11-19 07:57:32,520 INFO L401 nArgumentSynthesizer]: We have 5 Motzkin's Theorem applications. [2023-11-19 07:57:32,520 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:32,523 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:32,534 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (52)] Ended with exit code 0 [2023-11-19 07:57:32,534 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:32,534 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:32,535 INFO L229 MonitoredProcess]: Starting monitored process 53 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:32,536 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (53)] Waiting until timeout for monitored process [2023-11-19 07:57:32,540 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:32,550 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:32,551 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:32,551 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:32,551 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:32,551 INFO L205 nArgumentSynthesizer]: 5 template conjuncts. [2023-11-19 07:57:32,552 INFO L401 nArgumentSynthesizer]: We have 5 Motzkin's Theorem applications. [2023-11-19 07:57:32,552 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:32,558 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:32,570 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (53)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:32,570 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:32,570 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:32,571 INFO L229 MonitoredProcess]: Starting monitored process 54 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:32,573 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (54)] Waiting until timeout for monitored process [2023-11-19 07:57:32,574 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:32,584 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:32,584 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:32,584 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:32,584 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:32,584 INFO L205 nArgumentSynthesizer]: 5 template conjuncts. [2023-11-19 07:57:32,585 INFO L401 nArgumentSynthesizer]: We have 5 Motzkin's Theorem applications. [2023-11-19 07:57:32,585 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:32,592 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:32,604 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (54)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:32,604 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:32,604 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:32,605 INFO L229 MonitoredProcess]: Starting monitored process 55 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:32,606 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (55)] Waiting until timeout for monitored process [2023-11-19 07:57:32,606 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:32,616 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:32,616 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:32,617 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:32,617 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:32,617 INFO L205 nArgumentSynthesizer]: 5 template conjuncts. [2023-11-19 07:57:32,618 INFO L401 nArgumentSynthesizer]: We have 5 Motzkin's Theorem applications. [2023-11-19 07:57:32,618 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:32,620 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:32,633 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (55)] Ended with exit code 0 [2023-11-19 07:57:32,633 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:32,633 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:32,634 INFO L229 MonitoredProcess]: Starting monitored process 56 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:32,635 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (56)] Waiting until timeout for monitored process [2023-11-19 07:57:32,635 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:32,645 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:32,646 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:32,646 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:32,646 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:32,646 INFO L205 nArgumentSynthesizer]: 5 template conjuncts. [2023-11-19 07:57:32,647 INFO L401 nArgumentSynthesizer]: We have 5 Motzkin's Theorem applications. [2023-11-19 07:57:32,648 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:32,651 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:32,662 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (56)] Ended with exit code 0 [2023-11-19 07:57:32,664 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:32,664 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:32,665 INFO L229 MonitoredProcess]: Starting monitored process 57 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:32,665 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (57)] Waiting until timeout for monitored process [2023-11-19 07:57:32,666 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:32,676 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:32,676 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:32,676 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:32,676 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:32,676 INFO L205 nArgumentSynthesizer]: 5 template conjuncts. [2023-11-19 07:57:32,677 INFO L401 nArgumentSynthesizer]: We have 5 Motzkin's Theorem applications. [2023-11-19 07:57:32,678 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:32,681 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:32,693 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (57)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:32,693 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:32,693 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:32,694 INFO L229 MonitoredProcess]: Starting monitored process 58 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:32,695 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (58)] Waiting until timeout for monitored process [2023-11-19 07:57:32,695 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:32,705 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:32,706 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:32,706 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:32,706 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:32,706 INFO L205 nArgumentSynthesizer]: 5 template conjuncts. [2023-11-19 07:57:32,707 INFO L401 nArgumentSynthesizer]: We have 5 Motzkin's Theorem applications. [2023-11-19 07:57:32,707 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:32,709 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:32,723 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (58)] Ended with exit code 0 [2023-11-19 07:57:32,723 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:32,723 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:32,724 INFO L229 MonitoredProcess]: Starting monitored process 59 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:32,725 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (59)] Waiting until timeout for monitored process [2023-11-19 07:57:32,725 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:32,735 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:32,735 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:32,735 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:32,735 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:32,735 INFO L205 nArgumentSynthesizer]: 5 template conjuncts. [2023-11-19 07:57:32,736 INFO L401 nArgumentSynthesizer]: We have 5 Motzkin's Theorem applications. [2023-11-19 07:57:32,737 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:32,740 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:32,751 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (59)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:32,752 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:32,752 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:32,752 INFO L229 MonitoredProcess]: Starting monitored process 60 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:32,753 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (60)] Waiting until timeout for monitored process [2023-11-19 07:57:32,754 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:32,764 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:32,764 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:32,764 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:32,764 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:32,764 INFO L205 nArgumentSynthesizer]: 5 template conjuncts. [2023-11-19 07:57:32,766 INFO L401 nArgumentSynthesizer]: We have 5 Motzkin's Theorem applications. [2023-11-19 07:57:32,766 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:32,771 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:32,785 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (60)] Ended with exit code 0 [2023-11-19 07:57:32,785 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:32,785 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:32,786 INFO L229 MonitoredProcess]: Starting monitored process 61 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:32,787 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (61)] Waiting until timeout for monitored process [2023-11-19 07:57:32,787 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:32,797 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-19 07:57:32,797 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:32,798 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:32,798 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:32,798 INFO L205 nArgumentSynthesizer]: 5 template conjuncts. [2023-11-19 07:57:32,800 INFO L401 nArgumentSynthesizer]: We have 5 Motzkin's Theorem applications. [2023-11-19 07:57:32,800 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:32,805 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:32,816 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (61)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:32,817 INFO L490 LassoAnalysis]: Using template '2-phase'. [2023-11-19 07:57:32,817 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:32,817 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:32,818 INFO L229 MonitoredProcess]: Starting monitored process 62 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:32,818 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (62)] Waiting until timeout for monitored process [2023-11-19 07:57:32,819 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:32,829 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:32,829 INFO L338 nArgumentSynthesizer]: Template has degree 1. [2023-11-19 07:57:32,829 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:32,829 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:32,829 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:32,829 INFO L205 nArgumentSynthesizer]: 3 template conjuncts. [2023-11-19 07:57:32,830 INFO L401 nArgumentSynthesizer]: We have 3 Motzkin's Theorem applications. [2023-11-19 07:57:32,830 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:32,833 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:32,845 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (62)] Ended with exit code 0 [2023-11-19 07:57:32,845 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:32,845 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:32,846 INFO L229 MonitoredProcess]: Starting monitored process 63 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:32,847 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (63)] Waiting until timeout for monitored process [2023-11-19 07:57:32,848 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:32,858 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:32,858 INFO L338 nArgumentSynthesizer]: Template has degree 1. [2023-11-19 07:57:32,859 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:32,859 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:32,859 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:32,859 INFO L205 nArgumentSynthesizer]: 3 template conjuncts. [2023-11-19 07:57:32,860 INFO L401 nArgumentSynthesizer]: We have 3 Motzkin's Theorem applications. [2023-11-19 07:57:32,860 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:32,864 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:32,875 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (63)] Ended with exit code 0 [2023-11-19 07:57:32,875 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:32,875 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:32,876 INFO L229 MonitoredProcess]: Starting monitored process 64 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:32,877 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (64)] Waiting until timeout for monitored process [2023-11-19 07:57:32,878 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:32,889 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:32,889 INFO L338 nArgumentSynthesizer]: Template has degree 1. [2023-11-19 07:57:32,889 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:32,889 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:32,889 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:32,889 INFO L205 nArgumentSynthesizer]: 3 template conjuncts. [2023-11-19 07:57:32,890 INFO L401 nArgumentSynthesizer]: We have 3 Motzkin's Theorem applications. [2023-11-19 07:57:32,890 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:32,920 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:32,938 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (64)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:32,938 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:32,938 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:32,939 INFO L229 MonitoredProcess]: Starting monitored process 65 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:32,944 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:32,949 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (65)] Waiting until timeout for monitored process [2023-11-19 07:57:32,957 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:32,957 INFO L338 nArgumentSynthesizer]: Template has degree 1. [2023-11-19 07:57:32,957 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:32,957 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:32,957 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:32,957 INFO L205 nArgumentSynthesizer]: 3 template conjuncts. [2023-11-19 07:57:32,958 INFO L401 nArgumentSynthesizer]: We have 3 Motzkin's Theorem applications. [2023-11-19 07:57:32,958 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:32,976 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:32,988 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (65)] Ended with exit code 0 [2023-11-19 07:57:32,989 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:32,989 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:32,989 INFO L229 MonitoredProcess]: Starting monitored process 66 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:32,990 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (66)] Waiting until timeout for monitored process [2023-11-19 07:57:32,992 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:33,002 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:33,003 INFO L338 nArgumentSynthesizer]: Template has degree 1. [2023-11-19 07:57:33,003 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:33,003 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:33,003 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:33,003 INFO L205 nArgumentSynthesizer]: 3 template conjuncts. [2023-11-19 07:57:33,004 INFO L401 nArgumentSynthesizer]: We have 3 Motzkin's Theorem applications. [2023-11-19 07:57:33,004 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:33,017 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:33,030 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (66)] Ended with exit code 0 [2023-11-19 07:57:33,031 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:33,031 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:33,032 INFO L229 MonitoredProcess]: Starting monitored process 67 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:33,034 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:33,042 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (67)] Waiting until timeout for monitored process [2023-11-19 07:57:33,045 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:33,045 INFO L338 nArgumentSynthesizer]: Template has degree 1. [2023-11-19 07:57:33,045 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:33,046 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:33,046 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:33,046 INFO L205 nArgumentSynthesizer]: 3 template conjuncts. [2023-11-19 07:57:33,047 INFO L401 nArgumentSynthesizer]: We have 3 Motzkin's Theorem applications. [2023-11-19 07:57:33,047 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:33,051 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:33,062 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (67)] Ended with exit code 0 [2023-11-19 07:57:33,062 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:33,063 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:33,063 INFO L229 MonitoredProcess]: Starting monitored process 68 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:33,065 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (68)] Waiting until timeout for monitored process [2023-11-19 07:57:33,065 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:33,075 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:33,075 INFO L338 nArgumentSynthesizer]: Template has degree 1. [2023-11-19 07:57:33,075 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:33,075 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:33,075 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:33,076 INFO L205 nArgumentSynthesizer]: 3 template conjuncts. [2023-11-19 07:57:33,076 INFO L401 nArgumentSynthesizer]: We have 3 Motzkin's Theorem applications. [2023-11-19 07:57:33,076 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:33,080 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:33,093 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (68)] Ended with exit code 0 [2023-11-19 07:57:33,093 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:33,094 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:33,094 INFO L229 MonitoredProcess]: Starting monitored process 69 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:33,095 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (69)] Waiting until timeout for monitored process [2023-11-19 07:57:33,097 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:33,107 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:33,107 INFO L338 nArgumentSynthesizer]: Template has degree 1. [2023-11-19 07:57:33,107 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:33,107 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:33,107 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:33,107 INFO L205 nArgumentSynthesizer]: 3 template conjuncts. [2023-11-19 07:57:33,108 INFO L401 nArgumentSynthesizer]: We have 3 Motzkin's Theorem applications. [2023-11-19 07:57:33,108 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:33,110 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:33,122 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (69)] Ended with exit code 0 [2023-11-19 07:57:33,122 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:33,123 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:33,124 INFO L229 MonitoredProcess]: Starting monitored process 70 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:33,125 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (70)] Waiting until timeout for monitored process [2023-11-19 07:57:33,126 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:33,136 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:33,136 INFO L338 nArgumentSynthesizer]: Template has degree 1. [2023-11-19 07:57:33,136 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:33,136 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:33,136 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:33,136 INFO L205 nArgumentSynthesizer]: 3 template conjuncts. [2023-11-19 07:57:33,137 INFO L401 nArgumentSynthesizer]: We have 3 Motzkin's Theorem applications. [2023-11-19 07:57:33,137 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:33,142 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:33,153 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (70)] Ended with exit code 0 [2023-11-19 07:57:33,154 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:33,154 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:33,155 INFO L229 MonitoredProcess]: Starting monitored process 71 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:33,156 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (71)] Waiting until timeout for monitored process [2023-11-19 07:57:33,156 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:33,166 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:33,166 INFO L338 nArgumentSynthesizer]: Template has degree 1. [2023-11-19 07:57:33,166 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:33,166 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:33,167 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:33,167 INFO L205 nArgumentSynthesizer]: 3 template conjuncts. [2023-11-19 07:57:33,168 INFO L401 nArgumentSynthesizer]: We have 3 Motzkin's Theorem applications. [2023-11-19 07:57:33,168 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:33,173 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:33,184 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (71)] Ended with exit code 0 [2023-11-19 07:57:33,184 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:33,184 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:33,185 INFO L229 MonitoredProcess]: Starting monitored process 72 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:33,186 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (72)] Waiting until timeout for monitored process [2023-11-19 07:57:33,187 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:33,197 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:33,197 INFO L338 nArgumentSynthesizer]: Template has degree 1. [2023-11-19 07:57:33,197 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:33,197 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:33,197 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:33,197 INFO L205 nArgumentSynthesizer]: 3 template conjuncts. [2023-11-19 07:57:33,199 INFO L401 nArgumentSynthesizer]: We have 3 Motzkin's Theorem applications. [2023-11-19 07:57:33,199 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:33,204 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:33,217 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (72)] Ended with exit code 0 [2023-11-19 07:57:33,217 INFO L490 LassoAnalysis]: Using template '3-phase'. [2023-11-19 07:57:33,218 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:33,218 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:33,218 INFO L229 MonitoredProcess]: Starting monitored process 73 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:33,219 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (73)] Waiting until timeout for monitored process [2023-11-19 07:57:33,220 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:33,230 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:33,230 INFO L338 nArgumentSynthesizer]: Template has degree 2. [2023-11-19 07:57:33,230 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:33,230 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:33,231 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:33,231 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2023-11-19 07:57:33,232 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2023-11-19 07:57:33,232 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:33,236 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:33,249 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (73)] Ended with exit code 0 [2023-11-19 07:57:33,249 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:33,249 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:33,250 INFO L229 MonitoredProcess]: Starting monitored process 74 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:33,262 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (74)] Waiting until timeout for monitored process [2023-11-19 07:57:33,264 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:33,274 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:33,274 INFO L338 nArgumentSynthesizer]: Template has degree 2. [2023-11-19 07:57:33,274 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:33,275 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:33,275 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:33,275 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2023-11-19 07:57:33,276 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2023-11-19 07:57:33,277 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:33,312 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:33,330 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (74)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:33,330 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:33,330 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:33,331 INFO L229 MonitoredProcess]: Starting monitored process 75 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:33,336 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:33,349 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:33,349 INFO L338 nArgumentSynthesizer]: Template has degree 2. [2023-11-19 07:57:33,350 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:33,350 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:33,350 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:33,350 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2023-11-19 07:57:33,351 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2023-11-19 07:57:33,352 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:33,353 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (75)] Waiting until timeout for monitored process [2023-11-19 07:57:33,380 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:33,398 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (75)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:33,398 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:33,399 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:33,400 INFO L229 MonitoredProcess]: Starting monitored process 76 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:33,404 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:33,417 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:33,417 INFO L338 nArgumentSynthesizer]: Template has degree 2. [2023-11-19 07:57:33,417 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:33,417 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:33,418 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:33,418 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2023-11-19 07:57:33,419 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2023-11-19 07:57:33,419 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:33,421 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (76)] Waiting until timeout for monitored process [2023-11-19 07:57:33,444 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:33,462 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (76)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:33,463 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:33,463 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:33,464 INFO L229 MonitoredProcess]: Starting monitored process 77 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:33,469 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:33,481 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:33,482 INFO L338 nArgumentSynthesizer]: Template has degree 2. [2023-11-19 07:57:33,482 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:33,482 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:33,482 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:33,482 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2023-11-19 07:57:33,483 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2023-11-19 07:57:33,484 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:33,485 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (77)] Waiting until timeout for monitored process [2023-11-19 07:57:33,496 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:33,508 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (77)] Ended with exit code 0 [2023-11-19 07:57:33,508 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:33,508 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:33,509 INFO L229 MonitoredProcess]: Starting monitored process 78 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:33,510 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (78)] Waiting until timeout for monitored process [2023-11-19 07:57:33,510 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:33,521 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:33,521 INFO L338 nArgumentSynthesizer]: Template has degree 2. [2023-11-19 07:57:33,521 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:33,521 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:33,521 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:33,521 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2023-11-19 07:57:33,522 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2023-11-19 07:57:33,523 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:33,529 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:33,542 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (78)] Ended with exit code 0 [2023-11-19 07:57:33,543 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:33,543 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:33,544 INFO L229 MonitoredProcess]: Starting monitored process 79 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:33,545 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (79)] Waiting until timeout for monitored process [2023-11-19 07:57:33,545 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:33,556 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:33,556 INFO L338 nArgumentSynthesizer]: Template has degree 2. [2023-11-19 07:57:33,556 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:33,556 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:33,556 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:33,556 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2023-11-19 07:57:33,558 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2023-11-19 07:57:33,558 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:33,588 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:33,606 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (79)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:33,607 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:33,607 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:33,608 INFO L229 MonitoredProcess]: Starting monitored process 80 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:33,612 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:33,625 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:33,625 INFO L338 nArgumentSynthesizer]: Template has degree 2. [2023-11-19 07:57:33,625 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:33,625 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:33,625 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:33,626 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2023-11-19 07:57:33,627 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2023-11-19 07:57:33,627 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:33,628 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (80)] Waiting until timeout for monitored process [2023-11-19 07:57:33,644 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:33,662 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (80)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:33,663 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:33,663 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:33,664 INFO L229 MonitoredProcess]: Starting monitored process 81 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:33,668 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:33,681 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:33,681 INFO L338 nArgumentSynthesizer]: Template has degree 2. [2023-11-19 07:57:33,681 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:33,682 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:33,682 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:33,682 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2023-11-19 07:57:33,682 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (81)] Waiting until timeout for monitored process [2023-11-19 07:57:33,684 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2023-11-19 07:57:33,684 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:33,700 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:33,718 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (81)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:33,719 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:33,719 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:33,720 INFO L229 MonitoredProcess]: Starting monitored process 82 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:33,724 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:33,737 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (82)] Waiting until timeout for monitored process [2023-11-19 07:57:33,738 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:33,738 INFO L338 nArgumentSynthesizer]: Template has degree 2. [2023-11-19 07:57:33,738 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:33,739 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:33,739 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:33,739 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2023-11-19 07:57:33,741 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2023-11-19 07:57:33,741 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:33,760 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:33,778 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (82)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:33,778 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:33,778 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:33,780 INFO L229 MonitoredProcess]: Starting monitored process 83 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:33,784 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:33,797 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:33,797 INFO L338 nArgumentSynthesizer]: Template has degree 2. [2023-11-19 07:57:33,797 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:33,797 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:33,797 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:33,797 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2023-11-19 07:57:33,799 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (83)] Waiting until timeout for monitored process [2023-11-19 07:57:33,800 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2023-11-19 07:57:33,800 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:33,832 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:33,851 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (83)] Ended with exit code 0 [2023-11-19 07:57:33,851 INFO L490 LassoAnalysis]: Using template '4-phase'. [2023-11-19 07:57:33,851 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:33,851 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:33,852 INFO L229 MonitoredProcess]: Starting monitored process 84 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:33,853 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (84)] Waiting until timeout for monitored process [2023-11-19 07:57:33,854 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:33,865 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:33,866 INFO L338 nArgumentSynthesizer]: Template has degree 3. [2023-11-19 07:57:33,866 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:33,866 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:33,866 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:33,866 INFO L205 nArgumentSynthesizer]: 5 template conjuncts. [2023-11-19 07:57:33,868 INFO L401 nArgumentSynthesizer]: We have 5 Motzkin's Theorem applications. [2023-11-19 07:57:33,868 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:33,873 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:33,886 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (84)] Ended with exit code 0 [2023-11-19 07:57:33,886 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:33,886 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:33,887 INFO L229 MonitoredProcess]: Starting monitored process 85 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:33,889 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (85)] Waiting until timeout for monitored process [2023-11-19 07:57:33,890 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:33,900 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:33,900 INFO L338 nArgumentSynthesizer]: Template has degree 3. [2023-11-19 07:57:33,900 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:33,900 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:33,900 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:33,901 INFO L205 nArgumentSynthesizer]: 5 template conjuncts. [2023-11-19 07:57:33,902 INFO L401 nArgumentSynthesizer]: We have 5 Motzkin's Theorem applications. [2023-11-19 07:57:33,902 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:33,924 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:33,937 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (85)] Ended with exit code 0 [2023-11-19 07:57:33,938 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:33,938 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:33,938 INFO L229 MonitoredProcess]: Starting monitored process 86 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:33,939 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (86)] Waiting until timeout for monitored process [2023-11-19 07:57:33,941 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:33,951 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:33,951 INFO L338 nArgumentSynthesizer]: Template has degree 3. [2023-11-19 07:57:33,951 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:33,951 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:33,951 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:33,951 INFO L205 nArgumentSynthesizer]: 5 template conjuncts. [2023-11-19 07:57:33,953 INFO L401 nArgumentSynthesizer]: We have 5 Motzkin's Theorem applications. [2023-11-19 07:57:33,953 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:33,958 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:33,971 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (86)] Ended with exit code 0 [2023-11-19 07:57:33,971 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:33,971 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:33,972 INFO L229 MonitoredProcess]: Starting monitored process 87 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:33,973 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (87)] Waiting until timeout for monitored process [2023-11-19 07:57:33,974 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:33,984 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:33,985 INFO L338 nArgumentSynthesizer]: Template has degree 3. [2023-11-19 07:57:33,985 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:33,985 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:33,985 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:33,985 INFO L205 nArgumentSynthesizer]: 5 template conjuncts. [2023-11-19 07:57:33,987 INFO L401 nArgumentSynthesizer]: We have 5 Motzkin's Theorem applications. [2023-11-19 07:57:33,987 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:33,992 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:34,003 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (87)] Ended with exit code 0 [2023-11-19 07:57:34,003 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:34,004 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:34,004 INFO L229 MonitoredProcess]: Starting monitored process 88 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:34,006 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (88)] Waiting until timeout for monitored process [2023-11-19 07:57:34,008 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:34,019 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:34,019 INFO L338 nArgumentSynthesizer]: Template has degree 3. [2023-11-19 07:57:34,019 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:34,019 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:34,019 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:34,019 INFO L205 nArgumentSynthesizer]: 5 template conjuncts. [2023-11-19 07:57:34,021 INFO L401 nArgumentSynthesizer]: We have 5 Motzkin's Theorem applications. [2023-11-19 07:57:34,021 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:34,026 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:34,038 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (88)] Ended with exit code 0 [2023-11-19 07:57:34,038 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:34,038 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:34,039 INFO L229 MonitoredProcess]: Starting monitored process 89 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:34,040 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (89)] Waiting until timeout for monitored process [2023-11-19 07:57:34,040 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:34,051 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:34,051 INFO L338 nArgumentSynthesizer]: Template has degree 3. [2023-11-19 07:57:34,051 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:34,051 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:34,051 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:34,051 INFO L205 nArgumentSynthesizer]: 5 template conjuncts. [2023-11-19 07:57:34,053 INFO L401 nArgumentSynthesizer]: We have 5 Motzkin's Theorem applications. [2023-11-19 07:57:34,053 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:34,061 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:34,074 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (89)] Ended with exit code 0 [2023-11-19 07:57:34,074 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:34,074 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:34,075 INFO L229 MonitoredProcess]: Starting monitored process 90 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:34,077 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (90)] Waiting until timeout for monitored process [2023-11-19 07:57:34,077 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:34,088 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:34,088 INFO L338 nArgumentSynthesizer]: Template has degree 3. [2023-11-19 07:57:34,088 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:34,088 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:34,088 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:34,088 INFO L205 nArgumentSynthesizer]: 5 template conjuncts. [2023-11-19 07:57:34,090 INFO L401 nArgumentSynthesizer]: We have 5 Motzkin's Theorem applications. [2023-11-19 07:57:34,090 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:34,098 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:34,110 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (90)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:34,110 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:34,110 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:34,111 INFO L229 MonitoredProcess]: Starting monitored process 91 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:34,112 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (91)] Waiting until timeout for monitored process [2023-11-19 07:57:34,112 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:34,123 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:34,123 INFO L338 nArgumentSynthesizer]: Template has degree 3. [2023-11-19 07:57:34,123 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:34,123 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:34,123 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:34,123 INFO L205 nArgumentSynthesizer]: 5 template conjuncts. [2023-11-19 07:57:34,125 INFO L401 nArgumentSynthesizer]: We have 5 Motzkin's Theorem applications. [2023-11-19 07:57:34,125 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:34,152 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:34,170 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (91)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:34,170 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:34,170 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:34,172 INFO L229 MonitoredProcess]: Starting monitored process 92 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:34,176 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (92)] Waiting until timeout for monitored process [2023-11-19 07:57:34,177 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:34,188 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:34,188 INFO L338 nArgumentSynthesizer]: Template has degree 3. [2023-11-19 07:57:34,188 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:34,188 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:34,188 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:34,188 INFO L205 nArgumentSynthesizer]: 5 template conjuncts. [2023-11-19 07:57:34,190 INFO L401 nArgumentSynthesizer]: We have 5 Motzkin's Theorem applications. [2023-11-19 07:57:34,190 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:34,198 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:34,210 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (92)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:34,211 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:34,212 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:34,212 INFO L229 MonitoredProcess]: Starting monitored process 93 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:34,213 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (93)] Waiting until timeout for monitored process [2023-11-19 07:57:34,214 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:34,224 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:34,224 INFO L338 nArgumentSynthesizer]: Template has degree 3. [2023-11-19 07:57:34,225 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:34,225 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:34,225 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:34,225 INFO L205 nArgumentSynthesizer]: 5 template conjuncts. [2023-11-19 07:57:34,227 INFO L401 nArgumentSynthesizer]: We have 5 Motzkin's Theorem applications. [2023-11-19 07:57:34,227 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:34,237 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:34,250 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (93)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:34,250 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:34,250 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:34,251 INFO L229 MonitoredProcess]: Starting monitored process 94 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:34,252 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (94)] Waiting until timeout for monitored process [2023-11-19 07:57:34,252 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:34,263 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:34,263 INFO L338 nArgumentSynthesizer]: Template has degree 3. [2023-11-19 07:57:34,263 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:34,263 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:34,263 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:34,263 INFO L205 nArgumentSynthesizer]: 5 template conjuncts. [2023-11-19 07:57:34,269 INFO L401 nArgumentSynthesizer]: We have 5 Motzkin's Theorem applications. [2023-11-19 07:57:34,269 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:34,292 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:34,310 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (94)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:34,310 INFO L490 LassoAnalysis]: Using template '2-lex'. [2023-11-19 07:57:34,311 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:34,311 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:34,312 INFO L229 MonitoredProcess]: Starting monitored process 95 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:34,316 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:34,324 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (95)] Waiting until timeout for monitored process [2023-11-19 07:57:34,329 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:34,329 INFO L338 nArgumentSynthesizer]: Template has degree 1. [2023-11-19 07:57:34,329 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:34,329 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:34,329 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:34,330 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2023-11-19 07:57:34,330 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2023-11-19 07:57:34,330 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:34,348 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:34,366 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (95)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:34,366 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:34,366 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:34,367 INFO L229 MonitoredProcess]: Starting monitored process 96 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:34,373 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:34,387 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:34,388 INFO L338 nArgumentSynthesizer]: Template has degree 1. [2023-11-19 07:57:34,388 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:34,388 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:34,388 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:34,388 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2023-11-19 07:57:34,389 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2023-11-19 07:57:34,389 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:34,390 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (96)] Waiting until timeout for monitored process [2023-11-19 07:57:34,408 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:34,426 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (96)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:34,427 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:34,427 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:34,428 INFO L229 MonitoredProcess]: Starting monitored process 97 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:34,432 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:34,445 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:34,445 INFO L338 nArgumentSynthesizer]: Template has degree 1. [2023-11-19 07:57:34,445 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:34,445 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:34,445 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:34,445 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2023-11-19 07:57:34,446 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2023-11-19 07:57:34,446 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:34,447 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (97)] Waiting until timeout for monitored process [2023-11-19 07:57:34,464 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:34,482 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (97)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:34,482 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:34,482 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:34,483 INFO L229 MonitoredProcess]: Starting monitored process 98 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:34,488 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:34,501 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:34,501 INFO L338 nArgumentSynthesizer]: Template has degree 1. [2023-11-19 07:57:34,501 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:34,501 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:34,501 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:34,501 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2023-11-19 07:57:34,502 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2023-11-19 07:57:34,502 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:34,503 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (98)] Waiting until timeout for monitored process [2023-11-19 07:57:34,524 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:34,541 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (98)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:34,542 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:34,542 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:34,543 INFO L229 MonitoredProcess]: Starting monitored process 99 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:34,546 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:34,558 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:34,558 INFO L338 nArgumentSynthesizer]: Template has degree 1. [2023-11-19 07:57:34,558 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:34,558 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:34,558 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:34,559 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2023-11-19 07:57:34,559 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2023-11-19 07:57:34,559 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:34,560 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (99)] Waiting until timeout for monitored process [2023-11-19 07:57:34,576 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:34,593 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (99)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:34,594 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:34,594 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:34,595 INFO L229 MonitoredProcess]: Starting monitored process 100 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:34,597 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:34,609 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:34,609 INFO L338 nArgumentSynthesizer]: Template has degree 1. [2023-11-19 07:57:34,610 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:34,610 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:34,610 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:34,610 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2023-11-19 07:57:34,611 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2023-11-19 07:57:34,611 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:34,612 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (100)] Waiting until timeout for monitored process [2023-11-19 07:57:34,640 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:34,658 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (100)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:34,658 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:34,658 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:34,659 INFO L229 MonitoredProcess]: Starting monitored process 101 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:34,661 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:34,674 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:34,674 INFO L338 nArgumentSynthesizer]: Template has degree 1. [2023-11-19 07:57:34,674 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:34,674 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:34,674 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:34,674 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2023-11-19 07:57:34,675 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2023-11-19 07:57:34,676 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:34,677 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (101)] Waiting until timeout for monitored process [2023-11-19 07:57:34,692 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:34,710 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (101)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:34,710 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:34,710 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:34,711 INFO L229 MonitoredProcess]: Starting monitored process 102 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:34,713 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:34,726 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:34,726 INFO L338 nArgumentSynthesizer]: Template has degree 1. [2023-11-19 07:57:34,726 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:34,726 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:34,726 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:34,726 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2023-11-19 07:57:34,727 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2023-11-19 07:57:34,727 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:34,728 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (102)] Waiting until timeout for monitored process [2023-11-19 07:57:34,744 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:34,762 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (102)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:34,762 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:34,763 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:34,764 INFO L229 MonitoredProcess]: Starting monitored process 103 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:34,766 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:34,779 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (103)] Waiting until timeout for monitored process [2023-11-19 07:57:34,779 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:34,779 INFO L338 nArgumentSynthesizer]: Template has degree 1. [2023-11-19 07:57:34,780 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:34,780 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:34,780 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:34,780 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2023-11-19 07:57:34,781 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2023-11-19 07:57:34,781 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:34,796 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:34,814 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (103)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:34,814 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:34,814 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:34,816 INFO L229 MonitoredProcess]: Starting monitored process 104 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:34,818 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:34,831 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:34,831 INFO L338 nArgumentSynthesizer]: Template has degree 1. [2023-11-19 07:57:34,831 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:34,831 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:34,831 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:34,831 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2023-11-19 07:57:34,832 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (104)] Waiting until timeout for monitored process [2023-11-19 07:57:34,834 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2023-11-19 07:57:34,834 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:34,852 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:34,865 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (104)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:34,866 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:34,866 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:34,866 INFO L229 MonitoredProcess]: Starting monitored process 105 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:34,867 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (105)] Waiting until timeout for monitored process [2023-11-19 07:57:34,868 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:34,878 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:34,878 INFO L338 nArgumentSynthesizer]: Template has degree 1. [2023-11-19 07:57:34,878 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:34,878 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:34,878 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:34,878 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2023-11-19 07:57:34,880 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2023-11-19 07:57:34,880 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:34,888 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:34,901 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (105)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:34,901 INFO L490 LassoAnalysis]: Using template '3-lex'. [2023-11-19 07:57:34,901 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:34,901 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:34,902 INFO L229 MonitoredProcess]: Starting monitored process 106 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:34,903 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (106)] Waiting until timeout for monitored process [2023-11-19 07:57:34,904 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:34,914 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:34,915 INFO L338 nArgumentSynthesizer]: Template has degree 3. [2023-11-19 07:57:34,915 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:34,915 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:34,915 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:34,915 INFO L205 nArgumentSynthesizer]: 6 template conjuncts. [2023-11-19 07:57:34,916 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-19 07:57:34,916 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:34,920 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:34,933 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (106)] Ended with exit code 0 [2023-11-19 07:57:34,933 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:34,933 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:34,934 INFO L229 MonitoredProcess]: Starting monitored process 107 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:34,935 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (107)] Waiting until timeout for monitored process [2023-11-19 07:57:34,936 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:34,947 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:34,947 INFO L338 nArgumentSynthesizer]: Template has degree 3. [2023-11-19 07:57:34,947 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:34,947 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:34,947 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:34,947 INFO L205 nArgumentSynthesizer]: 6 template conjuncts. [2023-11-19 07:57:34,948 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-19 07:57:34,949 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:34,956 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:34,967 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (107)] Ended with exit code 0 [2023-11-19 07:57:34,967 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:34,967 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:34,968 INFO L229 MonitoredProcess]: Starting monitored process 108 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:34,969 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (108)] Waiting until timeout for monitored process [2023-11-19 07:57:34,970 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:34,980 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:34,980 INFO L338 nArgumentSynthesizer]: Template has degree 3. [2023-11-19 07:57:34,980 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:34,980 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:34,980 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:34,981 INFO L205 nArgumentSynthesizer]: 6 template conjuncts. [2023-11-19 07:57:34,981 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-19 07:57:34,982 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:34,986 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:34,997 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (108)] Ended with exit code 0 [2023-11-19 07:57:34,998 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:34,998 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:34,999 INFO L229 MonitoredProcess]: Starting monitored process 109 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:35,000 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (109)] Waiting until timeout for monitored process [2023-11-19 07:57:35,001 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:35,012 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:35,012 INFO L338 nArgumentSynthesizer]: Template has degree 3. [2023-11-19 07:57:35,013 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:35,013 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:35,013 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:35,013 INFO L205 nArgumentSynthesizer]: 6 template conjuncts. [2023-11-19 07:57:35,014 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-19 07:57:35,014 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:35,018 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:35,030 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (109)] Ended with exit code 0 [2023-11-19 07:57:35,030 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:35,030 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:35,032 INFO L229 MonitoredProcess]: Starting monitored process 110 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:35,032 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (110)] Waiting until timeout for monitored process [2023-11-19 07:57:35,033 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:35,043 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:35,043 INFO L338 nArgumentSynthesizer]: Template has degree 3. [2023-11-19 07:57:35,043 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:35,043 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:35,043 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:35,043 INFO L205 nArgumentSynthesizer]: 6 template conjuncts. [2023-11-19 07:57:35,045 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-19 07:57:35,045 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:35,049 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:35,061 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (110)] Ended with exit code 0 [2023-11-19 07:57:35,062 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:35,062 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:35,062 INFO L229 MonitoredProcess]: Starting monitored process 111 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:35,063 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (111)] Waiting until timeout for monitored process [2023-11-19 07:57:35,064 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:35,074 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:35,074 INFO L338 nArgumentSynthesizer]: Template has degree 3. [2023-11-19 07:57:35,074 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:35,074 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:35,074 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:35,074 INFO L205 nArgumentSynthesizer]: 6 template conjuncts. [2023-11-19 07:57:35,076 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-19 07:57:35,076 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:35,081 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:35,092 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (111)] Ended with exit code 0 [2023-11-19 07:57:35,093 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:35,093 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:35,094 INFO L229 MonitoredProcess]: Starting monitored process 112 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:35,096 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (112)] Waiting until timeout for monitored process [2023-11-19 07:57:35,096 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:35,116 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:35,117 INFO L338 nArgumentSynthesizer]: Template has degree 3. [2023-11-19 07:57:35,117 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:35,117 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:35,117 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:35,117 INFO L205 nArgumentSynthesizer]: 6 template conjuncts. [2023-11-19 07:57:35,119 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-19 07:57:35,119 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:35,146 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:35,165 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (112)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:35,165 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:35,165 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:35,166 INFO L229 MonitoredProcess]: Starting monitored process 113 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:35,180 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:35,193 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:35,193 INFO L338 nArgumentSynthesizer]: Template has degree 3. [2023-11-19 07:57:35,193 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:35,193 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:35,194 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:35,194 INFO L205 nArgumentSynthesizer]: 6 template conjuncts. [2023-11-19 07:57:35,195 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-19 07:57:35,195 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:35,195 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (113)] Waiting until timeout for monitored process [2023-11-19 07:57:35,216 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:35,239 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (113)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:35,240 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:35,240 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:35,241 INFO L229 MonitoredProcess]: Starting monitored process 114 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:35,245 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:35,258 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:35,258 INFO L338 nArgumentSynthesizer]: Template has degree 3. [2023-11-19 07:57:35,258 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:35,258 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:35,258 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:35,259 INFO L205 nArgumentSynthesizer]: 6 template conjuncts. [2023-11-19 07:57:35,260 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-19 07:57:35,260 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:35,261 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (114)] Waiting until timeout for monitored process [2023-11-19 07:57:35,272 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:35,291 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (114)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:35,291 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:35,291 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:35,292 INFO L229 MonitoredProcess]: Starting monitored process 115 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:35,294 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:35,308 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (115)] Waiting until timeout for monitored process [2023-11-19 07:57:35,309 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:35,311 INFO L338 nArgumentSynthesizer]: Template has degree 3. [2023-11-19 07:57:35,312 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:35,312 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:35,312 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:35,312 INFO L205 nArgumentSynthesizer]: 6 template conjuncts. [2023-11-19 07:57:35,314 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-19 07:57:35,314 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:35,322 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:35,333 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (115)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:35,334 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-19 07:57:35,334 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:35,335 INFO L229 MonitoredProcess]: Starting monitored process 116 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-19 07:57:35,336 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (116)] Waiting until timeout for monitored process [2023-11-19 07:57:35,336 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-19 07:57:35,346 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2023-11-19 07:57:35,347 INFO L338 nArgumentSynthesizer]: Template has degree 3. [2023-11-19 07:57:35,347 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-19 07:57:35,347 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-19 07:57:35,347 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-19 07:57:35,347 INFO L205 nArgumentSynthesizer]: 6 template conjuncts. [2023-11-19 07:57:35,350 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-19 07:57:35,350 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-19 07:57:35,358 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-19 07:57:35,370 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (116)] Forceful destruction successful, exit code 0 [2023-11-19 07:57:35,370 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-19 07:57:35,370 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2023-11-19 07:57:35,371 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=124, Unknown=0, NotChecked=0, Total=182 [2023-11-19 07:57:35,371 INFO L87 Difference]: Start difference. First operand 95 states and 110 transitions. cyclomatic complexity: 16 Second operand has 14 states, 14 states have (on average 3.642857142857143) internal successors, (51), 14 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-19 07:57:35,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-19 07:57:35,784 INFO L93 Difference]: Finished difference Result 380 states and 410 transitions. [2023-11-19 07:57:35,784 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 380 states and 410 transitions. [2023-11-19 07:57:35,787 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 351 [2023-11-19 07:57:35,790 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 380 states to 380 states and 410 transitions. [2023-11-19 07:57:35,790 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 380 [2023-11-19 07:57:35,790 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 380 [2023-11-19 07:57:35,790 INFO L73 IsDeterministic]: Start isDeterministic. Operand 380 states and 410 transitions. [2023-11-19 07:57:35,792 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-19 07:57:35,792 INFO L218 hiAutomatonCegarLoop]: Abstraction has 380 states and 410 transitions. [2023-11-19 07:57:35,793 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 380 states and 410 transitions. [2023-11-19 07:57:35,801 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 380 to 191. [2023-11-19 07:57:35,801 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 191 states, 191 states have (on average 1.0785340314136125) internal successors, (206), 190 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-19 07:57:35,803 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 191 states to 191 states and 206 transitions. [2023-11-19 07:57:35,804 INFO L240 hiAutomatonCegarLoop]: Abstraction has 191 states and 206 transitions. [2023-11-19 07:57:35,804 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2023-11-19 07:57:35,805 INFO L428 stractBuchiCegarLoop]: Abstraction has 191 states and 206 transitions. [2023-11-19 07:57:35,805 INFO L335 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2023-11-19 07:57:35,805 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 191 states and 206 transitions. [2023-11-19 07:57:35,806 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 189 [2023-11-19 07:57:35,807 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-19 07:57:35,807 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-19 07:57:35,809 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-19 07:57:35,809 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [48, 48, 48, 8, 8, 8, 4, 4, 4, 2, 2, 2, 1, 1, 1] [2023-11-19 07:57:35,809 INFO L748 eck$LassoCheckResult]: Stem: 3503#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(14, 2);call #Ultimate.allocInit(12, 3); 3492#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~pre8#1, main_#t~pre7#1, main_#t~pre6#1, main_#t~pre5#1, main_#t~pre4#1, main_~a~0#1, main_~b~0#1, main_~c~0#1, main_~d~0#1, main_~e~0#1, main_~uint32_max~0#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~c~0#1;havoc main_~d~0#1;havoc main_~e~0#1;havoc main_~uint32_max~0#1;main_~uint32_max~0#1 := 4294967295;main_~a~0#1 := 0; 3493#L17-3 [2023-11-19 07:57:35,810 INFO L750 eck$LassoCheckResult]: Loop: 3493#L17-3 assume !!(main_~a~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~b~0#1 := 0; 3494#L18-3 assume !!(main_~b~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~c~0#1 := 0; 3678#L19-3 assume !!(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~d~0#1 := 0; 3677#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 3676#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3675#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3674#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3673#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3671#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3669#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3667#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3665#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3663#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3661#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3659#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3657#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3655#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3653#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3651#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3649#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3644#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3647#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3643#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3642#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 3641#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 3600#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3639#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3637#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3635#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3633#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3631#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3629#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3627#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3625#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3623#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3621#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3619#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3617#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3615#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3613#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3611#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3606#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3609#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3605#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3603#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 3599#L20-3 assume !(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3598#L19-2 main_#t~pre6#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre6#1; 3597#L19-3 assume !!(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~d~0#1 := 0; 3508#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 3595#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3593#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3591#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3589#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3587#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3585#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3583#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3581#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3579#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3577#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3575#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3573#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3571#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3569#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3567#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3565#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3560#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3563#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3559#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3557#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 3555#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 3514#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3553#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3551#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3549#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3547#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3545#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3543#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3541#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3539#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3537#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3535#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3533#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3531#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3529#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3527#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3525#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3520#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3523#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3519#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3517#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 3513#L20-3 assume !(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3511#L19-2 main_#t~pre6#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre6#1; 3507#L19-3 assume !(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3497#L18-2 main_#t~pre5#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre5#1; 3498#L18-3 assume !!(main_~b~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~c~0#1 := 0; 3499#L19-3 assume !!(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~d~0#1 := 0; 3500#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 3490#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3491#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3495#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3504#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3672#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3670#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3668#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3666#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3664#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3662#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3660#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3658#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3656#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3654#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3652#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3650#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3646#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3648#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3645#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3501#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 3502#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 3602#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3640#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3638#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3636#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3634#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3632#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3630#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3628#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3626#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3624#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3622#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3620#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3618#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3616#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3614#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3612#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3608#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3610#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3607#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3604#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 3601#L20-3 assume !(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3488#L19-2 main_#t~pre6#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre6#1; 3489#L19-3 assume !!(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~d~0#1 := 0; 3510#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 3596#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3594#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3592#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3590#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3588#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3586#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3584#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3582#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3580#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3578#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3576#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3574#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3572#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3570#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3568#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3566#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3562#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3564#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3561#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3558#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 3556#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 3516#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3554#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3552#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3550#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3548#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3546#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3544#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3542#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3540#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3538#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3536#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3534#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3532#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3530#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3528#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3526#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3522#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 3524#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 3521#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3518#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 3515#L20-3 assume !(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3512#L19-2 main_#t~pre6#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre6#1; 3509#L19-3 assume !(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3506#L18-2 main_#t~pre5#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre5#1; 3505#L18-3 assume !(main_~b~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 3496#L17-2 main_#t~pre4#1 := 1 + main_~a~0#1;main_~a~0#1 := 1 + main_~a~0#1;havoc main_#t~pre4#1; 3493#L17-3 [2023-11-19 07:57:35,811 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-19 07:57:35,811 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 10 times [2023-11-19 07:57:35,811 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-19 07:57:35,811 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2115408768] [2023-11-19 07:57:35,811 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:57:35,811 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-19 07:57:35,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-19 07:57:35,815 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-19 07:57:35,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-19 07:57:35,818 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-19 07:57:35,819 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-19 07:57:35,819 INFO L85 PathProgramCache]: Analyzing trace with hash -672124548, now seen corresponding path program 6 times [2023-11-19 07:57:35,819 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-19 07:57:35,819 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [221882224] [2023-11-19 07:57:35,819 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:57:35,820 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-19 07:57:35,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-19 07:57:37,079 INFO L134 CoverageAnalysis]: Checked inductivity of 3915 backedges. 1498 proven. 176 refuted. 0 times theorem prover too weak. 2241 trivial. 0 not checked. [2023-11-19 07:57:37,079 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-19 07:57:37,079 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [221882224] [2023-11-19 07:57:37,080 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [221882224] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-19 07:57:37,080 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1663506528] [2023-11-19 07:57:37,080 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2023-11-19 07:57:37,080 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-19 07:57:37,080 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:37,081 INFO L229 MonitoredProcess]: Starting monitored process 117 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-19 07:57:37,104 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 -smt2 -in SMTLIB2_COMPLIANT=true (117)] Waiting until timeout for monitored process [2023-11-19 07:57:38,133 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 30 check-sat command(s) [2023-11-19 07:57:38,133 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-19 07:57:38,135 INFO L262 TraceCheckSpWp]: Trace formula consists of 152 conjuncts, 14 conjunts are in the unsatisfiable core [2023-11-19 07:57:38,140 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-19 07:57:39,047 INFO L134 CoverageAnalysis]: Checked inductivity of 3915 backedges. 499 proven. 2083 refuted. 0 times theorem prover too weak. 1333 trivial. 0 not checked. [2023-11-19 07:57:39,048 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-19 07:57:39,814 INFO L134 CoverageAnalysis]: Checked inductivity of 3915 backedges. 0 proven. 2582 refuted. 0 times theorem prover too weak. 1333 trivial. 0 not checked. [2023-11-19 07:57:39,815 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1663506528] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-19 07:57:39,815 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-19 07:57:39,815 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 8, 8] total 27 [2023-11-19 07:57:39,815 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [119048620] [2023-11-19 07:57:39,816 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-19 07:57:39,817 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-19 07:57:39,817 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-19 07:57:39,818 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2023-11-19 07:57:39,818 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=82, Invalid=620, Unknown=0, NotChecked=0, Total=702 [2023-11-19 07:57:39,819 INFO L87 Difference]: Start difference. First operand 191 states and 206 transitions. cyclomatic complexity: 16 Second operand has 27 states, 27 states have (on average 4.777777777777778) internal successors, (129), 27 states have internal predecessors, (129), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-19 07:57:46,749 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-19 07:57:46,750 INFO L93 Difference]: Finished difference Result 964 states and 1036 transitions. [2023-11-19 07:57:46,750 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 964 states and 1036 transitions. [2023-11-19 07:57:46,758 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 962 [2023-11-19 07:57:46,766 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 964 states to 964 states and 1036 transitions. [2023-11-19 07:57:46,767 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 964 [2023-11-19 07:57:46,768 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 964 [2023-11-19 07:57:46,768 INFO L73 IsDeterministic]: Start isDeterministic. Operand 964 states and 1036 transitions. [2023-11-19 07:57:46,769 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-19 07:57:46,770 INFO L218 hiAutomatonCegarLoop]: Abstraction has 964 states and 1036 transitions. [2023-11-19 07:57:46,771 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 964 states and 1036 transitions. [2023-11-19 07:57:46,785 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 964 to 680. [2023-11-19 07:57:46,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 680 states, 680 states have (on average 1.0676470588235294) internal successors, (726), 679 states have internal predecessors, (726), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-19 07:57:46,792 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 680 states to 680 states and 726 transitions. [2023-11-19 07:57:46,792 INFO L240 hiAutomatonCegarLoop]: Abstraction has 680 states and 726 transitions. [2023-11-19 07:57:46,792 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 123 states. [2023-11-19 07:57:46,793 INFO L428 stractBuchiCegarLoop]: Abstraction has 680 states and 726 transitions. [2023-11-19 07:57:46,793 INFO L335 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2023-11-19 07:57:46,793 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 680 states and 726 transitions. [2023-11-19 07:57:46,798 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 678 [2023-11-19 07:57:46,798 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-19 07:57:46,799 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-19 07:57:46,804 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-19 07:57:46,804 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [180, 180, 180, 30, 30, 30, 10, 10, 10, 5, 5, 5, 1, 1, 1] [2023-11-19 07:57:46,805 INFO L748 eck$LassoCheckResult]: Stem: 6056#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(14, 2);call #Ultimate.allocInit(12, 3); 6045#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~pre8#1, main_#t~pre7#1, main_#t~pre6#1, main_#t~pre5#1, main_#t~pre4#1, main_~a~0#1, main_~b~0#1, main_~c~0#1, main_~d~0#1, main_~e~0#1, main_~uint32_max~0#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~c~0#1;havoc main_~d~0#1;havoc main_~e~0#1;havoc main_~uint32_max~0#1;main_~uint32_max~0#1 := 4294967295;main_~a~0#1 := 0; 6046#L17-3 [2023-11-19 07:57:46,806 INFO L750 eck$LassoCheckResult]: Loop: 6046#L17-3 assume !!(main_~a~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~b~0#1 := 0; 6047#L18-3 assume !!(main_~b~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~c~0#1 := 0; 6708#L19-3 assume !!(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~d~0#1 := 0; 6053#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 6043#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6044#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6048#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6057#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6720#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6719#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6718#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6717#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6716#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6715#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6714#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6713#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6712#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6711#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6710#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6709#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6689#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6691#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6688#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6054#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 6055#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 6684#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6683#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6682#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6681#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6680#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6679#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6678#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6677#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6676#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6675#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6674#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6673#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6672#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6671#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6670#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6669#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6667#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6668#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6666#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6665#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 6664#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 6588#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6663#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6662#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6661#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6660#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6659#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6658#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6657#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6656#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6655#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6654#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6653#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6652#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6651#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6650#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6649#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6647#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6648#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6646#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6391#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 6392#L20-3 assume !(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6041#L19-2 main_#t~pre6#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre6#1; 6042#L19-3 assume !!(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~d~0#1 := 0; 6480#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 6645#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6644#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6643#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6642#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6641#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6640#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6639#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6638#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6637#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6636#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6635#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6634#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6633#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6632#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6631#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6630#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6568#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6570#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6567#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6564#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 6562#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 6561#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6560#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6559#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6558#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6557#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6556#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6555#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6554#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6553#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6552#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6551#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6550#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6549#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6548#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6547#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6546#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6544#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6545#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6543#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6542#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 6541#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 6481#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6518#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6516#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6514#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6512#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6510#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6508#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6506#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6504#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6502#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6500#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6498#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6496#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6494#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6492#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6490#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6486#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6488#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6485#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6319#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 6320#L20-3 assume !(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6249#L19-2 main_#t~pre6#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre6#1; 6250#L19-3 assume !(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6050#L18-2 main_#t~pre5#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre5#1; 6051#L18-3 assume !!(main_~b~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~c~0#1 := 0; 6052#L19-3 assume !!(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~d~0#1 := 0; 6058#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 6707#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6706#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6705#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6704#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6703#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6702#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6701#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6700#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6699#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6698#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6697#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6696#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6695#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6694#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6693#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6692#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6687#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6690#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6686#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6685#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 6629#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 6628#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6627#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6626#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6625#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6624#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6623#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6622#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6621#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6620#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6619#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6618#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6617#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6616#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6615#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6614#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6613#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6611#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6612#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6610#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6609#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 6608#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 6389#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6607#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6606#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6605#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6604#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6603#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6602#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6601#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6600#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6599#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6598#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6597#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6596#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6595#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6594#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6593#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6591#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6592#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6590#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6589#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 6387#L20-3 assume !(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6388#L19-2 main_#t~pre6#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre6#1; 6587#L19-3 assume !!(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~d~0#1 := 0; 6248#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 6586#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6585#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6584#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6583#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6582#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6581#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6580#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6579#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6578#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6577#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6576#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6575#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6574#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6573#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6572#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6571#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6566#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6569#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6565#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6563#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 6540#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 6539#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6538#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6537#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6536#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6535#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6534#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6533#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6532#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6531#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6530#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6529#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6528#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6527#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6526#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6525#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6524#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6522#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6523#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6521#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6520#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 6519#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 6318#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6517#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6515#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6513#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6511#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6509#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6507#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6505#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6503#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6501#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6499#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6497#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6495#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6493#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6491#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6489#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6484#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6487#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6483#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6482#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 6316#L20-3 assume !(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6317#L19-2 main_#t~pre6#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre6#1; 6246#L19-3 assume !(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6247#L18-2 main_#t~pre5#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre5#1; 6479#L18-3 assume !!(main_~b~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~c~0#1 := 0; 6478#L19-3 assume !!(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~d~0#1 := 0; 6477#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 6476#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6475#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6474#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6473#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6472#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6471#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6470#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6469#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6468#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6467#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6466#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6465#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6464#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6463#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6462#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6461#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6459#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6460#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6458#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6457#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 6456#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 6455#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6454#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6453#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6452#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6451#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6450#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6449#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6448#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6447#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6446#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6445#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6444#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6443#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6442#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6441#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6440#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6438#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6439#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6437#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6436#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 6435#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 6415#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6434#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6433#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6432#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6431#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6430#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6429#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6428#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6427#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6426#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6425#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6424#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6423#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6422#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6421#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6420#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6418#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6419#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6417#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6416#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 6414#L20-3 assume !(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6413#L19-2 main_#t~pre6#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre6#1; 6412#L19-3 assume !!(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~d~0#1 := 0; 6342#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 6411#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6410#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6409#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6408#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6407#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6406#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6405#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6404#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6403#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6402#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6401#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6400#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6399#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6398#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6397#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6396#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6394#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6395#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6393#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6390#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 6386#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 6385#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6384#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6383#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6382#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6381#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6380#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6379#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6378#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6377#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6376#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6375#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6374#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6373#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6372#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6371#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6370#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6368#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6369#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6367#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6366#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 6365#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 6345#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6364#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6363#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6362#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6361#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6360#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6359#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6358#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6357#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6356#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6355#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6354#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6353#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6352#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6351#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6350#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6348#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6349#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6347#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6346#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 6344#L20-3 assume !(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6343#L19-2 main_#t~pre6#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre6#1; 6341#L19-3 assume !(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6340#L18-2 main_#t~pre5#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre5#1; 6339#L18-3 assume !!(main_~b~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~c~0#1 := 0; 6338#L19-3 assume !!(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~d~0#1 := 0; 6337#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 6336#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6335#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6334#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6333#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6332#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6331#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6330#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6329#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6328#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6327#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6326#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6325#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6324#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6323#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6322#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6321#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6314#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6315#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6313#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6312#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 6311#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 6310#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6309#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6308#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6307#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6306#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6305#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6304#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6303#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6302#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6301#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6300#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6299#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6298#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6297#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6296#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6295#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6293#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6294#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6292#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6291#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 6290#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 6270#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6289#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6288#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6287#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6286#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6285#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6284#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6283#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6282#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6281#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6280#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6279#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6278#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6277#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6276#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6275#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6273#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6274#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6272#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6271#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 6269#L20-3 assume !(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6268#L19-2 main_#t~pre6#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre6#1; 6267#L19-3 assume !!(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~d~0#1 := 0; 6197#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 6266#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6265#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6264#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6263#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6262#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6261#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6260#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6259#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6258#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6257#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6256#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6255#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6254#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6253#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6252#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6251#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6244#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6245#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6243#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6242#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 6241#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 6240#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6239#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6238#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6237#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6236#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6235#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6234#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6233#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6232#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6231#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6230#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6229#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6228#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6227#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6226#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6225#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6223#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6224#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6222#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6221#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 6220#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 6200#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6219#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6218#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6217#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6216#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6215#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6214#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6213#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6212#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6211#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6210#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6209#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6208#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6207#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6206#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6205#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6203#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6204#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6202#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6201#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 6199#L20-3 assume !(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6198#L19-2 main_#t~pre6#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre6#1; 6196#L19-3 assume !(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6195#L18-2 main_#t~pre5#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre5#1; 6194#L18-3 assume !!(main_~b~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~c~0#1 := 0; 6060#L19-3 assume !!(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~d~0#1 := 0; 6193#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 6192#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6191#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6190#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6189#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6188#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6187#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6186#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6185#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6184#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6183#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6182#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6181#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6180#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6179#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6178#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6177#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6175#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6176#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6174#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6173#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 6172#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 6171#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6170#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6169#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6168#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6167#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6166#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6165#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6164#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6163#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6162#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6161#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6160#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6159#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6158#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6157#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6156#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6154#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6155#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6153#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6152#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 6151#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 6131#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6150#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6149#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6148#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6147#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6146#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6145#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6144#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6143#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6142#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6141#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6140#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6139#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6138#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6137#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6136#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6134#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6135#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6133#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6132#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 6130#L20-3 assume !(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6129#L19-2 main_#t~pre6#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre6#1; 6128#L19-3 assume !!(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~d~0#1 := 0; 6063#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 6127#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6126#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6125#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6124#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6123#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6122#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6121#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6120#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6119#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6118#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6117#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6116#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6115#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6114#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6113#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6112#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6110#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6111#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6109#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6108#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 6107#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 6106#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6105#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6104#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6103#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6102#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6101#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6100#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6099#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6098#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6097#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6096#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6095#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6094#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6093#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6092#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6091#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6089#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6090#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6088#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6087#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 6086#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 6066#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6085#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6084#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6083#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6082#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6081#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6080#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6079#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6078#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6077#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6076#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6075#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6074#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6073#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6072#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6071#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6069#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 6070#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 6068#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6067#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 6065#L20-3 assume !(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6064#L19-2 main_#t~pre6#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre6#1; 6062#L19-3 assume !(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6061#L18-2 main_#t~pre5#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre5#1; 6059#L18-3 assume !(main_~b~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 6049#L17-2 main_#t~pre4#1 := 1 + main_~a~0#1;main_~a~0#1 := 1 + main_~a~0#1;havoc main_#t~pre4#1; 6046#L17-3 [2023-11-19 07:57:46,807 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-19 07:57:46,807 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 11 times [2023-11-19 07:57:46,808 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-19 07:57:46,808 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2075965853] [2023-11-19 07:57:46,808 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:57:46,808 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-19 07:57:46,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-19 07:57:46,812 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-19 07:57:46,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-19 07:57:46,815 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-19 07:57:46,816 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-19 07:57:46,816 INFO L85 PathProgramCache]: Analyzing trace with hash -1328709113, now seen corresponding path program 7 times [2023-11-19 07:57:46,816 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-19 07:57:46,817 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1144504279] [2023-11-19 07:57:46,817 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:57:46,817 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-19 07:57:48,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-19 07:57:51,156 INFO L134 CoverageAnalysis]: Checked inductivity of 55555 backedges. 10045 proven. 423 refuted. 0 times theorem prover too weak. 45087 trivial. 0 not checked. [2023-11-19 07:57:51,157 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-19 07:57:51,157 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1144504279] [2023-11-19 07:57:51,157 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1144504279] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-19 07:57:51,157 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1082887764] [2023-11-19 07:57:51,158 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2023-11-19 07:57:51,158 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-19 07:57:51,158 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 [2023-11-19 07:57:51,168 INFO L229 MonitoredProcess]: Starting monitored process 118 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-19 07:57:51,188 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9c775064-aac2-4b1b-8a8f-f4673bf2d9a7/bin/uautomizer-verify-uCwYo4JHxu/z3 -smt2 -in SMTLIB2_COMPLIANT=true (118)] Waiting until timeout for monitored process [2023-11-19 07:57:51,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-19 07:57:51,504 INFO L262 TraceCheckSpWp]: Trace formula consists of 998 conjuncts, 18 conjunts are in the unsatisfiable core [2023-11-19 07:57:51,516 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-19 07:57:51,944 INFO L134 CoverageAnalysis]: Checked inductivity of 55555 backedges. 10045 proven. 414 refuted. 0 times theorem prover too weak. 45096 trivial. 0 not checked. [2023-11-19 07:57:51,945 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-19 07:57:52,500 INFO L134 CoverageAnalysis]: Checked inductivity of 55555 backedges. 10045 proven. 414 refuted. 0 times theorem prover too weak. 45096 trivial. 0 not checked. [2023-11-19 07:57:52,501 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1082887764] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-19 07:57:52,501 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-19 07:57:52,502 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 11, 11] total 27 [2023-11-19 07:57:52,502 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [834237755] [2023-11-19 07:57:52,502 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-19 07:57:52,504 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-19 07:57:52,504 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-19 07:57:52,504 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2023-11-19 07:57:52,505 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=120, Invalid=582, Unknown=0, NotChecked=0, Total=702 [2023-11-19 07:57:52,505 INFO L87 Difference]: Start difference. First operand 680 states and 726 transitions. cyclomatic complexity: 47 Second operand has 27 states, 27 states have (on average 3.7037037037037037) internal successors, (100), 27 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-19 07:57:53,857 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-19 07:57:53,857 INFO L93 Difference]: Finished difference Result 1460 states and 1566 transitions. [2023-11-19 07:57:53,857 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1460 states and 1566 transitions. [2023-11-19 07:57:53,870 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1458 [2023-11-19 07:57:53,881 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1460 states to 1460 states and 1566 transitions. [2023-11-19 07:57:53,881 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1460 [2023-11-19 07:57:53,883 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1460 [2023-11-19 07:57:53,883 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1460 states and 1566 transitions. [2023-11-19 07:57:53,885 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-19 07:57:53,885 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1460 states and 1566 transitions. [2023-11-19 07:57:53,887 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1460 states and 1566 transitions. [2023-11-19 07:57:53,910 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1460 to 1310. [2023-11-19 07:57:53,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1310 states, 1310 states have (on average 1.0580152671755725) internal successors, (1386), 1309 states have internal predecessors, (1386), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-19 07:57:53,918 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1310 states to 1310 states and 1386 transitions. [2023-11-19 07:57:53,918 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1310 states and 1386 transitions. [2023-11-19 07:57:53,919 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2023-11-19 07:57:53,920 INFO L428 stractBuchiCegarLoop]: Abstraction has 1310 states and 1386 transitions. [2023-11-19 07:57:53,920 INFO L335 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2023-11-19 07:57:53,920 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1310 states and 1386 transitions. [2023-11-19 07:57:53,928 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1308 [2023-11-19 07:57:53,928 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-19 07:57:53,928 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-19 07:57:53,947 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-19 07:57:53,948 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [360, 360, 360, 60, 60, 60, 10, 10, 10, 5, 5, 5, 1, 1, 1] [2023-11-19 07:57:53,948 INFO L748 eck$LassoCheckResult]: Stem: 12338#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(14, 2);call #Ultimate.allocInit(12, 3); 12327#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~pre8#1, main_#t~pre7#1, main_#t~pre6#1, main_#t~pre5#1, main_#t~pre4#1, main_~a~0#1, main_~b~0#1, main_~c~0#1, main_~d~0#1, main_~e~0#1, main_~uint32_max~0#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~c~0#1;havoc main_~d~0#1;havoc main_~e~0#1;havoc main_~uint32_max~0#1;main_~uint32_max~0#1 := 4294967295;main_~a~0#1 := 0; 12328#L17-3 [2023-11-19 07:57:53,949 INFO L750 eck$LassoCheckResult]: Loop: 12328#L17-3 assume !!(main_~a~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~b~0#1 := 0; 12329#L18-3 assume !!(main_~b~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~c~0#1 := 0; 13620#L19-3 assume !!(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~d~0#1 := 0; 12336#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 12325#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12326#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12330#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12339#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13632#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13631#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13630#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13629#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13628#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13627#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13626#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13625#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13624#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13623#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13622#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13621#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13601#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13603#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13600#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13597#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 13268#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 13269#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13264#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13265#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13260#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13261#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13256#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13257#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13252#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13253#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13248#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13249#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13244#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13245#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13240#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13241#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13236#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13237#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13233#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13234#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13228#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 13229#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 13224#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13225#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13220#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13221#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13216#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13217#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13212#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13213#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13208#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13209#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13204#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13205#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13200#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13201#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13196#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13197#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13190#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13193#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13188#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13189#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 13184#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 13185#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13180#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13181#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13176#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13177#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13172#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13173#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13168#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13169#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13164#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13165#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13160#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13161#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13156#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13157#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13152#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13153#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13149#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13150#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13144#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 13145#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 13140#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13141#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13136#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13137#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13132#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13133#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13128#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13129#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13124#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13125#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13120#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13121#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13116#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13117#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13112#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13113#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13106#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13109#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13104#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13105#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 13100#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 13101#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13097#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13098#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13093#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13094#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13089#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13090#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13085#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13086#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13081#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13082#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13077#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13078#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13073#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13074#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13069#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13070#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12942#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12943#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12936#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 12937#L20-3 assume !(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12323#L19-2 main_#t~pre6#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre6#1; 12324#L19-3 assume !!(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~d~0#1 := 0; 13554#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 13596#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13595#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13594#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13593#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13592#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13591#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13590#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13589#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13588#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13587#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13586#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13585#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13584#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13583#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13582#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13581#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13561#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13563#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13560#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13557#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 12928#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 12929#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12924#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12925#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12920#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12921#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12916#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12917#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12912#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12913#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12908#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12909#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12904#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12905#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12900#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12901#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12896#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12897#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12893#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12894#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12888#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 12889#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 12884#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12885#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12880#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12881#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12876#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12877#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12872#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12873#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12868#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12869#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12864#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12865#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12860#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12861#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12856#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12857#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12850#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12853#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12848#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12849#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 12844#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 12845#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12840#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12841#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12836#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12837#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12832#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12833#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12828#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12829#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12824#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12825#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12820#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12821#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12816#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12817#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12812#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12813#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12809#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12810#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12804#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 12805#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 12800#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12801#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12796#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12797#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12792#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12793#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12788#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12789#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12784#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12785#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12780#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12781#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12776#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12777#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12772#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12773#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12766#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12769#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12764#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12765#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 12760#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 12761#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12757#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12758#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12753#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12754#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12749#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12750#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12745#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12746#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12741#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12742#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12737#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12738#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12605#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12606#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12600#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12601#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12594#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12595#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12465#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 12466#L20-3 assume !(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12457#L19-2 main_#t~pre6#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre6#1; 12458#L19-3 assume !(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12332#L18-2 main_#t~pre5#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre5#1; 12333#L18-3 assume !!(main_~b~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~c~0#1 := 0; 12337#L19-3 assume !!(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~d~0#1 := 0; 12340#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 13619#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13618#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13617#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13616#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13615#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13614#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13613#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13612#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13611#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13610#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13609#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13608#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13607#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13606#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13605#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13604#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13599#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13602#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13598#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12334#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 12335#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 13266#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13267#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13262#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13263#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13258#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13259#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13254#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13255#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13250#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13251#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13246#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13247#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13242#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13243#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13238#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13239#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13232#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13235#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13230#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13231#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 13226#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 13227#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13222#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13223#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13218#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13219#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13214#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13215#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13210#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13211#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13206#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13207#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13202#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13203#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13198#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13199#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13194#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13195#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13191#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13192#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13186#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 13187#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 13182#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13183#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13178#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13179#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13174#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13175#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13170#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13171#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13166#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13167#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13162#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13163#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13158#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13159#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13154#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13155#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13148#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13151#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13146#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13147#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 13142#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 13143#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13138#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13139#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13134#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13135#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13130#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13131#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13126#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13127#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13122#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13123#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13118#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13119#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13114#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13115#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13110#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13111#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13107#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13108#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13102#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 13103#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 12933#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13099#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13095#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13096#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13091#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13092#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13087#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13088#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13083#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13084#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13079#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13080#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13075#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13076#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13071#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13072#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12941#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13068#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12939#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12940#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 12931#L20-3 assume !(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12932#L19-2 main_#t~pre6#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre6#1; 13580#L19-3 assume !!(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~d~0#1 := 0; 12455#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 13579#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13578#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13577#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13576#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13575#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13574#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13573#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13572#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13571#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13570#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13569#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13568#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13567#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13566#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13565#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13564#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13559#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13562#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13558#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13556#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 13555#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 12926#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12927#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12922#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12923#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12918#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12919#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12914#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12915#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12910#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12911#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12906#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12907#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12902#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12903#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12898#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12899#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12892#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12895#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12890#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12891#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 12886#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 12887#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12882#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12883#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12878#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12879#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12874#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12875#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12870#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12871#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12866#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12867#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12862#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12863#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12858#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12859#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12854#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12855#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12851#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12852#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12846#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 12847#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 12842#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12843#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12838#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12839#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12834#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12835#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12830#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12831#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12826#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12827#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12822#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12823#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12818#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12819#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12814#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12815#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12808#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12811#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12806#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12807#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 12802#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 12803#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12798#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12799#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12794#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12795#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12790#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12791#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12786#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12787#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12782#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12783#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12778#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12779#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12774#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12775#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12770#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12771#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12767#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12768#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12762#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 12763#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 12463#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12759#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12755#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12756#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12751#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12752#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12747#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12748#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12743#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12744#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12739#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12740#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12735#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12736#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12603#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12604#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12469#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12597#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12467#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12468#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 12461#L20-3 assume !(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12462#L19-2 main_#t~pre6#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre6#1; 12453#L19-3 assume !(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12454#L18-2 main_#t~pre5#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre5#1; 13553#L18-3 assume !!(main_~b~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~c~0#1 := 0; 13552#L19-3 assume !!(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~d~0#1 := 0; 13551#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 13550#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13549#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13548#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13547#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13546#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13545#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13544#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13543#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13542#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13541#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13540#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13539#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13538#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13537#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13536#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13535#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13533#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13534#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13532#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13531#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 13530#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 13529#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13528#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13527#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13526#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13525#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13524#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13523#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13522#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13521#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13520#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13519#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13518#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13517#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13516#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13515#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13514#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13512#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13513#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13511#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13510#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 13509#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 13508#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13507#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13506#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13505#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13504#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13503#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13502#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13501#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13500#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13499#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13498#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13497#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13496#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13495#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13494#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13493#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13491#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13492#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13490#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13489#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 13488#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 13487#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13486#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13485#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13484#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13483#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13482#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13481#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13480#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13479#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13478#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13477#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13476#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13475#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13474#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13473#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13472#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13470#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13471#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13469#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13468#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 13467#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 13466#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13465#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13464#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13463#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13462#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13461#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13460#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13459#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13458#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13457#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13456#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13455#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13454#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13453#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13452#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13451#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13449#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13450#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13448#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13447#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 13446#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 13426#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13445#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13444#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13443#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13442#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13441#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13440#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13439#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13438#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13437#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13436#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13435#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13434#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13433#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13432#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13431#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13429#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13430#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13428#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13427#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 13425#L20-3 assume !(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13424#L19-2 main_#t~pre6#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre6#1; 13423#L19-3 assume !!(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~d~0#1 := 0; 13295#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 13422#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13421#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13420#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13419#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13418#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13417#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13416#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13415#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13414#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13413#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13412#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13411#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13410#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13409#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13408#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13407#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13405#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13406#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13404#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13403#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 13402#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 13401#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13400#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13399#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13398#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13397#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13396#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13395#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13394#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13393#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13392#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13391#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13390#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13389#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13388#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13387#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13386#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13384#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13385#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13383#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13382#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 13381#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 13380#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13379#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13378#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13377#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13376#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13375#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13374#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13373#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13372#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13371#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13370#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13369#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13368#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13367#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13366#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13365#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13363#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13364#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13362#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13361#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 13360#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 13359#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13358#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13357#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13356#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13355#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13354#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13353#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13352#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13351#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13350#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13349#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13348#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13347#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13346#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13345#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13344#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13342#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13343#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13341#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13340#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 13339#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 13338#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13337#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13336#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13335#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13334#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13333#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13332#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13331#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13330#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13329#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13328#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13327#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13326#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13325#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13324#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13323#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13321#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13322#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13320#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13319#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 13318#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 13298#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13317#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13316#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13315#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13314#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13313#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13312#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13311#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13310#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13309#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13308#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13307#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13306#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13305#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13304#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13303#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13301#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13302#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13300#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13299#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 13297#L20-3 assume !(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13296#L19-2 main_#t~pre6#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre6#1; 13294#L19-3 assume !(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13293#L18-2 main_#t~pre5#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre5#1; 13292#L18-3 assume !!(main_~b~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~c~0#1 := 0; 13291#L19-3 assume !!(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~d~0#1 := 0; 13290#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 13289#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13288#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13287#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13286#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13285#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13284#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13283#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13282#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13281#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13280#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13279#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13278#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13277#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13276#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13275#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13274#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13272#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13273#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13271#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13270#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 13067#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 13066#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13065#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13064#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13063#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13062#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13061#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13060#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13059#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13058#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13057#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13056#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13055#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13054#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13053#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13052#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13051#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13049#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13050#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13048#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13047#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 13046#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 13045#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13044#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13043#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13042#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13041#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13040#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13039#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13038#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13037#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13036#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13035#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13034#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13033#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13032#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13031#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13030#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13028#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13029#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13027#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13026#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 13025#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 13024#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13023#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13022#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13021#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13020#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13019#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13018#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13017#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13016#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13015#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13014#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13013#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13012#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13011#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13010#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13009#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13007#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13008#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13006#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13005#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 13004#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 13003#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 13002#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 13001#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 13000#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12999#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12998#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12997#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12996#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12995#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12994#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12993#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12992#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12991#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12990#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12989#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12988#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12986#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12987#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12985#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12984#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 12983#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 12963#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12982#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12981#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12980#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12979#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12978#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12977#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12976#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12975#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12974#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12973#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12972#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12971#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12970#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12969#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12968#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12966#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12967#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12965#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12964#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 12962#L20-3 assume !(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12961#L19-2 main_#t~pre6#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre6#1; 12960#L19-3 assume !!(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~d~0#1 := 0; 12627#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 12959#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12958#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12957#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12956#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12955#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12954#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12953#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12952#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12951#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12950#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12949#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12948#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12947#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12946#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12945#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12944#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12935#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12938#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12934#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12930#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 12734#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 12733#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12732#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12731#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12730#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12729#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12728#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12727#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12726#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12725#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12724#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12723#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12722#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12721#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12720#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12719#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12718#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12716#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12717#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12715#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12714#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 12713#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 12712#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12711#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12710#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12709#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12708#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12707#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12706#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12705#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12704#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12703#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12702#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12701#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12700#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12699#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12698#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12697#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12695#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12696#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12694#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12693#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 12692#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 12691#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12690#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12689#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12688#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12687#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12686#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12685#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12684#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12683#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12682#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12681#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12680#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12679#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12678#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12677#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12676#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12674#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12675#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12673#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12672#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 12671#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 12670#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12669#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12668#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12667#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12666#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12665#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12664#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12663#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12662#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12661#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12660#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12659#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12658#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12657#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12656#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12655#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12653#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12654#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12652#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12651#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 12650#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 12630#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12649#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12648#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12647#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12646#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12645#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12644#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12643#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12642#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12641#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12640#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12639#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12638#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12637#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12636#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12635#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12633#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12634#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12632#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12631#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 12629#L20-3 assume !(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12628#L19-2 main_#t~pre6#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre6#1; 12626#L19-3 assume !(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12625#L18-2 main_#t~pre5#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre5#1; 12624#L18-3 assume !!(main_~b~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~c~0#1 := 0; 12342#L19-3 assume !!(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~d~0#1 := 0; 12623#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 12622#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12621#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12620#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12619#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12618#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12617#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12616#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12615#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12614#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12613#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12612#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12611#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12610#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12609#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12608#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12607#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12599#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12602#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12598#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12596#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 12593#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 12592#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12591#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12590#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12589#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12588#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12587#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12586#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12585#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12584#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12583#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12582#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12581#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12580#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12579#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12578#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12577#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12575#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12576#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12574#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12573#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 12572#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 12571#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12570#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12569#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12568#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12567#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12566#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12565#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12564#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12563#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12562#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12561#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12560#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12559#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12558#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12557#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12556#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12554#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12555#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12553#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12552#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 12551#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 12550#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12549#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12548#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12547#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12546#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12545#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12544#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12543#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12542#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12541#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12540#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12539#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12538#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12537#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12536#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12535#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12533#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12534#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12532#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12531#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 12530#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 12529#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12528#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12527#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12526#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12525#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12524#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12523#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12522#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12521#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12520#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12519#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12518#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12517#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12516#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12515#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12514#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12512#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12513#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12511#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12510#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 12509#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 12489#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12508#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12507#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12506#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12505#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12504#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12503#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12502#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12501#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12500#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12499#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12498#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12497#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12496#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12495#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12494#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12492#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12493#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12491#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12490#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 12488#L20-3 assume !(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12487#L19-2 main_#t~pre6#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre6#1; 12486#L19-3 assume !!(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~d~0#1 := 0; 12345#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 12485#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12484#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12483#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12482#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12481#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12480#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12479#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12478#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12477#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12476#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12475#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12474#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12473#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12472#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12471#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12470#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12460#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12464#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12459#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12456#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 12452#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 12451#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12450#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12449#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12448#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12447#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12446#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12445#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12444#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12443#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12442#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12441#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12440#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12439#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12438#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12437#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12436#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12434#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12435#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12433#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12432#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 12431#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 12430#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12429#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12428#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12427#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12426#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12425#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12424#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12423#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12422#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12421#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12420#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12419#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12418#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12417#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12416#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12415#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12413#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12414#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12412#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12411#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 12410#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 12409#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12408#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12407#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12406#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12405#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12404#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12403#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12402#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12401#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12400#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12399#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12398#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12397#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12396#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12395#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12394#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12392#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12393#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12391#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12390#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 12389#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 12388#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12387#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12386#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12385#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12384#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12383#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12382#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12381#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12380#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12379#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12378#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12377#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12376#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12375#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12374#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12373#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12371#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12372#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12370#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12369#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 12368#L20-3 assume !!(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296);main_~e~0#1 := 0; 12348#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12367#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12366#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12365#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12364#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12363#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12362#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12361#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12360#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12359#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12358#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12357#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12356#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12355#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12354#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12353#L21-3 assume !!(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12351#L22 assume !((((main_~a~0#1 % 4294967296 == main_~b~0#1 % 4294967296 && main_~b~0#1 % 4294967296 == main_~c~0#1 % 4294967296) && main_~c~0#1 % 4294967296 == main_~d~0#1 % 4294967296) && main_~d~0#1 % 4294967296 == main_~e~0#1 % 4294967296) && main_~e~0#1 % 4294967296 == (main_~uint32_max~0#1 - 2) % 4294967296); 12352#L21-2 main_#t~pre8#1 := 1 + main_~e~0#1;main_~e~0#1 := 1 + main_~e~0#1;havoc main_#t~pre8#1; 12350#L21-3 assume !(main_~e~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12349#L20-2 main_#t~pre7#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre7#1; 12347#L20-3 assume !(main_~d~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12346#L19-2 main_#t~pre6#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre6#1; 12344#L19-3 assume !(main_~c~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12343#L18-2 main_#t~pre5#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre5#1; 12341#L18-3 assume !(main_~b~0#1 % 4294967296 < (main_~uint32_max~0#1 - 1) % 4294967296); 12331#L17-2 main_#t~pre4#1 := 1 + main_~a~0#1;main_~a~0#1 := 1 + main_~a~0#1;havoc main_#t~pre4#1; 12328#L17-3 [2023-11-19 07:57:53,952 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-19 07:57:53,952 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 12 times [2023-11-19 07:57:53,952 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-19 07:57:53,953 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [380666527] [2023-11-19 07:57:53,953 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:57:53,953 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-19 07:57:53,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-19 07:57:53,956 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-19 07:57:53,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-19 07:57:53,959 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-19 07:57:53,959 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-19 07:57:53,960 INFO L85 PathProgramCache]: Analyzing trace with hash 597898179, now seen corresponding path program 8 times [2023-11-19 07:57:53,960 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-19 07:57:53,960 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [135139560] [2023-11-19 07:57:53,960 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-19 07:57:53,960 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms