./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test7-1.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 527bcce2 Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test7-1.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 22b4144b7005899e18ff8135fa52f12863f7106dbe1ddb808d25d8593c5f8fc4 --- Real Ultimate output --- This is Ultimate 0.2.3-dev-527bcce [2023-11-21 22:16:51,725 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-21 22:16:51,843 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/config/svcomp-Termination-32bit-Automizer_Default.epf [2023-11-21 22:16:51,853 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-21 22:16:51,854 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-21 22:16:51,891 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-21 22:16:51,891 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-21 22:16:51,892 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-21 22:16:51,893 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2023-11-21 22:16:51,897 INFO L153 SettingsManager]: * Use memory slicer=true [2023-11-21 22:16:51,898 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-21 22:16:51,898 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-21 22:16:51,899 INFO L153 SettingsManager]: * Use SBE=true [2023-11-21 22:16:51,901 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-21 22:16:51,901 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-21 22:16:51,902 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-21 22:16:51,902 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-21 22:16:51,902 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-21 22:16:51,903 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-21 22:16:51,903 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-21 22:16:51,904 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-21 22:16:51,904 INFO L153 SettingsManager]: * sizeof long=4 [2023-11-21 22:16:51,905 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-21 22:16:51,905 INFO L153 SettingsManager]: * sizeof POINTER=4 [2023-11-21 22:16:51,905 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-21 22:16:51,906 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-21 22:16:51,906 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-21 22:16:51,906 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-21 22:16:51,907 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-21 22:16:51,907 INFO L153 SettingsManager]: * sizeof long double=12 [2023-11-21 22:16:51,908 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-21 22:16:51,909 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-21 22:16:51,909 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-21 22:16:51,909 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-21 22:16:51,909 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-21 22:16:51,910 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-21 22:16:51,910 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-21 22:16:51,910 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-21 22:16:51,911 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 22b4144b7005899e18ff8135fa52f12863f7106dbe1ddb808d25d8593c5f8fc4 [2023-11-21 22:16:52,241 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-21 22:16:52,273 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-21 22:16:52,277 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-21 22:16:52,278 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-21 22:16:52,279 INFO L274 PluginConnector]: CDTParser initialized [2023-11-21 22:16:52,281 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/../../sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test7-1.i [2023-11-21 22:16:55,566 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-21 22:16:55,903 INFO L384 CDTParser]: Found 1 translation units. [2023-11-21 22:16:55,903 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test7-1.i [2023-11-21 22:16:55,933 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/data/97f2457c7/2f56ae23b20046bf9530f4d2684ff7cb/FLAGb7a815cda [2023-11-21 22:16:55,953 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/data/97f2457c7/2f56ae23b20046bf9530f4d2684ff7cb [2023-11-21 22:16:55,959 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-21 22:16:55,962 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-21 22:16:55,965 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-21 22:16:55,966 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-21 22:16:55,971 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-21 22:16:55,972 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.11 10:16:55" (1/1) ... [2023-11-21 22:16:55,973 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2022fdf0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 10:16:55, skipping insertion in model container [2023-11-21 22:16:55,974 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.11 10:16:55" (1/1) ... [2023-11-21 22:16:56,061 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-21 22:16:56,629 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-21 22:16:56,652 INFO L202 MainTranslator]: Completed pre-run [2023-11-21 22:16:56,803 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-21 22:16:56,840 WARN L675 CHandler]: The function memcmp is called, but not defined or handled by StandardFunctionHandler. [2023-11-21 22:16:56,848 INFO L206 MainTranslator]: Completed translation [2023-11-21 22:16:56,849 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 10:16:56 WrapperNode [2023-11-21 22:16:56,849 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-21 22:16:56,850 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-21 22:16:56,851 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-21 22:16:56,851 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-21 22:16:56,859 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 10:16:56" (1/1) ... [2023-11-21 22:16:56,912 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 10:16:56" (1/1) ... [2023-11-21 22:16:57,021 INFO L138 Inliner]: procedures = 176, calls = 280, calls flagged for inlining = 5, calls inlined = 4, statements flattened = 1335 [2023-11-21 22:16:57,030 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-21 22:16:57,030 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-21 22:16:57,031 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-21 22:16:57,031 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-21 22:16:57,055 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 10:16:56" (1/1) ... [2023-11-21 22:16:57,055 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 10:16:56" (1/1) ... [2023-11-21 22:16:57,091 INFO L184 PluginConnector]: Executing the observer HeapSplitter from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 10:16:56" (1/1) ... [2023-11-21 22:16:57,193 WARN L106 HeapSplitter]: Omit memory slicing because it failed with the following exception: Unsupported: Procedure #Ultimate.C_memset is not part of the Ultimate memory model but has specification other that is not a ModifiesSpecification [2023-11-21 22:16:57,194 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 10:16:56" (1/1) ... [2023-11-21 22:16:57,194 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 10:16:56" (1/1) ... [2023-11-21 22:16:57,244 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 10:16:56" (1/1) ... [2023-11-21 22:16:57,260 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 10:16:56" (1/1) ... [2023-11-21 22:16:57,266 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 10:16:56" (1/1) ... [2023-11-21 22:16:57,273 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 10:16:56" (1/1) ... [2023-11-21 22:16:57,286 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-21 22:16:57,287 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-21 22:16:57,287 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-21 22:16:57,287 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-21 22:16:57,288 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 10:16:56" (1/1) ... [2023-11-21 22:16:57,294 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-21 22:16:57,317 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 [2023-11-21 22:16:57,350 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-21 22:16:57,380 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-21 22:16:57,404 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2023-11-21 22:16:57,404 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2023-11-21 22:16:57,405 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2023-11-21 22:16:57,405 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2023-11-21 22:16:57,405 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2023-11-21 22:16:57,405 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2023-11-21 22:16:57,405 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2023-11-21 22:16:57,405 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2023-11-21 22:16:57,406 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp [2023-11-21 22:16:57,406 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2023-11-21 22:16:57,406 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-11-21 22:16:57,406 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2023-11-21 22:16:57,406 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-21 22:16:57,406 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-21 22:16:57,668 INFO L240 CfgBuilder]: Building ICFG [2023-11-21 22:16:57,671 INFO L266 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-21 22:16:57,676 WARN L820 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-21 22:16:59,656 INFO L281 CfgBuilder]: Performing block encoding [2023-11-21 22:16:59,689 INFO L303 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-21 22:16:59,689 INFO L308 CfgBuilder]: Removed 63 assume(true) statements. [2023-11-21 22:16:59,691 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.11 10:16:59 BoogieIcfgContainer [2023-11-21 22:16:59,691 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-21 22:16:59,692 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-21 22:16:59,693 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-21 22:16:59,697 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-21 22:16:59,698 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-21 22:16:59,698 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 21.11 10:16:55" (1/3) ... [2023-11-21 22:16:59,699 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@10d58ea2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 21.11 10:16:59, skipping insertion in model container [2023-11-21 22:16:59,699 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-21 22:16:59,699 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 10:16:56" (2/3) ... [2023-11-21 22:16:59,702 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@10d58ea2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 21.11 10:16:59, skipping insertion in model container [2023-11-21 22:16:59,702 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-21 22:16:59,703 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.11 10:16:59" (3/3) ... [2023-11-21 22:16:59,704 INFO L332 chiAutomizerObserver]: Analyzing ICFG uthash_JEN_test7-1.i [2023-11-21 22:16:59,783 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-21 22:16:59,783 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-21 22:16:59,783 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-21 22:16:59,783 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-21 22:16:59,783 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-21 22:16:59,783 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-21 22:16:59,783 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-21 22:16:59,784 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-21 22:16:59,790 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 355 states, 350 states have (on average 1.6942857142857144) internal successors, (593), 350 states have internal predecessors, (593), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-21 22:16:59,838 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 343 [2023-11-21 22:16:59,838 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-21 22:16:59,839 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-21 22:16:59,846 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-21 22:16:59,846 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2023-11-21 22:16:59,847 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-21 22:16:59,848 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 355 states, 350 states have (on average 1.6942857142857144) internal successors, (593), 350 states have internal predecessors, (593), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-21 22:16:59,864 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 343 [2023-11-21 22:16:59,864 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-21 22:16:59,864 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-21 22:16:59,865 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-21 22:16:59,865 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2023-11-21 22:16:59,874 INFO L748 eck$LassoCheckResult]: Stem: 218#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 231#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 306#L715-4true [2023-11-21 22:16:59,874 INFO L750 eck$LassoCheckResult]: Loop: 306#L715-4true call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 287#L715-1true assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 41#L717true assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; 143#L717-2true call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 263#L722-269true assume !true; 86#L715-3true call main_#t~mem3#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 306#L715-4true [2023-11-21 22:16:59,880 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-21 22:16:59,884 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 1 times [2023-11-21 22:16:59,895 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-21 22:16:59,897 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1372294118] [2023-11-21 22:16:59,898 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:16:59,898 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-21 22:17:00,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-21 22:17:00,048 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-21 22:17:00,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-21 22:17:00,138 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-21 22:17:00,140 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-21 22:17:00,141 INFO L85 PathProgramCache]: Analyzing trace with hash 1336145772, now seen corresponding path program 1 times [2023-11-21 22:17:00,141 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-21 22:17:00,141 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1980447331] [2023-11-21 22:17:00,141 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:17:00,141 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-21 22:17:00,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-21 22:17:00,221 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-21 22:17:00,222 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1980447331] [2023-11-21 22:17:00,222 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unsupported non-linear arithmetic [2023-11-21 22:17:00,222 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [374560178] [2023-11-21 22:17:00,223 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:17:00,223 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-21 22:17:00,223 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 [2023-11-21 22:17:00,227 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-21 22:17:00,252 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2023-11-21 22:17:00,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-21 22:17:00,377 INFO L262 TraceCheckSpWp]: Trace formula consists of 72 conjuncts, 1 conjunts are in the unsatisfiable core [2023-11-21 22:17:00,379 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-21 22:17:00,399 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-21 22:17:00,399 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-21 22:17:00,401 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [374560178] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-21 22:17:00,401 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-21 22:17:00,402 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2023-11-21 22:17:00,403 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [343206931] [2023-11-21 22:17:00,404 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-21 22:17:00,409 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-21 22:17:00,410 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-21 22:17:00,456 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2023-11-21 22:17:00,457 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2023-11-21 22:17:00,462 INFO L87 Difference]: Start difference. First operand has 355 states, 350 states have (on average 1.6942857142857144) internal successors, (593), 350 states have internal predecessors, (593), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 3.0) internal successors, (6), 2 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-21 22:17:00,519 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-21 22:17:00,520 INFO L93 Difference]: Finished difference Result 352 states and 525 transitions. [2023-11-21 22:17:00,521 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 352 states and 525 transitions. [2023-11-21 22:17:00,539 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 337 [2023-11-21 22:17:00,557 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 352 states to 344 states and 517 transitions. [2023-11-21 22:17:00,558 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 344 [2023-11-21 22:17:00,562 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 344 [2023-11-21 22:17:00,562 INFO L73 IsDeterministic]: Start isDeterministic. Operand 344 states and 517 transitions. [2023-11-21 22:17:00,568 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-21 22:17:00,569 INFO L218 hiAutomatonCegarLoop]: Abstraction has 344 states and 517 transitions. [2023-11-21 22:17:00,595 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 344 states and 517 transitions. [2023-11-21 22:17:00,635 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 344 to 344. [2023-11-21 22:17:00,637 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 344 states, 340 states have (on average 1.5029411764705882) internal successors, (511), 339 states have internal predecessors, (511), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-21 22:17:00,639 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 344 states to 344 states and 517 transitions. [2023-11-21 22:17:00,640 INFO L240 hiAutomatonCegarLoop]: Abstraction has 344 states and 517 transitions. [2023-11-21 22:17:00,641 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2023-11-21 22:17:00,645 INFO L428 stractBuchiCegarLoop]: Abstraction has 344 states and 517 transitions. [2023-11-21 22:17:00,645 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-21 22:17:00,645 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 344 states and 517 transitions. [2023-11-21 22:17:00,648 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 337 [2023-11-21 22:17:00,648 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-21 22:17:00,648 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-21 22:17:00,650 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-21 22:17:00,650 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-21 22:17:00,650 INFO L748 eck$LassoCheckResult]: Stem: 1027#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 1028#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 894#L715-4 [2023-11-21 22:17:00,653 INFO L750 eck$LassoCheckResult]: Loop: 894#L715-4 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1066#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 821#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 822#L717-2 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 967#L722-269 havoc main_~_ha_hashv~0#1; 1054#L722-176 goto; 1002#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 851#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 852#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 777#L722-73 assume main_#t~switch31#1;call main_#t~mem32#1 := read~int(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem32#1 % 256 % 4294967296);havoc main_#t~mem32#1; 778#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 895#L722-76 assume main_#t~switch31#1;call main_#t~mem33#1 := read~int(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem33#1 % 256 % 4294967296);havoc main_#t~mem33#1; 896#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 938#L722-79 assume main_#t~switch31#1;call main_#t~mem34#1 := read~int(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem34#1 % 256 % 4294967296);havoc main_#t~mem34#1; 939#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 1006#L722-82 assume main_#t~switch31#1;call main_#t~mem35#1 := read~int(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);havoc main_#t~mem35#1; 823#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 824#L722-85 assume main_#t~switch31#1;call main_#t~mem36#1 := read~int(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);havoc main_#t~mem36#1; 855#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 846#L722-88 assume !main_#t~switch31#1; 847#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 1043#L722-91 assume main_#t~switch31#1;call main_#t~mem38#1 := read~int(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem38#1; 765#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 766#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 767#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 768#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 985#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 798#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 799#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 930#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 1052#L722-105 havoc main_#t~switch31#1; 1041#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1037#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 920#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1030#L722-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 948#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 949#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 750#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 968#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 776#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 743#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 744#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 838#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 860#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 987#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 807#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 910#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 911#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 980#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 735#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 736#L722-170 goto; 992#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 960#L722-173 goto; 961#L722-175 goto; 1025#L722-266 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 1046#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 1048#L722-194 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 830#L722-193 goto; 831#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 862#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 863#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 943#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 955#L722-202 goto; 839#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 840#L722-205 assume main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem89#1.base, 12 + main_#t~mem89#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset; 990#L722-207 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 854#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 756#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 757#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 918#L722-260 goto; 993#L722-262 havoc main_~_ha_bkt~0#1; 965#L722-263 goto; 966#L722-265 goto; 885#L722-267 havoc main_~_ha_hashv~0#1; 759#L722-268 goto; 760#L715-3 call main_#t~mem3#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 894#L715-4 [2023-11-21 22:17:00,653 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-21 22:17:00,653 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 2 times [2023-11-21 22:17:00,654 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-21 22:17:00,654 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2014904329] [2023-11-21 22:17:00,654 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:17:00,654 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-21 22:17:00,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-21 22:17:00,674 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-21 22:17:00,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-21 22:17:00,696 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-21 22:17:00,697 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-21 22:17:00,697 INFO L85 PathProgramCache]: Analyzing trace with hash -280030059, now seen corresponding path program 1 times [2023-11-21 22:17:00,697 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-21 22:17:00,697 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [566139034] [2023-11-21 22:17:00,698 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:17:00,698 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-21 22:17:00,762 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-21 22:17:00,763 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [280920258] [2023-11-21 22:17:00,763 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:17:00,763 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-21 22:17:00,763 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 [2023-11-21 22:17:00,810 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-21 22:17:00,844 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2023-11-21 22:17:01,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-21 22:17:01,187 INFO L262 TraceCheckSpWp]: Trace formula consists of 546 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-21 22:17:01,191 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-21 22:17:01,237 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-21 22:17:01,237 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-21 22:17:01,238 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-21 22:17:01,238 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [566139034] [2023-11-21 22:17:01,238 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-21 22:17:01,238 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [280920258] [2023-11-21 22:17:01,238 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [280920258] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-21 22:17:01,239 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-21 22:17:01,239 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-21 22:17:01,239 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [220276979] [2023-11-21 22:17:01,239 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-21 22:17:01,240 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-21 22:17:01,240 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-21 22:17:01,241 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-11-21 22:17:01,241 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-11-21 22:17:01,241 INFO L87 Difference]: Start difference. First operand 344 states and 517 transitions. cyclomatic complexity: 176 Second operand has 3 states, 3 states have (on average 25.333333333333332) internal successors, (76), 3 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-21 22:17:01,371 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-21 22:17:01,372 INFO L93 Difference]: Finished difference Result 365 states and 538 transitions. [2023-11-21 22:17:01,372 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 365 states and 538 transitions. [2023-11-21 22:17:01,378 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 358 [2023-11-21 22:17:01,383 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 365 states to 365 states and 538 transitions. [2023-11-21 22:17:01,383 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 365 [2023-11-21 22:17:01,384 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 365 [2023-11-21 22:17:01,384 INFO L73 IsDeterministic]: Start isDeterministic. Operand 365 states and 538 transitions. [2023-11-21 22:17:01,390 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-21 22:17:01,391 INFO L218 hiAutomatonCegarLoop]: Abstraction has 365 states and 538 transitions. [2023-11-21 22:17:01,392 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 365 states and 538 transitions. [2023-11-21 22:17:01,416 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 365 to 364. [2023-11-21 22:17:01,422 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 364 states, 360 states have (on average 1.475) internal successors, (531), 359 states have internal predecessors, (531), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-21 22:17:01,425 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 364 states to 364 states and 537 transitions. [2023-11-21 22:17:01,425 INFO L240 hiAutomatonCegarLoop]: Abstraction has 364 states and 537 transitions. [2023-11-21 22:17:01,426 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-11-21 22:17:01,427 INFO L428 stractBuchiCegarLoop]: Abstraction has 364 states and 537 transitions. [2023-11-21 22:17:01,427 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-21 22:17:01,427 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 364 states and 537 transitions. [2023-11-21 22:17:01,430 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 357 [2023-11-21 22:17:01,430 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-21 22:17:01,430 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-21 22:17:01,434 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-21 22:17:01,435 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-21 22:17:01,435 INFO L748 eck$LassoCheckResult]: Stem: 1969#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 1970#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1835#L715-4 [2023-11-21 22:17:01,435 INFO L750 eck$LassoCheckResult]: Loop: 1835#L715-4 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2009#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 1760#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1761#L717-2 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 1909#L722-269 havoc main_~_ha_hashv~0#1; 1997#L722-176 goto; 1944#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 1792#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 1793#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 1715#L722-73 assume main_#t~switch31#1;call main_#t~mem32#1 := read~int(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem32#1 % 256 % 4294967296);havoc main_#t~mem32#1; 1716#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 1836#L722-76 assume main_#t~switch31#1;call main_#t~mem33#1 := read~int(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem33#1 % 256 % 4294967296);havoc main_#t~mem33#1; 1837#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 1880#L722-79 assume main_#t~switch31#1;call main_#t~mem34#1 := read~int(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem34#1 % 256 % 4294967296);havoc main_#t~mem34#1; 1881#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 1948#L722-82 assume main_#t~switch31#1;call main_#t~mem35#1 := read~int(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);havoc main_#t~mem35#1; 1764#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 1765#L722-85 assume main_#t~switch31#1;call main_#t~mem36#1 := read~int(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);havoc main_#t~mem36#1; 1796#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 1787#L722-88 assume main_#t~switch31#1;call main_#t~mem37#1 := read~int(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);havoc main_#t~mem37#1; 1788#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 1985#L722-91 assume main_#t~switch31#1;call main_#t~mem38#1 := read~int(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem38#1; 1705#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 1706#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 1707#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 1708#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 1926#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 1742#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 1743#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 1995#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 1996#L722-105 havoc main_#t~switch31#1; 1983#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1981#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 1862#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1973#L722-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 1890#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1891#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 1692#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1913#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 1721#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1686#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 1687#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1779#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 1805#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1929#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 1752#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1856#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 1857#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1927#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 1681#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 1682#L722-170 goto; 1934#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 1902#L722-173 goto; 1903#L722-175 goto; 1967#L722-266 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 1988#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 1990#L722-194 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 1769#L722-193 goto; 1770#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 1800#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 1801#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 1885#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 1896#L722-202 goto; 1780#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 1781#L722-205 assume main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem89#1.base, 12 + main_#t~mem89#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset; 1931#L722-207 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 1795#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 1696#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 1697#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 1859#L722-260 goto; 1935#L722-262 havoc main_~_ha_bkt~0#1; 1907#L722-263 goto; 1908#L722-265 goto; 1824#L722-267 havoc main_~_ha_hashv~0#1; 1699#L722-268 goto; 1700#L715-3 call main_#t~mem3#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 1835#L715-4 [2023-11-21 22:17:01,437 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-21 22:17:01,437 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 3 times [2023-11-21 22:17:01,437 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-21 22:17:01,438 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [658057695] [2023-11-21 22:17:01,438 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:17:01,438 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-21 22:17:01,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-21 22:17:01,475 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-21 22:17:01,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-21 22:17:01,514 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-21 22:17:01,519 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-21 22:17:01,519 INFO L85 PathProgramCache]: Analyzing trace with hash -1540947309, now seen corresponding path program 1 times [2023-11-21 22:17:01,519 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-21 22:17:01,519 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1354265437] [2023-11-21 22:17:01,520 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:17:01,520 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-21 22:17:01,594 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-21 22:17:01,594 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1417141080] [2023-11-21 22:17:01,594 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:17:01,594 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-21 22:17:01,595 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 [2023-11-21 22:17:01,600 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-21 22:17:01,624 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2023-11-21 22:17:01,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-21 22:17:01,908 INFO L262 TraceCheckSpWp]: Trace formula consists of 552 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-21 22:17:01,912 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-21 22:17:01,952 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-21 22:17:01,952 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-21 22:17:01,953 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-21 22:17:01,953 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1354265437] [2023-11-21 22:17:01,953 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-21 22:17:01,954 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1417141080] [2023-11-21 22:17:01,954 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1417141080] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-21 22:17:01,954 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-21 22:17:01,955 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-11-21 22:17:01,956 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [814013062] [2023-11-21 22:17:01,956 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-21 22:17:01,956 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-21 22:17:01,958 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-21 22:17:01,958 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-21 22:17:01,959 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-11-21 22:17:01,959 INFO L87 Difference]: Start difference. First operand 364 states and 537 transitions. cyclomatic complexity: 176 Second operand has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-21 22:17:02,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-21 22:17:02,065 INFO L93 Difference]: Finished difference Result 351 states and 517 transitions. [2023-11-21 22:17:02,066 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 351 states and 517 transitions. [2023-11-21 22:17:02,069 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 344 [2023-11-21 22:17:02,104 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 351 states to 351 states and 517 transitions. [2023-11-21 22:17:02,105 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 351 [2023-11-21 22:17:02,106 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 351 [2023-11-21 22:17:02,106 INFO L73 IsDeterministic]: Start isDeterministic. Operand 351 states and 517 transitions. [2023-11-21 22:17:02,107 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-21 22:17:02,107 INFO L218 hiAutomatonCegarLoop]: Abstraction has 351 states and 517 transitions. [2023-11-21 22:17:02,110 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 351 states and 517 transitions. [2023-11-21 22:17:02,118 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 351 to 350. [2023-11-21 22:17:02,120 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 350 states, 346 states have (on average 1.4739884393063585) internal successors, (510), 345 states have internal predecessors, (510), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-21 22:17:02,122 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 350 states to 350 states and 516 transitions. [2023-11-21 22:17:02,123 INFO L240 hiAutomatonCegarLoop]: Abstraction has 350 states and 516 transitions. [2023-11-21 22:17:02,123 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-21 22:17:02,124 INFO L428 stractBuchiCegarLoop]: Abstraction has 350 states and 516 transitions. [2023-11-21 22:17:02,124 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-21 22:17:02,125 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 350 states and 516 transitions. [2023-11-21 22:17:02,127 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 343 [2023-11-21 22:17:02,127 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-21 22:17:02,128 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-21 22:17:02,129 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-21 22:17:02,129 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-21 22:17:02,130 INFO L748 eck$LassoCheckResult]: Stem: 2918#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 2919#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2783#L715-4 [2023-11-21 22:17:02,130 INFO L750 eck$LassoCheckResult]: Loop: 2783#L715-4 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2959#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 2708#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 2709#L717-2 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 2857#L722-269 havoc main_~_ha_hashv~0#1; 2946#L722-176 goto; 2893#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 2740#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 2741#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 2664#L722-73 assume !main_#t~switch31#1; 2665#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 2784#L722-76 assume !main_#t~switch31#1; 2785#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 2828#L722-79 assume !main_#t~switch31#1; 2829#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 2897#L722-82 assume !main_#t~switch31#1; 2712#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 2713#L722-85 assume !main_#t~switch31#1; 2744#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 2735#L722-88 assume !main_#t~switch31#1; 2736#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 2934#L722-91 assume !main_#t~switch31#1; 2654#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 2655#L722-94 assume !main_#t~switch31#1; 2656#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 2657#L722-97 assume !main_#t~switch31#1; 2966#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 2967#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 2691#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 2944#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 2945#L722-105 havoc main_#t~switch31#1; 2932#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2930#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 2810#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2922#L722-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 2838#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2839#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 2641#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2861#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 2669#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2635#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 2636#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2727#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 2751#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2878#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 2698#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2802#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 2803#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2874#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 2628#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 2629#L722-170 goto; 2889#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 2850#L722-173 goto; 2851#L722-175 goto; 2916#L722-266 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 2937#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 2939#L722-194 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 2719#L722-193 goto; 2720#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 2753#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 2754#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 2836#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 2845#L722-202 goto; 2728#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 2729#L722-205 assume main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem89#1.base, 12 + main_#t~mem89#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset; 2881#L722-207 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 2743#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 2647#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 2648#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 2807#L722-260 goto; 2882#L722-262 havoc main_~_ha_bkt~0#1; 2853#L722-263 goto; 2854#L722-265 goto; 2772#L722-267 havoc main_~_ha_hashv~0#1; 2643#L722-268 goto; 2644#L715-3 call main_#t~mem3#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 2783#L715-4 [2023-11-21 22:17:02,131 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-21 22:17:02,132 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 4 times [2023-11-21 22:17:02,132 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-21 22:17:02,132 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1718023784] [2023-11-21 22:17:02,133 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:17:02,133 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-21 22:17:02,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-21 22:17:02,152 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-21 22:17:02,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-21 22:17:02,172 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-21 22:17:02,173 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-21 22:17:02,173 INFO L85 PathProgramCache]: Analyzing trace with hash -1275385819, now seen corresponding path program 1 times [2023-11-21 22:17:02,174 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-21 22:17:02,174 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1006629111] [2023-11-21 22:17:02,174 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:17:02,175 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-21 22:17:02,236 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-21 22:17:02,236 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [859681456] [2023-11-21 22:17:02,237 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:17:02,237 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-21 22:17:02,237 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 [2023-11-21 22:17:02,239 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-21 22:17:02,268 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2023-11-21 22:17:02,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-21 22:17:02,550 INFO L262 TraceCheckSpWp]: Trace formula consists of 498 conjuncts, 4 conjunts are in the unsatisfiable core [2023-11-21 22:17:02,553 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-21 22:17:02,607 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-21 22:17:02,607 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-21 22:17:02,607 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-21 22:17:02,607 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1006629111] [2023-11-21 22:17:02,608 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-21 22:17:02,608 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [859681456] [2023-11-21 22:17:02,608 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [859681456] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-21 22:17:02,608 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-21 22:17:02,609 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2023-11-21 22:17:02,609 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1830513488] [2023-11-21 22:17:02,609 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-21 22:17:02,610 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-21 22:17:02,610 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-21 22:17:02,610 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2023-11-21 22:17:02,611 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2023-11-21 22:17:02,611 INFO L87 Difference]: Start difference. First operand 350 states and 516 transitions. cyclomatic complexity: 169 Second operand has 5 states, 5 states have (on average 15.2) internal successors, (76), 5 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-21 22:17:02,748 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-21 22:17:02,748 INFO L93 Difference]: Finished difference Result 460 states and 682 transitions. [2023-11-21 22:17:02,748 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 460 states and 682 transitions. [2023-11-21 22:17:02,753 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 453 [2023-11-21 22:17:02,759 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 460 states to 460 states and 682 transitions. [2023-11-21 22:17:02,760 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 460 [2023-11-21 22:17:02,761 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 460 [2023-11-21 22:17:02,761 INFO L73 IsDeterministic]: Start isDeterministic. Operand 460 states and 682 transitions. [2023-11-21 22:17:02,762 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-21 22:17:02,762 INFO L218 hiAutomatonCegarLoop]: Abstraction has 460 states and 682 transitions. [2023-11-21 22:17:02,763 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 460 states and 682 transitions. [2023-11-21 22:17:02,770 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 460 to 373. [2023-11-21 22:17:02,771 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 373 states, 369 states have (on average 1.4498644986449865) internal successors, (535), 368 states have internal predecessors, (535), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-21 22:17:02,775 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 373 states to 373 states and 541 transitions. [2023-11-21 22:17:02,776 INFO L240 hiAutomatonCegarLoop]: Abstraction has 373 states and 541 transitions. [2023-11-21 22:17:02,776 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2023-11-21 22:17:02,778 INFO L428 stractBuchiCegarLoop]: Abstraction has 373 states and 541 transitions. [2023-11-21 22:17:02,778 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2023-11-21 22:17:02,779 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 373 states and 541 transitions. [2023-11-21 22:17:02,781 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 366 [2023-11-21 22:17:02,781 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-21 22:17:02,781 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-21 22:17:02,784 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-21 22:17:02,785 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-21 22:17:02,785 INFO L748 eck$LassoCheckResult]: Stem: 3967#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 3968#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 3827#L715-4 [2023-11-21 22:17:02,787 INFO L750 eck$LassoCheckResult]: Loop: 3827#L715-4 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 4014#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 3748#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 3749#L717-2 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 3902#L722-269 havoc main_~_ha_hashv~0#1; 3998#L722-176 goto; 3938#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 3939#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 3990#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 3991#L722-73 assume !main_#t~switch31#1; 4025#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 4026#L722-76 assume !main_#t~switch31#1; 3945#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 3946#L722-79 assume !main_#t~switch31#1; 3943#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 3944#L722-82 assume !main_#t~switch31#1; 3755#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 3756#L722-85 assume !main_#t~switch31#1; 3787#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 3788#L722-88 assume !main_#t~switch31#1; 3983#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 3984#L722-91 assume !main_#t~switch31#1; 3697#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 3698#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 3699#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 3700#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 4023#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 3733#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 3734#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 3863#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 3997#L722-105 havoc main_#t~switch31#1; 3981#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3979#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 3854#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3971#L722-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 3883#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3884#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 3684#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3904#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 3712#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3678#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 3679#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3770#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 3795#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3923#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 3741#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3846#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 3847#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3919#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 3671#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 3672#L722-170 goto; 3930#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 3895#L722-173 goto; 3896#L722-175 goto; 3965#L722-266 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 3987#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 3989#L722-194 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 3762#L722-193 goto; 3763#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 3797#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 3798#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 3879#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 3890#L722-202 goto; 3771#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 3772#L722-205 assume main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem89#1.base, 12 + main_#t~mem89#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset; 3926#L722-207 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 3786#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 3688#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 3689#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 3851#L722-260 goto; 3931#L722-262 havoc main_~_ha_bkt~0#1; 3900#L722-263 goto; 3901#L722-265 goto; 3822#L722-267 havoc main_~_ha_hashv~0#1; 3691#L722-268 goto; 3692#L715-3 call main_#t~mem3#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 3827#L715-4 [2023-11-21 22:17:02,788 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-21 22:17:02,788 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 5 times [2023-11-21 22:17:02,789 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-21 22:17:02,789 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [553254577] [2023-11-21 22:17:02,790 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:17:02,790 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-21 22:17:02,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-21 22:17:02,819 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-21 22:17:02,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-21 22:17:02,846 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-21 22:17:02,851 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-21 22:17:02,851 INFO L85 PathProgramCache]: Analyzing trace with hash 309299617, now seen corresponding path program 1 times [2023-11-21 22:17:02,851 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-21 22:17:02,852 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [445498887] [2023-11-21 22:17:02,852 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:17:02,852 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-21 22:17:02,916 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-21 22:17:02,917 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [136812684] [2023-11-21 22:17:02,917 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:17:02,917 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-21 22:17:02,917 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 [2023-11-21 22:17:02,919 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-21 22:17:02,945 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2023-11-21 22:17:03,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-21 22:17:03,798 INFO L262 TraceCheckSpWp]: Trace formula consists of 510 conjuncts, 15 conjunts are in the unsatisfiable core [2023-11-21 22:17:03,801 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-21 22:17:03,947 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-21 22:17:03,947 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-21 22:17:03,948 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-21 22:17:03,948 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [445498887] [2023-11-21 22:17:03,948 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-21 22:17:03,948 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [136812684] [2023-11-21 22:17:03,949 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [136812684] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-21 22:17:03,949 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-21 22:17:03,949 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2023-11-21 22:17:03,949 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [858017007] [2023-11-21 22:17:03,950 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-21 22:17:03,950 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-21 22:17:03,950 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-21 22:17:03,951 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2023-11-21 22:17:03,951 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2023-11-21 22:17:03,951 INFO L87 Difference]: Start difference. First operand 373 states and 541 transitions. cyclomatic complexity: 171 Second operand has 8 states, 8 states have (on average 9.5) internal successors, (76), 8 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-21 22:17:04,490 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-21 22:17:04,490 INFO L93 Difference]: Finished difference Result 399 states and 575 transitions. [2023-11-21 22:17:04,490 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 399 states and 575 transitions. [2023-11-21 22:17:04,495 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 392 [2023-11-21 22:17:04,500 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 399 states to 399 states and 575 transitions. [2023-11-21 22:17:04,501 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 399 [2023-11-21 22:17:04,501 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 399 [2023-11-21 22:17:04,501 INFO L73 IsDeterministic]: Start isDeterministic. Operand 399 states and 575 transitions. [2023-11-21 22:17:04,502 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-21 22:17:04,503 INFO L218 hiAutomatonCegarLoop]: Abstraction has 399 states and 575 transitions. [2023-11-21 22:17:04,504 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 399 states and 575 transitions. [2023-11-21 22:17:04,511 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 399 to 390. [2023-11-21 22:17:04,513 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 390 states, 386 states have (on average 1.4378238341968912) internal successors, (555), 385 states have internal predecessors, (555), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-21 22:17:04,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 390 states to 390 states and 561 transitions. [2023-11-21 22:17:04,515 INFO L240 hiAutomatonCegarLoop]: Abstraction has 390 states and 561 transitions. [2023-11-21 22:17:04,516 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2023-11-21 22:17:04,518 INFO L428 stractBuchiCegarLoop]: Abstraction has 390 states and 561 transitions. [2023-11-21 22:17:04,519 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2023-11-21 22:17:04,519 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 390 states and 561 transitions. [2023-11-21 22:17:04,521 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 383 [2023-11-21 22:17:04,521 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-21 22:17:04,522 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-21 22:17:04,523 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-21 22:17:04,523 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-21 22:17:04,523 INFO L748 eck$LassoCheckResult]: Stem: 4970#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 4971#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 4834#L715-4 [2023-11-21 22:17:04,524 INFO L750 eck$LassoCheckResult]: Loop: 4834#L715-4 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 5012#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 4756#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 4757#L717-2 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 4907#L722-269 havoc main_~_ha_hashv~0#1; 4997#L722-176 goto; 4944#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 4945#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 5059#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 5058#L722-73 assume !main_#t~switch31#1; 5057#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 5056#L722-76 assume !main_#t~switch31#1; 5055#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 5054#L722-79 assume !main_#t~switch31#1; 5049#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 5048#L722-82 assume !main_#t~switch31#1; 5046#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 5044#L722-85 assume !main_#t~switch31#1; 5042#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 5040#L722-88 assume !main_#t~switch31#1; 5039#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 5038#L722-91 assume !main_#t~switch31#1; 4705#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 4706#L722-94 assume !main_#t~switch31#1; 4707#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 4708#L722-97 assume !main_#t~switch31#1; 5020#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 4741#L722-100 assume !main_#t~switch31#1; 4742#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 4870#L722-103 assume !main_#t~switch31#1; 4996#L722-105 havoc main_#t~switch31#1; 5047#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5045#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 5043#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5041#L722-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 4888#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4889#L722-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 4691#L722-123 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet45#1 := main_~_ha_hashv~0#1; 4692#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4909#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 4720#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4686#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 4687#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4778#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 4802#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4928#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 4749#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4853#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 4854#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4924#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 4679#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 4680#L722-170 goto; 4935#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 4900#L722-173 goto; 4901#L722-175 goto; 4968#L722-266 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 4989#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 4991#L722-194 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 4770#L722-193 goto; 4771#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 4804#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 4805#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 4884#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 4895#L722-202 goto; 4779#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 4780#L722-205 assume main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem89#1.base, 12 + main_#t~mem89#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset; 4931#L722-207 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 4794#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 4696#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 4697#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 4858#L722-260 goto; 4939#L722-262 havoc main_~_ha_bkt~0#1; 4905#L722-263 goto; 4906#L722-265 goto; 4829#L722-267 havoc main_~_ha_hashv~0#1; 4699#L722-268 goto; 4700#L715-3 call main_#t~mem3#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 4834#L715-4 [2023-11-21 22:17:04,524 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-21 22:17:04,524 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 6 times [2023-11-21 22:17:04,525 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-21 22:17:04,525 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [182444834] [2023-11-21 22:17:04,525 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:17:04,526 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-21 22:17:04,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-21 22:17:04,549 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-21 22:17:04,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-21 22:17:04,567 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-21 22:17:04,568 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-21 22:17:04,568 INFO L85 PathProgramCache]: Analyzing trace with hash 1248106177, now seen corresponding path program 1 times [2023-11-21 22:17:04,568 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-21 22:17:04,568 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [740437053] [2023-11-21 22:17:04,569 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:17:04,569 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-21 22:17:04,613 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-21 22:17:04,613 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2039433231] [2023-11-21 22:17:04,613 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:17:04,613 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-21 22:17:04,614 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 [2023-11-21 22:17:04,616 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-21 22:17:04,635 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2023-11-21 22:17:04,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-21 22:17:04,923 INFO L262 TraceCheckSpWp]: Trace formula consists of 487 conjuncts, 4 conjunts are in the unsatisfiable core [2023-11-21 22:17:04,926 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-21 22:17:04,968 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-21 22:17:04,968 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-21 22:17:04,968 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-21 22:17:04,968 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [740437053] [2023-11-21 22:17:04,968 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-21 22:17:04,969 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2039433231] [2023-11-21 22:17:04,969 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2039433231] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-21 22:17:04,969 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-21 22:17:04,969 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-11-21 22:17:04,970 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1764745339] [2023-11-21 22:17:04,970 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-21 22:17:04,970 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-21 22:17:04,970 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-21 22:17:04,971 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-21 22:17:04,971 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-11-21 22:17:04,971 INFO L87 Difference]: Start difference. First operand 390 states and 561 transitions. cyclomatic complexity: 174 Second operand has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-21 22:17:05,082 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-21 22:17:05,082 INFO L93 Difference]: Finished difference Result 312 states and 447 transitions. [2023-11-21 22:17:05,082 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 312 states and 447 transitions. [2023-11-21 22:17:05,085 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 305 [2023-11-21 22:17:05,089 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 312 states to 312 states and 447 transitions. [2023-11-21 22:17:05,089 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 312 [2023-11-21 22:17:05,089 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 312 [2023-11-21 22:17:05,089 INFO L73 IsDeterministic]: Start isDeterministic. Operand 312 states and 447 transitions. [2023-11-21 22:17:05,090 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-21 22:17:05,090 INFO L218 hiAutomatonCegarLoop]: Abstraction has 312 states and 447 transitions. [2023-11-21 22:17:05,091 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 312 states and 447 transitions. [2023-11-21 22:17:05,096 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 312 to 312. [2023-11-21 22:17:05,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 312 states, 308 states have (on average 1.4318181818181819) internal successors, (441), 307 states have internal predecessors, (441), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-21 22:17:05,099 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 312 states to 312 states and 447 transitions. [2023-11-21 22:17:05,099 INFO L240 hiAutomatonCegarLoop]: Abstraction has 312 states and 447 transitions. [2023-11-21 22:17:05,099 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-21 22:17:05,101 INFO L428 stractBuchiCegarLoop]: Abstraction has 312 states and 447 transitions. [2023-11-21 22:17:05,102 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2023-11-21 22:17:05,102 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 312 states and 447 transitions. [2023-11-21 22:17:05,106 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 305 [2023-11-21 22:17:05,106 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-21 22:17:05,106 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-21 22:17:05,109 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-21 22:17:05,110 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-21 22:17:05,110 INFO L748 eck$LassoCheckResult]: Stem: 5878#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 5879#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 5757#L715-4 [2023-11-21 22:17:05,111 INFO L750 eck$LassoCheckResult]: Loop: 5757#L715-4 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 5910#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 5687#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 5688#L717-2 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 5821#L722-269 havoc main_~_ha_hashv~0#1; 5902#L722-176 goto; 5857#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 5719#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 5720#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 5648#L722-73 assume !main_#t~switch31#1; 5649#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 5758#L722-76 assume !main_#t~switch31#1; 5759#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 5793#L722-79 assume !main_#t~switch31#1; 5794#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 5860#L722-82 assume !main_#t~switch31#1; 5694#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 5695#L722-85 assume !main_#t~switch31#1; 5722#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 5712#L722-88 assume !main_#t~switch31#1; 5713#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 5892#L722-91 assume !main_#t~switch31#1; 5640#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 5641#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 5642#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 5643#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 5836#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 5674#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 5675#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 5787#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 5901#L722-105 havoc main_#t~switch31#1; 5890#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5888#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 5884#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5882#L722-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 5802#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5803#L722-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 5626#L722-123 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet45#1 := main_~_ha_hashv~0#1; 5627#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5823#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 5653#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5621#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 5622#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5709#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 5729#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5841#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 5680#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5773#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 5774#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5837#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 5614#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 5615#L722-170 goto; 5848#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 5814#L722-173 goto; 5815#L722-175 goto; 5876#L722-266 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 5895#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 5897#L722-194 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 5701#L722-193 goto; 5702#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 5731#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 5732#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 5798#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 5809#L722-202 goto; 5710#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 5711#L722-205 assume main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem89#1.base, 12 + main_#t~mem89#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset; 5844#L722-207 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 5721#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 5631#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 5632#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 5778#L722-260 goto; 5852#L722-262 havoc main_~_ha_bkt~0#1; 5819#L722-263 goto; 5820#L722-265 goto; 5754#L722-267 havoc main_~_ha_hashv~0#1; 5634#L722-268 goto; 5635#L715-3 call main_#t~mem3#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 5757#L715-4 [2023-11-21 22:17:05,112 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-21 22:17:05,112 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 7 times [2023-11-21 22:17:05,112 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-21 22:17:05,112 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [331341431] [2023-11-21 22:17:05,112 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:17:05,113 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-21 22:17:05,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-21 22:17:05,132 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-21 22:17:05,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-21 22:17:05,147 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-21 22:17:05,147 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-21 22:17:05,148 INFO L85 PathProgramCache]: Analyzing trace with hash 1670632649, now seen corresponding path program 1 times [2023-11-21 22:17:05,148 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-21 22:17:05,148 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [372763513] [2023-11-21 22:17:05,148 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:17:05,148 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-21 22:17:05,199 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-21 22:17:05,199 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [962368123] [2023-11-21 22:17:05,199 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:17:05,199 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-21 22:17:05,199 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 [2023-11-21 22:17:05,201 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-21 22:17:05,206 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2023-11-21 22:17:05,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-21 22:17:05,592 INFO L262 TraceCheckSpWp]: Trace formula consists of 511 conjuncts, 13 conjunts are in the unsatisfiable core [2023-11-21 22:17:05,594 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-21 22:17:05,707 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-21 22:17:05,708 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-21 22:17:05,708 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-21 22:17:05,708 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [372763513] [2023-11-21 22:17:05,708 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-21 22:17:05,708 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [962368123] [2023-11-21 22:17:05,708 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [962368123] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-21 22:17:05,709 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-21 22:17:05,709 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2023-11-21 22:17:05,709 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1736775112] [2023-11-21 22:17:05,709 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-21 22:17:05,710 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-21 22:17:05,710 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-21 22:17:05,710 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-21 22:17:05,710 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2023-11-21 22:17:05,710 INFO L87 Difference]: Start difference. First operand 312 states and 447 transitions. cyclomatic complexity: 138 Second operand has 7 states, 7 states have (on average 11.0) internal successors, (77), 7 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-21 22:17:06,107 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-21 22:17:06,107 INFO L93 Difference]: Finished difference Result 318 states and 455 transitions. [2023-11-21 22:17:06,108 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 318 states and 455 transitions. [2023-11-21 22:17:06,111 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 311 [2023-11-21 22:17:06,114 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 318 states to 318 states and 455 transitions. [2023-11-21 22:17:06,115 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 318 [2023-11-21 22:17:06,115 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 318 [2023-11-21 22:17:06,115 INFO L73 IsDeterministic]: Start isDeterministic. Operand 318 states and 455 transitions. [2023-11-21 22:17:06,116 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-21 22:17:06,116 INFO L218 hiAutomatonCegarLoop]: Abstraction has 318 states and 455 transitions. [2023-11-21 22:17:06,117 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 318 states and 455 transitions. [2023-11-21 22:17:06,122 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 318 to 314. [2023-11-21 22:17:06,123 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 314 states, 310 states have (on average 1.429032258064516) internal successors, (443), 309 states have internal predecessors, (443), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-21 22:17:06,125 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 314 states to 314 states and 449 transitions. [2023-11-21 22:17:06,125 INFO L240 hiAutomatonCegarLoop]: Abstraction has 314 states and 449 transitions. [2023-11-21 22:17:06,126 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2023-11-21 22:17:06,126 INFO L428 stractBuchiCegarLoop]: Abstraction has 314 states and 449 transitions. [2023-11-21 22:17:06,127 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2023-11-21 22:17:06,127 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 314 states and 449 transitions. [2023-11-21 22:17:06,129 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 307 [2023-11-21 22:17:06,129 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-21 22:17:06,129 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-21 22:17:06,130 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-21 22:17:06,130 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-21 22:17:06,130 INFO L748 eck$LassoCheckResult]: Stem: 6752#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 6753#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 6631#L715-4 [2023-11-21 22:17:06,130 INFO L750 eck$LassoCheckResult]: Loop: 6631#L715-4 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 6785#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 6561#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 6562#L717-2 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 6695#L722-269 havoc main_~_ha_hashv~0#1; 6776#L722-176 goto; 6731#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 6593#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 6594#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 6522#L722-73 assume !main_#t~switch31#1; 6523#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 6632#L722-76 assume !main_#t~switch31#1; 6633#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 6667#L722-79 assume !main_#t~switch31#1; 6668#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 6734#L722-82 assume !main_#t~switch31#1; 6568#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 6569#L722-85 assume !main_#t~switch31#1; 6596#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 6586#L722-88 assume !main_#t~switch31#1; 6587#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 6766#L722-91 assume !main_#t~switch31#1; 6514#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 6515#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 6516#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 6517#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 6710#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 6548#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 6549#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 6661#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 6775#L722-105 havoc main_#t~switch31#1; 6764#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6762#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 6758#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6756#L722-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 6676#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6677#L722-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 6500#L722-123 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet45#1 := main_~_ha_hashv~0#1; 6501#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6697#L722-128 assume !(0 == main_~_hj_i~0#1 % 4294967296); 6616#L722-130 assume 0 == main_~_ha_hashv~0#1 % 4294967296 / 4096 % 4294967296;main_#t~nondet46#1 := main_~_hj_i~0#1; 6527#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6495#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 6496#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6583#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 6603#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6715#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 6554#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6647#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 6648#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6711#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 6488#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 6489#L722-170 goto; 6722#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 6688#L722-173 goto; 6689#L722-175 goto; 6750#L722-266 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 6769#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 6771#L722-194 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 6575#L722-193 goto; 6576#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 6605#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 6606#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 6672#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 6683#L722-202 goto; 6584#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 6585#L722-205 assume main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem89#1.base, 12 + main_#t~mem89#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset; 6718#L722-207 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 6595#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 6505#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 6506#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 6652#L722-260 goto; 6726#L722-262 havoc main_~_ha_bkt~0#1; 6693#L722-263 goto; 6694#L722-265 goto; 6628#L722-267 havoc main_~_ha_hashv~0#1; 6508#L722-268 goto; 6509#L715-3 call main_#t~mem3#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 6631#L715-4 [2023-11-21 22:17:06,131 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-21 22:17:06,131 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 8 times [2023-11-21 22:17:06,131 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-21 22:17:06,131 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1774330929] [2023-11-21 22:17:06,132 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:17:06,132 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-21 22:17:06,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-21 22:17:06,145 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-21 22:17:06,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-21 22:17:06,160 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-21 22:17:06,161 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-21 22:17:06,161 INFO L85 PathProgramCache]: Analyzing trace with hash 23589846, now seen corresponding path program 1 times [2023-11-21 22:17:06,161 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-21 22:17:06,161 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [860753673] [2023-11-21 22:17:06,161 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:17:06,161 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-21 22:17:06,216 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-21 22:17:06,216 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1748894719] [2023-11-21 22:17:06,216 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:17:06,217 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-21 22:17:06,217 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 [2023-11-21 22:17:06,219 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-21 22:17:06,252 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2023-11-21 22:17:06,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-21 22:17:06,718 INFO L262 TraceCheckSpWp]: Trace formula consists of 512 conjuncts, 13 conjunts are in the unsatisfiable core [2023-11-21 22:17:06,721 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-21 22:17:06,929 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-21 22:17:06,929 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-21 22:17:06,930 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-21 22:17:06,930 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [860753673] [2023-11-21 22:17:06,930 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-21 22:17:06,930 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1748894719] [2023-11-21 22:17:06,930 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1748894719] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-21 22:17:06,930 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-21 22:17:06,931 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2023-11-21 22:17:06,931 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [76197910] [2023-11-21 22:17:06,931 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-21 22:17:06,931 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-21 22:17:06,932 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-21 22:17:06,932 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2023-11-21 22:17:06,932 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2023-11-21 22:17:06,933 INFO L87 Difference]: Start difference. First operand 314 states and 449 transitions. cyclomatic complexity: 138 Second operand has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-21 22:17:07,229 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-21 22:17:07,229 INFO L93 Difference]: Finished difference Result 312 states and 445 transitions. [2023-11-21 22:17:07,229 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 312 states and 445 transitions. [2023-11-21 22:17:07,233 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 305 [2023-11-21 22:17:07,237 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 312 states to 312 states and 445 transitions. [2023-11-21 22:17:07,237 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 312 [2023-11-21 22:17:07,237 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 312 [2023-11-21 22:17:07,238 INFO L73 IsDeterministic]: Start isDeterministic. Operand 312 states and 445 transitions. [2023-11-21 22:17:07,238 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-21 22:17:07,239 INFO L218 hiAutomatonCegarLoop]: Abstraction has 312 states and 445 transitions. [2023-11-21 22:17:07,240 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 312 states and 445 transitions. [2023-11-21 22:17:07,245 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 312 to 311. [2023-11-21 22:17:07,246 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 311 states, 307 states have (on average 1.4267100977198697) internal successors, (438), 306 states have internal predecessors, (438), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-21 22:17:07,248 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 311 states to 311 states and 444 transitions. [2023-11-21 22:17:07,249 INFO L240 hiAutomatonCegarLoop]: Abstraction has 311 states and 444 transitions. [2023-11-21 22:17:07,249 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2023-11-21 22:17:07,252 INFO L428 stractBuchiCegarLoop]: Abstraction has 311 states and 444 transitions. [2023-11-21 22:17:07,252 INFO L335 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2023-11-21 22:17:07,252 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 311 states and 444 transitions. [2023-11-21 22:17:07,254 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 304 [2023-11-21 22:17:07,254 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-21 22:17:07,255 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-21 22:17:07,255 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-21 22:17:07,256 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-21 22:17:07,256 INFO L748 eck$LassoCheckResult]: Stem: 7617#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 7618#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 7497#L715-4 [2023-11-21 22:17:07,256 INFO L750 eck$LassoCheckResult]: Loop: 7497#L715-4 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 7650#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 7432#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 7433#L717-2 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 7561#L722-269 havoc main_~_ha_hashv~0#1; 7641#L722-176 goto; 7596#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 7459#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 7460#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 7390#L722-73 assume !main_#t~switch31#1; 7391#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 7498#L722-76 assume !main_#t~switch31#1; 7499#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 7533#L722-79 assume !main_#t~switch31#1; 7534#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 7599#L722-82 assume !main_#t~switch31#1; 7434#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 7435#L722-85 assume !main_#t~switch31#1; 7462#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 7454#L722-88 assume !main_#t~switch31#1; 7455#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 7631#L722-91 assume !main_#t~switch31#1; 7380#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 7381#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 7382#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 7383#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 7579#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 7414#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 7415#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 7527#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 7640#L722-105 havoc main_#t~switch31#1; 7629#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7627#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 7623#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7621#L722-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 7622#L722-116 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 7593#L722-118 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);assume main_#t~nondet44#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 7542#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7543#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 7649#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7656#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 7389#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7358#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 7359#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7449#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 7467#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7581#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 7418#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7510#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 7511#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7574#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 7352#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 7353#L722-170 goto; 7586#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 7554#L722-173 goto; 7555#L722-175 goto; 7615#L722-266 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 7634#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 7636#L722-194 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 7439#L722-193 goto; 7440#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 7469#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 7470#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 7538#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 7548#L722-202 goto; 7450#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 7451#L722-205 assume main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem89#1.base, 12 + main_#t~mem89#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset; 7583#L722-207 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 7461#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 7371#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 7372#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 7518#L722-260 goto; 7590#L722-262 havoc main_~_ha_bkt~0#1; 7559#L722-263 goto; 7560#L722-265 goto; 7490#L722-267 havoc main_~_ha_hashv~0#1; 7374#L722-268 goto; 7375#L715-3 call main_#t~mem3#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 7497#L715-4 [2023-11-21 22:17:07,257 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-21 22:17:07,257 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 9 times [2023-11-21 22:17:07,257 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-21 22:17:07,257 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1881198828] [2023-11-21 22:17:07,258 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:17:07,258 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-21 22:17:07,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-21 22:17:07,276 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-21 22:17:07,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-21 22:17:07,294 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-21 22:17:07,295 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-21 22:17:07,295 INFO L85 PathProgramCache]: Analyzing trace with hash 309060570, now seen corresponding path program 1 times [2023-11-21 22:17:07,295 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-21 22:17:07,295 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1897082869] [2023-11-21 22:17:07,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:17:07,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-21 22:17:07,346 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-21 22:17:07,346 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [248046876] [2023-11-21 22:17:07,347 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:17:07,347 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-21 22:17:07,347 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 [2023-11-21 22:17:07,349 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-21 22:17:07,368 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2023-11-21 22:17:09,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-21 22:17:09,883 INFO L262 TraceCheckSpWp]: Trace formula consists of 510 conjuncts, 23 conjunts are in the unsatisfiable core [2023-11-21 22:17:09,886 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-21 22:17:34,686 WARN L293 SmtUtils]: Spent 24.40s on a formula simplification. DAG size of input: 17 DAG size of output: 1 (called from [L 731] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2023-11-21 22:17:34,763 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-21 22:17:34,763 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-21 22:17:34,764 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-21 22:17:34,766 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1897082869] [2023-11-21 22:17:34,766 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-21 22:17:34,768 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [248046876] [2023-11-21 22:17:34,768 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [248046876] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-21 22:17:34,768 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-21 22:17:34,769 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2023-11-21 22:17:34,769 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1637352016] [2023-11-21 22:17:34,770 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-21 22:17:34,770 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-21 22:17:34,771 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-21 22:17:34,771 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2023-11-21 22:17:34,772 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2023-11-21 22:17:34,772 INFO L87 Difference]: Start difference. First operand 311 states and 444 transitions. cyclomatic complexity: 136 Second operand has 10 states, 10 states have (on average 7.8) internal successors, (78), 10 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-21 22:17:35,554 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-21 22:17:35,555 INFO L93 Difference]: Finished difference Result 323 states and 460 transitions. [2023-11-21 22:17:35,555 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 323 states and 460 transitions. [2023-11-21 22:17:35,558 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 315 [2023-11-21 22:17:35,562 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 323 states to 322 states and 459 transitions. [2023-11-21 22:17:35,562 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 322 [2023-11-21 22:17:35,562 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 322 [2023-11-21 22:17:35,563 INFO L73 IsDeterministic]: Start isDeterministic. Operand 322 states and 459 transitions. [2023-11-21 22:17:35,563 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-21 22:17:35,563 INFO L218 hiAutomatonCegarLoop]: Abstraction has 322 states and 459 transitions. [2023-11-21 22:17:35,564 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 322 states and 459 transitions. [2023-11-21 22:17:35,569 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 322 to 316. [2023-11-21 22:17:35,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 316 states, 312 states have (on average 1.4230769230769231) internal successors, (444), 311 states have internal predecessors, (444), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-21 22:17:35,572 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 316 states to 316 states and 450 transitions. [2023-11-21 22:17:35,573 INFO L240 hiAutomatonCegarLoop]: Abstraction has 316 states and 450 transitions. [2023-11-21 22:17:35,573 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2023-11-21 22:17:35,574 INFO L428 stractBuchiCegarLoop]: Abstraction has 316 states and 450 transitions. [2023-11-21 22:17:35,574 INFO L335 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2023-11-21 22:17:35,574 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 316 states and 450 transitions. [2023-11-21 22:17:35,576 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 309 [2023-11-21 22:17:35,576 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-21 22:17:35,576 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-21 22:17:35,577 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-21 22:17:35,577 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-21 22:17:35,577 INFO L748 eck$LassoCheckResult]: Stem: 8498#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 8499#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 8377#L715-4 [2023-11-21 22:17:35,578 INFO L750 eck$LassoCheckResult]: Loop: 8377#L715-4 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 8531#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 8310#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 8311#L717-2 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 8441#L722-269 havoc main_~_ha_hashv~0#1; 8522#L722-176 goto; 8476#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 8339#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 8340#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 8268#L722-73 assume !main_#t~switch31#1; 8269#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 8378#L722-76 assume !main_#t~switch31#1; 8379#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 8413#L722-79 assume !main_#t~switch31#1; 8414#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 8479#L722-82 assume !main_#t~switch31#1; 8314#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 8315#L722-85 assume !main_#t~switch31#1; 8342#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 8332#L722-88 assume !main_#t~switch31#1; 8333#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 8512#L722-91 assume !main_#t~switch31#1; 8260#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 8261#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 8262#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 8263#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 8456#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 8294#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 8295#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 8407#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 8521#L722-105 havoc main_#t~switch31#1; 8510#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 8508#L722-107 assume !(0 == main_~_hj_i~0#1 % 4294967296); 8509#L722-109 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 8400#L722-111 assume main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet43#1 := 0; 8401#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 8541#L722-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 8539#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 8533#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 8530#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 8542#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 8273#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 8241#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 8242#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 8329#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 8349#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 8461#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 8300#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 8393#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 8394#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 8457#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 8234#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 8235#L722-170 goto; 8468#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 8434#L722-173 goto; 8435#L722-175 goto; 8496#L722-266 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 8515#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 8517#L722-194 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 8321#L722-193 goto; 8322#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 8351#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 8352#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 8420#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 8429#L722-202 goto; 8330#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 8331#L722-205 assume main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem89#1.base, 12 + main_#t~mem89#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset; 8464#L722-207 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 8341#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 8253#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 8254#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 8398#L722-260 goto; 8472#L722-262 havoc main_~_ha_bkt~0#1; 8439#L722-263 goto; 8440#L722-265 goto; 8375#L722-267 havoc main_~_ha_hashv~0#1; 8249#L722-268 goto; 8250#L715-3 call main_#t~mem3#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 8377#L715-4 [2023-11-21 22:17:35,578 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-21 22:17:35,578 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 10 times [2023-11-21 22:17:35,578 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-21 22:17:35,579 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1513524929] [2023-11-21 22:17:35,579 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:17:35,579 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-21 22:17:35,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-21 22:17:35,593 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-21 22:17:35,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-21 22:17:35,610 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-21 22:17:35,611 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-21 22:17:35,611 INFO L85 PathProgramCache]: Analyzing trace with hash 593045564, now seen corresponding path program 1 times [2023-11-21 22:17:35,611 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-21 22:17:35,612 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [612742935] [2023-11-21 22:17:35,612 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:17:35,612 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-21 22:17:35,666 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-21 22:17:35,666 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [9693957] [2023-11-21 22:17:35,666 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:17:35,666 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-21 22:17:35,667 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 [2023-11-21 22:17:35,672 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-21 22:17:35,688 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2023-11-21 22:17:36,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-21 22:17:36,196 INFO L262 TraceCheckSpWp]: Trace formula consists of 512 conjuncts, 13 conjunts are in the unsatisfiable core [2023-11-21 22:17:36,199 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-21 22:17:36,408 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-21 22:17:36,409 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-21 22:17:36,409 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-21 22:17:36,409 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [612742935] [2023-11-21 22:17:36,409 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-21 22:17:36,409 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [9693957] [2023-11-21 22:17:36,410 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [9693957] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-21 22:17:36,410 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-21 22:17:36,410 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2023-11-21 22:17:36,410 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1464566785] [2023-11-21 22:17:36,410 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-21 22:17:36,411 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-21 22:17:36,411 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-21 22:17:36,411 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2023-11-21 22:17:36,412 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2023-11-21 22:17:36,412 INFO L87 Difference]: Start difference. First operand 316 states and 450 transitions. cyclomatic complexity: 137 Second operand has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-21 22:17:36,729 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-21 22:17:36,729 INFO L93 Difference]: Finished difference Result 321 states and 456 transitions. [2023-11-21 22:17:36,729 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 321 states and 456 transitions. [2023-11-21 22:17:36,732 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 314 [2023-11-21 22:17:36,736 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 321 states to 321 states and 456 transitions. [2023-11-21 22:17:36,737 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 321 [2023-11-21 22:17:36,738 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 321 [2023-11-21 22:17:36,738 INFO L73 IsDeterministic]: Start isDeterministic. Operand 321 states and 456 transitions. [2023-11-21 22:17:36,739 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-21 22:17:36,739 INFO L218 hiAutomatonCegarLoop]: Abstraction has 321 states and 456 transitions. [2023-11-21 22:17:36,740 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 321 states and 456 transitions. [2023-11-21 22:17:36,745 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 321 to 320. [2023-11-21 22:17:36,747 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 320 states, 316 states have (on average 1.4208860759493671) internal successors, (449), 315 states have internal predecessors, (449), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-21 22:17:36,749 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 320 states to 320 states and 455 transitions. [2023-11-21 22:17:36,749 INFO L240 hiAutomatonCegarLoop]: Abstraction has 320 states and 455 transitions. [2023-11-21 22:17:36,750 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2023-11-21 22:17:36,750 INFO L428 stractBuchiCegarLoop]: Abstraction has 320 states and 455 transitions. [2023-11-21 22:17:36,751 INFO L335 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2023-11-21 22:17:36,751 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 320 states and 455 transitions. [2023-11-21 22:17:36,753 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 313 [2023-11-21 22:17:36,753 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-21 22:17:36,753 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-21 22:17:36,754 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-21 22:17:36,754 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-21 22:17:36,755 INFO L748 eck$LassoCheckResult]: Stem: 9377#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 9378#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 9254#L715-4 [2023-11-21 22:17:36,755 INFO L750 eck$LassoCheckResult]: Loop: 9254#L715-4 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 9410#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 9184#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 9185#L717-2 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 9319#L722-269 havoc main_~_ha_hashv~0#1; 9401#L722-176 goto; 9355#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 9216#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 9217#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 9145#L722-73 assume !main_#t~switch31#1; 9146#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 9255#L722-76 assume !main_#t~switch31#1; 9256#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 9291#L722-79 assume !main_#t~switch31#1; 9292#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 9358#L722-82 assume !main_#t~switch31#1; 9191#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 9192#L722-85 assume !main_#t~switch31#1; 9219#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 9209#L722-88 assume !main_#t~switch31#1; 9210#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 9391#L722-91 assume !main_#t~switch31#1; 9137#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 9138#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 9139#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 9140#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 9334#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 9171#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 9172#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 9285#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 9400#L722-105 havoc main_#t~switch31#1; 9389#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 9386#L722-107 assume !(0 == main_~_hj_i~0#1 % 4294967296); 9388#L722-109 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 9277#L722-111 assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);assume main_#t~nondet43#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296; 9279#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 9424#L722-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 9352#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 9419#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 9409#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 9416#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 9150#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 9118#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 9119#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 9206#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 9226#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 9339#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 9177#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 9270#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 9271#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 9335#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 9111#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 9112#L722-170 goto; 9346#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 9312#L722-173 goto; 9313#L722-175 goto; 9375#L722-266 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 9394#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 9396#L722-194 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 9198#L722-193 goto; 9199#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 9228#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 9229#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 9296#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 9307#L722-202 goto; 9207#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 9208#L722-205 assume main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem89#1.base, 12 + main_#t~mem89#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset; 9342#L722-207 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 9218#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 9128#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 9129#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 9275#L722-260 goto; 9350#L722-262 havoc main_~_ha_bkt~0#1; 9317#L722-263 goto; 9318#L722-265 goto; 9251#L722-267 havoc main_~_ha_hashv~0#1; 9131#L722-268 goto; 9132#L715-3 call main_#t~mem3#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 9254#L715-4 [2023-11-21 22:17:36,756 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-21 22:17:36,756 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 11 times [2023-11-21 22:17:36,756 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-21 22:17:36,756 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [116400959] [2023-11-21 22:17:36,756 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:17:36,757 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-21 22:17:36,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-21 22:17:36,771 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-21 22:17:36,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-21 22:17:36,789 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-21 22:17:36,789 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-21 22:17:36,790 INFO L85 PathProgramCache]: Analyzing trace with hash -1456342278, now seen corresponding path program 1 times [2023-11-21 22:17:36,790 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-21 22:17:36,790 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [157382956] [2023-11-21 22:17:36,790 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:17:36,791 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-21 22:17:36,845 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-21 22:17:36,846 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1756150397] [2023-11-21 22:17:36,846 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:17:36,847 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-21 22:17:36,847 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 [2023-11-21 22:17:36,850 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-21 22:17:36,892 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2023-11-21 22:17:37,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-21 22:17:37,363 INFO L262 TraceCheckSpWp]: Trace formula consists of 510 conjuncts, 16 conjunts are in the unsatisfiable core [2023-11-21 22:17:37,366 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-21 22:17:37,698 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-21 22:17:37,698 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-21 22:17:37,698 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-21 22:17:37,698 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [157382956] [2023-11-21 22:17:37,699 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-21 22:17:37,699 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1756150397] [2023-11-21 22:17:37,699 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1756150397] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-21 22:17:37,699 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-21 22:17:37,699 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2023-11-21 22:17:37,700 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [226155987] [2023-11-21 22:17:37,700 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-21 22:17:37,700 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-21 22:17:37,700 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-21 22:17:37,701 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-21 22:17:37,701 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2023-11-21 22:17:37,701 INFO L87 Difference]: Start difference. First operand 320 states and 455 transitions. cyclomatic complexity: 138 Second operand has 7 states, 7 states have (on average 11.142857142857142) internal successors, (78), 7 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-21 22:17:38,240 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-21 22:17:38,242 INFO L93 Difference]: Finished difference Result 326 states and 462 transitions. [2023-11-21 22:17:38,243 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 326 states and 462 transitions. [2023-11-21 22:17:38,246 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 319 [2023-11-21 22:17:38,250 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 326 states to 326 states and 462 transitions. [2023-11-21 22:17:38,251 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 326 [2023-11-21 22:17:38,251 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 326 [2023-11-21 22:17:38,252 INFO L73 IsDeterministic]: Start isDeterministic. Operand 326 states and 462 transitions. [2023-11-21 22:17:38,252 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-21 22:17:38,253 INFO L218 hiAutomatonCegarLoop]: Abstraction has 326 states and 462 transitions. [2023-11-21 22:17:38,253 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 326 states and 462 transitions. [2023-11-21 22:17:38,259 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 326 to 324. [2023-11-21 22:17:38,260 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 324 states, 320 states have (on average 1.41875) internal successors, (454), 319 states have internal predecessors, (454), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-21 22:17:38,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 324 states to 324 states and 460 transitions. [2023-11-21 22:17:38,263 INFO L240 hiAutomatonCegarLoop]: Abstraction has 324 states and 460 transitions. [2023-11-21 22:17:38,263 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2023-11-21 22:17:38,264 INFO L428 stractBuchiCegarLoop]: Abstraction has 324 states and 460 transitions. [2023-11-21 22:17:38,264 INFO L335 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2023-11-21 22:17:38,264 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 324 states and 460 transitions. [2023-11-21 22:17:38,267 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 317 [2023-11-21 22:17:38,267 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-21 22:17:38,267 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-21 22:17:38,268 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-21 22:17:38,268 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-21 22:17:38,268 INFO L748 eck$LassoCheckResult]: Stem: 10267#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 10268#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 10143#L715-4 [2023-11-21 22:17:38,269 INFO L750 eck$LassoCheckResult]: Loop: 10143#L715-4 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 10299#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 10078#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 10079#L717-2 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 10208#L722-269 havoc main_~_ha_hashv~0#1; 10290#L722-176 goto; 10244#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 10105#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 10106#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 10036#L722-73 assume !main_#t~switch31#1; 10037#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 10144#L722-76 assume !main_#t~switch31#1; 10145#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 10180#L722-79 assume !main_#t~switch31#1; 10181#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 10247#L722-82 assume !main_#t~switch31#1; 10080#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 10081#L722-85 assume !main_#t~switch31#1; 10108#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 10100#L722-88 assume !main_#t~switch31#1; 10101#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 10280#L722-91 assume !main_#t~switch31#1; 10026#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 10027#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 10028#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 10029#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 10221#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 10057#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 10058#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 10174#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 10289#L722-105 havoc main_#t~switch31#1; 10278#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 10273#L722-107 assume !(0 == main_~_hj_i~0#1 % 4294967296); 10275#L722-109 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 10165#L722-111 assume main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet43#1 := 0; 10166#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 10269#L722-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 10270#L722-116 assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~nondet44#1 := main_~_hj_j~0#1; 10241#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 10318#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 10298#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 10305#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 10035#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 10007#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 10008#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 10095#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 10115#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 10228#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 10066#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 10159#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 10160#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 10222#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 9998#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 9999#L722-170 goto; 10233#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 10201#L722-173 goto; 10202#L722-175 goto; 10264#L722-266 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 10283#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 10285#L722-194 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 10087#L722-193 goto; 10088#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 10117#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 10118#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 10185#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 10196#L722-202 goto; 10096#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 10097#L722-205 assume main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem89#1.base, 12 + main_#t~mem89#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset; 10231#L722-207 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 10107#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 10017#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 10018#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 10164#L722-260 goto; 10237#L722-262 havoc main_~_ha_bkt~0#1; 10206#L722-263 goto; 10207#L722-265 goto; 10136#L722-267 havoc main_~_ha_hashv~0#1; 10020#L722-268 goto; 10021#L715-3 call main_#t~mem3#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 10143#L715-4 [2023-11-21 22:17:38,269 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-21 22:17:38,270 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 12 times [2023-11-21 22:17:38,270 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-21 22:17:38,270 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1021059544] [2023-11-21 22:17:38,270 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:17:38,270 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-21 22:17:38,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-21 22:17:38,305 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-21 22:17:38,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-21 22:17:38,324 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-21 22:17:38,326 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-21 22:17:38,326 INFO L85 PathProgramCache]: Analyzing trace with hash -2061795943, now seen corresponding path program 1 times [2023-11-21 22:17:38,327 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-21 22:17:38,327 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [19034733] [2023-11-21 22:17:38,328 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:17:38,328 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-21 22:17:38,384 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-21 22:17:38,384 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1827320646] [2023-11-21 22:17:38,384 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:17:38,384 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-21 22:17:38,385 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 [2023-11-21 22:17:38,388 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-21 22:17:38,412 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2023-11-21 22:17:38,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-21 22:17:38,810 INFO L262 TraceCheckSpWp]: Trace formula consists of 513 conjuncts, 15 conjunts are in the unsatisfiable core [2023-11-21 22:17:38,812 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-21 22:17:39,043 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-21 22:17:39,043 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-21 22:17:39,044 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-21 22:17:39,044 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [19034733] [2023-11-21 22:17:39,044 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-21 22:17:39,044 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1827320646] [2023-11-21 22:17:39,044 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1827320646] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-21 22:17:39,044 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-21 22:17:39,044 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2023-11-21 22:17:39,045 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1580270696] [2023-11-21 22:17:39,045 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-21 22:17:39,045 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-21 22:17:39,045 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-21 22:17:39,046 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-21 22:17:39,046 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2023-11-21 22:17:39,046 INFO L87 Difference]: Start difference. First operand 324 states and 460 transitions. cyclomatic complexity: 139 Second operand has 7 states, 7 states have (on average 11.285714285714286) internal successors, (79), 7 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-21 22:17:39,632 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-21 22:17:39,632 INFO L93 Difference]: Finished difference Result 330 states and 467 transitions. [2023-11-21 22:17:39,632 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 330 states and 467 transitions. [2023-11-21 22:17:39,640 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 323 [2023-11-21 22:17:39,644 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 330 states to 330 states and 467 transitions. [2023-11-21 22:17:39,644 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 330 [2023-11-21 22:17:39,645 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 330 [2023-11-21 22:17:39,645 INFO L73 IsDeterministic]: Start isDeterministic. Operand 330 states and 467 transitions. [2023-11-21 22:17:39,646 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-21 22:17:39,646 INFO L218 hiAutomatonCegarLoop]: Abstraction has 330 states and 467 transitions. [2023-11-21 22:17:39,647 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 330 states and 467 transitions. [2023-11-21 22:17:39,653 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 330 to 324. [2023-11-21 22:17:39,654 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 324 states, 320 states have (on average 1.41875) internal successors, (454), 319 states have internal predecessors, (454), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-21 22:17:39,657 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 324 states to 324 states and 460 transitions. [2023-11-21 22:17:39,657 INFO L240 hiAutomatonCegarLoop]: Abstraction has 324 states and 460 transitions. [2023-11-21 22:17:39,657 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2023-11-21 22:17:39,658 INFO L428 stractBuchiCegarLoop]: Abstraction has 324 states and 460 transitions. [2023-11-21 22:17:39,658 INFO L335 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2023-11-21 22:17:39,659 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 324 states and 460 transitions. [2023-11-21 22:17:39,661 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 317 [2023-11-21 22:17:39,661 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-21 22:17:39,661 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-21 22:17:39,661 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-21 22:17:39,662 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-21 22:17:39,662 INFO L748 eck$LassoCheckResult]: Stem: 11166#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 11167#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 11043#L715-4 [2023-11-21 22:17:39,662 INFO L750 eck$LassoCheckResult]: Loop: 11043#L715-4 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 11199#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 10976#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 10977#L717-2 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 11108#L722-269 havoc main_~_ha_hashv~0#1; 11190#L722-176 goto; 11144#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 11005#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 11006#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 10934#L722-73 assume !main_#t~switch31#1; 10935#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 11044#L722-76 assume !main_#t~switch31#1; 11045#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 11080#L722-79 assume !main_#t~switch31#1; 11081#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 11147#L722-82 assume !main_#t~switch31#1; 10980#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 10981#L722-85 assume !main_#t~switch31#1; 11008#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 11000#L722-88 assume !main_#t~switch31#1; 11001#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 11180#L722-91 assume !main_#t~switch31#1; 10926#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 10927#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 10928#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 10929#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 11126#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 10960#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 10961#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 11074#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 11189#L722-105 havoc main_#t~switch31#1; 11178#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 11175#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 11176#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 11213#L722-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 11212#L722-116 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 11211#L722-118 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);assume main_#t~nondet44#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 11210#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 11208#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 11153#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 11112#L722-128 assume !(0 == main_~_hj_i~0#1 % 4294967296); 11028#L722-130 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 4096 % 4294967296); 10938#L722-132 assume main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 4096 % 4294967296;main_#t~nondet46#1 := 0; 10939#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 10907#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 10908#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 10995#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 11017#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 11128#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 10963#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 11056#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 11057#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 11121#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 10898#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 10899#L722-170 goto; 11133#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 11101#L722-173 goto; 11102#L722-175 goto; 11164#L722-266 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 11183#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 11185#L722-194 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 10985#L722-193 goto; 10986#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 11012#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 11013#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 11085#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 11095#L722-202 goto; 10996#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 10997#L722-205 assume main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem89#1.base, 12 + main_#t~mem89#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset; 11130#L722-207 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 11007#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 10917#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 10918#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 11064#L722-260 goto; 11137#L722-262 havoc main_~_ha_bkt~0#1; 11106#L722-263 goto; 11107#L722-265 goto; 11034#L722-267 havoc main_~_ha_hashv~0#1; 10920#L722-268 goto; 10921#L715-3 call main_#t~mem3#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 11043#L715-4 [2023-11-21 22:17:39,662 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-21 22:17:39,663 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 13 times [2023-11-21 22:17:39,663 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-21 22:17:39,663 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [577199616] [2023-11-21 22:17:39,663 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:17:39,663 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-21 22:17:39,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-21 22:17:39,683 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-21 22:17:39,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-21 22:17:39,702 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-21 22:17:39,702 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-21 22:17:39,703 INFO L85 PathProgramCache]: Analyzing trace with hash 1573213269, now seen corresponding path program 1 times [2023-11-21 22:17:39,703 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-21 22:17:39,704 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [970321797] [2023-11-21 22:17:39,704 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:17:39,704 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-21 22:17:39,757 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-21 22:17:39,757 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1259300895] [2023-11-21 22:17:39,757 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:17:39,757 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-21 22:17:39,758 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 [2023-11-21 22:17:39,760 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-21 22:17:39,772 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2023-11-21 22:17:42,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-21 22:17:42,968 INFO L262 TraceCheckSpWp]: Trace formula consists of 512 conjuncts, 21 conjunts are in the unsatisfiable core [2023-11-21 22:17:42,970 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-21 22:17:43,181 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-21 22:17:43,181 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-21 22:17:43,181 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-21 22:17:43,181 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [970321797] [2023-11-21 22:17:43,182 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-21 22:17:43,182 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1259300895] [2023-11-21 22:17:43,182 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1259300895] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-21 22:17:43,182 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-21 22:17:43,182 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2023-11-21 22:17:43,182 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1695834801] [2023-11-21 22:17:43,183 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-21 22:17:43,183 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-21 22:17:43,183 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-21 22:17:43,183 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2023-11-21 22:17:43,184 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2023-11-21 22:17:43,184 INFO L87 Difference]: Start difference. First operand 324 states and 460 transitions. cyclomatic complexity: 139 Second operand has 9 states, 9 states have (on average 8.88888888888889) internal successors, (80), 9 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-21 22:17:43,762 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-21 22:17:43,762 INFO L93 Difference]: Finished difference Result 350 states and 498 transitions. [2023-11-21 22:17:43,762 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 350 states and 498 transitions. [2023-11-21 22:17:43,765 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 343 [2023-11-21 22:17:43,769 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 350 states to 350 states and 498 transitions. [2023-11-21 22:17:43,769 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 350 [2023-11-21 22:17:43,770 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 350 [2023-11-21 22:17:43,770 INFO L73 IsDeterministic]: Start isDeterministic. Operand 350 states and 498 transitions. [2023-11-21 22:17:43,771 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-21 22:17:43,771 INFO L218 hiAutomatonCegarLoop]: Abstraction has 350 states and 498 transitions. [2023-11-21 22:17:43,772 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 350 states and 498 transitions. [2023-11-21 22:17:43,777 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 350 to 333. [2023-11-21 22:17:43,778 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 333 states, 329 states have (on average 1.419452887537994) internal successors, (467), 328 states have internal predecessors, (467), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-21 22:17:43,780 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 333 states to 333 states and 473 transitions. [2023-11-21 22:17:43,781 INFO L240 hiAutomatonCegarLoop]: Abstraction has 333 states and 473 transitions. [2023-11-21 22:17:43,781 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2023-11-21 22:17:43,782 INFO L428 stractBuchiCegarLoop]: Abstraction has 333 states and 473 transitions. [2023-11-21 22:17:43,782 INFO L335 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2023-11-21 22:17:43,784 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 333 states and 473 transitions. [2023-11-21 22:17:43,786 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 326 [2023-11-21 22:17:43,787 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-21 22:17:43,787 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-21 22:17:43,787 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-21 22:17:43,788 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-21 22:17:43,788 INFO L748 eck$LassoCheckResult]: Stem: 12096#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 12097#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 11972#L715-4 [2023-11-21 22:17:43,788 INFO L750 eck$LassoCheckResult]: Loop: 11972#L715-4 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 12131#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 11903#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 11904#L717-2 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 12038#L722-269 havoc main_~_ha_hashv~0#1; 12121#L722-176 goto; 12073#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 11933#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 11934#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 11861#L722-73 assume !main_#t~switch31#1; 11862#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 11973#L722-76 assume !main_#t~switch31#1; 11974#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 12009#L722-79 assume !main_#t~switch31#1; 12010#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 12076#L722-82 assume !main_#t~switch31#1; 11907#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 11908#L722-85 assume !main_#t~switch31#1; 11936#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 11926#L722-88 assume !main_#t~switch31#1; 11927#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 12111#L722-91 assume !main_#t~switch31#1; 11853#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 11854#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 11855#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 11856#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 12053#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 11887#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 11888#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 12003#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 12120#L722-105 havoc main_#t~switch31#1; 12109#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 12106#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 12107#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 12100#L722-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 12101#L722-116 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 12070#L722-118 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);assume main_#t~nondet44#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 12018#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 12019#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 12145#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 12042#L722-128 assume !(0 == main_~_hj_i~0#1 % 4294967296); 11956#L722-130 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 4096 % 4294967296); 11957#L722-132 assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 4096 % 4294967296);assume main_#t~nondet46#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 4096 % 4294967296; 11866#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 11834#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 11835#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 12139#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 11943#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 12058#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 11893#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 11988#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 11989#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 12054#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 11827#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 11828#L722-170 goto; 12065#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 12031#L722-173 goto; 12032#L722-175 goto; 12094#L722-266 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 12114#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 12116#L722-194 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 11914#L722-193 goto; 11915#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 11945#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 11946#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 12016#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 12026#L722-202 goto; 11924#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 11925#L722-205 assume main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem89#1.base, 12 + main_#t~mem89#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset; 12061#L722-207 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 11935#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 11846#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 11847#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 11993#L722-260 goto; 12069#L722-262 havoc main_~_ha_bkt~0#1; 12034#L722-263 goto; 12035#L722-265 goto; 11963#L722-267 havoc main_~_ha_hashv~0#1; 11842#L722-268 goto; 11843#L715-3 call main_#t~mem3#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 11972#L715-4 [2023-11-21 22:17:43,789 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-21 22:17:43,789 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 14 times [2023-11-21 22:17:43,789 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-21 22:17:43,789 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [924959059] [2023-11-21 22:17:43,790 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:17:43,790 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-21 22:17:43,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-21 22:17:43,804 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-21 22:17:43,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-21 22:17:43,819 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-21 22:17:43,820 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-21 22:17:43,820 INFO L85 PathProgramCache]: Analyzing trace with hash 543853971, now seen corresponding path program 1 times [2023-11-21 22:17:43,820 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-21 22:17:43,820 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1425171340] [2023-11-21 22:17:43,820 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:17:43,820 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-21 22:17:43,868 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-21 22:17:43,868 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [404269888] [2023-11-21 22:17:43,869 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-21 22:17:43,869 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-21 22:17:43,869 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 [2023-11-21 22:17:43,871 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-21 22:17:43,892 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_49502790-a0ad-478c-881b-d598627329af/bin/uautomizer-verify-bycVGegfSx/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process